Institute of Southern Punjab Multan

Department of Computer Science & IT

Final Term Examination
Subject: Digital Logic & Design
Class: BSCS Semester: 1st
Instructor: Muhammad Kashif Date: 15-3-2019
Paper Type: Time 180 Min
Allowed:

Instructions: (Read Carefully)

●Read Question Paper carefully . ●Donot Write anything on Question Paper except your Registration
No and Name. ●Make sure your mobile phone is switched off. ●Any unauthorized material found
after examinations starts will be regarded as possible evidence of cheating or attempting to do so. ●
Avoid cutting / Overwriting
ATTEMPT

Q1: Give short answers of given Questions (Compulsory). Objective Marks : 10

1. What is the difference between flip flop and Register ?

2. What is the difference between static RAM and dynamic RAM ?
3. Describe the master slave JK Flip Flop ?
4. Explain Register Types with the help of Diagram ?
5. Explain the difference between high level and low level triggering ?

Briefly Explain given question (Attempt any 4 questions). Subjective Marks : 40

Q2: Define counter and also Design a counter to produce the following sequence. Use J-K flip-flops.
{ 00, 10, 01, 11, 00, …. }

Q3 : Define PLA and also Draw a PLA circuit to implement the functions F1 = A’B + AC + A’BC’ ,
F2 = (AC + AB + BC)’

Q4 : Define ROM and Tabulate the truth table for an 8 * 4 ROM that implements the Boolean
functions . A(x, y, z) = ∑(0, 3, 4, 6) , B(x, y, z) = ∑(0, 1, 4, 7), C(x, y, z) = ∑(1, 5)
D(x, y, z) = ∑(0, 1, 3, 5, 7)

Q5 : Define PAL and also draw the PAL for given SOP. A(x, y, z) = ∑(0, 3, 4, 6),
B(x, y, z) = ∑(0, 1, 4, 7), C(x, y, z) = ∑(1, 5)

Q6: Design Mealy Machine for given Diagram.

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