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IPC/EIA J-STD-001C

MARCH 2000
Supersedes Revision B October 1996
Original Publication April 1992

JOINT
INDUSTRY
STANDARD

Requirements for
Soldered Electrical
and Electronic
Assemblies
In keeping with the U.S. Department of Defense acquisition reform principle of relying on performance requirements when-
ever practicable, and then relying on contractors to meet those requirements, this standard has not been ‘‘adopted.’’ How-
ever, it is recommended as a reference to be used in the establishment and evaluation of design and process requirements.
The adoption notice of the IPC-HDBK-001 is reprinted below to better identify the Department’s intent to use ANSI/J-STD-
001, IPC-HDBK-001, and IPC-A-610 when evaluating electronic manufacturing strategies, processes, and management.
‘‘IPC-HDBK-001, ‘‘Handbook and Guide to the Requirements for Soldered Electrical and Electronic Assemblies
to Supplement ANSI/J-STD-001B’’ was adopted on January 5, 1998, for use by the Department of Defense
(DoD). Department of Defense policy is to rely on performance based requirements whenever practicable and to
not require standard management approaches or manufacturing processes in solicitations and contracts. By
establishing performance requirements and then relying on contractors to meet those requirements we enable
innovation and allow contractors to meet our needs at the lowest cost. Nevertheless Defense program managers
and contract oversight personnel must have an understanding of the underlying management, engineering, and
manufacturing processes at work so they can evaluate and monitor contractor processes. DoD activities may use
this handbook and its associated documents when evaluating electronic manufacturing strategies, processes, and
management.’’

The Principles of In May 1995 the IPC’s Technical Activities Executive Committee adopted Principles of
Standardization Standardization as a guiding principle of IPC’s standardization efforts.
Standards Should:
• Show relationship to Design for Manufacturability (DFM) and Design for the
Environment (DFE)
• Minimize time to market
• Contain simple (simplified) language
• Just include spec information
• Focus on end product performance
• Include a feedback system on use and problems for future improvement
Standards Should Not:
• Inhibit innovation
• Increase time-to-market
• Keep people out
• Increase cycle time
• Tell you how to make something
• Contain anything that cannot be defended with data

Notice IPC Standards and Publications are designed to serve the public interest through eliminating
misunderstandings between manufacturers and purchasers, facilitating interchangeability and
improvement of products, and assisting the purchaser in selecting and obtaining with minimum
delay the proper product for his particular need. Existence of such Standards and Publications
shall not in any respect preclude any member or nonmember of IPC from manufacturing or sell-
ing products not conforming to such Standards and Publication, nor shall the existence of such
Standards and Publications preclude their voluntary use by those other than IPC members,
whether the standard is to be used either domestically or internationally.
Recommended Standards and Publications are adopted by IPC without regard to whether their
adoption may involve patents on articles, materials, or processes. By such action, IPC does not
assume any liability to any patent owner, nor do they assume any obligation whatever to parties
adopting the Recommended Standard or Publication. Users are also wholly responsible
for protecting themselves against all claims of liabilities for patent infringement.

©Copyright 2000. IPC, Northbrook, Illinois. All rights reserved under both international and Pan-American copyright conventions. Any
copying, scanning or other reproduction of these materials without the prior written consent of the copyright holder is strictly prohibited and
constitutes infringement under the Copyright Law of the United States.
IPC/EIA J-STD-001C
ASSOCIATION CONNECTING
ELECTRONICS INDUSTRIES

Requirements for Soldered


Electrical and Electronic
Assemblies

A joint standard developed by the Joint National Soldering Standard Task


Group (5-22a), the EIA Soldering Technology Committee (STC) and the
Soldering Subcommittee (5-22) of IPC

Users of this standard are encouraged to participate in the


development of future revisions.

Contact:

EIA IPC
Engineering Department 2215 Sanders Road
2500 Wilson Boulevard Northbrook, IL 60062-6135
Arlington, VA 22201 Phone (847) 509-9700
Phone (703) 907-7500 Fax (847) 509-9798
Fax (703) 907-7501
Why is there Your purchase of this document contributes to the ongoing development of new and updated
a charge for industry standards. Standards allow manufacturers, customers, and suppliers to understand one
this standard? another better. Standards allow manufacturers greater efficiencies when they can set up their
processes to meet industry standards, allowing them to offer their customers lower costs.
IPC spends hundreds of thousands of dollars annually to support IPC’s volunteers in the
standards development process. There are many rounds of drafts sent out for review and the
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IPC’s membership dues have been kept low in order to allow as many companies as possible to
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mation on membership in IPC, please visit www.ipc.org or call 847/790-5372.

Thank you for your continued support.


March 2000 IPC/EIA J-STD-001C

Acknowledgment
Members of the EIA Soldering Technology Committee (STC) and the Joint National Standard for Soldering Task Group have
worked together to develop this document. We would like to thank them for their dedication to this effort.
Any Standard involving a complex technology draws material from a vast number of sources. While the principal members
of the Joint National Standard for Soldering Task Group are shown below, it is not possible to include all of those who
assisted in the evolution of this Standard. To each of them, the members of the EIA and IPC extend their gratitude.

Assembly & Joining EIA Soldering Technology Joint National Standard


Processes Committee Committee for Soldering Task Group
Chair Chair Co-Chairs
James F. Maguire Mark Kwoka Jeff Koon
Boeing Phantom Works Intersil Corporation Raytheon Company
Teresa Rowe
AAI Corporation
Technical Liaisons of the
IPC Board of Directors

Stan Plzak
Pensar Corp.
Peter Bigelow
Beaver Brook Circuits Inc.

Joint National Standard for Soldering Task Group

David C. Adams, Rockwell Collins Timothy A. Bowser, Orbital Sciences Gene Cushman, EPTAC Corporation
Michael Aldrich, Ametek Aerospace Corporation Donald H. Daebler, SCI Systems Inc.
Kari Anderson, Raytheon Company Diana Bradford, Soldering Derek D’Andrade, Surface Mount
Gad Arbel, IAI Technology International Technology Centre
Peter Ashaolu, Cisco Systems Inc. Jason Bragg, Celestica International J. Gordon Davy, Northrop Grumman
Inc. ES & SD
William J. Balon, Bayer Corporation
Dr. Peter Bratin, ECI Technology, Jennifer Day, Soldering Technology
Mark Barnett, Raytheon Company
Inc. International
Charles R. Barker, Input/Output Inc.
David Bruder, Harris Corporation Lyn Dayman, ATTEC Australia
Ann Bastin, Eldec Corporation
Carl Buchanan, U.S. Aviation & Rodney Dehne, OEM Worldwide
Timothy E. Bates, Alcatel USA Missile Command Stacey DeLorenzo, Northrop
Jim Beal, ITT Aerospace Terry Burnette, Motorola Inc. Grumman Corporation
Communications
Jeff Cannis, Amkor Technology Inc. Ramon Diaz, Solectron Technology
Chris Beaufait, General Electric Co.
Ken H. Carlson, Harris Corporation Inc.
Amir Bega, AlliedSignal Aerospace
Thomas A. Carroll, Hughes Space & William C. Dieffenbacher, Lockheed
Canada
Communications Co. Martin Corporation
Grace L. Ben, Ambitech Inc.
Robert V. Carter, TRW Michele J. DiFranza, The Mitre Corp.
Dennis F. Bernier, Kester Solder
Alan S. Cash, Northrop Grumman Darrin Dodson, Alcatel USA
Division
Corporation Nick D’Onofrio, CAE Electronics
Michael A. Beverly, TRW
D. Phillip Chen, AlliedSignal Ltd.
Ken Bloomquist, Primex Aerospace Aerospace Canada Karen Downey, Lockheed Martin
Company
Ray Cirimele, Diversified Systems Corporation
Richard W. Boerdner, EJE Research Inc. Kathie M. Drake-Willcox, Jet
G. Les Bogert, Bechtel Plant Dr. Hugh Cole, Cobar Americas Inc. Propulsion Laboratory
Machinery, Inc.
Jeffrey C. Colish, Northrop Grumman Dr. Barrie D. Dunn, European Space
Sudhir T. Bora, Automotive Systems Corporation Agency
Laboratory
Charles Dal Currier, Ambitech Inc. Frank Durso, MacDermid, Inc.

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IPC/EIA J-STD-001C March 2000

Manon Dutil, C-MAC Electronic Constantin Hudon, Varitron Brian Maas, Pensar Corporation
Systems Inc. Technologies, Inc. Kim MacDougall, Sanmina
Kathy Edsinger, MCMS Dr. Chris Hunt, National Physical Corporation
Werner Engelmaier, Engelmaier Laboratory James F. Maguire, Boeing Phantom
Associates, L.C. Greg Hurst, Marconi Aerospace Works
Tommy R. Etheridge, Boeing Aircraft Defense Systems Peter E. Maher, PEM Consulting
& Missiles Dr. Jennie S. Hwang, H-Technologies Alan Mahoney, CAE Electronics Ltd.
Joe R. Felty, Raytheon Company Group Inc. Susan S. Mansilla, Robisan
Jeff Ferry, Circuit Technology Center, Les Hymes, The Complete Laboratory Inc.
Inc. Connection James Marsico, AIL Systems Inc.
Daryl Feryance, Eaton/ Martin W. Jawitz, Eimer Company John Mastorides, Group Technologies
Cutler-Hammer James Jenkins, Harris Corporation Corp.
Charles D. Fieselman, Solectron Martin E. Johns, Polaris Contract William Dean May, NSWC - Crane
Technology Inc. Services William E. McManes, PEI
Bruce D. Fischer, Logitech Inc. Kathryn L. Johnson, Hexacon Electronics, Inc.
Daniel L. Foster, Electronics Training Electric Company Mark McDonough, Chandler Evans
Advantage (ETA) Chris A. Johnson, Lucent Control Systems
James E. Fowler, Raytheon Company Technologies Inc. Garry D. McGuire, Hernandez
Kevin J. Frasier, Scientific-Atlanta Joseph E. Kane, Lockheed Martin Engineering Inc.
Inc. Corporation Ronald McIlnay, Medtronic
Mike Freed, Rockwell Automation/ Cindy A. Kemp, Evenflo Company Physio-Control
Allen Bradley Inc. William E. McManes, PEI
Juan Gamboa, Cisco Systems Inc. Richard Kennady, Bahiatech Bahia Electronics, Inc.
Mahendra S. Gandhi, Raytheon Technologia Ltda Randy McNutt, Northrop Grumman
Company Terence Kern, Axiom Electronics, Renee Michalkeiwicz, Trace Labs
Floyd Gentry, Sandia National Labs Inc. East
John J. German, Orbital Sciences William Killion, Kimball Electronics Kelly J. Miller, CAE Electronics Ltd.
Corporation Group
James Misiak, II Stanley Co. Inc.
Constantino J. Gonzalez, ACME, Inc. Clarence W. Knapp, Litton Guidance
James H. Moffitt, Moffitt Consulting
& Control Systems
Randall Goodnight, Solectron Services
Technology Inc. Jeffry F. Koon, Raytheon Company
Philip L. Montague, Raytheon
Gary A. Gorsche, Litton Amecom Connie M. Korth, K-Byte/Hibbing Company
Manufacturing
Robert Gregory, CAE Electronics Marsha Moore, Techdyne, Lytton Inc.
Ltd. Richard Kraszewski, Kester Solder
Christian Morin, Varitron
Division
Russell S. Griffith, Tyco PCG/ Technologies, Inc.
Engineered Systems Vijay Kumar, Lockheed Martin
Barry Morris, Advanced Rework
Electronics & Missiles
William F. Griffiths, Tellumat Pty. Technology-A.R.T
Ltd. Mark A. Kwoka, Intersil Corporation
Gordon Morris, Raytheon Company
C. Dudley Hamilton, Lockheed Patrick Kyne, Defense Supply Center
Eugene R. Moyer, Marconi
Martin Corporation Columbus
Aerospace Electronics Systems
Dr. Carol Handwerker, NIST Leo P. Lambert, EPTAC Corporation
Mary Muller, Eldec Corporation
Dr. Michael E. Hayes, Petroferm Inc. Charles A. Lawson, General
Terry L. Munson, CSL Inc.
Dynamics Advanced Technology
Steven A. Herrberg, Raytheon Steven W. Myers, Boeing Defense &
Company Frederic W. Lee, Northrop Grumman
Space-Irving
Norden Systems
David D. Hillman, Rockwell Collins Richard Nasielski, NVF Company
Chou H. Li, LMI Technologies
Phil Hinton, Hinton ‘‘PWB’’ James Nebergall, Lockheed Martin
Engineering Larry Lichtenberg, Process
Corporation
Optimization Specialists
F. D. Bruce Houghton, Celestica David Nicol, Lucent Technologies
International Inc. Alvin R. Luther, Litton Laser
Inc.
Systems
Trevor Hughes, Fisher-Rosemont Benny Nilsson, Ericsson Radio
Limited David H. Ma, Lockheed Martin
Systems AB
Missiles & Space
Thomas L. Humpal, OEM Worldwide

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March 2000 IPC/EIA J-STD-001C

Kim Norris, Lockheed Martin Jose A. Romo, Thomson Televisiones Rick B. Smith, Motorola Inc.
Missles and Fire Control de Mexico Dr. John E. Sohn, Lucent
Riley L. Northam, EMPF/ACI Jerald G. Rosser, Rosser Consulting Technologies Inc.
John S. Norton, Xerox Corporation Teresa M. Rowe, AAI Corporation Wayne A. Steen, Rockwell Collins
William A. Novak, Honeywell Michael M. Rubin, Vishay Sprague Jorgen Svensson, Ericsson Radio
International, Inc. William R. Russell, Raytheon Systems AB
David T. Novick, The Boeing Company Alan W. Swanson, Sanders, A
Company Joseph P. Salvin, Smiths Industries Lockheed Martin Company
Seppo Nuppola, Nokia Networks Steven T. Sauer, Xetron Corp. Blen F. Talbot, L-3 Communications
Robin L. O’Connor, Delphi Delco Alvin F. Schneider, Alpha Metals Inc. John E. Taylor, Delphax Systems
Electronics Systems Kelly M. Schriver, Schriver James Terveen, L-3 Communications
Gregg Owens, Omni Training Corp. Consultants Ed R. Tidwell, Alcatel USA
Deepak Pai, General Dynamics Peggy Schuck, Hi-Tech Stephen Todd, FCI Berg Electronics
Information Sys. Inc. Manufacturing Steven Torres, Corlund Electronics
Mel Parrish, EMPF/ACI Joyce Schutt, SCI Systems, Inc. Corp.
Douglas O. Pauls, CSL Inc. Frank S. Segura, Lockheed Martin Dr. Laura J. Turbini, Atlanta, GA
Ryan Petersen, Celestica International Astronautics Victor A. Twaddell, Sanders, A
Inc. Merlyn L. Seltzer, Delco Defense Lockheed Martin Co.
Peter A. Phillips, Honeywell Inc. Systems Operations Paul L. Urban, Cooper Industries Inc.
Timothy M. Pitsch, Plexus Corp. Barry W. Shapiro, Data General Sharon T. Ventress, U.S. Aviation &
Christine Pollock, Presidio Corporation Missile Command
Components Inc. Xianyu Shea, Stryker Instruments Nick Virmani, Naval Research Lab
Scott Poole, MCMS Dr. Akikazu Shibata, Sony L. Samantha Walley, Raytheon
Robert W. Quinn, Copal Electronics Corporation Company
Co., Ltd. Mark Shireman, Alliant Techsystems Karen Walters, BTU International
David Posner, Gamma-Metrics Inc. Vern T. Weik, C.I.D., Century
Jim D. Raby, Soldering Technology Eric S. Siegel, Pace Inc. Circuits & Electronics
International Vernon P. Singleton, Lockheed Bob Willis, Lockheed Martin
James E. Rausch, Delphi Delco Martin Corporation Corporation
Electronics Systems Finn Skaanning, DELTA Quality & James Walter Woodford, Department
Jim R. Reed, Raytheon Company Certification of Defense
Tony Reyes, Advanced Micro Tim Skidmore, Multicore Solders, Gerald Wooten, Lockheed Martin
Devices Inc. Inc. Skunk Works
Nancy W. Reynolds, Kemet Joseph T. Slanina, AlliedSignal Don Youngblood, Honeywell Inc.
Electronics Corp. Aerospace Adam Zbrzezny, Celestica
Don Ripplinger, ITT Aerospace/ Edward Small, Ed Small Consulting International Inc.
Communications S. Alan Smith, MTTC (Mfg Technlgy Dr. Yun Zhang, Lucent Technologies
David E. Robertson, Hexacon Training Ctr) Inc.
Electric Company

v
IPC/EIA J-STD-001C March 2000

Table of Contents
1 SCOPE ....................................................................... 1 4.2 Flux ................................................................... 5
1.1 Purpose ............................................................. 1 4.3 Solder Paste ...................................................... 5
1.2 Classification .................................................... 1 4.4 Solder Preforms ................................................ 5
1.3 Measurement Units and Applications .............. 1 4.5 Adhesives ......................................................... 5
1.3.1 Verification of Dimensions .............................. 1 4.6 Chemical Strippers ........................................... 5
1.4 Definition of Requirements .............................. 1 4.7 Heat Shrinkable Soldering Devices ................. 5
1.4.1 Hardware Defects and Process Indicators ....... 2
5 COMPONENTS .......................................................... 5
1.4.2 Material and Process Nonconformances ......... 2
5.1 Solder Terminals .............................................. 6
1.5 Process Control Requirements ......................... 2
5.2 Solderability ..................................................... 6
2 APPLICABLE DOCUMENTS ..................................... 2 5.2.1 Solderability Testing of Ceramic Boards ........ 6
2.1 Electronic Industries Alliance (EIA) ............... 2 5.3 Solder Purity Maintenance .............................. 6
2.2 IPC .................................................................... 2 5.4 Solderability Maintenance ............................... 6
2.3 Joint Industry Standards .................................. 3 5.4.1 Gold Removal .................................................. 6
2.4 ASTM ............................................................... 3 5.4.2 Rework of Nonsolderable Parts ....................... 6
2.5 Electrostatic Discharge Association ................. 3
6 ASSEMBLY PROCESSES ......................................... 7
3 GENERAL REQUIREMENTS .................................... 3 6.1 General Part Mounting Requirements ............. 7
3.1 Order of Precedence ......................................... 3 6.1.1 Component and Seal Damage ......................... 7
3.1.1 Conflict ............................................................. 3 6.1.2 Lead Forming ................................................... 7
3.1.2 Specialized Processes and Technologies ......... 3 6.1.2.1 Lead Deformation Limits ................................ 7
3.2 Terms and Definitions ...................................... 3 6.1.2.2 Surface Mount Device Lead Forming ............. 7
3.2.1 Defect ............................................................... 3 6.1.2.3 Flat Pack Parallelism ....................................... 7
3.2.2 Disposition ........................................................ 4 6.1.2.4 Surface Mount Device Lead Bends ................. 8
3.2.3 Manufacturer (Assembler) ............................... 4 6.1.2.5 Surface Mount Device Lead Deformation ...... 8
3.2.4 Objective Evidence .......................................... 4 6.1.2.6 Flattened Leads ................................................ 8
3.2.5 Process Indicator .............................................. 4 6.1.2.7 Dual-in-line Packages (DIPs) .......................... 8
3.2.6 Proficiency ........................................................ 4 6.1.3 Wire and Cable Preparation ............................. 8
3.2.7 Solder Destination Side ................................... 4 6.1.3.1 Tinning of Stranded Wire ................................ 8
3.2.8 Solder Source Side ........................................... 4 6.1.4 Hole Obstruction .............................................. 8
3.2.9 Supplier ............................................................ 4 6.1.5 Metal-Cased Component Isolation .................. 8
3.2.10 User .................................................................. 4 6.1.6 Adhesive Coverage Limits .............................. 8
3.3 Requirements Flowdown ................................. 4 6.2 Bifurcated and Turret Terminal Installation .... 9
3.4 Personnel Proficiency ....................................... 4 6.2.1 Shank Discontinuities ...................................... 9
3.5 Electrostatic Discharge (ESD) ......................... 4 6.2.2 Flange Discontinuities ..................................... 9
3.6 Facilities ........................................................... 4 6.2.3 Flared Flange Angles ....................................... 9
3.6.1 Environmental Controls ................................... 4 6.2.4 Terminal Mounting - Mechanical .................... 9
3.6.2 Temperature and Humidity .............................. 4 6.2.5 Terminal Mounting - Electrical ....................... 9
3.6.3 Lighting ............................................................ 4 6.3 Mounting to Terminals ................................... 10
3.6.4 Field Assembly Operations .............................. 4 6.3.1 General Requirements .................................... 10
3.6.5 Moisture Sensitive Components ...................... 5 6.3.1.1 Insulation Clearance (C) ................................ 10
3.7 Soldering Tools and Equipment ...................... 5 6.3.1.2 Service Loops ................................................. 10
4 MATERIALS ............................................................... 5 6.3.1.3 Stress Relief ................................................... 10
4.1 Solder ................................................................ 5 6.3.1.4 Orientation of Lead or Wire Wrap ................ 11

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March 2000 IPC/EIA J-STD-001C

6.3.1.5 Continuous Runs ............................................ 11 7.3.2 Solder Bath ..................................................... 16


6.3.1.6 Insulation Sleeving (Wires Soldered 7.3.2.1 Solder Bath Maintenance ............................... 16
to Pierced, Hook and Cup Terminals) ........... 12 7.4 Reflow Soldering ............................................ 16
6.3.1.7 Lead and Wire End Extensions ..................... 12
8 CLEANLINESS REQUIREMENTS .......................... 16
6.3.2 Bifurcated (Slotted) and Turret Terminals .... 12
8.1 Cleaning Process Requirements .................... 16
6.3.2.1 Wire and Lead Wrap-Around - Turret and
Straight Pin ..................................................... 12 8.1.1 Pre-Soldering Cleanliness Requirements ....... 16
6.3.2.1.1 Termination of Small Gauge Wire (AWG 8.1.2 Post-Soldering Cleaning ................................ 17
30 and Smaller) .............................................. 12 8.1.2.1 Ultrasonic Cleaning ........................................ 17
6.3.2.2 Side Route Connection - Bifurcated 8.2 Cleanliness Verification .................................. 17
Terminals ........................................................ 12
8.2.1 Visual Inspection ............................................ 17
6.3.2.3 Top and Bottom Route Connections ............. 12
8.2.2 Testing ............................................................ 17
6.3.3 Hook Terminals .............................................. 12
8.3 Post-Solder Cleanliness .................................. 17
6.3.4 Pierced or Perforated Terminals .................... 12
8.3.1 Particulate Matter ........................................... 17
6.3.5 Cup and Hollow Cylindrical Terminal
8.3.2 Flux Residues and Other Ionic or Organic
Soldering ........................................................ 13
Contaminants .................................................. 17
6.4 Surface Mounting of Components ................ 14
8.3.2.1 Post-Soldering Cleanliness Designator .......... 17
6.4.1 Parts Not Configured for Surface
8.3.2.2 Visual Requirements ...................................... 17
Mounting ........................................................ 14
8.3.3 Cleaning Option ............................................. 17
6.4.2 Small Devices with Two Terminations ......... 14
8.3.4 Test for Cleanliness ........................................ 17
6.4.2.1 Mounting of Parts on Parts (Stacking) .......... 14
8.3.5 Rosin Flux Residues ...................................... 18
6.4.2.2 Devices with External Deposited Elements .. 14
8.3.6 Ionic Residues (Instrument Method) ............. 18
6.4.3 Leaded Component Body Positioning ........... 14
8.3.7 Ionic Residues (Manual Method) .................. 18
6.4.3.1 Axial-Leaded Components ............................ 14
8.3.8 Surface Insulation Resistance (SIR) .............. 18
6.4.4 Parts Configured for Butt Lead Mounting .... 14
8.3.9 Other Contamination ...................................... 18
6.5 Through-Hole Mounting ................................ 14
6.5.1 Lead Forming Requirements ......................... 14 9 ASSEMBLY REQUIREMENTS ................................ 18
6.5.2 Lead Termination Requirements .................... 14 9.1 Acceptance Requirements .............................. 18
6.5.2.1 Lead Termination Requirements for 9.1.1 Corrective Action Limits ............................... 18
Unsupported Holes ......................................... 15 9.1.2 Opportunities Determination .......................... 18
6.5.3 Coating Meniscus ........................................... 15 9.2 General Assembly Requirements ................... 18
7 ASSEMBLY SOLDERING PROCESSES ................ 15 9.2.1 Printed Wiring Assembly Damage ................ 19
7.1 General ........................................................... 15 9.2.1.1 Printed Wiring Board Damage ...................... 19
7.1.1 Handling of Parts ........................................... 15 9.2.1.2 Component Damage ....................................... 19
7.1.2 9.2.2 Markings ......................................................... 19
Preheating ....................................................... 15
9.2.3 Bow and Twist (Warpage) ............................. 19
7.1.3 Hold Down of Surface Mount Leads ............ 15
9.2.4 Solder Connection .......................................... 19
7.1.4 Cooling ........................................................... 15
9.2.4.1 Exposed Basis Metal ...................................... 20
7.1.5 Lead Trimming ............................................... 15
9.2.4.2 Solder Connection Defects ............................ 20
7.1.6 Solder Wicking ............................................... 15
9.2.4.3 Partially Visible or Hidden Solder
7.1.7 Drying/Degassing ........................................... 15 Connections .................................................... 20
7.1.8 Holding Devices and Materials ..................... 16 9.2.4.4 Soldering to Terminals ................................... 20
7.2 Manual/Hand (Nonreflow) Soldering ............ 16 9.2.4.4.1 Bifurcated, Pierced or Perforated
7.2.1 Flux Application ............................................. 16 Terminals ........................................................ 20
7.2.2 Solder Application .......................................... 16 9.2.4.4.2 Cup Terminals ................................................ 20
7.2.3 Heat Sinks ...................................................... 16 9.2.5 Interfacial Connections .................................. 21
7.3 Machine (Nonreflow) Soldering .................... 16 9.2.5.1 Through-Hole Component Lead Soldering ... 21
7.3.1 Machine Controls ........................................... 16 9.2.5.2 Through-Hole Lead Terminations .................. 21

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IPC/EIA J-STD-001C March 2000

9.2.5.2.1 Straight Through Terminations ...................... 21 11.2.3 Sampling Inspection ....................................... 39


9.2.5.2.2 Clinched Leads ............................................... 21 11.3 Process Control .............................................. 39
9.2.5.2.3 Coating Meniscus In Solder .......................... 22 1.3.1 Defect and Process Indicator Reduction ....... 39
9.2.6 Surface Soldering of Leads and
12 REWORK AND REPAIR ........................................ 40
Terminations ................................................... 22
12.1 Rework of Unsatisfactory Solder
9.2.6.1 Misaligned Components ................................ 22 Connections .................................................... 40
9.2.6.2 Unspecified Requirements ............................. 22 12.2 Repair ............................................................. 40
9.2.6.3 Special Class 1 SMT Requirements .............. 22 12.3 Post Rework/Repair Cleaning ........................ 40
9.2.6.4 Bottom Only Terminations ............................ 23
13 MISCELLANEOUS REQUIREMENTS ................... 40
9.2.6.5 Rectangular or Square End Components ...... 24
13.1 Health and Safety ........................................... 40
9.2.6.6 Cylindrical End Cap Terminations ................ 25
13.2 Special Manufacturing Requirements ............ 40
9.2.6.7 Castellated Terminations ................................ 26
13.2.1 Manufacture of Devices Incorporating
9.2.6.8 Flat, Ribbon, ‘‘L’’, and Gull Wing Leads ..... 27
Magnetic Windings ........................................ 40
9.2.6.9 Round or Flattened (Coined) Leads .............. 28
13.2.2 High Frequency Applications ........................ 40
9.2.6.10 ‘‘J’’ Leads ....................................................... 29
13.2.3 High Voltage Applications ............................. 40
9.2.6.11 Butt Joints ...................................................... 30
13.3 Guidance on Requirement Flowdown ........... 40
9.2.6.12 Flat Lug Leads ............................................... 31
9.2.6.13 Tall Profile Components Having Bottom Appendix A ................................................................. 41
Only Terminations .......................................... 32
Appendix B ................................................................. 43
9.2.6.14 Inward Formed L-Shaped Ribbon Leads ...... 33
9.2.6.15 Surface Mount Area Array Packages ............ 34 Index ............................................................................ 45
9.2.7 Terminal Soldering ......................................... 34
9.2.8 Connectors ...................................................... 34 Figures

10 COATING AND ENCAPSULATION ....................... 34 Figure 6-1 Surface Mount Device Lead Forming .............. 7
Figure 6-2 Hole Obstruction ............................................... 9
10.1 Conformal Coating ......................................... 34
Figure 6-3 Flange Discontinuities ...................................... 9
10.1.1 Application ..................................................... 34
Figure 6-4 Flare Angles ...................................................... 9
10.1.1.1 Adjustable Components ................................. 34
Figure 6-5 Terminal Mounting - Mechanical .................... 10
10.1.1.2 Conformal Coating on Connectors ................ 34
Figure 6-6 Terminal Mounting - Electrical ........................ 10
10.1.1.3 Conformal Coating on Brackets .................... 34
Figure 6-7 Insulation Clearance (C) Measurement .......... 11
10.1.2 Performance Requirements ............................ 34
Figure 6-8 Service Loop for Lead Wiring ......................... 11
10.1.2.1 Thickness ........................................................ 34
Figure 6-9 Stress Relief Examples ................................... 11
10.1.2.2 Coating Coverage ........................................... 35
Figure 6-10 Continuous Runs ............................................ 11
10.1.3 Rework of Conformal Coating ...................... 35 Figure 6-11 Wire and Lead Wrap Around .......................... 12
10.1.4 Conformal Coating Inspection ....................... 35 Figure 6-12 Side Route Connections and Wrap
10.2 Encapsulation ................................................. 35 on Bifurcated Terminal .................................... 13
10.2.1 Application ..................................................... 35 Figure 6-13 Top and Bottom Route Terminal
Connection ...................................................... 13
10.2.1.1 Encapsulant Free Surfaces ............................. 35
Figure 6-14 Hook Terminal Connections ............................ 13
10.2.2 Performance Requirements ............................ 35
Figure 6-15 Pierced or Perforated Terminal Wire Wrap .... 13
10.2.3 Rework of Encapsulant Material ................... 35
Figure 6-16 Lead Bends .................................................... 14
10.2.4 Encapsulant Inspection .................................. 35
Figure 9-1 Solder Contact Angle (θ) ................................ 20
11 PRODUCT ASSURANCE ...................................... 35 Figure 9-2 Acceptable Wetting of Plated-Through
11.1 Hardware Defects Requiring Disposition ...... 35 Holes without Leads ....................................... 21

11.2 Inspection Methodology ................................ 39 Figure 9-3 Through-Hole Component Lead Soldering -
Minimum Acceptability for Classes 2
11.2.1 Process Verification Inspection ...................... 39 and 3 Per Table 9-1 ........................................ 21
11.2.2 Visual Inspection ............................................ 39 Figure 9-4 Bottom Only Terminations .............................. 23
11.2.2.1 Magnification Aids and Lighting ................... 39 Figure 9-5 Rectangular or Square End Components ...... 24

viii
March 2000 IPC/EIA J-STD-001C

Figure 9-6 MELF Terminations ......................................... 25 Table 9-4 Dimensional Criteria - Bottom Only
Figure 9-7 Castellated Terminations ................................ 26 Terminations ...................................................... 23

Figure 9-8 Flat, Ribbon, ‘‘L,’’ and Gull Wing Leads ......... 27 Table 9-5 Dimensional Criteria - Rectangular or
Square End Components .................................. 24
Figure 9-9 Round or Flattened (Coined) Leads ............... 28
Table 9-6 Dimensional Criteria - MELF Terminations ....... 25
Figure 9-10 ‘‘J’’ Leads ........................................................ 29
Table 9-7 Dimensional Criteria - Castellated
Figure 9-11 Butt Joint ......................................................... 30 Terminations ...................................................... 26
Figure 9-12 Flat Lug Leads ................................................ 31 Table 9-8 Dimensional Criteria - Flat, Ribbon, ‘‘L,’’
Figure 9-13 Tall Profile Components Having Bottom and Gull Wing Leads ........................................ 27
Only Terminations ........................................... 32 Table 9-9 Dimensional Criteria - Round or Flattened
Figure 9-14 Inward Formed L-Shaped Ribbon Leads ....... 33 (Coined) Leads .................................................. 28
Table 9-10 Dimensional Criteria - ‘‘J’’ Leads ...................... 29
Table 9-11 Dimensional Criteria - Butt Joints ..................... 30
Tables Table 9-12 Dimensional Criteria - Flat Lug Leads .............. 31
Table 3-1 Design and Fabrication Specification ................. 3 Table 9-13 Dimensional Criteria - Tall Profile
Components Having Bottom Only
Table 5-1 Solder Limits for Tin/Lead Alloys ........................ 6 Terminations ...................................................... 32
Table 6-1 Damaged Strand Limits ...................................... 8 Table 9-14 Dimensional Criteria - Inward Formed
Table 6-2 Lead Bend Radius ............................................ 14 L-Shaped Ribbon Leads ................................... 33
Table 6-3 Lead Protrusion ................................................. 15 Table 9-15 Terminal Soldering Requirements ..................... 34
Table 9-1 Plated-Through Holes with Component Table 10-1 Coating Thickness ............................................. 34
Leads, Minimum Acceptable Conditions ........... 21 Table 11-1 Summary of Hardware Defects and Process
Table 9-2 Lead Protrusion ................................................. 22 Indicators ........................................................... 36
Table 9-3 Surface Mount Components ............................. 22 Table 11-2 Magnification Aid Applications ........................... 39

ix
IPC/EIA J-STD-001C March 2000

This Page Intentionally Left Blank

x
March 2000 IPC/EIA J-STD-001C

Requirements for Soldered Electrical


and Electronic Assemblies

1 SCOPE vice is desired but not critical. Typically the end-use envi-
This standard prescribes practices and requirements for the ronment would not cause failures.
manufacture of soldered electrical and electronic assem-
CLASS 3 High Performance Electronic Products
blies. Historically, electronic assembly (soldering) stan-
dards contained a more comprehensive tutorial addressing Includes products where continued high performance or
principles and techniques. For a more complete under- performance-on-demand is critical, equipment downtime
standing of this document’s recommendations and require- cannot be tolerated, end-use environment may be uncom-
ments, one may use this document in conjunction with monly harsh, and the equipment must function when
IPC-HDBK-001 and IPC-A-610. required, such as life support or other critical systems.

When IPC/EIA J-STD-001 is cited or required by contract, 1.3 Measurement Units and Applications All dimen-
the requirements of IPC-A-610 do not apply unless sepa- sions and tolerances, as well as other forms of measure-
rately or specifically required. When IPC-A-610 is cited ment (temperature, weight, etc.) in this standard are
along with IPC/EIA J-STD-001, the order of precedence is expressed in SI (System International) units (with Imperial
to be defined in the procurement documents. English equivalent dimensions provided in brackets).
Dimensions and tolerances use millimeters as the main
1.1 Purpose This standard describes materials, methods
form of dimensional expression; micrometers are used
and acceptance criteria for producing soldered electrical
when the precision required makes millimeters too cumber-
and electronic assemblies. The intent of this document is to
some. Celsius is used to express temperature. Weight is
rely on process control methodology to ensure consistent
expressed in grams.
quality levels during the manufacture of products. It is not
the intent of this standard to exclude any procedure for 1.3.1 Verification of Dimensions Actual measurement
component placement or for applying flux and solder used of specific part mounting and solder fillet dimensions and
to make the electrical connection; however, the methods determination of percentages are not required except for
used shall1 produce completed solder joints conforming to referee purposes. For the purposes of determining conform-
the acceptability requirements described in this standard. ance to this specification, all specified limits in this stan-
The requirements for assembly, sol- dard are absolute limits as defined in ASTM E29.
(1) Requirement
dering, soldered connections, clean- See 1.4 1.4 Definition of Requirements The word shall is used
ing, coating/encapsulation, rework, throughout this document whenever a requirement is
and verification are defined in general terms. intended to express a provision that is binding.
1.2 Classification This standard recognizes that electri-
Where the word shall leads to a hardware defect for at least
cal and electronic assemblies are subject to classifications
one class, the requirements for each class are annotated in
by intended end-item use. Three general end-product
text boxes located adjacent to that occurrence in the text.
classes have been established to reflect differences in pro-
These boxes are summarized in Table 11-1. Table 11-1
ducibility, complexity, functional performance require-
identifies each listed condition for each class as either
ments, and verification (inspection/test) frequency. It
‘‘Defect,’’ ‘‘Process Indicator,’’ ‘‘Acceptable,’’ or ‘‘No
should be recognized that there may be overlaps of equip-
Requirement Specified.’’ In case of a discrepancy between
ment between classes.
requirements in the text boxes and Table 11-1, require-
The user (see 3.2.10) and manufacturer (see 3.2.3) shall ments listed in the text boxes take precedence.
agree on the class to which the product belongs. The prod-
Line drawings and illustrations are depicted herein to assist
uct class should be stated in the procurement documenta-
in the interpretation of the written requirements of this
tion package.
standard. When tables or figures provide details of the
CLASS 1 General Electronic Products requirements, the tables or figures take precedence over the
Includes products suitable for applications where the major text of this standard.
requirement is function of the completed assembly.
IPC-HDBK-001, a companion document to this specifica-
CLASS 2 Dedicated Service Electronic Products tion, contains valuable explanatory and tutorial information
Includes products where continued performance and compiled by IPC Technical Committees that is relative to
extended life is required, and for which uninterrupted ser- this specification. Although the Handbook is not a part of

1
IPC/EIA J-STD-001C March 2000

this specification, when there is confusion over the specifi- sequences depending on the specific company, operation,
cation verbiage, the reader is referred to the Handbook for or variable under consideration to relate process control
assistance. and capability to end product requirements.
Note: In previous revisions of this standard, the words Class 3 shall4 develop and implement a documented pro-
‘‘must’’ and ‘‘shall’’ had special meanings. In this revision cess control system. This may or may not be a ‘‘statistical
(IPC/EIA J-STD-001C), the word ‘‘shall’’ has no special process control’’ system. The use of ‘‘statistical process
meaning beyond that commonly used in other IPC stan- control’’ (SPC) is optional and should
(4) Table 11-1 #1c
dards as stated above. be based on factors such as design sta- Class 1-No Reqt
bility, lot size, production quantities, Class 2-No Reqt
1.4.1 Hardware Defects and Process Indicators Hard- and the needs of the company. Class 3-Defect
ware characteristics or conditions that do not conform to
the requirements of this specification that are detectable by 2 APPLICABLE DOCUMENTS
inspection or analysis are classified as either hardware The following documents, of the issue in effect on the date
defects or hardware process indicators. Hardware defects of invitation for bid, form a part of this specification to the
listed in the applicable text boxes shall1 be identified and extent specified herein.
shall1 be dispositioned, e.g., rework, scrap, use as is,
repair. Not all process indicators specified by this standard 2.1 Electronic Industries Alliance (EIA)1
are listed in the text boxes. Hardware process indicators
should be monitored (see 11.3) but the hardware need not EIA-557-1 Statistical Process Control Guidance for the
be dispositioned. Selection of Critical Manufacturing Operations for Use in
It is the responsibility of the user (see 3.2.10) to define Implementing an SPC System for Passive Components
unique defect categories applicable to the product. It is the
responsibility of the manufacturer (see 2.2 IPC2
(1) Requirement
3.2.3) to identify defects and process See 1.4 IPC-HDBK-001 Requirements for Soldered Electrical and
indicators that are unique to the
Electronic Assemblies Handbook
assembly.
IPC-A-36 Cleaning Alternatives Board
1.4.2 Material and Process Nonconformances Hard-
ware found to be produced using either materials or pro- IPC-T-50 Terms and Definitions for Interconnecting and
cesses that do not conform to the requirements of this stan- Packaging Electronic Circuits
dard shall2 be dispositioned when the condition is a defect
listed in the applicable text box. This disposition shall2 IPC-TR-467 Supporting Data and Numerical Examples for
address the potential effect of the nonconformance on func- ANSI/J-STD-001B (Control of Fluxes)
tional capability of the hardware such as reliability and
design life (longevity). IPC-A-610 Acceptability of Electronic Assemblies

Note: Material and process nonconformances differ from IPC-OI-645 Standard for Visual Optical Inspection Aids
hardware defects or hardware process indicators in that the
material/process nonconformances often do not result in an IPC-TM-650 Test Methods Manual
obvious change in the hardware’s 2.3.25 Detection and Measurement of Ionizable Surface
appearance but can impact the hard- (2) Table 11-1 #1a Contaminants
Class 1-Defect
ware’s performance; e.g., contami- Class 2-Defect
nated solder, incorrect solder alloy 2.3.27 Cleanliness Test Residual Rosin
Class 3-Defect
(per drawing/procedure). 2.3.28 Ionic Analysis of Circuit Boards Ion Chromatog-
raphy Method
1.5 Process Control Require- 2.3.38 Surface Organic Contamination Detection Test
ments Process control methodolo- (3) Requirement
See 1.4 2.3.39 Surface Organic Contamination Identification
gies shall3 be used (see 11.3) in the
Test (Infrared Analytical Method)
planning, implementation and evaluation of the manufac-
turing processes used to produce soldered electrical and 2.4.22 Bow and Twist
electronic assemblies. The philosophy, implementation 2.6.3 Moisture and Insulation Resistance, Rigid,
strategies, tools and techniques may be applied in different Rigid/Flex and Flex Printed Wiring Boards

1. EIA, 2500 Wilson Blvd., Arlington, VA 22201-3834


2. IPC, 2215 Sanders Road, Northbrook, IL 60062

2
March 2000 IPC/EIA J-STD-001C

2.6.3.3 Moisture and Surface Insulation Resistance, ANSI/ESD-S-20.20 Protection of Electrical and Electronic
Fluxes Parts, Assemblies and Equipment

IPC-SM-817 General Requirements for Dielectric Surface 3 GENERAL REQUIREMENTS


Mounting Adhesives The soldering operations, equipment, and conditions
described in this document are based on electrical/
IPC-CC-830 Qualification and Performance of Electrical
electronic circuits designed and fabricated in accordance
Insulating Compound for Printed Board Assemblies
with the specifications listed in Table 3-1.
IPC-2221 Generic Standard on PWB Design
3.1 Order of Precedence The contract always takes pre-
IPC-2222 Sectional Standard on Rigid PWB Design cedence over this standard, referenced standards and draw-
ings. In the event of a conflict between the text of this
IPC-2223 Sectional Design Standard for Flexible Printed standard and the applicable documents cited herein, the
Boards text of this standard takes precedence.
IPC-6011 Generic Performance Specification of Printed Table 3-1 Design and Fabrication Specification
Boards Design Fabrication
Board Type Specification Specification
IPC-6012A Qualification and Performance Specification Generic Requirements IPC-2221 IPC-6011
for Rigid Printed Boards Rigid Printed Boards IPC-2222 IPC-6012
IPC-6013 Qualification and Performance for Flexible Flexible Circuits IPC-2223 IPC-6013
Printed Boards Rigid Flex Board IPC-2223 IPC-6013

IPC-9191 General Guidelines for Implementation of Sta- 3.1.1 Conflict In the event of conflict between the
tistical Process Control (SPC) requirements of this standard and the applicable assembly
drawing(s)/documentation, the applicable user approved
IPC-9201 Surface Insulation Resistance Handbook
assembly drawing(s)/documentation shall1 govern. In the
2.3 Joint Industry Standards2 event of conflict between the requirements of this standard
and an assembly drawing(s)/docu-
(1) Requirement
IPC/EIA J-STD-002 Solderability Tests for Component mentation that has not been approved, See 1.4
Leads, Terminations, Lugs, Terminals and Wires this standard shall1 govern.

J-STD-003 Solderability Tests for Printed Boards When IPC/EIA J-STD-001 is cited or required by contract,
the requirements of IPC-A-610 do not apply unless sepa-
J-STD-004 Requirements for Soldering Fluxes rately or specifically required. When IPC-A-610 or other
related documents are cited along with IPC/EIA J-STD-
J-STD-005 Requirements for Soldering Paste
001, the order of precedence is to be defined in the pro-
J-STD-006 Requirements for Electronic Grade Solder curement documents.
Alloys and Fluxed and Non-Fluxed Solid Solders for Elec-
3.1.2 Specialized Processes and Technologies Mount-
tronic Soldering Applications
ing and soldering requirements for specialized processes
IPC/JEDEC J-STD-020 Moisture/Reflow Sensitivity Clas- and/or technologies not specified
(2) Requirement
sification for Plastic Integrated Circuit Surface Mount herein shall2 be performed in accor- See 1.4
Devices dance with documented procedures
which are available for review.
IPC/JEDEC J-STD-033 Standard for Handling, Packing,
Shipping and Use of Moisture/Reflow Sensitive Surface 3.2 Terms and Definitions Other than those terms listed
Mount Devices below, the definitions of terms used in this standard are in
accordance with IPC-T-50.
2.4 ASTM3
3.2.1 Defect A nonconformance to the requirements of
ASTM E29 Standard Practice for Using Significant Digits this standard (listed in or referenced by Table 11-1) or other
in Test Data to Determine Conformance with Specifications risk factors as identified by the manufacturer. A process
and/or material nonconformance that could result in a
2.5 Electrostatic Discharge Association4 reduction of functional capability, design life or reliability.

3. ASTM, 100 Barr Harbor Drive, West Conshohocken, PA 19428


4. ESD Association, 7900 Turin Road, Bldg. 3, Ste. 2, Rome, NY 13440

3
IPC/EIA J-STD-001C March 2000

3.2.2 Disposition The determination of how defects ing to the applicable job functions being performed, work
should be treated. Dispositions include, but are not limited experience, testing to the requirements of this standard,
to, rework, use as is, scrap or repair. and/or results of periodic reviews of proficiency. Super-
vised on-the-job training is acceptable until proficiency is
3.2.3 Manufacturer (Assembler) The individual, organi- demonstrated.
zation, or company responsible for the assembly process
and verification operations necessary to ensure full compli- 3.5 Electrostatic Discharge (ESD) If any ESD suscep-
ance of assemblies to this standard.
tible devices are employed, the manufacturer shall3 estab-
lish and implement an ESD control program in accordance
3.2.4 Objective Evidence Documentation in the form of with ANSI/ESD-20.20 or as otherwise
hard copy, computer data, video, or other media. (3) Table 11-1 #1a
specified. Analysis and documentation Class 1-Defect
necessary for an effective program Class 2-Defect
3.2.5 Process Indicator A detectable anomaly, other shall3 be available for review. Class 3-Defect
than a defect, that is reflective of material, equipment, per-
sonnel, process and/or workmanship variations.
3.6 Facilities Cleanliness and ambient environments in
all work areas shall4 be maintained at levels that prevent
3.2.6 Proficiency The capability to perform tasks in
contamination or deterioration of sol-
accordance with the requirements and verification proce- (4) Table 11-1 #1a
dering tools, materials, and surfaces to Class 1-Defect
dures detailed in this standard.
be soldered. Eating, drinking, and/or Class 2-Defect
use of tobacco products shall4 be pro- Class 3-Defect
3.2.7 Solder Destination Side The solder destination
hibited in the work area.
side is that side of the printed wiring board (PWB) that the
solder flows toward.
3.6.1 Environmental Controls The soldering facility
3.2.8 Solder Source Side The solder source side is the should be enclosed, temperature and humidity controlled,
side of the PWB to which solder is applied. and maintained at a positive pressure.

3.2.9 Supplier The individual, organization or company 3.6.2 Temperature and Humidity When humidity
which provides the manufacturer (assembler) components decreases to a level of 30% or lower, the manufacturer
(electronic, electromechanical, mechanical, printed boards, shall 5 verify that electrostatic discharge control is
etc.) and/or materials (solder, flux, cleaning agents, etc.). adequate, and that the range of humidity in the assembly
area is sufficient to allow soldering and assembly materials
3.2.10 User The individual, organization, company or to function correctly in the process, based on vendor rec-
agency responsible for the procurement of electrical/ ommendations or documented evidence of process perfor-
electronic hardware, and having the authority to define the mance. For operator comfort and solderability mainte-
class of equipment and any variation or restrictions to the nance, the temperature should be maintained between 18°C
requirements of this standard (i.e., the originator/custodian [64.4°F] and 30°C [80°F] and the rela-
(5) Table 11-1 #1b
of the contract detailing these requirements). tive humidity should not exceed 70%. Class 1-No Reqt
For process control, more restrictive Class 2-Defect
3.3 Requirements Flowdown When this standard is con- temperature and humidity limits may Class 3-Defect
tractually required, the applicable requirements of this stan- be required.
dard shall1 be imposed on all applicable subcontracts and
purchase orders. Unless otherwise specified, the require-
3.6.3 Lighting Illumination at the surface of work sta-
ments of this standard are not imposed
(1) Requirement tions should be 1000 lm/m2 minimum.
on the procurement of off-the-shelf See 1.4
(catalog) assemblies or subassemblies
(see 13.3). 3.6.4 Field Assembly Operations In field assembly
operations on Class 3 products where the controlled envi-
3.4 Personnel Proficiency All instructors, operators, and ronmental conditions required by this standard cannot be
inspection personnel shall2 be proficient in the tasks to be effectively achieved, precautions shall6 be taken to maxi-
performed. Objective evidence of that mize the quality of solder connections
(2) Table 11-1 #1b (6) Table 11-1 #1c
proficiency shall2 be maintained and Class 1-No Reqt and minimize the effects of the uncon- Class 1-No Reqt
be available for review. Objective evi- Class 2-Defect trolled environment on the operation Class 2-No Reqt
dence should include records of train- Class 3-Defect being performed on the hardware. Class 3-Defect

4
March 2000 IPC/EIA J-STD-001C

3.6.5 Moisture Sensitive Components Moisture sensi- activity level L1 shall not7 be used for no-clean solder-
tive components (as classified by IPC/JEDEC J-STD-020 ing.
or other documented procedure) shall1 b. When other activity levels or flux materials are used,
(1) Table 11-1 #1a
be handled in a manner consistent Class 1-Defect data demonstrating compliance with testing of Appen-
with IPC/JEDEC J-STD-033 or other Class 2-Defect dix B shall7 be available for review.
documented procedure. Class 3-Defect
Note: Flux or solder paste soldering process combina-
3.7 Soldering Tools and Equipment Tools and equip-
tions previously tested or qualified in accordance with
ment used shall2 be selected and maintained such that no other specifications do not require additional testing.
damage or degradation that would be detrimental to the c. Type H or M fluxes may be used
(7) Table 11-1 #1c
designed function of parts or assemblies result from their only for tinning of terminals, solid Class 1-No Reqt
use. Soldering irons, equipment, and systems shall2 be cho- wire and sealed components when Class 2-No Reqt
sen and employed to provide temperature control and iso- performed as part of an integrated Class 3-Defect

lation from electrical overstress or ESD (see 3.5). A tool fluxing, soldering, cleaning, and
used to cut leads shall not2 impart cleanliness test system.
(2) Table 11-1 #1a
shock that damages a component lead Class 1-Defect
seal or internal connection. See Class 2-Defect 4.3 Solder Paste Solder paste shall
8
be in accordance
Appendix A for guidelines on tool Class 3-Defect
with J-STD-005 or equivalent. Solder
selection and maintenance. (8) Table 11-1 #1a
paste shall8 also meet the require- Class 1-Defect
ments of 4.1 and 4.2. Class 2-Defect
4 MATERIALS Class 3-Defect
The materials and processes used to assemble/manufacture
4.4 Solder Preforms Solder pre-
electronic assemblies shall3 be selected such that their (9) Table 11-1 #1a
forms shall9 meet the requirements of Class 1-Defect
combinations produce products acceptable to this standard.
4.1 and 4.2. Class 2-Defect
Objective evidence of this compatibility shall4 be main- Class 3-Defect
tained and available for review. When major elements of
the proven processes are changed, (e.g., flux, solder paste, 4.5 Adhesives Electrically nonconductive adhesive
cleaning media or system, solder alloy or soldering system) materials used for attachment of surface mounted compo-
validation of the acceptability of the change(s) may be per- nents should meet the requirements of IPC-SM-817 or as
formed and documented in accordance otherwise specified.
(3) Table 11-1 #1a
with Appendix B. These process Class 1-Defect
changes can involve a change in one Class 2-Defect 4.6 Chemical Strippers Chemical
(10) Table 11-1 #1a
of the process steps. They can also Class 3-Defect solutions, pastes, and creams used to Class 1-Defect
pertain to a change in bare board sup- (4) Requirement strip solid wires shall not10 cause deg- Class 2-Defect
plier, solder resist or metallization. See 1.4 radation to the wire. Class 3-Defect

5
4.1 Solder Solder alloys shall be in accordance with 4.7 Heat Shrinkable Soldering Devices
J-STD-006 or equivalent. Solder alloys other than Sn60A,
For Class 3:
Pb36B, and Sn63A which provide the service life, perfor-
mance and reliability required of the product may be used a. Heat shrinkable soldering devices shall11 be self-
if all other conditions of this standard are met and objec- sealing and encapsulate the solder connection. These
tive evidence of such is available for self-sealing devices are exempt from the cleaning
(5) Table 11-1 #1a
review. Flux that is part of flux-cored requirements of 8.1.2.
Class 1-Defect
solder wire shall5 meet the require- Class 2-Defect b. Heat shrinkable soldering devices
(11) Table 11-1 #1c
ments of 4.2. Flux percentage is Class 3-Defect shall11 be installed in accordance Class 1-No Reqt
optional. with the requirements of the Class 2-No Reqt
device manufacturer. Class 3-Defect
4.2 Flux Flux shall6 be in accor-
(6) Table 11-1 #1a
dance with J-STD-004. Class 1-Defect 5 COMPONENTS
Class 2-Defect
For Class 3: Class 3-Defect Components (e.g., electronic devices, mechanical parts,
a. Flux shall7 conform to flux activ- (7) Table 11-1 #1c
printed boards) selected for assembly shall12 be compatible
ity levels L0 and L1 of flux mate- Class 1-No Reqt with all materials and processes used
(12) Requirement
rials rosin (RO), resin (RE), or Class 2-No Reqt to manufacture the assembly/product See 1.4
organic (OR), except organic flux Class 3-Defect (see 4 Materials).

5
IPC/EIA J-STD-001C March 2000

5.1 Solder Terminals Terminals Table 5-1 Solder Limits1 for Tin/Lead Alloys
1 (1) Table 11-1 #2
and solder cups shall not be modified Class 1-No Reqt (Sn60A, Sn63A, or Pb36B)
to accept oversize conductors. Class 2-Defect Maximum Contaminant Limit (%)2
Class 3-Defect
Preconditioning Assembly
(Lead/Wire Soldering (Pot,
Contaminant Tinning) Wave, Etc.)
5.2 Solderability Electronic/mechanical components and
Copper 0.750 0.300
wires to be soldered shall2 meet the requirements of
Gold 0.500 0.200
J-STD-002 or equivalent, and printed boards shall2 meet
the requirements of J-STD-003 or equivalent. When a pre- Cadmium 0.010 0.005
tinning and inspection operation is Zinc 0.008 0.005
(2) Table 11-1 #1a
performed as part of the documented Class 1-Defect
Aluminum 0.008 0.006
assembly process, that operation may Class 2-Defect Antimony 0.500 0.500
be used in lieu of solderability testing Class 3-Defect Iron 0.020 0.020
(see 5.4). Arsenic 0.030 0.030
Bismuth 0.250 0.250
3
5.2.1 Solderability Testing of Ceramic Boards Prior to Silver 0.750 0.100
acceptance for storage or use, the manufacturer shall3 Nickel 0.025 0.010
ensure that the metallic elements of Notes:
(3) Table 11-1 #1a 1. The tin content of the solder bath shall be within ± 1.5% of nominal for the
ceramic printed boards meet the sol- Class 1-Defect solder specified and tested at the same frequency as testing for copper/
derability requirements of J-STD-003 Class 2-Defect gold contamination. The balance of the bath shall be lead or the items
or equivalent. Class 3-Defect listed above.
2. The total copper, gold, cadmium, zinc and aluminum contaminants shall
not exceed 0.4% for assembly soldering.
3. Not applicable for Pb36B: limits to be 1.75% to 2.25%.
5.3 Solder Purity Maintenance Solder used for precon-
ditioning, gold removal, tinning of parts, and machine sol- 5.4.1 Gold Removal Gold shall6 be removed:
dering shall4 be analyzed, replaced or replenished at a fre- • From at least 95% of the surface to
(6) Table 11-1 #3
quency to ensure compliance with the limits specified in be soldered of the through-hole com- Class 1-No Reqt
Table 5-1. ponent leads with 2.5 µm [0.0984 Class 2-Proc Ind
mil] or more of gold. Class 3-Defect
Solder alloys other than Sn60A, Sn63A, or Pb36B tin/lead
• From 95% of all surfaces of surface mount components to
solders shall4 be in compliance with equivalent docu-
mented limits. be soldered regardless of gold thickness.
• From the surface of solder terminals plated with 2.5 µm
If contamination exceeds the limits, intervals between the [0.0984 mil] or more of gold.
analyses, replacement or replenishment shall4 be short-
ened. The frequency of analysis should be determined on A double tinning process or dynamic solder wave may be
the basis of historical data, or monthly analyses. used for gold removal.

Records containing the results of all analyses and solder These requirements may be eliminated if there is docu-
bath usage (e.g., total time in use, mented objective evidence available for review that there
(4) Table 11-1 #1b
amount of replacement solder, or area Class 1-No Reqt are no gold related solder embrittlement problems associ-
throughput) shall4 be maintained for a Class 2-Defect ated with the soldering process being used.
minimum of one year for each Class 3-Defect
process/system. 5.4.2 Rework of Nonsolderable Parts A component
lead, termination, or board not conforming to the solder-
5.4 Solderability Maintenance The manufacturer shall5 ability requirements of 5.2 may be reworked (e.g., by dip-
ensure that all components, parts, leads, wiring, terminals, ping in hot solder) before soldering.
and printed boards that have met the requirements of 5.2
are solderable at the start of hand and/or machine soldering During tinning of leads, heat sinks shall7 be attached to the
operations. The manufacturer should leads of components that are heat sen-
(7) Table 11-1 #1a
establish procedures to minimize part
(5) Table 11-1 #1a sitive. A reworked part shall7 conform Class 1-Defect
Class 1-Defect
solderability degradation. (See IPC- Class 2-Defect
to the requirements of 5.2, less steam Class 2-Defect
Class 3-Defect aging. Class 3-Defect
HDBK-001.)

6
March 2000 IPC/EIA J-STD-001C

6 ASSEMBLY PROCESSES nents shall not5 be mounted if the part or component lead
6.1 General Part Mounting Requirements When design
has nicks or deformation exceeding 10% of the diameter,
restrictions mandate mounting components incapable of width, or thickness of the lead except as allowed for flat-
withstanding soldering temperatures incident to a particular tened leads (see 6.1.2.6). Exposed
(5) Table 11-1 #4a
process, such components shall1 be mounted and soldered basis metal is acceptable if deforma- Class 1-Defect
to the assembly as a separate operation. Parts shall2 be tion does not exceed 10% of the diam- Class 2-Defect
eter, width, or thickness of the lead. Class 3-Defect
mounted with sufficient clearances between the body and
the PWB to assure adequate cleaning and cleanliness test-
6.1.2.2 Surface Mount Device Lead Forming Leads
ing (if required). Assemblies should be cleaned after each
shall6 be formed in such a manner that the lead-to-body
soldering operation so that subsequent placement and sol-
seal is not damaged or degraded. They may be soldered
dering operations are not impaired by contamination (see 8,
into place by subsequent processes to not impart residual
Cleanliness Requirements).
stresses decreasing reliability. See Figure 6-1. When lead
On assemblies using mixed component mounting technol- forming is required during the assembly process leads
ogy, through-hole components should be mounted on one shall7 be formed such that there is an available minimum
side of the printed board. Surface mounted components lead length for contact to the solder pad of:
may be mounted on either or both a. One lead width for flat leads.
(1) Requirement
sides of the assembly. See 1.4 b. Two lead widths for coined leads.
Where component marking visibility (2) Table 11-1 #1a c. Two lead diameters for round leads.
and legibility is desired the contract or Class 1-Defect
drawing shall1 so state. Parts should Class 2-Defect The leads of surface mounted components shall7 be formed
Class 3-Defect to their final configuration prior to sol-
be mounted such that part markings (6) Table 11-1 #4a
and reference designators are visible. dering. Class 1-Defect
Class 2-Defect
Note: Where severe loading condi- Class 3-Defect
6.1.1 Component and Seal Dam-
age Part bodies and lead seals shall
(3) Table 11-1 #4a tions exist such as Coefficient of Ther-
Class 1-Defect (7) Table 11-1 #1a
3
not be degraded below the part speci- mal Expansion (CTE) mismatches or
Class 2-Defect Class 1-Defect
fication requirements. Class 3-Defect
severe operational environments, extra Class 2-Defect
consideration should be given to the Class 3-Defect
6.1.2 Lead Forming Part and component leads should be minimum available contact length.
preformed to the final configuration excluding the final
clinch or retention bend before assem- 6.1.2.3 Flat Pack Parallelism Leads on opposite sides of
(4) Table 11-1 #1a surface mounted flatpacks should be formed such that the
bly or installation. The lead forming Class 1-Defect
4
process shall not damage connec- Class 2-Defect nonparallelism between the base surface of the component
tions internal to components. Class 3-Defect and the surface of the printed board (i.e., component cant)
is minimal. Component cant is permissible, however, the
6.1.2.1 Lead Deformation Limits Whether leads are final configuration should not exceed the clearance limit of
formed manually or by machine or die, parts or compo- 2.0 mm [0.0787 in] (see Figure 6-1).

2.0 mm [0.0787 in] max

c.
a. b.
IPC-001c-6-001

Figure 6-1 Surface Mount Device Lead Forming


1. No bend into the seal

7
IPC/EIA J-STD-001C March 2000

6.1.2.4 Surface Mount Device Lead The number of damaged (nicked or


(1) Table 11-1 #4a (7) Table 11-1 #5a
Bends Bends shall not1 extend into broken) strands in a single wire shall
(3) Table 11-1 #1a Class 1-Defect
the seal. Class 1-Defect not7 exceed the limits given in Table Class 2-Defect

The lead-bend radius shall2 be ≥ 1T


Class 2-Defect 6-1. There shall9 be no birdcaging Class 3-Defect
Class 3-Defect
(T = nominal lead thickness/diameter) allowed beyond the outside diameter (9) Table 11-1 #5b
(see Figure 6-1).
(3) Table 11-1 #4b of the insulation. (For recommenda- Class 1-Accept
Class 1-Accept tions on wires used in high voltage Class 2-Proc Ind
Class 2-Proc Ind Class 3-Defect
Leads shall 3 be supported during applications see 13.2.3.)
Class 3-Defect
forming to protect the lead-to-body
seal.
Table 6-1 Damaged Strand Limits
Maximum Allowable
6.1.2.5 Surface Mount Device Lead Deformation Lead Number of Strands Damaged Strands
deformation (unintentional bending) may be allowed pro- Fewer than 7 0
vided: 7-15 1
a. There shall4 be no evidence of a short or potential short 16-18 2
existing. 19-25 3
5
b. The lead-to-body seal or weld shall not be damaged 26-36 4
by the deformation. 37-40 5
4 41 or more 6
c. The minimum electrical clearance shall not be vio-
lated.
d. The top of the lead should not extend beyond the top 6.1.3.1 Tinning of Stranded Wire Wicking of solder
of the component body, except for under the insulation should be minimized to maintain wire
(4) Table 11-1 #9
preformed stress loops. (5) Table 11-1 #4a
flexibility. For Classes 2 and 3:
e. If present on ends, toe curl should Class 1-Defect a. Portions of stranded wire that will be soldered shall10
Class 2-Defect
not exceed two times the thickness Class 3-Defect
be tinned prior to mounting.
of the lead. b. The solder shall10 wet the tinned (10) Table 11-1 #1b
Class 1-No Reqt
portion of the wire and should Class 2-Defect
6.1.2.6 Flattened Leads Components with axial leads of penetrate to the inner strands of Class 3-Defect
round cross-section may be flattened (coined) for positive the wire.
seating in surface mounting. If flattening is used, the flat-
tened thickness shall not6 be less than 6.1.4 Hole Obstruction Parts and components shall11 be
(6) Table 11-1 #1c
40% of the original diameter. Flat- Class 1-No Reqt mounted such that they do not
tened areas of leads are excluded from Class 2-No Reqt (11) Table 11-1 #6
obstruct solder flow onto the solder Class 1-Accept
the 10% deformation requirement of Class 3-Defect
destination side lands of plated- Class 2-Proc Ind
6.1.2.1. through holes (PTHs) required to be Class 3-Defect
soldered. (See Figure 6-2 and 9.2.4.3.)
6.1.2.7 Dual-in-line Packages (DIPs) Dual-in-line pack-
ages may be surface mounted provided the leads are con- 6.1.5 Metal-Cased Component
(12) Table 11-1 #9
figured to meet the mounting requirements for surface Isolation Metal-cased components Class 1-Defect
12
mounted leaded parts. shall be isolated from adjacent elec- Class 2-Defect
trically conductive elements. Class 3-Defect

6.1.3 Wire and Cable Preparation Insulation discolora- 6.1.6 Adhesive Coverage Limits
(13) Table 11-1 #7a
tion resulting from thermal stripping is Adhesive materials, when used, shall
(7) Table 11-1 #5a Class 1-Defect
permissible, however, the insulation (8) Table 11-1 #1a not13 preclude the formation of an Class 2-Defect
shall not7 be charred. Chemical insu- Class 1-Defect acceptable solder connection. Adhe- Class 3-Defect
lation stripping agents shall8 be used Class 2-Defect sive materials extending from under (14) Table 11-1 #7b
Class 3-Defect
only for solid wire and are to be neu- SMT components shall not14 be vis- Class 1-Accept
tralized or removed prior to soldering. ible in the termination area. Class 2-Proc Ind
Class 3-Defect

8
March 2000 IPC/EIA J-STD-001C

[0.0591 in] beyond the surface of the


(4) Table 11-1 #9
land. Minimum electrical clearance Class 1-Defect
3 shall4 be maintained and the flare Class 2-Defect
diameter should not exceed the diam- Class 3-Defect
1 eter of the land (see Figure 6-4).
2

4
IPC-001c-6-002

Figure 6-2 Hole Obstruction (Table 11-1 #6) 1 2


1. Hard mount
IPC-001c-6-003
2. Air
3. Component body
Figure 6-3 Flange Discontinuities
4. Solder
1. Radial split (3 max)
2. Split extends into barrel
6.2 Bifurcated and Turret Terminal
(1) Table 11-1 #1c
Installation Funnel shoulder termi- Class 1-No Reqt
nals (see Figure 6-6B) shall not1 be Class 2-No Reqt
used on either mechanical or electrical Class 3-Defect
mounting.

0.4 mm
6.2.1 Shank Discontinuities The shank shall not2 have [0.0157 in] min
circumferential cracks or splits, regardless of extent. The ▼
1.5 mm



shank of the terminal shall2 be neither perforated nor split, [0.0591 in] max
35
cracked, or otherwise discontinuous to to
(2) Table 11-1 #8
the extent that oils, flux, inks, or other Class 1-Defect 120
IPC-001c-6-004
liquid substances utilized for process- Class 2-Defect
ing the printed board can be entrapped Class 3-Defect Figure 6-4 Flare Angles
within the mounting hole.
6.2.4 Terminal Mounting - Mechanical Terminals not
6.2.2 Flange Discontinuities The rolled or flared area connected to printed wiring or ground planes shall5 be of
of the flange shall3 be free of circumferential splits or the rolled flange configuration (see Figure 6-5). A printed
cracks. foil land may be used as a seating sur-
(5) Table 11-1 #1b
face for a rolled flange provided that Class 1-No Reqt
The rolled or flared area of the flange shall3 have no more the land is isolated and not connected Class 2-Defect
to active printed wiring or ground Class 3-Defect
than three radial splits or cracks provided that the splits or
cracks are separated by at least 90° and do not extend into plane.
the barrel of the terminal (see Figure 6-3).
6.2.5 Terminal Mounting - Electrical Terminals shall6
The flange shall not3 be split, cracked or otherwise discon- be mounted with flared flanges in noninterfacial PTHs pro-
tinuous to the extent that flux, oils, vided the mounting is in conjunction with a land or ground
(3) Table 11-1 #8
inks, or other liquid substances uti- Class 1-Defect
plane on the flared side as shown in Figure 6-6A. Termi-
lized for processing the printed board Class 2-Defect nals shall not6 be flared to the base material of the printed
can be entrapped within the mounting Class 3-Defect board.
hole.
Terminals may be mounted in non-
(6) Table 11-1 #1b
6.2.3 Flared Flange Angles Flared flanges should be PTHs with active circuitry on the top Class 1-No Reqt
formed to an included angle of between 35° and 120° and side and a roll flange on the back side Class 2-Defect
should extend between 0.4 mm [0.0157 in] and 1.5 mm of the board (see Figure 6-6C). Class 3-Defect

9
IPC/EIA J-STD-001C March 2000

6.3.1.3 Stress Relief Component


(6) Table 11-1 #12a
leads shall6 have stress relief. Wires Class 1-Defect
connected to terminals shall7 have Class 2-Defect
2 stress relief (see Figure 6-9). Class 3-Defect
1
(7) Table 11-1 #12c
Class 1-Accept
Class 2-Proc Ind
Class 3-Defect

3
IPC-001c-6-005

Figure 6-5 Terminal Mounting - Mechanical 2


1. Shank
1
2. Flat shoulder
3. Rolled flange

6.3 Mounting to Terminals

6.3.1 General Requirements Unless otherwise defined,


the requirements for mounting to ter- 3 4
(1) Requirement
minals applies to both wires and com- See 1.4
ponent leads. For Classes 2 and 3, the
5
wire/lead shall not1 overlap itself.

6.3.1.1 Insulation Clearance (C) The clearance between


the end of the insulation and the solder of the connection
shall not2 permit shorting between adjacent conductors.
The clearance between the end of wire insulation and the
solder of the connection shall3 be as follows (see Figure
6-7):
a. Minimum Clearance: The insula-
(2) Table 11-1 #9
tion is in contact with the solder Class 1-Defect
joint but shall not4 be covered by Class 2-Defect
solder. The contour of the wires Class 3-Defect
6
should not be obscured at the ter- (3) Requirement
mination of the insulation. See 1.4

b. Maximum Clearance: Clearance (4) Table 11-1 #10


7
shall3 be two wire diameters or Class 1-Accept
Class 2-Proc Ind
less (including insulation) or 1.5 Class 3-Defect
mm [0.0591 in], whichever is
larger. 8
IPC-001c-6-006
6.3.1.2 Service Loops Lead wires
5 (5) Table 11-1 #11
shall be dressed in the proper posi- Class 1-No Reqt Figure 6-6 Terminal Mounting - Electrical
tion with a slight loop or gradual bend 1. Flat shoulder
Class 2-Proc Ind
2. Nonfunctional land
as shown in Figure 6-8. The bend Class 3-Defect
3. Plated-through hole
shall5 be sufficient to allow at least 4. Flared flange
5. Funnel shoulder
one field repair. 6. Conductor
7. Board
8. Rolled flange

10
March 2000 IPC/EIA J-STD-001C

ronmental loading. The following addi-


(3) Table 11-1 #14
tional requirements shall3 be met: Class 1-Accept
Class 2-Proc Ind
a. The connection to the first and last Class 3-Defect
terminals meet the required wrap for
individual terminals.
b. For each intermediate turret terminal, the wire is
wrapped around or interweaves each terminal.
c. For each intermediate bifurcated terminal, the wire
passes through the slot and is in contact with the base of
the terminal or a previously installed wire.
d. For each intermediate pierced or perforated terminal, the
wire is in contact with at least two nonadjacent contact
surfaces of each intermediate terminal.

IPC-001c-6-007

Figure 6-7 Insulation Clearance (C) Measurement

1 IPC-001c-6-009
IPC-001c-6-008
Figure 6-9 Stress Relief Examples
Figure 6-8 Service Loop for Lead Wiring
1. Acceptable
2. Not acceptable (insufficient)

6.3.1.4 Orientation of Lead or Wire Wrap Leads or


wires may be wrapped clockwise or counterclockwise
(consistent with the direction of potential stress applica-
tion). Leads and wires shall1 continue the curvature of the
dress of the lead/wire and shall not1
(1) Table 11-1 #14
interfere with the wrapping of other Class 1-Accept
leads or wires on the terminal or over- Class 2-Proc Ind
lap each other. Class 3-Defect

6.3.1.5 Continuous Runs A continuous solid bus wire


may be run from terminal to terminal if three or more IPC-001c-6-010

bifurcated, turret, or pierced terminals


(2) Table 11-1 #12b Figure 6-10 Continuous Runs
are to be connected (see Figure 6-10). Class 1-Defect
A curvature shall2 be included in the Class 2-Defect
unwrapped wire portion of the jumper Class 3-Defect
to provide relief of tension from envi-

11
IPC/EIA J-STD-001C March 2000

6.3.1.6 Insulation Sleeving (Wires Soldered to Pierced, Lead and wire ends may extend beyond the base of termi-
Hook and Cup Terminals) When insulation sleeving is nals provided the minimum design electrical clearance is
installed over a wire soldered to a pierced, hook or cup ter- maintained. The attachments should be maintained such
minal, there shall1 be no damage to the sleeving that would that clearance between wires, and clearance between the
allow shorting of the wire to adjacent wires and the terminal board or panel is a minimum con-
(1) Table 11-1 #9
circuitry. Class 1-Defect sistent with the wire insulation thickness.
The sleeving shall2 fit snugly and Class 2-Defect
Class 3-Defect For side route connections:
extend over the insulation a minimum
of 6.0 mm [0.236 in], or two wire (2) Table 11-1 #13 a. Bifurcated terminals shall7 have a 90° minimum wrap
diameters, whichever is greater, and Class 1-Accept (see Figure 6-12A).
Class 2-Defect
extend over the terminal beyond the b. The wire or component lead shall7 be dressed through
Class 3-Defect
solder termination. the slot and wrapped to either post of the terminal (see
Figure 6-12B) assuring positive contact of the wire
6.3.1.7 Lead and Wire End Extensions The lead and with at least one corner of the post.
wire ends should not extend beyond c. Wires or leads for user approved designs which incor-
(3) Table 11-1 #9
the terminal more than one (1) lead Class 1-Defect porate staking/bonding of wires or component bodies,
diameter. Minimum electrical clear- Class 2-Defect
or solid wires or leads 0.75 mm [0.0295 in] or greater
ance requirements shall3 be met. Class 3-Defect
diameter, need not be wrapped but shall7 extend
beyond the post of the terminal
6.3.2 Bifurcated (Slotted) and Turret Terminals For (7) Table 11-1 #14
and be in contact with the base of
Class 3, wires shall4 be attached to the Class 1-Accept
(4) Requirement the terminal or the previously Class 2-Proc Ind
base of the terminal or in contact with See 1.4 Class 3-Defect
installed wire. (See Figure 6-12C)
the previously installed wire.

6.3.2.1 Wire and Lead Wrap-Around - Turret and 6.3.2.3 Top and Bottom Route Connections Bottom
Straight Pin Leads and wires should be mechanically routed wires shall8 be wrapped on the terminal base or post
secured to their terminals before soldering. Such mechani- with a minimum of 90° bend (see Figure 6-13).
cal securing should prevent movement between the parts of Wire insulation shall not8 enter the base of post of termi-
the connection during the soldering nal. When top routed wires to bifurcated terminals are
(5) Table 11-1 #14
operation. Leads and wires shall5 be Class 1-Accept required by the design, the wire shall8 feed straight into the
wrapped around turret and straight pin Class 2-Proc Ind terminal between the tines. Any
terminals for a minimum of 180° (see Class 3-Defect (8) Table 11-1 #14
remaining space between the tines Class 1-Accept
Figure 6-11). shall8 be filled by having the wire Class 2-Proc Ind
bent double or by using a separate Class 3-Defect
filler wire (see Figure 6-13).
1
6.3.3 Hook Terminals
2 a. Wire(s) shall9 be wrapped 180° minimum.
b. Wire(s) shall9 be no closer than one wire diameter to
3
the end of the hook.
IPC-001c-6-011
c. Wire(s) should be within the arc of the hook. See Fig-
Figure 6-11 Wire and Lead Wrap Around ure 6-14.
1. Upper guide slot
2. Lower guide slot d. For components using hook termi-
(9) Table 11-1 #14
3. Base nations, wires shall9 be spaced a Class 1-Accept
minimum of two lead diameters or Class 2-Proc Ind
6.3.2.1.1 Termination of Small Gauge Wire (AWG 30 and 1.0 mm [0.039 in], whichever is Class 3-Defect
Smaller) As an exception to the requirements of 6.3.2.1, greater, from the base of the
wire size AWG 30 or smaller shall6 be terminal.
(6) Table 11-1 #14
wrapped at least once and should be Class 1-Accept
wrapped no more than three complete Class 2-Proc Ind 6.3.4 Pierced or Perforated Termi-
(10) Table 11-1 #14
turns around the terminal. Class 3-Defect nals For wiring to a single terminal,
10
Class 1-Accept
the wire(s) shall pass through the Class 2-Proc Ind
6.3.2.2 Side Route Connection - Bifurcated Terminals eye and be wrapped around the termi- Class 3-Defect
When practical, except for bus wire, wires should be nal a minimum of 90° (see Figure
placed in ascending order with the largest on the bottom. 6-15).

12
March 2000 IPC/EIA J-STD-001C

For user approved designs which


(1) Table 11-1 #14
incorporate staking/bonding of wires, Class 1-Accept
the wire(s) attached to pierced termi- Class 2-Proc Ind
nals shall1 contact at least two sur- Class 3-Defect
faces of the terminal.

IPC-001c-6-013

Figure 6-13 Top and Bottom Route Terminal Connection

IPC-001c-6-012

Figure 6-12 Side Route Connections and Wrap on


Bifurcated Terminal
1. Base Figure 6-14 Hook Terminal Connections
2. Terminal post
3. Lead

6.3.5 Cup and Hollow Cylindrical


(2) Table 11-1 #5b
Terminal Soldering The lay of the
Class 1-Accept
strands of any wire shall2 meet the Class 2-Proc Ind
requirements of 6.1.3. Strands shall Class 3-Defect
not3 be removed for the purpose of (3) Table 11-1 #1b
installation. The wire or wires shall4 Class 1-No Reqt
be inserted for the full depth of the Class 2-Defect
Class 3-Defect
cup.
(4) Table 11-1 #1c
Class 1-No Reqt
Class 2-No Reqt
Class 3-Defect

Figure 6-15 Pierced or Perforated Terminal Wire Wrap

13
IPC/EIA J-STD-001C March 2000

6.4 Surface Mounting of Components 6.5 Through-Hole Mounting

6.4.1 Parts Not Configured for Surface Mounting Com- 6.5.1 Lead Forming Requirements Leads shall6 extend
ponents of the through-hole configuration (e.g., transistors, at least one lead diameter or thickness
metal power packages, and other non- (6) Table 11-1 #4b
(1) Table 11-1 #1a but not less than 0.8 mm [0.031 in] Class 1-Accept
axial leaded components), shall not1 Class 1-Defect from the body or weld before the start Class 2-Proc Ind
be surface mounted unless the leads Class 2-Defect of the bend radius (see Figure 6-16). Class 3-Defect
are formed to meet the surface mount Class 3-Defect
device lead forming requirements. The lead bend radius shall6 be in accordance with Table
6-2.
6.4.2 Small Devices with Two Terminations

3
6.4.2.1 Mounting of Parts on Parts (Stacking) When L
part stacking is permitted by the assembly drawing(s)/
documentation, parts shall not2 vio- 4
(2) Table 11-1 #9
late minimum electrical clearance Class 1-Defect
between other parts or components Class 2-Defect 1
such as terminals or other chip com- Class 3-Defect µF V µF V
L
ponents.

6.4.2.2 Devices with External Deposited Elements For


Class 2 and 3, components with electrical elements depos-
L
ited on an external surface (such as
(3) Requirement
chip resistors) shall3 be mounted with See 1.4
2
that surface away from the printed 5
board or substrate. IPC-001c-6-016

Figure 6-16 Lead Bends


6.4.3 Leaded Component Body Positioning The maxi- 1. Standard bend
mum clearance between the bottom of a leaded component 2. Welded bend
3. Straight for 1 diameter/lead thickness, but not less than
body and the printed wiring surface should be 2.0 mm 0.8 mm [0.031 in]
[0.0787 in]. Parts insulated from circuitry or over surfaces 4. Diameter/Thickness
5. Weld
without exposed circuitry may be mounted flush. Uninsu-
lated parts mounted over exposed circuitry shall4 have
Table 6-2 Lead Bend Radius
their leads formed to provide a mini-
(4) Table 11-1 #1c
mum of 0.25 mm [0.00984 in] Lead diameter Minimum Bend Radius (R)
Class 1-No Reqt
between the bottom of the component Class 2-No Reqt Less than to 0.8 mm 1 diameter/thickness
body and the exposed circuitry. Class 3-Defect [0.031 in]
From 0.8 to 1.2 mm 1.5 diameters/thickness
[0.031 to 0.047 in]
6.4.3.1 Axial-Leaded Components The body of a sur-
Greater than 1.2 mm 2 diameters/thickness
face mounted axial-leaded component should not be spaced [0.047 in]
above the surface of the printed board more than 2.0 mm
[0.0787 in], unless the component is mechanically attached Note: Measurement is made from the end of the part. (The
to the substrate by adhesive or other mechanical means end of the part is defined to include any coating, solder
(see Figure 6-1).
seal, solder or weld bead, or any other extension.)

6.4.4 Parts Configured for Butt Lead Mounting Parts


may be configured for surface butt mounting on Class 1 6.5.2 Lead Termination Requirements Component
and 2 products. Butt mounting shall not5 be permitted on leads in through-hole connections may be terminated using
Class 3 products. Components designed for pin-in-hole a straight through, partially clinched, or clinched configu-
application and modified for butt joint ration. The clinch should be sufficient to provide mechani-
(5) Table 11-1 #1c
attachment, or stiff-leaded dual-in-line Class 1-No Reqt
cal restraint during the soldering process. The orientation
packages (e.g., alloy 42, brazed or Class 2-No Reqt of the clinch relative to any conductor is optional. DIP
tempered leads, etc.) may be butt Class 3-Defect leads should be partially bent outward from the longitudi-
mounted. nal axis of the body.

14
March 2000 IPC/EIA J-STD-001C

Tempered leads shall not1 be termi- move within the solder paste such that the final soldered
(1) Table 11-1 #15a
nated with a (full) clinched configura- (2) Table 11-1 #9 connection results in part misalignment exceeding the
tion. Class 1-Defect requirements of Section 9. After sol-
(8) Table 11-1 #1a
Class 2-Defect dering operations have been per-
Lead protrusion shall not2 violate Class 3-Defect
Class 1-Defect
formed, the assembly shall8 be suffi- Class 2-Defect
minimum electrical clearance require- Class 3-Defect
(3) Table 11-1 #16a ciently cooled so the solder is
ments. Lead protrusion shall3 be in Class 1-No Reqt solidified prior to further handling.
accordance with Table 6-3. Class 2-Proc Ind
Class 3-Defect
7.1.2 Preheating For other than hand soldering (see
Table 6-3 Lead Protrusion 7.2), assemblies should be preheated to minimize the pres-
Class 1 Class 2 Class 3 ence of volatile solvents prior to exposure to molten solder
(L) min1 End is discernible to reduce thermal shock to boards and components, to
(L) max2 No danger of 2.5 mm 1.5 mm improve solder flow, and to reduce the
(9) Table 11-1 #1a
shorts [0.0984 in] [0.0591 in] solder dwell time. The preheat tem- Class 1-Defect
Note: perature exposure shall not9 degrade Class 2-Defect
1. For plated-through hole boards greater than 2.3 mm [0.0906 in] thick, printed boards, components, or solder- Class 3-Defect
components with pre-established lead lengths, (DIPs, sockets), lead
protrusion may not be visible. ing performance.
2. Lead protrusion should not exceed 2.5 mm [0.0984 in] if there is a
possibility of violation of minimum electrical spacing, damage to soldered
7.1.3 Hold Down of Surface Mount Leads Surface
connections due to lead deflection or penetration of static protective 10
packaging during subsequent handling or operating environments. mounted device leads shall not be held down under
stress (e.g., by probes) during solder solidification such that
6.5.2.1 Lead Termination Requirements for Unsup-
the resulting residual stresses decrease
ported Holes Lead protrusion for (10) Table 11-1 #1c
(4) Table 11-1 #16b reliability. Class 1-No Reqt
unsupported holes shall4 be 0.5 mm (5) Table 11-1 #9 Class 2-No Reqt
[0.0197 in] minimum and shall not5 Class 1-Defect The resistance reflow system shall Class 3-Defect
violate minimum electrical clearance Class 2-Defect not10 deflect the leads more than two
Class 3-Defect
requirements. As an exception to the times the lead thickness during reflow.
requirements of 6.5.2, lead termina- (6) Table 11-1 #15b
tions in unsupported holes shall6 be Class 1-No Reqt 7.1.4 Cooling Controlled cooling may be used with
Class 2-No Reqt
clinched a minimum of 45°. Class 3-Defect
documented processes.

6.5.3 Coating Meniscus Component coating meniscus 7.1.5 Lead Trimming Leads may be trimmed after sol-
7 dering provided the cutters do not damage the component
shall not be trimmed.
or solder connection due to physical shock.
Components shall7 be mounted to provide sufficient clear-
ance between the coating meniscus (on each lead) and the When lead cutting is performed after soldering, the solder
subsequent solder connection (coating terminations shall 11 either be reflowed or visually
(7) Table 11-1 #1c
meniscus may be in the hole provided Class 1-No Reqt
inspected at 10X to ensure that the original solder connec-
that the solder connection meets the Class 2-No Reqt tion has not been damaged (e.g., fractured) or deformed.
requirements of Table 9-1). Class 3-Defect
If the solder connection is reflowed this shall11 be consid-
ered part of the soldering process and shall not11 be con-
7 ASSEMBLY SOLDERING PROCESSES sidered rework. This requirement is
(11) Table 11-1 #1c
not intended to apply to components Class 1-No Reqt
7.1 General which are designed such that a portion Class 2-No Reqt
of the lead is intended to be removed Class 3-Defect
7.1.1 Handling of Parts Parts shall8 be handled in a after soldering (e.g., break-away tie
manner to preclude damage to terminations and to avoid bars).
the need for subsequent lead straightening operations. Once
parts are mounted on printed boards, the unsoldered assem- 7.1.6 Solder Wicking Solder wick-
(12) Table 11-1 #1c
bly shall8 be handled, transported (e.g., hand or conveyor) ing shall not12 extend to a portion of Class 1-No Reqt
and processed in a manner to preclude movement that the wire which is required to remain Class 2-No Reqt
would detrimentally affect formation flexible. Class 3-Defect
(8) Table 11-1 #1a
of acceptable solder connections. Class 1-Defect
When parts are mounted in solder Class 2-Defect 7.1.7 Drying/Degassing Prior to soldering, the assembly
paste, the unsoldered assembly should Class 3-Defect may be treated to reduce detrimental moisture and other
be processed so that the part does not volatiles.

15
IPC/EIA J-STD-001C March 2000

7.1.8 Holding Devices and Materials Equipment, other alloys, other temperature ranges may be required. For
devices, materials, or techniques used to handle boards or all alloys, the nominal temperature
(6) Table 11-1 #1a
retain parts and components to the printed boards through should have a tolerance of ± 5°C Class 1-Defect
any and all stages of soldering shall not1 contaminate, [9°F]. For Class 3, this tolerance shall Class 2-Defect
damage, or degrade printed boards or components. The not6 put the bath temperature outside Class 3-Defect
equipment, devices, materials or tech- the established limits.
(1) Table 11-1 #1a
niques should be adequate to maintain Class 1-Defect 7.3.2.1 Solder Bath Maintenance Solder bath purity in
component positioning and permit sol- Class 2-Defect
Class 3-Defect
machine soldering of printed board assemblies shall7 be
der flow through plated-through holes
maintained in accordance with 5.3 and the following pro-
and/or onto terminal areas.
cedures:
7.2 Manual/Hand (Nonreflow) Soldering a. Dross shall7 be removed from the solder bath in a man-
ner that assures that dross does not contact the items
7.2.1 Flux Application When an
(2) Table 11-1 #1a being soldered. Automatic or manual methods for dross
external flux is used in conjunction Class 1-Defect removal are acceptable.
with flux cored solders, the fluxes Class 2-Defect
shall2 be compatible. Class 3-Defect b. Soldering oils may be intermixed with the molten sol-
der and carried to the surface of the solder wave or
7.2.2 Solder Application Solder shall3 only be applied applied to the surface of the solder
(7) Table 11-1 #1c
to one side of a PTH. Heat may be wave or solder bath. The oil level Class 1-No Reqt
(3) Table 11-1 #1b
simultaneously applied to both sides Class 1-No Reqt should be controlled to preclude Class 2-No Reqt
of the PTH. Class 2-Defect intermix of oil in solidified solder Class 3-Defect
Class 3-Defect joints.
7.2.3 Heat Sinks When hand soldering a component 7.4 Reflow Soldering The manufacturer shall8 develop
identified as heat sensitive, a thermal shunt or heat sink and maintain operating procedures describing the reflow
shall4 be attached to the device lead soldering process and the proper operation of the equip-
(4) Table 11-1 #1a
between the area to be soldered and Class 1-Defect ment. These procedures shall8 include, as a minimum, a
the component body to minimize com- Class 2-Defect reproducible time/temperature envelope including the flux
ponent heating. Class 3-Defect
and solder paste application procedures and coverage,
drying/degassing operation (when required), preheating
7.3 Machine (Nonreflow) Soldering
operation (when required), controlled atmosphere (if used),
7.3.1 Machine Controls The manufacturer shall5 main- solder reflow operation, and a cooling
(8) Table 11-1 #1c
tain operating procedures describing the soldering process operation. These steps may be part of Class 1-No Reqt
and the proper operation of the automatic soldering an integral or in-line system or may be Class 2-No Reqt
machine and associated equipment. accomplished through a series of sepa- Class 3-Defect
rate operations.
For the soldering machine, these procedures, as a mini-
mum, shall5 define the preheat temperature, flux applica- 8 CLEANLINESS REQUIREMENTS
tion procedures and coverage, solder temperature, con- An item which is required by 8.3 to be cleaned during and
trolled atmosphere (if used), rate of travel, frequency of after soldering shall9 be cleaned per a documented process
temperature verification measurements, and frequency of to allow removal of all contaminants (especially flux resi-
solder bath analysis. due). The items cleaned shall9 be capable of meeting the
If any of the above mentioned characteristics require an cleanliness requirement as specified herein.
adjustment for a different printed wir- All items to be cleaned shall9 be
(5) Table 11-1 #1c (9) Table 11-1 #1c
ing assembly, drawing number, or Class 1-No Reqt cleaned in a manner that will prevent Class 1-No Reqt
other positive identification element, Class 2-No Reqt thermal shock and/or detrimental Class 2-No Reqt
the setting to be utilized shall5 be Class 3-Defect
intrusion of cleaning media into com- Class 3-Defect
identified. ponents that are not totally sealed.
7.3.2 Solder Bath The period of exposure of any printed 8.1 Cleaning Process Requirements
board to a solder bath shall6 be limited to a duration that
will not degrade the board or parts mounted thereon. The 8.1.1 Pre-Soldering Cleanliness Requirements The
solder bath using Sn60A, Pb36B, or cleanliness of terminals, component leads, conductors, and
(6) Table 11-1 #1a
Sn63A solder should be maintained at Class 1-Defect printed wiring surfaces shall10 be suf-
(10) Requirement
a temperature within the range of Class 2-Defect ficient to ensure solderability (see See 1.4
230°C [446°F] to 290°C [554°C]. For Class 3-Defect 5.2).

16
March 2000 IPC/EIA J-STD-001C

8.1.2 Post-Soldering Cleaning Terminations internal to 8.3 Post-Solder Cleanliness


self-sealing devices (e.g., heat shrinkable solder devices)
shall1 be exempt from the cleaning 8.3.1 Particulate Matter Assemblies shall5 be free of
(1) Requirement
requirements of this standard when the dirt, lint, solder splash, dross, wire clippings, etc. Solder
See 1.4
device encapsulates the solder connec- balls or other metal particles shall6
(5) Table 11-1 #17
tion. neither be loose (i.e., be dislodged in (6) Table 11-1 #9
the normal service environment of the Class 1-Defect
product) nor violate minimum electri- Class 2-Defect
8.1.2.1 Ultrasonic Cleaning Ultrasonic cleaning is per- cal clearance. Class 3-Defect
missible:
a. On bare boards or assemblies, provided only terminals 8.3.2 Flux Residues and Other Ionic or Organic Con-
or connectors without internal electronics are present. taminants Unless specified by the user, the manufacturer
shall7 specify a cleanliness designator that establishes the
b. On electronic assemblies with electrical components,
cleaning option and test for cleanliness in accordance with
provided the manufacturer has documentation available
8.3.2.1 and in compliance with 4 Materials. In the absence
for review showing that the use of ultrasonics does not
of a specified cleanliness designator, the designator C-22 as
damage the mechanical or electrical performance of the
described in the following paragraphs
product or components being cleaned. (7) Requirement
and the visual requirements for clean- See 1.4
liness (per 8.3.2.2) shall7 apply.
8.2 Cleanliness Verification Assemblies shall2 meet the
requirements of 8.3 for cleanliness. The following methods 8.3.2.1 Post-Soldering Cleanliness Designator The
are to be used to assess the amount of remaining particu- cleanliness designator is to be in the following form:
late or foreign matter and both flux
(2) Requirement A 2-digit (minimum) code describes the cleanliness
residues and other ionic or organic See 1.4 requirements for all assemblies covered under this stan-
contaminants.
dard. This code begins with the letter ‘‘C’’ then a dash fol-
lowed by two or more digits. The first digit represents the
8.2.1 Visual Inspection Visual inspection shall3 be used cleaning option described in 8.3.3 and the second and fol-
to assess the presence of foreign particulate matter as lowing digits indicate the requirements for cleanliness test-
required in 8.3.1, or flux and other ionic or organic residues ing described in 8.3.4.
as required in 8.3.2.
8.3.2.2 Visual Requirements Surfaces cleaned should be
When done as part of a documented process control and inspected without magnification and shall8 be free of visual
product improvement system, visual inspection may be evidence of residue or contaminants. Surfaces not cleaned
conducted on a statistical sample (see 11.2.3). may have evidence of flux residues.

When not done as part of a documented process control Note: This requirement may be elimi-
(8) Table 11-1 #17
and product improvement system, one nated when visible residue has been Class 1-Defect
(3) Requirement identified as benign through labora- Class 2-Defect
hundred percent visual inspection See 1.4
3 tory analysis or other means. Class 3-Defect
shall be performed.

8.3.3 Cleaning Option The first digit of the cleanliness


8.2.2 Testing If required in 8.3.4, periodic testing of designator defines the cleaning option. The following dig-
cleanliness of the printed wiring assemblies after final its are used to define the surfaces of the assembly that are
cleaning (e.g., the cleaning prior to conformal coating, to be cleaned:
encapsulation, or incorporation into the next higher assem-
0 = No surfaces to be cleaned
bly) shall4 be conducted on a random sample basis (see
1 = One side (solder source side) of assembly to be cleaned
11.2.3) to ensure the adequacy of the cleaning process(es).
2 = Both sides of assembly to be cleaned
If any printed wiring assembly fails, the entire lot shall4 be
evaluated and re-cleaned if necessary and a random sample 8.3.4 Test for Cleanliness The second and following
of this lot and each lot cleaned since performing the last digits of the cleanliness designator define the requirements
acceptable cleanliness test shall4 be tested. for cleanliness testing. The following digits are to be used:
The frequency of testing shall4 be a minimum of once each 0 = No test for cleanliness required
eight-hour shift unless the process 1 = Test for rosin residues required (8.3.5)
(4) Requirement
control system data supports a change See 1.4 2 = Test for ionic residues required (8.3.6 and/or 8.3.7)
in frequency. 3 = Test for surface insulation resistance (8.3.8)

17
IPC/EIA J-STD-001C March 2000

4 = Test for other surface organic contaminants (8.3.9) Organic Contamination Identification Test (Infrared Ana-
5 = Other tests as defined by user/manufacturer agreement lytical Method) shall not5 exceed the
(5) Table 11-1 #1a
maximum acceptance level estab- Class 1-Defect
8.3.5 Rosin Flux Residues When rosin flux residue test- lished by mutual agreement between Class 2-Defect
ing is required, assemblies shall1 be tested in accordance user and manufacturer. Class 3-Defect
with IPC-TM-650, Test Method 2.3.27
(1) Table 11-1 #1a
and shall1 comply with the following Class 1-Defect 9 ASSEMBLY REQUIREMENTS
requirements for the maximum allow- Class 2-Defect
able level of flux residues: Class 3-Defect
9.1 Acceptance Requirements All soldered connections
Class 1 assemblies less than 200 micrograms/cm2 shall 6 meet the applicable product class acceptance
Class 2 assemblies less than 100 micrograms/cm2 requirements of 9.2.
Class 3 assemblies less than 40 micrograms/cm2
Manufacturers shall6 perform 100% inspection unless sam-
pling inspection is defined as part of a documented process
8.3.6 Ionic Residues (Instrument Method) When ionic
control plan in accordance with 11.3.
residue (instrument method) testing is required, assemblies
shall2 be tested in accordance with IPC-TM-650, Method For Class 3:
2.3.25, Detection and Measurement of Ionizable Surface a. If defects or process indicators exceed the corrective
Contaminants. Dynamic Extraction Methods should be per- action limits specified in 9.1.1 for their respective level
formed in compliance with Test Method 2.3.25, item 5. of opportunities (9.1.2), the manufacturer shall6 initiate
Static Extraction Methods should be performed in compli- corrective action to reduce their occurrence.
ance with Test Method 2.3.25, item 6 and shall2 contain
b. For corrective action calculations, no more than one
less than 1.56 micrograms/cm2 sodium chloride (NaCl)
defect characteristic or process indicator shall6 be
equivalent ionic or ionizable flux residue. Other methods
attributed to a particular intercon-
may be used when the sensitivity of (6) Requirement
(2) Table 11-1 #1a nection site (e.g., via, lead-in-hole, See 1.4
the alternative method is shown to be Class 1-Defect lead-to-land).
equal to or better than the above meth- Class 2-Defect
ods with respect to detecting ionizable Class 3-Defect
surface contamination. 9.1.1 Corrective Action Limits
For Class 3:
Note: In comparing the sensitivity between methods, the
solvent used to extract the residue, the method used to a. Corrective action shall7 be initiated if defects listed in
present the solvent to the assembly and the method of Table 11-1 exceed the control limits established in
detecting the residue should all be considered. accordance with the documented process control plan
(see 11.3c), and
8.3.7 Ionic Residues (Manual Method) When ionic resi- b. If process control limits have not been established, cor-
due (manual method) testing is required, assemblies shall3 rective action shall7 be initiated if defects listed in
be tested in accordance with IPC-TM-650, Test Method Table 11-1 exceed 0.3% of the
(7) Requirement
2.3.25, Detection and Measurement of Ionizable Surface opportunities for their occurrence See 1.4
Contaminants. The surface contamination shall3 be less (see 9.1.2).
then 1.56 micrograms/cm 2 NaCl
(3) Table 11-1 #1a
equivalent ionic or ionizable flux resi- Class 1-Defect 9.1.2 Opportunities Determination Unless otherwise
due. Other acceptance values may be Class 2-Defect specified in the process control plan, the total number of
approved by the user for equivalent Class 3-Defect
interconnection sites is used as the measure to which the
tests. percentage of defects or process indicators is applied.
These calculations consider each surface mount termina-
8.3.8 Surface Insulation Resistance (SIR) When surface tion, each through-hole termination, and each terminal ter-
insulation resistance testing (SIR) is mination as a single opportunity in determining the total
(4) Table 11-1 #1a
required, it shall4 be performed using Class 1-Defect number of opportunities for a given printed board assem-
a documented method that includes Class 2-Defect bly.
pass/fail criteria and is available for Class 3-Defect
review. 9.2 General Assembly Require-
8 (8) Table 11-1 #18
ments All products shall meet the
Class 1-Defect
8.3.9 Other Contamination When surface organic con- requirements of the assembly Class 2-Defect
tamination testing is required, assemblies tested in accor- drawing(s)/documentation. The elec- Class 3-Defect
dance with IPC-TM-650, Test Method 2.3.39, Surface trical and mechanical integrity and the

18
March 2000 IPC/EIA J-STD-001C

reliability of all components and k. Solder on contact area of gold edge connector contact
(1) Table 11-1 #1a
assemblies shall1 be retained after Class 1-Defect lands (i.e., ‘‘gold fingers’’).
exposure to all processes employed Class 2-Defect Note: Visual aids can be found in IPC-A-610.
during manufacture and assembly Class 3-Defect
(e.g., handling, fluxing, soldering, and
9.2.1.2 Component Damage Minor surface flaws, dis-
cleaning).
coloration, coating meniscus cracks, or chips are accept-
able. However, they shall not3 expose the component sub-
9.2.1 Printed Wiring Assembly Damage strate or active element nor affect
(3) Table 11-1 #4a
structural integrity and reliability. Class 1-Defect
9.2.1.1 Printed Wiring Board Dam-
(2) Table 11-1 #19 There shall not3 be any damage to Class 2-Defect
age The following printed wiring Class 3-Defect
Class 1-Defect glass bodied components in excess of
board defects shall2 be rejected: Class 2-Defect component specification limits. Com-
Class 3-Defect
a. Blistering or delaminations that ponents shall not3 be charred.
exceed 25% of the distance
Note: Visual aids can be found in IPC-A-610.
between plated-through holes or internal conductors for
Class 1 printed wiring boards or assemblies.
b. Any evidence of blistering or delamination between 9.2.2 Markings Marking shall not 4 be deliberately
altered, obliterated, or removed by the manufacturer unless
plated-through holes or internal conductors for Class 2
required by the assembly drawing(s)/documentation. Inci-
or Class 3 printed wiring boards or assemblies other
dental or random part marking loss during normal post sol-
than flexible PWBs.
der cleaning operations does not constitute deliberate oblit-
Note: Measling is NOT the same as blistering and/or eration of the part marking. Additional markings (such as
delamination. See IPC-T-50 and IPC-A-610 for clarifi- labels added during the manufacturing
(4) Table 11-1 #1a
cation. process) should not obscure the origi- Class 1-Defect
c. When areas of weave exposure reduce the clearance nal supplier’s markings. Where com- Class 2-Defect
ponent marking visibility and legibil- Class 3-Defect
between noncommon conductive patterns to less than
the minimum electrical clearance. ity is desired, the contract or drawing
shall4 so state.
d. When haloing or edge delamination reduces the edge
clearance more than 50% of that specified, or more than
2.5 mm [0.0984 in], if none is specified. 9.2.3 Bow and Twist (Warpage) Bow and twist after sol-
dering should not exceed 1.5% for through-hole, or 0.75%
e. When the outer, lower edge of land areas are lifted or for surface mount printed board appli-
separated more than the thickness (height) of the land. (5) Table 11-1 #19
cations (see IPC-TM-650, 2.4.22). Class 1-Defect
f. Reduction in minimum width of printed conductors by Bow and twist shall not5 cause dam- Class 2-Defect
more than 20% for Class 2 and 3 and 30% for Class 1 age during post solder assembly Class 3-Defect

(see IPC-6011 and IPC-6012). operations or use.


g. Reduction in width or length of lands by more than
20% for Class 2 and 3 and 30% for Class 1 (see IPC- 9.2.4 Solder Connection All solder connections shall6-
6011 and IPC-6012). 7-8 indicate evidence of wetting and adherence where the
solder blends to the soldered surface, forming a contact
h. Separation or bubbles that bridge conductors in the
angle of 90° or less, except when the quantity of solder
cover layer of flexible printed wiring boards or assem-
results in a contour which extends over the edge of the land
blies.
or solder resist (see Figure 9-1). The solder joints should
i. Any evidence of blistering, charring, or melting of the have a generally smooth appearance. A satin luster is per-
insulation on flexible printed wiring boards or assem- missible.
blies.
There are solder alloy compositions, component lead and
Note: Mechanically created indentions caused by con-
terminal finishes, or printed board platings and special sol-
tact between the coverlayer of flexible printed wiring
dering processes (e.g., slow cooling
boards or assemblies and molten solder are not reject- (6) Table 11-1 #20
with large mass PWBs) that may pro- (7) Table 11-1 #21a
able. Additionally, care should be taken to avoid bend- duce dull, matte, gray, or grainy (8) Table 11-1 #22a
ing or flexing conductors during inspection. appearing solders that are normal for Class 1-Defect
Class 2-Defect
j. Burns that physically damage the surface of the assem- the material or process involved.
Class 3-Defect
bly. These solder joints are acceptable.

19
IPC/EIA J-STD-001C March 2000

A smooth transition from land to connection surface or 9.2.4.2 Solder Connection Defects The following sol-
component lead should be evident. A line of demarcation or der joint conditions shall4-5-6 be con-
(4) Table 11-1 #20
transition zone where applied solder blends with solder sidered defects: (5) Table 11-1 #21a
coating, solder plate, or other surface material is acceptable a. Fractured solder connections (6) Table 11-1 #22a
Class 1-Defect
provided that wetting is evident. In case of fused solder b. Disturbed solder connections Class 2-Defect
coatings, presence of the applied sol- Class 3-Defect
(1) Table 11-1 #20 c. Cold solder connections
der is not required above the rim of (2) Table 11-1 #21a
the hole if the hole wall and compo- (3) Table 11-1 #22a d. Solder that violates minimum electrical clearance (e.g.,
nent lead exhibit good wetting. Marks Class 1-Defect bridges), or contacts the component body (except as
Class 2-Defect noted in 9.2.6.8 and 9.2.6.9).
or scratches in the solder joint shall
1-2-3
Class 3-Defect
not degrade the integrity of the e. Fails to comply with wetting criteria of 9.2.4.
connection. f. Solder bridging between joints except when path is
present by design.

9.2.4.3 Partially Visible or Hidden Solder Connections


Partially visible or hidden solder connections are accept-
1 able provided that the following conditions are met:
a. The design does not restrict solder flow to any connec-
tion element on the solder destination side lands (e.g.,
PTH component) of the assembly.
θ b. The visible portion, if any, of the connection on either
θ
side of the PTH solder connection (or the visible por-
tion of the SMD connection) is acceptable.
<90° 90° >90° >90° c. Process controls are maintained in a manner assuring
repeatability of assembly techniques.
θ θ θ θ
9.2.4.4 Soldering to Terminals A solder fillet shall7 join
the wire/lead to the terminal and
(7) Table 11-1 #21a
shall7 show evidence of good wetting Class 1-Defect
for a minimum of 75% of the mini- Class 2-Defect
mum required wrap area. Class 3-Defect

9.2.4.4.1 Bifurcated, Pierced or Perforated Terminals


For bifurcated, pierced or perforated
(8) Table 11-1 #21b
terminals with side route connections Class 1-No Reqt
(see 6.3.2.2) the minimum solder fillet Class 2-Proc Ind
shall8 be 100% of the 90° wrap or Class 3-Defect
straight through connection.

9.2.4.4.2 Cup Terminals For cup type terminals:


9
a. A fillet shall be formed along the surfaces of contact
between the wire and terminal.
(9) Table 11-1 #21b
b. Solder shall10 fill at least 75% of Class 1-No Reqt
solder cup terminals. Class 2-Proc Ind
Class 3-Defect
c. Any solder buildup on the outside
(10) Table 11-1 #21c
IPC-001c-9-001a and 001b
of the cup shall not11 affect form,
Class 1-No Reqt
Figure 9-1 Solder Contact Angle (θ) fit or function. Class 2-Defect
1. Acceptable wetting of land d. Solder shall9 wet the entire inside Class 3-Defect
2. Unacceptable nonwetting/dewetting evident
of a cup type terminal. (11) Table 11-1 #21a
Class 1-Defect
e. Solder shall9 be visible in the
Class 2-Defect
9.2.4.1 Exposed Basis Metal Exposed basis metal is inspection hole and may rise Class 3-Defect
acceptable on component lead ends and the edges and/or slightly above it. Solder may over-
periphery of printed board lands and conductors. fill the cup.

20
March 2000 IPC/EIA J-STD-001C

9.2.5 Interfacial Connections Unsupported holes with fill of solder is permitted, but with solder extending 360°
leads or PTHs not subjected to mass soldering and used for around the lead with 100% wetting from barrel walls to
interfacial connections need not be filled with solder. PTHs lead on the secondary side, and the surrounding PTHs
not exposed to solder because of permanent or temporary meeting requirements of Table 9-1.
maskant and used for interfacial connections need not be
filled with solder. For Class 3, PTHs without leads, includ- Note: Less than 100% solder fill may not be acceptable in
ing vias, after exposure to wave, dip, some applications (e.g., thermal shock). The user is respon-
(1) Requirement
or drag solder processing shall1 meet See 1.4 sible for identifying these situations to the manufacturer.
the acceptability requirements of Fig-
ure 9-2.
1
2

A B ▼

3
C D IPC-001c-9-003

Figure 9-3 Through-Hole Component Lead Soldering -


Minimum Acceptability for Classes 2 and 3 Per Table 9-1
E F 1. Vertical fill
2. Solder destination side
3. Solder source side
IPC-001c-9-002

Figure 9-2 Acceptable Wetting of Plated-Through Holes


without Leads
9.2.5.2 Through-Hole Lead Terminations

9.2.5.1 Through-Hole Component Lead Soldering 9.2.5.2.1 Straight Through Termina-


When soldering component leads into PTH connections, (3) Table 11-1 #9
tions Lead protrusion shall not3 vio-
Class 1-Defect
the goal of the process is to accomplish 100% fill of the late minimum electrical clearance Class 2-Defect
PTH with solder and good wetting top and bottom. The requirements. Lead protrusion shall4 Class 3-Defect
solder joint shall2 provide evidence of good wetting and be in accordance with Table 9-2. (4) Table 11-1 #16a
the PTH solder fill shall2 meet the Class 1-No Reqt
(2) Table 11-1 #22a
requirements of Table 9-1 and Figure Class 1-Defect Class 2-Proc Ind
9-3, with solder wetted to the hole Class 2-Defect Class 3-Defect
wall. Unsupported holes, shall2 meet Class 3-Defect
conditions C and E of Table 9-1.
9.2.5.2.2 Clinched Leads If a lead
(5) Table 11-1 #22b
As an exception to the Class 2 fill requirements in Table or wire is clinched, the lead shall5 be Class 1-No Reqt
9-1, for plated-through holes connected to thermal or con- wetted in the clinched area. The out- Class 2-No Reqt
ductor planes that act as thermal heat sinks, a 50% vertical line of the lead shall6 be discernible in Class 3-Defect
the solder connection. (6) Requirement
See 1.4
Table 9-1 Plated-Through Holes with Component Leads, Minimum Acceptable Conditions1
Criteria Class 1 Class 2 Class 3
A. Circumferential wetting on solder destination side of lead and Not specified 180° 270°
barrel
B. Vertical fill of solder2 Not specified 75% 75%
C. Circumferential fillet and wetting on solder source side of lead 270° 270° 330°
and barrel
D. Percentage of original land area covered with wetted solder on 0 0 0
solder destination side
E. Percentage of original land area covered with wetted solder on 75% 75% 75%
solder source side
Notes:
1. Wetted solder refers to solder applied by the solder process.
2. The 25% unfilled height includes both source and destination side depressions.

21
IPC/EIA J-STD-001C March 2000

Table 9-3 Surface Mount Components


Table 9-2 Lead Protrusion Bottom Only Terminations 9.2.6.4
Class 1 Class 2 Class 3 Rectangular or Square End Component 9.2.6.5
(L) min1 End is discernible in solder2 Terminations
(L) max No danger 2.5 mm 1.5 mm Cylindrical End Cap Terminations (MELF) 9.2.6.6
of shorts [0.0984 in] [0.0591 in] Castellated Terminations 9.2.6.7
Notes: Flat, Ribbon, ‘‘L’’, and Gull Wing Lead 9.2.6.8
1. For plated-through hole boards greater than 2.3 mm [0.0906 in] thick, Terminations
components with pre-established lead lengths, (DIPs, sockets), lead
protrusion may not be visible. Round or Flattened (Coined) Lead Terminations 9.2.6.9
2. Lead protrusion should not exceed 2.5 mm [0.0984 in] if there is a
‘‘J’’ Lead Terminations 9.2.6.10
possibility of violation of minimum electrical spacing, damage to soldered
connections due to lead deflection or penetration of static protective Butt Joint Terminations 9.2.6.11
packaging during subsequent handling or operating environments.
Flat Lug Lead Terminations 9.2.6.12
9.2.5.2.3 Coating Meniscus In Solder For Class 1 and Tall Profile Components Having Bottom Only 9.2.6.13
2 as an exception to Table 9-1, on the solder destination Terminations
side the meniscus may be covered by solder but on the sol- Inward Formed L-shaped Ribbon Lead 9.2.6.14
Terminations
der source side there shall1 be 360°
(1) Table 11-1 #22a Surface Mount Area Array Packages 9.2.6.15
visible solder wetting and no visible Class 1-Defect
coating meniscus in the solder connec- Class 2-Defect
9.2.6.2 Unspecified Requirements In the following
tion. For Class 3, solder connections Class 3-Defect
1 paragraphs certain joint features are unspecified in size and
shall meet the requirements of Table
the only requirement is that a properly wetted fillet be vis-
9-1.
ible. Requirements not specifying any geometric dimen-
sions are considered noncritical to the performance of the
9.2.6 Surface Soldering of Leads and Terminations
interconnection.
Solder joints or terminations on components designed for
surface mounting shall2 exhibit conditions that meet the
9.2.6.3 Special Class 1 SMT Requirements Class 1 sur-
general descriptions of 9.2.4, and
(2) Table 11-1 #23 face mount joints formed to a connector, socket, and other
shall not2 exhibit any of the defect Class 1-Defect leads or terminations without
conditions of 9.2.4.2, with the specific Class 2-Defect (4) Table 11-1 #1a
Class 3-Defect
mechanical support, subject to stress Class 1-Defect
dimensions defined in 9.2.6.4 through
from insertion and withdrawal of com- Class 2-Defect
9.2.6.15. See Table 9-3.
ponents or printed boards shall4 meet Class 3-Defect
the requirements of Class 2 or 3.
9.2.6.1 Misaligned Components Some surface mounted
components will self-align during reflow soldering but a
degree of misalignment is permitted to
(3) Table 11-1 #9
the extent specified in Tables 9-4 Class 1-Defect
through 9-15; however, minimum Class 2-Defect
design electrical clearance shall not3 Class 3-Defect
be violated.

22
March 2000 IPC/EIA J-STD-001C

9.2.6.4 Bottom Only Terminations Discrete chip components, leadless chip carriers, and other
(1) Table 11-1 #23
devices having metallized terminations on the bottom side only (except ball grid arrays) shall1 meet the Class 1-Defect
dimensional and solder fillet requirements of Table 9-4 and Figure 9-4 for each product classification. Class 2-Defect
The widths of the component and land are W and P, respectively, and the termination overhang Class 3-Defect
describes the condition whereby the smaller extends beyond the larger termination (i.e., W or P).
Table 9-4 Dimensional Criteria - Bottom Only Terminations
Feature Dim. Class 1 Class 2 Class 3
1,2 1,2
Maximum Side Overhang A Notes Notes Notes1,2
Maximum End Overhang B Not permitted Not permitted Not permitted
Minimum End Joint Width C 50% (W) or 50% (P), 50% (W) or 50% (P), 75% (W) or 75% (P),
whichever is less whichever is less whichever is less
Minimum Side Joint Length D Note3 Note3 Note3
2 2
Maximum Fillet Height (not shown) E Note Note Note2
3 3
Minimum Fillet Height (not shown) F Note Note Note3
Solder Fillet Thickness G Note3 Note3 Note3
Minimum End Overlap J Required Required Required
2 2
Land Width P Note Note Note2
2 2
Termination Width W Note Note Note2
Note 1. Shall not violate minimum electrical clearance.
Note 2. Unspecified parameter or variable in size as determined by design.
Note 3. Properly wetted fillet shall be evident.

2
1 3

4
IPC-001c-9-004

Figure 9-4 Bottom Only Terminations


1. Side overhang
2. End overhang
3. End joint width
4. Side joint length, end overlap

23
IPC/EIA J-STD-001C March 2000

9.2.6.5 Rectangular or Square End Components (e.g., Chip Resistor, Chip Capacitor, Square End
(1) Table 11-1 #23
MELF) Solder joints to components having terminations of a square or rectangular configuration shall1
Class 1-Defect
meet the dimensional and solder fillet requirements of Table 9-5 and Figure 9-5 for each product clas- Class 2-Defect
sification. The solder fillet may contact the bottom of the component. Class 3-Defect

Table 9-5 Dimensional Criteria - Rectangular or Square End Components


Feature Dim. Class 1 Class 2 Class 3
Maximum Side Overhang A 50% (W) or 50% (P) 50% (W) or 50% (P) 25% (W) or 25% (P)
whichever is less; Note1 whichever is less; Note1 whichever is less; Note1
Maximum End Overhang B Not permitted Not permitted Not permitted
Minimum End Joint Width C 50% (W) or 50% (P), 50% (W) or 50% (P), 75% (W) or 75% (P),
whichever is less whichever is less whichever is less
Minimum Side Joint Length D Note3 Note3 Note3
Maximum Fillet Height E Note4 Note4 Note4
3 3
Minimum Fillet Height F Note Note (G) + 25% (H) or (G)
+ 0.5 mm [0.02 in],
whichever is less
Solder Fillet Thickness G Note3 Note3 Note3
Height of Termination H Note2 Note2 Note2
Minimum End Overlap J Required Required Required
2 2
Width of Land P Note Note Note2
2 2
Width of Termination W Note Note Note2
Note 1. Shall not violate minimum electrical clearance.
Note 2. Unspecified parameter or variable in size as determined by design.
Note 3. Properly wetted fillet shall be evident.
Note 4. The maximum fillet may overhang the land or extend onto the top of the end cap metallization; however, the solder shall not extend further onto the
component body.

1 2

3
4

6 7 8
5

9 IPC-001c-9-005

Figure 9-5 Rectangular or Square End Components


1. Side overhang 6. One or two face termination
2. End overhang 7. Three face termination
3. End joint width 8. Five face termination
4. See Note 4, Table 9-5 9. Termination configurations
5. Side joint length, end overlap

24
March 2000 IPC/EIA J-STD-001C

9.2.6.6 Cylindrical End Cap Terminations (e.g., MELF) Solder joints to components having cylindri-
(1) Table 11-1 #23
cal end cap terminations shall1 meet the dimensional and solder fillet requirements of Table 9-6 and Class 1-Defect
Figure 9-6 for each product classification. The solder fillet may contact the bottom of the component. Class 2-Defect
Class 3-Defect
Table 9-6 Dimensional Criteria - MELF Terminations
Feature Dim. Class 1 Class 2 Class 3
Maximum Side Overhang A 25% (W) or 25% (P), 25% (W) or 25% (P), 25% (W) or 25% (P),
whichever is less; Note1 whichever is less; Note1 whichever is less; Note1
Maximum End Overhang B Not permitted Not permitted Not permitted
Minimum End Joint Width C Note3 50% (W) or 50% (P), 50% (W) or 50% (P),
whichever is less whichever is less
Minimum Side Joint Length D Note3,5 50% (R) or 50% (S), 75% (R) or 75% (S),
whichever is less; Note5 whichever is less; Note5
Maximum Fillet Height E Note4 Note4 Note4
3 3
Minimum Fillet Height F Note Note (G) + 25% (W) or (G)
(End and Side) + 1.0 mm [0.0394 in],
whichever is less
Solder Fillet Thickness G Note3 Note3 Note3
3,5 5
Minimum End Overlap J Notes 50% (R) Note 75% (R) Note5
2 2
Land Width P Note Note Note2
Termination/Plating Length R Note2 Note2 Note2
2 2
Land Length S Note Note Note2
Diameter of Termination W Note2 Note2 Note2
Note 1.
Shall not violate minimum electrical clearance.
Note 2.
Unspecified parameter or variable in size as determined by design.
Note 3.
Properly wetted fillet shall be evident.
Note 4.
The maximum fillet may overhang the land or extend onto the top of the component termination; however, the solder shall not extend further onto the
component body.
Note 5. Does not apply to components with end only terminations.

1 2
3
4 P
R

S
5
IPC-001c-9-006

Figure 9-6 MELF Terminations


1. Side overhang
2. End overhang
3. End joint width
4. See Note 4, Table 9-6
5. Side joint length and end overlap

25
IPC/EIA J-STD-001C March 2000

9.2.6.7 Castellated Terminations Joints formed to castellated terminations shall1 meet the dimen-
(1) Table 11-1 #23
sional and solder fillet requirements of Table 9-7 and Figure 9-7 for each product classification. Class 1-Defect
Class 2-Defect
Class 3-Defect

Table 9-7 Dimensional Criteria - Castellated Terminations


Feature Dim. Class 1 Class 2 Class 3
Maximum Side Overhang A 50% (W) Note1 50% (W) Note1 25% (W) Note1
Maximum End Overhang B Not permitted Not permitted Not permitted
Minimum End Joint Width C 50% (W) 50% (W) 75% (W)
Minimum Side Joint Length D Notes3,4 50% (F) or (S), 50% (F) or (S),
whichever is less; Note4 whichever is less; Note4
Maximum Fillet Height E Not applicable Not applicable Not applicable
3
Minimum Fillet Height F Note (G) + 25% (H) (G) + 25% (H)
Solder Fillet Thickness G Note3 Note3 Note3
Castellation Height H Note2 Note2 Note2
2 2
Land Length S Note Note Note2
2 2
Castellation Width W Note Note Note2
Note 1. Shall not violate minimum electrical clearance.
Note 2. Unspecified parameter or variable in size as determined by design.
Note 3. Properly wetted fillet shall be evident.
Note 4. Length ‘‘D’’ is dependent upon fillet height ‘‘F’’, and is referenced to end of package.

S
4
3
IPC-001c-9-007

Figure 9-7 Castellated Terminations


1. Side overhang
2. Corner (termination) fillet required if metallization is present
3. Side joint length
4. Side overhang/end joint width

26
March 2000 IPC/EIA J-STD-001C

9.2.6.8 Flat, Ribbon, ‘‘L’’, and Gull Wing Leads Joints formed to flat, ribbon, ‘‘L’’, and gull wing
(1) Table 11-1 #23
shaped leads of either stiff or flexible materials shall meet the alignment and solder fillet requirements Class 1-Defect
of Table 9-8 and Figure 9-8 for each product classification. For devices where the lead length (L) is Class 2-Defect
shorter than the lead width (W), the minimum side joint length (D) shall1 be 75% (L). Class 3-Defect

Table 9-8 Dimensional Criteria - Flat, Ribbon, ‘‘L,’’ and Gull Wing Leads
Feature Dim Class 1 Class 2 Class 3
Maximum Side Overhang A 50% (W) or 0.5 mm 50% (W) or 0.5 mm 25% (W) or 0.5 mm
[0.02 in], [0.02 in], [0.02 in],
whichever is less; Note1 whichever is less; Note1 whichever is less; Note1
Maximum Toe Overhang B Note1 Note1 Note1
Minimum End Joint Width C 50% (W) 50% (W) 75% (W)
Minimum Side Joint Length D (W) or 0.5 mm [0.02 in], 75% (L) or (W), 75% (L) or (W),
whichever is less whichever is less; Note6 whichever is less; Note 6

Maximum Heel Fillet Height E Note1 Note4 Note4


3 5
Minimum Heel Fillet Height F Note (G) + 50% (T) Note (G) + (T) Note5
3 3
Solder Fillet Thickness G Note Note Note3
Formed Foot Length L Note2 Note2 Note2
2 2
Lead Thickness T Note Note Note2
Lead Width W Note2 Note2 Note2
Note 1.
Shall not violate minimum electrical clearance.
Note 2.
Unspecified parameter or variable in size as determined by design.
Note 3.
Properly wetted fillet shall be evident.
Note 4.
Solder fillet may extend through the top bend. Solder shall not touch package body or end seal, except for low profile SMD devices, e.g., SOICs and
SOTS. Solder should not extend under the body of low profile surface mount components whose leads are made of Alloy 42 or similar metals.
Note 5. In the case of a toe-down lead configuration, the minimum heel fillet height (F) shall extend at least to the mid-point of the outside lead bend.
Note 6. Fine pitch leads require a minimum side fillet length of 0.5 mm [0.02 in].

4
1 2 3 6

7
8 9

10

11
IPC-001c-9-008

Figure 9-8 Flat, Ribbon, ‘‘L,’’ and Gull Wing Leads


1. Side overhang 5. Lead 9. Line bisecting lower bend
2. Toe overhang 6. Other lead configurations 10. Toe down heel fillet height
3. End joint width 7. See Note 4, Table 9-8 11. Side joint length
4. Land 8. Center line of (T)

27
IPC/EIA J-STD-001C March 2000

9.2.6.9 Round or Flattened (Coined) Leads Joints formed to round or flattened (coined) leads shall1
(1) Table 11-1 #23
meet the dimensional and fillet requirements of Table 9-9 and Figure 9-9 for each product classifica- Class 1-Defect
tion. Class 2-Defect
Class 3-Defect

Table 9-9 Dimensional Criteria - Round or Flattened (Coined) Leads


Feature Dim. Class I Class 2 Class 3
1 1
Maximum Side Overhang A 50% (W) Note 50% (W) Note 25% (W) Note1
1 1
Maximum Toe Overhang B Note Note Note1
3 3
Minimum End Joint Width C Note Note 75% (W)
Minimum Side Joint Length D (W) (W) 150% (W)
Maximum Heel Fillet Height E Note1 Note4 Note4
Minimum Heel Fillet Height F Note3 (G) + 50% (T) Note5 (G) + (T) Note5
3 3
Solder Fillet Thickness G Note Note Note3
Lead Length L Note2 Note2 Note2
3
Minimum Side Joint Height Q Note (G) + 50% (T) (G) + 50% (T)
Thickness of Lead at Joint Side T Note2 Note2 Note2
2 2
Flattened Lead Width or Diameter of Round Lead W Note Note Note2
Note 1.
Shall not violate minimum electrical clearance.
Note 2.
Unspecified parameter or variable in size as determined by design.
Note 3.
Properly wetted fillet shall be evident.
Note 4.
Solder fillet may extend through the top bend. Solder shall not touch package body or end seal, except for low profile SMD devices, e.g., SOICs and
SOTS. Solder should not extend under the body of low profile surface mount components whose leads are made of Alloy 42 or similar metals.
Note 5. In the case of a toe-down lead configuration, the minimum heel fillet height (F) shall extend at least to the mid-point of the outside lead bend.

1 2 3

7 8
5 IPC-001c-9-009

Figure 9-9 Round or Flattened (Coined) Leads


1. Side overhang 5. Side joint length
2. Toe overhang 6. Line bisecting lower bend
3. End joint width 7. Toe down heel fillet height
4. See Note 4, Table 9-9 8. Other land configurations

28
March 2000 IPC/EIA J-STD-001C

1
9.2.6.10 ‘‘J’’ Leads Joints formed to leads having a ‘‘J’’ shape at the joint site shall meet the dimen-
(1) Table 11-1 #23
sional and fillet requirements of Table 9-10 and Figure 9-10 for each product classification. Class 1-Defect
Class 2-Defect
Class 3-Defect

Table 9-10 Dimensional Criteria - ‘‘J’’ Leads


Feature Dim. Class I Class 2 Class 3
Maximum Side Overhang A 50% (W) 50% (W) 25% (W)
Maximum Toe Overhang B Note2 Note2 Note2
Minimum End Joint Width C 50% (W) 50% (W) 75% (W)
Minimum Side Joint Length D Note3 150% (W) 150% (W)
Maximum Fillet Height E Note4 Note4 Note4
3
Minimum Heel Fillet Height F Note (G) + 50% (T) (G) + (T)
3 3
Solder Fillet Thickness G Note Note Note3
2 2
Lead Thickness T Note Note Note2
Lead Width W Note2 Note2 Note2
Note 1. Shall not violate minimum electrical clearance.
Note 2. Unspecified parameter or variable in size as determined by design.
Note 3. Properly wetted fillet shall be evident.
Note 4. Solder fillet shall not touch package body.

1 2 4
6
5

7 IPC-001c-9-010

Figure 9-10 ‘‘J’’ Leads


1. Side overhang 5. End joint width
2. Toe overhang 6. See Note 4, Table 9-10
3. Lead 7. Side joint length
4. Land

29
IPC/EIA J-STD-001C March 2000

9.2.6.11 Butt Joints (Not Permitted for Class 3 Products) Joints formed to leads positioned perpen-
(1) Table 11-1 #23
dicular to a circuit land in a butt configuration shall1 meet the dimensional and solder fillet requirements Class 1-Defect
of Table 9-11 and Figure 9-11 for each product classification. Class 2-Defect
Class 3-Defect
Table 9-11 Dimensional Criteria - Butt Joints (Not Applicable to Class 3)
Feature Dim. Class 1 Class 2
1
Maximum Side Overhang A 25% (W) Note Not permitted
Maximum Toe Overhang B Not permitted Not permitted
Minimum End Joint Width C 75% (W) 75% (W)
2
Minimum Side Joint Length D Note Note2
4
Maximum Fillet Height E Note Note4
Minimum Fillet Height F 0.5 mm [0.0197 in] 0.5 mm (0.0197 in]
Solder Fillet Thickness G Note3 Note3
Lead Thickness T Note2 Note2
2
Lead Width W Note Note2
Note 1. Shall not violate minimum electrical clearance.
Note 2. Unspecified parameter or variable in size as determined by design.
Note 3. Properly wetted fillet shall be evident.
Note 4. Maximum fillet may extend into the bend radius. Solder shall not touch package body.

4
2
1
5

IPC-001c-9-011

Figure 9-11 Butt Joint


1. Side overhang 5. End joint width
2. Toe overhang 6. See Note 4, Table 9-11
3. Lead 7. Side joint length
4. Land

30
March 2000 IPC/EIA J-STD-001C

9.2.6.12 Flat Lug Leads Joints formed to the leads of power dissipating components with flat lug lead
(1) Table 11-1 #23
shall1 meet the dimensional requirements of Table 9-12 and Figure 9-12. Class 1-Defect
Class 2-Defect
Class 3-Defect

Table 9-12 Dimensional Criteria - Flat Lug Leads


Feature Dim. Class 1 Class 2 Class 3
Side Overhang A 50% (W) Note1 25% (W) Note1 Not permitted
Toe Overhang (not shown) B Note1 Not permitted Not permitted
Minimum End Joint Width C 50% (W) 75% (W) (W)
Minimum Side Joint Length D Note3 (L)-(M), Note4 (L)-(M), Note4
Maximum Fillet Height E Note2 Note2 (G) + (T) + 1.0 mm
[0.0394 in]
Minimum Fillet Height F Note3 Note3 (G) + (T)
3
Solder Fillet Thickness G Note Note3 Note3
Maximum Land Protrusion K Note2 Note2 Note2
2 2
Lead Length L Note Note Note2
2 2
Maximum Gap M Note Note Note2
Land Width P Note2 Note2 Note2
2 2
Lead Thickness T Note Note Note2
Lead Width W Note2 Note2 Note2
Note 1. Shall not violate minimum electrical clearance.
Note 2. Unspecified parameter or variable in size as determined by design.
Note 3. Properly wetted fillet shall be evident.
Note 4. Where the lug is intended to be soldered beneath the component body and the land is designed for the purpose, the lead shall show evidence of
wetting in the gap M.

L
W
T
F

E F

A
G D C
P
M K IPC-001c-9-012

Figure 9-12 Flat Lug Leads

31
IPC/EIA J-STD-001C March 2000

9.2.6.13 Tall Profile Components Having Bottom Only Terminations Joints formed to the termina-
(1) Table 11-1 #23
tion areas of tall profile components having bottom only terminations shall1 meet the dimensional Class 1-Defect
requirements of Table 9-13 and Figure 9-13. If the height of the component exceeds the thickness of Class 2-Defect
the component, it should not be used in products subject to vibration and/or shock unless an appropri- Class 3-Defect
ate adhesive is used to reinforce the component mounting.
Table 9-13 Dimensional Criteria - Tall Profile Components Having Bottom Only Terminations
Feature Dim. Class 1 Class 2 Class 3
1,4 1,4
Side Overhang A 50% (W); Notes 25% (W); Notes Not permitted; Note4
1,4
End Overhang B Notes Not permitted Not permitted
Minimum End Joint Width C 50% (W) 75% (W) (W)
Minimum Side Joint Length D Note3 50% (L) 75% (L)
Solder Fillet Thickness G Note3 Note3 Note3
2 2
Land Length S Note Note Note2
2 2
Land Width W Note Note Note2
Note 1. Shall not violate minimum electrical clearance.
Note 2. Unspecified parameter or variable in size as determined by design.
Note 3. Properly wetted fillet shall be evident.
Note 4. As a function of the component design, the termination may not extend to the component edge, and the component body may overhang the PWB land
area. The component solderable termination area shall not overhang PWB land area.

IPC-001c-9-013

Figure 9-13 Tall Profile Components Having Bottom Only Terminations

32
March 2000 IPC/EIA J-STD-001C

9.2.6.14 Inward Formed L-Shaped Ribbon Leads Joints formed to components having Inward
(1) Table 11-1 #23
Formed L-shaped lead terminations shall1 meet the dimensional and solder fillet requirements of Table Class 1-Defect
9-14 and Figure 9-14. Class 2-Defect
Class 3-Defect
Table 9-14 Dimensional Criteria - Inward Formed L-Shaped Ribbon Leads5
Feature Dim. Class 1 Class 2 Class 3
1 1
Maximum Side Overhang A 50% (W) Note 50% (W) Note 25% (W) or 25% (P)
whichever is less; Note1
Maximum Toe Overhang (not shown)5 B Note1 Not Permitted Not Permitted
5
Minimum End Joint Width C 50% (W) 50% (W) 75% (W) or 75% (P),
whichever is less
Minimum Side Joint Length5 D Note3 50% (L) 75% (L)
5
Maximum Fillet Height E (H) + (G); Note4 (H) + (G); Note4 (H) + (G); Note4
Minimum Fillet Height5 F Note3 (G) + 25% (H) or (G) (G) + 25% (H) or (G)
+ 0.5 mm [0.0197 in], + 0.5 mm [0.0197 in],
whichever is less whichever is less
Solder Fillet Thickness G Note3 Note3 Note3
2 2
Lead Height H Note Note Note2
Minimum Land Extension K Note2 Note2 50% (H) or 0.5 mm
[0.0197 in],
whichever is less
Lead Length L Note2 Note2 Note2
2 2
Pad Width P Note Note Note2
Land Length S Note2 Note2 Note2
2 2
Lead Width W Note Note Note2
Note 1. Shall not violate minimum electrical clearance.
Note 2. Unspecified parameter or variable in size as determined by design.
Note 3. Properly wetted fillet shall be evident.
Note 4. Solder shall not contact the component body on the inside of the lead bend.
Note 5. Where a lead has two prongs, the joint to each prong shall meet all the specified requirements.

H E
G
F

D,L
C K
P S
A
IPC-001c-9-014

Figure 9-14 Inward Formed L-Shaped Ribbon Leads

33
IPC/EIA J-STD-001C March 2000

9.2.6.15 Surface Mount Area Array Packages With 10.1.1 Application Coating shall5 be applied in a con-
ball grid arrays and column grid arrays, minimal visual tinuous manner to all areas designated for coverage on the
inspection is possible. Where features are not inspectable assembly drawing/documentation.
by visual techniques, the requirements are related to The coating fillets should be kept to a minimum. When
inspection by through transmission or laminography x-ray used, masking materials shall5 have no deleterious effect
with the limitations of the technique employed. When on the printed boards and shall5 be removable without con-
assembly includes this technology, the taminant residue.
(1) Table 11-1 #1b
manufacturer shall 1 document the Class 1-No Reqt
material and process parameters, Class 2-Defect Dimensions of masked areas shall
(5) Table 11-1 #1a
acceptance criteria and verification Class 3-Defect not5 be decreased in length, width, or Class 1-Defect
technique. diameter by more than 0.75 mm Class 2-Defect
[0.0295 in] by application of confor- Class 3-Defect
mal coating.
9.2.7 Terminal Soldering Terminals mounted in accor-
dance with 6.2, and soldered to the printed board in unsup-
10.1.1.1 Adjustable Components The adjustable
ported holes or noninterfacial PTHs should exhibit evi-
portion of adjustable components, as well as electrical and
dence of good wetting to both the
(2) Table 11-1 #21a mechanical mating surfaces such as
terminal flange/shoulder and land or Class 1-Defect (6) Table 11-1 #25a
probe points, screw threads, bearing Class 1-Defect
conductive plane. The soldered con- Class 2-Defect
surfaces (e.g., card guides) shall6 be Class 2-Defect
nection shall2 meet the requirements Class 3-Defect
Class 3-Defect
left uncoated as specified on the
shown in Table 9-15.
assembly drawing(s)/documentation.
Table 9-15 Terminal Soldering Requirements
Criteria Class 1 Class 2 Class 3 10.1.1.2 Conformal Coating on Connectors Mating
A. Circumferential fillet 270° 270° 330° connector surfaces of printed wiring assemblies shall not7
and wetting - solder be coated with conformal coating. The conformal coating
source side
specified on the assembly drawing(s)/
B. Percentage of original 75% 75% 75% (7) Table 11-1 #25a
land area covered with
documentation should, however, pro- Class 1-Defect
wetted solder vide a seal around the perimeter of all Class 2-Defect
connector/board interface areas. Class 3-Defect

9.2.8 Connectors The mating sur-


(3) Table 11-1 #24 10.1.1.3 Conformal Coating on Brackets The mating
face(s) of connectors shall3 be free of Class 1-Defect (contact) surface of brackets or other
solder (both wetted and nonwetted), Class 2-Defect (8) Table 11-1 #25b
Class 3-Defect
mounting devices shall not8 be coated Class 1-No Reqt
flux, or other contaminants.
with conformal coating unless specifi- Class 2-Proc Ind
cally required by the assembly Class 3-Defect
10 COATING AND ENCAPSULATION drawing(s)/documentation.

10.1 Conformal Coating The material specification (e.g., 10.1.2 Performance Requirements
IPC-CC-830) and supplier’s instructions, as applicable,
10.1.2.1 Thickness The thickness
shall4 be followed. (9) Table 11-1 #25a
of the conformal coating shall9 be as Class 1-Defect
When curing conditions (temperature, time, Infra Red shown in Table 10-1 for the type Class 2-Defect
(I.R.) intensity, etc.) vary from supplier recommended specified (see IPC-2221): Class 3-Defect

instructions, they shall4 be documented and available for Table 10-1 Coating Thickness
review. Type AR Acrylic Resin 0.03-0.13 mm
4
[0.00118 to 0.00512 in]
The material shall be used within the time period speci-
Type ER Epoxy Resin 0.03-0.13 mm
fied (both shelf life and pot life) or [0.00118 to 0.00512 in]
(4) Table 11-1 #1a
used within the time period indicated Class 1-Defect Type UR Urethane Resin 0.03-0.13 mm
by a documented system the manufac- Class 2-Defect [0.00118 to 0.00512 in]
turer (assembler) has established to Class 3-Defect
Type SR Silicone Resin 0.05-0.21 mm
mark and control age-dated material. [0.00197 to 0.00827 in]
Type XY Paraxylylene 0.01-0.05 mm
Resin [0.000394 to 0.00197 in]

34
March 2000 IPC/EIA J-STD-001C

The thickness is measured on a flat, unencumbered, cured 10.2.1 Application Encapsulant material shall 4 be
surface of the printed wiring assembly or a coupon that has applied in a continuous manner to all areas designated for
been processed with the assembly. Coupons may be of the coverage on the assembly drawing/documentation.
same type of material as the printed board or may be of a
When used, masking material shall4
nonporous material such as metal or glass. As an alterna- (4) Table 11-1 #1a
have no deleterious effect on the Class 1-Defect
tive, wet film or viscosity measurement may be used to
printed boards and shall4 be remov- Class 2-Defect
establish the coating thickness provided there is documen- Class 3-Defect
able without contaminant residue.
tation that correlates dry film thickness to the alternate
measurement technique. 10.2.1.1 Encapsulant Free Sur-
(5) Table 11-1 #25a
faces All portions of the assembly
10.1.2.2 Coating Coverage Conformal coating shall : 1 Class 1-Defect
not designated to receive encapsulant Class 2-Defect
a. Be completely cured and homogeneous. material shall5 be free of any encapsu- Class 3-Defect
b. Cover only those areas specified on the assembly lant material.
drawing(s)/documentation.
10.2.2 Performance Requirements The applied encap-
c. Be free of blisters, or breaks that could affect the opera-
sulant shall7 be completely cured, homogeneous, and cover
tions of the assembly or sealing properties of the con-
only those areas specified on the
formal coating. (6) Table 11-1 #25a
assembly drawing(s)/documentation. Class 1-Defect
d. Be free of voids, bubbles, mealing, peeling, wrinkles or The encapsulant shall6 be free of Class 2-Defect
foreign material which expose bubbles, blisters, or breaks that affect Class 3-Defect
(1) Table 11-1 #25a
component conductors, printed Class 1-Defect the printed wiring assembly operation (7) Table 11-1 #25c
wiring conductors, (including Class 2-Defect
or sealing properties of the encapsu- Class 1-No Reqt
ground planes) or other conductors Class 3-Defect Class 2-Proc Ind
lant material. There shall7 be no vis-
and/or violates design electrical Class 3-Defect
ible cracks, crazing, mealing, peeling,
clearance. and/or wrinkles in the encapsulant material.
10.1.3 Rework of Conformal Coating For Class 3, pro- 10.2.3 Rework of Encapsulant Material For Class 3,
cedures which describe the removal procedures which describe the
(2) Requirement
and replacement of conformal coating (8) Requirement
See 1.4 removal and replacement of encapsu- See 1.4
shall2 be documented and available lant material shall8 be documented
for review. and available for review.
10.1.4 Conformal Coating Inspection Visual inspection
10.2.4 Encapsulant Inspection Visual inspection of
of conformal coating may be performed without magnifica- encapsulation may be performed without magnification.
tion. Inspection for conformal coating coverage may be
performed under an ultraviolet (UV) light source when 11 PRODUCT ASSURANCE
using conformal coating material containing a UV tracer.
Magnification from 1.75X to 4X may be used for referee 11.1 Hardware Defects Requiring Disposition Hard-
purposes. ware defects that require disposition are annotated through-
out the standard and are summarized in Table 11-1. For
10.2 Encapsulation The material specification and sup- Class 3, a defect shall not9 be re-
(9) Requirement
plier’s instructions, as applicable, shall3 be followed. worked before it is documented per See 1.4
The material shall3 be used within the time period speci- 12.1.
fied (both shelf life and pot life) or
(3) Table 11-1 #1a
used within the time period indicated Class 1-Defect
by a documented system the manufac- Class 2-Defect
turer has established to mark and con- Class 3-Defect
trol age-dated material.

35
IPC/EIA J-STD-001C March 2000

Table 11-1 Summary of Hardware Defects and Process Indicators (See 1.4)
Hardware Condition
Item ‘‘A’’ = Acceptable, ‘‘P’’ = Process Indicator, Class Class Class
No. ‘‘D’’ = Defect, ‘‘N’’ - No Requirement Specified Reference 1 2 3
1 Nonconforming Materials or Processes
1a Hardware found to be manufactured with nonconforming 1.4.2 5.4.2 8.3.5 D D D
materials or processes. Applies to all classes. 3.5 6.1 8.3.6
3.6 6.1.2 8.3.7
3.6.5 6.1.2.2 8.3.8
3.7 6.1.2.4 8.3.9
4 6.1.3 9.2
4.1 6.4.1 9.2.2
4.2 7.1.1 9.2.6.3
4.3 7.1.2 10.1
4.4 7.1.8 10.1.1
4.6 7.2.1 10.2
5.2 7.2.3 10.2.1
5.2.1 7.3.2 13.2.1
5.4
1b Hardware found to be manufactured with nonconforming materials or processes. 3.4 N D D
Applies to classes 2 and 3 only. 3.6.2
5.3
6.1.3.1
6.2.4
6.2.5
6.3.5
7.22
9.2.6.15
1c Hardware found to be manufactured with nonconforming materials or 1.5 6.5.3 N N D
processes. Applies to class 3 only. 3.6.4 7.1.3
4.2 7.1.5
4.7 7.1.6
6.1.2.6 7.3.1
6.2 7.3.2.1
6.3.5 7.4
6.4.3 8
6.4.4
2 Terminals modified to accept oversize conductors. 5.1 N D D
3 Gold not removed as required. 5.4.1 N P D
4 Components, Leads and Wires
4a Lead nicks or damage to components beyond the allowance. 6.1.1 D D D
6.1.2.1
6.1.2.2
6.1.2.4
6.1.2.5b
9.2.1.2
4b Lead bend does not meet distance/radius requirement. 6.1.2.4 A P D
6.5.1
5 Insulation and Wire Damage
5a Charred insulation or damage to wire in excess of that allowed. 6.1.3 D D D
Table 6-1
5b Birdcaging exceeds allowance. 6.1.3 A P D
6.3.5
6 Mounted parts and components that obstruct PTHs. 6.1.4 A P D
7 Adhesive
7a Adhesive material that precludes formation of an acceptable solder connection. 6.1.6 D D D
7b Adhesive material visible in SMT termination area. 6.1.6 A P D
8 Terminal has discontinuities. 6.2.1 D D D
6.2.2

36
March 2000 IPC/EIA J-STD-001C

Hardware Condition
Item ‘‘A’’ = Acceptable, ‘‘P’’ = Process Indicator, Class Class Class
No. ‘‘D’’ = Defect, ‘‘N’’ - No Requirement Specified Reference 1 2 3
9 Violation of minimum electrical clearance. This condition includes 6.1.2.5a,c 6.4.2.1 D D D
potential movement of conductors (including conductive part 6.1.5 6.5.2
bodies, leads, wires, insulation clearance, etc.) solder balls, 6.2.3 6.5.2.1
excessive solder, and bridging. 6.3.1.1 8.3.1
6.3.1.6 9.2.5.2.1
6.3.1.7 9.2.6.1
10 Insulation covered with solder. 6.3.1.1a A P D
11 Service loops that do not conform to the requirements. 6.3.1.2 A P D
12 No stress relief.
12a No stress relief on component leads connected to terminals. 6.3.1.3 D D D
12b No stress relief on continuous run wires. 6.3.1.5 D D D
12c No stress relief on wires connected to terminals. 6.3.1.3 A P D
13 Sleeving fits incorrectly. 6.3.1.6 A D D
14 Orientation, dress, fill or termination of wire/lead does not conform 6.3.1.4 6.3.2.2 A P D
to requirements. 6.3.1.5 6.3.2.3
6.3.2.1 6.3.3
6.3.2.1.1 6.3.4
15 Lead Clinches
15a Prohibited lead types/material are clinched. 6.5.2 D D D
15b Leads in unsupported holes not clinched when required. 6.5.2.1 N N D
16 Lead Protrusion
16a Lead protrusion that does not conform to the requirements. 6.5.2 N P D
9.2.5.2.1
16b Unsupported hole lead protrusion that does not conform to the requirements. 6.5.2.1 D D D
17 Failure to comply with the cleanliness requirements. 8.3.1 D D D
8.3.2.2
18 Violation of the assembly drawing requirements. 9.2 D D D
19 Damage to printed wiring assembly in excess of that allowed. 9.2.1.1 D D D
9.2.3
20 Solder connection that does not conform to the requirements. 9.2.4 D D D
9.2.4.2
21 Terminal Connections
21a Terminal solder fillet and wetting that does not conform to the requirements. 9.2.4 D D D
9.2.4.2
9.2.4.4
9.2.4.4.2c
9.2.7
21b Terminal solder connection that does not conform to the requirements. 9.2.4.4.1 N P D
9.2.4.4.2a
9.2.4.4.2d
9.2.4.4.2e
21c Cup terminal solder fill that does not conform to the requirements. 9.2.4.4.2b N D D
22 Through-Hole Connections
22a Through-hole solder connection does not conform to the requirements. 9.2.4 D D D
9.2.4.2
9.2.5.1
9.2.5.2.3
22b Clinched lead solder connection does not meet the requirements. 9.2.5.2.2 N N D

37
IPC/EIA J-STD-001C March 2000

Hardware Condition
Item ‘‘A’’ = Acceptable, ‘‘P’’ = Process Indicator, Class Class Class
No. ‘‘D’’ = Defect, ‘‘N’’ - No Requirement Specified Reference 1 2 3
23 Surface mount connection does not conform to the requirements. 9.2.6 9.2.6.9 D D D
9.2.6.4 9.1.6.10
9.2.6.5 9.2.6.11
9.2.6.6 9.2.6.12
9.2.6.7 9.2.6.13
9.2.6.8 9.2.6.14
24 Mating surface(s) of connectors that do not conform to the requirements. 9.2.8 D D D
25 Conformal Coating and Encapsulation
25a Conformal coating or encapsulation that does not conform to the requirements. 10.1.1.1 D D D
10.1.1.2
10.1.2.1
10.1.2.2
10.2.1.1
10.2.2
25b Conformal coating on brackets. 10.1.1.3 N P D
25c Encapsulation cracking, crazing, mealing, peeling or wrinkling. 10.2.2 N P D
26 Wires used at a potential of 6kV or greater do not meet requirements. 13.2.3 D D D

38
March 2000 IPC/EIA J-STD-001C

11.2 Inspection Methodology other user-approved system may be used as guidelines for
implementing process control. The use of ‘‘statistical pro-
11.2.1 Process Verification Inspection For Class 3, cess control’’ is encouraged but not mandatory (see 1.5).
process verification inspection shall1 consist of the follow-
ing: When a statistical process control system process is used,
it shall5 include the following elements as a minimum:
a. Surveillance of the operation to determine that prac-
tices, methods, procedures and a written inspection plan a. Training shall5 be provided to personnel with assigned
are being properly applied. responsibilities in the development, implementation,
(1) Requirement
b. Inspection to measure the quality See 1.4
and utilization of process control and statistical meth-
of the product. ods that are commensurate with their responsibilities.
b. Quantitative methodologies and evidence shall5 be
11.2.2 Visual Inspection After soldering, the assembly maintained to demonstrate that the process is capable
shall2 be evaluated in accordance with the established pro- and in control. Improvement strategies shall5 define
cess control plan (see 11.3) or by 100% visual inspection initial process control limits and methodologies leading
(see 9.1). If the presence of a defect cannot be determined to a reduction in the occurrence of process indicators in
at the inspection power, the item is acceptable. The referee order to achieve continuous process improvement.
magnification power is intended for use only after a defect c. Criteria for switching to sample based inspection shall5
has been determined but is not com- be defined. When processes exceed control limits, or
(2) Requirement
pletely identifiable at the inspection See 1.4 demonstrate an adverse trend or run, the criteria for
power. reversion to higher levels of inspection (up to 100%)
shall5 also be defined.
11.2.2.1 Magnification Aids and Lighting Magnification
d. When defect(s) are identified in the lot sample, and the
aids shall3 be in accordance with Table 11-2 and commen-
number exceeds the limit allowed by the sampling plan,
surate with the size of the device being inspected. The tol-
the entire lot shall5 be 100% inspected for the occur-
erance for magnification aids is ± 15% of the selected mag-
rence(s) of the defect(s).
nification power. Magnification aids should be maintained
and calibrated as appropriate (see IPC- e. A system shall5 be in place to initiate corrective action
(3) Requirement for the occurrence of process indicators, out-of-control
OI-645). Supplemental lighting may See 1.4
be necessary to assist in visual assess- process(es), and/or discrepant assemblies.
ment. f. A documented audit plan shall5 be defined to monitor
Table 11-2 Magnification Aid Applications
process characteristics and/or output at a prescribed fre-
quency.
Land Widths or
Land Diameters Inspection Referee g. Objective evidence of process control may be in the
Magnification Power form of control charts or other tools and techniques of
≥ 1.0 mm [0.0394 in] 1.75X 4X statistical process control derived from application of
0.5 to 1.0 mm 4X 10X process parameter and/or product
(5) Requirement
[0.0197 to 0.0394 in] parameter data (see IPC-HDBK- See 1.4
0.25 to 0.5 mm 10X 20X 001).
[0.00984 to 0.0197 in]
< 0.25 mm 20X 40X 11.3.1 Defect and Process Indicator Reduction Con-
[0.00984 in]
tinuous process improvement techniques shall6 be imple-
mented to reduce the occurrence of defects and process
11.2.3 Sampling Inspection Use of sample-based
indicators. When processes vary beyond established pro-
inspection shall4 be done only as part
of a documented process control sys-
(4) Requirement cess control limits, corrective action shall6 be taken to pre-
See 1.4
tem per 11.3. vent recurrence.

All variances from the requirements of this standard shall6


11.3 Process Control A process
(5) Requirement be minimized with the goal of elimination (where economi-
control system shall5 be documented See 1.4 cally practical) through process corrective action. For Class
and available for review.
3, failure to implement process corrective action and/or the
Note: The primary goal of process control is to continually use of continually ineffective correc-
(6) Requirement
reduce variation in the processes, products, or services to tive actions shall6 be grounds for dis- See 1.4
provide products or processes meeting or exceeding cus- approval of the process and associated
tomer requirements. Tools such as IPC-9191, EIA-557-1 or documentation.

39
IPC/EIA J-STD-001C March 2000

12 REWORK AND REPAIR ing of internal electronic elements and the soldering of the
internal connections of transformers, motors, and similar
12.1 Rework of Unsatisfactory Solder Connections
devices. Unless a user has a specific need for the controls
Rework for Classes 1 or 2 should be documented.
provided by this standard, it should not be imposed relative
For Class 3: to the manufacture of the internal elements of these
a. A hardware defect per Table 11-1 shall not 1 be devices. The external interconnect
(5) Table 11-1 #1a
reworked until the discrepancy has been documented. points (i.e., terminals, pins, etc.) shall5 Class 1-Defect
meet the solderability requirements of Class 2-Defect
b. The documentation shall1 be used to provide an indica- Class 3-Defect
this document, less steam aging.
tion as to possible causes and to determine if corrective
action is required. 13.2.2 High Frequency Applications High frequency
c. When rework is performed, each applications (i.e., radio wave and microwaves) may require
(1) Requirement
reworked and/or reflowed connec- See 1.4 part clearances, mounting systems, and assembly designs
tion shall1 be inspected to the which vary from the requirements stated herein. When high
requirements of 9.2.4. frequency design requirements prevent compliance with
the design and part mounting requirements contained
12.2 Repair A hardware defect per Table 11-1 shall not2 herein, manufacturers may use alternative designs.
be repaired until the discrepancy has been documented.
The repair method shall2 be deter- 13.2.3 High Voltage Applications High power appli-
(2) Requirement
mined by agreement between the cations such as high voltage power supplies may require
See 1.4
manufacturer and the user. part clearances, mounting systems, and assembly designs
which vary from the requirements stated herein. For
12.3 Post Rework/Repair Cleaning After rework or example, wires used at a potential of 6kV or greater there
repair for Class 3, assemblies shall3 shall6 be no broken strands nor any birdcaging beyond the
(3) Requirement
be cleaned as necessary by a process insulation outside diameter. When
See 1.4 (6) Table 11-1 #26
meeting the requirements of 8.3. such design requirements prevent Class 1-Defect
compliance with the design and part Class 2-Defect
13 MISCELLANEOUS REQUIREMENTS mounting requirements contained Class 3-Defect
herein, manufacturers may use alter-
13.1 Health and Safety The use of some materials refer- native designs.
enced in this standard may be hazardous. To provide for
personnel safety, areas, equipment and procedures shall4 13.3 Guidance on Requirement Flowdown Manufactur-
meet the applicable local and Federal ers are responsible for delivering fully compliant hardware
(4) Requirement per the requirements of this standard and the applicable
Occupational, Safety and Health See 1.4
Regulations. assembly drawing(s)/documentation. Where a part is
adequately defined by a basic part specification, then the
13.2 Special Manufacturing Requirements requirements of this standard should be imposed on the
manufacture of that part only when absolutely necessary to
13.2.1 Manufacture of Devices Incorporating Magnetic meet end-item requirements. When it is unclear where
Windings This standard is very limited in its applicability flowdown should stop, it is the responsibility of the manu-
to the manufacturing processes associated with the mount- facturer to work with the user to make that determination.

40
March 2000 IPC/EIA J-STD-001C

Appendix A
Guidelines for Soldering Tools and Equipment

The following guidelines for tools and equipment selection ing use. The heat source is not to cause damage to the
and use have been found through industry practice to be printed board or components.
effective in meeting the requirements of this standard (see
3.7). A-3 HEATED SOLDERING TOOL HOLDERS
Soldering tool holders are to be of a type appropriate for
A-1 ABRASIVES
the soldering tool used. The holder should leave the solder-
Knives, emery cloth, sandpaper, sandblasting, braid, steel ing tool heating element and tip unsupported without
wool, and other abrasives are not to be used on surfaces to applying excessive physical stress or heat sinking and is to
be soldered. protect personnel from burns.

A-2 BENCHTOP AND HAND SOLDERING SYSTEMS


A-4 WIPING PADS
Selection criteria of benchtop and hand soldering systems
Sponges and pads for wipe cleaning of soldering iron tips
include:
and reflow soldering tool surfaces are to be manufactured
a. soldering systems are selected for their capacity to heat from materials which are not detrimental to solderability or
the connection area rapidly and maintain sufficient sol- which could contaminate soldering tool surfaces. The
dering temperature range at the connection throughout operator is to keep sponges and pads free of contaminants
the soldering operation. that are detrimental to solderability or that would contami-
b. Temperature controlled soldering equipment (at rest) nate the soldering tool surfaces.
should be controlled within (5°C [± 9°F] of the idle tip
temperature. Constant output (steady output) tools in A-5 SOLDERING GUNS
compliance with A-2a, d, e, & f may also be used. Soldering guns with the transformer incorporated into the
c. Operator selected or rated temperatures of soldering hand piece are not to be used.
systems at idle/standby should be within ± 5°C [± 9°F]
of actual measured tip temperature. A-6 SOLDER POTS
d. Resistance between the tip of soldering systems and the Solder pots should maintain the solder temperature within
workstation common point ground should not exceed 5 ± 5°C [± 9°F] of the selected temperature. Solder pots are
ohms. Heated element and tips are measured when at to be grounded.
their normal operating temperature.
Note: Current limiting soldering equipment manufac- A-7 USE AND CONTROL
tured to EN 00015-1:1992 may not meet this require- All equipment is to be operated in accordance with manu-
ment. facturers’ recommendations and calibrated where necessary
e. AC and DC current leakage from heated tip to ground to maintain manufacturers’ specifications. Equipment
should not create deleterious effects on equipment/ grounding, protection and temperature control testing
components. should be performed when qualifying equipment for pur-
f. Tip transient voltages generated by the soldering equip- chase and/or inspection of new or repaired equipment.
ment should not exceed 2V peak (Zin ≥ Ω).
A-8 MACHINE SOLDERING SYSTEMS
Note: Current limiting soldering equipment manufac-
The design of automated machine soldering systems should
tured to EN 00015-1:1992 may not meet this require-
provide:
ment.
a. The capability to preheat printed wiring assemblies.
The appropriate guidelines of this section also apply to
nonconventional benchtop soldering equipment; including b. The capacity to maintain the soldering temperature at
equipment which utilizes conductive, convective, parallel the assembly surface within ± 5°C [± 9°F] of the
gap resistance, shorted bar resistance, hot gas, infrared, selected temperature throughout the span of any con-
laser powered devices, or thermal transfer soldering tech- tinuous soldering run.
niques. Tools used are to be maintained such that no detri- c. The capability to rapidly heat the surfaces to be joined
mental damage results from their use. Tools and equipment and the capacity to reattain the present temperature
are to be clean prior to use and should be kept clean and within ± 5°C [± 9°F] during repetitive soldering opera-
free of dirt, grease, flux, oil and other foreign matter dur- tions.

41
IPC/EIA J-STD-001C March 2000

The heat source is not to cause damage (see Table 11-1 #4a they will not cause board, part or component degradation
and #19) to the printed board or components, or contami- or ESD damage to components.
nate the solder when direct contact is made between the
heat source and metals to be joined. A-9 MACHINE MAINTENANCE

Soldering equipment should be utilized in accordance with Machines related to the soldering process are to be main-
a documented process that is available for user review. tained to assure capability and efficiency commensurate
with design parameters established by the original equip-
A-8.1 Carriers Devices used for the transport of printed ment manufacturer. Maintenance procedures and schedules
boards through preheat, soldering, and cooling stages should be documented in order to provide reproducible
should be of such material, design, and configuration that processing.

42
March 2000 IPC/EIA J-STD-001C

Appendix B
Material and Process Compatibility Testing

B-1 SCOPE/INTRODUCTION B-2.2.2 Ion Chromatography (IC) IC testing in accor-


dance with IPC-TM-650, Method 2.3.28, is especially
B-1.1 Scope This appendix sets forth a standardized helpful for identification/quantification of ionic species dur-
testing protocol to be used when: ing initial process characterization or during failure analy-
• Implementing flux materials other than those noted in 4.2. sis of test assemblies.
• Validating the acceptability of a major change in a proven
process prior to its implementation in an electronics B-3 TEST ASSEMBLY
manufacturing process. The test vehicle should represent the substrate materials,
assembly materials and fabrication processes used in the
The testing protocol covers printed wiring assemblies using
production. The test vehicle circuitry must provide for SIR
surface mount technology (SMT), plated-through hole
testing similar to the IPC-B-36 circuitry. Components of
(PTH) or mixed technology (both SMT and PTH).
the type to be soldered in production representative of the
This appendix is required only for Class 3. ‘‘‘hardest-to-clean’’ configurations (in terms of ‘‘shadow-
ing’’ of the solder joints by component bodies and
B-1.2 Intent The intent of the testing, outlined in this component-to-substrate spacings) shall be included on the
protocol, is to show that a proposed manufacturing process PWA.
change can produce hardware with acceptable end-item
performance. Test patterns used for SIR testing must be free of perma-
nent solder resist.
These process changes can involve a change in one of the
process steps. They can also pertain to a change in bare Boards used in these test assemblies must meet the require-
board supplier, solder resist or metallization. Test vehicle ments of IPC-6011 and IPC-6012 appropriate product
construction will vary depending upon which of these class.
changes is being evaluated. Note: Contact IPC for information on commercially avail-
Note: This testing is a ‘‘site specific’’ qualification process able SIR test vehicles.
to be done at the manufacturer’s location using production
processes and equipment whenever possible. B-4 TEST ASSEMBLY PREPARATION

B-2 TEST APPROACH B-4.1 Pre-Cleaning No cleaning prior to assembly shall


be done on the PWBs used in these tests that is not done
B-2.1 Surface Insulation and Visual Inspection as part of the standard assembly process.

B-2.1.1 Surface Insulation Resistance (SIR) SIR testing


B-4.2 Processing of Test Assemblies The manufactur-
is an evaluation of the effects of the material/process on
ing process used in this protocol is assumed to be as close
electrical performance.
as possible to the process intended for production hard-
ware. In cases where the assembly process involves mul-
B-2.1.2 Visual Inspection Visual inspection of samples
tiple solder operations (e.g., surface mount reflow, wave
after SIR notes presence of corrosion, dendritic formation
solder, rework, hand solder, or conformal coating if used),
or mealing of conformal coating.
all these processes must be done on the test assembly. This
B-2.2 Extractive Tests - OPTIONAL Recommended test would be necessary even in cases where only one of the
techniques that can be used to characterize residues for soldering processes is being changed, since residues from
process control purposes are as follows: one process can interact with residues from a prior or fol-
lowing process. It is the total of all these processes that will
B-2.2.1 Resistivity of Solvent Extract (ROSE) ROSE
be shipped and thus it is their total that must be tested and
testing in accordance with IPC-TM-650, Method 2.3.25, qualified.
Detection and Measurement of Ionizable Surface Contami-
nants, can be used to establish a baseline for ionic contami- B-5 SIR TESTING
nation after the complete assembly process, which may or See IPC-9201 for a discussion of the proper methodology
may not include cleaning depending upon what flux is and equipment to be used for repeatable and accurate SIR
used. testing.

43
IPC/EIA J-STD-001C March 2000

B-5.1 Sample Size A minimum of 10 vehicles shall be Note: The minimum values used should be from one spe-
tested for each material/process combination. This sample cific test pattern design. If multiple test pattern designs are
size was calculated by setting a ‘‘consumers risk’’ at 10 used on a test vehicle, each set of data must meet the
(confidence of 90). A complete explanation of how this requirements.
sample size was determined can be found in IPC-TR-467.
It is recommended that additional unprocessed vehicles be B-6.2 Visual Requirements All biased sites shall have
tested as controls. the components removed without application of chemicals
or heat, preferably by cutting of leads. All areas shall be
B-5.2 SIR Test Conditions inspected at 10X - 30X for corrosion and dendritic forma-
tion. Backlighting should be used to inspect for dendritic
B-5.2.1 Noncondensing Service Environment Test formation.
vehicles shall be tested in accordance with IPC-TM-650,
Method 2.6.3.3. There shall be no evidence of corrosion. Dendritic forma-
tion shall not bridge more than 20% of the distance
B-5.2.2 Condensing Service Environment All test between conductors. Conformally coated PWAs shall
vehicles shall be exposed to the conditions noted in IPC- exhibit no evidence of reversion, cracking or mealing.
TM-650, Method 2.6.3, Class 3. Measurements shall be
B-7 REPORTING
taken at the upper temperature and humidity level of every
third cycle (starting with the third cycle). The test report shall include the following information:
• Substrate information: laminate type, solder resist, final
Note: This is a condensing environment. Test assemblies
finish (SMOBC/HASL, reflow, OSP, etc.), and final
exposed to this environment shall be conformally coated
cleaning.
using the same coating material/application processes used
in ‘‘delivered’’ hardware. • Assembly information: manufacturing process, equip-
ment, and materials.
B-6 ACCEPTANCE CRITERIA • Conformal coating if used.
• Test vehicle description (e.g., P/N, type of assembly,
B-6.1 Convert the minimum SIR value from each test
components used).
vehicle to log10. The average of these log values less 3
standard deviations (of log values) shall be at least 8.0 • SIR test environment and results.
(1E8 Ohm). • Results of post SIR test visual inspection.

44
March 2000 IPC/EIA J-STD-001C

Index

TOPIC CLAUSE TOPIC CLAUSE


Adhesive 4.5 Dross 7.3.2.1
6.1.6 8.3.1
Basis metal (exposed) 6.1.2.1 Drying/degassing 7.1.4
9.2.4.1 7.1.7
Bifurcated terminal 6.2 Encapsulants 10.2
6.3.1.5 Exposed basis metal 6.1.2.1
6.3.2 9.2.4.1
6.3.2.2 External deposited elements 6.4.2.2
Blisters, blistering - conformal coating 10.1.2.2 Facilities 3.6
Blisters, blistering - encapsulation 10.2.2 Field operations 3.6.4
Blisters, blistering - Insulation 9.2.1.1 Flux residue 8.3.2
Blisters, blistering - PWB 9.2.1.1 Fractures 7.1.5
Bow and twist 9.2.3 9.2.4.2
Break away tie bars 7.1.5 Gold removal 5.4.1
Bridging, solder 9.2.4.2 Haloing 9.2.1.1
Bubbles - conformal coating 10.1.2.2 Hand soldering 7.2
Bubbles - encapsulation 10.2.2 Handling parts 7.1.1
Butt leads (on SMD’s) 6.4.4 Health and safety 13.1
9.2.6.11 Heat shrinkable soldering devices 4.7
Chemical strippers 4.6 8.1.2
Clearance - component & board 6.1 Heat sinks 5.4.2
Clearance, minimum electrical spacing 6.1.2.5 7.2.3
Clinched lead solder coverage 9.2.5.2.2 9.2.5.1
Clinched lead terminations 6.5.2 Hidden connections 9.2.4.3
6.5.2.1 High voltage applications 13.2.3
Component damage 6.1.1 Hold down of SMD leads 7.1.3
Component mounting 6.1 Holding devices and materials 7.1.8
Conductive/metal cased components 6.1.5 Hole obstruction 6.1.4
Conflict 3.1 Hook terminal attachments 6.3.1.6
3.1.1 6.3.3
Conformal coating 10.1 Insulation - damage 9.2.1.1
Continuous run connections 6.3.1.5 Insulation clearance 6.3.1.1
Cooling 7.1.4 Lead forming 6.1.2
6.1.2.2
Corrective action 9.1
6.1.2.4
9.1.1
6.4.1
Cracked, cracks 6.2.1 6.5.1
6.2.2
Lead protrusion 9.2.5.2.1
9.2.1.2
10.2.2 Lead trimming (after soldering) 7.1.5
Cup and hollow cylindrical terminals 6.3.5 Lead wrap (around) 6.3.1.4
6.3.2.1
Cutting of leads 7.1.5
6.3.2.1.1
Deformation 6.1.2.1 6.3.2.2
6.1.2.5 6.3.2.3
6.1.2.6 6.3.3
7.1.5 6.3.4
Delamination 9.2.1.1 9.2.4.4
DIP lead forming and cutting 6.5.2 Lifted conductor, land, pad or trace 9.2.1.1

45
IPC/EIA J-STD-001C March 2000

TOPIC CLAUSE TOPIC CLAUSE


Lighting 3.6.3 Rework 1.4.1
10.1.4 3.2.2
11.2.2.1 5.4.2
Machine (non-reflow) soldering 7.3 7.1.5
10.1.3
Magnification aids for inspection 10.1.4
10.2.3
10.2.4
12.1
11.2.2
12.3
11.2.2.1
Safety 13.1
Manual soldering 7.2
Scratches 9.2.4
Markings 6.1
9.2.2 Service loops 6.3.1.2
Measling 9.2.1.1 Side route connection 6.3.2.2
Measurement units 1.3 SMD connections 9.2.6
Meniscus (coating) 6.5.3 Solder balls 8.3.1
9.2.1.2 Solder joint appearance / finish 9.2.4
9.2.5.2.3 Solder preforms 4.4
Order of precedence 1 Solder purity 5.3
1.4
Solder resist/mask 9.2.5
3.1
10.1.1
3.1.1
10.2.1
Orientation of wire wrap 6.3.1.4
Solderability 3.6.2
Parallelism 6.1.2.3 5.2
Partial hole fill 9.2.5.1 5.2.1
Particulate matter 8.3.1 5.4
8.1.1
Personnel proficiency 3.4
13.2.1
11.3
Staking of wires 6.3.2.2
Pierced or perforated terminals 6.3.4
Stress relief 6.3.1.3
Plated-though hole obscured 9.2.4.3
Temperature and humidity 3.6.1
Plated-through hole fill 9.2.5.1
3.6.2
Plated-through hole fill with lead 9.2.5.1
Tempered lead cutting 6.4.4
Plated-through hole fill without lead 9.2.5
Thermal wire strippers 6.1.3
Preheating 7.1.2
Tinning 4.2
Process control 1.1 5.2
1.5 5.3
3.6.2 5.4.1
8.2.1 5.4.2
9.1.1 6.1.3.1
9.1.2
Top route connections 6.3.2.3
9.2.4.3
11.3 Turret terminals 6.2
6.3.1.5
Process indicators 1.4
6.3.2
1.4.1
6.3.2.1
1.4.2
3.2.5 Ultrasonic cleaning 8.1.2.1
9.1 Via holes 9.2.5
9.1.2 Visibility of markings 6.1
11.3 9.2.2
11.3.1
Warpage 9.2.3
PWB - damage 9.2.1.1
Wicking 6.1.3.1
Repair 1.4.1 7.1.6
3.2.2
12.2
12.3

46
ASSOCIATION CONNECTING
ELECTRONICS INDUSTRIES

Standard Improvement Form IPC/EIA J-STD-001C


The purpose of this form is to provide the Individuals or companies are invited to If you can provide input, please complete
Technical Committee of IPC with input submit comments to IPC. All comments this form and return to:
from the industry regarding usage of will be collected and dispersed to the IPC
the subject standard. appropriate committee(s). 2215 Sanders Road
Northbrook, IL 60062-6135
Fax 847 509.9798

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Requirement, paragraph number
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Unclear Too Rigid In Error
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2. Recommendations for correction:

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Submitted by:

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ASSOCIATION CONNECTING
ELECTRONICS INDUSTRIES
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