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    8 views19 pages

    EXTC

    Uploaded by

    ricks

    Copyright:

    © All Rights Reserved
    Download as PDF or read online from Scribd
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    of 19
    Ines -2013 CE) Namo f to Course: Digi Sigal Processing Come Cue UTC Tocca {G) All Questions are Compuliory 23. Drew sat iegrame wer rogue {@ Assume salable dnt iocrnry nd mention it [ Gaeion ae gn Sea serra a ree OTe) | Conta alg ig | es (2nate +) +con( naar —B) + anntanacn +3) i whee ttf sia il Te signa sampled athe rate of 40 spl par ond tat the tet al oie ar sing” i. Wha is thoaalog signal (0) ecoaracted om supls in pan ae eee ciate Deiermine impulse response of the following causal system. Plot pole] ‘ero dag State he syn ste wih jason “aT Jn —2}+ afm) OR Determine and sketch the magnitude and phase response of the filter characterized by the following difference equation. Sate the filter type from the magnitude response. Is it linear phase filter? Justify your 4 1 1 it lok = tod + Sate 21+ batn— 2) [| Q2G@) |For the input sequence x(n)-{12.12,3) applied to a Titer whose | imple response is given by Wn.) find the filer ouput using: i Linear convolution fi Circular convolution oR Explain overlap-add and overlapsave methods wsed to filer a long data sequence by FIR filter. ie ‘KI. Somaiya College of Engineering, Mumbar77 ‘hutnemoue Cale Aine to Univer of Mamba) | End Semester Exam May 2019 ‘Max. Marks:100 Duration: ‘Three hrs. Chase: TY, 0 @2W)_| State and prove following DFT properties Periodicity Symmetry Circular time shin Circular frequency shift v.__Time reversal [ veo By means oFDFT and IDFT determine the response ofthe FIR Hae wil impulse response tothe input bin = (1.2.33 adn = (1.22.0) 6 Soy ‘Compute the eight point DET of the following sequence using radic2 DIF-FFT algorithm. Skeich the flowgraph. Plot magnitude and phase saa 2. nao2se x00= (5 "Stherntoe oR ‘Compute the eight point DFT of the following sequence using radix-2 DIT-FFT algorithm. Sketch the low graph, Plot magnitude and phese response, x0) = 0124.12.34) 0 | ore Design @ causal FIR Bandpass filter of Tengih 7 using) Hamming window. The lower and upper cutoff frequencies are 3KHsz and 6K Hz respectively. The sampling frequency is 4KHz. iy C we Design a Tow pass digital Butterworth UR fer wo sally The Yllowing sequrements oa [H(em)] <10 forozwa™ (or) 502 for *2) ‘din’ forthe above code 1) Ihe received sequence is 10110, determine transmitted bit sequence, 10 Page20f2 15-05-9019 (E) KJ. Somaya College of Engineering, Mumbai-77 (Autonomous College Affiliated to University of Mumbal) nd Semester Examinations May-June 2019 Max. Marks:100 Duration: 3H Classi TY. Betech Semester: VI Name of ihe Course: Wireless Communication Branch: EXT Course Code: UETIONS Tnstruction (1) AMl Questions are Compulsory ‘Question ‘Marks No. QI (a) | Explain in detail Cink bude oF TOM Qi(e | Desaibo the factors which influence small sale fading. TOM oR, Write a notoon spectrum limitations in wireless communication, 10M, ‘G2@)_| Explain in detal coverage and capacity improvement techniques used in | 10M celular system. oR Desccive diferent channel assignment statogis used in cellular system. | 10M. “G2 | With respect to trunking theory describe following tems 10M, 5. Busy Hour ii, Traffic Imensity ii, Average call arrival rate jv. Average Call duration_v. Trunking efeiency and grade of service GE) _| Compare and contrast FOMA, TDM and CDMA. Tox GO) _ | Haplain in detal Direct Sequence Spread Spectra TOM i (DSSS) and Frequency Hopped Spread Spectrum (FHSS). GH) |DiseussIS-95 CDMA chads. —SSSSCS*~*~*~S~S«~C GHW) _| Draw and explain GSM architecture TOM OR DDeseribe algorithms used for authentication and security in GSM with | 10M iggrams, ‘Q5 (a) _| Explain differnt topologies that ar supported in ZigBee toohncloay. | 10M EW _| Write a shortnots on WiMax TOM oR ‘Write «short note on Wireless Local Area Network (WiFi) 10M Page 4/4 22S 20l9(E) a College of Engineer bs ae ‘Asians Calge Aad Ueno End Semester Exam ‘May-June 2019 Max. Marks: 100 s students Duration: Hours Chass: TY, BTeeky Fear ee ree ‘Name ofthe Couse: VLSI Design Branch: EXTC Course Cove: ETC 60% Thstruetions () All Questions are Compulsory (2) Draw neat diagrams Data given: KM/q= 0.026 V, ni= 1.45 x 10" em, €0~ 8.85 x 10" Flem, €51= 11.7°€0, Cox = 39°00, q= 16x10 Maks _| SECTION ‘emp any Tour from te Tolfowing= 1) Draw he cel dag oFtwo input NAND astewsing CMOS. | apy £& draw its stick diagram, 2) Explain constant vollage scaling 3) Draw VTC curve of siti CMOS inverter and show all eritieal wattage (Vi. Vie, Vou. Vou) on the plo 4) Implement 4:1 Multiplexer using NMOS pes tansisor logic, 5) Wiite drain curent (i) equations for NMOS devies in linen and saturation mode, 5)_Give the process steps of N-well CMOS technology in short. @2 | Attempt any four fom the folowing 0M 1) Compare types of inverters. with their merits, demerits ang | 2 appliations(any 3 points). 2) Explain ripple cary adder circuit 3) Explain advanages and disadvantages of Pass Transistor loge in USI Desi 4) Implement SR Mp-p using CMOS style 3) Define Noise margin NM and NM, (B5C) DB) using dynamic pull-down syle, 6) Implement ‘Multiple choice questions:~ (Each carry 1 Mark) 23° | Lum constant Voltage sealing , the power dissipation i-~ A Increased by factor § Decrease by factor S? B. remains Unchanged D Decreased by factor? 2. The condition for non saturated region is 8) Vis= Ves— Vt 1) Vis lesser han Ve ©) Vis lesser than Ves — Vi le Vis greater than Ves Ve @ © of depletion load NMOS Inverter cireuit over ‘enhancement type NMOS load is ‘A Fabrication processis easier” C, Sharp VTC Transition & bite noise ‘nargins B, Lower Power dissipation _D, Nove ofthese 4. With the advancement of CMOS technology — ‘Channel length is reduced C. Gate oxide thickness is reduced, 18, Powersupply volageis reduced. D.All ofthese, 5. The capacitance of» transistor gate is proportional to what? A. The width of the gate B. The length ofthe gate C.The aes of the gate D.The depth ofthe channel 6, The threshold voltage of an enhancement NMOS transistor is ‘A. Greater than OV B. less than ov . equal 19 0V D. None ofthese 17 Polysitcon is used for gate in MOSFET hecause-— A. Itissemi-metal B. thas latice matching with Si C:Itis easy to fabricate. None ofthese 8. Which ofthe following is true for an mos transistor operating in its linear or triode mod? (Vgs = gate to source voltage, Vas deen to source voltage, Vi threshold voltage) A.Vds < (Ves Vo) B.Vés> (ves- Vo) C.Ves

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