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fully edited. Content may change prior to final publication. Citation information: DOI
10.1109/TIA.2014.2387483, IEEE Transactions on Industry Applications
1

Filter Configuration and PWM Method For Single

Phase Inverters with Reduced Conducted EMI Noise
Mohammad H. Hedayati, Student Member, IEEE, and Vinod John, Senior Member, IEEE

Abstract—Electromagnetic Interference (EMI) noise is one of
the major issues during design of grid-tied power converters. A
novel LCL filter topology for a single-phase PWM rectifier that
makes use of bipolar PWM method is proposed for a single-phase
to three-phase motor drive power converter. The proposed topol-
ogy eliminates high dv/dt from the dc-bus common-mode voltage
by making it sinusoidal. Hence, the high frequency common-
mode current injection to the ground as well as the motor
side common-mode current is minimized. The proposed filter
configuration makes the system insensitive to circuit nonidealities
such as mismatch in inductors values, unequal turn on and turn
off delays, and dead time mismatch between the inverter legs.
Different variants of the filter topology are compared to establish
the effectiveness of the proposed circuit. Experimental results
based on EMI measurement on the grid side and the common-
mode current measurement on the motor side are presented for
a 5kW motor drive. It is shown that the proposed filter topology
reduces the EMI noise level by about 35dB.
Index Terms—AC-AC power conversion, AC motor drive, bipo-
lar PWM, conducted emissions (CEs), common mode current,
common mode voltage, single-phase PWM-Rectifier, unipolar
PWM.
I. I NTRODUCTION
U SE of grid-tied inverters are increasing dramatically
in applications such as battery chargers, regenerative
drives, front end converters for renewables, PWM-rectifiers,
and active filters. PWM-rectifier is suitable in motor drive
applications due to regenerative capabilities of the PWM-
rectifier [1], [2]. Compared to diode bridge rectifiers, PWM
rectifiers eliminate lower order harmonics. However, high-
frequency electrical noise is injected to the grid by PWM
rectifiers. Fast turn on and turn off of the IGBT generate
high dv/dt, which excites parasitic capacitances in the circuit.
This leads to injection of narrow peaky current to ground
that contains excitations at high frequencies of the spectrum.
This causes problems such as shaft induced voltage, bearing
currents, and EMI/EMC [3]–[7]. Standards such as CISPR 11
and IEC 61000 specify the limits of voltage disturbance on
the mains by power converters for industrial, commercial, and
domestic applications [8], [9]. Inverters with fast switches,
such as IGBTs, are the root cause of the aforementioned
problems. These problems get worse in the presence of a
This work is funded by the Department of Heavy Industry (DHI), Govern-
ment of India, under a project titled “Off-line and Real-time Simulators for
Electric Vehicle/ Hybrid Electric Vehicle Systems”.
Mohammad H. Hedayati is with the Department of Electrical Engineer-
ing, Indian Institute of Science (IISc), Bangalore 560012, India (e-mail:
mh49929@gmail.com).
Vinod John is with the Department of Electrical Engineering, In-
dian Institute of Science (IISc), Bangalore 560012, India (e-mail:
vjohn@ee.iisc.ernet.in).
PWM rectifier as the CM voltage imposed on the load is
higher. Combined electrical noise produced by PWM rectifier
and inverter, appears at the motor load terminals leading to
higher CM current. The issue becomes more severe when the
motor is connected to the inverter with long cables [10]–[12].
The EMI noise generated by a power converter has to be
kept within specified limits. Different solutions have been pro-
posed [13]–[19] to meet the EMI recommendations. Different
PWM methods and their CM voltage characteristics are stud-
ied in [13] with an objective of identifying the method with
lowest CM voltage for a three-phase Voltage Source Inverters
(VSI). In [14], a specific filter to eliminate the high-frequency
leakage current due to a grounded heat sink is presented, which
requires RC networks to be connected between the grid star
point, the machine neutral point, and the Y filter on the dc
bus. The number of additional components required for this
CM filter is high. A clamping filter is employed in [15]–[17]
to reduce the dv/dt, thus preventing voltage doubling at the
motor terminals. This also inhibits excitation of the parasitic
capacitances of the cable and motor, hence having lesser EMI
noise level. The energy from the clamp capacitors need to be
dissipated, which can be large if the clamp voltage has to be
close to the dc-bus voltage. Filter capacitors are introduced
between dc-bus positive rail to the ground and negative rail to
the ground in [18], which eliminates the CM voltage due to the
PWM rectifier. In [19] a CM filter is proposed for three-phase
PWM rectifier using conventional space vector pulse width
modulation (CSVPWM). In [20] it is shown that adding a CM
filter can result in oscillations. So, active damping is proposed
to damp the these oscillations. However, the implications on
the design of single phase PWM inverters have not been
considered in [13]–[19].
A topology to reduce the conducted EMI noise as well as
the dc-side leakage current is proposed in [21]. However, the
circulating current can be high and the proposed topology
uses an LLCL-filter that needs additional passive components.
In [22] an ac CM choke is added at the output of the inverter to
reduce the dc-side leakage current. However, the value of CM
choke inductance itself is much larger than that of the output
filter. In [23] ground current in a single phase grid connected
inverter is evaluated with different PWM methods and it is
shown that the bipolar PWM method results in lower ground
current when compared with unipolar PWM method. This
configuration can be sensitive to nonidealities like switching
delays in the legs of the inverter.
In this paper, the grid side CM equivalent circuit is for-
mulated from the CM voltage and current analysis. This is
used to analyse the implication of the PWM technique that

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MOTOR

Fig. 1. Conventional single phase grid-tied inverter with symmetrical LCL filter [?] connected to a three phase motor drive inverter with LC filter. The dotted
line indicates modification to the topology to make it insensitive to the nonidealities in the switches of the inverter.

is selected. It has been observed in [23] that bipolar PWM
method provides lesser leakage current. In this work based on
CM equivalent circuit, it is shown that it is the case for ideal
condition of the inverters. A novel modification is proposed
for the LCL filter topology that can overcome the issues
of inverter nonidealities, such as dead time and switching
timing mismatch between the legs of the single phase inverter.
Compared to the LCL filter for three phase system in [19],
the structure of the proposed LCL filter can avoid a set of Y
capacitor on the dc-bus for single phase case. The proposed
method is validated by experimental results carried out on a
laboratory prototype of a 5kW single phase grid-tied inverter
connected to a three phase induction motor drive. The effect
of nonidealities are studied by testing the set-up with unequal
dead-time given to the legs of the converter. The ground
leakage current for different cases is quantified. The EMI tests
are carried out for different cases and the best case is pointed
out. It is shown that there is a 40dB reduction in the noise
level in the proposed filter topology compared to the base line
condition.
II. G RID S IDE CM VOLTAGE A NALYSIS
The circuit in Fig. 1, without the dotted lines, shows a
conventional single phase grid-tied inverter with LCL filter
as suggested in [?], connected to a three phase motor drive
inverter with LC filter. In the shown topology, the filter
inductors are split into two and placed in the line and neutral.
In the proposed filter topology the filter capacitor is also
split into two series connected capacitors. It is shown that in
such configuration, when bipolar PWM is used, it is possible
to connect node “M” and “O”, which helps to reduce the
sensitivity of the circuit to the nonidealities of the inverter.
With the help of this filter configuration, it is possible to use
the LCL inductor in CM circuit to reduce the CM current.
The dc-bus CM voltage, vcm , of the conventional single phase
inverter shown in Fig. 1 is defined as,
vP g + vng
vcm = vOg = . (1)
2 the IGBT legs.
It has been shown in [24] that the common mode voltage
of the single phase grid-connected inverter in Fig. 1 can be
derived as:
dicom1 dicom2
vcm = 0.5L1 + 0.5L1 (2)
dt dt
+ 0.5Vdc (1 − Sa+ − Sb+ ) + 0.5eg .
Neglecting parasitic capacitances, Cp1 and Cp2 , and for the
case when the dotted connections of Fig. 1 are ignored, we
have i2 = −i02 and ic = −i0c . Hence (2) can be simplified as,
vcm = 0.5Vdc (1 − Sa+ − Sb+ ) + 0.5eg . (3)
The CM voltage derived, for circuit configuration shown in
Fig. 1, given in (3) depends on the dc-bus voltage, switching
states, and the grid voltage. It can be observed that for different
PWM methods, different CM voltage would appear at the dc-
bus.
III. PWM A NALYSIS
The high dv/dt in the CM voltage excites the parasitic
capacitances, which results in current injection to ground. In
this section it is shown that use of bipolar PWM method can
eliminate switching dv/dt in the CM dc-bus voltage. The CM
voltage given in (3) consists of two components, the sinusoidal
component which is the half of the grid voltage and the PWM
voltage which depends on the switching states. If the switching
states are such that the coefficient of the Vdc in (3) is constant,
then the effect of switching is eliminated in the CM voltage.
A. Unipolar PWM Method
In the case of unipolar PWM method, the modula-
tion signals, used to obtain the PWM pulses, are da =
M sin(ωt), db = −da . Where, M is the modulation index.
da and db are compared with carrier and fed to the switches.
From the switching states within a switching cycle, the value
of (1 − Sa+ − Sb+ ) can be shown to be 1, 0, − 1, 0 and 1.
This is depicted in Fig. 2(a). With this PWM method the CM
voltage would be having a pulsed waveform superimposed on
a sinusoidal. The δv value of the pulsed is 0.5Vdc and the δt
depends on how fast the switching action is taking place in

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(a) (b)

Fig. 2. Switching states of a single phase H-bridge inverter using (a) unipolar PWM method, (b) bipolar PWM method.

B. Bipolar PWM Method and (9) the CM equivalent circuit is as shown in Fig. 3. where,

In bipolar PWM method, the modulation signal is d = vAO + vBO

M sin(ωt). Sa+ is calculated by comparing the modulation
signal with the carrier. The Sb+ is equal to (1 − Sa+ ). Hence,
the term (1 − Sa+ − Sb+ ) is always equal to zero in (3) which
makes the coefficient of the Vdc equal to zero. This is shown
in Fig. 2(b). So, the high dv/dt due to switching actions are
eliminated in the dc-bus CM voltage based on (3) and it
consists of only sinusoidal waveform with amplitude of half
of the ac voltage.
Use of bipolar PWM method for single phase grid-
connected converters is suggested in [?] to reduce the ground
leakage current. However, the circuit is sensitive to the nonide-
alities. In the case of nonidealities like, dead time mismatch,
mismatch in inverter side inductors, unequal turn on and turn
off of the switches, and propagation delays, high frequency
pulses, with high dv/dt, are generated in CM voltage.
To obtain the same effective switching frequency, the bipolar
PWM switching frequency should be twice of the unipo-
lar PWM switching frequency. This causes higher switching
losses and lower efficiency in the power converter using
bipolar PWM. However, it is expected that in this case a
smaller EMI filter is needed, which has lesser losses. The
efficiency and loss evaluation of the overall system including
the EMI filter is out of scope of this work.
IV. CM C IRCUIT D ESIGN
The condition derived in Section III.B shows that it is
possible to connect the mid point of the dc-bus to the mid
point of ac filter capacitor without any circulating current in
the connection. The CM equations of the circuit are derived
in [24] and summarized in Appendix A. Based on (6), (7), (8)
vcon = = 0.5Vdc (1 − Sa+ − Sb+ ). (4)
2
With bipolar PWM the vcon = 0. Hence, there is no high dv/dt
to excite the parasitic capacitances Cp . However finite vcon is
generated in practice due to mismatch in dead-time, mismatch
of the two inductors, of nominal value L1 , that are placed in
phase and neutral, and delays in the circuit. If the dead-time
circuit is made of analog components, due to tolerances of
the capacitances and resistances, different values of dead-time
can be offered to the legs. This causes glitches to appear in
the CM voltage. To make sure these glitches do not excite
the parasitic capacitances, a path is provided within the filter
circuit. This path is recognized by connecting the points “O”
and “M” together, as shown by the dotted line in Fig. 1. With
this connection, if there are any glitches in the CM voltage
due to factors such as dead time, switching timing delay, or
mismatch between the legs of the inverter, etc. the CM current
will circulate inside the filter and will not pollute the grid. A
capacitor CM g is connected to ground which reduces the high
frequency voltage on the dc side of the inverter.
The CM g design is based on the guidelines suggested
in [19]. The capacitor CM g is small, of the order of tens
of nanofarad. So, at the low frequency it acts as an open
circuit. The grid side CM circuit at low frequency can be
approximated as shown in Fig. 4(a). The resonance frequency
of the filter, for low frequency approximation circuit, is given
by fres = 2π√1L C . As said before the vcon = 0 for bipolar
1
PWM method. Hence, the resonance frequency is not excited.
High frequency equivalent circuit of CM circuit shown in
Fig. 3 is depicted in Fig. 4(b). The capacitor CM g will reduce
the high frequency voltage between point “M” and “g”. The
voltage is divided between Cp1 , Cp2 and CM g as given in (5).
Cp1 and Cp2 represent the parasitic capacitances of semicon-

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Fig. 3. CM equivalent circuit of the single phase to three phase motor drive shown in Fig. 1.

TABLE I
S INGLE P HASE G RID - TIED INVERTER PARAMETER VALUES

SL.NO. PARAMETER PER UNIT ACTUAL

1 DC bus voltage Vdc 2.92 700V
2 Filter Inductance L1 = L2 24.5e − 3 900µH
3 Filter Inductance Lf 49e − 3 1.8mH
4 Filter Capacitance C 72e − 3 20µF
5 Filter Capacitance Cf 72e − 3 20µF
6 Filter Capacitance Cy 36e − 3 10µF
(a) 7 Filter Capacitor CM g 272e − 6 75nF

voltage at high frequencies.

(b)
Fig. 4. Grid side CM equivalent circuit of the filter with, (a) Low-frequency
approximation, (b) high-frequency approximation.
ductor chips to baseplate of the switch modules packages. By
keeping the value of CM g reasonably high in comparison to
Cp1 and Cp2 , the voltage vM g is reduced. However, a very
large value of CM g will lead to higher fundamental ground
leakage currents. CM g that gives an attenuation of 95% based
on (5) is used for the design. The use of CM g ensures that
any subsystem connected to the dc-bus will see a reduced CM
vM g Cp2
= (5)
vcon Cp1 + Cp2 + CM g
Addition of capacitor CM g can cause resonance oscillations
in the CM circuit. Due to the value of the CM g , which is small,
the resonance frequency is much higher than the switching
frequency. These oscillations need to be damped passively. A
RC branch is used in parallel with the capacitor CM g to damp
the resonance oscillations.
In the case of unipolar PWM, vcon is non zero. The
pulsed shaped would be as shown in Fig. 2(a). This pulsed
voltage will cause high current to circulate in the set-up and
it also excites the resonance frequency of the filter. Also, the
benefits of reduced output ripple in the filter inductors, due to
unipolar PWM, is lost. Hence, the use of unipolar PWM is not
beneficial for the proposed circuit topology, where as bipolar
PWM has the advantage of reduced CM voltage and ground
leakage current. The LCL filter components are selected using
method suggested in [25].
V. E XPERIMENTAL R ESULTS
A 5kW single-phase active rectifier connected to a three
phase motor drive prototype is built in the laboratory to
demonstrate the effectiveness of the proposed method. The
IGBT based converter has a switching frequency of 10kHz for

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Voltage
Current

C1 C1
C2

C1 DC1M C2 DC1M Timebase 0.0 ms C1 DC1M Timebase 0.0 ms

100V/div 10.0A/div 5.0ms/div 200V/div 5.0ms/div
0.0V offset 0.0V offset 100kS 2.0MS/s 0.0V offset 100kS 2.0MS/s

(a)
Fig. 5. Grid voltage and grid current of the power converter operating at
3kW as a UPF, 200V/div, 20A/div, 5ms/div.

the active rectifier when using bipolar PWM and 5kHz for the
case of unipolar PWM. The switching frequency of the motor
side inverter is 10kHz. The base values are Pbase =5kVA,
Vbase =240V, and fbase =50Hz. The base capacitance, and
inductance are derived as,
Pbase
Cbase = 2 ; Lbase =
2πfbase Vbase
The values are calculated to be, Cbase = 276µF and Lbase =
36.7mH, the designed parameter values are given in Table I.
A three phase, 415V, 5kW, 50Hz induction motor is connected
to the inverter. The motor is controlled using V/F scheme. For
loading purpose the shaft of the induction motor is coupled
with an doubly fed induction generator. This configuration
for testing the motor drive [26], allows circulation of power
and draws only losses from the grid. The PWM rectifier
is controlled using an outer voltage control loop, using PI
controller, and inner current controller loop using PR con-
troller. An Altera Cyclone II FPGA platform is used for the
implementation of the control algorithm. The power converter
is tested at 3kW to validate its normal operation as a grid-
tied converters. The results are depicted in Fig. 5. It can be
seen that the current is in-phase with the voltage, indicating
the unity power factor (UPF) operation. The grid current is
almost free of high frequency switching ripple indicating the
effectiveness of the LCL filter. However, it can be observed
that finite amount of lower order harmonics are presented in
the grid current. This is due to the presence of the lower order
harmonics in the grid voltage. This can be verified by looking
at the grid voltage; a flat peak is an indication for presence
of harmonics at the fifth, seventh, eleventh, etc, in the grid
voltage.
The rectifier was tested with both unipolar and bipolar
PWM method and the CM voltage, dc-bus midpoint to ground
voltage, is captured. For the case of unipolar PWM shown in
Fig. 6(a), it can be seen that a high frequency pulsed voltage
at 5kHz is superimposed on a 50Hz sinusoidal voltage. These
pulses have a high dv/dt of the order of 1kV/µs depending on
IGBT characteristics. This high dv/dt, which occur at every
instance of switching, excites the parasitic capacitances and
injects a peaky current to ground. On the other hand, CM volt-
age of the bipolar PWM shown in Fig.6(b) is sinusoidal with
magnitude of half of the grid voltage. Comparing Fig. 6(a) and
C1
2
Vbase
.
2πfbase Pbase C1 DC1M Timebase 10.0 ms
200V/div 5.0ms/div
0.0V offset 100kS 2.0MS/s
(b)
Fig. 6. CM voltage vcm (i.e. dc-bus midpoint to ground voltage) in the single
phase inverter, 200V/div, 5ms/div. (a) case “a” no CM filter with unipolar
PWM, (b) case “b” no CM filter with bipolar PWM.
Fig.6(b) lesser high frequency CM voltage is observed with
the bipolar PWM method.
In unipolar PWM method the effective switching frequency
is double the switching frequency. In the case of bipolar PWM
method the current ripple frequency is same as the switching
frequency. Hence, with unipolar PWM the ripple current in L1
is effectively reduced by half. Comparing bipolar with unipolar
PWM method, the bipolar PWM needs to operate its legs at
twice of the switching frequency to obtain the same level of
ripple current in inductor L1 as in the case of unipolar PWM.
The setup has been tested in a large number of configura-
tions, out of which the following four cases are of interest.
Case a) no CM filter with unipolar PWM.
Case b) no CM filter with bipolar PWM [?].
Case c) with “OM” connection and with bipolar PWM.
Case d) with “OM” connection and the capacitor CM g
and with bipolar PWM.
Case “d” corresponds to the proposed filter configuration
including all the dotted connections shown in Fig. 1.
The set-up has been tested at 70% loaded, with unipolar
PWM, and bipolar PWM with and without the proposed filter
circuit configuration. Power losses and the efficiency have
been measured by the help of YOKOGAWA WT1600 and the
results are tabulated in Table II. The switching frequency of
bipolar PWM is twice of unipolar PWM. This cause higher
switching losses and lower efficiency. It can be seen that the
efficiency is reduced by 2.88% while using bipolar PWM
method. The losses and the efficiency of the set-up using

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F1
F1 FFT(C1)
20dB/div
1.00MHz/div
(a)
F1
F1 FFT(C1)
20dB/div
1.00MHz/div
(b)
Fig. 7. EMI noise level comparison, (a) case “a” no CM filter with unipolar
PWM, (b) case “b” no CM filter with bipolar PWM. 20dBV/div, 1MHz/div.
bipolar PWM with proposed filter configuration has been
measured. It is seen that addition of the proposed circuit
topology does not further reduce the efficiency of the power
converter.
To estimate the effectiveness of the proposed filter, con-
ducted noise emission test has been carried out by connecting
a single-phase line impedance stabilization network (LISN).
The LISN prevents noise from the mains to converter set-
up, which can affect the test results. It also provides a 50Ω
match connectors for the receiver. The LISN is used with a
high-frequency oscilloscope (500 MHz, 5 GSa/s, Lecroy 6050)
as a receiver [27]. The data captured are processed by the
oscilloscope and the FFT of the waveforms are shown in Fig. 7
for the frequency range up to 10MHz.
Fig. 7(a) shows the EMI noise level with the unipolar
PWM and switching frequency of Fsw =5kHz (case “a”).
The EMI noise level with the bipolar PWM and Fsw =10kHz
is shown in Fig.7(b) (case “b”). It can be seen that just
by using the bipolar PWM method with double switching
frequency we can reduce the EMI peak around 0.2MHz by
about 20dB. However, due to switching nonidealities this
situation is altered. The results for cases “c”, and “d” are
shown in Fig. 8. It can be seen that the least EMI noise
level corresponds to the case “d” (with “OM” connection and
the capacitor CM g ). Comparing case “c” and “d”, the peak
at 0.2MHz is eliminated and the peak at 3.4MHz is reduced
about 10dB. Comparing cases “a” and “d” it can be seen that
in case “d” the peak 0.2MHz is reduced about 40dB, peak at
0.9MHz is eliminated and peak around 3MHz is reduced by
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F1
F2
Timebase 0.0 ms F1 FFT(C1) F2 FFT(C2) Timebase 0.0 ms
1.0ms/div 20dB/div 20dB/div 1.0ms/div
1MS 100MS/s 1.00MHz/div 1.00MHz/div 1MS 100MS/s
Fig. 8. EMI noise level comparison with different filter configuration and with
bipolar PWM. Top, case “c” with “OM” connection (F1 ). Bottom (F2 ), case
“d” with “OM” connection and with capacitor CM g . 20dBV/div, 1MHz/div.
TABLE II
P OWER LOSSES AND EFFICIENCY WITH BIPOLAR AND UNIPOLAR PWM.
Case Losses (W) Efficiency
a 204 93.86%
b 309.5 90.98%
c&d 308.7 90.99%
Measurement made at 3.5kW load.
Timebase 0.0 ms
1.0ms/div
1MS 100MS/s
about 5dB.
To see the effectiveness of the proposed CM filter, the setup
has been tested with unequal dead times. In the ideal case both
legs of the active rectifier uses dead-time of 3µs. Mismatch in
the dead time and different delays in the circuit is simulated
by reducing the dead-time in one of the legs by 1µs. The
results are shown in Fig. 9. Fig. 9(a) shows the CM voltage, as
suggested in [?]. It can be seen that the high frequency pulses
with magnitude of Vdc /2 are super imposed on the sinusoidal
voltage. This can inject high peaky current to ground. Fig. 9(b)
shows the CM voltage with proposed CM filter. It can be seen
that with the proposed filter the CM voltage stays sinusoidal
even when the dead times are not equal. Fig. 10 shows the
EMI noise level, when unequal dead time is introduced to the
system. By comparing Fig. 10(a) and Fig. 10(b) it can be seen
that, the amount of current injected to the ground is reduced
and the EMI noise level is reduced by about 20dB at 200kHz
and 10dB at 900kHz with the proposed filter,.
The grid side and the motor side CM currents have been
measured in all the tests and the results are tabulated in
Table III. Comparing case “d” with case “a” it can be seen
that the CM current is reduced by more than four times
at the grid side and about 21 times at the motor side in
case “d”. However, the grid side CM current in case “d”
is slightly higher than the cases “b”. This is not a problem
as long as the difference is small and the value is within
the acceptable standard limits. For instance, standard VDE
V 0126-1-1 indicates that the PV system leakage currents
should not be higher than 300mA and in the case of violations
the system must be disconnected within 0.3 seconds [28].
The motor side ground leakage current with the proposed
filter configuration is the least among all the cases. It can be
observed that with the proposed filter configuration, given in
case “d” and shown in Fig. 1, the system is insensitive to the
dead-time mismatch. The grid side and the motor side ground
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C1 F1

C1 DC1M Timebase 10.0 ms F1 FFT(C1) Timebase 0.0 ms

200V/div 5.0ms/div 20dB/div 1.0ms/div
0.0V offset 100kS 2.0MS/s 1.00MHz/div 1MS 100MS/s

(a) (a)

C1 F1

C1 DC1M Timebase 10.0 ms F1 FFT(C1) Timebase 0.0 ms

200V/div 5.0ms/div 20dB/div 1.0ms/div

0.0V offset 100kS 2.0MS/s 1.00MHz/div 1MS 100MS/s

(b) (b)

Fig. 9. CM voltage with unequal dead time (a) without the CM filter, (b) Fig. 10. EMI noise level with unequal dead time (a) without the CM filter,
with the CM filter. 200V/div, 5ms/div. (b) with the CM filter. 20dBV/div, 1MHz/div.

TABLE III
C ASE STUDIES OF GRID SIDE AND MOTOR SIDE CM CURRENT VALUES
WITH EQUAL DEAD TIME OF 3µs AND WITH UNEQUAL DEAD TIME OF 3µs frequency CM voltage. The experiments on the laboratory
AND 2µs. prototype show that the CM voltage with bipolar PWM is
Case Grid Side CM Current (mA) Motor Side CM Current (mA) sinusoidal. The conducted noise emission test has been carried
Equal DT Unequal DT Equal DT Unequal DT out, which confirms the effectiveness of the proposed method,
a 231.2 —— 97.4 —— by which the peak noise in the EMI spectrum was reduced
b 45.8 82.5 25.7 37.2
c 56.2 56.3 13.8 13.9 by 35dB. CM current measurement on a 5kW laboratory
d 49.5 49.7 4.5 4.6 prototype indicates that the proposed CM filter configuration
using bipolar PWM method will reduce the grid side CM
current by more than four times and the motor side CM current
is reduced by 21 times when compared with a baseline case
leakage current remain almost the same with and without the
that utilizes unipolar PWM method and without such a filter.
nonidealities.

A PPENDIX A
VI. C ONCLUSION
An LCL filter configuration that can be used with a single The CM equations of the circuit are derived in [24] and
phase inverter that leads to reduced CM current EMI is given here.
proposed. The CM voltage for the topology is derived and Vdc + dicom1 vcaM + vcbM
it is shown that the CM voltage depends on the circuit config- (Sa + Sb+ − 1) = 0.5L1 + (6)
2 dt 2
uration and also depends on the PWM method. Unipolar and
bipolar PWM methods have been analysed. Using switching vcaM + vcbM dicom2
function analysis it is shown for the proposed filter configu- = 0.5L2 + 0.5eg − vM g (7)
2 dt
ration that the CM voltage at the dc-bus will be sinusoidal if
bipolar PWM is used. The modification of connecting LCL
d vcaM + dvcbM
filter midpoint to the dc-bus midpoint ensures that there is imid = 2C ( ) (8)
no high frequency common mode excitation of the power dt 2
dvM g
converter parasitics even under non ideal conditions of the iM g = CM g (9)
inverter. The circuit is modified to make the system insensitive dt
to the nonidealities of the inverter. The capacitor CM g ensures With the help of (6), (7), (8) and (9) the CM equivalent circuit
that subsystems connected to the dc-bus experience low high is drawn and is depicted in Fig. 3.

0093-9994 (c) 2013 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See
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This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI
10.1109/TIA.2014.2387483, IEEE Transactions on Industry Applications
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Mohammad H. Hedayati (S’14)was born in Kaze-
roon, Iran, in 1984. He received his B.Tech. degree
in electrical engineering from the Islamic Azad
University, Kazeroon, Iran, in 2006, the ME. degree
from the Indian Institute of Science (IISc) Banga-
lore, India in 2010. He is currently a PhD. student at
the Indian Institute of Science Bangalore, India. His
primary areas of interests are in power electronics,
motor drives, active damping, common mode filters
and high-power converters.
Vinod John (S’92-M’00-SM’09) received the
B.Tech. degree in electrical engineering from the
Indian Institute of Technology, Madras, India, the
M.S.E.E. degree from the University of Minnesota,
Minneapolis, and the PhD. degree from the Univer-
sity of WisconsinMadison, Madison. He has worked
in research and development positions at GE Global
Research, Niskayuna, NY, and Northern Power, VT.
He is currently working as an Assistant Professor
with the Indian Institute of Science, Bangalore,
India. His primary areas of interests are in power
electronics and distributed generation, power quality, high-power converters,
and motor drives.