‘nitv2020 ‘What is Logie Buln Self Test (L8IST) Gift your child a dice-themed seating Embedded with shapes and sizes for cog 100% home-made, 30-day Money back guarantee for manufac Just Rupees 1299/- for single pi 20% off on a pair. Available in 10” size Contact for orders and queries - +919¢ Boas pon What is Logic Built-in Self Test (LBIST) NORTH_IND LBIST stands for Logic Builtin Self Test. As VLSI marches to deep sub-micron tochnolagies, LBIST is gaining importance due to the unique advantages it PINS provides. LBIST refers to a selttest mechanism for testing random logic. The logic Eye ve can be tested with no intervention from the outside world In other words, a piece of hardware andior software is inbuilt into an integrated crcult to test itself. By random logic, is meant any form of hardware (logic gates, memories ete.) that can form a part or whole of the chip. A generic LBIST system is implemented using STUMPS (Sel-Test Using MISR and PRPG) architecture, A typical LBIST system is as ‘shown inthe figure below: Figure 1 typieal LBIST systom ‘Components of an LBIST system: A typical LBIST system comprises following 1. Logic to be tested, or, as is called Circuit Under Test (CUT): In case of LBIST, the logic to be tested through LBIST is the Circuit under Test (CUT), ‘Any random logic residing on the chip can be brought under LBIST following a certain procedure. 2, PRPG (Pseude-Random Pattern Generator): A PRPG generates input patterns that are applied to intemal scan chains of the CUT for LBIST testing, In other words, PRPG acts as a Test Pattern Generator (TPG) for LBIST. A PRPG can elther use a counter ot an LFSR for pattern generation. hitpssisiuniverse blogspot com/2014/ttAbist hil ‘About Me VLSI UNIVERSE View my complete F Blog Archiv Suggest a tonic *+MOS tory + important STA Co ‘Late ining and ‘Clocks and clock + Reset timing and + clock gating cone ‘Timing exception: +8TA problems + Lose Design Prot + Basi loge cect + Digital design Cot + Metastabity and + Physical design + DFT topies + VHDL Tet + Software topics + Pussies and brain ‘Suggest atopicsnitv2020 o Perform-o-animate 20 Cartoons: MBIST (Memory Bultln Sel Tet) Emo testing Metastabi= Clock gat ‘What is Logie Bultn Self Tet (L8IST) 3. MISR (Multitnput Signature Register): MISR obtains the response of the device to the test patterns applied, An incorrect MISR output indicates @ defect in the CUT. In classical language, MISR acts as a ORA (Output Response Analyzer) for LBIST testing, 4. A master (LBIST controller): The controller controls the functioning of the LBIST; je. clocks propagation, intialization and scan patterns flow in and out of the LBIST scan chains One of the most stringent requirements in LBIST testing is the prohibition of X- sources. There cannot be any source of X’ during LBIST testing. By °X’, is meant a definite, but unknown value, It might be elther “0 or 7, but it is not known what value is being propagated. All X-sources are masked and a known value is allowed to be propagated in LBIST. Why *X' is prohibited in LBIST: As stated above, there cannot be any propagating during LBIST testing. The reason behind this is that LBIST involves MISR to calculate the signature of the LBIST pattems. Since, the resulting signal is unique, any unknown value can result in the coruption of the signature. So, there cannot be any X' in LBIST testing. Advantages of LBIST: As stated above, there are many unique advantages of LBIST that make it desirable, especially in safely criical designs such as those used in automobiles and aeroplanes. LBIST offers many advantages as listed below: + LBIST provides self-test capability to logic inside chip; thus, the chip can test itself without any external control and interference. + This provides the ability to be tested at higher frequencies reducing test time considerably, + LBIST can run while the chip is on fleld running functionally, Thus, itis very useful in safety critical applications wherein faults developed on fold can be easily detectable at startup before chip goes into functional mode, Overheads due to LBIST: Along with many advantages, there are some ‘overheads due to LBIST as mentioned below: (The LBIST implementation involves some hardware on-chip to control LBIST. So, there are area and power impacts due to these. In other ‘words, the cost of chip increases. Also, °X-masking involves addition of extra logic gates in already timing critica functional signals causing impact on timing as well wy Another disadvantage of using LBIST is that even the on-chip test equipment may fail. This is not the problem with testing using outside equipment with proven test circuitry 1. Identification and reduction of safe-stating points in LBIST designs 2, Logic builtin self-test 3. Calgon 88 vrfeaton thie list SoCs Alsons ‘+ MBIST (Memory BuiltIn Self Test) + Lockup latch « principle, application and timing + Controllability and observabiliy - basics of DFT + X-propagation through diferent logic gates hitpssisiuniverse blogspot com/2014/ttAbist him!‘nitv2020 ‘What is Logie Bultn Self Tet (L8IST) ‘+ Meyer's singleton pattern Labels: Design basics, DFT, Digital systom design, LBIST, STA No comments: Post a comment “Thanks for your valuable inputstfeedbacks, Q mere meinen © Newer Post Home Older Post ‘Subscribe to: Post Comments (Atom) ro sires VLSI Logic Design Interview = ‘Questions Select Language | ponent Sood Tonle Name Email* Mossage* My sitemap Powered by Blogger. hitpssisiuniverse blogspot com/2014/t1Abist him! 39