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A B C D E

CHIPSET P4M800_CE + VT8237_PLUS


M SI
MS-7211 Ver:0A TITLE SHEET
COVER SHEET 1
4
CPU: 4

BLOCK DIAGRAM 2
Intel Prescott LGA775 -Mainstream CPU
PWR And CLOCK Map 3

System Chipset: GPIO/MEMORY/PCI/HW STRPPING 4


North Bridge : VIA P4M800 Ver:CE PROCESSOR ( Intel LGA775) 5,6,7
South Bridge : VIA VT8237R Plus
NORTH BRIDGE P4M800_CE 8,9,10,11
On Board Chipset: DIMM1&2 12
LPC Super I/O -- W83627EHF
DIMM1&2 Terminations 13
LAN --- RTL 8100C (10/100) / 8110SB (Giga)
AC'97 Codec --Realtek ALC655 AGP SLOT 14
BIOS --LPC FLASH ROM VGA Connector 15

Clock Generator RTM862-520 / ICS950917AF 16


3
CLOCK Chip : 3

CLOCK Generator -- Realtek RTM862-520 SOUTH BRIDGE (VT8237R Plus) 17,18,19


/ ICS ICS950917AF PCI Slot 1 & 2 20

Main Memory: Realtek 8100C/8110SB 21


DDR * 2 (Max 2GB) 22
Super I/O & FAN 83627EHF-D

AC97 Realtek ALC655 23


Expansion Slots:
PCI 2.3 SLOT * 2 IDE Connectors , KB/MS 24

USB Connectors 25
PWM:
VRM10.1 Intersil 6566 3Phase COM / Parallel Port 26

MS7 ACPI Controller 27

2 VRM 10.1 - Intersil 6566_3 Phases 28 2

ATX & F_Panel & BIOS 29

PCB Components & EMI 30

1 1

MICRO-START INT'L CO.,LTD.


Title
C O VER SHEET
S ize D o c u m e n t Number Rev
Custom M S-7211 0A
Date: Thursday, July 28, 2005 S h eet 1 of 32
A B C D E
1

Block Diagram
mainstream
VRM 10.1 TDP=84W
Intersil 6566 Intel Prescott Processor-LGA775 Iccmax=78A
Icctdc=68A
3Phase

FSB
2X/4X/8X
AGP 1.5V 64bit DDR

Connector P4M800_CE 2 DDR


DIMM
VCORE= +2.5VNB
VDIMM= +2.5VDIMM
Modules
VDDQ= +1.5VAGP
VLINK= +2.5V

V-Link/8bits/S533M

UltraDMA 33/66/100 PCI CNTRL


IDE Primary

PCI Slot 1

PCI Slot 2
IDE Secondary PCI ADDR/DATA
VT8237_PLUS
USB Port 0 PCI
A VCC25= +2.5V
VCC33= +3.3V
LAN A

USB Port 1 Realtek


8100C/8110SB
USB Port 2 USB
LPC Bus

USB Port 3

USB Port 4
LPC SIO
USB Port 5 W inbond
83627EHF
USB Port 6

USB Port 7

AC'97 Link LPC FLASH Serial


FDD Parallel
AC'97 Codec ROM X2

SATA prot1 and KEYBOARD


port2

MOUSE

MICRO-START INT'L CO.,LTD.


Title
BLOCK DIAGRAM
Size D o cument Number Rev
Custom MS-7211 0A
Date: Thursda y, July 28, 2005 Sheet 2 of 32
1
8 7 6 5 4 3 2 1

P4M800_CE PLATFORM POWER DELIVERY MAP


P4M800 PLATFORM CLOCK GENERATOR MAP 3.3V 5V 5VSB 12V

PROCESSOR VCCP 1.2V~1.425V


VRM
D PROCESSOR 1.2V D

Intel LGA775 Processor


1.2V VREG
CPU HOST AGP SLOT 1.5V
CLK
2.5V VREG
GUICK NB GCLK_NB 66MHz NORTH BRIDGE VCCP
DCLKO
P4M800_CE 1.5V VREG NORTH BRIDGE VCC_AGP
DCLKI
NORTH BRIDGE +2.5V 3A
CLOCK GENERATOR

3VSB VREG NORTH BRIDGE SYSEM MEMORY


VCC_DDR
MEM CLK 2 DDR DIMM
0~5/CLK#0~5
Modules DDR 2.5V DDR DIMM1 / DIMM2 / DIMM3 2.5V
VREG
C 14.318MHZ SB14MHz VTT 1.25V DDR VTT 1.25V C

VREG
33MHz APIC
VCLK
48MHZ USB VT8237R_PLUS 2.5V VREG
SOUTH BRIDGE +2.5V 550mA Vlink=70mA

150mA
SOUTH BRIDGE VCC3
SPCLK
2.5VSB 10mA
SOUTH BRIDGE RESUME 2.5V_SB
VREG
FWH_CLK FWH 120mA
SOUTH BRIDGE RESUME VCC3_SB

SOUTH BRIDGE RTC 3.3V

PCI CLK 1~2 PCI Slot 1~2


LAN VCC3_SB
Realtek 8100C/8110SB
25MHZ from Crystal
B FWH 3.3V B

SIOPCLK LPC SIO


Winbond LPC SUPER I/O 3.3V
SIO48MHZ 83627EHF-E
LPC SUPER I/O VCC5

AC97XIN CK-409 3.3V


AL C655

AGP CLK AC97 VDD5 AC97 VDD5


AGP SLOT VREG

+12V : 0.1U 25V X 5


A +12V_MOS: 4.7U 35V X 1 A

1U 16V X 2
1000U 16V X 4
MICRO-START INT'L CO.,LTD.
Title
PWR And CLOCK Map
Size Document Number Rev
Custom MS-7211 0A
Date: Thursday, July 28, 2005 Sheet 3 of 32
8 7 6 5 4 3 2 1
1

VT8237R_PLUS GPIO Function Define


Default Default
PIN NAME Function Function define PIN NAME Function Function define USB Port DATA +/- OC#
GPI0
GPO0 (VDDS) GPO0 4.7K ohm Pull up to VCC3_SB (VBAT) GPI0 1M ohm Pull up to VBAT USB1-
I1394_USB1 USB1+
GPI1 USB0-
GPO1(VDDS) GPO1 4.7K ohm Pull up to VCC3_SB (VSUS3) GPI1 ATADET0=>Detect IDE1 ATA100/66 USB0+ OC#1
Rear
GPO2/SUSA# GPI2/EXTSMI# ( OC#0~3 )
(VDDS) SUSA# 4.7K ohm Pull up to VCC3_SB (VSUS3) EXTSMI# 4.7K ohm Pull up to VCC3_SB USB2-
LAN_USB1 USB2+
GPI3/RING# USB3-
GPO3/SUSST#(VDDS) SUSST# 4.7K ohm Pull up to VCC3_SB (VSUS3) RING# RING# 4.7K ohm Pull up to VCC3_SB USB3+
GPI4/LID#
GPO4/SUSCLK(VDDS) SUSCLK 4.7K ohm Pull up to VCC3_SB (VSUS3) LID# ATADET1=>Detect IDE2 ATA100/66 USB4-
JUSB1 USB4+
USB6-
GPO5/CPUSTP# CPUSTP# 4.7K ohm Pull up to VCC3 GPI5/BATLOW# (VDDS) BATLOW# 4.7K ohm Pull up to VCC3_SB USB6+
Front OC#4
GPO6/PCISTP# PCISTP# 4.7K ohm Pull up to VCC3 GPI6/AGPBZ AGPBZ 4.7K ohm Pull up to VCC3 USB5- ( OC#4~7 )
JUSB2 USB5+
USB7-
GPO7/GNT5 GPO7 8.2K ohm Pull up to VCC3 GPI7/REQ5 GPI7 8.2K ohm Pull up to VCC3 USB7+

* GPO8/GPI8/VGATE GPI8 4.7K ohm Pull up to VCC3 * GPI8/VGATE GPI8 4.7K ohm Pull up to VCC3

* GPO9/GPI9/UDPWREN UDPWREN NC * GPI9/UDPWREN UDPWREN NC PCI RESET DEVICE


* GPO10/GPI10/PICD0 GPI10 1K ohm Pull up to VCC3 * GPI10/PICD0 GPI10 1K ohm Pull up to VCC3 Signals Target
PCIRST#1 PCI slot 1-2
* GPO11/GPI11/PICD1 GPI11 1K ohm Pull up to VCC3 * GPI11/PICD1 GPI11 1K ohm Pull up to VCC3 PCIRST#2 NB , Super I/O , LPC, LAN
* GPO12/GPI12/INTE# GPI12 8.2K ohm Pull up to VCC3 * GPI12/INTE# GPI12 8.2K ohm Pull up to VCC3 HD_RST# Primary, Scondary IDE

* GPO13/GPI13/INTF# GPI13 8.2K ohm Pull up to VCC3 * GPI13/INTF# GPI13 8.2K ohm Pull up to VCC3

DDR DIMM Config.


* GPO14/GPI14/INTG# GPI14 8.2K ohm Pull up to VCC3 * GPI14/INTG# GPI14 8.2K ohm Pull up to VCC3

* GPO15/GPI15/INTH# GPI15 8.2K ohm Pull up to VCC3 * GPI15/INTH# GPI15 8.2K ohm Pull up to VCC3 DEVICE ADDRESS CLOCK
GPO20/GPI20
/ACSDIN2/PCS0#
GPI20/ACSDIN2
4.7K ohm Pull down
GPI16/INTRUDER#
INTRUDER# 1M ohm Pull up to VBAT DCLKA0/MDCLKA#0
(VBAT)
GPO21/GPI21/ACSDIN3 GPI21/ACSDIN3 DIMM 1 1010000B DCLKA1/MDCLKA#1
/PCS1#/SLPBTN# 4.7K ohm Pull down GPI17/CPUMISS CPUMISS 4.7K ohm Pull up to VCC3_SB DCLKA2/MDCLKA#2
DCLKA3/MDCLKA#3
A A

GPO22/GPI22/GHI# GPI22 4.7K ohm Pull up to VCC3 GPI18/AOLGP1/THRM# AOLGP1 4.7K ohm Pull up to VCC3_SB
DIMM 2 1010001B DCLKA4/MDCLKA#4
GPO23/GPI23/DPSLP GPI23 4.7K ohm Pull up to VCC3 GPI19/APICCLK APICCLK APICCLK DCLKA5/MDCLKA#5
GPO24/GPI24 /GPIOA GPI24 BSEL1

GPO25/GPI25 /GPIOB GPI25 4.7K ohm Pull down


PCI Config.
GPO26/GPI26/SMBDT2
(VDDS) SMBDT2 2.7K ohm Pull up to VCC3_SB DEVICE MCP1 INT Pin REQ#/GNT# IDSEL CLOCK CLK GEN PIN OUT
GPO27/GPI27/SMBCK2 PCI Slot 1 PIRQ#B PCIREQ#1 AD19 PCI_CLK1 14
(VDDS) SMBCK2 2.7K ohm Pull up to VCC3_SB PIRQ#C PCIGNT#1
GPO28/GPI28/VIDSEL
GPO28
/VIDSEL SATA_LED PIRQ#D
GPO29 PIRQ#A
GPO29/GPI29/VRDSLP /VRDSLP 4.7K ohm Pull down PCI Slot 2 PIRQ#C PCIREQ#2 AD20 PCI_CLK2 15
GPO30/GPI30 /GPIOC GPI30 BSEL0 PIRQ#D PCIGNT#2
PIRQ#A
GPO31/GPI31 /GPIOD GPI31 4.7K ohm Pull down PIRQ#B

PIRQ#E AD17 LAN_CLK 11


PCIREQ#0
LAN 8110SB PCIGNT#0

MICRO-START INT'L CO.,LTD.


Title
GPIO/MEMORY/PCI/HW STRPPING
Size D o cument Number Rev
Custom
MS-7211 0A
Date: Thursday, July 28, 2005 Sheet 4 of 32
1
8 7 6 5 4 3 2 1

CPU SIGNAL BLOCK


VCC_V RM_SENSE [28]
VSS_VRM _SENSE [28]

TP3
VID[0..5] [28]
[8] HA#[3..33]

D D

V ID5
V ID4
V ID3
V ID2
V ID1
V ID0
HA#33
HA#32

HA#21
HA#20
HA#19

HA#10
HA#31
HA#30
HA#29
HA#28
HA#27
HA#26
HA#25
HA#24
HA#23
HA#22

HA#18
HA#17
HA#16
HA#15
HA#14
HA#13
HA#12
HA#11

HA#8
HA#7
HA#6
HA#5
HA#4
HA#3
HA#9

AM7
AM5

AM3

AM2
AG5
AG4
AG6
AH5
AH4

AC5

AD6

AC2

AN3
AN4
AN5
AN6
AB4

AB5
AA5

AA4

AB6

AK3

AK4
AF4
AF5

AL4

AL6

AL5
AJ6
AJ5

AJ3
W6

W5

M4

M5
U4
U5

U6

R4
Y4
Y6

V4
V5

P6
T4

T5

L4

L5
U5A
R32 62R0402

ITP_CLK1
ITP_CLK0
DBR#
A35#
A34#
A33#
A32#
A31#
A30#
A29#
A28#
A27#
A26#
A25#
A24#
A23#
A22#
A21#
A20#
A19#
A18#
A17#
A16#
A15#
A14#
A13#
A12#
A11#
A10#
A9#
A8#
A7#
A6#
A5#
A4#
A3#

VID7#
VID6#
VID5#
VID4#
VID3#
VID2#
VID1#
VID0#
VCC_SENSE
RSVD
RSVD

VSS_SENSE
H DBI#0 A8
[8] HDBI#[0..3] DBI0#
H DBI#1 G11
H DBI#2 DBI1#
D19 AN7
H DBI#3 DBI2# VID_SELECT CPU_GTLRE F0
C20 H1 CPU_G TLREF0 [6]
DBI3# GTLREF0 CPU_GTLRE F1
H2 CPU_G TLREF1 [6]
-EDRDY GTLREF1 GTLREF_SEL
TP14 F2 H29 TP8
IERR# EDRDY# GTLREF_SEL
[6] IERR# AB2
IERR# H_BPM#5 RN3A
AB3 AG3 2 1 VTT_OU T_RIGHT
MCERR# BPM5# H_BPM#4 RN4B 8P4R-51R
[6,19] FERR# R3 AF2 4 3
FERR#/PBE# BPM4# H_BPM#3 RN4D 8P4R-51R
[19] STP CLK# M3 AG2 8 7
STPCLK# BPM3# H_BPM#2 RN6C 8P4R-51R
AD3 AD2 6 5
BINIT# BPM2# H_BPM#1 RN3B 8P4R-51R
[19] HINIT# P3 AJ1 4 3
INIT# BPM1# H_BPM#0 RN3C 8P4R-51R
H4 AJ2 6 5
RSP# BPM0#

[8] HDB SY# B2 G5 TP9


DBSY# PCREQ# H REQ#4
[8] HDRDY# C1 J6 HREQ#[0..4] [8]
DRDY# REQ4# H REQ#3
[8] HTRDY# E3 K6
TRDY# REQ3# H REQ#2
M6
REQ2# H REQ#1
[8] HADS# D2 J5
ADS# REQ1# H REQ#0
[8] HLOCK# C3 K4
LOCK# REQ0#
[8] HBNR# C2
C BNR# H_TESTHI12 R50 62R C
[8] HIT# D4 W2
HIT# TESTHI12 H_TESTHI11 RN13A 1 8P4R-62R
[8] HITM# E4 P1 2
HITM# TESTHI11 H_TESTHI10 RN13B 3 8P4R-62R
[8] HBPRI# G8 H5 4
VTT_OU T_RIGHT BPRI# TESTHI10 H_TESTHI9 RN13D 7 8P4R-62R
[8] HDE FER# G7 G4 8
DEFER# TESTHI9 H_TESTHI8 RN13C 5 8P4R-62R
G3 6 VTT_OUT_ LEFT
RN6B 8P4R-51R H_ TDI AD1 TESTHI8
3 4 F24
RN4A 8P4R-51R H _TDO AF1 TDI TESTHI7
1 2 G24
RN6A 8P4R-51R H_TMS AC1 TDO TESTHI6
1 2 G26
RN4C 8P4R-51R H_TRS T#AG1 TMS TESTHI5
5 6 G27
RN6D 8P4R-51R H_TCK AE1 TRST# TESTHI4
7 8 G25
TCK TESTHI3 H_TESTHI2 _7 R84 62R
[22] CPU _TMPA AL1 F25 V_FSB_V TT
THERMDA TESTHI2 H_TESTHI1 R55 62R
[22] VTIN_GND AK1 W3
THERMDC TESTHI1 H_TESTHI0 R85 62R
[6,29] THERMTRIP# M2 F26
THERMTRIP# TESTHI0 RSVD_AK6 R44 X_62R
[18] CPUMISS AE8 AK6 VTT_OU T_RIGHT
GND/SKTOCC# RSVD RSVD_G6 R74 X_62R
[6] PRO CHOT# AL2 G6
PROCHOT# RSVD
[19] IGNNE# N2
IGNNE#
[19] SMI# P2 G28 CPUCLK# [16]
SMI# BCLK1#
[19] A20M# K3 F28 CPUCLK [16]
A20M# BCLK0#
[19] SLP# L2
SLP# H RS#2
A3 HRS#[0..2] [8]
RS2# H RS#1
AH2 F5
RSVD RS1# H RS#0
N5 B3
VTT_OU T_RIGHT RESERVED0 RS0#
AE6
RESERVED1 -HAP1
C9 U3
RESERVED2 AP1# -HAP0 -HAP1 [8]
G10 U2
C30 X_C0.1U25Y RESERVED3 AP0# -HAP0 [8]
D16 F3 HBR#0 [6,8]
RESERVED4 BR0# H_COMP5 R59 60.4R1%
A20 T2 VTT_OUT_ LEFT
RESERVED5 COMP5 H_COMP4 R65 60.4R1%
J2
V TT_OUT_RIGHT R56 X_1KR CPU_BOOT COMP4 H_COMP3 R62 60.4R1%
Y1 R1
BOOTSELECT COMP3 H_COMP2 R75 60.4R1% C24
V2 G2
don't support willameter LL_ID0 COMP2 H_COMP1 R60 60.4R1% X_C0.1U25Y
AA2 T1
B LL_ID1 COMP1 H_COMP0 R86 60.4R1% B
A13
COMP0
[6,16] H_BSL0 G29
BSEL0
[6,16] H_BSL1 H30
BSEL1 DP3#
J17 TP6 PLACE RESISTORS OUTSIDE SOCKET
[6] H_BSL2 G30 H16 TP7 CAVITY IF NO ROOM FOR VARIABLE
BSEL2 DP2#
H15 TP4 RESISTOR DON'T PLACE
DP1#
[6,27] CPU_GD N1 J16 TP5
PWRGOOD DP0#

[6,8] CPURST# G23 AD5 HAD STB#1 [8]


RESET# ADSTB1#
R6 HAD STB#0 [8]
HD#63 ADSTB0#
B22 C17 HDS TBP#3 [8]
HD#62 D63# DSTBP3#
A22 G19 HDS TBP#2 [8]
HD#61 D62# DSTBP2#
A19 E12 HDS TBP#1 [8]
HD#60 D61# DSTBP1#
B19 B9 HDS TBP#0 [8]
HD#59 D60# DSTBP0# 100
B21 A16 HDSTBN#3 [8]
HD#58 D59# DSTBN3#
C21 G20 HDSTBN#2 [8]
HD#57 D58# DSTBN2#
B18 G12 HDSTBN#1 [8]
HD#56 D57# DSTBN1#
A17 C8 HDSTBN#0 [8]
HD#55 D56# DSTBN0# VTT_OUT_ LEFT
B16 L1 NMI_SB [19]
HD#54 D55# LINT1/NMI
C18 K1 INTR [19]
D54# LINT0/INTR RN8
D53#
D52#
D51#
D50#
D49#
D48#
D47#
D46#
D45#
D44#
D43#
D42#
D41#
D40#
D39#
D38#
D37#
D36#
D35#
D34#
D33#
D32#
D31#
D30#
D29#
D28#
D27#
D26#
D25#
D24#
D23#
D22#
D21#
D20#
D19#
D18#
D17#
D16#
D15#
D14#
D13#
D12#
D11#
D10#
D9#
D8#
D7#
D6#
D5#
D4#
D3#
D2#
D1#
D0#
SMI# 1 5
HINIT# 1 5
[8] HD#[0..63] 2
IGN NE# 2
3
H D#20 D7

H D#12 D8

HD #3 C6

HD #1 C5
H D#19 E9

A7
B7
B6
A5

A4

B4
H D#43 F21

H D#41 F20

H D#38 F18
H D#37 F17

H D#30 F15

H D#28 F14

H D#24 F12
H D#23 F11

H D#18 F9
H D#17 F8
H D#47 G22

H D#44 G21

H D#36 G17
H D#35 G18

H D#32 G16
H D#31 G15

H D#29 G14

H D#27 G13
H D#53 B15
H D#52 C14
H D#51 C15
H D#50 A14
H D#49 D17
H D#48 D20

H D#46 D22
H D#45 E22

H D#42 E21

H D#40 E19
H D#39 E18

H D#34 E16
H D#33 E15

H D#26 E13
H D#25 D13

H D#22 D10
H D#21 E10

H D#16 G9
H D#15 D11
H D#14 C12
H D#13 B12

H D#11 C11
HD#10 B10
HD#9 A11
HD #8 A10
ZIF-S OCK775-15u STPC LK# 3
4
NMI_SB 4
6
SLP# 6
HD #7 7
HD #6
HD #5
HD #4

HD #2

HD #0
A20M# 7
8
I NTR 8
9 10
9 10
VCCP B 10P8R-150R
A A

R43
X_4.7KR
B

MICRO-START INT'L CO.,LTD.


THERM# C E P ROCHOT# Title
[18,22] THERM#
Q4 X_N-MMB T3904_NL_SOT23
INTEL LGA775 - SIGNALS
Size D o cument Number Rev
Custom MS-7211 0A
Date: Thursda y, July 28, 2005 Sheet 5 of 32
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

VCCP
V_FSB_VTT C65 C10U10Y0805

AM11
AM12
AM14
AM15
AM18
AM19
AM21
AM22
AM25
AM26
AM29
AM30
AG11
AG12
AG14
AG15
AG18
AG19
AG21
AG22
AG25
AG26
AG27
AG28
AG29
AG30

AH11
AH12
AH14
AH15
AH18
AH19
AH21
AH22
AH25
AH26
AH27
AH28
AH29
AH30

AN11
AN12
AN14
AN15
AN18
AN19
AN21
AN22
AK11
AK12
AK14
AK15
AK18
AK19
AK21
AK22
AK25
AK26
AF21
AF22

AL11
AL12
AL14
AL15
AL18
AL19
AL21
AL22
AL25
AL26
AL29
AL30
AJ11
AJ12
AJ14
AJ15
AJ18
AJ19
AJ21
AJ22
AJ25
AJ26

AM8
AM9
AG8
AG9

AH8
AH9

AK8
AK9
AF8
AF9

AL8
AL9
AJ8
AJ9
D U5B D

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCP CAPS FOR FSB GENERIC
A23 H_VCCA B
VCCA H_VSSA
AF19 B23
VCC VSSA
AF18 D23
VCC RSVD H_VCCIOPLL B
AF15 C23
VCC VCC-IOPLL
AF14
VCC V_FSB_V TT
AF12
VCC
AF11 A25
VCC VTT
AE9 A26
VCC VTT
AE23 A27
VCC VTT
AE22 A28
VCC VTT
AE21 A29
VCC VTT
AE19 A30
VCC VTT
AE18 B25
VCC VTT
AE15 B26
VCC VTT
AE14 B27
VCC VTT
AE12 B28
VCC VTT
AE11 B29
VCC VTT
AD8 B30
VCC VTT
AD30 C25
VCC VTT
AD29 C26
VCC VTT
AD28 C27
VCC VTT
AD27 C28
VCC VTT
AD26 C29
VCC VTT
AD25 C30
VCC VTT
AD24 D25
VCC VTT
AD23 D26
VCC VTT
AC8 D27
VCC VTT
AC30 D28
C VCC VTT C
AC29 D29
VCC VTT
AC28 D30
VCC VTT
AC27 AM6 VTT_PWG
VCC VTTPWRGD
AC26
VCC
AC25 AA1 V TT_OUT_RIGHT VTT_OU T_RIGHT
VCC VTT_OUT_RIGHT VTT_OUT_LEFT
AC24 J1
VCC VTT_OUT_LEFT VTT_OUT_ LEFT
AC23 F27
VCC VTT_SEL
AB8
VCC VTT_SEL R87 X_1KR
AA8 F29 VCC3
VCC RSVD/VTT_PKGSENSE
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

HS1
HS2
HS3
HS4
ZIF-SO CK775-15u
U8

R8

N8

AN9
AN8
Y8

V8

P8

K8
T8
T30
T29
T28
T27
T26
T25
T24
T23

L8

1
2
3
4
W8
W30
W29
W28
W27
W26
W25
W24
W23

J9
J8
J30
J29
J28
J27
J26
J25
J24
J23
J22
J21
J20
J19
J18
J15
J14
J13
J12
J11
J10
M30
M29
M28
M27
M26
M25
M24
M23
Y30
Y29
Y28
Y27
Y26
Y25
Y24
Y23

U30
U29
U28
U27
U26
U25
U24
U23

N30
N29
N28
N27
N26
N25
N24
N23
M8

K30
K29
K28
K27
K26
K25
K24
K23

AN30
AN29
AN26
AN25
0 TEJ/PSC
VCCP 1 RSVD

PLACE COMPONENTS AS CLOSE AS POSSIBLE TO PROCESSOR SOCKET


V TT_OUT_RIGHT R66 49.9R1%0402 R70 10R0402-LF CPU_GTLRE F0 TRACE WIDTH TO CAPS MUST BE SMALLER THAN 12MILS
VTT_OU T_RIGHT CPU_G TLREF0 [5]
L7 X_10U1 00m_0805
V_FSB_VTT H_VCCIOPLL B
R69 C42
C43 2 1
B 100R1%0402 C220P50N0402 C72 B
C1U 6.3Y50402/80-20%
CP1 C1U16Y
H_VSSA

L11 C75
VTT_OUT_ LEFT R73 49.9R1%0402 R71 10R0402-LF CPU_G TLREF1 X_10U1 00m_0805 C1U16Y
VTT_OUT_ LEFT CPU_G TLREF1 [5]
H_VCCA B

R72 C48 2 1
C45
100R1%0402 C220P50N0402 CP2 B
C1U 6.3Y50402/80-20%
VTT_OUT_ LEFT

PLACE AT CPU END OF ROUTE VCC 5_SB


R33 1.25V VTT_PWRGOOD
V TT_OUT_RIGHT R47 62R CPURST# 680R
VTT_OU T_RIGHT CPU RST# [5,8]
R45 120R P ROCHOT# R20
PROC HOT# [5]
1KR VTT_PWG
R17
VTT_OUT_LEFT R63 100R C PU_GD Q1
VTT_OUT_ LEFT CPU_GD [5,27] [27,28] VID_GD#
R76 62R H BR#0
HBR#0 [5,8] N-MMBT3904_NL_SOT23
10KR
V_FSB_V TT
R54 62R I E R R#
IERR# [5]
R64 62R T HERMTRIP#
THERMTRIP# [5,29]

A A

FSBSEL RESISTOR CAN BE REMOVED IF ONLY TEJAS


PLACE AT SB END OF ROUTE AND CEDAR MILL ARE SUPPORTED
V_FSB_V TT RN27 8P4R-470R
V_FSB_V TT
R61 62R F E RR#
1
3
2
4
H_BSL1 [5,16] MICRO-START INT'L CO.,LTD.
FERR# [5,19] H_BSL2 [5]
5 6 Title
H_BSL0 [5,16]
7 8 INTEL LGA775 - POWER
Size D o cument Number Rev
Custom MS-7211 0A
Date: Thursda y, July 28, 2005 Sheet 6 of 32
8 7 6 5 4 3 2 1
B
A

D
C

1
1

VTT_O UT_RIGHT

AE2
AB7
AB1
AA7
AA6
AA3
A9
A6
A2

AD7
AD4
AC7
AC6
AC3
A24
A21
A18
A15
A12

AE28
AE27
AE26
AE25
AE24
AE20
AE17
AE16
AE13
AE10
AB30
AB29
AB28
AB27
AB26
AB25
AB24
AB23
AA30
AA29
AA28
AA27
AA26
AA25
AA24
AA23
U 5C

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AE29
VSS
AE30 AC4
VTT_O UT_RIGHT

VSS RSVD H _ COMP7


AE5 AE3
VSS RSVD
AE7 AE4
VSS RSVD
AF10 D1
VSS RSVD
R51

AF13 D14
VSS RSVD
AF16 E23
VSS RSVD
AF17 E24
62R0402

VSS RSVD
TP11

AF20 E5
VSS RSVD
AF23 E6
AF24 VSS RSVD E7
VSS RSVD
AF25 F23
VSS RSVD
TP 13

AF26 F6
VSS RSVD
TP10

AF27 B13
VSS RSVD
TP12

AF28
AF29 VSS
VSS
AF3 J3
VSS RSVD
AF30 N4
VSS RSVD
G T L V R E F_NB

AF6 P5 62R0402
VSS RSVD
R 57

AF7
AG10 VSS V1 MSID1
VSS RSVD MSID0
AG13 W1

2
2

VSS RSVD H _ COMP6


AG16 Y3
VSS RSVD
AG17
VSS
R 53

AG20
AG23 VSS Y7
VSS VSS
AG24 Y5
62R0402

VSS VSS
AG7 Y2
VSS VSS
AH1 W7
VSS VSS X__62R0402
R 52

AH10 W4
VSS VSS
AH13 V7
VSS VSS
AH16 V6
VSS VSS
AH17 V30
VSS VSS
AH20 V3
VSS VSS
R 58

AH23 V29
AH24 VSS VSS V28
VSS VSS
AH3 V27
62R0402

VSS VSS
AH6 V26
VSS VSS
AH7 V25
VSS VSS
AJ10 V24
AJ13 VSS VSS V23
VSS VSS
AJ16 U7
VSS VSS
AJ17 U1
VSS VSS
AJ20 T7
VSS VSS
AJ23 T6
AJ24 VSS VSS T3
VSS VSS
05 Per FMB

AJ27 R7
VSS VSS
AJ28 R5
05 Value FMB

VSS VSS
AJ29 R30
VSS VSS
AJ30 R29
AJ4 VSS VSS R28
VSS VSS
AJ7 R27
VSS VSS
AK10 R26
VSS VSS
0
0

AK13 R25
VSS VSS

3
3

MSID1

AK16 R24
VSS VSS
AK17 R23
VSS VSS
AK2 R2
VSS VSS
AK20 P7
VSS VSS
AK23 P4
VSS VSS
AK24 P30
VSS VSS
1
0

AK27 P29
VSS VSS
MSID0

AK28 P28
VSS VSS
AK29 P27
VSS VSS
AK30 P26
VSS VSS
AK5 P25
VSS VSS
AK7 P24
VSS VSS
AL10 P23
VSS VSS
AL13 N7
VSS VSS
AL16 N6
VSS VSS
AL17 N3
AL20 VSS VSS M7
VSS VSS
AL23 M1
VSS VSS
AL24 L7
VSS VSS
AL27 L6
VSS VSS
AL28 L30
VSS VSS
AL3 L3
VSS VSS
AL7 L29
VSS VSS
AM1 L28
VSS VSS
AM10 L27
VSS VSS
AM13 L26
AM16 VSS VSS L25
VSS VSS
AM17 L24
VSS VSS
AM20 L23
VSS VSS
AM23 K7
VSS VSS
AM24 K5
VSS VSS
AM27 K2
VSS VSS
4 AM28 J7
4

VSS VSS
AM4 J4
VSS VSS
H9
VSS
AN1 H8
AN10 VSS VSS H7
VSS VSS
AN13 H6
VSS VSS
AN16 H3
VSS VSS
AN17
VSS
AN2 H28
VSS VSS
AN20 H27
VSS VSS
AN23 H26
VSS VSS
AN24 H25
VSS VSS
AN27 H24
VSS VSS
AN28 H23
VSS VSS H22
Size
Title

VSS
Date:
A3

B1 H21
VSS VSS
B11 H20
VSS VSS
B14 H19
VSS VSS
H18
VSS H17
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

D o c u m e n t N umber
MS- 7211
F4
F7

B5
B8
E2
E8

C4
C7
D3
D5
D6
D9
G1

F10
F13
F16
F19
F22

B17
B20
B24
E11
E14
E17
E20
E25
E26
E27
E28
E29

C10
C13
C16
C19
C22
C24
D12
D15
D18
D21
D24
H10
H11
H12
H13
H14

ZIF- SOCK775-15u

Thursday, July 28, 2 005


INTEL LGA775 - GND

5
5

S heet
7
of
32
0A
R ev
MICRO-START INT'L CO.,LTD.
B
A

D
C
4 3 2 1

BY PASS CAP
VIA confirmed V_FSB_VTT V_FSB_VTT

V_FSB_VTT CB56 CB131


C10U10Y0805 C10U10Y0805
CB63 CB129

M19
D C10U10Y0805 X_C0.1U25Y D

U19

R19

N19
P19
T19

L19
L18
L17
L16
L15
CB41 CB134
HD#[0..63] [5]
U6A X_C0.1U25Y C1U16Y
[5] HA#[3..33]
D27 HD#0 CB54

VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
HD0 HD#1 C1U16Y
HA#3 Y29 HA3 HD1
D26
HA#4 V27 A29 HD#2 CB64
HA4 HD2 HD#3 C1U16Y Solder Side
HA#5 AA29 C26
HA5 HD3 HD#4
HA#6 Y27 HA6 HD4
C28
HA#7 Y26 D28 HD#5 Component Side
HA7 HD5 HD#6
HA#8 AC27 HA8 HD6
A27
HA#9 AA28 B29 HD#7
HA9 HD7 HD#8
HA#10 AB27 A26
HA10 HD8 HD#9
HA#11 AA27 B26
HA11 HD9 HD#10
HA#12 AC29 HA12 HD10
D25
HA#13 AB29 E24 HD#11
HA13 HD11 HD#12
HA#14 AB28 A25
HA14 HD12 HD#13
HA#15 AC26 A28
HA15 HD13 HD#14
HA#16 AD29 D24
HA16 HD14 HD#15
HA#17 T28 HA17 HD15
C25
HA#18 R28 K28 HD#16
HA18 HD16 HD#17
HA#19 N29 K29
HA19 HD17 HD#18
HA#20 N28 J28
HA20 HD18 HD#19
HA#21 P29 K27
HA21 HD19 HD#20
HA#22 P27 J26
HA22 HD20 HD#21
HA#23 R27 J29
HA23 HD21 HD#22
HA#24 N26 J25
HA24 HD22 HD#23
HA#25 T26 J27
HA25 HD23 HD#24
HA#26 P26 F28
HA26 HD24 HD#25
C HA#27 R25 G29 C
HA27 HD25 HD#26
HA#28 N27 G27
HA28 HD26 HD#27
HA#29 N25 HA29 HD27
D29
HA#30 R29 E27 HD#28
HA30 HD28 HD#29
HA#31 T27 F27
HA#32 U26 HA31 HD29 HD#30
E28
HA#33 T25 HA32 HD30 HD#31
F29
HA33 HD31 HD#32
E23
HD32 HD#33
[5] HADSTB#0 W28 B24
HADSTB0 HD33 HD#34
[5] HADSTB#1 R26 C24
HADSTB1 HD34 HD#35
A24
HD35 HD#36
[5] HADS# M29 A23
ADS HD36 HD#37
[5] HBNR# M28 B23
BNR HD37 HD#38 R105
[5] HBPRI# T29 A22
BPRI HD38 HD#39 R109 49.9R1% GTLVREF_NB1
[5,6] HBR#0 K26 C23 VCCP
BREQ HD39 HD#40
[5] HDBSY# M25 F21
DBSY HD40 HD#41 R108
[5] HDEFER# U27 C22
DEFER HD41 HD#42 X_0R 100R1%
[5] HDRDY# M26 E21
DRDY HD42 HD#43
[5] HIT# L27 C21
HIT HD43 HD#44
[5] HITM# U29 D20
HITM HD44 HD#45
[5] HLOCK# L29 D21
HLOCK HD45 HD#46 R106
[5] HTRDY# M24 F20
HTRDY HD46 HD#47 R112 49.9R1% GTLVREF_NB
E20 V_FSB_VTT GTLVREF_NB
HREQ#0 W27 HD47 HD#48
B19
HREQ#1 V28 HREQ0 HD48 HD#49 R114
C19
HREQ#2 V26 HREQ1 HD49 HD#50 0R 100R1%
B20
HREQ#3 W29 HREQ2 HD50 HD#51
B18
HREQ#4 V29 HREQ3 HD51 HD#52
[5] HREQ#[0..4] C20
HRS#0 L26 HREQ4 HD52 HD#53
B [5] HRS#[0..2] A20 B
HRS#1 M27 RS0 HD53 HD#54
C18
HRS#2 K25 RS1 HD54 HD#55 R110 100R1% HCOMPVREF
B17
RS2 HD55 HD#56
B16
HDBI#0 HD56 HD#57 R111
[5] HDBI#[0..3] C29 A17
HDBI#1 HDBI0 HD57 HD#58 49.9R1%
H27 C14
HDBI#2 HDBI1 HD58 HD#59
B21 C15
HDBI#3 HDBI2 HD59 HD#60
A21 A18
HDBI3 HD60 HD#61
B15
HD61 HD#62 R102 20.5R1% HRCOMP
[5,6] CPURST# D14 B14
CPURST HD62 HD#63
A15
HD63
[16] NBHCLK Y23
HCLK+
[16] NBHCLK# W23 B27 HDSTBP#0 [5]
C0.01U50X HCLK- HDSTB0P
C27 HDSTBN#0 [5]
C0.01U50X HDSTB0N
C0.01U50X R24 H28
GTLVREF_NB HAVREF0 HDSTB1P HDSTBP#1 [5]
V24 G28 HDSTBN#1 [5]
near NB HAVREF1 HDSTB1N
C96 C280
C281 F22 D23
HDVREF0 HDSTB2P HDSTBP#2 [5]
G24 D22 HDSTBN#2 [5]
HDVREF1 HDSTB2N
F19
GTLVREF_NB1 HDVREF2
F16 C17 HDSTBP#3 [5]
HDVREF3 HDSTB3P
C16 HDSTBN#3 [5]
near NB HDSTB3N
L24
C89 C284 C286 GTLVREF
-HAP0 N24
[5] -HAP0 -HAP1 HAP0
[5] -HAP1 W26
HRCOMP G25 HAP1
C94 HCOMPVREF G26 HRCOMP
A HCOMPVREF A
C0.01U50X K24
DPWR
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

C0.01U50X X_C0.01U50XC0.01U50X
P4M800 CE
MICRO-START INT'L CO.,LTD.
AC28
D15
D16
D19

H26
H29

U25
U28

N18

R18

U18
A16
A19
B22
B25
B28

E22
E25
E26
E29

P25
P28

Y25
Y28

P18

V18
M18

T18
L25
L28

Title
P4M800-CPU
Size Document Number Rev
Custom MS-7211 0A
Date: Thursday, July 28, 2005 Sheet 8 of 32
4 3 2 1
4 3 2 1

VCC_DDR

VCC_DDR

W11
W12
W13
W14
W15
W16
W17
W18
W19
V11

V19
U6B R131
MD0 AD28 AF13 MAA0 100R

VCC25MEM
VCC25MEM
VCC25MEM
VCC25MEM
VCC25MEM
VCC25MEM
VCC25MEM
VCC25MEM
VCC25MEM
VCC25MEM
VCC25MEM
[12,13] MD[0:63] MD0 MA0 MAA[0:13] [12,13]
MD1 AE27 AD15 MAA1 MVREF_NB = 0.5* VCCDDR
D MD2 MD1 MA1 MAA2 MVREF_NB D
AF27 AJ15
MD3 MD2 MA2 MAA3
AG28 AJ16
MD4 MD3 MA3 MAA4 R132
AD27 AJ17
MD5 MD4 MA4 MAA5 100R C289 C285
AE29 AF16
MD6 MD5 MA5 MAA6 C1000P50X C1000P50X
AG27 AG15
MD7 MD6 MA6 MAA7
AG29 AE18
MD8 MD7 MA7 MAA8
AH29 AF17
MD9 MD8 MA8 MAA9
AJ29 AE19
MD10 MD9 MA9 MAA10
AG25 AJ14
MD11 MD10 MA10 MAA11
AJ25 AF20
MD12 MD11 MA11 MAA12
AJ28 AE21
MD13 MD12 MA12 MAA13
AH27 AD7
MD14 MD13 MA13
AH26
MD15 MD14
AJ26
MD16 MD15
AJ24 AF12 BA0 [12,13]
MD17 MD16 BA0
AG24 AJ13 BA1 [12,13]
MD18 MD17 BA1
AJ22
MD19 MD18 VCC_DDR VCC_DDR C291
AG21
MD20 MD19 C0.01U50X
AH24
MD21 MD20 CB75 CB132
AG23
MD22 MD21 C10U10Y0805 C10U10Y0805
AG22
MD23 MD22 R150 301R0402 CB48 CB135
AJ21
MD24 MD23 X_C10U10Y0805 C10U10Y0805
AH21 AE5
MD25 MD24 DMCOMP CB67 CB138
AJ20
MD26 MD25 X_C1U16Y C0.1U25Y
AG18
MD27 MD26 MEMDET CB130
AH18 AE24
MD28 MD27 MEMDET C1U16Y
AG20
MD29 MD28 CB141
AH19
MD30 MD29 X_C1U16Y
C AJ18 C
MD31 MD30 CB137
AG17
MD32 MD31 X_C1U16Y
AJ12 Component Side
MD33 MD32 CB133
AG12
MD34 MD33 C1U16Y
AJ10 AE12 -SRASA [12,13]
MD35 MD34 SRAS
AJ9
MD36 MD35
AH12
MD37 MD36
AJ11 AF9 -SCASA [12,13]
MD38 MD37 SCAS
AG10
MD39 MD38
AH9
MD40 MD39
AG8 AF11 - SWEA [12,13]
MD41 MD40 SWE
AJ7
MD42 MD41
AJ6
MD43 MD42 -CS0
AH6 AD9 -CS0 [12,13]
MD44 MD43 CS0 -CS1 CB127
AG9 AF8 -CS1 [12,13]
MD45 MD44 CS1 -CS2 X_C10U10Y0805
AJ8 AG7 -CS2 [12,13]
MD46 MD45 CS2 -CS3
AG5 AF7 -CS3 [12,13]
MD47 MD46 CS3
AJ5
MD48 MD47
AH4
MD49 MD48 CB145
AJ4
MD50 MD49 X_C1U16Y
AJ2
MD51 MD50
AH1
MD52 MD51
AG4 AF28 -DQS0
MD53 MD52 DQS0
AF4 AJ27 -DQS1
MD54 MD53 DQS1
AG3 AJ23 -DQS2
MD55 MD54 DQS2
AJ1
MD55 DQS3
AJ19 -DQS3 Solder Side
MD56 AG1 AG11 -DQS4
MD57 MD56 DQS4
AF2 AH7 -DQS5
MD58 MD57 DQS5
B AD3 AH3 -DQS6 B
MD59 MD58 DQS6
AD1 AE3 -DQS7
MD60 MD59 DQS7 VCC_DDR
AG2
MD61 MD60 R326 X_1KR1%
AF3 -DQS[0:7] [12,13]
MD62 MD61 DCLKI MEMDET
AE1 AD26 DCLKI [16]
MD63 MD62 MCLKIA MCLKO-
AD2 AE26
MD63 MCLKO- DCLKO+ R143 22R0402
AF26 DCLKO [16]
CKEA0 MCLKO+ DCLKO as short as passable R327 1KR1%
AF21
[12,13] CKEA0 CKEA1 CKE0 DCLKI = DCLKx + 2 "
AF23 AD23
[12,13] CKEA1 CKEA2 CKE1 MEMVREF1
AE22 AD17
[12,13] CKEA2 CKEA3 CKE2 MEMVREF2 R101 X_10KR0402
AF24 AD11
[12,13] CKEA3 CKE3 MEMVREF3 MVREF_NB MCLKO-
AD8
MEMVREF4
Near to NB chip
M16 HEATSINK1
[12,13] -DQM[0:7] GND
N16
-DQM0 GND
AF29 P16
-DQM1 DQM0 GND
AG26 R16
DQM1 GND
-DQM2
-DQM3
AH22
AG19
DQM2 GND
T16
U16 MCH
-DQM4 DQM3 GND
AH10 V16
DQM4 GND
-DQM5
-DQM6
AG6
AJ3
DQM5 GND
M15
N15
DCLKI
DCLKO
1
1
TP15
TP2 Heatsink
-DQM7 DQM6 GND Test Point
AF1 P15
DQM7 GND (Place near their respective balls of NB) HS-MS7059
MCLKO- 1 TP1
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

A A
AH11
AH14
AH17
AH20
AH23
AH25
AH28
AE11
AE14
AE16
AE17
AE20
AE23
AE25
AE28

AF5

N17

R17

U17

U15

R15
P17

V17
V15
M17

T17

T15
AH2
AH5
AH8
AE2
AE8

P4M800 CE C279 X_C5P50N


DCLKI

Near to NB chip
MICRO-START INT'L CO.,LTD.
Title
P4M800-DDR
Size Document Number Rev
Custom MS-7211 0A
Date: Thursday, July 28, 2005 Sheet 9 of 32
4 3 2 1
4 3 2 1

VCC_AGP

M11
N11

R11
P11

T11
U6C
[19] VLAD[0:7]
P3 GD0

VCC15AGP
VCC15AGP
VCC15AGP
VCC15AGP
VCC15AGP
GD0/FPD10 GD[0:31] [14]
VLAD0 V1 P4 GD1
VLAD1 VD0 GD1/FPD11 GD2
U2 R3
D VLAD2
VLAD3
Y2
Y3
VD1
VD2
VD3
GD2/FP1CLK
GD3/FPD09
GD4/FPD08
R4
R1
GD3
GD4 VCC VSUS15 Regulator D

VLAD4 T2 N2 GD5 VCC3_SB VSUS15


VLAD5 VD4 GD5/FPD07 GD6
T3 P1
VLAD6 VD5 GD6/FPD06 GD7
AA2 R2
VLAD7 VD6 GD7FPD05 GD8
AA1 M3
VD7 GD8/FP1DET GD9 U2
[19] VBE0 U3 M1
VBE GD9/FP1HS GD10 _LT1087S_SOT89
[19] UPSTB W2 N4
UPSTB+ GD10/FPD01 GD11
[19] -UPSTB W1 L3
UPSTB- GD11/FPD23 GD12
[19] DNSTB V2 L1 3 2
DNSTB+ GD12/FPD00 GD13 VIN VOUT
[19] -DNSTB V3 N5
DNSTB- GD13/FPD22 GD14
AA3 K2

ADJ
[19] UPCMD UPCMD GD14/FPD21 GD15
W3 R6 R183
[19] DNCMD DNCMD GD15/FPD20 GD16
J2 3.9KR1% + C140
LVREF_NB V4 GD16/FPD18 GD17 C146 C143
H3

1
VLVREF GD17/FPD17

C10U16EL
H1 GD18 C10U10Y1206 C152 C10U10Y1206
GD18/FPD16

C0.1U25Y
LCOMPP T4 K4 GD19
VLCOMPP GD19/FPDE GD20
G1
GD20/FPD14 GD21 R190
U11 G2
VCC15VL GD21/FPCLK GD22 1KR1%
U10 K5
VCC15VL GD22/FPD13 GD23
V10 G3
VCC15VL GD23/FPD15 GD24
J6
GD24/GDVP1D09 GD25
K6
GD25 GD26
J4
GD26/GDVP1D10 GD27
K10 F2
VCC15 GD27/GDVP1D04 GD28
K11 J5
VCC15 GD28/GDVP1D07 GD29
K12 F3
VCC15 GD29/GDVP1D06 GD30
K13 H4
VCC15 GD30/GDVP1D08 GD31 +1.5VNB
C K15 E1 C
VCC15 GD31/GDVP1DET C288
K17
VCC15
K19 M2 GBE0 [14]
VCC15 GC#BE0/FPD03 C0.01U50X
+1.5VNB K20 K1 GBE1 [14]
VCC15 GC#BE1/SBPLDAT
Y10
VCC15 GC#BE2/FPD19
J1 GBE2 [14]
Solder Side
Y12 L6 GBE3 [14]
VCC15 GC#BE3/GDVP1D11 C283
Y14
VCC15 VCC_AGP X_C0.1U25Y
Y16
VCC15 GFRAME/FPHS
L4 GFRAME [14]
Component Side
Y18 M5 C282
VCC15 GIRDY/SBPLCLK GIRDY [14]
Y20 K3 C10U10Y0805
VCC15 GTRDY GTRDY [14]
L10 J3 VCC_AGP C292
VCC15 GDEVSEL/FPVS GDEVSEL [14]
N10 M4 CB136 C0.1U25Y
VCC15 GSTOP/FP1CLK GSTOP [14]
R10 P6 CB89 C10U10Y0805 C290
VCC15 GPAR/FP1VS GPAR [14]
W10 G5 C0.1U25Y CB143 C0.1U25Y
VCC15 GDBIH DBIH [14]
M20 F4 CB84 C1U16Y C287
VCC15 GRBF RBF [14]
P20 B3 C0.1U25Y CB142 C1U16Y
VCC15 GWBF/FPCLK WBF [14]
T20 D5 CB90 X_C1U16Y CB128
VCC15 GREQ/SBDDCCLK GREQ [14]
V20 C4 C0.1U25Y C10U10Y0805
VCC15 GGNT/SBDDCDAT GGNT [14]
M6 GSERR [14]
GSERR/FP1DE
H6 DBIL [14]
GDBIL
C5 AGP8X_DET_NB [14]
AGP8XDET
AGP8XDET 0=ENABLE
E4 ST0 [14]
GST0/ENAVEE
E3 ST1 [14]
GST1/ENAVDD
F5 ST2 [14]
GST2/ENABLT +1.5VNB
C1 VCC_AGP
GSBSTBF/GDVP1D01 SB_STBF [14]
B C2 SB_ST BS [14] B
VSUS15 GSBSTBS/GDVP1D02 VCC3 VCC3
N1 RN88

1
GADSTBF0/FPD04 AD_STBF0 [14]
N3 AD_ STBS0 [14] 8 7
GADSTBS0/FPD02 CP3 FB1 CP4 FB2 6 5
VSUS15 G4 X_COPPER X_220L2_50 X_COPPER X_220L2_50 4 3
GADSTBF1/FPD12 AD_STBF1 [14]
F1 AD_ STBS1 [14] 2 1

2
GADSTBS1/FPDET AVDD1 AVDD2
A1 SBA0 SBA[0:7] X_8P4R-0R
GSBA0/GDVP1VS SBA[0:7] [14]
AC25 A2 SBA1 C79 CM1 C83 CM2 RN89
VSUS15 GSBA1/GDVP1DE SBA2 C1U16Y C1U16Y
AB1 B1 X_C1000P50X X_C1000P50X 8 7
VSUS15 GSBA2/GDVP1D00 SBA3
C3 6 5
GSBA3/GDVP1HS SBA4
D1 4 3
GSBA4/GDVP1D05 SBA5
[18] -SUSST AB3 D4 2 1
TESTIN_NB SUSST GSBA5/GDVP1D03 SBA6
AF25 D2
TESTIN GSBA6/GDVP1CLK SBA7
[21,22,27,29] PCIRST#2 AC1 D3 X_8P4R-0R
RESET GSBA7/GDVP1CLK
[18] -PWROK_NB AB2
PWROK AGPVREF +1.5VNB
N6 AGPVREF [14]
AGPVREF1 AGPVREF
G6
AVDD1 AA25 AGPVREF2 PUT CAP ON THE BOTTOM OF PIN AF7
AVDD2 VCCA33HCK R141
AD25 R5 GCLK_NB [16]
VCCA33MCK GCLK CB144 CB76 1.4KR1%
A4 AGPCOMPN C0.1U25Y C1000P50X
AGPCOMPN AGPCOMPP LVREF_NB
A3
AGPCOMPP
AA26
GNDAHCK R149 C293 C126
AD24 T1 AGPBZ [19]
GNDAMCK AGPBUSY
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

1KR1%
VCC_DDR X_C0.1U25Y
P4M800 CE C0.1U25Y
A A
VCC_AGP
N12
N13
N14

R12
R13
R14

U12
U13
U14
P12
P13
P14

V12
V13
V14
M12
M13
M14

T12
T13
T14

R97 4.7KR TESTIN_NB AGPCOMPN R134 60.4R1%


LVREF_NB => VDD/4=0.625

AGPCOMPP R136 60.4R1% MICRO-START INT'L CO.,LTD.


Strapping For NB_TEST Mode LCOMPP R137 402R1% Title
TESTIN BISTIN RBF WBF P4M800-VLINK&GRAPHIC
1 1 x x Disable all TEST mode Size Document Number Rev
Custom MS-7211 0A
Date: Thursday, July 28, 2005 Sheet 10 of 32
4 3 2 1
4 3 2 1
VCCPLL1
VCCPLL2

VCCDAC1
VCCDAC2
VCC3 VCC3
VCC3

1
CP5 FB3
X_COPPER X_220L2_50 CP6 FB4
X_COPPER X_220L2_50

L12
L13
L14

2
D8
C7

D7
E7
VCCPLL1

2
U6D VCCDAC1
C104 CM3

VCC33GFX
VCC33GFX
VCC33GFX
VCCA33PLL1
VCCA33PLL2

VCCA33DAC1
VCCA33DAC2
D C13 B6 C1U16Y X_C1000P50X C105 CM4 D
DVP0D00/TVD00 AR AR [15]
B13 A5 C1U16Y X_C1000P50X
DVP0D01/TVD01 AG AG [15]
A13 B5 AB [15]
DVP0D02/TVD02 AB R126
D13
FPD4 DVP0D03/TVD03 RSET 80.6R1%
E13 A6
RN40 DVP0D04/TVD04 RSET
D12 B8 HSYNC [15]
8P4R-4.7KR DVP0D05/TVD05 HSYNC
C12 A8 VSYNC [15]
DVP0D06/TVD06 VSYNC
1 2 A12
DVP0D07/TVD07
3 4 B12 A7 GUICK [16]
DVP0D08/TVD08 XIN
5 6 E12
DVP0D09/TVD09 VCC3 VCC3
7 8 B11 A9 PIRQ#A [14,17,20]
DVP0D10/TVD10 INTA
A11

1
DVP0D11/TVD11
E11 D9 CP8 FB6 CP7 FB5
GPO0 SPCLK1 X_COPPER X_220L2_50 X_COPPER X_220L2_50
C11 E9 SPDCLK2 [15]
GPOUT SPCLK2

2
A10 D10 VCCPLL2 VCCDAC2
TVCLKR SPD1
B10 E8 SPD2 [15]
DVP0DE/TVDE SPD2 C109 CM6 C107 CM5
FPD8 E10 C8 C1U16Y X_C1000P50X X_C1000P50X C1U16Y
[14] FPD8 DVP0HS/TVHS DISPCLKI
C10 C9 R119
DVP0VS/TVVS DISPCLKO 22R0402
D11
DVP0CLK/TVCLK
B9 B7
DVP0DET GNDAPLL1
C6
GNDAPLL2
D6
GNDADAC2
E6
GNDADAC1
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
C C
VCC3
CB139
VCC_DDR
X_C1U16Y
A14

L2
L5
H2
H5

U1
U4
B2
B4
E2
E5

P2
P5

Y1
P4M800 CE
CB140 C0.01U50X
C0.1U25Y C22
C98
X_C0.1U25Y

C69
X_C1U16Y
VCC3 C111
GFX power up strapping setting: C1U16Y
C84
TVD4/DVP0D4 =>AGP Port Muxing C10U10Y0805
0: Two 12-bit DVI interface
1: One 24-bit Panel interface
TVD5/DVP0D5 =>Dedicated DVI Port Configuration
0: TMDS
1: TV Encoder R118 R115
TVD6/DVP0D6 =>Dedicated DVI Port Selection X_1KR X_1KR
0: Disable
1: Enable
TVD8/DVP0D8 =>External AGP Function Enable
0: External
1: Internal
TVD9/DVP0D9 =>PCI Signal Test Output Enable FPD8
B
0: Disable FPD4 B
1: Enable
TVD10/DVP0D10 =>CPUCK/MCK Clock Select
0: From NB
1: From External
TVD7/DVP0D7 =>GFX Clock Select(VCK/LCDCK/ECK)
0: Refer Internal PLL
1: From External R116 R113
10KR 10KR

A A

MICRO-START INT'L CO.,LTD.


Title
P4M800-VGA
Size Document Number Rev
Custom MS-7211 0A
Date: Thursday, July 28, 2005 Sheet 11 of 32
4 3 2 1
8 7 6 5 4 3 2 1

SMBDATA_ISO
[16,18,27] SMBDA TA_ISO
SMBCLK_ISO V CC_DDR V CC_DDR
[16,18,27] SMBC LK_ISO

104
112
128
136
143
156
164
172
180

108
120
148
168
15
22
30
54
62
77
96

38
46
70
85
DIMM1

104
112
128
136
143
156
164
172
180

108
120
148
168

7
15
22
30
54
62
77
96

38
46
70
85
DIMM2

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
[9,13] MAA[0:13]

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
D

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
[9,13] MAA[0:13] D
MAA0 48 2 MD0
A0 D0 MD[0:63] [9,13]
MAA0 48 2 MD0 MAA1 43 4 MD1
MAA1 A0 D0 MD1 MAA2 A1 D1 MD2
43 4 41 6
MAA2 A1 D1 MD2 MAA3 A2 D2 MD3
41 6 130 8
MAA3 A2 D2 MD3 MAA4 A3 D3 MD4
130 8 37 94
MAA4 A3 D3 MD4 MAA5 A4 D4 MD5
37 94 32 95
MAA5 A4 D4 MD5 MAA6 A5 D5 MD6
32 95 125 98
MAA6 A5 D5 MD6 MAA7 A6 D6 MD7
125 98 29 99
MAA7 A6 D6 MD7 MAA8 A7 D7 MD8
29 99 122 12
MAA8 A7 D7 MD8 MAA9 A8 D8 MD9
122 12 27 13
MAA9 A8 D8 MD9 MAA10 A9 D9 MD10
27 13 141 19
MAA10 A9 D9 MD10 MAA11 A10 D10 MD11
141 19 118 20
MAA11 A10 D10 MD11 MAA12 A11 D11 MD12
118 20 115 105
MAA12 A11 D11 MD12 MAA13 A12 D12 MD13
115 105 167 106
MAA13 A12 D12 MD13
A13 D13 MD14
167 106 109
A13 D13 MD14 BA0 D14 MD15
109 [9,13] BA0 59 110
BA0 D14 MD15 BA1 BA0 D15 MD16
[9,13] BA0 59 110 [9,13] BA1 52 23
BA1 BA0 D15 MD16 BA1 D16 MD17
[9,13] BA1 52 23 113 24
BA1 D16 MD17
BA2 D17 MD18
113 24 28
BA2 D17 MD18 -CS0 D18 MD19
28 [9,13] -CS0 157 31
-CS2 D18 MD19 -CS1 CS0 D19 MD20
[9,13] -CS2 157 31 [9,13] -CS1 158 114
-CS3 CS0 D19 MD20
CS1 D20 MD21
[9,13] -CS3 158 114 71 117
CS1 D20 MD21 NC/CS2 D21 MD22
71 117 163 121
NC/CS2 D21 MD22 NC/CS3 D22 MD23
163 121 123
NC/CS3 D22 MD23 -DQM0 D23 MD24
123 [9,13] -DQM[0:7] 97 33
-DQM0 D23 MD24 -DQM1 DQM0 D24 MD25
97 33 107 35
-DQM1 DQM0 D24 MD25 -DQM2 DQM1 D25 MD26
107 35 119 39
-DQM2 DQM1 D25 MD26 -DQM3 DQM2 D26 MD27
119 39 129 40
-DQM3 DQM2 D26 MD27 -DQM4 DQM3 D27 MD28
129 40 149 126
-DQM4 DQM3 D27 MD28 -DQM5 DQM4 D28 MD29
149 126 159 127
C -DQM5 DQM4 D28 MD29 -DQM6 DQM5 D29 MD30 C
159 127 169 131
-DQM6 DQM5 D29 MD30 -DQM7 DQM6 D30 MD31
169 131 177 133
-DQM7 DQM6 D30 MD31 DQM7 D31 MD32
177 133 140 53
DQM7 D31 MD32
DQM8 D32 MD33
140 53 55
DQM8 D32 MD33 -SWEA D33 MD34
55 [9,13] - SWEA 63 57
-SWEA D33 MD34 -SCASA WE D34 MD35
[9,13] - SWEA 63 57 [9,13] -SCA SA 65 60
-SCASA WE D34 MD35 -SRASA CAS D35 MD36
[9,13] -SCA SA 65 60 [9,13] -SRA SA 154 146
-SRASA CAS D35 MD36 RAS D36 MD37
[9,13] -SRA SA 154 146 147
RAS D36 MD37 CKEA0 D37 MD38
147 [9,13] CKE A0 21 150
CKEA2 D37 MD38 CKEA1 CKE0 D38 MD39
[9,13] CKE A2 21 150 [9,13] CKE A1 111 151
CKEA3 CKE0 D38 MD39 CKE1 D39 MD40
[9,13] CKE A3 111 151 61
CKE1 D39 MD40 D40 MD41
61 [16] MDCLKA0 16 64
MDCLKA3 D40 MD41 CK0/DNU D41 MD42
[16] MDCLKA3 16 64 [16] MDCLKA#0 17 68
MDCLKA#3 CK0/DNU D41 MD42
CK0/DNU D42 MD43
[16] MDCLKA#3 17 68 [16] MDCLKA1 137 69
MDCLKA4 CK0/DNU D42 MD43
CK1 D43 MD44
[16] MDCLKA4 137 69 [16] MDCLKA#1 138 153
MDCLKA#4 CK1 D43 MD44 CK1 D44 MD45
[16] MDCLKA#4 138 153 [16] MDCLKA2 76 155
MDCLKA5 CK1 D44 MD45
CK2/DNU D45 MD46
[16] MDCLKA5 76 155 [16] MDCLKA#2 75 161
MDCLKA#5 CK2/DNU D45 MD46 CK2/DNU D46 MD47
[16] MDCLKA#5 75 161 162
CK2/DNU D46 MD47 -DQS0 D47 MD48
162 5 72
-DQS0 D47 MD48 -DQS1 DQS0 D48 MD49
5 72 14 73
-DQS1 DQS0 D48 MD49 -DQS2 DQS1 D49 MD50
14 73 25 79
-DQS2 DQS1 D49 MD50 -DQS3 DQS2 D50 MD51
25 79 36 80
-DQS3 DQS2 D50 MD51 -DQS4 DQS3 D51 MD52
36 80 56 165
-DQS4 DQS3 D51 MD52 -DQS5 DQS4 D52 MD53
56 165 67 166
-DQS5 DQS4 D52 MD53 -DQS6 DQS5 D53 MD54
67 166 78 170
-DQS6 DQS5 D53 MD54 -DQS7 DQS6 D54 MD55
78 170 86 171
-DQS7 DQS6 D54 MD55
DQS7 D55 MD56
86 171 [9,13] -DQS[0:7] 47 83
DQS7 D55 MD56 DQS8 D56 MD57
47 83 84
DQS8 D56 MD57 SMBDATA_ISO 91 D57 MD58
84 87
SMBDAT A_ISO D57 MD58 SMBCLK_ISO 92 SDA D58 MD59
91 87 88
SMBC LK_ISO92 SDA D58 MD59 SCL D59 MD60
88 174
B SCL D59 MD60 D60 MD61 B
174 181 175
D60 MD61 SA0 D61 MD62
VCC_DDR 181 175 182 178
SA0 D61 MD62 SA1 D62 MD63
182 178 183 179
SA1 D62 MD63
SA2 D63
183 179
SA2 D63 MVREF_DIM 1 44
MVREF_DIM1 VREF CB0
44 82 45
VREF CB0 VDDID CB1
82 45 VCC_DDR 184 49
VDDID CB1 VDDSPD CB2
VCC_DDR 184 49 51
VDDSPD CB2 CB3
51 9 134
CB3 NC CB4
9 134 10 135
NC CB4 NC/RESET CB5
10 135 101 142
V CC_DDR NC/RESET CB5 NC CB6
101 142 102 144
NC CB6 NC CB7
102 144 173
NC CB7 NC

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
173 90 DDR_WP
NC WP
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

R42 90 DDR_WP R139 4.7KR 103


1KR1% WP VCC_DDR NC/FETEN
103
NC/FETEN

3
11
18
26
34
42
50
58
66
74
81
89
93
100
116
124
132
139
145
152
160
176
MVREF_DIM DIMM-184_green
3
11
18
26
34
42
50
58
66
74
81
89
93
100
116
124
132
139
145
152
160
176

DIMM-184_green
R41 C26 C27
1KR1% C1000P50X C1000P50X

VCC_DDR

VCC_DDR VCC_DDR VCC_DDR close to the middle of DIMM 1

CB26 C1U16Y CB53 C0.1U25Y CB45 C0.1U25Y


CB60 C68P50N CB21 C0.1U25Y CB14 C68P50N CB10 C1000P50X
CB69 X_C 1000P50X CB22 C0.1U25Y CB38 C100P50N
A A
CB42 C0.1U25Y CB31 C0.1U25Y CB33 C1000P50X EMI
CB32 C1000P50X CB49 C0.1U25Y
CB18 C47P50N CB5 C0.1U25Y VCC_DDR
CB12 C0.1U25Y CB65 C1U16Y VCC_DDR CB9 X_C0.1U25Y CB2 C68P50N
CB52 C0.1U25Y
C90 C0.01U50X CB72 C0.1U25Y
CB68
CB44
C0.1U25Y
C1U16Y
CB27
CB17
C0.1U25Y
C1U16Y
CB13 C0.1U25Y
MICRO-START INT'L CO.,LTD.
CB59 X_C0.1U25Y Title

CB6 X_C0.1U25Y
DIMM1&2
Size D o cument Number Rev
CB1 X_C0.1U25Y Custom MS-7211 0A
Date: Thursda y, July 28, 2005 Sheet 12 of 32
8 7 6 5 4 3 2 1
A B C D E

DIMM1 & 2 Terminations

VTT_DDR VTT_DDR
MAA[0:13]
[9,12] MAA[0:13]
4 MD[0:63] 4
[9,12] MD[0:63] MD0 MD41
1 2 1 2
-DQS[0:7] MD4 3 4 RN2 MD45 3 4 RN36
[9,12] -DQS[0:7] MD5 8P4R-47R0402 -DQS5 8P4R-47R0402
5 6 5 6
-DQM[0:7] MD1 7 8 -DQM5 7 8
[9,12] -DQM[0:7]
-DQS0 1 2 -DQM6 1 2
-DQM0 3 4 RN5 -DQS6 3 4 RN42
MD2 5 6 8P4R-47R0402 MD54 5 6 8P4R-47R0402
MD6 7 8 MD50 7 8
MD7 1 2 MD48 1 2
MD3 3 4 RN7 MD52 3 4 RN39
MD8 5 6 8P4R-47R0402 MD49 5 6 8P4R-47R0402
MD12 7 8 MD53 7 8
MD9 1 2 MD55 1 2
MD13 3 4 RN10 MD51 3 4 RN43
-DQS1 5 6 8P4R-47R0402 MD60 5 6 8P4R-47R0402
-DQM17 8 MD56 7 8

MD14 1 2 MD61 1 2
MD15 3 4 RN14 MD57 3 4 RN44
MD10 5 6 8P4R-47R0402 -DQM7 5 6 8P4R-47R0402
MD11 7 8 -DQS7 7 8
CKEA1 1 2 MD62 1 2
[9,12] CKEA1
CKEA3 3 4 RN15 MD58 3 4 RN45
[9,12] CKEA3
CKE A2 5 6 8P4R-47R0402 MD63 5 6 8P4R-47R0402
[9,12] CKEA2
CKEA0 7 8 MD59 7 8
[9,12] CKEA0
3 MD20 1 2 -SRASA 1 2 3
[9,12] -SRA SA
MD16 3 4 RN16 -SWEA 3 4 RN34
[9,12] - SWEA
MD17 5 6 8P4R-47R0402 -SCASA 5 6 8P4R-47R0402
[9,12] -SCA SA
MD21 7 8 MAA13 7 8

MAA12 1 2 MAA3 1 2
MAA11 3 4 RN17 MAA2 3 4 RN26
MAA9 5 6 8P4R-47R0402 MAA1 5 6 8P4R-47R0402
MAA7 7 8 MAA0 7 8

-DQS2 1 2 MAA5 1 2
-DQM2 3 4 RN18 MAA8 3 4 RN22
MD22 5 6 8P4R-47R0402 MAA6 5 6 8P4R-47R0402
MD18 7 8 MAA4 7 8

MD25 1 2 MD19 1 2
MD29 3 4 RN24 MD23 3 4 RN21
-DQS3 5 6 8P4R-47R0402 MD24 5 6 8P4R-47R0402
-DQM37 8 MD28 7 8
MD42 1 2 MD32 1 2
MD46 3 4 RN37 MD36 3 4 RN30
MD43 5 6 8P4R-47R0402 MD33 5 6 8P4R-47R0402
MD47 7 8 MD37 7 8
-DQS4 1 2 1 2
MD34 3 4 RN32 MAA10 3 4 RN28
-DQM4 5 6 8P4R-47R0402 BA1 5 6 8P4R-47R0402
[9,12] BA1
MD38 7 8 BA0 7 8
[9,12] BA0
MD39 1 2 -CS0 1 2
2 [9,12] -CS0 2
MD35 3 4 RN33 -CS2 3 4 RN35
[9,12] -CS2
MD40 5 6 8P4R-47R0402 -CS1 5 6 8P4R-47R0402
[9,12] -CS1
MD44 7 8 -CS3 7 8
[9,12] -CS3

MD30 1 2
MD26 3 4 RN25
MD27 5 6 8P4R-47R0402
MD31 7 8

VTT_DDR VTT_DDR

CB57 C1U16Y CB61 C1U16Y

CB50 C1U16Y CB70 C1U16Y

CB3 C1U16Y CB15 C1U16Y

CB19 C1U16Y
1 1

CB43 C1U16Y CB24 X_C1U16Y

CB34 C1U16Y CB30 X_C1U16Y

CB23 C1U16Y CB51 C1000P50X

CB11 C68P50N CB71 X_C1U16Y MICRO-START INT'L CO.,LTD.


Title
CB28 C1U16Y CB62 X_C1U16Y DIMM1&2 Terminations
CB39 X_C1U16Y Size D o cument Number Rev
Custom MS-7211 0A
Date: Thursda y, July 28, 2005 Sheet 13 of 32
A B C D E
A B C D E

+12V

+12V +3.3V ==> 6A +12V CB78 C0.1U25Y


VCC_AGP +1.5VAGP ==>1A VCC3
+5V===>2A VCC5
VCC3 +12V==>1A
VCC5 +3.3AUX==>750mA VCC_AGP R144 CB92 X_C0.1U25Y
4 4.7KR 4
AGP1 VCC3 VCC_AGP
B1 A1 R140 0R
OVRCNT# +12V -TYPEDET FPD8 CM8 C1U16Y0805
B2 A2 FPD8 [11]
+5V TYPEDET# GC_AGP8X_DET
B3 A3
+5V GC_AGP8X_DET CB81 C0.1U25Y
B4 A4
USB+ USB-
B5 A5
PIRQ#B GND GND PIRQ#A CM7 X_C1U16Y0805
[17] PIRQ#B B6 A6 PIRQ#A [11,17,20]
INTB# INTA# PCIRST#
[16] AGPCLK B7 A7 PCIRST# [17,27]
GREQ CLK RST# GGNT CB73 X_C0.1U25Y
[10] GREQ B8 A8
REQ GNT GGNT [10]
B9 A9
VCC3.3 VCC3.3 CB88 C0.1U25Y VCC3
[10] ST0 B10 A10 ST1 [10]
ST0 ST1
[10] ST2 B11 A11
RBF ST2 MB_AGP8X_DET D BIH CB83 C0.1U25Y
[10] RBF B12 A12 D B IH [10]
RBF DBI_HI CB93 C0.1U25Y
B13 A13
DBIL GND GND WBF CB80 C0.1U25Y
[10] DBIL B14 A14 W BF [10]
SBA0 DBI_LO WBF SBA1 C154 X_C10U10Y0805
B15 A15
SBA0# SBA1# CB82 C0.1U25Y
B16 A16
SBA2 VCC3.3 VCC3.3 SBA3
B17 A17
SB_STBF SBA2# SBA3# SB_STBS
[10] SB_STBF B18 A18 SB_STBS [10]
SB_STBF SB_STBS (Place near AGP slot)
B19 A19 1 2
SBA4 GND GND SBA5 Decopuling capacitors CB87 C0.1U25Y
B20 A20
SBA6 SBA4# SBA5# SBA7
B21 A21
SBA6# SBA7#
B22 A22
RESERVED RESERVED
B23 A23
VCC3_SB GND GND
B24 A24
VCC3_AUX RESERVED
B25 A25
GD31 VCC3.3 VCC3.3 GD30
B26 A26
GD29 AD31 AD30 GD28
3 B27 A27 3
AD29 AD28
B28 A28
GD27 VCC3.3 VCC3.3 GD26
B29 A29
GD25 AD27 AD26 GD24 VIA DEMO BOARD
B30 A30
AD25 AD24
B31 A31
AD_STBF1 GND GND AD_STBS1
[10] AD_STBF1 B32 A32 AD_STBS1 [10]
GD23 AD_STBF1 AD_STBS1 GBE3 VCC_AGP
B33 A33 GBE3 [10]
AD23 C#/BE3
B34 A34
GD21 VDDQ1.5V VDDQ1.5V GD22 +12V
B35 A35
GD19 AD21 AD22 GD20 VCC_AGP R163
B36 A36
AD19 AD20 VCC_AGP 1KR1%
B37 A37
GD17 GND GND GD18 Vgs=1V
B38 A38

D
GBE2 AD17 AD18 GD16 R175 Id=385mA
[10] GBE2 B39 A39
C#/BE2 AD16 Q23 Q25
B40 A40 1KR
G I RDY VDDQ1.5V VDDQ1.5V GFRAME R162 N-2N7002_SOT23
[10] G IRDY B41 A41 GFRAME [10]
IRDY FRAME 3.32KR1% GC_AGP8X_DET Low indicates that support 8x
B42 A42 G G
KEY KEY
B43 A43
KEY KEY N-2N7002_SOT23 AGP8X_DET_NB
B44 A44

S
KEY KEY VREF_CG AGP8X_DET_NB [10]
B45 A45 R160 1.47KR1%
GDEVSEL KEY KEY GTRDY R173
[10] GDEVSEL B46 A46 GTRDY [10]
DEVEL TRDY GSTOP C133
B47 A47 GSTOP [10] 10KR
GPERR VDDQ1.5V STOP C0.1U25Y
B48 A48
PERR PME# R161
B49 A49
GSERR GND GND GPAR 1.02KR1% Vref:
[10] GSERR B50 A50 GPAR [10]
GBE1 SERR PAR GD15 2x :0.4VDDQ=600mV
[10] GBE1 B51 A51
C#/BE1 AD15 4x :0.5VDDQ=750mV
B52 A52
GD14 VDDQ1.5V VDDQ1.5V GD13 8x :0.23VDDQ=345mV
B53 A53
GD12 AD14 AD13 GD11 S3 issue
B54 A54
AD12 AD11
2 B55 A55 2
GD10 GND GND GD9
B56 A56
GD8 AD10 AD9 GBE0
B57 A57 GBE0 [10]
AD8 C#/BE0
B58 A58
AD_STBF0 VDDQ1.5V VDDQ1.5V AD_STBS0
[10] AD_STBF0 B59 A59 AD_STBS0 [10]
GD7 AD_STBF0 AD_STBS0 GD6 VCC_AGP
B60 A60
AD7 AD6
B61 A61
GD5 GND GND GD4 GPERR R192 8.2KR
B62 A62
GD3 AD5 AGP3.0 Ver 0.95 AD4 GD2 +12V
B63 A63
AD3 AD2 Low indicates that support 8x
B64 A64

D
GD1 VDDQ1.5V VDDQ1.5V GD0
B65 A65
VREF_CG AD1 AD0 AGPVREF R164 Q21
B66 A66 AGPVREF [10]
VREF_CG VREF_GC 4.7KR N-2N7002_SOT23
CB91 _SLOT-AGP124_red-2pitch C139 R176 G

C
C1U16Y X_C1U16Y0805 100KR
GC_AGP8X_DET B

S
near pin R174 10KR Q26
N-MMBT3904_NL_SOT23
R147

E
S3 and boot-up code 25 issue Vbe=0.65~0.85
200R1%
SBA[0:7]
[10] SBA[0:7]
GD[0:31]
[10] GD[0:31]

1 1

MICRO-START INT'L CO.,LTD.


Title
AGP SLOT
Size Document Number Rev
C MS-7211 0A
Date: Thursday, July 28, 2005 Sheet 14 of 32
A B C D E
5 4 3 2 1

VGA CONNECTOR
VCC5

UD4
D BAV99LT1_SOT23 D
1 2 100
EMI
VCC5 For noise issue

3
F1
VGACON

VCC5 VCC5 F-MINISMDC110 C80


C1000P50X
UD5 VCC5
BAV99LT1_SOT23 UD3 near connector
1 2 BAV99LT1_SOT23 UD2 VCC5
1 2 X_BAV99LT1_SOT23

3
VGACON1 1 2

3
close to chip CONNECTOR CONN-VGA R91 R89
EMI B TOP VIEW 4.7KR 4.7KR

3
EMI B 100 6
L10 60L600m_300 1 11
[11] AR
L12 0R 7
L9 60L600m_300 2 12 R88 100R
[11] AG SPD2 [11]
L13 0R 8
L8 60L600m_300 3 13 L6 60L600m_300
[11] AB H SYNC [11]
L14 0R 9
4 14 L5 60L600m_300
VSYNC [11]
10
5 15 R90 100R
C112 C113 C114 C77 C74 C71 C76 C73 C70 SPDCLK2 [11]
R96 R95 R93
X_C10P50N

X_C10P50N

X_C10P50N

C 75R 75R 75R C10P50N C10P50N C10P50N C10P50N C10P50N C10P50N C

16

17
VCC5
EMI C64

3
C67 C33P50N
C33P50N 1 2

CP21 X_CP
1 2
UD1
X_BAV99LT1_SOT23

VGAGND

VGAGND

CP20 X_CP
B 1 2 B

CP22 X_CP
1 2

VGAGND

A A

MICRO-START INT'L CO.,LTD.


Title
VGA Connector
Size Document Number Rev
Custom MS-7211 0A
Date: Thursday, July 28, 2005 Sheet 15 of 32
5 4 3 2 1
4 3 2 1

filtering from 10K~1M


CPU P4 K7 Pull-Down Capacitors
V CC3 V CC3V
R215 33 10
CP14 X _ COPPER CB111 CB110 CB109 CB105CB98 CB97
R254 0R R216 33 10
FB12 X_80L700m_150
R217 33 10
CB1 08 CB107
X_C0.1U25Y C4.7U10Y0805 R218 33 10

C0.1U25Y

C0.1U25Y

C0.1U25Y

C0.1U25Y

C0.1U25Y

C0.1U25Y
5 20 FS3 R270 47R0402 GCLK_NB C196 X_C10P25N0402
VDD_3.3 *FS3 / 48MHz U SBCLK [17]
16 21 FS2 R271 47R0402 AGPCLK C207 X_C10P25N0402
VDD_3.3 *FS2 / 24_48# MHz SIO4 8M [22]
22 VCLK C189 C10P25N0402
VDD_3.3
D 51 D
VDD_3.3 C PUCLK_R R215 33R C PUCLK
55 53 C PUCLK [5]
VDD_3.3 P4/K7_CPU 52 CPUCLK#_R R216 33R C PUCLK# SPCLK C197 X_C10P25N0402
P4/K7_CPU# CPUCLK# [5]
49 NBHCLK#_R R217 33R N BHCLK#
CPU-CS# NBHCLK# [8]
23 48 N BHCLK_R R218 33R N BHCLK SIOPCLK C221 C10P25N0402
VDD_Core CPU-CS N BHCLK [8]
SWAP F WH_CLK C213 X_C10P25N0402
2 44 DCLKA2 DCLKA2 1 2 PCI_CLK1 C224 C10P25N0402
GND SDRAM0 / DDR0_T MDCLKA2 [12]
9 43 DCLKA#2 DCLKA#2 3 4
GND SDRAM1 / DDR0_C MDCLKA #2 [12]
13 42 DCLKA5 DCLKA5 5 6 PCI_CLK2 C220 C10P25N0402
GND SDRAM2 / DDR1_T MDCLKA5 [12]
19 41 DCLKA#5 DCLKA#5 7 8
GND SDRAM3 / DDR1_C MDCLKA #5 [12]
24
33 GND RN53 8P4R-10R
GND DCLKA4 DCLKA4 USBCLK C217 X_C10P25N0402
39 38 1 2 MDCLKA4 [12]
GND SDRAM4 / DDR2_T DCLKA#4 DCLKA#4
47 37 3 4 MDCLKA #4 [12]
C181 54 GND SDRAM5 / DDR2_C 36 DCLKA1 DCLKA1 5 6 SIO48M C218 C10P25N0402
GND SDRAM6 / DDR3_T MDCLKA1 [12]
C22P50N C GX1 35 DCLKA#1 DCLKA#1 7 8
SDRAM7 / DDR3_C MDCLKA #1 [12]
SB14MHZ C160 X_C10P25N0402
Y2 3 RN54 8P4R-10R
C GX2 X1 DCLKA3 DCLKA3 A C97XIN C195 X_C10P25N0402
_14.318MHZ32P_D 4 32 1 2
X2 SDRAM8 / DDR4_T MDCLKA3 [12]
C178 31 DCLKA#3 DCLKA#3 3 4
SDRAM9 / DDR4_C MDCLKA #3 [12]
C22P50N R283 0 R 28 30 DCLKA0 DCLKA0 5 6 APICCLK C211 X_C10P25N0402
+2.5VSB VCC2.5B [12,18,27] S MBDATA_ISO SDATA SDRAM10 / DDR5_T MDCLKA0 [12]
27 29 DCLKA#0 DCLKA#0 7 8
[12,18,27] S MBCLK_ISO SCLK SDRAM11 / DDR5_C MDCLKA #0 [12]
SIO48M C117 X_C10P50N
34 RN55 8P4R-10R
FB11 X_80L700m_150 VDD_3.3/2.5 LAN_CLK C208 X_C10P50N
40
VDD_3.3/2.5 MODE R257 33R0402
50 6 V CLK [19]
VDD_2.5 *Mobile# / AGP-0 SEL_CK 408 R268 33R0402
7 G CLK_NB [10]
CP13 C172 CB146 CB104 *P4_K7# / AGP-1 8 R282 33R0402 GU ICK C108 X_C10P25N0402
*PCI_Stop# / AGP-2 A G PCLK [14]
C4.7U10Y0805 X_C0.1U25Y C0.1U25Y R279
X_COPPER 475R1% 25
Iref R285 22R0402
A PICCLK [19]
R248 10 FS1 R284 22R0402
**FS1 / PCI-F S PCLK [19]
[27 ,29] FP_RST# X_33 R0402 26
FB9 X_80L700m_150VCC2.5A PD# / Reset# RN67 8P4R-33R 48M/24MHZ
+2.5VSB
11 S EL_SDR/DDR 7 8 LAN_CLK 30mAx30mAx22=0.0198
**Sel_SDR_DDR#/PCI-0 LAN_CLK [21]
[9] D CLKI DCLKI R219 22R0402 46 12 5 6 1/16=0.0625 DC LKI C157 C10P25N0402
CP11 X _ COPPER BUFFER_IN FB_OUT PCI-1 MULT S I OPCLK
[9] DC LKO 45 14 3 4 S IOPCLK [22]
C CB1 03 R264 Buffer_In PCI-2 15 PCI_CLK1 _R PCI_CLK1 REFCLK C
1 2 PCI_CL K1 [20]
C0.1U25Y 22R0402 PCI-3
17 30mAx30mAx22=0.0198 used only for EMI issue
CB99 CB1 01 A C97XIN FS0 PCI-4 R272 33R0402 PCI_CLK2
[23] AC97XIN 1 18 PCI_CL K2 [20]
1/16=0.0625
C0 .1U25Y C4.7U10Y0805 GU ICK 56 *FS0
*CPU_Stop#/PCI-5/Turbo#
/ REF0 R269 33R0402 F WH_CLK
[11] G U ICK VTT_PGd#/REF1 T URBO#
FWH_CLK [29] T r a ce less 0.2"
R250
22R0402 U11
SB14MHZ VTTGD#
[18] SB14MHZ
R206
22R0402
V CC3

R273
X_10KR

MULT
Transistor Q29 for Vtt_PG is Shut Source Termination Resistors
for Intel P4 use only ! C PUCLK R195 49.9R1% MULT Rr Iref Ioh Voh
C PUCLK# R196 49.9R1%
N BHCLK R198 49.9R1% 0 221 5.00mA 4*Iref 1.0V
N BHCLK# R197 49.9R1%
V CC3 1 475 2.32mA 6*Iref 0.7V

F o r I n tel P4 use
o n l y ! Trace less 4 9 . 9 o h m f o r 5 0 o h m M/B impedance
0.2"

R209
B
4.7KR B
R210
VTTGD#
10KR

R239 Q29
Intel Table
V C CP
N-MMBT3904_N L_SOT23 MODE
220R Pin 8 Pin 18
S3 S2 S1 S0 CPU R253 X
V CC3 V CC3 V CC3
Not Support 266 On xx AGP_2 PCI_5/Turbo
1 1 0 1 133 xx On PCI_Stop# CPU_Stop#
R253 R287
1 0 200 4.7KR
R262
10KR 10KR
SEL_CK408
1 1 MODE Pin52/53
166 SEL_CK 408 R262 X
T URBO#
S EL_SDR/DDR On xx Current Mode
xx On Open Drain
CLOCK STRAPPING RESISTORS
R280
V CC3 V_FSB_VTT 4.7KR + 2.5VSB
SEL_SDR/DDR
Pull Hi Select SDRAM
1
3
5
7

R100 R99 R199


RN65 1KR 1 KR X_4.7KR
Pull Lo Select DDR-SDRAM
8P4R-1KR
2
4
6
8

RN68
FS_2
FS3 8 7 FS_3
A FS2 6 5 N-MMBT3904_N L_SOT23 B U FFER_IN A
FS1 4 3 FS_1 Q12
H_BS L1 [5,6]
FS0 2 1 FS_0

N-MMBT3904_N L_SOT23
8P4R-10 KR Q14
H_BS L0 [5,6]
R220
X_4.7KR

MICRO-START INT'L CO.,LTD.


Title
Keep these resistors to get Clock Generator RTM862-520 / ICS950917AF
better DDR compatibility Size Document Number Rev
C MS-7211 0A
Date: Thursday, Ju ly 28, 2005 Sheet 16 of 32
4 3 2 1
A B C D E

VCC3
VCC3
CB147 C0.1U25Y

CB115 C0.1U25Y

W10
W11
W17
W18
W19
W21
H10
H11
H12

R19

U19

V19
V21

Y21
T19

W9

W8
M8
H9

N8

R8

U8
K8

P8

V8
T8
AD[0..31]

L8
J8
CB114 C0.1U25Y
[20,21] AD[0..31]
4 U13A VCC3_SB 4
AD0 G2 CB117 C0.1U25Y

VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
AD1 AD0
J4 A22
AD2 AD1 USBVDD CB149 C0.1U25Y
J3 B22
AD3 AD2 USBVDD CB150 CB151 CB106
H3 C22
AD4 AD3 USBVDD C0.1U25Y C0.1U25Y
F1 D22
AD5 AD4 USBVDD X_C10U10Y0805
G1 E22
AD6 AD5 USBVDD
H4 F22
AD7 AD6 USBVDD
F2 J13
AD8 AD7 USBVDD
E1 J14
AD9 AD8 USBVDD
G3 J15
AD10 AD9 USBVDD USBP0+
E3 J16 USB0+ [25]
AD11 AD10 USBVDD USBP0-
D1 J17 USB0- [25]
AD12 AD11 USBVDD USBP1+
G4 J18 USB1+ [25]
AD13 AD12 USBVDD USBP1-
D2 USB1- [25]
AD14 AD13 USBP2+
D3 2.5V_SB USB2+ [25]
AD15 AD14 USBP2-
F3 USB2- [25]
AD16 AD15 C297 near SB USBP3+
K3 USB3+ [25]
AD17 AD16 USBP3-
L3 C24 C0.1U25Y USB3- [25]
AD18 AD17 USBSUS25 +2.5VSB USBP4+
K2 USB4+ [25]
AD19 AD18 USBP4-
K1 USB4- [25]
AD20 AD19 USBP5+
M4 A23 USB5+ [25]
AD21 AD20 PLLVDDA CB95 CB102 USBP5-
L2 B23 USB5- [25]
AD22 AD21 PLLVDDA C1U16Y USBP6+
N4 USB6+ [25]
AD23 AD22 C0.1U25Y USBP6-
L1 D23 USB6- [25]
AD24 AD23 PLLGNDA USBP7+
M2 C23 USB7+ [25]
AD25 AD24 PLLGNDA USBP7-
M1 USB7- [25]
AD26 AD25 USBP0+
P4 E20
AD27 AD26 USBP0+ USBP0-
3 N3 D20 3
AD28 AD27 USBP0- USBP1+
N2 A20

1
3
5
7

1
3
5
7

1
3
5
7

1
3
5
7
AD29 AD28 USBP1+ USBP1-
N1 B20
AD30 AD29 USBP1- USBP2+
P1 E18
C_BE#[0..3] AD31 AD30 USBP2+ USBP2-
[20,21] C_BE#[0..3] P2 D18
AD31 USBP2- USBP3+
A18

2
4
6
8

2
4
6
8

2
4
6
8

2
4
6
8
C_BE#0 USBP3+ USBP3-
E2 B18
C_BE#1 CBE0 USBP3- USBP4+
C1 D16
C_BE#2 CBE1 USBP4+ USBP4-
L4
CBE2 USBP4-
E16 near connector
C_BE#3 M3 A16 USBP5+
CBE3 USBP5+ USBP5- RN31 RN38 RN85 RN86
B16
FRAME# USBP5- USBP6+ 8P4R-15KR 8P4R-15KR 8P4R-15KR 8P4R-15KR
[20,21] FRAME# J1 D14
DEVSEL# FRAME USBP6+ USBP6-
[20,21] DEVSEL# H2 E14
IR DY# DEVSEL USBP6- USBP7+
[20,21] IRDY# J2 A14
TRDY# IRDY USBP7+ USBP7-
[20,21] TRDY# H1 B14
STOP# TRDY USBP7-
[20,21] STOP# K4
SERR# STOP
[20,21] SERR# C2
PAR SERR OC#1
[20,21] PAR F4 C26
PERR# PAR USBOC0 OC#1 [25]
[20,21] PERR# C3 D24
PCIRST# PERR USBOC1
[14,27] PCIRST# R1 B26
PCIRST USBOC2
C25
PIRQ#A USBOC3 OC#4
[11,14,20] PIRQ#A A4 B24 OC#4 [25]
PIRQ#B INTA USBOC4
[14,20] PIRQ#B B4 A24
PIRQ#C INTB USBOC5
[20] PIRQ#C B5 A26
PIRQ#D INTC USBOC6
[20] PIRQ#D C4 A25
PIRQ#E INTD USBOC7
[21] PIRQ#E D4
PIRQ#F INTE USBCLK
E4 E23 USBCLK [16]
PIRQ#G INTF USBCLK
A3
PIRQ#H INTG
2 B3 B25 USBREXT R243 5.6KR1% 100 2
INTH USB REXT
[21] PREQ#0 PREQ#0 A5 D26 UDPWR R238 10KR
PREQ#1 REQ0 UDPWR
[20] PREQ#1 B6 D25
PREQ#2 REQ1 UDPWREN
[20] PREQ#2 C5
PREQ#3 REQ2
D5
PREQ#4 REQ3 KBCLK#
P3 W3 KBCLK# [24]
PREQ#5 REQ4 KBCK/KA20G KBDAT#
R3 V1 KBDAT# [24]
REQ5 KBDT/KBRC MSCLK#
W1 MSCLK# [24]
PGNT#0 MSCK/IRQ1 MSDAT#
[21] PGNT#0 A6 W2 MSDAT# [24]
PGNT#1 GNT0 MSDT/IRQ12
[20] PGNT#1 D6
PGNT#2 GNT1
[20] PGNT#2 C6
PGNT#3 GNT2
E5
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND

PGNT#4 GNT3
R4
PGNT#5 GNT4
R2
GNT5
GND
GND
GND
GND
GND
GND
GND
GND
GND

_VIA-VT8237R
H23
J21
J25

C13
C14
C15
C16
C17
C18
C19
C20
C21
D13
D15
D17
D19
D21

H13
H14
H15
H16
H17
H18
A13
A15
A17
A19
A21
B13
B15
B17
B19
B21

E13
E15
E17
E19
E21
F25
A1
A2
B1
B2
E8

VCC3
VCC3
1 RN70 1
RN73 PGNT#5 1 5
8P4R-8.2KR PREQ#5 1 5
2
PIRQ#E PGNT#4 2
1 2 3
PIRQ#H PREQ#4 3
3 4 4
4
PIRQ#G
PIRQ#F
5
7
6
8
PGNT#3
PREQ#3
6
7
6 MICRO-START INT'L CO.,LTD.
PGNT#0 7 Title
8
PREQ#0 8
9
9 10
10 VT8237-1(PCI,USB,KB)
10P8R-8.2KR Size Document Number Rev
C MS-7211 0A
Date: Thursday, July 28, 2005 Sheet 17 of 32
A B C D E
A B C D E

+2.5VSB V C C 3_SB 2.5V_SB


+2.5VSB

C294 C1U16Y
SB Pull up resistors VT8237 strapping
C296 C1U16Y Auto Reboot
C B96 C0.1U 25Y V C C 3_SB
V CC3

M18

AA4
AB4
AB5
AB6
N18

R18

U18
CB148 C1U16Y S U S _CLK

P18

V10
V11
V12
V13
V14
V15
V16
V17
V18
T18
B 1 2

L18
J10
J11
J12

M9

N9

R9

U9

U4
K9

P9

V9
T9

T4
L9
J9
CM10 C4.7U10Y 0805 -EXTSMI 3 4 ACSDO R312 X_4.7KR
U 13B VGATE C P U M ISS RN72 V CC3
[19] VGATE 8 7 5 6
PD_[ 0..15] P D _0 AA22 TEST 6 5 - R ING 7 8 8P4R-4. 7KR R308 4.7KR

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

VSUS33
VSUS33
VSUS33
VSUS33

VSUS25
VSUS25
[24] PD_[0..15] PDD0
P D_1 Y24 - CLKRUN 4 3
P D_2 AA26 PDD1 - LDRQ T HERM#
[19,22] - LDRQ 2 1 1 2
P D_3 AA25 PDD2 - BATLOW 0: Enable
3 4
P D_4 AB26 PDD3 B IT_CLK RN69 PME# RN81 1: Disable
4 T1 B IT_CLK [23] 5 6 4
P D_5 AC26 PDD4 ACBITCLK S DIN0 8P4R-2.7KR -SUSST 8P4R-4. 7KR
U3 SDI N0 [23] 7 8
P D_6 AC23 PDD5 ACSDIN0 S DIN1 GP O1
V2 1 2
P D_7 AD25 PDD6 ACSDIN1 S DIN2 -PWR OK_NB LPC FWH Command
U1 3 4
P D_8 AD26 PDD7 ACSDIN2 S DIN3 - P W R BTN RN76
V3 5 6
P D_9 AC24 PDD8 ACSDIN3/SLP_BTN A C SYNC RN71 -SMB ALT 8P4R-4. 7KR
T2 7 8
PD_10AC25 PDD9 ACSYNC ACSDO
U2 1 2 SYNC S YNC [23]
PD_11AB24 PDD10 ACSDO T3 A C RST 3 4 S D O UT GP O0 R313 4.7KR A C S Y N C R311 4.7KR
PDD11 ACRST S D OUT [23] VCC3
PD_12AB23 5 6 -A CRST Try if not used
PDD12 - A CRST [23]
PD_13AA24 8 P 4 R-33R7 8 - S USA R301 4.7KR
PD_14 Y26 PDD13
W4 P ME# [20,21,22]
PD_15AA23 PDD14 PME V4 - BATLOW 0: Enable
PDD15 BATLOW C P U M ISS VCC3 1: Disable
Y1 CPUMISS [5]
P D REQY23 CPUMISS - R ING
[24] P D REQ Y2
P D ACKV24 PDDREQ RING -SUSST S P KR
[24] P D ACK Y3 - S U SST [10] [29] S P KR 1 2
-PIOR W26 PDDACK SUSST1 Y4 T HERM# S ERIRQ 3 4 Eliminate LAN EEPROM
[24] - PIOR PDIOR AOLGP/THRM THERM# [5,22]
- P IOW Y25 AA1 -EXTSMI -C PUSTP 5 6 RN82
[24] - P I OW PDIOW EXTSMI
P DRDYY22 AB1 -SMB ALT * " S P K R " => CPU Freq. Adjust Setting - PCISTP 7 8 8P4R-4. 7KR V CC3
[24] P DRDY PDRDY SMBALRT
- PCS_1V22 AC1 -LID
[24] - PCS_1 PDCS1 LID -LID [2 4]
- PCS_3V23 AD2 - P W R BTN 1 - Disable (Default) MIIE EDI R291 X_4.7KR
[24] - PCS_3 PDCS3 PWRBTN [19] MIIE EDI
P D_A0W23 AF1 - P W R O K_NB 0 - Enable T PO R292 X_4.7KR
[24] P D _A0 PDA0 PWROK - P W ROK_NB [10]
P D_A1 V25 AB7 - CLKRUN R294 4.7KR
[24] P D _A1 PDA1 CLKRUN
P D_A2W24 AC7 -C PUSTP
[24] P D _A2 PDA2 CPUSTP
IRQ_14 AD24 AD6 - PCISTP
[24] IRQ_14 IRQ14 PCISTP SMBDT2 8 7 0: Disable
SD_[ 0..15] V C C 3_SB
S D _0 AC20 AE1 INTRUD ER S MBCK2 6 5 1: Enable
[24] SD_[0..15] SDD0/TBC1 INTRUDER
S D _1 AB20 S MBDATA_ISO 4 3
S D _2 SDD1/VALID S US_CLK S M BCLK_ISO
AC21 AB3 2 1 V CC3
S D _3 SDD2 SUSCLK External SATA PHY
3 AE18 3
S D _4 SDD3/RXD2 S MBCLK_ISO RN80
AF18 AC4 S M BCLK_ISO [12, 16,27]
S D _5 SDD4/RXD3 SMBCK1 S M B DATA_ISO 8P4R-2.7KR
AD18 AB2 S M B DATA_ISO [12, 16,27]
S D _6 SDD5/RXD4 SMBDT1 IN TRUDER R306 1MR P D ACKR234 4.7KR
AD19 VBAT Issue +3. 3VBAT V CC3
S D _7 SDD6/RBC0 S MBCK2 GP I0 R307 1MR
AF19 AC3
S D _8 SDD7/RBC1 SMBCK2 SMBDT2
AE20 AD1
S D _9 SDD8/RXD5 SMBDT2 0: Enable
AF20
S D _10 SDD9/RXD6 -S USA Try if not used 1: Disable
AD20 AA2
S D _11 SDD10/RXD7 SUSA SLP_S3#
AE21 AD3 S L P_S3# [22,27,29]
S D _12 SDD11/RXD8 SUSB SLP_S5# SLP_S3# R310 X_4.7KR
AF21 AF2 S L P_S5# [27]
S D _13 SDD12/RXD9 SUSC SATA Master/Slave Mode
AD21
S D _14 SDD13/TXD0 GP I0
AD22 AE2
S D _15 SDD14/TXD1 GPI0 GP I1
AF22 AC2 GP I1 [2 4]
SDD15/TXD2 GPI1 GP O0 - PCS_1 R233 10KR
AA3 V CC3
S D REQ AD17 GPO0 GP O1
[24] S D REQ AE3
S D ACK AD23 SDDRQ/RXD1 GPO1 G P I OA
[24] S D ACK AE5 7 8
-SIOR AF23 SDDACK/TBC0 GPIOA G P I OB S DIN2
[24] - SIOR AD5 5 6
- S IOW AE23 SDIOR/TXD4 GPIOB G PIOC S DIN1 RN79
[24] - S I OW AF5 3 4
S DRDY AF17 SDIOW/TXD3 GPIOC G PIOD S DIN3 8P4R-4. 7KR 0: Master Slave mode
[24] S DRDY AC6 1 2
- SCS_1 AF25 SDRDY/RXD0 GPIOD 1: Master Master mode
[24] - SCS_1 SDCS1/TXD8
- SCS_3 AF26 AD9 S ERIRQ
[24] - SCS_3 SDCS3/TXD9 SERIRQ S ERIRQ [22]
S D_A0 AF24 AF8 S P KR NB Strapping Selection
[24] S D _A0 SDA0/TXD6 SPKR
S D_A1 AC22 AB8 S B14MHZ
[24] S D _A1 SDA1/TXD5 OSC S B 14MHZ [1 6]
S D_A2 AE24 RN48
[24] S D _A2 SDA2/TXD7
AE26 AF9 T PO 8P4R-2. 2KR V CC3
[24] IRQ_15 IRQ15 TPO AE9 TEST +2.5VSB P D _A0 1 2 R317 2.2KR0402
C176 C0.1U 25Y TEST P D _A1 G P I OA
AC19 3 4
SVREF AC10 P D _A2 5 6 R320 2.2KR0402
R244 360R1% AB21 VDDA0 C295 G PIOC
7 8
SCOMPP C1U16Y R235 2.2KR0402
2 AB10 2
STXP_1 C214 C0.01U 50X
STXP1 AB13 GNDA0 R319 - PCS_3
STXN_1 C225 C0.01U 50X
STXN1 AC13 STXP1
AD11 SRE XT G PIOD
STXN1 SREXT
R286
S RXN_1 C223 C1200P25X
S R XN1 AF13 AE10 S X O 2.2KR0402
SRXP_1 C228 C1200P25X
SRXP1 AE13 SRXN1 SXO
SRXP1 4.7KR 1% FB 14
AF10 S XI R318 SW3 bit1 SW3 bit3
STXP_2 C205 C0.01U 50X
STXP2 AB15 SXI X_80L700m_ 150 G P IOB GPIOA Vlink auto compensation GPIOB IOQ Depth
STXN_2 C212 C0.01U 50X
STXN2 AC15 STXP2 AE11 V D D A33 0 Auto mode 0 8 Level
STXN2 VDDA33 VCC3
1 2 2.2KR0402 1 Manual mode 1 1 Level
S RXN_2 C200 C1200P25X
S R XN2 AF15 AF11 C230 C P16
SRXP_2 C209 C1200P25X
SRXP2 AE15 SRXN2 GNDA33 X_C0.1U25Y SW3 bit4 SW3 bit2
SRXP2 W5 GPIOC Host Clock GPIOD GTL pullup
near chipset GND S A T A2 S A T A1 0 200Mhz 0 Enable
W12 V5
W13 VDDATS GND M16 1 Auto Mode 1 Disable
device issue VDDATS GND
W14 N11
W15 VDDATS GND N12 8 8
VDDATS GND VCC3
W16 N13
VDDATS GND
N14 1 1
CP15 GND
AC17 N15
GNDATS
GNDATS
GNDATS
GNDATS
GNDATS
GNDATS
GNDATS
GNDATS
GNDATS
GNDATS
GNDATS
GNDATS
GNDATS

VDDAS GND C222 STXP_1 STXP_2


2 1 AC11 N16 2 2
GNDAS
GNDAS
GNDAS
GNDAS

VDDAS GND X_C0.1U 25Y STXN_1 STXN_2


+2.5VSB AB17 3 3
VDDAS
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

+2.5VSATA AB11
FB 13 VDDAS
4 4
X_80L700m _150
S RXN_1 5 S RXN_2 5
AC14
AD12
AD13
AD14
AD15
AD16

AC16
AC12
AB14

AE12
AE14
AE16

AB16
AB12
AF12
AF14
AF16

K18
F6
F7

M11
M12
M13
M14
M15
L11
L12
L13
L14
L15
L16
J5

R5
K5
P5

C194 C192 CM11 SRXP_1 6 SRXP_2 6


C0.1U 25Y
1
7 7 1
_VIA-VT8237R 9 9
X_C1U16Y C4.7U10Y 0805
SXO CONN-SATA_orange C ONN-SATA_orange
near chipset SXI Y3
- P W R BTN R305 68R
PWR BTN# [29]
MICRO-START INT'L CO.,LTD.
Title
25MHZ18P_D -1
C236 C237 C251
VT8237-2(IDE,STAT,GPIO)
C16P50N C16P50N C0.1U 25Y Size D o c u m e n t Number R ev
B
MS-7211 0A
D a te: Thursday, July 28 , 2005 Sheet 18 of 32
A B C D E

1 - Enable
A B C D E F G H

+2.5VSB 2.5V_SB VCC3_SB

M21
M22
M23
M24
M25

M19
N21
N22
N23
N24
N25
N26

N19

D12
K21

P22
P23
P24
P25
P26

P19

E12

E10
E11
L23

L21

L19

D9
E9
VLAD[0:7]
[10] VLAD[0:7]]
U13C
VLAD0 H25

VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK

MIIVCC
MIIVCC
MIIVCC
MIIVCC
MIISUS25
MIISUS25
VLAD1 G26 VD0
A11
VLAD2 K26 VD1 MCRS
B11
VLAD3 J23 VD2 MCOL
VLAD4 F26 VD3
C11
4 VLAD5 G25 VD4 MTXENA 4
A10
VLAD6 K22 VD5 MTXD0
B10
VLAD7 K24 VD6 MTXD1
B9
VD7 MTXD2
E24 A9
VD8 MTXD3
G23 C10
VD9 MTXCLK
L26
VD10
L25 D10
VD11 MRXER
E26 C9
VD12 MRXCLK
E25 D8
VD13 MRXDV
L24 C8
VD14 MRXD0
M26 B8
VD15 MRXD1
A8
VBE0 MRXD2
[10] VBE0 G24 C7
VBE MRXD3
UPCMD K23 A7
[10] UPCMD DNCMD K25 UPCMD MDCK
[10] DNCMD B7
DNCMD MDIO
UPSTB J26 D7
[10] UPSTB -UPSTB UPSTB PHYRST
[10] -UPSTB J24
UPSTB
D11
DNSTB H26 EECS
[10] DNSTB B12
+2.5VSB -DNSTB H24 DNSTB EEDO MIIEEDI
[10] -DNSTB A12 MIIEEDI [18]
DNSTB EEDI
C12
R236 EECK +2.5VSB
F24 E7 +2.5VRAM R297 2.2R
VPAR RAMVCC CB113
4.7KR LVREF_SB H22 C0.1U25Y
VLREF
E6
R228 VCO MPP RAMGND
3 J22 3
360R1% VCOMPP FERR#
U24 FERR# [5,6]
VCLK FERR A20M#
[16] VCLK L22 U26 A20M# [5]
VCLK A20M IGNNE#
T24 IGNNE# [5]
IGNNE HINIT#
R26 HINIT# [5]
INIT INTR
F23 T25 INTR [5]
VIOUT INTR NMI_SB
T26 NMI_SB [5]
NMI SMI#
G22 U25 SMI# [5]
VIIN SMI STPCLK#
R24 STPCLK# [5]
STPCLK SLP#
V26 SLP# [5]
LAD0 SLP G HI
[22,29] LAD0 AD8 R22
LAD1 LAD0 GHI DPSLP
[22,29] LAD1 AF7 P21
LAD2 LAD1 DPSLP
[22,29] LAD2 AE7
LAD3 LAD2
[22,29] LAD3 AD7 AC9 VGATE VGATE [18]
LAD3 VGATE
AC8 SATA_LED SATA_LED [29]
VIDSEL VRDSLP
AB9
VRDSLP AGPBZ
AD10 AGPBZ [10]
-LFRAME AGPBZ/GPI6
[22,29] -LFRAME AF6
-LDRQ LFRM
[18,22] -LDRQ AE6
LREQ0
AE8
LREQ1 SPCLK
R23 SPCLK [16]
PCICLK
PWRGD_SB AC5 U23 APICCLK
[27] PWRG D_SB PWRGD APICCLK APICCLK [16]
C246
X_C0.01U50X
AD4 R25 APICD0 R232 1KR
RSMRST# RSMRST APICD0/APICCS APICD1 R231 1KR
[27,29] RSMRST# T23 VCC3
APICD1/APICACK
+3.3VBAT AF4 T22 +2.5VSBPLL CP12 +2.5VSB
+3.3VBAT VBAT PLLVCC
2 2 1 2
X1 AE4 U22 GND_SBPLL FB10 X_80L700m_150 CM9 CB94 C198
RTCX1 PLLGND +2.5VSB
CB100 C1U16Y0805
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
X2 AF3 C0.1U25Y
Y4 RTCX2 FB7 X_80L700m_150 X_C0.1U16X C1000P50X
32.768KHZ12.5P_D 2 1
1 2
AC18
Decoupling capacitors
R11
R12
R13
R14
R15
R16
R21

W22
W25
AA21
AB19
AB22
AB25

AE17
AE19
AE22
AE25

AB18

AA10
P11
P12
P13
P14
P15
P16

K19
T11
T12
T13
T14
T15
T16

T21
AA9
_VIA-VT8237R CP10
C244 3 4 C245
NOTEBOOK SIGNALS
C10P50N C10P50N
RN51
AGPBZ 8 7
DPSLP VCC3
6 5
VCC5_SB G HI 4 3
+2.5VSB 2 1

R295 8P4R-4.7KR0402
VRDSLP R293 4.7KR
1KR1% R208 C161
D7 3.01KR1% C0.1U25Y
1

S-BAT54C_SOT23
JBAT2
LVREF_SB
R298 3 1
2.55KR1% 2 +3.3VBAT R193 C169
3 422R1% C0.1U25Y
JBAT2(1-2)
2

C247 R309 _JUMPER-1X2B_green


R299 1KR
C10U10Y0805 C253
1 1
1KR C0.01U50X
LVREF_SB=0.625
JBAT1
VBAT Issue
under 10uF C171,C195 should close to SB 1-2 Clear CMOS
JBAT1
BAT-2P_SO41
2-3 Normal MICRO-START INT'L CO.,LTD.
R300 1KR Title
SIO _VBAT
VT8237-3(V-LINK,MII,CPU,RTC)
Size Document Number Rev
Custom MS-7211 0A
Date: Thursday, July 28, 2005 Sheet 19 of 32
A B C D E F G H
8 7 6 5 4 3 2 1

PCI SLOT 2
PCI SLOT 1
D D
-12V + 12V
-12V +12V P CI2
P CI1 B1 A1
-12V TRST#
B1 A1 B2 A2
B2 -12V TRST# A2 B3 TCK +12V A3
TCK +12V GND TMS
B3 A3 B4 A4
GND TMS TDO TDI
B4 A4 B5 A5
B5 TDO TDI A5 V CC5
B6 +5V +5V A6 P I RQ#C
V CC5 +5V +5V PIRQ#B [17] P IRQ#D P I RQ#D +5V INTA# PIRQ#A P IRQ#C [17]
B6 A6 B7 A7
P I RQ#C +5V INTA# P I RQ#D PIRQ#B INTB# INTC# P IRQ#A [11,14,17]
B7 A7 B8 A8
PIRQ#A INTB# INTC# [17] PIRQ#B INTD# +5V
B8 A8 B9 A9
B9 INTD# +5V A9 B10 PRSNT#1 RESERVED A10
PRSNT#1 RESERVED RESERVED +5V(I/O) V CC5
B10 A10 V CC5 B11 A11
RESERVED +5V(I/O) V CC3 PRSNT#2 RESERVED
B11 A11 B12 A12
V CC3 B12 PRSNT#2 RESERVED A12 B13 GND GND A13
GND GND GND GND
B13 A13 B14 A14 VCC3_SB
B14 GND GND A14 B15 RESERVED RESERVED A15 PCIRST#1
RESERVED RESERVED VCC3_SB GND RST# PCIRST#1 [27]
B15 A15 PCIRST#1 B16 A16
GND RST# PCIRST#1 [27] [16] PCI_CL K2 CLK +5V(I/O)
B16 A16 B17 A17 PGNT#2
[16] PCI_CLK1 CLK +5V(I/O) GND GNT# PGNT#2 [17]
B17 A17 PGNT#1 B18 A18
GND GNT# PGNT#1 [17] [17] P REQ#2 REQ# GND
B18 A18 B19 A19 PME#
[17] P REQ#1 REQ# GND +5V(I/O) RESERVED PME# [18 ,21,22]
B19 A19 PME# AD31 B20 A20 AD30
+5V(I/O) RESERVED PME# [18,21,22] AD31 AD30
AD31 B20 A20 AD30 AD29 B21 A21
AD31 AD30 AD29 +3.3V V CC3
AD29 B21 A21 B22 A22 AD28
AD29 +3.3V V CC3 GND AD28
B22 A22 AD28 AD27 B23 A23 AD26
AD27 GND AD28 AD26 AD25 AD27 AD26
B23 A23 B24 A24
AD25 AD27 AD26 AD25 GND AD24
B24 A24 B25 A25
B25 AD25 GND A25 AD24 C_BE#3 B26 +3.3V AD24 A26 ID2 R315 330R AD20
C_BE#3 +3.3V AD24 ID2 R304 330R AD19 AD23 C/BE#3 IDSEL
B26 A26 B27 A27
AD23 C/BE#3 IDSEL AD23 +3.3 AD22
B27 A27 B28 A28
B28 AD23 +3.3 A28 AD22 AD21 B29 GND AD22 A29 AD20
AD21 GND AD22 AD20 AD19 AD21 AD20
B29 A29 B30 A30
AD19 AD21 AD20 AD19 GND AD18
B30 A30 B31 A31
AD19 GND AD18 AD17 +3.3V AD18 AD16
B31 A31 B32 A32
AD17 B32 +3.3V AD18 A32 AD16 C_BE#2 B33 AD17 AD16 A33
C_BE#2 AD17 AD16 C/BE#2 +3.3V FRAME#
B33 A33 B34 A34 FRAME# [17, 21]
C/BE#2 +3.3V FRAME# IRD Y# GND FRAME#
C B34 A34 FRAME# [17,21] [17,21] I RDY# B35 A35 C
IRD Y# B35 GND FRAME# A35 B36 IRDY# GND A36 TR DY#
[17,21] I RDY# IRDY# GND +3.3V TRDY# TRDY# [17, 21]
B36 A36 TR DY# DEVSEL# B37 A37
+3.3V TRDY# TRDY# [17,21] [17 ,21] DEVSEL# DEVSEL# GND
DEVSEL# B37 A37 B38 A38 STOP#
[17,21] DEVSEL# DEVSEL# GND GND STOP# STOP# [17, 21]
B38 A38 STOP# LOCK# B39 A39
GND STOP# STOP# [17,21] LOCK# +3.3V
LOCK# B39 A39 PERR# B40 A40
LOCK# +3.3V [17,21] P ERR# PERR# SDONE
PERR# B40 A40 B41 A41
[17,21] P ERR# PERR# SDONE +3.3V SBO#
B41 A41 SERR# B42 A42
+3.3V SBO# [17,21] S ERR# SERR# GND
SERR# B42 A42 B43 A43 PAR
[17,21] S ERR# SERR# GND +3.3V PAR PAR [17, 21]
B43 A43 PAR C_BE#1 B44 A44 AD15
+3.3V PAR PAR [17,21] C/BE#1 AD15
C_BE#1 B44 A44 AD15 AD14 B45 A45
AD14 C/BE#1 AD15 AD14 +3.3V AD13
B45 A45 B46 A46
B46 AD14 +3.3V A46 AD13 AD12 B47 GND AD13 A47 AD11
AD12 GND AD13 AD11 AD10 AD12 AD11
B47 A47 B48 A48
AD10 B48 AD12 AD11 A48 B49 AD10 GND A49 A D9
AD10 GND A D9 GND AD9
B49 A49
GND AD9
A D8 B52 A52 C_BE#0
A D8 C_BE#0 A D7 AD8 C/BE#0
B52 A52 B53 A53
A D7 AD8 C/BE#0 AD7 +3.3V A D6
B53 A53 B54 A54
B54 AD7 +3.3V A54 A D6 A D5 B55 +3.3V AD6 A55 A D4
A D5 +3.3V AD6 A D4 A D3 AD5 AD4
B55 A55 B56 A56
A D3 B56 AD5 AD4 A56 B57 AD3 GND A57 A D2
AD3 GND A D2 A D1 GND AD2 A D0
B57 A57 B58 A58
A D1 B58 GND AD2 A58 A D0 B59 AD1 AD0 A59
AD1 AD0 ACK#64 +5V(I/O) +5V(I/O) REQ#64
B59 A59 B60 A60
ACK#64 +5V(I/O) +5V(I/O) REQ#64 ACK64# REQ64#
B60 A60 B61 A61
B61 ACK64# REQ64# A61 B62 +5V +5V A62
+5V +5V +5V +5V
B62 A62
+5V +5V
S LOT-PCI
S LOT-PCI

IDSEL = AD20
IDSEL = AD19
MASTER = PREQ#2
MASTER = PREQ#1
PIRQ#C
B
PIRQ#B B

AD[0..31]
[17, 21] AD[0..31]
C_BE#[0 ..3]
[17,21] C_BE#[0 ..3]

SMBDATA_ISO
[12,16,18,27] S MBDATA_ISO
SMBCLK_ISO
[12,1 6,18,27] S MBCLK_ISO

PCI PULL-UP / DOWN RESISTORS PCI SLOT DECOUPLING CAPACITORS

FRAME# 2 1 V CC5 V CC3 -12V VCC3_SB


V CC3 V CC3 V CC5
IRD Y# 4 3 +12V
TR DY# 6 5 RN74 RN78 RN77 C256
DEVSEL# 8 7 8P4R-2.7KR 8P4R-8.2 KR 8P4R-2.7 KR X_C0.1 U16X C258
LOCK# 2 1 PGNT#11 2 P I RQ#D 1 2 C249 C250 C274 C254 X_C0.1 U16X
STOP# 4 3 PREQ#1 3 4 PIRQ#B 3 4 X_C0.1 U16X X_C0.1 U16X X_C0.1 U16X X_C0.1 U16X C153
PERR# 6 5 RN75 PGNT#25 6 P I RQ#C 5 6 C257 C248 X_C0.1 U16X
S ERR# 8 7 8P4R-2.7KR PREQ#2 7 8 PIRQ#A 7 8 C1000 P50X X_C0.1 U16X C232
EC53 C259 C260 C100 0P50X

X_.CD1000U6.3EL15
+ X_C100 0P50X X_C0.1 U16X

REQ#64 R316 4.7KR + EC51


VCC5
A X_.CD1000 U6.3EL15 A
1 2 CB1 16
ACK#64 R314 4.7KR C0.1U25Y
1 2 CB1 18
X_C0.1U25Y

C261
C0.1U25Y

1 2 CB1 12
C0.1U25Y
MICRO-START INT'L CO.,LTD.
Title
PCI Slo t 1 & 2
Size Document Number Rev
Cust om MS-7211 0A
Date: Thursday, Ju ly 28, 2005 Sheet 20 of 32
8 7 6 5 4 3 2 1
4 3 2 1

For RTL8110S/SB
VCC3 _SB DVDDA

For RTL8100C
R191 X_E_0R0805
VCC3 _SB
For RTL8100C FB8

G_80L2_100_0805
VCC3 _SB R246 G_0R0 805
DVDD VL2_5
DVDD R212 X_E_0R0 805
For RTL8110SB
VCC3 _SB R211 G_0R0805 C151 C179
D R200 G _0R C0.1U25Y C0.1U25Y D

For RTL8110SB

120

126

116
110

107
11
12

10

99
78
64
54
45
32
24

94
84
71
56
41
26

20

16
U17

7
3
HSDAC+
HSDAC-

AVDDH/NC
AVDDH/NC

AVDDL/AVDD33
AVDDL/AVDD33
AVDDL/AVDD33
AVDDL/NC
VDD18_A/NC

VDD18/NC
VDD18/NC
VDD18/VDD25
VDD18/VDD25
VDD18/NC
VDD18/VDD25
VDD18/NC
VDD18/VDD25
VDD18/NC

VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
AD[0..31]
[17,20] AD[0..31]
AD0 104 1 M DI_0+
AD1 103 AD0 MDI0+/TX+ 2 M DI_0-
AD2 AD1 MDI0-/TX- M DI_1+
102 5
AD3 98 AD2 MDI1+/RX+ 6 M DI_1-
AD4 97 AD3 MDI1-/RX- 14 M DI_2+
AD5 96 AD4 MDI2+/NC 15 M DI_2-
AD6 95 AD5 MDI2-/NC 18 M DI_3+
AD7 93 AD6 MDI3+/NC 19 M DI_3-
AD8 90 AD7 MDI3-/NC
AD9 AD8
89
AD10 87 AD9 105
AD11 86 AD10 LANWAKEUP 117 L A N_LINK_UP
AD12 85 AD11 LED0 115 LINK_100_C
AD13 83 AD12 LED1 114
AD14 82 AD13 LED2 113 LINK_1000 VCC3 _SB
AD15 79 AD14 LED3/NC M DI_0+
AD16 59 AD15 M DI_0-
AD17 58 AD16
AD18 57 AD17 U18 M DI_1+
AD19 55 AD18 106 MII_ EECS# MII_ EECS# 1 8 M DI_1-
AD20 53 AD19 EECS 111 MII_ EECK MII_ EECK 2 CS VCC 7
AD21 AD20 EESK MII_EE DI MII _EEDI SK NC R203 10KR M DI_2+
50 109 3 6
AD22 49 AD21 EEDI 108 MII_E EDO MII_ EEDO 4 DI NC 5 M DI_2-
AD23 AD22 EEDO DO GND
47
AD24 43 AD23 AT93 C46-10SI-2.7-A M DI_3+
AD25 42 AD24 R202 X_10KR M DI_3-
AD26 40 AD25
AD27 39 AD26 R201 3.6KR1% P l a c e these components close
AD28 37 AD27 t o t h e L A N Conroller
AD29 36 AD28
AD30 34 AD29 125 C TRL18 C145 C173 G_C0.1U25Y
R237 G_49.9R1%
C_BE#[0..3] AD31 33 AD30 CTRL18/NC C0.1U25Y
[17,20] C_BE#[0..3] AD31 G_49.9R1%
8 C TRL25 R242
C _BE#0 92
CTRL25 8100C removed
C _BE#1 77 CBE0B 121 C168 G_C0.1U25Y
R221 G_49.9R1%
C _BE#2 60 CBE1B XTAL1
C _BE#3 44 CBE2B C149 R229 G_49.9R1%
CBE3B C27P50N
C C
FR AME# 61 C159 C0.1U25Y R205 49.9R1%
[17,20] FRAME# IRD Y # FRAMEB
63 Y1
[17,20] IRDY# TR DY# IRDYB
67 25MHZ18P_D-1 R194 49.9R1%
[17,20] TRDY# D EVSEL# TRDYB
[17,20] DEVSE L# 68
STOP# 69 DEVSELB C147 C0.1U25Y R184 49.9R1%
[17,20] STOP# STOPB
PAR 76 122 C148 C27P50N
[17,20] PA R PAR XTAL2
PERR# 70 R185 49.9R1%
[17,20] PER R# PERRB
SER R# 75
[17,20] SER R# SERRB
[18,20,22] PME# 31 74 8100C Populate 104P
PIRQ #E 25 PMEB SMBDATA 72
[17] PIR Q#E INTAB SMBCLK
PR EQ#0 30
[17] PRE Q#0 REQB
P GNT#0 29 88
[17] PGN T#0 GNTB M66EN/NC 65
AD18 R288 100R 46 CLKRUNB 23 R251 1KR1%
IDSEL ISOLATEB V CC5
[10,22,27,29] PCIR ST#2 27
RSTB
GND/NC
GND/NC
GND/NC
GND/NC
GND/NC
GND/NC

VSSPST
VSSPST
VSSPST
VSSPST
VSSPST
VSSPST
VSSPST
VSSPST
VSS/NC
VSS/NC
R258 LAN _CLK28 127
[16] LAN _CLK CLK RSET
GND
GND
GND
GND

X_330R
VSS
VSS
VSS
VSS
VSS
reserved to avoid R187 R247 VL2_5 VCC3 _SB
G_2.49KR1% 15KR
PCIRST overshoot
22
48
62
73
112
118

35
52
80
100

4
17
123
124
128

9
13

21
38
51
66
81
91
101
119
over 4.5V on LAN
device.
C102 for 8100C
2.49K for 8110SB C4.7U10Y0805

5.6k for 8100C C87


C0.1U25Y

for 8110SB R123 R117 R107


G_0R0805 X_E_330R
330R
LAN_U SB1B
LAN_ACTLED 19 AMBER+
L A N_LINK_UP 20 AMBER-
13 NC
M DI_0+ 18 TD1+
M DI_0- 12 TD1-
C106 M DI_1+ 17
for 8110SB G_C0.01U50X M DI_1- 11
TD2+
TD2-
M DI_2+ 16 TD3+
M DI_2- 10 TD3-
M DI_3+ 15 TD4+
M DI_3- 9 TD4-
B 14 NC B
LINK_1000 21 GREEN+
LINK_100_C 22 GREEN-
for 8110SB C92
G _0R
CONN-RJ45_ USBX2_LEDX2_black-3
C0.1U25Y C0.1U25Y
C99 C103

VCC3 _SB VL2_5

DVDD DVDDA AVDDL AVDDH V-12P

3
8100C 2.5V X 3.3V X 2.5V
VL2_5 VL1_8 DVDD C TRL25 1 Q32
8110S 1.8V 1.8V 2.5V 3.3V X

2
4
For RTL8110SB 8110SB 1.2V 1.2V 2.5V 3.3V 3.3V
For RTL8110SB
For RTL8100C
R222 G_0R0805
P-PBSS53 50Z_SOT223 +
EC50 C199
X_C0.1U25Y
R266 X_E_0R0 805 Giga-Lan 10/100-Lan
VL2_5 R261 G_0R
For RTL8100C N58-22F0081-S42 N58-22F0061-S42
VL1_8 N58-22F0061-F02
+ EC52 VCC3 _SB R255 X_E_0R CD470U10EL11.5
CD470U10EL11.5 Link Yellow Link Yellow
Active Blinking Active Blinking

3
1000 Orange 100 Green
C TRL18 1 Q31 100 Green 10 None
G_P-PBSS5 350Z_SOT223 10 None
2 19 19
EMI 4
R261 For RTL8110SB 20 20
VL1_8 DVD DA Yellow Yellow
DVDD VCC3 _SB
R255 For RTL8100C
A A
C191 C144 C164 C163 C165
C10U10Y1206 C10U10Y1206
C158 C166 R188 G_0R0805
C0.1U25Y X_C0.1U25Y Orange
21 21
C216 C162 For RTL8110SB
X_C0.01U50X X_C0.01U50X
C226 C215 G_C1U16Y X_C0.1U25Y G_C4.7U10Y0805
C0.1U25Y C0.1U25Y
22 22
Green Green
C190 C184
C0.01U50X X_C0.01U50X
C193 C187
X_C0.01U50X X_C0.1U25Y
C150 C210
X_C0.1U25Y C0.1U25Y
C155 MICRO-START INT'L CO.,LTD.
C0.1U25Y Title
R e a l t ek 8100C/8110SB
Size Document Numb er Rev
Custom M S -7211 0A
Date: Thursday, July 28, 2005 Sheet 21 of 32
4 3 2 1
4 3 2 1

CPU FAN
U10
PCIRST#2 30 1 D RVDEN0
[10,21,27,29] PCI RST#2 LRESET# DRVDEN0
SIOPCLK 21 3 INDEX#
[16] SIO PCLK PCICLK INDEX#
SERIRQ 23 4 MOA#
[18] SERIRQ SERIRQ MOA#
-LDRQ 22 6 DSA#
[18,19] -LDRQ -LFRAME LDRQ# DSA# DIR#
[19,29] -LFRAME 29 8
LFRAME# DIR# STEP#
[18,20,21] PME# 86 9
PME# STEP# WRDATA# +12V
10
LAD0 WD# WE#
[19,29] LAD0 27 11
LAD1 LAD0 WE# TRACK0# R19
[19,29] LAD1 26 13
LAD2 LAD1 TRAK0# WP# 4.7KR
[19,29] LAD2 25 14 R16
LAD3 LAD2 WP# RDDATA# C P U F ANIN
[19,29] LAD3 24 15
LAD3 RDATA# HEAD#
D 16 D
HEAD# DSKCHG# +12V 27KR
125 17
GP13/GPX2 DSKCHG#
123 2 R14
GP15/GPY1 GP23/SCK 4
[29] BIOS_WP# 128 10KR
GP10/GPSA1 THERM# 3
121 5 THERM# [5,18]
GP17/GPSA2 OVT#/HM_SMI# 2
R170 126
X_4.7KR
GP12/GPX1 PD0 1
124 42
GP40 GP14/GPY2 PD0 PD1 C15 CPU _FAN1
127 41
GP11/GPSB1 PD1 PD2 C0.1U25Y BH1X 4BF_white
122 40
GP16/GPSB2 PD2 PD3
39 R171
VREF PD3 PD4 INDEX#
101 38 VCC5
VREF PD4 PD5 CPUFA NPWM1
102 37 1KR
CPU_TEMPA AUXTIN PD5 PD6
103 36
SYSIN CPUTIN PD6 PD7 P D[0..7] PD[0..7] [26]
104 35 RN47
SYSTIN PD7 TRACK0#
93 31 RSLCT [26] 2 1 VCC5
RSTOUT1# SLCT W P#
94 32 RPE [26] 4 3
RSTOUT0# PE RDD ATA#
95 33 RBU SY [26] 6 5
R142 10KR1% VIN4 BUSY DSKCHG#
VCC _AGP 96 34 RACK# [26] 8 7
+5VIN VIN3 ACK#
97 43 RSLIN# [26]
-12VIN VIN2 SLIN#
98 44 RINIT# [26] 8P4R-1KR
+ 12VIN VIN1 INIT#
99 45 RERR# [26]
VIN0 ERR#
VCCP 100 46 RAFD# [26]
CPUVCORE AFD#
47 RSTB# [26]
STB#
105
VID5 SYS FAN
106 88
VID4 GP34/RSTOUT4# HI:STR ENABLE B
107 69
VID3 GP36 STR _EN
108 87
VID2 GP35 R120 1KR R138 4.7KR STR _EN
109 70 VCC 5_SB
VID1 GP55/SUSLED +12V
110
VID0
56 DCDA# [26]
C P U F ANIN GP61/DCDA# R135 X_4.7KR
112 50 DSRA# [26]
C CPUFA NPWM1 CPUFANIN0 GP66/DSRA# R130 C
115 53 SINA [26] R129
CPUFANOUT0 GP63/SINA RTSA# SYSFANIN
119 51 RTS A# [26]
CPUFANIN1/GP21/MSI
GP65/HEFRAS/RTSA# SOU TA
120 54 SOU TA [26]
SYSFANIN CPUFANOUT1/GP20/MSO
GP62/PENKBC/SOUTA +12V 27KR
113 49 CTS A# [26]
SYSFANIN GP67/CTSA# DTRA# 4.7KR SYS_F AN1
116 52 DTRA# [26] R133
SYSFANOUT GP64/PENROM/DTRA#
111 57 RIA# [26] 10KR
AUXFANIN0 GP60/RIA# 3
58
AUXFANIN1/SO DCDB# 2
7 84 DCDB# [26]
AUXFANOUT GP41/DCDB# DSRB# C51 1
79 DSRB# [26]
CASEO PEN# GP46/DSRB# SINB_IRRX RN46 X_C0.1U25Y
76 82 SINB [26]
CASEOPEN# GP43/IRRX/SINB RTS B# BH1X 3B_white-2
89 80 RTS B# [26]
RSTOUT3#/GP33/SDA GP45/RTSB# SOUTB _IRTX RIB#
90 83 SOU TB [26] 1 2 VCC5
RSTOUT2#/GP32/SCLGP42/IRTX/SOUTB CTSB# DCDB#
91 78 CTS B# [26] 3 4
GP31 GP47/CTSB# DTRB# DSRB#
92 81 DTRB# [26] 5 6
GP30 GP44/DTRB# RIB# CTSB# FDD1
64 85 RIB# [26] 7 8
GP37 GP40/RIB#
67 59 R122 4.7KR 8P4R-4.7KR D RVDEN0
PSOUT#/GP57 GA20M VCC5 1 2
68 60 R121 4.7KR
PSIN/GP56 KBRST 3 4
72
PSON#/GP53 GP26/KDAT
63
5 6 INDEX#
PWR FAN
[18,27,29] SLP _S3# 73 62
SIO48M SUSB#/GP52 GP27/KCLK 7 8 MOA#
[16] SIO48M 18 66
IOCLK GP24/MDAT 9 10
65
GP25/MCLK B EEP 11 12 DSA#
VCC 3_SB 61 118
3VSB SI/BEEP 13 14
SIO_V BAT 74
VBAT R124 4.7KR 15 16 DIR#
75 VCC 3_SB
C100 GP51/RSMRST# 17 18 STEP#
28 71
C0.1U25Y 3VCC GP54/PWROK 19 20 WRDATA# +12V
12
3VCC 21 22 WE#
48 20
3VCC GND 23 24 TRACK0#
55
GP50 GND 25 26 WP#
VCC3 77 19
EN_VRM10/WDTO#/GP50 GP22/SCE# 27 28 RDDATA# 3 PWR_FAN1
114 117
1

B C101 AVCC AGND VTIN_GND 29 30 HEAD# 2 BH1X 3B_white-2 B


CB77 C0.1U25Y W83627EHF-C 31 32 DSKCHG# 1
C 0 .1U25Y 33 34 C265
2

CP9 VCC3 C275 C276 X_C0.1U25Y


CONN- FDD(4)(5)(6)V
C136 X_CO PPER
C0.1U25Y

RT1 X_C33P50N X_C33P50N


Straps
t

V REF R168 10KR1% VCC5 RTSA# L: CFAD=2E H: CFAD=4E


GP50 L: TTL LEVEL H: VRM10 L EVEL
S YSIN 10K RT1% RN41 SOUTA L: KBC DIS ABLE H: KBC ENABLE
DTRA# L: DISABLE S PI H: ENABLE SPI
ALARM [29]
R169 1 2
VREF R165 30KR1% 10KR SOU TA 3 4
DTRA# 5 6

C
CPU_TEMPA RTS A# 7 8
[5] CPU _TMPA
C135 BEEP B Q24
C3300P50X N-MMBT3904_NL_SOT23 8P4R-4.7KR
VTIN_GND

E
[5] VTIN_GND

Chasiss Intrusion
R127
R128 4.7KR GP50 X_4.7KR VCC 3_SB
SIO_V BAT

VCC5 R145 _22.1KR1%-LF +5VIN


Input Pin 100
R125 R158 56KR1% + 12VIN
A +12V A
2MR
-12V R155 232KR1% - 12VIN
JINTR1
1 CASEO PEN#
1 R159 R148
2 R156
2 N31-1020011-C09 10KR1% 10KR1% 10KR1%
MICRO-START INT'L CO.,LTD.
H1X2_black VTIN_GND V REF Title

2M for big sink current issue


Super I/O & FAN 83627EHF-D
Size D o cument Number Rev
Custom MS-7211 0A
Date: Thursda y, July 28, 2005 Sheet 22 of 32
4 3 2 1
4 3 2 1

SPDIF OUT

Pin46=floatiing---external clock
=pull-low---from clock gen
AUDIO CODE REGULATORS
VCC3 VDD3
CP17 Trace Width 40mils.
1 2 100 +5VR

R296 X_3R0805 +12V U8 +5VR


MC78L05ACP_TO92
C206 3 1
C0.1U25Y VIN VOUT

GND
C1U16Y0805

1
C243 C201
D C262 D
X_C1U1 6Y X_C 10U10Y0805

2
VDD3 1 2 3

48
47
46
45
44
43
42
41
40
39
38
37
U9 C241 TOP VIEW
C10U10Y1206 O G I
LINE_OUT_R SPEAKER_R

AVDD2
AVSS2
TEST6
TEST5
TEST4
TEST1

TEST3
TEST2

MONO
NC
NC

NC
C238
C0.1U25Y C240
C10U10Y1206
LINE_OUT_L SPEAKER_L
1 36
XTALIN 2
DVDD1 LOUTR
35
Intel Front Audio Connector
[16] AC97XIN XTL_IN LOUTL
3 34 C239 C1U16Y0805 FMIC_IN
XTL_OUT NC
4 33
DVSS1 NC +5VR +5VR
[18] SDOUT 5 32
R290 33R0402 SDATA_OUT VRDA C141
[18] BIT_CLK 6 31
BIT_CLK VRAD C1000P50X
7 30
R289 33R0402 DVSS2 AFILT2 R172
[18] SDIN0 8 29
SDATA_IN AFILT1 ACVREF R167 X_0R C134
9 28
DVDD2 NC 4.7KR FMIC _IN 1 X_C0.1U25Y
[18] SYNC 10 27 2
SYNC VREF MIC GND
[18] -AC RST 11 26
RESET# AVSS1 C219 C227 C129 C229
12 25 +5VR 3 4
PC_BEEP AVDD1 MICPWR VCC5

C4.7U10Y0805

C0.1U25Y

C1U16Y0805
C1000P50X
C234 C231 C233 C235 SPEAKER_R L OUT_R

VIDEOR
5 6

VIDEOL
PHONE
X_C47P50N C242 C1000P50X X_C 1U16Y0805 R166 FLINE OUTR
LINE NEXT R

AUXR
AUXL

MIC1
MIC2

LINR
CDR

LINL
C0.1U25Y C1U16Y0805 4.7KR 8

CDL
7
HPON

NC
SPEAKER_L 9 10 LOUT_L
ALC655 FLINE OUTL
LINE NEXT L
13
14
15
16
17
18
19
20
21
22
23
24
JAUDIO1

1
C _N31-2051021+N33-1020031 C
C130 C127
X_C1000P50X X_C1000P50X

2
1 C252
2
3 C1U16Y0805
4 C255 SPEAKER_R R157 X_0R L OUT_R
SPEAKER_L R146 X_0R LOUT_L
AUDIO-LINEIN C1U16Y0805
AUX_IN1
CD IN1
JAUD IO1(5-6) JAUD IO1(9-10)
CD_IN1 JUMPER -1X2B_green JUMPER- 1X2B_green
4 CDL C120 2 1 CDLX AUDIO1C
3 C 1 U16Y C131 C1U16Y0805 L INE_R 10
2 C D GND C119 2 1 CDGNDX 11
1 C 1 U16Y 12 Line-In
CDR C118 2 1 CDRX C132 C1U16Y0805 L INE_L 13
C 1 U16Y 18
AUDIO-CDIN1X4 16 Top
R151 C122
R152 X_22KR C123 C1000P50X JACK-EAR X3-13P
X_22KR C1000P50X

100

ACV REF R153 X_4.7KR


AUDIO1A
C137 X_C 1U16Y0805 ACMIC2 1
2
B
4 Mic B
C138 C1U16Y0805 MIC_97 5
3
14 Bottom
ACV REF R154 4.7KR
C125 C124 JACK-EAR X3-13P
C1000P50X C1000P50X

For EMI SPEAKER OUT JACK

AUDIO1B
L OUT_R 6
CP25 X_CP 7
1 2 8 Line -Out
Line_IN LOUT_L 9
CP26 X_CP 17
A 1 2 15 Middle A
C121 C128
CP27 X_CP Near Front C100P50N C100P50N JACK-EA RX3-13P
Line_OUT 1 2 Audio

MIC_IN CB85 X_C0.1U25Y CB154 X_C0.1U25Y MICRO-START INT'L CO.,LTD.


2 1 2 1 Title
AC97 Realtek ALC655
N54-13F0031-A10 Size D o cument Number Rev
Custom MS-7211 0A
Date: Thursda y, July 28, 2005 Sheet 23 of 32
4 3 2 1
A B C D E

IDE1 AND IDE2


SECONDARY
PRIMARY
RN58 RN57
PD_[0..15] PDREQ 2 1 PDDREQ SD_A0 2 1 SDA0
[18] PD_[0..15] [18] PDREQ [18] SD_A0
4 -PIOR 4 3 -PDIOR SD_A2 4 3 SDA2 4
[18] -PIOR SD_[0..15] [18] SD_A2
PDRDY 6 5 PHDRDY IRQ_146 5 IRQ14
[18] PDRDY [18] SD_[0..15] [18] IRQ_14
IDE1 PDACK 8 7 PDDACK PD_9 8 7 PDD9
[18] PDACK [18] PD_9
HDRST# R177 33R0402
1 2 R179 33R0402 IDE2
[27] HDRST# 8P4R-0R0402 8P4R-0R0402
PDD7 3 4 PDD8 HDRST# 1 2
RN59 RN61
PDD6 5 6 PDD9 SDD7 3 4 SDD8
PDD5 7 8 PDD10 PD_14 2 1 PDD14 SDD6 5 6 SDD9 -SIOR 2 1 -S_IOR
[18] PD_14 [18] -SIOR
PDD4 9 10 PDD11 PD_15 4 3 PDD15 SDD5 7 8 SDD10 SDACK 4 3 SD_ACK
[18] PD_15 [18] SDACK
PDD3 11 12 PDD12 PD_0 6 5 PDD0 SDD4 9 10 SDD11 IRQ_15 6 5 IRQ15
[18] PD_0 [18] IRQ_15
PDD2 13 14 PDD13 -PIOW 8 7 -PDIOW SDD3 11 12 SDD12 SD_A1 8 7 SDA1
[18] -PIOW [18] SD_A1
PDD1 15 16 PDD14 SDD2 13 14 SDD13
PDD0 17 18 PDD15 SDD1 15 16 SDD14
8P4R-0R0402 SDD0 SDD15 8P4R-0R0402
19 17 18
PDDREQ 21 22 R214 0R0402 19 R224 0R0402
-PDIOW 23 24 -PCS_1 -PCS1 SD_REQ 21 22 -SCS_1 -SCS1
-PDIOR [18] -PCS_1 -PCS_3 -PCS3 -S_IOW [18] -SCS_1 -SCS_3 -SCS3
25 26 [18] -PCS_3 23 24 [18] -SCS_3
PHDRDY 27 28 R213 0R0402 -S_IOR 25 26
PDDACK 29 30 RN56 SD_RDY 27 28 R223 0R0402
IRQ14 31 32 PD_12 2 1 PDD12 SD_ACK 29 30
[18] PD_12 RN64
PDA1 33 34 GPI1 PD_13 4 3 PDD13 IRQ15 31 32
GPI1 [18]
[18] PD_13
PDA0 35 36 PDA2 PD_2 6 5 PDD2 SDA1 33 34 -LID SD_14 2 1 SDD14
-PCS1 -PCS3 [18] PD_2 PD_1 PDD1 SDA0 SDA2 -LID [18]
[18] SD_14 SD_2
37 38 [18] PD_1 8 7 35 36 [18] SD_2 4 3 SDD2
-HD_LED1 39 40 -SCS1 37 38 -SCS3 SD_3 6 5 SDD3
[29] -HD_LED1 [18] SD_3
-HD_LED2 39 40 SD_13 8 7 SDD13
8P4R-0R0402 [29] -HD_LED2 [18] SD_13
RN49
PD_5 PDD5 8P4R-0R0402
[18] PD_5 2 1 IDE2 is not used issue RN66
3 PD_11 4 3 PDD11 3
[18] PD_11
VCC5 PD_4 6 5 PDD4 S DRDY 2 1 SD_RDY
[18] PD_4 [18] SDRDY
PD_3 8 7 PDD3 VCC5 SD_0 4 3 SDD0
[18] PD_3 [18] SD_0
SD_15 6 5 SDD15
P HDRDY SD_RDY R180 [18] SD_15 SD_1 8
R181 4.7KR 4.7KR
[18] SD_1 7 SDD1
8P4R-0R0402
RN52
IRQ14 R178 4.7KR IRQ15 R182 4.7KR
PD_6 PDD6 8P4R-0R0402
[18] PD_6 2 1 RN63
PDDREQ R204 PD_7 4 3 PDD7 SD_REQ R189 5.6KR0402
[18] PD_7 PD_8 PDD8 SD_12 2
5.6KR0402
[18] PD_8 6 5 [18] SD_12 1 SDD12
PDD7 R207 PD_10 8 7 PDD10 SD_4 4 3 SDD4
[18] PD_10 [18] SD_4
5.6KR0402 SDD7 R186 5.6KR0402 SD_116 5 SDD11
[18] SD_11
SD_5 8 7 SDD5
8P4R-0R0402 [18] SD_5
RN50
PD_A1 PDA1 8P4R-0R0402
[18] PD_A1 2 1
PD_A0 4 3 PDA0 -LID R303 15KR0402
[18] PD_A0 RN62
6 5
PD_A2 8 7 PDA2 SD_102 1 SDD10
[18] PD_A2 GPI1 [18] SD_10 SD_6 4
R302 15KR0402
[18] SD_6 3 SDD6
SD_7 6 5 SDD7
8P4R-0R0402 [18] SD_7
SD_9 8 7 SDD9
[18] SD_9

8P4R-0R0402

RN60
SD_8 2 1 SDD8
[18] SD_8 SDREQ 4
2 [18] SDREQ 3 SD_REQ 2
-SIOW 6 5-S_IOW
[18] -SIOW
8 7

8P4R-0R0402

PS2 KB/MS USBVCC1 EMI


VCC5
2
4
6
8

MAY CHANGE TO 0ohm RN1 C1 C2 C298 C299 C300


C0.1U25Y C0.1U25Y R4
8P4R-4.7KR X_330R
1
3
5
7

JKBMS1
MSDAT# L3 120L600m_250 7 10
[17] MSDAT#
8
MSCLK# L4 120L600m_250 11
[17] MSCLK#
12 9 KBGND
MS KBGND
1 KBDAT# 1
L1 120L600m_250 1 4 X_C0.1U25Y X_C0.1U25Y X_C0.1U25Y
[17] KBDAT#
2
KBCLK# L2 120L600m_250 5
[17] KBCLK#
6 3
KB
C220P50N0402
C220P50N0402
CONN-KB_MS
MICRO-START INT'L CO.,LTD.
C220P50N0402 Title
C220P50N0402 CP19 X_COPPER IDE Connectors , KB/MS
Size Document Number Rev
C306 C307 C308 C309 KBGND C MS-7211 0A
KBGND
Date: Thursday, July 28, 2005 Sheet 24 of 32
A B C D E
5 4 3 2 1

Rear USB Connectors 43mOHM X 2 A= 86mV Front USB Connectors B

USBVCC2
F3

5VDUAL2
5VDUAL1 USBVCC1 F-MINISMDC110
F2
1 2

+
F-MINISMDM260 R324 C263 EC54 USBVCC3
D R103 47KR .CD1000U6.3EL15 F4 D
47KR C0.1U25Y

+
OC#4
[17] OC#4
C85 EC42 F-MINISMDC110
[17] OC#1
C0.1U25Y .CD1000U6.3EL15
100 C183 R325
R104 C 0 .1U25Y 56KR
C177 56KR
X_C0.1U2 5Y

CLOSED TO CHIPSET
CLOSED TO CHIPSET

REAR PANEL USB CONNECTOR FOR USB PORT 0,1 FRONT PANEL USB CONNECTOR FOR USB PORT 4,6

C USBVCC1 C

LAN_USB1A USB 4+
[17] USB4+
5 23 USB4-
[17] USB 4-
6 24 USB 6+
[17] USB6+
7 25 [17] USB6- USB6-
[17] USB3-
USB3- 8 UP 26
USB3+ 1 27
[17] USB 3+
USB2- 2 28
[17] USB2-
USB2+ 3 29
[17] USB 2+
4 DO WN 30 USBVCC2
USBVCC2
CONN-RJ45_U SBX2_LEDX2_black-3
USBVCC1

5
USB6- 6 4 USB4-
JUS B2
5

USB6+ 1 3 USB4+
USB2- USB3- USB4- 1 2 USB6-
6 4
D11 USB 4+ 3 4 USB 6+ Consumer

2
USB2+ USB3+ X_ES D-IP4220 5 6
1 3
7 8 OC#4
D5 10
2

X_ES D-IP4220 H2X5(9)_yellow-2

B B
FRONT PANEL USB CONNECTOR FOR USB PORT 5,7
REAR PANEL USB CONNECTOR FOR USB PORT 2,3

[17] USB 7+ USB 7+ VCC3 VCC5


C266
[17] USB7- USB7-
[17] USB 5+ USB 5+
USB1- [17] USB5- USB5-
[17] USB1-
USB 1+
[17] USB 1+ C0.1U25Y
USB0-
[17] USB0-
USB 0+
[17] USB 0+

USBVCC3

USBVCC3
USBVCC1 JUS B1

USBVCC1 USB7- 1 2 USB5-


Consumer

5
USB 7+ 3 4 USB5+
USB1
USB5- USB7- 5 6
6 4
7 8 OC#4
5

USB5+ USB7+ 10
9 10 1 3
USB0- USB1- 9 10 H2X5(9)_yellow-2
6 4
1 5 D9
2

A 1 5 A
USB0+ 1 3 USB1+ USB0- 2 6 USB1- X_ES D-IP4220
USB 0+ 2 6 USB 1+
3 7
D4 3 7
4 8
2

X_ESD -IP4220 4 8
12 11
12 11

MICRO-START INT'L CO.,LTD.


CONN-USB X2-8P_black Title
USB Connectors
Size D o cument Number Rev
Custom MS-7211 0A
Date: Thursda y, July 28, 2005 Sheet 25 of 32
5 4 3 2 1
5 4 3 2 1

PRINTER/COM PORT
C50 C220P50N0402
C52 C220P50N0402
C53 C220P50N0402
C54 C220P50N0402
VCC5 SLIN#
RSLCT PRND2
PARALLAL PORT

A
PINIT#
D2 PRND1
BAS32L_LL34 LPT1_COM1
RN23 C57 C220P50N0402 STB# 1 14 AFD#
RSTB# 8 7 STB# C58 C220P50N0402 P R ND0 2 15 R E R R#

C
[22] RSTB# C59 C220P50N0402
D R AFD# 6 5 AFD# P R ND1 3 16 PIN IT# D
[22] RAFD#
PD0 4 3 P R ND0 RN11 C61 C220P50N0402 P R ND2 4 17 S LIN#
R E R R# 2 1 R E R R# PRND7 1 5 RERR# P R ND3 5 18
PRND6 1 5 PRND0 P R ND4
2 6 19
PRND5 2 AFD# P R ND5
X_8P4R-0R 3 7 20
PRND4 3 STB# P R ND6
4 8 21
RSLCT 4 C44 C220P50N0402 P R ND7
[22] RSLCT 6 9 22
P D[0..7] RPE 6 C46 C220P50N0402 RACK#
[22] PD[0..7] [22] RPE 7 10 23
RBUSY 7 C47 C220P50N0402 RBUSY
[22] RBUSY 8 11 24
RACK# 8 C49 C220P50N0402 RPE
[22] RACK# 9 10 12 25
9 10 RSLCT
RN12 13
PD3 8 7 P R ND3 10P8R-2.2KR PRND6
PD4 6 5 P R ND4 PRND5 CON N-LPT
K BGND
PD5 4 3 P R ND5 RN20 PRND4
PD6 2 1 P R ND6 PRND3 1 5 PRND3
SLIN# 1 5 C34 C220P50N0402
2
X_8P4R-0R PRND2 2 C36 C220P50N0402
3
PINIT# 3 C38 C220P50N0402
4
PRND1 4 C39 C220P50N0402
6
RERR# 6
[22] RERR# 7
PRND0 7 RPE
8
AFD# 8 RBUSY
9 10
9 10 RACK#
RN19 10P8R-2.2KR PRND7
PD1 8 7 P R ND1
6 5 PIN IT#
[22] RINIT#
PD2 4 3 P R ND2 STB# R80 2.2KR
S LIN# 2 1 S LIN# C33 C220P50N0402
[22] RSLIN#
X_8P4R-0R RSLCT CP18
RN9
PD7 8 7 P R ND7
C RACK# 6 5 RACK# C
RBUSY 4 3 RBUSY X_CO PPER
RPE 2 1 RPE K BGND
K BGND
X_8P4R-0R

SERIAL PORT 2

CN4 CN5 CN3 CN2


1 2 ND TRB 1 2 NRIB# 1 2 ND TRA 1 2 NRIA#
3 4 N S INB 3 4 NCTS B# 3 4 N S INA 3 4 NCTS A#
5 6 N SOUTB 5 6 N DSRB# 5 6 N DCDA# 5 6 N DSRA#
7 8 N DCDB# 7 8 N RTSB 7 8 N SOUTA 7 8 N RTSA

X_8P 4C-220P50N X_8P 4C-220P50N 8P4C-220P50N 8P4C-220P50N

K BGND K BGND
C278 CB7

C 0 .1U25Y C 0 .1U25Y

1
C277 C32
B C0.1U25Y D12 C0.1U25Y B
U15 U4
+12COM 1 20 VCC5 +12V A C +12COM 1 20 VCC5

2
VDD(12V) VCC(5V) VDD(12V) VCC(5V)
BAS32L_LL34
RTSB# 16 5 N RTSB RTSA# 16 5 N RTSA
[22] RTS B# DA1 DY1 [22] RTSA# DA1 DY1
DTRB# 15 6 ND TRB DTRA# 15 6 ND TRA
[22] DTRB# SOUTB DA2 DY2 N SOUTB [22] DTRA# SOUTA DA2 DY2 N SOUTA
[22] SOUTB 13 8 [22] SOU TA 13 8
DA3 DY3 DA3 DY3
RIB# 19 2 NRIB# RIA# 19 2 NRIA#
[22] RIB# RA1 RY1 [22] RIA# RA1 RY1
CTSB# 18 3 NCTS B# CTSA# 18 3 NCTS A#
[22] CTS B# RA2 RY2 [22] CTSA# RA2 RY2
DSRB# 17 4 N DSRB# DSRA# 17 4 N DSRA#
[22] DSRB# RA3 RY3 [22] DSRA# RA3 RY3
S INB 14 7 N S INB S INA 14 7 N S INA
[22] SINB RA4 RY4 [22] SINA RA4 RY4
DCDB# 12 9 N DCDB# DCDA# 12 9 N DCDA#
[22] DCDB# RA5 RY5 [22] DCDA# RA5 RY5

-12COM 10 11 -12V C A -12COM 10 11


VSS(-12V) GND VSS(-12V) GND
D10
GD752 32_SSOP20 BAS32L_LL34 GD752 32_SSOP20
C273 C31
C0.1U25Y C0.1U25Y

KBGND
10
COM2 COM1
A A
N DCDB# N S INB N DCDA# 1 6 N DSRA#
N SOUTB 1 2 ND TRB N S INA N RTSA
2 7
3 4 N DSRB# N SOUTA NCTS A#
3 8
N RTSB 5 6 NCTS B# ND TRA NRIA#
4 9
NRIB# 7 8
5
9 CONN-COM
H2X5( 10)_black
MICRO-START INT'L CO.,LTD.

11
K BGND
Title
K BGND COM / Parallel Port
Size D o cument Number Rev
Custom MS-7211 0A
Date: Thursda y, July 28, 2005 Sheet 26 of 32
5 4 3 2 1
8 7 6 5 4 3 2 1

Gate Trace 8 mils MOS R DS(ON) Vdss Vgs Id Package Qg


Sense Trace 8 mils
VCC5 VCC3_SB
3VSB MODE SELECT For MS-7 + MS-8
VDIMM LINEAR OR PWM SELECT
P07N03LV 25.0m 30V 20V 7A SO-8 13
VCC5_SB 3VSB MODE 3VDLDEC# VDIMM MODE EXTRAM
Added For APM7313 28.0m 30V 20V 6A SO-8 20
SINGLE MOSFET PULL HIGH R240 MS7 Ver:RAC LINEAR REGULATOR PULL LOW
R249 P3055LD 90.0m 25V 20V 12A TO-252 20
R265 330R 4.7KR
DUAL MOSFET PULL LOW PWM REGULATOR PULL HIGH
330R P45N02LD 28.0m 25V 20V 45A TO-252 30
RSMRST# [19,29]
[29] PLED1 SLP _S5# [18] P50N03LD 12.0m 27V 20V 50A TO-252 50
4.7KR
Connect to MS7_S3 for MS7 Ver:RAC NDS351 117m 30V 20V 2.5A SOT-23 4

C
D SLP _S3# [18,22,29] D
Q33 R256
N-MMBT3904_NL_SOT23 B 2N7002 7.5 60V 20V 115mA SOT-23
PCIRST# [14,17]
HDRST# [24]
PHKD6N02LT 20.0m 20V 12V 6A SO-8 20
E
R260 R245 10R
PCIRST#1 [20]
VCC 5_SB R241 10R
1 KR PCIRST#2 [10,21,22,29]
C185 C174 5V Dual Power
X_C22P25N X_C22P25N
R281 5VDUAL1
330R VCC 5_SB Rear USB ports
C167 VCC 5_SB
[29] PLED2 Q17
C1U16Y
4.7KR 5VDUAL_GATEH 4 5
C

R267 3 6
Q34 B 2 7
N-MMBT3904_NL_SOT23 1 Rds(on)=0.02ohm
8
C91 VCC5 Vgs=1V
E

R263 X_C2200P50X Id=7A


VCC3 NN-P 2103HV_SO8
1 KR 1.2(R1/R2+1)=VOL
VCC3 20mOHM X 2 A= 40mV
C180 50mil 1inch 9.53mOHM
C0.1U25Y 5VDUAL2
Front USB ports
VCC3 VCC 5_SB
C170 9VSB Q36

D
48
47
46
45
44
43
42
41
40
39
38
37
4 5
C VCC 3_SB U12 C1U16Y0805 Q18 3 6 C
N-P3055LD_TO252 5VDUAL_GATEL 2 7

PLED0/3VDLDEC#

VCC3
S5#
S3#

SLOT_RST#

BUF_RST#
PCI_RST#
HDD_RST#
DEV_RST#

RSMRST#
PLED1/EXTRAM

AGND
R275 R274 G +2.5VN B_VTT 1 8
1 KR 4 .7KR R276 R225 VCC5
1 KR 110R1%

S
C1U16Y0805 C272 Low RDS ON MOSFET

+
1 36 C171 R226 100 X_C1000P50X NN-P 2103HV_SO8
[12,16,18] SMB CLK_ISO SCL CHARPMP
2 35 100R1% EC43
[12,16,18] SMBDA TA_ISO SDA C2
3 34 c lose X_.CD1000U6.3EL15 VCC3
[16,29] FP_R ST# FP_RST# C1
[19] PWRG D_SB 4 33 t o MS7
CHIP_PWGD 5VSB1
5 32 8237

D
[5,6] CPU_GD CPU_PWGD VLR1_DRV
6
PWROK_BUF MS-7 VLR1_SEN
31 VCC3 should lead VCC2.5 by 1.5 ~ 2ms
7 30 Q30
[29] PWR_OK PWROK RAM_SBDRV/DMSB 5VUSB_DRV
8 29 N-P3055LD_TO252
PSOUT# 5V_DRV +2. 5VSB
9 28 G
RAM_HDRV/DMV

DDRTYPE VLR2_DRV
10 27
SS VLR2_SEN C175 B
11 26

S
GND0 GND1

+
12 25 VCC3 X_C1000P50X
RAM_HSEN
RAM_LDRV

VAGP_SEN
RAM_LSEN

VCC5
3VSB_DRV

VCC5 VAGP_DRV C97 EC48 C156


VID_DRV
VID_SEN

C202 X_C1000P50X R227 .CD1000U6.3EL15


VID_GD

X_C 10U10Y1206
5VSB0

C0.2 2U16X C203 Rds(on)=0.09ohm@10V 110R1%

D
3VSB

C1U16Y Vgs=0.8~2.5V
Id=12A Q20
VTT N-P3055LD_TO252
G VCC _AGP close to MS7
13
14
15
16
17
18
19
20
21
22
23
24

CPU Imax=3.5A MS- 7-RBC R230


NB Imax=1.5A(Intel) 100R1%

S
[6,28] VID_GD#

+
R AMDRV

V_FSB_V TT Rds(on)=0.027ohm
Vgs=1V EC46
Id=6A VCC 5_SB .CD1000U6.3EL15
S

B B
C66 G
VCC 5_SB R259

+
Q16
N-P3055LD_TO252
WIDE TRACE Q19 EC45
3.3R0805 4 5 X_.CD1000U6.3EL15
D

C86 C116 3 6
X_C 10U10Y0805 EC49 X_C1000P50N 5VDUAL _GATEL2 7
.CD1000U6.3EL15

X_C 1000P50X C186 C142 1 8


VCC3
+2.5V NB_VTT C1U16Y
VCC3_SB
+

B X_C1000P50X VCC3 NN-P 2103HV_SO8


EC41 VCC 3_SB
DDR VTT Power VCC3

+
.CD1000U6.3EL15
S

Rds(on)=0.054ohm@6V EC44
Vgs=0.6~1.5V G RAMDRV .CD1000U6.3EL15 VCC_DDR
2
4

Id=6A
Q28
N-P3055LD_TO252
1 Q27 VCC 3_SB R48

9
D

VCC3 U3 100R1% VTT_DDR


2.5V_SB Power N-APM2054N_SOT89 8 1

GND
3

VREF2 VIN
7 2
ENABLE GND
+

6 3
EC15 VCNTL VREF1
5 4
D

BOOT_SEL VOUT

+
100 .CD1000U6.3EL15
2.5V_SB Q22 W83310DS_SOIC8 EC39 EC18
D6 N-P3055LD_TO252 R49
C93
1N4001_DO214AC G VCC_DDR VCC3 V_FSB_V TT C35 C28 100R1%
A C X_C0.1U25Y C0.1U25Y
VCC3_SB
S

A A
R252 C188
150R0805 C182 C0.1U25Y .CD1000U6.3EL15
C110 C10U10Y0805 X_C0.1U2 5Y DIMMx4=8A VCC3 .CD1000U6.3EL15
+

X_C0.1U2 5Y NB I/O=4.1A
Stand-by=345mA EC47 EC14
Vtt=2A VCC3 C270VCC5
.CD1000U6.3EL15.CD1000U6.3EL15
MICRO-START INT'L CO.,LTD.
refer to Intel

C29 Title
C0.1U25Y X_C0.1U25Y
VCC3 C37 VCC5 MS7 ACPI Controller
Size D o cument Number Rev
Custom MS-7211 0A
X_C0.1U25Y Date: Thursda y, July 28, 2005 Sheet 27 of 32
8 7 6 5 4 3 2 1
5 4 3 2 1

+12VP

VC C5
R 39 J PW1
5.6KR 3 1
+12VP 12V GND
EN LL R 40 1KR
C88 4 2
X_C0.01U50X 12V GND
Q2 R22 10KR P W R - 2X2M
D V I D_GD# [6,27] VC CP D
N - MMBT3904_NL_SOT23

+12V_MOS COIL4
C 13 +12V_MOS CH- 1.2U18A
C4.7U10Y08 05 C23 C 1U16X0805 E C40 E C 36
+12VP
U1 2 +1 CD1000U16EL20 -1
[5] VID[0. .5]

7
_ISL6566CR_QFN 40 2 1 C68 X_C4.7U35Y1206
VID4 1 2VP1 R36 2.2R0805 X_CD1000U16EL20-1 C62 C1U16X0805 EC3
+
38 33

VCC
VID4 PVCC1 +12VP
VID3 39 30 BOOT1 R38 C95 1+ 2

D
VID2 VID3 BOOT1 2.2R0 805 X_C4.7U35Y1206
40
VID1 VID2 Q 10 X _ C 100U2SP-2
1
VID0 2 VID1 C 21 R81
VID5 VID0 U_ G1 C0.1U16X U_ G1 1R0805 U G1 G _N-IPF09N03LA_TO252
3 31
DACSEL/VID5 UGATE1 EC1
35
EN LL PGOOD R82 10KR COIL3
37 1+ 2

S
ENLL PH ASE1 _
29
PHASE1 PH ASE1 .CD3300U6.3E L25
VC CP

D
32 R 37 2.4KR1% E C28
ISEN1 Q 13 Q 15 R 98 1+ 2
R 13 5.1KR1% C10 C 2200P16X 34 L _G1 HS3
COP C OMP LGATE1 L _G1 2.2R0 805 H S-0500410-K08 C 1 00U2SP-2
8 G G
COMP EC2
C12 100p/50V/6 R94 10KR C 82 1+ 2

S
C 1000P50X
C14 C 1U16X0805 .CD3300U6.3E L25

2
FB 9
FB _ N-IPF06N03LA_TO252-3 _ N-IPF06N03LA_TO252-3

2
R12 2.2KR R21 2.2R0805 +12V_MOS
V DIFF 10 24 1 2VP2 E C 27
VDIFF PVCC2 +12VP
2 +1 C40 X_C4.7U35Y1206
C 26 BOOT2 R25 2.2R0 805 C41 C1U16X0805 EC5 C
C9 X_C560P50X R11 X_750R BOOT2 CD1000U16EL20 -1 1+ 2

D
MOSFET Heatsinks
C 17 Q7 CD680U4EL8
R 10 100R 27 U_ G2 C0.1U16X R68
VC CP UGATE2
[5] V C C _ V R M _ SENSE 12 U_ G2 1R0805 U G2 G
VSEN
C8 X _ C1000P50X 28 PH ASE2 R67 10KR _N-IPF09N03LA_TO252 COIL2

S
PHASE2 _
[5] V S S _ V R M _ S ENSE 11
RGND PH ASE2
VC CP
R3 100R C3 25 R 24 2.4KR1%

D
X _C0.1U25Y ISEN2 EC6
6
OFST L _G2 Q8 Q9 R79
23 1+ 2
R26 X_240KR1% LGATE2 2.2R0 805 HS1
VC C5 R28 19.1KR O FS L _G2 G G H S-0500410-K08 CD680U4EL8

R77 10KR C60 E C37

S
R 35 178KR1%0402 C4 C 1U16X0805 C 1000P50X 1+ 2
FS 36
FS

2
C D560U4OS-2
C 19 C0.01U50X REF 5 R7 2.2R0805 _N-IPF06N03LA_TO252-3 _ N-IPF06N03LA_TO252-3

2
REF 1 2VP3 +12V_MOS E C34
18 +12VP
PVCC3 EC7 1+ 2
21 BOOT3 R15 2.2R0 805 2 +1 C18 X_C4.7U35Y1206
BOOT3 C16 C1U16X0805 C D 560U4OS-2
4 CD1000U16EL20 -1

D
VRM10 C 11 E C26
R9 3.09KR1% 13 20 U_ G3 C0.1U16X Q3 1+ 2
OCSET UGATE3 R27
U_ G3 1R0805 U G3 G C D 560U4OS-2
14 22 PH ASE3 _N-IPF09N03LA_TO252
ICOMP PHASE3 R30 10KR COIL1 E C20
VC CP

S
B R6 0R _ 1+ 2 B
R5 53.6KR1% 15 19 R8 2.4KR1% PH ASE3
ISUM ISEN3 VC CP
GND

C6 C D 560U4OS-2

D
16 17 L _G3
Close low side IREF LGATE3 Q5 Q6 R34 E C17
mos fet R2 R1 X_C0.01U50X 2.2R0 805 HS2 1+ 2
41

C5 L _G3 G G H S-0500410-K08
BOTTOM PAD CONNECT TO GND OS-CON,560u/4V/8*9/3. 5mm
X_4.7KRT X_1.65KR1% C0.01U5 0X R46 10KR C20

S
THROUGH 10 vias C 1000P50X E C35
C7 C0.01U50X 1+ 2

2
PH ASE1
OS-CON,560u/4V/8*9/3. 5mm

2
R31 39.2KR1% _ N-IPF06N03LA_TO252-3 _N-IPF06N03LA_TO252-3
PH ASE2 E C19
1+ 2
R29 39.2KR1%
PH ASE3 OS-CON,560u/4V/8*9/3. 5mm

R18 39.2KR1%
VCCP V CCP V CCP

E C23 EC8 E C38


VID Pull-Up Rresistors VC C3 C10U10X12 06 X_C10U10X1206 10u/10V/ 1206
E C10 EC9 E C25
X_C10U10X1206 X_C10U10X1206 10u/10V/ 1206
E C11 E C24 E C33
X_C10U10X1206 C10U10X12 06 10u/10V/ 1206
E C29 E C30 E C31
C10U10X12 06 C10U10X12 06 10u/10V/ 1206
R328 C P 28 E C12 E C32 E C21
X_0R0805 X_C10U10X1206 C10U10X12 06 10u/10V/ 1206
A X E C16 E C13 E C22 A
C10U10X12 06 X_C10U10X1206 10u/10V/ 1206
RN90 8 P 4R-4.7KR
VID0 1 2
VID1 3 4
VID2 5 6
VID3 7 8
VID4
VID5
R329
R330
4.7KR
4.7KR MICRO-START INT'L CO.,LTD.
Title
VRM 10.1 - Intersil 6566_3 Phases
Size D ocument Number R ev
Custom
MS-7211 0A
D ate: Thursday, July 28, 2005 Sheet 28 of 32
5 4 3 2 1
5 4 3 2 1

ATX CONNECTOR VCC5_SB C O NN1 VCC5


13 1
Intel Front Panel
VCC3 3.3V 3.3V VCC3
14 2 R323 JFP2
R83 CB46 -12V -12V 3.3V C78 CB37 330R
1 KR C0.1U25Y CB35 15 3 C1000P50X H DD+ 1 2 PLED1
GND GND HDD+ PLED PLED1 [27]
C0.1U25Y X_C1U16Y0805 VCC5
16 4 IDE_LED 3 4 PLED2
PSON 5V VCC5 HDD- SLED PLED2 [27]
R92 C63 17 5 5 6 P WRBTN#

C
GND GND RESET-PWSW+ PWRB TN# [18]
4 .7KR X_C1000P50X CB29
D B Q11 18 6 C0.1U25Y R78 FP_RST# 7 8 D
[18] SLP _S3# GND 5V [16,27] FP_R ST# RESET+PWSW-
N-MMBT3904_NL_SOT23 4.7KR
19 7 9

E
GND GND CB125 NC
20 8 C0.1U25Y
-5V -5V POK P WR_OK [27]
C55 H2X5(10) _black-N31-2051231
21 9 VCC 5_SB
C1000P50X 5V 5VSB C56
22 10 C0.1U25Y Electromagnatic effect
VCC5 5V 12V +12V
23 11
CB25 5V 12V CB20 CB16
C0.1U25Y 24 12 C0.1U25Y C0.1U25Y
GND DET

ATX CON 2*12

VCC3

SPEAKER
VCC5
C C

RN83 8P4R-150R R277


8 7 S PK THRD OWN 0R
RSMRST# [19,27]
6 5
4 3 VCCP

C
2 1 B Z1 R278
[22] ALARM 2.2KR Q35
C271 BUZZER B
C0.1U25Y N-MMBT3904_NL_SOT23
R322 2.2KR Q37

E
[18] SPKR C204
N-MMBT3904_NL_SOT23
C0.1U25Y

[5,6] THERMTRIP#

Flash Rom HDD LED

VCC3 VCC3
U16
1 32
PCIRST#2 VPP VCC VCC3 VCC5
[10,21,22,27] PCI RST#2 2 31 FWH _CLK [16] RN84
B PRE S3 RST# CLK PRE S4 VCC3 B
3 30
PRE S2 FGPI3 FGPI4 PRE S1
4 29 8 7
PRE S1 FGPI2 IC(VIL) PRE S2
5 28 6 5

8
6
4
2
PRE S0 FGPI1 GNDA R321 PRE S3
6 27 4 3
BIOS_WP# FGPI0 VCCA PRE S4 RN29
[22] BIOS_WP# 7 26 2 1
TBL# WP# GND 4.7KR
8 25 8P4R-4.7KR
TBL# VCC
9 24
ID3 INIT# -LFRAME 8P4R-10KR
10 23 -LFRAME [19,22]
ID2 FWH4
11 22 RN87

7
5
3
1
ID1 RFU
12 21
LAD0 ID0 RFU TBL#
[19,22] LAD0 13 20 8 7
LAD1 FWH0 RFU BIOS_WP# 6
[19,22] LAD1 14 19 5
LAD2 FWH1 RFU PRE S0
[19,22] LAD2 15 18 4 3
FWH2 RFU
16 17 LAD3 [19,22] 2 1
GND FWH3
1
[24] -HD_LED1 D3
PLCC-32 8P4R-10KR S-BAT54A_SOT23
<Priori ty>
JWP1
3
BIOS_WP#
1
2 FWH DECOUPLING CAPACITORS
2
H1X2_black [24] -HD_LED2 D8
JWP1( 1-2) IDE_LED
X__JUMP ER-1X2B_green
C269 X_C 470P50X BAS32L_LL34
VCC3
CP23 X_COP PER
[19] SATA_LED
1

A A
C267 C268 C264 CB123
X_C0.1U25Y

C1U16Y C10U10Y0805 C 0 .1U25Y


2

CP24 X_COP PER


MICRO-START INT'L CO.,LTD.
Title
Place Cap. as Close to ATX & F_Panel & BIOS
FWH< 350 mil Size D o cument Number Rev
Custom MS-7211 0A
Date: Thursda y, July 28, 2005 Sheet 29 of 32
5 4 3 2 1
5 4 3 2 1

EMI

VCC 5_SB
PCB OTHER COMPONENT

1
CB55 CB124
X_C0.1U2 5Y X_C0.1U2 5Y

2
8

7
D D

9 6 9 6 9 6 9 6

2 5 2 5 2 5 2 5 VCC3

MH1 MH2 MH6 MH3


3

1
CB4 CB66 CB47 CB86
C 0 .1U25Y X_C0.1U2 5Y X_C0.1U2 5Y X_C0.1U2 5Y

2
K BGND

VCC5
8

9 6 9 6

1
2 5 2 5 CB126 CB74 CB119 CB152 C25 CB8 CB36 CB40 CB122 CB58
X_C0.1U2 5Y X_C0.1U2 5Y C 0 .1U25Y X_C0.1U2 5Y X_C0.1U25Y X_C1000P50X X_C1000P50X X_C0.1U25Y X_C0.1U25Y X_C0.1U2 5Y

2
MH4 MH5
3

C C
VCC3
VCC3 +12V

1
CB121 CB79 C301 C302
X_C0.1U2 5Y X_C0.1U2 5Y X_C0.01U50X X_C0.01U50X

2
FIDUCIALS

FM2 FM1 FM11 FM3 FM6 VCC3

X_FIDUCIAL X_FIDUCIAL X_FIDUCIAL X_FIDUCIAL X_FIDUCIAL


CB155
C1000P50X
FM7 FM14 FM4 FM8

X_FIDUCIAL X_FIDUCIAL X_FIDUCIAL X_FIDUCIAL +2.5VSB

FM10 FM9 FM12 FM5 FM13


B B

X_FIDUCIAL X_FIDUCIAL X_FIDUCIAL X_FIDUCIAL X_FIDUCIAL

FM18 FM15 FM17 FM16 FM19

X_FIDUCIAL X_FIDUCIAL X_FIDUCIAL X_FIDUCIAL X_FIDUCIAL

A A

X_PIN1*2
VCC5 J2 J1

X_PIN1*2 MICRO-START INT'L CO.,LTD.


Title
PCB Components & EMI
Size D o cument Number Rev
Custom MS-7211 0A
Date: Thursda y, July 28, 2005 Sheet 30 of 32
5 4 3 2 1

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