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5 master slaves (sr) as shown in fig this circuit can be used in any of the 4 .

Operation of this circuit is


explained by 5 bit data 1011. For any other 5 width data the operation will be similar for 1 inputs. For
serial input the data is apllied at the serial input after clearing using clear line. Preset unable is to held at
0 so that pr given for any ziplock is 1. . Input and output are reinstated in fig.

16/9/20

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