CHAPTER TWO

INSTRUCTION ADDRESSING AND

EXECUTION
Compiled By: Seble N.
Memory Addressing

 There are two types of addressing schemes:

 Absolute Addressing
 such as 04A26H, is a 20-bit value that directly references a
specific location in memory in 8086
 aka physical address

 Segment:Offset Addressing
 is a technique intel introduced to address more memory space
 aka logical address
Segment:Offset Addressing

 In 8086/8088
 was able to address 1MB of
memory, where each memory
location address is 20bits wide
 Problem

 The registers are16bits wide

 Solution
 Segment:offset Addressing
Segment:Offset Addressing …
How it works?
 combines the starting address of a
segment with an offset value
 A segment can only start on a
paragraph boundary address, where
the rightmost four bits of its address
are zero
 An offset is a 16bits wide address
that specifies an address relative to
the segment starting address
 A segment could have a size up to
64k, which means that an offset
address can range from 0000h up to
ffffh
 Example:
 1000:0008
 2000:000A
From Logical Address to Physical Address

 To get a real(physical or absolute) address of a memory location, shift the

segment address one hex digit to the left and then adding the offset
address to it
 Physical address = (segment address x 10h) + offset address

 Given a logical address 12A4:0022, the physical address would be

calculated as:
 Segment:Offset Addressing
 IP holds offset address for CS
 CS:IP, points to the next instruction to be
executed by the processor
 SP holds offset address for SS
 SS:SP, points to the top of the stack
initially
 BP holds offset address for SS
 SS:BP, points to any location within the
stack segment
 Operands, BX register and
immediate offset values could be
used to point to an address within
the data segment
 DS:BX, DS:0002
Segment:Offset
Addressing
Summary
1. What is the physical address of the next instruction to be
executed?

2. What is the physical address of the top of the stack?

3. Which register pairs may point to an address in the stack

segment?

4. Which register pairs may point to an address in the data

segment?
Segment:Offset
Addressing
Summary
 What is the physical address of the next instruction to be executed?
 Logical address CS:IP 2000:8502
 Physical address 20000 + 8502 = 28502
 What is the physical address of the top of the stack?
 Logical address SS:SP 3400:01A4
 Physical address 34000 + 01A4 = 351A4
 Which register pairs may point to an address in the stack segment?
 SS:SP & SS:BP
 Which register pairs may point to an address in the data segment?
 DS:BX, DS:SI, DS:DI
The Boot Process
 On power on, the processor enters to reset state
 clears all memory locations to zero
 perform a parity check of memory

 sets the CS register to segment address FFFFH and IP

register to zero, which is FFFF0H, the entry point to
BIOS in ROM
 the BIOS routine beginning at location FFFF0H checks
the various ports to identify and initialize devices that
are attached to the computer
 The BIOS Boot Process …
 BIOS then establishes two data
areas:
 An Interrupt Vector Table, contains
256 interrupts placed at first 1kb of
memory, where each vector consists of
a memory address that points to a
corresponding BIOS interrupt service
routine
 BIOS and the OS use these address for
interrupts that occur
 BIOS Data Areas beginning at
location 40[0], stores many
variables indicating information
about the state of the computer.
Largely concerned with the status of
attached devices
The BIOS Boot Process …

 BIOS next determines whether a disk containing the

system files is present and, if so, it accesses the
bootstrap loader from the disk
 The bootstrap loader loads system files from the disk
into memory and transfers control to them
 The system files contain device drivers and other hardware-
specific code
 These modules initialize internal system tables and system’s
portion of the Interrupt Vector Table
The System Program Loader
 Once BIOS hands control over to the OS, you may then
request execution of a program
 The two types of executable programs are
 .COM
 consists of one segment that contains code, data and the stack
 Is useful as a small utility program or as a resident program
 .EXE
 consists of separate code, data and stack segments
 Used for more serious programs
The system program loader …
 When you request the system to load a .EXE program from disk into
memory for execution, the loader performs the following steps:
 Constructs a 256-byte program segment prefix(PSP) on a paragraph
boundary in available internal memory. The PSP is used to store the state
of a program
 Accesses the .EXE program from disk and stores the program in memory
immediately following the PSP
 Loads the address of the code segment in the CS register and sets the IP
register to the offset of the first instruction (usually zero) in the code
segment
 Loads the address of the stack in the SS register and sets the SP register
to the size of the stack
 But the program loader stores the address of the PSP in both DS & ES.
Instead of the correct data segment address
 Transfers control to the program for execution
Instruction Execution and Addressing

 Basic steps in executing an instruction are

 Fetch instruction
 fetchthe next instruction to be executed from memory and
place it in the instruction queue
 Decode the instruction
 calculateaddresses that reference memory, deliver data to
the ALU, and increment the IP register
 Execute the instruction
 perform the requested operation, store the result in a register
or memory, and set flags such as Zero or Carry where
required
Addressing Data in Memory
 A processor stores the
data in memory in reverse
Register
byte sequence: 05 29

 the low-order byte in the

low memory address and
 the high-order byte in the Memory 29 05
high memory address

 When the processor Address Address

retrieves the word from 04A26H 04A27H

memory, it automatically Least significant

byte
Most significant
byte
reverses the bytes,
restoring them correctly in
the register as hex 0529.
Instruction Execution and Addressing
 Let’s assume that the program loader
loads a .EXE program into memory
beginning at location 05BE0H,
Accordingly the loader initializes CS with
05BEH and IP with zero
 Let’s say that the program has initialized
the DS with 05D1H

 MOV AH, 09  B409

 MOV AL, [0002]  A00200
 MOV [0004], AX  CF0400

 Execution Begins at 05BE:0000

 As the processor fetches each byte of the
instruction, it increments the IP register by
1
The Stack
 Both executable programs require an area in the program reserved as a stack

 The stack has three main uses

 The program calls a subroutine for special processing; in so doing, it saves the return
address in the stack, which the subroutine later uses for returning

 The program that calls the subroutine may also pass data by placing it in the stack
where the subroutine access it

 The program has to perform calculations that use the registers; it can save the
present contents of the registers on the stack, make the calculations, and then restore
the data from the stack to the registers

 The program loader automatically defines the stack for .com program, whereas
you must explicitly define a stack for .exe program
The stack …
 In 8086, each data in the stack is one word = 2 bytes
 SS holds the beginning of the stack
 Initially SP contains the size of the stack, a value that points
to the byte past the end of the stack
 Data storage begins at the highest location in the segment
and stores data downward through memory
 PUSH & POP are the instructions used to push data to the
stack and retrieve data from the stack respectively
The Stack
 Push executes by decrementing SP by 2 to
the next lower storage word in the stack
and storing or pushing a value there
 POP executes by returning a value from
the stack and incrementing SP by 2 to the
next higher storage word
 Exercise
 MOV AX, 0026
 MOV BX, 0115
 PUSH AX
 PUSH BX
 POP AX
 POP BX
 Note that when SP=0 the stack is full