20/12/2020 Circuit paradoxes – Or are they?

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Circuit paradoxes – Or are they?

edn.com/circuit-paradoxes-or-are-they

Sergio Franco December 3, 2014

I am sure that at some point all of us have come across puzzling circuit situations that, at first
sight, seem to be plain absurd. I want to share some I’ve run into during my student days
(usually very late at night).

A frequency-independent capacitive impedance?

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It is a well-known fact that a capacitance in the feedback path of an inverting amplifier,
reflected to the input, appears magnified by the Miller effect. So, the impedance Zi seen
looking into the inverting input node of the circuit of Figure 1 should be capacitive, and
therefore decrease with frequency at the rate of –1 dec/dec. Yet, the accompanying Bode
plot reveals a frequency-independent input impedance of 16 Ω. What’s going on here? Has
the Miller effect gone on strike? And where do those 16 Ohms come from?

Figure 1 Frequency plot of Zi . Has the Miller effect gone on strike? (Or hasn’t it?)

A strange differential amplifier – to say the least

So long as the open-loop gain a of the op amp of Figure 2a is infinite, the circuit gives V(O)
= V1 – V2, so tying the inputs together to make V2 = V1 as in Figure 2b gives V(O) = 0,
indicating an infinite common-mode rejection ratio (CMMR = ∞). But what if a ≠ ∞? Well,

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it turns out that the circuit of Figure 2b gives

V(O) = 0 for any value of a within the range ∞
> a > 0. Can you use physical insight to
explain why?

Figure 2 A difference amplifier capable of infinite CMRR with only a finite open-loop gain a
?

Actually, there’s more to it, because this circuit keeps giving V(O) = 0 even as a turns
negative , in which case feedback becomes positive . This is illustrated in Figure 3 for the
case of an op amp with a dc gain of a 0 = –1 V/V. To verify the stability of this circuit, assume
the op amp has a 1-MHz pole frequency, and subject the circuit to a small current
disturbance, after which V(O) returns to zero. Can you explain why this circuit is stable even
though feedback is positive?

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However, if you make a 0 even more negative, the circuit becomes unstable. This too is
illustrated in Figure 3 for a 0 = –3 V/V, in which case the disturbance results in a diverging
response. Why is it so? What is the borderline value of a 0 between converging and
diverging responses?

Figure 3 A stable circuit with positive

feedback?

Can two wrongs make a right?

It is well known that op amp

differentiators are to be avoided
because of their notorious tendency to
produce intolerable ringing and gain
peaking [1]. It is also known that one
should avoid using voltage comparators
in negative-feedback operation because
they are meant for open-loop operation
and as such they lack the frequency-
compensation requisites for stable
negative-feedback operation [1]. Yet,
the circuit of Figure 4 uses precisely a
voltage comparator to provide fairly
accurate and stable differentiation , as
demonstrated by the accompanying
waveforms. How come? What
happened to the saying that two wrongs don’t make a right? Where is the frequency-
compensation network stabilizing the comparator?

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Figure 4 A differentiator implemented with a voltage comparator.

Getting straight lines out of curves?

The circuit of Figure 5 is nonlinear because it includes diodes. However, if we focus our
attention to operation within the range –4 V < vI < +4 V, we see that all diodes are on, in
which case they approximate short-circuit behavior. (I have specified an unusually large
saturation current for the SPICE diode model D, so the diode forward voltage drops for the
currents of this circuit never exceed a couple hundred millivolts.) Given that for –4 V < vI <
+4 V all voltages are straight lines (see top traces), the resistance currents are also straight
lines, by Ohm’s law. Consequently, the diode currents, which (by KCL) seem to be
combinations of resistance currents, ought to be straight lines as well. Yet, the bottom traces
reveal nonlinear diode currents! What’s going on? Has KCL gone on strike? Or is this a
SPICE artifact? Or is it just a late-night hallucination?

Figure 5 Diode bridge circuit

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Shouldn’t this circuit oscillate?

The circuit of Figure 6 simulates an

amplifier with a dc gain of 80 dB, two pole-
zero pairs, and an additional pole.
Moreover, it saturates at ±10 V. Its Bode
plots reveal two frequencies at which the
output is delayed by 180° with respect to the
input. Using PSpice’s cursor facility, we find
these frequencies to be about 27 kHz and 60
kHz. Moreover, the gains at these
frequencies are, respectively, V(O)/V(I) = –
370 V/V and V(O)/V(I) = –48.3 V/V.

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Figure 6 An open-loop gain with three poles and two zeros and ±10-V saturation voltages.

If we now apply unity-feedback around this amplifier as in Figure 7 (top), we expect any
noise arising inside the feedback loop with frequency components of 27 kHz and 60 kHz to
get magnified, respectively, by 370 V/V and 48.3 V/V each time it goes around the loop,
thereby leading to two diverging responses. Because of the saturation limits of ±10 V, we
expect the circuit to achieve a steady-state situation with two modes of oscillation in the
vicinity of 27 kHz and 60 kHz, respectively.

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Figure 7 Configuring the amplifier of Figure 6 for unity-gain operation. Frequency response
(top), and unit-step response (bottom).

Well, looking at the frequency and transient responses of Figure 7 , we see that we have a
fairly stable circuit. Can you justify this intuitively ? Pretend you are explaining this circuit
to an enthusiastic humanities major – possibly your significant other; so, no Nyquist criteria,
no Cauchy arguments, no esoteric mathematical tools – use just physical intuition (if you
can).

References

1. Design with Operational Amplifiers and Analog Integrated Circuits, 4th Edition, Sergio
Franco, San Francisco State University

Also see :

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A generalized amplifier and the Miller-effect paradox

Miller Compensation and the RHPZ
Developing equations for fully differential amplifiers

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