G60J R20 PDF

5 4 3 2 1
SYSTEM PAGE REF.
G60J Schematics for Calpella Platform Rev. 1.5

01. Block Diagram
02. System Setting
03. CPU(1)_DMI,PEG,FDI,CLK,MISC
04. CPU(2)_DDR3
8
05. CPU(3)_CFG,RSVD,GND
06. CPU(4)_PWR
07. CPU(5)_XDP
BLOCK DIAGRAM
2
D
16. DDR3(1)_SO-DIMM0 D
17. DDR3(2)_SO-DIMM1
18. DDR3(3)_CA/DQ Voltage HDMI
HDMI
DDR3 1333MHz
5
19. VID Controller
Page 48 MXM PCIE x16 CPU DDR3 SO-DIMM
20. PCH(1)_SATA,IHDA,RTC,LPC CRT CLARKFIELD/AUBURNDALE
21. PCH(2)_PCIE,CLK,SMB,PEG nVIDIA N10E-GT1 Page 16~18
0
CRT
(DC&QC)
22. PCH(3)_FDI,DMI,SYS PWR Page 70
Page 3~7
23. PCH(4)_DP,LVDS,CRT Page 46
24. PCH(5)_PCI,NVRAM,USB
7
25. PCH(6)_CPU,GPIO,MISC LVDS
LCD Panel
26. PCH(7)_POWER,GND Page 45
4 4
6
27. PCH(8)_POWER,GND x x
28. PCH(9)_SPI,SMB I I
29. CLK_ICS9LPR362 D M 9 MiniCard
F D
2
30. EC_IT8512(1) 2 WLAN
31. EC_IT8512(2)KB,TP,FP Shirley Peak/ Echo Peak
32. RST_Reset Circuit Page 53
5
33. LAN_AR8131 1
34. LAN_RJ45 Debug Conn. PCIEx1 MiniCard
C
36. AUD(1)_ALC663VD Page 44 4 C
2
TV Tuner
37. AUD(2)_AMP,JACK
Touchpad
LPC PCH Page 64
38. AUD(3)_FM2010 EC
40. CB(1)_R5U230
Keyboard
ITE IT8512E
Ibex Peak-M 6
43. CB(4)_NewCard Page 30
GigaLAN RJ45
44. BUG_Debug Page 31 USB AR8131
s Page 34
u
：
SPI ROM SPI ROM Page 33~34
45. CRT(1)_LVDS
B
46. CRT(2)_D-Sub M 3
Page 30
S Page 28 Page 20~28
47. CRT(3)_Display Port 5 ExpressCard Power
Q
48. TV(1)_HDMI s A
u T
50. FAN_Fan,Sensor Thermal Sensor B A Page 43
M S CPU_VCORE
51. XDD_HDD,ODD S 0
PWM Fan
Q
Page 80
52. USB_USB Port
Page 50 1 USB Port(1)
53. MINICARD_WLAN ODD Page 65
System
56. LED_Indicator Page 51 1 Page 81
57. DSG_Discharge
CardReader+1394 0 USB Port(2)
60. DC_DC/BAT CONN PCIEx1 HDD(1) Page 65
VTT
Ricoh R5U230
流
61. BT_Bluetooth Page 51 2 Page 82
B 64. TUN_TV Tuner Page 40~41 4 USB Port(3) B
65. ME_CONN,Skew Hole HDD(2) Page 52 DDR

66. ESA_ESATA Page 51 3 Page 83
69. OTH_GAME-LED Audio Amp 5 USB Port(4)
70. VGA(1)_MXM Slot Speaker eSATA Page 52 +1.8VS
交
71. VGA(2)_LVDS Switch Page 37
Azalia Codec Azalia Page 66 12 Bluetooth Page 85
80_PWR(1)_VCORE Realtek ALC663
81_PWR(2)_SYSTEM_+12VSUS Audio Jack Page 36
Page 61 GFX_CORE
82_PWR(3)_VTT_CPUS & 1.05VS Page 65 13 Page 86
83_PWR(4)_I/O_DDR & VTT CMOS Camera
84_PWR(5)_**** Array Mic Array Mic.DSP Clock Generator Page 45
Charger
纸
85_PWR(6)_+1.8VS Page 45 Fortemedia FM2010 ICS ICS9LPR362 Page 88
86_PWR(7)_**** Page 38 Page 29
88_PWR(9)_CHARGER Detect
90_PWR(11)_DETECT Page 90
91_PWR(12)_LOAD SWITCH
图
92_PWR(13)_PROTECT Discharge Circuit DC & BATT. Conn. Load Switch
93_PWR(14)_SIGNAL Page 57 Page 60 Page 91
94_PWR(15)_FLOWCHART
A
95. System History Reset Circuit Skew Holes Power Protect A
98. Power On Sequence Page 32 Page 65 Page 92

99. Power On Timing
Title : Block Diagram

Engineer: Kenny Wu
www.vinafix.vn
BU2/RD1
Size Project Name Rev
C G60J 1.4
Date: Friday, July 31, 2009 Sheet 1 of 99
5 4 3 2 1
5 4 3 2 1
PCH_IBEX PCH_IBEX
Internal & EC EC GPIO Use As Signal Name EC EC GPIO Use As Signal Name
Use As Signal Name External Power GPA0 O PWR_LED#
GPIO GPIO Pull-up/down IT8512 GPA1 O CHG_LED#
IT8301 GPIO0 I ME_PM_SLP_M#
GPIO 00 GPO PCH_GPIO0_R - +3VS GPIO1 I ME_SUSPWRDNACK
INT TBD
GPA2 -
GPIO 01 - - +3VS GPIO2 -
EXT PU
GPA3 O GAME_LED_EC#
GPIO [2:5] Native PCI_INT[E:H]# +5VS GPIO3 -
GPA4 O LCD_BL_PWM
8
GPIO 06 GPI DGPU_PWR_EN INT TBD +3VS GPIO4 I ME_+VM_PWRGD
INT TBD
GPA5 O FAN_PWM
GPIO 07 - - +3VS GPIO5 I ME_PM_SLP_LAN#
EXT PU & INT PU
GPA6 -
GPIO 08 GPI EXT_SMI# +3VSUS GPIO6 O ME_AC_PRESENT
2
EXT PU
GPA7 -
D GPIO 09 Native USB_OC5# +3VSUS GPIO7 - D
EXT PU
GPB0 O SUSC_EC#
GPIO 10 Native USB_OC6# +3VSUS GPIO8 -
EXT PU
GPB1 O SUSB_EC#
GPIO 11 GPI EXT_SCI# +3VSUS GPIO9 -
5
EXT PU
GPB2 -
GPIO 12 Native PM_LANPHY_EN +3VSUS GPIO10 -
GPB3 IO SMB0_CLK
GPIO 13 - - - +3VSUS GPIO11 -
EXT PU(DIODE DNI) +3VSUS
GPB4 IO SMB0_DAT
GPIO 14 GPO CB_SD# GPIO12 O ME_PWROK
0
INT PD
GPB5 O A20GATE
GPIO 15 GPO WLAN_ON +3VSUS GPIO13 -
GPB6 O RCIN#
GPIO 16 GPO DGPU_HOLD_RST# - +3VS GPIO14 O ME_SLP_M_EC#
GPB7 O PM_RSMRST#
7
GPIO 17 GPO DGPU_PWROK EXT PD & INT TBD +3VS GPIO15 -
EXT PU(DNI)/PD
GPC0 -
GPIO 18 Native CLKREQ1_TV# +3VS GPIO16 -
GPC1 IO SMB1_CLK
GPIO 19 GPI SATA_DET#1_R - +3VS GPIO17 -
GPC2 IO SMB1_DAT
6
GPIO 20 Native CLKREQ2_WLAN# EXT PU(DNI)/PD +3VS GPIO18 -
GPC3 O PM_PWRBTN#
GPIO 21 GPI SATA_DET#0_R - +3VS GPIO19 -
EXT PD
GPC4 I AC_IN_OC#
GPIO 22 GPO WLAN_LED +3VS GPIO20 -
GPC5 O OP_SD#
2
GPIO 23 - - - +3VS GPIO21 -
EXT PU
GPC6 I BAT1_IN_OC#
GPIO 24 GPO OC_LAN_RST# +3VSUS GPIO22 -
EXT PU(DNI)/PD
GPC7 I RFON_SW#
GPIO 25 Native CLKREQ3_NEWCARD# +3VSUS GPIO23 -
5
EXT PU(Not used)
GPD0 I PWRLIMIT#
GPIO 26 Native CLKREQ4_ESATA# +3VSUS GPIO24 -
INT WEAK PU
GPD1 I PM_SUSC#
GPIO 27 - - +3VSUS GPIO25 -
EXT PD
GPD2 I BUF_PLT_RST#
C
GPIO 28 GPO BT_LED/SPI_CS#2 +3VSUS GPIO26 - C
2
EXT PU(DNI)/PD(DNI) +3VSUS
GPD3 O EXT_SCI#
GPIO 29 Native ME_PM_SLP_LAN# GPIO27 -
GPD4 O EXT_SMI#
ME_SUSPWRDNACK / EXT PU
GPIO28 -
GPIO 30 Native RTLAN_DSM# +3VSUS GPD5 O LCD_BACKOFF#
GPIO29 -
EXT PU
GPD6 I FAN0_TACH
GPIO 31 Native ME_AC_PRESENT +3VSUS GPIO30 -
EXT PU
GPD7 -
GPIO 32 Native PM_CLKRUN# +3VS GPIO31 -
GPE0 O VSUS_ON
：
GPIO 33 - - - +3VS GPIO32 -
EXT PU
GPE1 O EGAD (IT8301 Address/Data connect)
GPIO 34 Native STP_PCI# +3VS GPIO33 -
EXT PU/PD(DNI)
GPE2 O EGCS# (IT8301 Cycle Start connect)
GPIO 35 Native SATA_CLK_REQ# +3VS GPIO34 -
GPE3 O EGCLK (IT8301 Clock connect)
Q
GPIO 36 GPO DGPU_PWR_EN# EXT PU +3VS GPIO35 -
EXT PU
GPE4 I PWR_SW#
GPIO 37 GPI DGPU_PRSNT# +3VS GPIO36 -
EXT PD
GPE5 -
GPIO 38 GPI PCB_ID0 +3VS GPIO37 -
GPE6 I LID_SW#
Q
GPIO 39 GPI PCB_ID1 EXT PD +3VS
EXT PU (Not used)
GPE7 I CAP_ACK#
GPIO 40 Native USB_OC1# +3VSUS
EXT PU (Not used)
GPF0 -
EXT PU (Not used)
GPF1 -
GPIO 42 Native USB_OC3# +3VSUS SM_BUS ADDRESS :
EXT PU (Not used)
GPF2 I EXP_GATE#
EXT PU (Not used)
GPF3 - SM-Bus Device SM-Bus Address
GPIO 44 - - +3VSUS
流
EXT PU (Not used)
GPF4 I TP_CLK Clock Generator 1101001x ( D2h )
GPIO 45 - - +3VSUS
B
EXT PU (Not used)
GPF5 IO TP_DAT SO-DIMM 0 1010000x ( A0h ) B
GPIO 46 - - +3VSUS
EXT PD
GPF6 O THRO_CPU SO-DIMM 1 1010001x ( A4h )
GPIO 47 Native CLKREQ_PEG# +3VSUS
GPF7 IO H_PECI CPU Thermal IC(G780) 1001100x ( 98h )
GPIO 48 - - - +3VS
GPG0 - VGA Thermal IC(G781-1) 1001101x ( 9Ah )
GPU_RST# /
GPIO 49 GPO CRIT_TEMP_REP#_R - +3VS GPG1 I PM_SUSB# VGA Thermal Sensor(NB9E-GE1) 1001111x ( 9Eh )
交
EXT PU (Not used)
GPG2 - VID Controller ASM8272 0011011x ( 36h )
GPIO 50 - - +5VS
INT PU
GPG6 - DSP FM2010
GPIO 51 Native PCI_GNT1# +3VS
EXT PU
GPH0 IO PM_CLKRUN#
GPIO 52 GPO DGPU_SELECT# +5VS
GPH1 - PCIE 1 Minicard TV Tuner USB 0 USB Port (1)
GPIO 53 - - INT PU +3VS
GPH2 O GFX_VR_ON PCIE 2 Minicard WLAN USB 1 USB Port (2)
GPIO 54 - - - +5VS
GPH3 O BAT_LEARN PCIE 3 Newcard USB 2 USB Port (3)
纸
GPIO 55 Native PCI_GNT3# INT PU +3VS
GPH4 O HSCK PCIE 4 N/A USB 3 USB Port (4)
GPIO 56 Native CLKREQ_GLAN# EXT PU(DNI)/PD +3VSUS
GPH5 O NUM_LED# PCIE 5 PCIE to SATA (SR) USB 4 CMOS Camera
GPIO 57 GPO BT_ON EXT PU(DIODE) +3VSUS
GPH6 O CAP_LED# PCIE 6 GLAN USB 5 Newcard
GPIO 58 Native SML1_CLK EXT PU +3VSUS
GPI0 - PCIE 7 N/A USB 6 Minicard TV Tuner
GPIO 59 Native USB_OC0# EXT PU (Not used) +3VSUS
GPI1 I SUS_PWRGD PCIE 8 N/A USB 7 N/A
GPIO 60 GPO RTLAN_DSM_EN EXT PU +3VSUS
图
GPI2 I ALL_SYSTEM_PWRGD USB 8 OLED
GPIO 61 - - - +3VSUS SATA0 SATA HDD(1)
GPI3 I VRM_PWRGD USB 9 WLAN
GPIO 62 - - - +3VSUS SATA1 SATA ODD
GPI4 I GFX_VR USB 10 N/A
GPIO 63 - - - +3VSUS SATA2 N/A
A
GPI5 I ALS_AD USB 11 USB Port (5) A
GPIO 64 Native CLK_OUT0 INT TBD +3VS SATA3 N/A
GPI6 - USB 12 Bluetooth
GPIO 65 Native CLK_OUT1 INT TBD +3VS SATA4 SATA HDD(2)
GPI7 - USB 13 Finger Print
GPIO 66 - - INT TBD +3VS SATA5 eSATA
INT TBD
GPJ0 O CPU_VRON
GPIO 67 - - +3VS
GPJ1 O PM_PWROK
GPIO 72 - - - +3VSUS
GPJ2 O VSET_EC
GPIO 73 - - EXT PU (Not used) +3VSUS Title : System Setting
EXT PU (Not used)
GPJ3 O ISET_EC
GPIO 74 - - +3VSUS Engineer: Kenny Wu
www.vinafix.vn
BU2/RD1
EXT PU
GPJ4 O TP_LED Size Project Name
GPIO 75 Native SML1_DAT +3VSUS Rev
GPJ5 - C G60J 1.4
5 4 3 2 1
5 4 3 2 1
+VTT_CPU +VTT_CPU <6,7,25,26,27,29,32,57,82>

U0301A
B26 PEG_IRCOMP_R R0301 1 1% 2 49.9Ohm +1.5V
PEG_ICOMPI +1.5V <6,16,57,69,83>
A26
PEG_ICOMPO
<22> DMI_TXN0 A24 B27
DMI_RX#[0] PEG_RCOMPO EXP_RBIAS R0302 1%
<22> DMI_TXN1 C23 A25 1 2 750OHM
DMI_RX#[1] PEG_RBIAS
<22> DMI_TXN2 B22 PCIENB_RXN[15:0] <70>
DMI_RX#[2] PCIENB_RXN0
<22> DMI_TXN3 A21 K35
DMI_RX#[3] PEG_RX#[0] PCIENB_RXN1
J34
PEG_RX#[1] PCIENB_RXN2
<22> DMI_TXP0 B24 J33
DMI_RX[0] PEG_RX#[2] PCIENB_RXN3
8
<22> DMI_TXP1 D23 G35
DMI_RX[1] PEG_RX#[3]
DMI
<22> DMI_TXP2 B23 G32 PCIENB_RXN4 SKTOCC#:pulled to ground on processor.
<22> DMI_TXP3 A22 F34 may use to determine if CPU is present
F31
PEG_RX#[6] PCIENB_RXN7
<22> DMI_RXN0 D24 D35
DMI_TX#[0] PEG_RX#[7] PCIENB_RXN8
<22> DMI_RXN1 G24 E33
DMI_TX#[1] PEG_RX#[8]
2
<22> DMI_RXN2 F23 C33 PCIENB_RXN9 U0301B
DMI_TX#[2] PEG_RX#[9] PCIENB_RXN10 20Ohm 1%
<22> DMI_RXN3 H23 D32 2 1 R0303 H_COMP3 AT23
D DMI_TX#[3] PEG_RX#[10] PCIENB_RXN11 COMP3 D
B32 A16 CLK_CPU_BCLK
PEG_RX#[11] BCLK
MISC
<22> DMI_RXP0 D25 C31 PCIENB_RXN12 20Ohm 2 1% 1 R0304 H_COMP2 AT24 B16 CLK_CPU_BCLK# CLK selection
DMI_TX[0] PEG_RX#[12] PCIENB_RXN13 COMP2 BCLK#
<22> DMI_RXP1 F24 B28
DMI_TX[1] PEG_RX#[13] PCIENB_RXN14 H_COMP1 AR30 CLK_ITP_BCLK_R
CLOCKS
<22> DMI_RXP2 E23 B30 49.9Ohm 2 1% 1 R0305 G16 2 1
5
DMI_TX[2] PEG_RX#[14] COMP1 BCLK_ITP 0402 CLK_ITP_BCLK <7>
<22> DMI_RXP3 G23 A31 PCIENB_RXN15 AT30 CLK_ITP_BCLK#_R 2 1 SL312
DMI_TX[3] PEG_RX#[15] BCLK_ITP# 0402 CLK_ITP_BCLK# <7>
PCIENB_RXP[15:0] <70> 49.9Ohm 2 1% 1 R0306 H_COMP0 AT26 SL313
PCIENB_RXP0 COMP0
J35 E16 CLK_EXP_P 120MHz from PCH.
PEG_RX[0] PCIENB_RXP1 PEG_CLK IF NOT USED,
H34 D16 CLK_EXP_N
PEG_RX[1] PCIENB_RXP2 PEG_CLK# PULL-LOW FOR POWER SAVING.
H33 T0301 1TP_SKTOCC# AH24
PEG_RX[2] PCIENB_RXP3 SKTOCC#
E22 F35 A18 CLKDREF
0
FDI_TX#[0] PEG_RX[3] PCIENB_RXP4 DPLL_REF_SSCLK
D21 G33 +VTT_CPU 49.9Ohm 2 1% 1 R0307 A17 CLKDREF#
FDI_TX#[1] PEG_RX[4] PCIENB_RXP5 H_CATERR# DPLL_REF_SSCLK# R0367 1 CFD
D19 E34 AK14 2 1KOhm
FDI_TX#[2] PEG_RX[5] CATERR#
THERMAL
D18 F32 PCIENB_RXP6 R0366 1 CFD 2 1KOhm
FDI_TX#[3] PEG_RX[6] PCIENB_RXP7
G21 D34
FDI_TX#[4] PEG_RX[7] PCIENB_RXP8 THRO_CPU
E19 F33 2 R0317 1 F6 M_DRAMRST# <16,17>
PCI EXPRESS -- GRAPHICS

FDI_TX#[5] PEG_RX[8] SM_DRAMRST#
7
F21 B33 PCIENB_RXP9 0Ohm @ H_PECI_ISO AT15
FDI_TX#[6] PEG_RX[9] PECI
Intel(R) FDI
G18 D31 PCIENB_RXP10 2 1 AL1 SM_RCOMP0 R0331 1 1% 2 100Ohm
FDI_TX#[7] PEG_RX[10] <25,30> H_PECI 0402 SM_RCOMP[0]
A32 PCIENB_RXP11 SL305 AM1 SM_RCOMP1 R0332 1 1% 2 24.9Ohm
PEG_RX[11] PCIENB_RXP12 SM_RCOMP[1]
C30 +VTT_CPU 2 R0322 1 AN1 SM_RCOMP2 R0333 1 1% 2 130Ohm
PEG_RX[12] PCIENB_RXP13 68Ohm H_PROCHOT_S#_R AN26 SM_RCOMP[2]
D22 A28
FDI_TX[0] PEG_RX[13] PCIENB_RXP14 H_PROCHOT_S# 2 PROCHOT#
C21 B29 1 AN15 PM_EXTTS#0 <16,17>
6
FDI_TX[1] PEG_RX[14] 0402 PM_EXT_TS#[0]
DDR3
MISC
D20 A30 PCIENB_RXP15 SL306 AP15 PM_EXTTS#1
FDI_TX[2] PEG_RX[15] PM_EXT_TS#[1]
C18 PCIEG_RXN[15:0] <70>
FDI_TX[3] PCIENB_TXN0 CX0301 0.1UF/10V PCIEG_RXN0 H_THRMTRIP#_R +VTT_CPU
G22 L33 1 2 <25,32> H_THRMTRIP# 2 1 AK15
FDI_TX[4] PEG_TX#[0] PCIENB_TXN1 CX0302 0.1UF/10V PCIEG_RXN1 0402 SL307 THERMTRIP# RN0301A 2 10KOHM
E20 M35 1 2 1
FDI_TX[5] PEG_TX#[1] PCIENB_TXN2 CX0303 0.1UF/10V PCIEG_RXN2 RN0301B 4 10KOHM
F20 M33 1 2 3
FDI_TX[6] PEG_TX#[2] PCIENB_TXN3 CX0304 0.1UF/10V PCIEG_RXN3
G19 M30 1 2 AT28
2
FDI_TX[7] PEG_TX#[3] PRDY# XDP_PRDY# <7>
L31 PCIENB_TXN4 CX0305 1 2 0.1UF/10V PCIEG_RXN4 AP27
PEG_TX#[4] PREQ# XDP_PREQ# <7>
FDI_FSYNC0 F17 K32 PCIENB_TXN5 CX0306 1 2 0.1UF/10V PCIEG_RXN5
FDI_FSYNC1 FDI_FSYNC[0] PEG_TX#[5] PCIENB_TXN6 CX0307 0.1UF/10V PCIEG_RXN6
E17 M29 1 2 AN28 XDP_TCLK <7>
FDI_FSYNC[1] PEG_TX#[6] PCIENB_TXN7 CX0308 0.1UF/10V PCIEG_RXN7 TCK
J31 1 2 <7> H_CPURST# AP26 AP28 XDP_TMS <7>
PEG_TX#[7] RESET_OBS# TMS
PWR MANAGEMENT
FDI_INT C17 K29 PCIENB_TXN8 CX0309 1 2 0.1UF/10V PCIEG_RXN8 AT27
FDI_INT PEG_TX#[8] TRST# XDP_TRST# <7>
5
PCIENB_TXN9 CX0310 0.1UF/10V PCIEG_RXN9
JTAG & BPM

H30 1 2
FDI_LSYNC0 PEG_TX#[9] PCIENB_TXN10 CX0311 0.1UF/10V PCIEG_RXN10 PM_SYNC#_R XDP_TDI_R
F18 H29 1 2 <22> PM_SYNC# 2 1 AL15 AT29
FDI_LSYNC1 FDI_LSYNC[0] PEG_TX#[10] PCIENB_TXN11 CX0312 0.1UF/10V PCIEG_RXN11 0402 SL308 PM_SYNC TDI XDP_TDO_R
D17 F29 1 2 AR27
FDI_LSYNC[1] PEG_TX#[11] PCIENB_TXN12 CX0313 0.1UF/10V PCIEG_RXN12 TDO XDP_TDI_M
E28 1 2 AR29
PEG_TX#[12] PCIENB_TXN13 PCIEG_RXN13 TDI_M
D29 CX0314 1 2 0.1UF/10V 2 1VCCPWRGOOD_1_R AN14 AP29 XDP_TDO_M
PEG_TX#[13] PCIENB_TXN14 CX0315 0.1UF/10V PCIEG_RXN14 0402 SL309 VCCPWRGOOD_1 TDO_M
C For Intel GFX display D27 1 2 C
2
PEG_TX#[14] PCIENB_TXN15 CX0316 0.1UF/10V PCIEG_RXN15 H_DBR#_R R0336 1
C26 1 2 AN25 2 0Ohm XDP_DBRESET# <7,22>
PEG_TX#[15] DBR#
PCIEG_RXP[15:0] <70> <7,25> H_CPUPWRGD 2 1VCCPWRGOOD_0_R AN27
PCIENB_TXP0 CX0317 0.1UF/10V PCIEG_RXP0 0402 SL310 VCCPWRGOOD_0
L34 1 2 XDP_OBS[7:0] <7>
PEG_TX[0] PCIENB_TXP1 PCIEG_RXP1
M34 CX0318 1 2 0.1UF/10V AJ22 XDP_OBS0_R RX03371 2 0Ohm XDP_OBS0
PEG_TX[1] PCIENB_TXP2 CX0319 0.1UF/10V PCIEG_RXP2 BPM#[0]
M32 1 2 <22> H_DRAM_PWRGD 2 1VDDPWRGOOD_R AK13 AK22 XDP_OBS1_R RX03381 @ 2 0Ohm XDP_OBS1
PEG_TX[2] PCIENB_TXP3 PCIEG_RXP3 0402 SM_DRAMPWROK BPM#[1]
L30 CX0320 1 2 0.1UF/10V SL311 AK24 XDP_OBS2_R RX03391 @ 2 0Ohm XDP_OBS2
M31 1 2 AJ24 XDP_OBS3_R RX03401 @ 2 0Ohm XDP_OBS3
PEG_TX[4] PCIENB_TXP5 PCIEG_RXP5 BPM#[3]
K31 CX0322 1 2 0.1UF/10V
<92> H_VTTPWRGD AM15 AJ25 XDP_OBS4_R RX03411 @ 2 0Ohm XDP_OBS4
PEG_TX[5] PCIENB_TXP6 PCIEG_RXP6 VTTPWRGOOD BPM#[4]
M28 CX0323 1 2 0.1UF/10V AH22 XDP_OBS5_R RX03421 @ 2 0Ohm XDP_OBS5
H31 1 2 AK23 XDP_OBS6_R RX03431 @ 2 0Ohm XDP_OBS6
PEG_TX[7] PCIENB_TXP8 PCIEG_RXP8 BPM#[6]
K28 CX0325 1 2 0.1UF/10V
<7> H_PWRGD_XDP AM26 AH23 XDP_OBS7_R RX03441 @ 2 0Ohm XDP_OBS7
PEG_TX[8] TAPPWRGOOD BPM#[7]
：
G30 PCIENB_TXP9 CX0326 1 2 0.1UF/10V PCIEG_RXP9 @
PEG_TX[9] PCIENB_TXP10 CX0327 0.1UF/10V PCIEG_RXP10
G29 1 2
PEG_TX[10] PCIENB_TXP11 CX0328 0.1UF/10V PCIEG_RXP11 PLT_RST#_R
F28 1 2 <7,24,30,32,33,38,40,43,53,64,70> BUF_PLT_RST# 1 2 AL14
PEG_TX[11] PCIENB_TXP12 CX0329 0.1UF/10V PCIEG_RXP12 R0318 RSTIN#
E27 1 2
PEG_TX[12] PCIENB_TXP13 CX0330 0.1UF/10V PCIEG_RXP13 1.5KOHM
D28 1 2
PEG_TX[13]
1
C27 PCIENB_TXP14 CX0331 1 2 0.1UF/10V PCIEG_RXP14
Q
PEG_TX[14] PCIENB_TXP15 CX0332 0.1UF/10V PCIEG_RXP15 SOCKET989
C25 1 2
PEG_TX[15] R0319
R1.2--1 750OHM
2
SOCKET989
<25> BCLK_CPU_P_PCH 2 1 CLK_CPU_BCLK
Q
+VTT_CPU H_PROCHOT_S#
流
2 0402 1 SL301 CLK_CPU_BCLK# H_CPURST# R0313 2 @ 1 68Ohm 2 1
<25> BCLK_CPU_N_PCH 0402 <30,90> PWRLIMIT#
SL302 D0301 RB751V-40
XDP_TMS R0345 1 @ 2 51OHM
3
B B
3
D
XDP_TDI_R R0346 1 @ 2 51OHM Q0301
H2N7002
2 1 CLK_EXP_P XDP_PREQ# R0347 1 @ 2 51OHM 11 THRO_CPU
<21> CLK_DMI_PCH 0402 THRO_CPU <30>
<21> CLK_DMI#_PCH 2 1 SL303 CLK_EXP_N
S 2
G
0402 SL304 XDP_TCLK R0348 1 @ 2 51OHM
2
R1.2--2
交 JTAG MAPPING
纸
FDI disable: (For discrete graphic) DRAMPWROK: (WW35 MoW)
Choose either one solution: -->Choose solution 2 XDP_TDI_R 2 1
0402 XDP_TDI <7>
1. NC: SL314
1. This pin should have an external pull-up of 1K Ohms XDP_TDO_M R0350 1 2 0Ohm
+1.5V XDP_TDO <7>
FDI_TX#[0:7],FDI_TX[0:7],FDI_RX#[0:7],FDI_RX[0:7] CPU_XDP@
to 10K Ohms to a rail of 1.05/1.1V which is ON in S0-S3 XDP_TRST#
1
VCC_AXGSENSE,VSS_AXGSENSE 2. Connect this pin through a voltage divider circuit;
1
R0351
recommend 4.75K Ohms pull-up to DDR3 Power Rail
2
2. Pull-down to GND via 1KΩ ± 5% resistor: FDI_FSYNC0 1 2 R0354

1KOhm R0364 (VDDQ) of +V1.5U and a 12K Ohms pull-down to R0320 0Ohm 51OHM
图
FDI_FSYNC[0:1],FDI_LSYNC[0:1],FDI_INT,GFX_IMON FDI_FSYNC1 2 1 ground to convert to processor’s VTT level. 1.1KOhm
2
0402 SL316
2
~15mW power saving.(DG R0.8 P.70) FDI_LSYNC0 2 1 XDP_TDI_M R0352 1 2 0Ohm
1
0402 SL317 VDDPWRGOOD_R CPU_XDP@

3. Connected to GND: FDI_LSYNC1 2 1 XDP_TDO_R 2 1
1
0402 SL318 0402 SL315

A VCCAXG,DPLL_REF_CLK,DPLL_REF_CLK# FDI_INT 1 2 A
1KOhm R0363 3.01KOHM
R0321
4. Can be connected to GND directly:
R1.4--1
2
DPLL_REF_CLK,DPLL_REF_CLK#
5. Connect to +V1.05S rail:
WW14_2009_WOM
VCCFDIPLL
Title : CPU(1)_DMI,PEG,FDI,CLK,MISC
Engineer: Kenny Wu
www.vinafix.vn
BU2/RD1
C G60J 1.4
5 4 3 2 1
5 4 3 2 1
D
U0301C U0301D
2 8 D
5
AA6 M_CLK_DDR0 <16> <17> M_B_DQ[63:0] W8 M_CLK_DDR2 <17>
SA_CK[0] SB_CK[0]
<16> M_A_DQ[63:0] AA7 M_CLK_DDR#0 <16> W9 M_CLK_DDR#2 <17>
SA_CK#[0] M_B_DQ0 SB_CK#[0]
P7 M_CKE0 <16> B5 M3 M_CKE2 <17>
M_A_DQ0 SA_CKE[0] M_B_DQ1 SB_DQ[0] SB_CKE[0]
A10 A5
M_A_DQ1 SA_DQ[0] M_B_DQ2 SB_DQ[1]
C10 C3
0
C7 B3 V7 M_CLK_DDR3 <17>
M_A_DQ3 SA_DQ[2] M_B_DQ4 SB_DQ[3] SB_CK[1]
A7 Y6 M_CLK_DDR1 <16> E4 V6 M_CLK_DDR#3 <17>
M_A_DQ4 SA_DQ[3] SA_CK[1] M_B_DQ5 SB_DQ[4] SB_CK#[1]
B10 Y5 M_CLK_DDR#1 <16> A6 M2 M_CKE3 <17>
M_A_DQ5 SA_DQ[4] SA_CK#[1] M_B_DQ6 SB_DQ[5] SB_CKE[1]
D10 P6 M_CKE1 <16> A4
M_A_DQ6 SA_DQ[5] SA_CKE[1] M_B_DQ7 SB_DQ[6]
E10 C4
SA_DQ[6] SB_DQ[7]
7
M_A_DQ7 A8 M_B_DQ8 D1
D8 D2
F10 AE2 M_CS#0 <16> F2 AB8 M_CS#2 <17>
M_A_DQ10 SA_DQ[9] SA_CS#[0] M_B_DQ11 SB_DQ[10] SB_CS#[0]
E6 AE8 M_CS#1 <16> F1 AD6 M_CS#3 <17>
M_A_DQ11 SA_DQ[10] SA_CS#[1] M_B_DQ12 SB_DQ[11] SB_CS#[1]
F7 C2
E9 F5
6
B7 F3
E7 AD8 M_ODT0 <16> G4 AC7 M_ODT2 <17>
M_A_DQ15 SA_DQ[14] SA_ODT[0] M_B_DQ16 SB_DQ[15] SB_ODT[0]
C6 AF9 M_ODT1 <16> H6 AD1 M_ODT3 <17>
M_A_DQ16 SA_DQ[15] SA_ODT[1] M_B_DQ17 SB_DQ[16] SB_ODT[1]
H10 G2
G8 J6
K7 J3
2
J8 G1 M_B_DM[7:0] <17>
M_A_DQ20 SA_DQ[19] M_B_DQ21 SB_DQ[20] M_B_DM0
G7 G5 D4
M_A_DQ21 SA_DQ[20] M_B_DQ22 SB_DQ[21] SB_DM[0] M_B_DM1
G10 M_A_DM[7:0] <16> J2 E1
M_A_DQ22 SA_DQ[21] M_A_DM0 M_B_DQ23 SB_DQ[22] SB_DM[1] M_B_DM2
J7 B9 J1 H3
M_A_DQ23 SA_DQ[22] SA_DM[0] M_A_DM1 M_B_DQ24 SB_DQ[23] SB_DM[2] M_B_DM3
J10 D7 J5 K1
SA_DQ[23] SA_DM[1] SB_DQ[24] SB_DM[3]
5
M_A_DQ24 L7 H7 M_A_DM2 M_B_DQ25 K2 AH1 M_B_DM4
M6 M7 L3 AL2
M8 AG6 M1 AR4
L9 AM7 K5 AT8
M_A_DQ28 SA_DQ[27] SA_DM[5] M_A_DM6 M_B_DQ29 SB_DQ[28] SB_DM[7]
L6 AN10 K4
M_A_DQ29 SA_DQ[28] SA_DM[6] M_A_DM7 M_B_DQ30 SB_DQ[29]
C K8 AN13 M4 C
2
M_A_DQ30 SA_DQ[29] SA_DM[7] M_B_DQ31 SB_DQ[30]
N8 N5
P9 AF3
AH5 AG1 M_B_DQS#[7:0] <17>
M_A_DQ33 SA_DQ[32] M_B_DQ34 SB_DQ[33] M_B_DQS#0
AF5 M_A_DQS#[7:0] <16> AJ3 D5
M_A_DQ34 SA_DQ[33] M_A_DQS#0 M_B_DQ35 SB_DQ[34] SB_DQS#[0] M_B_DQS#1
AK6 C9 AK1 F4
M_A_DQ35 SA_DQ[34] SA_DQS#[0] M_A_DQS#1 M_B_DQ36 SB_DQ[35] SB_DQS#[1] M_B_DQS#2
DDR SYSTEM MEMORY A
AK7 F8 AG4 J4
AF6 J9 AG3 L4
AG5 N9 AJ4 AH2
DDR SYSTEM MEMORY - B

AJ7 AH7 AH4 AL4
AJ6 AK9 AK3 AR5
AJ10 AP11 AK4 AR8
SA_DQ[40] SA_DQS#[6] SB_DQ[41] SB_DQS#[7]
：
M_A_DQ41 AJ9 AT13 M_A_DQS#7 M_B_DQ42 AM6
M_A_DQ42 SA_DQ[41] SA_DQS#[7] M_B_DQ43 SB_DQ[42]
AL10 AN2
AK12 AK5
AK8 AK2
AL7 M_A_DQS[7:0] <16> AM4
M_A_DQ46 SA_DQ[45] M_A_DQS0 M_B_DQ47 SB_DQ[46]
AK11 C8 AM3 M_B_DQS[7:0] <17>
Q
M_A_DQ47 SA_DQ[46] SA_DQS[0] M_A_DQS1 M_B_DQ48 SB_DQ[47] M_B_DQS0
AL8 F9 AP3 C5
M_A_DQ48 SA_DQ[47] SA_DQS[1] M_A_DQS2 M_B_DQ49 SB_DQ[48] SB_DQS[0] M_B_DQS1
AN8 H9 AN5 E3
AM10 M9 AT4 H4
AR11 AH8 AN6 M5
AL11 AK10 AN4 AG2
AM9 AN11 AN3 AL5
Q
AN9 AR13 AT5 AP5
M_A_DQ54 SA_DQ[53] SA_DQS[7] M_B_DQ55 SB_DQ[54] SB_DQS[6] M_B_DQS7
AT11 AT6 AR7
M_A_DQ55 SA_DQ[54] M_B_DQ56 SB_DQ[55] SB_DQS[7]
AP12 AN7
AM12 AP6
AN12 M_A_A[15:0] <16> AP8
M_A_DQ58 SA_DQ[57] M_A_A0 M_B_DQ59 SB_DQ[58]
AM13 Y3 AT9
M_A_DQ59 SA_DQ[58] SA_MA[0] M_A_A1 M_B_DQ60 SB_DQ[59]
AT14 W1 AT7
AT12 AA8 AP9
AL13 AA3 AR10 M_B_A[15:0] <17>
M_A_DQ62 SA_DQ[61] SA_MA[3] M_A_A4 M_B_DQ63 SB_DQ[62] M_B_A0
AR14 V1 AT10 U5
M_A_DQ63 SA_DQ[62] SA_MA[4] M_A_A5 SB_DQ[63] SB_MA[0] M_B_A1
AP14 AA9 V2
SA_DQ[63] SA_MA[5] SB_MA[1]
流
V8 M_A_A6 T5 M_B_A2
SA_MA[6] M_A_A7 SB_MA[2] M_B_A3
T1 V3
Y9 R1
B SA_MA[8] M_A_A9 SB_MA[4] M_B_A5 B
<16> M_A_BS0 AC3 U6 <17> M_B_BS0 AB1 T8
SA_BS[0] SA_MA[9] M_A_A10 SB_BS[0] SB_MA[5] M_B_A6
<16> M_A_BS1 AB2 AD4 <17> M_B_BS1 W5 R2
<16> M_A_BS2 U7 T2 <17> M_B_BS2 R7 R6
U3 R4
AG8 R5
T3 <17> M_B_CAS# AC5 AB5
SA_MA[14] M_A_A15 SB_CAS# SB_MA[10] M_B_A11
<16> M_A_CAS# AE1 V9 <17> M_B_RAS# Y7 P3
SA_CAS# SA_MA[15] SB_RAS# SB_MA[11] M_B_A12
<16> M_A_RAS# AB3 <17> M_B_WE# AC6 R3
SA_RAS# SB_WE# SB_MA[12] M_B_A13
交
<16> M_A_WE# AE9 AF7
SA_WE# SB_MA[13] M_B_A14
P5
SB_MA[14] M_B_A15
N1
SB_MA[15]
SOCKET989
纸
SOCKET989
图
A A
Title : CPU(2)_DDR3
Engineer: Kenny Wu
www.vinafix.vn
BU2/RD1
C G60J 1.4
5 4 3 2 1
5 4 3 2 1
U0301E
AJ13 AT20
U0301H
AE34
U0301I
2 8 D
5
RSVD32 VSS1 VSS81
AJ12 AT17 AE33
RSVD33 VSS2 VSS82
AR31 AE32 K27
VSS3 VSS83 VSS161
AP25 AR28 AE31 K9
RSVD1 VSS4 VSS84 VSS162
AL25 AH25 AR26 AE30 K6
RSVD2 RSVD34 VSS5 VSS85 VSS163
AL24 AK26 AR24 AE29 K3
AL22 AR23 AE28 J32
0
AJ33 AL26 AR20 AE27 J30
RSVD5 RSVD36 T0504 VSS8 VSS88 VSS166
AG9 AR2 1 AR17 AE26 J21
M27 AR15 AE6 J19
L28 AJ26 AR12 AD10 H35
10mil trace RSVD8 RSVD38 VSS11 VSS91 VSS169
<18> DIMM0_VREF_DQ J17 AJ27 AR9 AC8 H32
7
10mil trace H17 AR6 AC4 H28
<18> DIMM1_VREF_DQ RSVD10 VSS13 VSS93 VSS171
G25 AR3 AC2 H26
G17 AP20 AB35 H24
RSVD12 T0501 VSS15 VSS95 VSS173
E31 AP1 1 AP17 AB34 H22
RSVD13 RSVD40 T0506 VSS16 VSS96 VSS174
E30 AT2 1 AP13 AB33 H18
AP10 AB32 H15
6
T0507 VSS18 VSS98 VSS176
AT3 1 AP7 AB31 H13
RSVD42 T0503 VSS19 VSS99 VSS177
AR1 1 AP4 AB30 H11
AP2 AB29 H8
VSS21 VSS101 VSS179
AN34 AB28 H5
VSS22 VSS102 VSS180
AN31 AB27 H2
VSS23 VSS103 VSS181
AL28 AN23 AB26 G34
2
T0578 CFG0 RSVD45 VSS24 VSS104 VSS182
1 AM30 AL29 AN20 AB6 G31
T0567 CFG1 CFG[0] RSVD46 VSS25 VSS105 VSS183
1 AM28 AP30 AN17 AA10 G20
1 AP31 AP32 AM29 Y8 G9
1 AL32 AL27 AM27 Y4 G6
1 AL30 AT31 AM25 Y2 G3
CFG[4] RSVD50 VSS29 VSS109 VSS187
5
T0568 1 CFG5 AM31 AT32 AM20 W35 F30
1 AN29 AP33 AM17 W34 F27
1 AM32 AR33 AM14 W33 F25
T0574 CFG8 CFG[7] RSVD53 T0508 VSS32 VSS112 VSS190
1 AK32 AT33 1 AM11 W32 F22
1 AK31 AT34 1 AM8 W31 F19
RESERVED

C 1 AK28 AP35 1 AM5 W30 F16 C
2
1 AJ28 AR35 1 AM2 W29 E35
1 AN30 AR32 AL34 W28 E32
T0577
T0592
1
1
CFG13
CFG14
AN32
AJ32
CFG[12]
CFG[13]
CFG[14]
RSVD58
AL31
AL23
VSS37
VSS38
VSS39
VSS VSS117
VSS118
VSS119
W27
W26
E29
E24
VSS195
VSS196
VSS197
VSS
T0581 1 CFG15 AJ29 E15 AL20 W6 E21
1 AJ30 F15 AL17 V10 E18
1 AK30 A2 AL12 U8 E13
1 H16 D15 AL9 U4 E11
CFG[18] RSVD62 VSS43 VSS123 VSS201
C15 AL6 U2 E8
AJ15 RSVD64_R SL502 2 1 AL3 T35 E5
RSVD64 0402 VSS45 VSS125 VSS203
AH15 RSVD65_R SL503 2 1 AK29 T34 E2 AT35 TP_MCP_VSS_NCTF1 1 T0564
RSVD65 0402 VSS46 VSS126 VSS204 VSS_NCTF1
：
AK27 T33 D33 AT1 TP_MCP_VSS_NCTF2 1 T0561
VSS47 VSS127 VSS205 VSS_NCTF2
B19
RSVD15 R2.0--1 AK25
VSS48 VSS128
T32 D30
VSS206 VSS_NCTF3
AR34
A19 AK20 T31 D26 B34
RSVD16 VSS49 VSS129 VSS207 VSS_NCTF4
AK17 T30 D9 B2
NCTF
VSS50 VSS130 VSS208 VSS_NCTF5
SL0500 2 1H_RSVD17_R A20 AJ31 T29 D6 B1 TP_MCP_VSS_NCTF6 1 T0563
SL501 0402 RSVD17 VSS51 VSS131 VSS209 VSS_NCTF6
2 1H_RSVD18_R B20 AJ23 T28 D3 A35 TP_MCP_VSS_NCTF7 1 T0562
Q
0402 RSVD18 VSS52 VSS132 VSS210 VSS_NCTF7
AA5 AJ20 T27 C34
R2.0--1 U9
RSVD19 RSVD67
AA4 AJ17
VSS54 VSS134
T26 C32
VSS212
T9 R8 AJ14 T6 C29
AD3 AJ11 R10 C28
AC9 AD2 AJ8 P8 C24
AB9 AA2 AJ5 P4 C22
Q
AA1 AJ2 P2 C20
R9 AH35 N35 C19
AG7 AH34 N34 C16
T0513 RSVD74 VSS61 VSS141 VSS219
1 C1 AE3 AH33 N33 B31
T0510 RSVD23 RSVD75 VSS62 VSS142 VSS220
1 A3 AH32 N32 B25
AH31 N31 B21
VSS64 VSS144 VSS222
V4 AH30 N30 B18
V5 AH29 N29 B17
N2 AH28 N28 B13
J29 AD5 AH27 N27 B11
J28 AD7 AH26 N26 B8
流
W3 AH20 N6 B6
1 A34 W2 AH17 M10 B4
1 A33 N3 AH13 L35 A29
B RSVD29 RSVD83 VSS72 VSS152 VSS230 B
AE5 AH9 L32 A27
1 C35 AD9 AH6 L29 A23
1 B35 AH3 L8 A9
AG10 L5
VSS76 VSS156
AP34 AF8 L2
RSVD86 VSS77 VSS157
AF4 K34
VSS78 VSS158
AF2 K33
VSS79 VSS159
AE35 K30
VSS80 VSS160
交
SOCKET989
SOCKET989 SOCKET989
CFG strapping information:
纸
CFG[1:0]: PCI Express Port Bifurcation:(Clarksfield Only)
- 11 = 1 x 16 PEG (Default)
- 10 = 2 x 8 PEG
CFG[3]: PCIE Static Numbering Lane Reversal.(Auburndale Only)
- 1:Normal Operation (Default)
- 0:Lane Numbers Reversed 15 -> 0, 14 -> 1, ... @
CFG[4]: Embedded DisplayPort Detection.(Auburndale Only) CFG0 R0535 2 1 3.01KOHM
- 1:Disabled - No Physical Display Port attached to Embedded DisplayPort
1%
- 0:Enabled - An external Display Port device is connected to the Embedded Display Port
图
@
CFG[7]: Fixed for PCI Express 2.0 jitter specifications.(Clarksfield) CFG3 R0536 2 1 3.01KOHM
Clarksfield (only for early samples pre-ES1) - Connect to GND with 3.01K Ohm/5% resistor
For a common motherboard design (for AUB and CFD), 1%
@
the pull-down resistor should be used. Does not impact AUB functionality. CFG4 R0537 2 1 3.01KOHM
A Unmount if Intel has fixed this issue. A
1%
@
CFG7 R0538 2 1 3.01KOHM
Note: (Auburndale)Hardware Straps are sampled on
1%
the asserting edge of VCCPWRGOOD_0 and
VCCPWRGOOD_1 and latched inside the processor.
Note: (Clarksfield)Hardware Straps are sampled
after RSTIN# de-assertion.
Title : CPU(3)_CFG,RSVD,GND
Engineer: Kenny Wu
www.vinafix.vn
BU2/RD1
C G60J 1.4
5 4 3 2 1
5 4 3 2 1
+VTT_CPU +VTT_CPU <3,7,25,26,27,29,32,57,82>

U0301F
+1.5V +1.5V <3,16,57,69,83>
+VCORE +VCORE <57,69,80>

+VCORE +1.8VS +1.8VS <26,38,57,70,85>
+VTT_CPU
8
+VGFX_CORE +VGFX_CORE
AG35 AH14
VCC1 VTT1
AG34 AH12
VCC2 VTT2
C0601
C0602
C0604
C0606
C0608
C0611
C0613
C0615
C0616
AG33 AH11
VCC3 VTT3
AG32 AH10
VCC4 VTT4
1
2
AG31 J14
VCC5 VTT5 U0301G
AG30 J13
D VCC6 VTT6 D
AG29 H14
10UF/6.3V
10UF/6.3V
10UF/6.3V
10UF/6.3V
10UF/6.3V
10UF/6.3V
10UF/6.3V
10UF/6.3V
10UF/6.3V
2
2
VCC7 VTT7
AG28 H12 AT21
VCC8 VTT8 VCCAXG1
AG27 G14 AT19 AR22
VCC9 VTT9 @ @ VCCAXG2 VCCAXG_SENSE
R0607
AG26 G13 AT18 AT22
SENSE
LINES
5
VCC10 VTT10 VCCAXG3 VSSAXG_SENSE
1
AF35 G12 AT16
VCC11 VTT11 VCCAXG4
AF34 G11 AR21
VCC12 VTT12 VCCAXG5
CFD
AF33 F14 AR19
VCC13 VTT13 VCCAXG6
AF32 F13 AR18
VCC14 VTT14 VCCAXG7
AF31 F12 AR16 AM22
2
VCC15 VTT15 +VTT_CPU VCCAXG8 GFX_VID[0]
AF30 F11 AP21 AP22
0
VCC16 VTT16 VCCAXG9 GFX_VID[1]
GRAPHICS VIDs
0Ohm
AF29 E14 AP19 AN22
VCC17 VTT17 VCCAXG10 GFX_VID[2] R0605 1
AF28 E12 AP18 AP23 2 4.7KOhm
VCC18 VTT18 VCCAXG11 GFX_VID[3] CFD
AF27 D14 AP16 AM23
C0687
C0688
C0689
AF26 D13 AN21 AP24
GRAPHICS
AD35 D12 AN19 AN24
1.1V RAIL POWER
1
7
AD34 D11 AN18
VCC22 VTT22 VCCAXG15 R0617 1 @
AD33 C14 AN16 20Ohm GFX_VR <30>
VCC23 VTT23 VCCAXG16
AD32 C13 DG R0.8,P368 AM21 AR25 GFX_VRON_EN
10UF/6.3V
10UF/6.3V
10UF/6.3V
2
2
VCC24 VTT24 VCCAXG17 GFX_VR_EN
AD31 C12 AM19 AT25 GFXVR_DPRSLPVR_RSL0600 2 1
VCC25 VTT25 VCCAXG18 GFX_DPRSLPVR 0402
AD30
VCC26 VTT26
C11 AM18
VCCAXG19 GFX_IMON
AM24 R2.0--1
AD29 B14 AM16 R0606 1 2 4.7KOhm
6
AD28 B12 AL21
AD27 A14 AL19 1 R0613 2
VCC29 VTT29 VCCAXG22 1KOhm CFD +1.5V
AD26 A13 AL18
AC35 A12 AL16
AC34 A11 AK21 AJ1
VCC32 VTT32 VCCAXG25 VDDQ1
AC33 AK19 AF1
2
VCC33 VCCAXG26 VDDQ2
PANASONIC/EEFSX0D331XE
+VTT_CPU
- 1.5V RAILS
AC32 AK18 AE7
CE0604
AC31 AK16 AE4
ESR=6mOhm/Ir=3A
C0621
C0622
C0623
C0624
C0625
C0685
C0686
AC30 AF10 AJ21 AC1
1
AC29 AE10 AJ19 AB7 +
1
C0617
C0618
AC28 AC10 AJ18 AB4
CPU CORE SUPPLY
5
AC27 AB10 AJ16 Y1 @
1
1
AC26 Y10 AH21 W7
1UF/10V
1UF/10V
1UF/10V
1UF/10V
1UF/10V
2
22UF/6.3V 2
22UF/6.3V 2
2
POWER
AA35 W10 AH19 W4
330UF/2V
AA34 U10 AH18 U1
22UF/6.3V
22UF/6.3V
2
VCC42 VTT39 2 VCCAXG35 VDDQ11

AA33 T10 AH16 T7
C AA32 J12 T4 C
2
VCC44 VTT41 VDDQ13
AA31 J11 P1
VCC45 VTT42 VDDQ14
AA30
VCC46 VTT43
J16
VDDQ15
N7 DG R0.8,P367
AA29 J15 +VTT_CPU N4
VCC47 VTT44 VDDQ16 1xbuck Stuffing option
DDR3
AA28 L1
VCC48 Intel use 22u VDDQ17
AA27 J24 H1
VCC49 VTT45 VDDQ18
FDI
AA26 J23
VCC50 VTT46
C0654
C0655
Y35 H25
VCC51 VTT47
Y34
VCC52
1
Y33
VCC53
Y32 P10 +VTT_CPU
VCC54 VTT59
Y31 N10
22UF/6.3V 2
22UF/6.3V 2
VCC55 VTT60
1
：
Y30 L10 C0626 C0627
VCC56 VTT61
Y29
VCC57 R2.0--1 VTT62
K10
Y28 R1.4--5 10UF/6.3V 10UF/6.3V
2
VCC58
Y27
VCC59
Y26
VCC60 +VTT_CPU
V35 AN33 PM_PSI# <80>
Q
VCC61 PSI#
1.1V
V34 Intel use 22u J22
POWER
VCC62 VTT63 +VTT_CPU
C0665
C0664
V33 K26 J20
22UF/6.3V
22UF/6.3V
VCC63 CPU_VID[0:6] <19> VTT48 VTT64
1
V32 AK35 CPU_VID0 J27 J18
VCC64 VID[0] CPU_VID1 VTT49 VTT65
C0656
C0657
C0658
C0659
V31 AK33 J26 H21
VCC65 VID[1] VTT50 VTT66
PEG & DMI

V30 AK34 CPU_VID2 J25 H20
2
1
V29 AL35 CPU_VID3 H27 H19
Q
CPU VIDS
V28 AL33 CPU_VID4 R2.0--1 G28

VCC68 VID[4] CPU_VID5 VTT53
V27 AM33 G27
22UF/6.3V 2
22UF/6.3V 2
22UF/6.3V 2
22UF/6.3V 2
VCC69 VID[5] CPU_VID6 VTT54 Intel use 22u
V26 AM35 G26
VCC70 VID[6] PM_DPRSLPVR_R VTT55
U35 AM34 PM_DPRSLPVR <80> F26
VCC71 PROC_DPRSLPVR VTT56
U34 E26 L26 +1.8VS
VCC72 VTT57 VCCPLL1
1.8V
U33 E25 L27
VCC73 VTT58 VCCPLL2
C0628
C0629
C0667
C0668
C0666
U32 M26
VCC74 VCCPLL3
U31
VCC75 VTT_SELECT
G15 H_VTTVID1 <82> Intel 1.8V CAP.
1
U30 Intel use 22u
VCC76 1u: 2/2
U29
U28
VCC77 VTT_TEST TBD 2.2u: 1/1
1UF/10V
1UF/10V
2.2UF/10V
4.7UF/6.3V
2
2
VCC78
流
U27 +VCORE
4.7u: 1/1
22UF/6.3V
VCC79
U26
R35
VCC80 330u:1/1
B VCC81 SOCKET989
B
R34
VCC82
2
R33
VCC83 R0602
R32 AN35 I_MON <80>
VCC84 ISENSE
R31
VCC85 100Ohm Decoupling guide from Intel
R30 1%
VCC86
R29 VCORE 22uF * 16pcs
1
VCC87 VCCSENSE
R28 AJ34
SENSE LINES
VCC88 VCC_SENSE VCCSENSE <80> 10uF * 16pcs

R27 AJ35 VSSSENSE
VCC89 VSS_SENSE VSSSENSE <80>
交
R26 470uF * 6pcs (2 no stuff)
VCC90
1
P35 +VCORE
VCC91 VTT_SENSE T0632
P34 B15 1
VCC92 VTT_SENSE
P33 A15 TP_VSS_SENSE_VTT 1 T0631 R0603
VCC93 VSS_SENSE_VTT 100Ohm
P32
VCC94 1%
P31
2
VCC95
P30
VCC96
1
1
P29
VCC97 C0632 C0633 C0634 C0635 C0636 C0637 C0638 C0639
P28
VCC98
P27 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V
2
2
VCC99
P26
VCC100
纸
@ @ @
1
1
C0640 C0641 C0642 C0643 C0644 C0645 C0647
SOCKET989 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V
2
2
@ @
图
1
1
C0669 C0670 C0671 C0672 C0673 C0674 C0675 C0676
A 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V A
2
2
@ @
1
1
C0677 C0678 C0679 C0680 C0681 C0682 C0683 C0684
10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V Title : CPU(4)_PWR
2
Engineer: Kenny Wu
www.vinafix.vn
@ @ @ BU2/RD1
C G60J 1.4
5 4 3 2 1
5 4 3 2 1
2 8 D
0 5
7
+VTT_CPU +VTT_CPU <3,6,25,26,27,29,32,57,82>
26
5
J0701
1 2
1 2 XDP_OBS16 T0710
<3> XDP_PREQ# 3 4 1
3 4 XDP_OBS17 T0711
<3> XDP_PRDY# 5 6 1
5 6
7 8
7 8 XDP_OBS8 T0702
C
<3> XDP_OBS0 9 10 1 C
2
9 10 XDP_OBS9 T0703
<3> XDP_OBS1 11 12 1
11 12
13 14
13 14 XDP_OBS10 T0704
<3> XDP_OBS2 15 16 1
15 16 XDP_OBS11 T0705
<3> XDP_OBS3 17 18 1
17 18 +VTT_CPU
19 20
T0715 XDP_OBS21 19 20 XDP_OBS18 T0712
1 21 22 1
T0714 XDP_OBS20 21 22 XDP_OBS19 T0713
1 23 24 1
23 24
25 26
25 26 XDP_OBS12 T0706
<3> XDP_OBS4 27 28 1
27 28 XDP_OBS13 T0707
<3> XDP_OBS5 29 30 1
29 30
31 32
31 32
：
33 34 XDP_OBS14 1 T0708
<3> XDP_OBS6 33 34
2
35 36 XDP_OBS15 1 T0709
<3> XDP_OBS7 35 36
37 38 R0711
37 38
<3,25> H_CPUPWRGD 2 1KOhm 1 R0708 CPUPWRGD_XDP 39 40 CLK_ITP_BCLK_XDP R0710 1 0Ohm 2
CLK_ITP_BCLK <3>
51Ohm
39 40
<22> PM_PWRBTN#_R 2 0Ohm 1 R0714 PM_PWRBTN#_XDP 41 42 CLK_ITP_BCLK#_XDP R0712 1 0Ohm 2
CLK_ITP_BCLK# <3>
41 42
+VTT_CPU @ 43 44 @
1
Q
43 44
<3> H_PWRGD_XDP 2 @0Ohm 1 R0709 PCIE_CLK_XDP_P 45 46 XDP_RST#_R R0707 1 @ 1KOhm2
H_CPURST# <3>
PCIE_CLK_XDP_N 45 46
1 47 48 XDP_DBRESET# <3,22>
47 48
@ T0701 49 50 @
49 50
<16,17,28,29,38,44,53,69> SMB_DAT_S 51 52 XDP_TDO <3>
51 52
<16,17,28,29,38,44,53,69> SMB_CLK_S 53 54 XDP_TRST# <3>
53 54
55 56
Q
55 56 XDP_TDI <3>
<3> XDP_TCLK 57 58 XDP_TMS <3>
57 58
59 60
59 60
61
NP_NC1
62
NP_NC2
BtoB_CON_60P
@
XDP_RST#_R R0715 1 0Ohm 2 BUF_PLT_RST# <3,24,30,32,33,38,40,43,53,64,70>
CPU_XDP@
流
B
CPU XDP connector B
交
纸
图
A A
Title : CPU(5)_XDP
Engineer: Kenny Wu
www.vinafix.vn
BU2/RD1
C G60J 1.4
5 4 3 2 1
5 4 3 2 1
2 8 D
0 5
6 7
C
5 2 C
2
Q：
Q
流
B B
交
纸
图
A A
Title : NB(1)_****
BU2/RD1 Engineer: Kenny Wu
www.vinafix.vn
Custom G60J 1.4
5 4 3 2 1
5 4 3 2 1
2 8 D
0 5
6 7
C
5 2 C
2
Q：
Q
流
B B
交
纸
图
A A
Title : NB(2)_****
www.vinafix.vn
Custom G60J 1.4
5 4 3 2 1
5 4 3 2 1
2 8 D
0 5
6 7
C
5 2 C
2
Q：
Q
流
B B
交
纸
图
A A
Title : NB(3)_****
www.vinafix.vn
Custom G60J 1.4
5 4 3 2 1
5 4 3 2 1
2 8 D
0 5
6 7
C
5 2 C
2
Q：
Q
流
B B
交
纸
图
A A
Title : NB(4)_****
www.vinafix.vn
Custom G60J 1.4
5 4 3 2 1
5 4 3 2 1
2 8 D
0 5
6 7
C
5 2 C
2
Q：
Q
流
B B
交
纸
图
A A
Title : NB(5)_****
www.vinafix.vn
Custom G60J 1.4
5 4 3 2 1
5 4 3 2 1
2 8 D
0 5
6 7
C
5 2 C
2
Q：
Q
流
B B
交
纸
图
A A
Title : NB(6)_****
www.vinafix.vn
Custom G60J 1.4
5 4 3 2 1
5 4 3 2 1
2 8 D
0 5
6 7
5 2
2
C C
Q：
Q
流
B B
交
纸
图
A A
Title : NB(7)_****
A G60J 1.4
5 4
www.vinafix.vn
3
Date: Friday, July 31, 2009
2
Sheet 14
1
of 99
5 4 3 2 1
2 8 D
0 5
6 7
5 2
2
C C
Q：
Q
流
B B
交
纸
图
A A
Title : NB(8)_****
A G60J 1.4
5 4
www.vinafix.vn
3
2
Sheet 15
1
of 99
5 4 3 2 1
+1.5V +1.5V <3,6,57,69,83>
+1.5V_DDR3 +1.5V_DDR3 <17,18>
+0.75VS +0.75VS <17,57,83>
+3VS +3VS <29,48,80,91,92>
8
M_VREFCA_DIMM0 M_VREFCA_DIMM0 <18>
M_VREFDQ_DIMM0 M_VREFDQ_DIMM0 <18>
2
D D
5
M_A_DQ[63:0] <4>
J1601A J1601B
<4> M_A_A[15:0]
5 M_A_DQ5
DQ0 M_A_DQ1 R1602
7
M_A_A0 DQ1 M_A_DQ7
98 15 <3,17> PM_EXTTS#0 2 1 198 2
M_A_A1 A0 DQ2 M_A_DQ6 EVENT# VSS1
97 17 3
0
M_A_A2 A1 DQ3 M_A_DQ0 0Ohm @ VSS2
96 4 8
M_A_A3 A2 DQ4 M_A_DQ4 VSS3
95 6 207 9
M_A_A4 A3 DQ5 M_A_DQ3 GND1 VSS4
M_A_A5
92
91
A4 0 DQ6
16
18 M_A_DQ2
208
GND2 VSS5
13
14
90 21 19
A6 DQ8 VSS7
7
M_A_A7 86 23 M_A_DQ13 77 20
M_A_A8 A7 DQ9 M_A_DQ11 NC1 VSS8
89 33 122 25
M_A_A9 A8 DQ10 M_A_DQ14 NC2 VSS9
85 35 26
107 22 205 31
M_A_A11 A10/AP DQ12 M_A_DQ8 NP_NC1 VSS11
84 24 206 32
M_A_A12 A11 DQ13 M_A_DQ10 NP_NC2 VSS12
83 1 34 37
6
M_CLK_DDR0 M_A_A13 A12/BC# DQ14 M_A_DQ15 VSS13
119 36 <4> M_ODT0 116 38
A13 DQ15 ODT0 VSS14
1
1% M_A_A14 80 39 M_A_DQ21 120 43

A14 DQ16 <4> M_ODT1 ODT1 VSS15
1
C1621 R1603 M_A_A15 78 41 M_A_DQ20 44

10PF/50V 150Ohm A15 DQ17 M_A_DQ18 VSS16
51 48
@ @ DQ18 M_A_DQ22 VSS17
53 <4> M_A_RAS# 110 49
2
M_CLK_DDR#0 DQ19 M_A_DQ16 RAS# VSS18

109 40 30 54
2
<4> M_A_BS0 <3,17> M_DRAMRST#
2
BA0 DQ20 M_A_DQ17 RESET# VSS19

<4> M_A_BS1 108 42 55
BA1 DQ21 M_A_DQ23 VSS20
M_CLK_DDR1
<4> M_A_BS2 79
BA2 2 DQ22
50
52 M_A_DQ19
<4> M_CS#0 114
121
S#0 VSS21
60
61
DQ23 <4> M_CS#1 S#1 VSS22
1
1% 57 M_A_DQ24 65
DQ24 VSS23
1
C1626 R1604 59 M_A_DQ25 2 R1605 1 197 66

DQ25 SA0 VSS24
5
10PF/50V 150Ohm 115 67 M_A_DQ30 SMBus Slave Address: A0H 10KOhm 201 71
<4> M_A_CAS# CAS# DQ26 SA1 VSS25
@ @ 103 69 M_A_DQ31 2 R1606 1 72
<4> M_CLK_DDR#0
2
M_CLK_DDR#1 CK#0 DQ27 M_A_DQ28 10KOhm VSS26

<4> M_CLK_DDR#1 104 56 127
2
CK#1 DQ28 M_A_DQ29 VSS27

<4> M_CLK_DDR0 101 58 <7,17,28,29,38,44,53,69> SMB_CLK_S 202 128
CK0 DQ29 M_A_DQ26 SCL VSS28
<4> M_CLK_DDR1 102
CK1 3 DQ30
68
M_A_DQ27
<7,17,28,29,38,44,53,69> SMB_DAT_S 200
SDA VSS29
133
C
PLACE CLOSE TO SODIMM <4> M_CKE0 73 70 134 C
2
CKE0 DQ31 M_A_DQ36 VSS30
<4> M_CKE1 74 129 138
CKE1 DQ32 M_A_DQ33 VSS31
131 125 139
DQ33 M_A_DQ39 TEST VSS32
<4> M_A_DM[7:0] 141 144
M_A_DM0 DQ34 M_A_DQ38 VSS33
11 143 145
M_A_DM1 DM0 DQ35 M_A_DQ37 VSS34
28 130 75 150
M_A_DM2 DM1 DQ36 M_A_DQ32 VDD1 VSS35
46 132 76 151
M_A_DM3 DM2 DQ37 M_A_DQ35 +1.5V_DDR3 VDD2 VSS36
M_A_DM4
63
136
DM3 4 DQ38
140
142 M_A_DQ34
81
82
VDD3 VSS37
155
156
M_A_DM6
153
DM5 DQ40
147
M_A_DQ44
Layout Note: Place these caps near SO DIMM 0 87
VDD5 VSS39
161
170 149 88 162
187 157 93 167
DM7 DQ42 VDD7 VSS41
1
：
159 M_A_DQ47 94 168
DQ43 M_A_DQ40 C1605 C1606 C1607 C1608 VDD8 VSS42
<4> M_A_DQS[7:0] 146 99 172
M_A_DQS0 DQ44 M_A_DQ43 VDD9 VSS43
12 148 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 100 173
2
M_A_DQS1 DQS0 DQ45 M_A_DQ42 VDD10 VSS44
M_A_DQS2
29
47
DQS1 5 DQ46
158
160 M_A_DQ46
105
106
VDD11 VSS45
178
179
64 163 111 184
Q
137 165 112 185
M_A_DQS5 DQS4 DQ49 M_A_DQ54 +3VS VDD14 VSS48
154 175 117 189
171 177 118 190
188 164 123 195
DQS7 DQ52 M_A_DQ48 VDD17 VSS51
166 124 196
DQ53 M_A_DQ55 VDD18 VSS52
6 174
Q
<4> M_A_DQS#[7:0] DQ54
1
M_A_DQS#0 10 176 M_A_DQ50 @
M_A_DQS#1 DQS#0 DQ55 M_A_DQ56 C1614 C1615
27 181 199 203 +0.75VS
M_A_DQS#2 DQS#1 DQ56 M_A_DQ57 M_VREFCA_DIMM0 VDDSPD VTT1
45 183 2.2UF/10V 0.1UF/10V 204
2
M_A_DQS#3 DQS#2 DQ57 M_A_DQ63 VTT2
62 191
M_A_DQS#4 DQS#3 DQ58 M_A_DQ58
135 193 126
M_A_DQS#5 DQS#4 DQ59 M_A_DQ61 VREFCA
152
DQS#5 DQ60
180 R2.0--1 1
VREFDQ
M_A_DQS#6 169 182 M_A_DQ60 113 M_A_WE# <4>
DQS#6 DQ61 WE#
1
M_A_DQS#7 M_A_DQ59 @
186
DQS#7 7 DQ62
192
194 M_A_DQ62 C1624 C1623
DQ63 DDR3_DIMM_204P
2.2UF/10V 0.1UF/10V
2
流
DDR3_DIMM_204P R2.0--1
M_VREFDQ_DIMM0
B H:5.2mm B
1
@
C1622 C1625
2.2UF/10V 0.1UF/10V
2
R2.0--1
交
+1.5V +1.5V_DDR3
JP1601 +0.75VS
3MM_OPEN_5MIL +1.5V_DDR3
1 2
1 2
1
+
CE1603
1
@ @
220UF/4V C1616 C1617 C1618 C1619
2
@ 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V
纸
2
2
ESR=40mOhm/Ir=1.9A
R2.0--1
+1.5V_DDR3
Layout Note: Place these caps near SO DIMM 0
1
图
@ @ @ @
C1609 C1610 C1611 C1612 C1613 C1620
10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V
2
R2.0--1
A A
Title : DDR3(1)_SO-DIMM0
Engineer: Kenny Wu
www.vinafix.vn
BU2/RD1
C G60J 1.4
5 4 3 2 1
5 4 3 2 1
+1.5V +1.5V <3,6,16,57,69,83>
+1.5V_DDR3 +1.5V_DDR3 <16,18>
+0.75VS +0.75VS <16,57,83>
+3VS +3VS <29,48,80,91,92>
8
2
D D
5
J1701B
RX1704
M_B_DQ[63:0] <4>
<3,16> PM_EXTTS#0 2 1 198 2
EVENT# VSS1
3
0Ohm @ VSS2
8
0
VSS3
<4> M_B_A[15:0] J1701A 207 9
M_B_DQ1 GND1 VSS4
5 208 13
DQ0 M_B_DQ0 GND2 VSS5
7 14
M_B_A0 DQ1 M_B_DQ7 VSS6
98 15 19
M_B_A1 A0 DQ2 M_B_DQ6 VSS7
97 17 77 20
A1 DQ3 NC1 VSS8
7
M_B_A2 96 4 M_B_DQ4 122 25
M_B_A3 A2 DQ4 M_B_DQ5 NC2 VSS9
95 6 26
M_B_A5
92
91
A4 0 DQ6
16
18 M_B_DQ3
205
206
NP_NC1 VSS11
31
32
M_B_A6 A5 DQ7 M_B_DQ12 NP_NC2 VSS12
90 21 37
86 23 <4> M_ODT2 116 38
6
M_B_A8 A7 DQ9 M_B_DQ15 ODT0 VSS14
89 33 <4> M_ODT3 120 43
M_B_A9 A8 DQ10 M_B_DQ13 ODT1 VSS15
85 35 44
107 22 48
M_B_A11 A10/AP DQ12 M_B_DQ10 VSS17
84 24 <4> M_B_RAS# 110 49
M_B_A12 A11 DQ13 M_B_DQ11 RAS# VSS18
M_CLK_DDR2 M_B_A13
83
119
A12/BC# 1 DQ14
34
36 M_B_DQ14
<3,16> M_DRAMRST# 30
RESET# VSS19
54
55
2
A13 DQ15 VSS20
1
1% M_B_A14 80 39 M_B_DQ16 114 60

A14 DQ16 <4> M_CS#2 S#0 VSS21
1
C1720 R1707 M_B_A15 78 41 M_B_DQ21 121 61

A15 DQ17 <4> M_CS#3 S#1 VSS22
10PF/50V 150Ohm 51 M_B_DQ19 65
@ @ DQ18 M_B_DQ23 VSS23
53 2 1 197 66
2
M_CLK_DDR#2 DQ19 M_B_DQ20 R1705 10KOhm SA0 VSS24

<4> M_B_BS0 109 40 SMBus Slave Address: A4H 201 71
2
BA0 DQ20 SA1 VSS25
5
108 42 M_B_DQ17 +3VS 2 1 72
<4> M_B_BS1 BA1 DQ21 VSS26
M_B_DQ22 R1706 10KOhm
M_CLK_DDR3
<4> M_B_BS2 79
BA2 2 DQ22
50
52 M_B_DQ18 202
VSS27
127
128
DQ23 <7,16,28,29,38,44,53,69> SMB_CLK_S SCL VSS28
1
1% 57 M_B_DQ29 200 133

DQ24 <7,16,28,29,38,44,53,69> SMB_DAT_S SDA VSS29
1
C1721 R1708 59 M_B_DQ24 134

10PF/50V 150Ohm DQ25 M_B_DQ26 VSS30
C
<4> M_B_CAS# 115 67 138 C
2
@ @ CAS# DQ26 M_B_DQ31 VSS31
<4> M_CLK_DDR#2 103 69 125 139
2
M_CLK_DDR#3 CK#0 DQ27 M_B_DQ28 TEST VSS32

<4> M_CLK_DDR#3 104 56 144
2
CK#1 DQ28 M_B_DQ25 VSS33

<4> M_CLK_DDR2 101 58 145
CK0 DQ29 M_B_DQ27 VSS34
<4> M_CLK_DDR3 102
CK1 3 DQ30
68
M_B_DQ30
75
VDD1 VSS35
150
PLACE CLOSE TO SODIMM <4> M_CKE2 73
74
CKE0 DQ31
70
129 M_B_DQ33 +1.5V_DDR3
76
81
VDD2 VSS36
151
155
<4> M_CKE3 CKE1 DQ32 VDD3 VSS37
131 M_B_DQ37 82 156
DQ33 M_B_DQ35 VDD4 VSS38
<4> M_B_DM[7:0]
M_B_DM0 DQ34
141
M_B_DQ38
Layout Note: Place these caps near SO DIMM 1 87
VDD5 VSS39
161
11 143 88 162
M_B_DM1 DM0 DQ35 M_B_DQ36 VDD6 VSS40
28 130 93 167
DM1 DQ36 VDD7 VSS41
1
M_B_DM2 46 132 M_B_DQ32 94 168
DM2 DQ37 VDD8 VSS42
：
M_B_DM3 M_B_DQ39 C1705 C1706 C1707 C1708
M_B_DM4
63
136
DM3 4 DQ38
140
142 M_B_DQ34 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V
99
100
VDD9 VSS43
172
173
2
153 147 105 178
170 149 106 179
187 157 111 184
DM7 DQ42 M_B_DQ42 VDD13 VSS47
159 112 185
Q
DQ43 M_B_DQ45 +3VS VDD14 VSS48
<4> M_B_DQS[7:0] 146 117 189
M_B_DQS0 DQ44 M_B_DQ40 VDD15 VSS49
M_B_DQS1
12
29
DQS0 5 DQ45
148
158 M_B_DQ47
118
123
VDD16 VSS50
190
195
M_B_DQS2 DQS1 DQ46 M_B_DQ46 VDD17 VSS51
47 160 124 196
M_B_DQS3 DQS2 DQ47 M_B_DQ48 VDD18 VSS52
64 163
DQS3 DQ48
1
M_B_DQS4 137 165 M_B_DQ50 @
Q
M_B_DQS5 DQS4 DQ49 M_B_DQ54 C1714 C1715
154 175 199 203 +0.75VS
M_B_DQS6 DQS5 DQ50 M_B_DQ55 M_VREFCA_DIMM1 VDDSPD VTT1
171 177 2.2UF/10V 0.1UF/10V 204
2
M_B_DQS7 DQS6 DQ51 M_B_DQ52 VTT2
188 164
DQS7 DQ52 M_B_DQ53
166 126
DQ53 M_B_DQ51 VREFCA
<4> M_B_DQS#[7:0]
M_B_DQS#0 10
6 DQ54
174
176 M_B_DQ49
R2.0--1 1
VREFDQ
113
DQS#0 DQ55 WE# M_B_WE# <4>
1
M_B_DQS#1 27 181 M_B_DQ57 @
M_B_DQS#2 DQS#1 DQ56 M_B_DQ60 C1724 C1723
45 183
M_B_DQS#3 DQS#2 DQ57 M_B_DQ63 DDR3_DIMM_204P
62 191 2.2UF/10V 0.1UF/10V
2
M_B_DQS#4 DQS#3 DQ58 M_B_DQ62
135 193
M_B_DQS#5 DQS#4 DQ59 M_B_DQ58
152
DQS#5 DQ60
180 R2.0--1
流
M_B_DQS#6 169 182 M_B_DQ56
M_B_DQS#7 DQS#6 DQ61 M_B_DQ59 M_VREFDQ_DIMM1
186
DQS#7 7 DQ62
192
194 M_B_DQ61
B DQ63 B
1
DDR3_DIMM_204P @ +0.75VS
C1722 C1725
2.2UF/10V 0.1UF/10V
2
H:9.2mm
R2.0--1
1
交
@ @
C1716 C1717 C1718 C1719
1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V
2
+1.5V_DDR3
R2.0--1
1
+
CE1703
220UF/4V
@
2
纸
ESR=40mOhm/Ir=1.9A
+1.5V_DDR3
Layout Note: Place these caps near SO DIMM 1
1
图
@ @ @ @
C1709 C1710 C1711 C1712 C1713 C1726
10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V
2
R2.0--1 R2.0--1
A A
Title : DDR3(2)_SO-DIMM1
Engineer: Kenny Wu
www.vinafix.vn
BU2/RD1
C G60J 1.4
5 4 3 2 1
5 4 3 2 1
+1.5V_DDR3 +1.5V_DDR3 <16,17>
DDR3 Vref M_VREFCA_DIMM1
M_VREFDQ_DIMM1
M_VREFCA_DIMM1
M_VREFDQ_DIMM1
<17>
<17>
8
+3V +3V <24,33,43,45,57,61,64,69,91>
Intel Document Number: 400755 +5VSUS +5VSUS <27,56,81,91>
Calpella Clarksfield DDR3 SO-DIMM VREFDQ +5VA +5VA <31,56,81,82,83>
2
Platform Design Guide Change Details
D D
5
Default M1
M_VREF M_VREF_DDR3
R2.0--1 M_VREFCA_DIMM0
0
R1809 1 2 0Ohm SP1800 1 2 M_VREFCA_DIMM1
<83> M_VREF
@ R0402
SP1801 1 2
M1: Fixed SO-DIMM VREF_DQ (Default Stuffing)
7
R0402
*Option: Mount=R1801,R1802,R1803,R1804,R1809 For DDR3_VREF command & address.
Unmount=R1805,R1806,R1807,R1808,C1801 R1802,R1803 are always mount.
6
+1.5V_DDR3
M_VREFDQ_DIMM0
R2.0--1
2
2
R1807 M_VREFDQ_DIMM1
1KOHM SP1802 1 2
R0402
1
SP1803 1 2
5
@ R0402
1
C1801 R1808
0.1UF/10V 1KOHM
2
C @ C
2
R1805 1 2 0Ohm
<5> DIMM0_VREF_DQ
2
@ R1806 1 2 0Ohm
<5> DIMM1_VREF_DQ
M2 M3
M2: Programmable SO-DIMM VREFDQ on M3: Processor Generated SO-DIMM VREFDQ
：
motherboard– New Requirement – New Requirement
*Option: Mount=R1801,R1802,R1803,R1804,R1807,R1808,C1801 Option: Mount=R1802,R1803,R1805,R1806
Unmount=R1805,R1806,R1809 Unmount=R1801,R1804,R1809,R1807,R1808,C1801
Q
*Range from 600 to 900 mV
*Default startup value needs to adhere to JEDEC spec.
(power sequencing and +/-1% of Vdd/2)
Q
Note: Use voltage divider instead of I2C solution.
流
B B
交
纸
图
A A
R1.4--1
Title : DDR3(3)_CA/DQ Voltage

Engineer: Kenny Wu
www.vinafix.vn
BU2/RD1
C G60J 1.4
5 4 3 2 1
5 4 3 2 1
SMB_CLK_S3
SMB_DAT_S3
Block Diagram SB
CPU
CPU_VID0~6
ASM8272
VR_ID0~6
Voltage Regulator
2 8 D
OC UC
0 5
CLK Gen.
6 7
OC/UC pin Internal Pull Down
2
Reserved 0 ohm
5
R to bypass
C C
2 +VTT_CPU +VTT_CPU <3,6,7,25,26,27,29,32,57,82>
：
+3VS +3VS <29,48,80,91,92>
Q
CPU_VID6 2 1 SL1900 VR_VID6
<6> CPU_VID6 0402 VR_VID6 <80>
<6> CPU_VID5 0402 VR_VID5 <80>
<6> CPU_VID4 0402 VR_VID4 <80>
<6> CPU_VID3 0402 VR_VID3 <80>
<6> CPU_VID2 0402 VR_VID2 <80>
Q
<6> CPU_VID1 0402 VR_VID1 <80>
<6> CPU_VID0 0402 VR_VID0 <80>
流
B B
交
纸
图
A A
R1.4--2
Title : VID Controller

Engineer: Kenny Wu
www.vinafix.vn
BU2/RD1
C G60J 1.4
5 4 3 2 1
5 4 3 2 1
RTC battery
+RTCBAT +3VA +VCC_RTC

D2001 +1.05VS +1.05VS <26,27,57,69,91>
J2001 R2001 1
4 1KOhm 3 +VCC_RTC
SIDE2 +VCC_RTC <27>
+RTC_BAT
8
2 2 1 2
2
1
1 C2003 +3VS
1 +3VS <29,48,80,91,92>
3 BAT54C 1UF/10V
SIDE1
+1.05VM_ORG +1.05VM_ORG <27>
2
WtoB_CON_2P GND +VTT_PCH_VCCIO +VTT_PCH_VCCIO <26,27>
2
GND
GND
D 1217-001K000 +3VM_SPI +3VM_SPI <28> D
Request by CSC
5
for CMOS clear
+VCC_RTC RTCRST# RC delay function
should be 18ms~25ms
CMOS Settings JRST2001
2 1
0
Clear CMOS Shunt 2 1
R2003
1
20KOhm Open GND C2001
1
1
1% Keep CMOS (Default) 18PF/50V
JRST2001 2 X2001 R2002
1
1
7
C2004 SGL_JUMP 32.768Khz 10MOhm
2
1UF/10V 3
U2001A
2
2
C2002
18PF/50V X1_RTC B13 D33 LPC_AD0 <30,44>
4
X2_RTC RTCX1 FWH0/LAD0
2 1 D13 B33 LPC_AD1 <30,44>
6
RTCX2 FWH1/LAD1
C32 LPC_AD2 <30,44>
GND GND GND FWH2/LAD2
A32 LPC_AD3 <30,44>
RTCRST# FWH3/LAD3
C14
RTCRST#
C34 LPC_FRAME# <30,44>
SRTCRST# FWH4/LFRAME#
2 1 D17
SRTCRST# PCH_DRQ#0 T2005
A34 1
RTC
LPC
R2004 SM_INTRUDER# LDRQ0# LPC_DRQ#1 T2006
A16 F34 1
20KOhm INTRUDER# LDRQ1#/GPIO23
1
1% +VCC_RTC R2006 2 1 330KOhm A14 AB9 INT_SERIRQ <30>

INTVRMEN SERIRQ
2
JRST2002
1
1
R2005 C2005 SGL_JUMP

2
5
1MOhm 1UF/10V
@ ACZ_BCLK A30
2
HDA_BCLK
+3VS 1 2 AK7 SATA_RXN0 <51>
1
R2020 1KOhm ACZ_SYNC SATA0RXN

D29 AK6 SATA_RXP0 <51>
HDA_SYNC SATA0RXP
SATA0TXN
AK11 SATA_TXN0 <51> HDD1
C <36> SB_SPKR P1 AK9 SATA_TXP0 <51> C
2
GND GND SPKR SATA0TXP
ACZ_RST# C30
HDA_RST#
AH6 SATA_RXN1 <51>
SATA1RXN
AH5 SATA_RXP1 <51>
SATA1RXP
TPM Settings JRST2002 HDA_SYNC: Select VCCVRM 1.5V or 1.8V <36> ACZ_SDIN0_AUD G30
HDA_SDIN0 SATA1TXN
AH9 SATA_TXN1 <51> ODD
AH8 SATA_TXP1 <51>
+3VS T2007 ACZ_SDIN1_MDC SATA1TXP
Clear ME RTC Shunt 1 F30
HDA_SDIN1
AF11
Registers E32
SATA2RXN
AF9
<70> ACZ_SDIN2_VGA
IHDA
HDA_SDIN2 SATA2RXP
Keep ME RTC Open SATA2TXN
AF7
2
Registers (Default) F32 AF6
HDA_SDIN3 SATA2TXP
：
R2030
10KOhm AH3
EDS 1.0: SATA port2,port3 may not be available in all PCH SKUs.
@ ACZ_SDOUT SATA3RXN
T2001 B29 AH1
HDA_SDO SATA3RXP
AF3
1
SATA3TXN
AF1
HDA_DOCK_EN# SATA3TXP
H32
SATA
1
Q
HDA_DOCK_EN#/GPIO33
AD9 SATA_RXN4 <51>
RNX2000A ACZ_BCLK 3 DGPU_PWR_EN_R SATA4RXN
<36> ACZ_BCLK_AUD 1 33OHM 2 D 1 J30 AD8 SATA_RXP4 <51>
RNX2000B ACZ_SYNC T2002 HDA_DOCK_RST#/GPIO13 SATA4RXP
<36> ACZ_SYNC_AUD 3 33OHM 4
SATA4TXN
AD6 SATA_TXN4 <51> HDD2
<36,37> ACZ_RST#_AUD 5 6 RNX2000C ACZ_RST# Q2001 AD5 SATA_TXP4 <51>
33OHM 1 SATA4TXP
<36> ACZ_SDOUT_AUD 7 8 RNX2000D ACZ_SDOUT <30> PCH_SPI_OV
33OHM 2N7002ET1G
G 1 PCH_JTAG_TCK_BUF M3 AD3
Q
SATA_RXN5 <66>
2 S T2003
JTAG_TCK SATA5RXN
AD1 SATA_RXP5 <66>
SATA5RXP
1 K3
JTAG_TMS SATA5TXN
AB3 SATA_TXN5 <66> ESATA
T2004 AB1 SATA_TXP5 <66>
RNX2001A SATA5TXP
<70> ACZ_BCLK_VGA 1 33OHM 2 1 K1
RNX2001B GND JTAG_TDI
3 4 T2008
JTAG
<70> ACZ_SYNC_VGA 33OHM +VTT_PCH_VCCIO
<70> ACZ_RST#_VGA 5 6 RNX2001C 1 J2 AF16
33OHM JTAG_TDO SATAICOMPO
<70> ACZ_SDOUT_VGA 7 8 RNX2001D T2009
33OHM
1 J4 AF15 SATA_COMP 1 37.4Ohm 2 1%
JTAG_RST# SATAICOMPI R2007
T2010
R2.0--1 +3VS
流
SB_SPICLK BA2
<28> SPI_CLK SPI_CLK
1 10KOhm 2
<28> SPI_CS#0 1 15Ohm 2 RN2003A SB_SPICS0# AV3 R2025
B SPI_CS0# B
3 4 RN2003B SB_SPICS1# AY3 T3

<28> SPI_CS#1 15Ohm SPI_CS1# SATALED# SATA_LED# <56>
R2.0--1
<28> SPI_SI SPI_MOSI AY1 Y9 SATA0GP
SPI_MOSI SATA0GP/GPIO21
SPI
<28> SPI_SO AV1 V1 SATA1GP
SPI_MISO SATA1GP/GPIO19
交
+3VM_SPI 2 @ 1
R2015 1KOhm IBEXPEAK-M
R2.0
HDA_DOCK_EN# 1 2 +3VS
R2029 @ 1KOhm
INT_SERIRQ 1 10KOhm 2
MoW_WW20_09' GND R2026
纸
SATA0GP 1 10KOhm 2
Strap information: R2027
SATA1GP 1 10KOhm 2
R2028
HDA_SPKR: No reboot strap
Low: Disable.
High:Enable
图
HDA_DOCK_EN#:
1.Flash descriptor security:
Sampled low: override
Sampled high: in effect.
A
2.GPIO33 low on the rising edge of PWROK, A
Will also disable Intel ME.
SPI_MOSI: iTPM strap.

Mount R2015: Enable
Unmount R2015: Disable(default)
Title : PCH(1)_SATA,IHDA,RTC,LPC
Engineer: Kenny Wu
www.vinafix.vn
BU2/RD1
C G60J 1.4
5 4 3 2 1
5 4 3 2 1
PCIE5: PCIE-->CB +3VSUS +3VSUS <27,30,33,34,37,53,81,82,92>
+3VS +3VS <29,48,80,91,92>
+VTT_PCH_ORG +VTT_PCH_ORG <22,26,27>
+3VSUS_ORG +3VSUS_ORG <22,24,25,27>

U2001B
8
<64> PCIE_RXN1_TV BG30 B9 EXT_SCI# EXT_SCI# <30>
PERN1 SMBALERT#/GPIO11
<64> PCIE_RXP1_TV BJ30
0.1UF/10V 2 PCIE_TXN1_TV PERP1 SCL_3A
<64> PCIE_TXN1_C 1 CX2101 BF29 H14 SCL_3A <28>
0.1UF/10V 2 PETN1 SMBCLK
<64> PCIE_TXP1_C 1 CX2102 PCIE_TXP1_TV BH29
PETP1
2
C8 SDA_3A SDA_3A <28>
SMBDATA
<53> PCIE_RXN2_WLAN AW30
D PERN2 D
<53> PCIE_RXP2_WLAN BA30
0.1UF/10V 2 PCIE_TXN2_WLAN PERP2 SML0ALERT#
<53> PCIE_TXN2_C 1 CX2103 BC30 J14 1 T2106
0.1UF/10V 2 PETN2 SML0ALERT#/GPIO60
<53> PCIE_TXP2_C 1 CX2104 PCIE_TXP2_WLAN BD30
PETP2 SML0_CLK T2107
C6 1
5
SML0CLK
AU30
SMBus
<43> PCIE_RXN3_NEWCARD PERN3
AT30 G8 SML0_DAT 1 T2108
<43> PCIE_RXP3_NEWCARD PERP3 SML0DATA
<43> PCIE_TXN3_C 0.1UF/10V 2 1 CX2105 PCIE_TXN3_NEWCARD AU32
0.1UF/10V 2 PETN3
<43> PCIE_TXP3_C 1 CX2106 PCIE_TXP3_NEWCARD AV32
PETP3 SML1ALERT# T2105
M14 1
SML1ALERT#/GPIO74
BA32
0
PERN4 SML1_CLK
BB32 E10 SML1_CLK <28>
PERP4 SML1CLK/GPIO58
BD32
PETN4
To EC
BE32 G12 SML1_DAT SML1_DAT <28>
PETP4 SML1DATA/GPIO75
PCI-E*
<40> PCIE_RXN5_CR BF33
PERN5
7
<40> PCIE_RXP5_CR BH33 T13 CL_CLK <53>
PERP5 CL_CLK1
Controller
<40> PCIE_TXN5_C 0.1UF/16V 2 1 CX2115 PCIE_TXN5_CR BG32
0.1UF/16V 2 PETN5
1 CX2116 PCIE_TXP5_CR
R1.2--5 <40> PCIE_TXP5_C BJ32
PETP5 CL_DATA1
T11 CL_DATA <53>
Link
<33> PCIE_RXN6_GLAN BA34 T9 CL_RST# <53>
PERN6 CL_RST1#
<33> PCIE_RXP6_GLAN AW34
6
0.1UF/10V 2 PCIE_TXN6_GLAN PERP6
<33> PCIE_TXN6_C 1 CX2111 BC34
0.1UF/10V 2 PETN6
<33> PCIE_TXP6_C 1 CX2112 PCIE_TXP6_GLAN BD34
PETP6
H1 CLKREQ_PEG# <70>
PEG_A_CLKRQ#/GPIO47
AT34
PERN7
AU34
PERP7
EDS 1.0: AU36 AD43
2
PETN7 CLKOUT_PEG_A_N CLK_PCIE_PEG#_PCH <70>
PCIE7,8 may not be availiable in all PCH SKUs. AV36 AD45 CLK_PCIE_PEG_PCH <70>
PETP7 CLKOUT_PEG_A_P
BG34 AN4 CLK_DMI#_PCH <3>
PERN8 CLKOUT_DMI_N
PEG
BJ34 AN2 CLK_DMI_PCH <3>
PERP8 CLKOUT_DMI_P
BG36
PETN8
5
BJ36
PETP8
AT1
CLKOUT_DP_N/CLKOUT_BCLK1_N
AT3
CLKOUT_DP_P/CLKOUT_BCLK1_P +3VSUS_ORG
AK48
CLKOUT_PCIE0N
AK47
CLKOUT_PCIE0P
From CLK BUFFER

C AW24 CLK_DMI# <29> C
2
T2101 CLK_REQ0# CLKIN_DMI_N
1 P9 BA24 CLK_DMI <29>
PCIECLKRQ0#/GPIO73 CLKIN_DMI_P
10KOhm
EXT_SCI# 1 2 R2130
CLK_PCH_SRC1_N AM43 AP3 2.2KOhm
<64> CLK_PCIE_TV#_PCH CLKOUT_PCIE1N CLKIN_BCLK_N CLK_PCH_BCLK# <29>
<64> CLK_PCIE_TV_PCH CLK_PCH_SRC1_P AM45 AP1 CLK_PCH_BCLK <29> SCL_3A 1 2 R2132
CLKOUT_PCIE1P CLKIN_BCLK_P
2.2KOhm
<64> CLKREQ1_TV# U4 SDA_3A 1 2 R2133
PCIECLKRQ1#/GPIO18
F18 CLK_DOT96# <29>
CLKIN_DOT_96N
E18 CLK_DOT96 <29> 10KOhm
CLK_PCH_SRC2_N CLKIN_DOT_96P SML1ALERT#
<53> CLK_PCIE_WLAN#_PCH AM47 1 2 R2131
CLK_PCH_SRC2_P CLKOUT_PCIE2N
<53> CLK_PCIE_WLAN_PCH AM48
CLKOUT_PCIE2P
：
AH13 CLK_SATA# <29>
CLKIN_SATA_N/CKSSCD_N SML0_CLK
<53> CLKREQ2_WLAN# N4 AH12 CLK_SATA <29> 1 2.2KOhm 2 R2140
PCIECLKRQ2#/GPIO20 CLKIN_SATA_P/CKSSCD_P
SML0_DAT 1 2.2KOhm 2 R2138 R1.2 --6
CLK_PCH_SRC3_N AH42 P41 CLK_ICH14 <29> 4.7KOhm
<43> CLK_PCIE_NEWCARD#_PCH CLKOUT_PCIE3N REFCLK14IN
<43> CLK_PCIE_NEWCARD_PCH CLK_PCH_SRC3_P AH41 SML1_CLK 1 2 R2136
Q
CLKOUT_PCIE3P
4.7KOhm
<43,44> CLKREQ3_NEWCARD# A8 J42 CLK_PCI_FB <24> AUB SML1_DAT 1 2 R2137
PCIECLKRQ3#/GPIO25 CLKIN_PCILOOPBACK
1 2
C2101 27PF/50V SML1ALERT# 1 10KOhm 2 R2142
R1.2--5
2
CLK_PCH_SRC4_N
2
AM51 AH51
<40> CLK_PCIE_CR# CLK_PCH_SRC4_P CLKOUT_PCIE4N XTAL25_IN X2101
AM53 AH53
Q
<40> CLK_PCIE_CR CLKOUT_PCIE4P XTAL25_OUT 1MOhm 25Mhz
CLKREQ4_CR# XCLK_COMP 1 R2117 2 90.9Ohm 1% R2151
1
<40> CLK_REQ4#_CB M9 AF38 +VTT_PCH_ORG
PCIECLKRQ4#/GPIO26 XCLK_RCOMP
AUB
1
R1.4--2 1 2
PCH CLKREQ Setting:
CLK_PCH_SRC5_N AJ50 T45 CLK_OUT0 R2118 47Ohm CLK_1394 <41> C2102
AUB AUB 27PF/50V
<33> CLK_PCIE_LAN# CLKOUT_PCIE5N CLKOUTFLEX0/GPIO64
CLK_PCH_SRC5_P AJ52
<33> CLK_PCIE_LAN CLKOUT_PCIE5P GND
<33> CLK_REQ5_LAN# CLK_REQ5_LAN# H6 P43 CLK_OUT1 1 T2112 R2.0 Not connected to device.
Clock Flex
PCIECLKRQ5#/GPIO44 CLKOUTFLEX1/GPIO65 +3VSUS_ORG
AK53 T42 CLK_OUT2 1 T2109 CLK_REQ0# R2126 1 2 10KOhm

CLKOUT_PEG_B_N CLKOUTFLEX2/GPIO66
流
AK51 CLKREQ_GLAN#_R R2129 1 2 10KOhm
CLKOUT_PEG_B_P
R1.4--2
T2104 1 CLKREQ_GLAN#_R P13 N50 CLK_OUT3 1 T2110
B PEG_B_CLKRQ#/GPIO56 CLKOUTFLEX3/GPIO67 B
IBEXPEAK-M
Connected to device.
Default : Clock free run. (PD 10K).
Reserver 10K PU for power saving purpose.
交
+3VS
CLKREQ1_TV# R2122 1 @ 2 10KOhm

CLKREQ2_WLAN# R2123 1 @ 2 10KOhm
+3VSUS_ORG
CLKREQ3_NEWCARD# R2124 1 @ 2 10KOhm
纸
CLK_REQ4#_CB R2127 1 2 10KOhm
@
CLK_REQ5_LAN# R2147 1 2 10KOhm
@
CLKREQ1_TV# R2145 1 2 10KOhm R1.4--2
CLKREQ2_WLAN# R2144 1 2 10KOhm
CLKREQ3_NEWCARD# R2143 1 2 10KOhm
CLK_REQ5_LAN# R2146 1 2 10KOhm
CLK_REQ4#_CB R2141 1 2 10KOhm
CLKREQ_PEG# R2139 1 2 10KOhm
图
GND
A A
Title : PCH(2)_PCIE,CLK,SMB,PEG
Engineer: Kenny Wu
www.vinafix.vn
BU2/RD1
C G60J 1.4
5 4 3 2 1
5 4 3 2 1
pre-ES1 not support

Reversal Feature
R1.2 --7
U2001C
8
BA18
+3VS FDI_RXN0
<3> DMI_RXN0 BC24 BH17
DMI0RXN FDI_RXN1
<3> DMI_RXN1 BJ22 BD16
DMI1RXN FDI_RXN2
<3> DMI_RXN2 AW20 BJ16
DMI2RXN FDI_RXN3
<3> DMI_RXN3 BJ20 BA16
DMI3RXN FDI_RXN4
BE14
FDI_RXN5
2
R2248 <3> DMI_RXP0 BD24 BA14
PM_CLKRUN# DMI0RXP FDI_RXN6
1 2 <3> DMI_RXP1 BG22 BC12
D DMI1RXP FDI_RXN7 D
8.2KOhm <3> DMI_RXP2 BA20
DMI2RXP
<3> DMI_RXP3 BG20 BB18
DMI3RXP FDI_RXP0
BF17
R2259 FDI_RXP1
<3> DMI_TXN0 BE22 BC16
5
PM_PWROK DMI0TXN FDI_RXP2
1 2 <3> DMI_TXN1 BF21 BG16
DMI1TXN FDI_RXP3
10KOhm <3> DMI_TXN2 BD20 AW16
DMI2TXN FDI_RXP4
<3> DMI_TXN3 BE18 BD14
DMI3TXN FDI_RXP5
BB14
FDI_RXP6
<3> DMI_TXP0 BD22 BD12
DMI0TXP FDI_RXP7
BH21
0
<3> DMI_TXP1 DMI1TXP
GND <3> DMI_TXP2 BC20
DMI2TXP
<3> DMI_TXP3 BD18 BJ14
DMI3TXP FDI_INT
DMI
FDI
BF13
FDI_FSYNC0
BH25
DMI_ZCOMP
7
BH13
DMI_COMP FDI_FSYNC1
+VTT_PCH_ORG 2 R2203 1 BF25
49.9Ohm 1% DMI_IRCOMP
BJ12
FDI_LSYNC0
+3VS
R1.2 --11 FDI_LSYNC1
BG14
+3VS 2 R2263 1
6
1KOhm
2
D2201 1KOhm
1SS355 R2262 R2256
0Ohm
1
+3VSUS_ORG 2 @ 1 SYS_RESET# T6 J12
<3,7> XDP_DBRESET# SYS_RESET# WAKE# PCIE_WAKE# <33,44,53>
<30,92> ALL_SYSTEM_PWRGD 2 @ 1
R2258 0Ohm M6 Y1 PM_CLKRUN# <30>
R2251 SYS_PWROK CLKRUN#/GPIO32
System Power Management

2 1
0402
5
PM_RI# 1 2
<30> PM_PWROK SL2207 B17
10KOhm PWROK
SL2200 R2.0--1
R2252 2 1
PM_BATLOW# 1 2 0402 MPWROK_R K5 P8 PM_SUS_STAT# 1 T2203
ME_PWROK MEPWROK SUS_STAT#/GPIO61
C C
8.2KOhm
2
2 @ 1
R2253 R2267 0Ohm A10 F3 SUS_CLK 1 T2204
PCIE_WAKE# LAN_RST# SUSCLK/GPIO62
1 2 GND 2 1 AUXPWROK_R
R2255 10KOhm
1KOhm
<3> H_DRAM_PWRGD D9 E4 SLP_S5# 1 T2205
DRAMPWROK SLP_S5#/GPIO63
SL2206 SL2201
<30> PM_RSMRST# 2 1 PM_RSMRST#_R C16 H7 SLP_S4#_R 2 1 PM_SUSC# <30>
0402 RSMRST# SLP_S4# 0402
R2254 SL2204 SL2202
ME_PM_SLP_M# 1 IAMT@2 <30> ME_SUSPWRDNACK 2 1 M1 P12 SLP_S3#_R 2 1 PM_SUSB# <30>
0402 SUS_PWR_ACK/GPIO30 SLP_S3# 0402
：
10KOhm R1.4--2
<7> PM_PWRBTN#_R SL2205 SL2203
R2265 <30> PM_PWRBTN# 2 1 P5 K8 SLP_M#_R 2 1 ME_PM_SLP_M#
ME_SUSPWRDNACK 0402 PWRBTN# SLP_M# 0402
1 2 R2.0--1 R2.0--1
10KOhm
<30> ME_AC_PRESENT ME_AC_PRESENT P7 N2 PM_SLP_DSW# 1 T2206
Q
R2264 ACPRESENT/GPIO31 TP23
ME_AC_PRESENT 1 2
R1.4--2 T2201 1 PM_BATLOW# A6 BJ10 PM_SYNC# <3>
10KOhm BATLOW#/GPIO72 PMSYNCH
R2266
ME_PM_SLP_LAN# 1 IAMT@2 T2202 1 PM_RI# F14 F6 ME_PM_SLP_LAN#
Q
RI# SLP_LAN# ME_PM_SLP_LAN# <57,91>
10KOhm
IBEXPEAK-M
STUFF for IAMT
流
B B
+3VS +3VS <29,48,80,91,92>
交
+VTT_PCH_ORG +VTT_PCH_ORG <21,26,27>
纸
图
A A
Title : PCH(3)_FDI,DMI,SYS PWR

Engineer: Kenny Wu
www.vinafix.vn
BU2/RD1
C G60J 1.4
5 4 3 2 1
5 4 3 2 1
+3VS +3VS <29,48,80,91,92>
R2.0--2
8
U2001D
T48 BJ46
L_BKLTEN SDVO_TVCLKINN
2
T47 BG46
L_VDD_EN SDVO_TVCLKINP
D D
Y48 BJ48
L_BKLTCTL SDVO_STALLN
BG48
SDVO_STALLP
AB48
L_DDC_CLK
Y45 BF45
5
L_DDC_DATA SDVO_INTN
BH45
T2301 L_CTRL_CLK SDVO_INTP
1 AB46
T2302 L_CTRL_DATA L_CTRL_CLK
1 V48
+3VS L_CTRL_DATA
SDVO
AP39 T51
LVD_IBG SDVO_CTRLCLK
Display Port B
AP41 T53
0
LVD_VBG SDVO_CTRLDATA
L_CTRL_CLK R2322 1 10KOhm 2 AT43
LVD_VREFH
AT42 BG44
LVD_VREFL DDPB_AUXN
BJ44
L_CTRL_DATA R2323 1 10KOhm 2 DDPB_AUXP
AU38
DDPB_HPD
7
LVDS
AV53
LVDSA_CLK#
AV51 BD42
LVDSA_CLK DDPB_0N
BC42
DDPB_0P
BB47 BJ42
LVDSA_DATA#0 DDPB_1N
Digital Display Interface

BA52 BG42
LVDSA_DATA#1 DDPB_1P
AY48 BB40
6
LVDSA_DATA#2 DDPB_2N
AV47 BA40
LVDSA_DATA#3 DDPB_2P
AW38
DDPB_3N
BB48 BA38
LVDSA_DATA0 DDPB_3P
BA50
LVDSA_DATA1
AY49
LVDSA_DATA2
AV48 Y49
2
LVDSA_DATA3 DDPC_CTRLCLK
Display Port C
AB49
DDPC_CTRLDATA
AP48
LVDSB_CLK#
AP47 BE44
LVDSB_CLK DDPC_AUXN
BD44
DDPC_AUXP
5
AY53 AV40
LVDSB_DATA#0 DDPC_HPD
AT49
LVDSB_DATA#1
AU52 BE40
LVDSB_DATA#2 DDPC_0N
AT53 BD40
LVDSB_DATA#3 DDPC_0P
BF41
DDPC_1N
C AY51 BH41 C
2
LVDSB_DATA0 DDPC_1P
AT48 BD38
LVDSB_DATA1 DDPC_2N
AU50 BC38
LVDSB_DATA2 DDPC_2P
AT51 BB36
LVDSB_DATA3 DDPC_3N
BA36
DDPC_3P
AA52 U50
CRT_BLUE DDPD_CTRLCLK
AB53 U52
CRT_GREEN DDPD_CTRLDATA
AD53
CRT_RED
Display Port D
BC46
DDPD_AUXN
：
V51 BD46
CRT_DDC_CLK DDPD_AUXP
V53 AT38
CRT_DDC_DATA DDPD_HPD
BJ40
DDPD_0N
Y53 BG40
CRT_HSYNC DDPD_0P
Y51 BJ38
Q
CRT_VSYNC DDPD_1N
BG38
DDPD_1P
CRT
BF37
R2321 DDPD_2N
2 1KOHM 1 AD48 BH37
DAC_IREF DDPD_2P
AB51 BE36
0.5% CRT_IRTN DDPD_3N
DDPD_3P
BD36 R1.4--2
Q
GND IBEXPEAK-M
GND
CRB R0.9,DG R0.8: 1K+/-0.5% DisPlay Port Disable: (For discrete graphic)
Intel checklist recommand:
1.02K PD resistor to 0.5%
1. NC:
ALL
流
B B
LVDS Disable: (For discrete graphic)

1. NC:
LVDSA_DATA [3:0], LVDSA_DATA# [3:0],
交
LVDSA_CLK, LVDSA_CLK#, LVDSB_DATA [3:0],
LVDSB_DATA# [3:0], LVDSB_CLK, LVDSB_CLK#
L_VDD_EN, L_BKLTEN, L_BKLTCTL, LVD_VREFH
LVD_VREFL, LVD_IBG, LVD_VBG
2. Connected to GND:
VccALVDS,VccTX_LVDS
纸
CRT Disable: (For discrete graphic)
1. NC:
CRT_RED,CRT_GREEN,CRT_BLUE
图
CRT_HSYCN,CRT_VSYNC
2. 1-kΩ ±0.5% pull-down to GND:
DAC_IREF
A A
3. Connected to GND:
CRT_ITRN
4. Connect to +V3.3:
VCCADAC
Title : PCH(4)_DP,LVDS,CRT
Engineer: Kenny Wu
www.vinafix.vn
BU2/RD1
C G60J 1.4
5 4 3 2 1
5 4 3 2 1
+3VSUS +3VSUS <27,30,33,34,37,53,81,82,92>
+3VS +3VS <29,48,80,91,92>
+3V +3V <33,43,45,57,61,64,69,91>

R1.4--2
R1.2 --5 U2001E +V_NVRAM_VCCQ +V_NVRAM_VCCQ <26>
H40 AY9
AD0 NV_CE#0
8
N34 BD1 +3VSUS_ORG +3VSUS_ORG <21,22,25,27>
AD1 NV_CE#1
C44 AP15
AD2 NV_CE#2
A38 BD8
AD3 NV_CE#3
C36
AD4
J34 AV9
AD5 NV_DQS0
A40 BG8
AD6 NV_DQS1
2
D45
AD7
E36 AP7
D AD8 NV_DQ0/NV_IO0 D
H48 AP6
AD9 NV_DQ1/NV_IO1
E40 AT6
AD10 NV_DQ2/NV_IO2
C40 AT9
AD11 NV_DQ3/NV_IO3
M48 BB1
5
AD12 NV_DQ4/NV_IO4
M45 AV6
AD13 NV_DQ5/NV_IO5
F53 BB3
AD14 NV_DQ6/NV_IO6
M40 BA4
AD15 NV_DQ7/NV_IO7
NVRAM
M43 BE4
AD16 NV_DQ8/NV_IO8
J36 BB6
AD17 NV_DQ9/NV_IO9
K48 BD6
0
AD18 NV_DQ10/NV_IO10
F40 BB7
C42 BC8
K46 BJ8
M51 BJ6
J52 BG6
7
K51
AD24
L34 BD3
AD25 NV_ALE
F42 AY6
AD26 NV_CLE
J40
AD27
G46
AD28
F44 AU2
6
AD29 NV_RCOMP
M47
AD30
PCI
H36 AV7
AD31 NV_RB#
J50 AY8
C/BE0# NV_WR#0_RE#
G42 AY5
C/BE1# NV_WR#1_RE#
H47
2
C/BE2#
G34 AV11
C/BE3# NV_WE#_CK0
BF5
PCI_INTA# NV_WE#_CK1
G38
PCI_INTB# PIRQA#
H51
PCI_INTC# PIRQB#
B37 H18 USB_PN0 <65>
PIRQC# USBP0N
5
PCI_INTD# A44 J18 USB port(IO/B)
PIRQD# USBP0P USB_PP0 <65>
A18 USB_PN1 <65>
PCI_REQ0# USBP1N
F51
REQ0# USBP1P
C18 USB_PP1 <65> USB port(IO/B)
PCI_REQ1# A46 N20 +3VS
REQ1#/GPIO50 USBP2N USB_PN2 <52>
T2412 1 DGPU_SELECT#_R B45 P20 USB port
REQ2#/GPIO52 USBP2P USB_PP2 <52>
C PCI_REQ3# M53 J20 C
USB_PN3 <52>
2
REQ3#/GPIO54 USBP3N
USBP3P
L20 USB_PP3 <52> USB port
PCI_GNT0# F48 F20
GNT0# USBP4N USB_PN4 <64>
PCI_GNT1# K45 G20 TV turner PCI_INTG# 1 RN2401A
GNT1#/GPIO51 USBP4P USB_PP4 <64> 8.2KOHM2
T2403 1 PCI_GNT2# F36 A20 PCI_INTA# 5 RN2401C
GNT2#/GPIO53 USBP5N USB_PN5 <43> 8.2KOHM6
PCI_GNT3# H53 C20 Newcard R1.4--1 PCI_INTC# 3 RN2401B
GNT3#/GPIO55 USBP5P USB_PP5 <43> 8.2KOHM4
M22 1 T2410 PCI_STOP# 7 RN2401D
USBP6N 8.2KOHM8
PCI_INTE# B41 N22 1 T2411 PCI_PERR# 1 RN2402A
PIRQE#/GPIO2 USBP6P 8.2KOHM2
PCI_INTF# K53 B21 USB_PN7 1 T2401 PCI_LOCK# 3 RN2402B
PIRQF#/GPIO3 USBP7N 8.2KOHM4
PCI_INTG# A36 D21 USB_PP7 1 T2402 PCI_DEVSEL# 5 RN2402C
PIRQG#/GPIO4 USBP7P 8.2KOHM6
PCI_INTH# A48 H22 USB_PN8 1 T2406 PCI_SERR# 7 RN2402D
PIRQH#/GPIO5 USBP8N 8.2KOHM8
J22 USB_PP8 1 T2407 PCI_INTE# 1 RN2403A
USBP8P 8.2KOHM2
USB
：
K6 E22 PCI_IRDY# 3 RN2403B
PCIRST# USBP9N USB_PN9 <53> 8.2KOHM4
F22 WiFi/WiMax PCI_INTD# 5 RN2403C
USBP9P USB_PP9 <53> 8.2KOHM6
PCI_SERR# E44 A22 USB_PN10 1 T2404 7 RN2403D
SERR# USBP10N 8.2KOHM8
PCI_PERR# E50 C22 USB_PP10 1 T2405 PCI_REQ0# 1 RN2404A
PERR# USBP10P 8.2KOHM2
G24 USB_PN11 1 T2408 PCI_INTB# 3 RN2404B
USBP11N 8.2KOHM4
H24 USB_PP11 1 T2409 PCI_INTF# 5 RN2404C
8.2KOHM6
Q
PCI_IRDY# USBP11P PCI_REQ3# RN2404D
A42 L24 USB_PN12 <61> 7 8.2KOHM8
IRDY# USBP12N PCI_REQ1#
H44
PAR USBP12P
M24 USB_PP12 <61> BT 1 8.2KOHM2
RN2405A
PCI_DEVSEL# F46 A24 PCI_FRAME# 3 RN2405B
DEVSEL# USBP13N USB_PN13 <45> 8.2KOHM4
PCI_FRAME# C46 C24 Camera PCI_TRDY# 5 RN2405C
FRAME# USBP13P USB_PP13 <45> 8.2KOHM6
R1.2--10 PCI_INTH# 7 RN2405D
8.2KOHM8
PCI_LOCK# D49
Q
PLOCK# +3VSUS_ORG DGPU_SELECT#_R R2403
B25 2 1 10KOhm
PCI_STOP# USBRBIAS#
D41
PCI_TRDY# STOP# USBRBIAS_PN
C48 D25 1 R2411 2 GND
TRDY# USBRBIAS
change to PCI_CLK4 to sync ICS364 22.6Ohm 1% Place within 500 mils of PCH
M7
PME# RN2408A
N16 1 10KOHM 2
PLT_RST# OC0#/GPIO59 RN2408C
D5 J16 5 10KOHM 6
PLTRST# OC1#/GPIO40 RN2407A
F16 1 10KOHM 2
22Ohm 2 RX2405 CLK_DSPPCI_R OC2#/GPIO41 RN2408B
<38> CLK_DSPPCI 1 N52 L16 3 10KOHM 4
22Ohm 2 RX2401 CLK_PCI_FB_R CLKOUT_PCI0 OC3#/GPIO42 RN2407B
<21> CLK_PCI_FB 1 P53 E14 3 10KOHM 4
22Ohm 2 RX2404 CLK_KBCPCI_PCH_R CLKOUT_PCI1 OC4#/GPIO43 RN2408D
<30> CLK_KBCPCI_PCH 1 P46 G16 7 10KOHM 8
CLKOUT_PCI2 OC5#/GPIO9
流
22Ohm 2 1 RX2406 CLK_DEBUG_R P51 F12 5 RN2407C
<44> CLK_DEBUG CLKOUT_PCI3 OC6#/GPIO10 10KOHM 6
22Ohm 2 1 RX2407 CLK_DBGPCI2_R P48 T15 7 RN2407D
<44> CLK_DBGPCI2 CLKOUT_PCI4 OC7#/GPIO14 10KOHM 8
B R2.0 B
IBEXPEAK-M
10PF/50V C2403
10PF/50V C2401
10PF/50V C2402
10PF/50V C2404
10PF/50V C2405
2
@ @ @ @ @
1
交
GND GND GND GND GND
GNT0#,GNT1#: Boot BIOS Strap. GNT3#: A16 swap override Strap/

Top-Block swap override jumper
纸
Boot BIOS Strap
PCI_GNT1# PCI_GNT0# Boot BIOS Location Low=Enabled A16 swap override/

0 0 LPC Top-Block swap override
0 1 PCI
High=Default
1 0 Reserved
+3V
图
1 1 SPI (PCH)
Sampled on rising edge of PWROK.

U2401
1 A VCC 5
A PCI_GNT0# R2440 1 2 1KOhm PCI_GNT3# R2444 1 @ 2 1KOhm A
PLT_RST# PLT_RST# 2 B
PCI_GNT1# R2441 1 2 1KOhm
GND 3 GND 4 BUF_PLT_RST# <3,7,30,32,33,38,40,43,53,64,70>
Y
GND NC7SZ08P5X_NL
GND
R2413 1 @ 2 0Ohm
Title : PCH(5)_PCI,NVRAM,USB
Engineer: Kenny Wu
www.vinafix.vn
BU2/RD1
C G60J 1.4
5 4 3 2 1
5 4 3 2 1
ID0 ID1 SKU

------------------------------- U2001F
+3VS +3VS
0 0 CFD_Non-IAMT R1.2--3
T2593
8
1 Y3 AH45
0 1 CFD_IAMT BMBUSY#/GPIO0 CLKOUT_PCIE6N
AH46
T2590 DOCKING_DET# CLKOUT_PCIE6P
1 0 AUB_Non-IAMT 1 C38
TACH1/GPIO1
T2501
1 1 AUB_IAMT 1 DGPU_PWR_EN D37
TACH2/GPIO6
1
TPC26T AF48
CLKOUT_PCIE7N
MISC
2
R2536 R2538 T2592 1 XIDE_BAY_IN# J32 AF47
TACH3/GPIO7 CLKOUT_PCIE7P
D 10KOhm 10KOhm D
<30> EXT_SMI# F10
GPIO8
2
2
R1.4--4 T2594 1 PM_LANPHY_EN K9 U2 A20GATE <30>
LAN_PHY_PWR_CTRL/GPIO12 A20GATE
5
<56> BT_LED T7
PCB_ID0 GPIO15
DGPU_HOLD_RST# AA2 AM3 BCLK_CPU_N_PCH <3>
R1.2--3 SATA4GP/GPIO16 CLKOUT_BCLK0_N/CLKOUT_PCIE8N
PCB_ID1 DGPU_PWROK F38 AM1
TACH0/GPIO17 CLKOUT_BCLK0_P/CLKOUT_PCIE8P BCLK_CPU_P_PCH <3>
SL2500
0
<56> WLAN_LED Y7 BG10 PECI 2 1
SCLOCK/GPIO22 PECI H_PECI <3,30>
GPIO
0402
1
T2596 1 OC_LAN_RST# H10 T1

R2535 R2537 MEM_LED/GPIO24 RCIN# RCIN# <30>
R2.0--1
10KOhm 10KOhm GPIO 27:Enable VCCVRM,Low=disable. R1.4--4 T2595 1 VRM_EN AB12 BE10
GPIO27 PROCPWRGD H_CPUPWRGD <3,7>
CPU
@ @
Default internal pull up. V13 BD10 PM_THRMTRIP# 1 2
<53> WLAN_ON H_THRMTRIP# <3,32>
2
GPIO28 THRMTRIP# 56Ohm

R1.2--11 STP_PCI# M11 R2501
<29> STP_PCI# STP_PCI#/GPIO34
SL2501
<29> SATA_CLK_REQ# 2 1SATA_CLK_REQ#_R V6 1 2 +VTT_CPU
6
0402 SATACLKREQ#/GPIO35 56Ohm
GND GND R1.2--3 T2600 1 DGPU_PWR_EN# AB7 BA22 1 T2588 R2525
SATA2GP/GPIO36 TP1
close to U2001.BD10
DGPU_PRSNT# AB13 AW22 1 T2589
SATA3GP/GPIO37 TP2
PCB_ID0 V3 BB22 1 T2582
2
SLOAD/GPIO38 TP3
PCB_ID1 P3 AY45 1 T2584
SDATAOUT0/GPIO39 TP4
T2597 1 CLK_REQ6# H3 AY46 1 T2583
PCIECLKRQ6#/GPIO45 TP5
5
T2598 1 CLK_REQ7# F1 AV43 1 T2585
PCIECLKRQ7#/GPIO46 TP6
T2599 1 EMAIL_LED AB6 AV45 1 T2587
T2500 SDATAOUT1/GPIO48 TP7
R1.2--3
1 TEMP_ALERT# AA4 AF13 1 T2586
SATA5GP/GPIO49 TP8
C TPC26T C
2
<61> BT_ON F8 M18 TP9_PCH 1 T2563
GPIO57 TP9
N18 TP10_PCH 1 T2564
TP10
T2531 1 TP_VSS_NCTF1 A4 AJ24 TP11_PCH 1 T2566
T2532 TP_VSS_NCTF2 VSS_NCTF_1 TP11
1 A49
NCTF
VSS_NCTF_2
RSVD
T2533 1 TP_VSS_NCTF3 A5 AK41 1 T2580
1 A50
T2535 TP_VSS_NCTF5 VSS_NCTF_4 T2581
1 A52 AK42 1
1 A53
+3VSUS_ORG T2537 TP_VSS_NCTF7 VSS_NCTF_6 TP14_PCH T2565
1 B2 M32 1
VSS_NCTF_7 TP14
：
T2538 1 TP_VSS_NCTF8 B4
VSS_NCTF_8 TP15_PCH T2567
B52 N32 1
1 B53
T2541 TP_VSS_NCTF11 VSS_NCTF_10 TP16_PCH T2568
1 BE1 M30 1
1 BE53
T2543 TP_VSS_NCTF13 VSS_NCTF_12 TP17_PCH T2569
1 BF1 N30 1
Q
1 BF53
EXT_SMI# TP_VSS_NCTF15 VSS_NCTF_14 TP18_PCH
2 10KOhm 1 R2532 T2545 1 BH1 H12 1 T2570
VSS_NCTF_15 TP18
BH2
VSS_NCTF_16 TP19_PCH T2571
BH52 AA23 1
1 BH53
T2550 TP_VSS_NCTF19 VSS_NCTF_18 TP_PCH_NC1 1 T2572
1 BJ1 AB45
Q
T2551 TP_VSS_NCTF20 VSS_NCTF_19 NC_1
1 BJ2
1 BJ4 AB38
1 BJ49
1 BJ5 AB42
1 BJ50
1 BJ52 AB41
1 BJ53
1 D1 T39
+3VS T2559 TP_VSS_NCTF28 VSS_NCTF_27 NC_5
1 D2
T2560 TP_VSS_NCTF29 VSS_NCTF_28
1 D53
T2562 TP_VSS_NCTF30 VSS_NCTF_29 INT3_3V# T2579
1 E1 P6 1
VSS_NCTF_30 INIT3_3V#
流
T2561 1 TP_VSS_NCTF31 E53
VSS_NCTF_31
C10 TP_PCH_SST 1 T2577
TP24
B B
IBEXPEAK-M
DGPU_PWR_EN 2 10KOhm 1 R2539

R1.4--5 @
DGPU_HOLD_RST# 2 10KOhm 1 R2540
交
@
+3VS +3VS <29,48,80,91,92>

DGPU_PRSNT# 2 10KOhm 1 R2543
+3VSUS +3VSUS <27,30,33,34,37,53,81,82,92>
R1.2--3
+VTT_CPU +VTT_CPU <3,6,7,26,27,29,32,57,82>

R1.2--11
纸
R2506 2 1 0Ohm PWR_OK_VGA <92>
@
DGPU_PWROK R2533 2 1 10KOhm
SATA_CLK_REQ# R2531 2 1 10KOhm
R1.4--1 08'WW50 MoW
图
GND
A A
Title : PCH(6)_CPU,GPIO,MISC
Engineer: Kenny Wu
www.vinafix.vn
BU2/RD1
C G60J 1.4
5 4 3 2 1
5 4 3 2 1
U2001H
AB16
VSS[0] +1.05VS +VTT_PCH_ORG
AA19
VSS[1] VSS[80]
AK30 JP2601 5.172A
AA20 AK31 1 2
VSS[2] VSS[81] 1 2
AA22 AK32
VSS[3] VSS[82]
AM19 AK34 3MM_OPEN_5MIL 69mA +VCCA_DAC_1_2
VSS[4] VSS[83] SP2614
AA24 AK35 S0 max
VSS[5] VSS[84]
AA26 AK38 1 2 +3VS
VSS[6] VSS[85]
8
AA28 AK43
VSS[7] VSS[86]
2
AA30 AK46 R0603
VSS[8] VSS[87]
1
AA31 AK49 +VTT_PCH_ORG R2648 C2609 C2616 C2610
VSS[9] VSS[88] L2610 @
AA32 AK5 0Ohm
0.1UF/10V
10UF/6.3V
0.01UF/16V
VSS[10] VSS[89] +VTT_PCH_VCC
AB11 AK8 1.524A @ 1 2 +1.5VS
2
VSS[11] VSS[90] JP2602
AB15 AL2 S0 max
1
VSS[12] VSS[91]
2
AB23 AL52 2 1 1.524A 1KOhm/100Mhz
D
AB30
VSS[13]
VSS[14]
VSS[92]
VSS[93]
AM11
2 1
S0 max U2001G POWER D
AB31 BB44 1MM_OPEN_5MIL +VTT_PCH_VCC AB24 AE50 GND GND GND GND
VSS[15] VSS[94] VCCCORE[1] VCCADAC[1]
AB32
VSS[16] VSS[95]
AD24 AB26
VCCCORE[2] @ @ @
1
AB39 AM20 3.208A +VTT_PCH_VCCIO C2650 C2601 AB28 AE52
VSS[17] VSS[96] VCCCORE[3] VCCADAC[2]
AB43 AM22 JP2603 S0 max AD26 300mA +3VS_VCCA_LVDS
5
VSS[18] VSS[97] VCCCORE[4]
CRT
AB47 AM24 1 2 10UF/6.3V 1UF/6.3V AD28 AF53 S0 max
2
VSS[19] VSS[98] 1 2 VCCCORE[5] VSSA_DAC[1]
AB5 AM26 AF26 +3VS
VCC CORE
AB8 AM28 2MM_OPEN_5MIL AF28 AF51
VSS[21] VSS[100] VCCCORE[7] VSSA_DAC[2]
1
AC2 BA42 GND GND AF30
VSS[22] VSS[101] VCCCORE[8] SP2607
AC52 AM30 AF31
VSS[23] VSS[102] VCCCORE[9] GND
AD11 AM31 AH26
0
VSS[24] VSS[103] VCCCORE[10] R0402
AD12 AM32 AH28 CFD
AD16 AM34 AH30 R2.0--1
2
AD23 AM35 AH31 AH38
VSS[27] VSS[106] VCCCORE[13] VCCALVDS
AD30 AM38 AJ30
VSS[28] VSS[107] VCCCORE[14] +1.8VS_VCCT_LVD
AD31 AM39 AJ31 AH39 GND 59mA GND
VSS[29] VSS[108] VCCCORE[15] VSSA_LVDS
7
AD32 AM42 S0 max
VSS[30] VSS[109]
AD34 AU20
VSS[31] VSS[110] +VTT_PCH_VCCDPLL_EXP
AU22 AM46 AP43
VSS[32] VSS[111] VCCTX_LVDS[1]
1
AD42 AV22 AP45
VSS[33] VSS[112] +VTT_PCH_VCCDPLL_EXP VCCTX_LVDS[2] SP2608
AD46 AM49 AT46
LVDS
VSS[34] VSS[113] VCCTX_LVDS[3]
AD49 AM7 +VTT_PCH_VCCIO 2 1 SP2605 2mA AK24 AT45 R0402
6
VSS[35] VSS[114] VCCIO[24] VCCTX_LVDS[4] CFD
AD7
VSS[36] VSS[115]
AA50 R2.0--1 S0 idle
AE2 BB10 R0402 R2.0--1
2
VSS[37] VSS[116] L2601
AE4 AN32 +VTT_PCH_ORG 2 1 1KOhm/100Mhz BJ24
VSS[38] VSS[117] VCCAPLLEXP
AF12 AN50 AB34
VSS[39] VSS[118] VCC3_3[2]
1
Y13 AN52 @ GND
VSS[40] VSS[119] +3VS_VCC_GIO
AH49 AP12 @ C2602 AN20 AB35 357mA
2
VSS[41] VSS[120] +VTT_PCH_VCCAPLL_EXP 10UF/6.3V VCCIO[25] VCC3_3[3]
AU4 AP42 AN22 S0 max
HVCMOS
2
VSS[42] VSS[121] VCCIO[26]
AF35 AP46 AN23 AD35 2 1 SP2609 +3VS
VSS[43] VSS[122] VCCIO[27] VCC3_3[4]
AP13 AP49 AN24
1
AN34 AP5 GND AN26 R0402
R2.0--1
VSS[45] VSS[124] +VTT_PCH_VCC_EXP VCCIO[29] C2613
AF45 AP8 AN28
5
AF46 AR2 +VTT_PCH_VCCIO BJ26 0.1UF/10V
2
AF49 AR52 BJ28
AF5 AT11 AT26
1
AF8 BA12 C2607 C2606 C2605 C2604 C2603 AT28 GND
AG2 AH48 AU26
VSS[51] VSS[130] VCCIO[35] +1.8VS_VCCADMI_VRM
C AG52 AT32 AU28 C
1UF/6.3V
1UF/6.3V
1UF/6.3V
1UF/6.3V
10UF/6.3V
2
2
2
AH11 AT36 AV26
AH15 AT41 AV28 AT24
VSS[54] VSS[133] VCCIO[38] VCCVRM[2]
AH16 AT47 AW26
VSS[55] VSS[134] VCCIO[39] +VTT_CPU_VCC_DMI +VTT_CPU
AH24
VSS[56] VSS[135]
AT7 AW28
VCCIO[40]
61mA
DMI
AH32 AV12 BA26 AT16 S0 max
VSS[57] VSS[136] VCCIO[41] VCCDMI[1]
AV18 AV16 BA28 2 1 SP2610
VSS[58] VSS[137] GND VCCIO[42]
AH43 AV20 BB26 AU16
VSS[59] VSS[138] VCCIO[43] VCCDMI[2]
1
C2648 R0402 +VTT_PCH_ORG
AH47
VSS[60] VSS[139]
AV24 BB28
VCCIO[44] R2.0--1
AH7 AV30 BC26
PCI E*
AJ19 AV34 BC28 1UF/6.3V 1 0Ohm 2
2
VSS[62] VSS[141] VCCIO[46] R2643
AJ2 AV38 BD26
：
AJ20 AV42 BD28 @
VSS[64] VSS[143] VCCIO[48] GND
AJ22 AV46 BE26 AM16
VSS[65] VSS[144] +VTT_PCH_VCCAPLL_FDI VCCIO[49] VCCPNAND[1]
AJ23 AV49 BE28 AK16
VSS[66] VSS[145] VCCIO[50] VCCPNAND[2]
AJ26 AV5 BG26 AK20
AJ28
VSS[68] VSS[147]
AV8 R2.0--2 BG28
VCCIO[52] VCCPNAND[4]
AK19
+V_NVRAM_VCCPNAND +V_NVRAM_VCCQ
AJ32 AW14 +VTT_PCH_ORG L2605 2 1 1KOhm/100Mhz BH27 AK15 156mA
Q
AJ34 AW18 AK13 S0 max
VSS[70] VSS[149] VCCPNAND[6]
1
AT5 AW2 +3VM 2 0Ohm 1 AN30 AM12 2 1 SP2611
NAND / SPI
AJ4 BF9 C2608 R2645 AN31 AM13
1
AK12 AW32 10UF/6.3V @ AM15 R0402
2
VSS[73] VSS[152] +3VS_VCCA3GBG VCCPNAND[9] C2614
AM41 AW36
VSS[74] VSS[153]
AN19 AW40 2 1 SP2604 AN35 0.1UF/10V
Q
+3VS
2
VSS[75] VSS[154] GND VCC3_3[1]
AK26 AW52
VSS[76] VSS[155] R0402
AK22
VSS[77] VSS[156]
AY11 R2.0--1
AK23 AY43 +VCCAFDI_VRM AT22 GND
VSS[78] VSS[157] VCCVRM[1] +3VS
AK28 AY47
VSS[79] VSS[158] +VTT_PCH_VCCDPLL_FDI +3VM_VCCPEP
BJ18
VCCFDIPLL VCCME3_3[1]
AM8 85mA
IBEXPEAK-M AM9 S0 max
VCCME3_3[2]
FDI
+VTT_PCH_VCCIO 2 1 SP2613 AM23 AP11 2 1 SP2612
VCCIO[1] VCCME3_3[3]
AP9
VCCME3_3[4]
1
GND GND R0402 R0402 +3VM
C2615 R2.0--1
R1.2--11 0.1UF/10V 1 0Ohm 2
2
流
IBEXPEAK-M R2644
@
GND
B B
R2.0--2
+1.5VS +VTT_PCH_1.5VS_1.8VS +VCCAFDI_VRM
R2619 2 @ 1 0Ohm 2 1 SP2601

+1.8VS +1.8VS_VCCADMI_VRM
交
R0402
2 1 SP2600 2 1 SP2602 +1.05VS +1.05VS <27,57,69,91>

+VTT_PCH_ORG R0402 R0402
R2.0--1 R2.0--1 +VTT_PCH_VCCIO +VTT_PCH_VCCIO <20,27>
R2646 2 @ 1 0Ohm +VTT_PCH_ORG +VTT_PCH_ORG <21,22,27>
+VTT_CPU +VTT_CPU <3,6,7,25,27,29,32,57,82>
+1.8VS +1.8VS <6,38,57,70,85>
纸
+1.8VS +V_NVRAM_VCCQ +1.5VS +1.5VS <43,53,57,64,91>
+3VS +3VS <29,48,80,91,92>

2 1 SP2603
R1.4--5
R0402 +V_NVRAM_VCCQ +V_NVRAM_VCCQ
图
A A
Title : PCH(7)_POWER,GND
Engineer: Kenny Wu
www.vinafix.vn
BU2/RD1
C G60J 1.4
5 4 3 2 1
5 4 3 2 1
U2001I
AY7
VSS[159] VSS[259]
H49 1.998A+344mA
L2704 52mA +VTT_PCH_VCCA_CLK
B11
VSS[160] VSS[260]
H5 S0 max R2.0--2
B15 J24 1KOhm/100Mhz S0 max
VSS[161] VSS[261]
B19 K11 2 1
B23
VSS[162]
VSS[163]
VSS[262]
VSS[263]
K43 +1.05VS +1.05VM_ORG +VTT_PCH_ORG
U2001J POWER
1
B31 K47 JP2701 @ @ @ +VTT_PCH_VCCUSBCORE
VSS[164] VSS[264] C2718 C2717
B35 K7 2 1 AP51 V24 +VTT_PCH_VCCIO
VSS[165] VSS[265] 2 1 10UF/6.3V 1UF/6.3V VCCACLK[1] VCCIO[5]
B39 L14 V26
2
1
B43 L18 2MM_OPEN_5MIL AP53 Y24 C2734
VSS[167] VSS[267] +1.05VM +1.05VM_VCCAUX VCCACLK[2] VCCIO[7]
8
B47 L2 Y26
VSS[168] VSS[268] JP2705 GND GND VCCIO[8] 1UF/6.3V
B7 L22
2
VSS[169] VSS[269]
BG12 L32 2 1 +1.05VM_ORG 2 R2702 1 AF23 V28
VSS[170] VSS[270] 2 1 VCCLAN[1] VCCSUS3_3[1] +3VSUS_VCCPUSB
BB12
VSS[171] VSS[271]
L36 0Ohm @ 344mA VCCSUS3_3[2]
U28
2
BB16
VSS[172] VSS[272]
L40 2MM_OPEN_5MIL S0 max AF24
VCCLAN[2] VCCSUS3_3[3]
U26 GND 163mA
BB20 L52 R2.0--1 R2701 U24 S0 max SP2704
VSS[173] VSS[273] VCCSUS3_3[4]
2
BB24 M12 @ 0Ohm P28 2 1 +3VSUS_ORG
VSS[174] VSS[274] +3VS VCCSUS3_3[5]
BB30 M16 357mA +3VS_VCC3_3 TP_PCH_VCCDSW Y20 P26
VSS[175] VSS[275] JP2702 DCPSUSBYP VCCSUS3_3[6]
1
D D
BB34 M20 S0 max N28 C2735 R0402
1
VSS[176] VSS[276] VCCSUS3_3[7]
1
BB38
VSS[177] VSS[277]
N38 2
2 1
1
VCCSUS3_3[8]
N26 R2.0--1
BB42 M34 C2751 AD38 M28 0.1UF/10V
2
VSS[178] VSS[278] 1MM_OPEN_5MIL GND 0.1UF/10V VCCME[1] VCCSUS3_3[9]
BB49 M38 M26
2
VSS[179] VSS[279] VCCSUS3_3[10]
BB5 M42 AD39 L28
USB
VSS[180] VSS[280] VCCME[2] VCCSUS3_3[11] GND
BC10 M46 L26
VSS[181] VSS[281] +3VSUS +3VSUS_ORG GND VCCSUS3_3[12]
BC14 M49 AD41 J28
VSS[182] VSS[282] JP2703 +1.1VM_VCCEPW VCCME[3] VCCSUS3_3[13]
BC18 M5 S0 max J26
VSS[183] VSS[283] VCCSUS3_3[14]
BC2 M8 2 1 +1.05VM_ORG AF43 H28
VSS[184] VSS[284] 2 1 VCCME[4] VCCSUS3_3[15]
BC22 N24 H26
0
VSS[185] VSS[285] 1MM_OPEN_5MIL VCCSUS3_3[16] +3VSUS_ORG
BC32 P11 AF41 G28
VSS[186] VSS[286] VCCME[5] VCCSUS3_3[17]
1
BC36 AD15 C2720 G26
VSS[187] VSS[287] +5VSUS +5VSUS_ORG C2700 C2702 VCCSUS3_3[18]
BC40 P22 AF42 F28
VSS[188] VSS[288] JP2704 10UF/6.3V 1UF/6.3V VCCME[6] VCCSUS3_3[19]
BC44 P30 F26
2
VSS[189] VSS[289] 22UF/6.3V VCCSUS3_3[20]
BC52 P32 2 1 V39 E28
VSS[190] VSS[290] 2 1 VCCME[7] VCCSUS3_3[21]
7
R2.0--1
Clock and Miscellaneous

BH9 P34 E26
VSS[191] VSS[291] 1MM_OPEN_5MIL GND VCCSUS3_3[22]
BD48 P42 V41 C28
1
BD49 P45 GND @
GND C26 +3VS
VSS[193] VSS[293] VCCSUS3_3[24]
1
BD5 P47 V42 B27 C2737 D2701
VSS[194] VSS[294] VCCME[9] VCCSUS3_3[25] BAT54C
BE12 R2 A28
VSS[195] VSS[295] VCCSUS3_3[26] 0.1UF/10V
BE16 R52 Y39 A26
2
1
BE20 T12 C2721
VSS[197] VSS[297] +VCCPLLVRM +VTT_PCH_1.5VS_1.8VS +VTT_PCH_VCCIO
BE24 T41 Y41 U23
3
VSS[198] VSS[298] SP2700 1UF/6.3V VCCME[11] VCCSUS3_3[28] GND
BE30 T46
2
VSS[199] VSS[299]
1
BE34 T49 2 1 Y42 V23 +5VSUS_PCH_VCC5REFSUS +5VSUS_ORG
VSS[200] VSS[300] VCCME[12] VCCIO[56] 10Ohm D2702
BE38 T5
VSS[201] VSS[301] R0402 GND
BE42 T8 F24 1 R2731 2 BAT54C
2
VSS[202] VSS[302] V5REF_SUS
BE46
VSS[203] VSS[303]
U30 R2.0--1
1
BE48 U31 GND 2 1 DCPRTC V9
VSS[204] VSS[304] C2722 DCPRTC +5VS_PCH_VCC5REF C2738
BE50 U32
3
VSS[205] VSS[305] 0.1UF/10V 1UF/6.3V
BE6 U34
2
VSS[206] VSS[306]
BE8 P38 K49
VSS[207] VSS[307] V5REF +5VS
5
BF3 V11 +VTT_PCH_1.5VS_1.8VS AU24
PCI/GPIO/LPC
VSS[208] VSS[308] VCCVRM[3]
1
BF49 P16 C2739 GND
VSS[209] VSS[309]
BF51 V19 72mA J38 1 2 R2732
VSS[210] VSS[310] VCC3_3[8] 1UF/6.3V
BG18 V20 S0 max BB51
2
VSS[211] VSS[311] VCCADPLLA[1] 100Ohm
BG24 V22 +VTT_PCH_VCCA_A_DPL BB53 L38
VSS[212] VSS[312] VCCADPLLA[2] VCC3_3[9]
C BG4 V30 C
2
VSS[213] VSS[313]
BG50
VSS[214] VSS[314]
V31 73mA VCC3_3[10]
M36 GND +3VS_VCCPPCI
+3VS_VCC3_3
BH11 V32 S0 max BD51
VSS[215] VSS[315] VCCADPLLB[1]
1
BH15 V34 +VTT_PCH_VCCA_B_DPL BD53 N36 C2740
VSS[216] VSS[316] VCCADPLLB[2] VCC3_3[11]
BH19 V35
VSS[217] VSS[317] 0.1UF/10V
BH23 V38 AH23 P36
2
VSS[218] VSS[318] VCCIO[21] VCC3_3[12]
BH31 V43 AJ35
BH35 V45 AH35 U35
VSS[220] VSS[320] VCCIO[23] VCC3_3[13]
1
BH39 V46 C2723 C2724 GND
VSS[221] VSS[321]
BH43 V47 AF34
VSS[222] VSS[322] 1UF/6.3V 1UF/6.3V VCCIO[2]
BH47 V49 AD13 +3VS_VCC3_3
2
VSS[223] VSS[323] VCC3_3[14]
BH7 V5 AH34
1
：
C12 V7 +VTT_PCH_SSCVCC C2741
VSS[225] VSS[325] GND GND
C50 V8 +VTT_PCH_VCCIO AF32
VSS[226] VSS[326] VCCIO[4] 0.1UF/10V
D51 W2 AK3
2
VSS[227] VSS[327] VCCSATAPLL[1]
E12 W52 GND 2 1 +VCCSST V12 AK1
VSS[228] VSS[328] DCPSST VCCSATAPLL[2]
1
E16 Y11 C2729 C2725 +VTT_PCH_VCCAPLL L2705
VSS[229] VSS[329] 1UF/6.3V 0.1UF/10V GND 1KOhm/100Mhz
E20 Y12
Q
VSS[230] VSS[330]
E24 Y15 1 2 +VTT_PCH_ORG
2
VSS[231] VSS[331]
E30 Y19 GND 2 1+V1.05A_INT_VCCSUS Y22
VSS[232] VSS[332] DCPSUS
1
E34 Y23 C2726 AH22 @ @ @
VSS[233] VSS[333] GND 0.1UF/10V VCCIO[9] C2743 C2742
E38 Y28
VSS[234] VSS[334] 10UF/6.3V 10UF/6.3V
E42 Y30
2
VSS[235] VSS[335]
E46 Y31 P18 AT20
Q
VSS[236] VSS[336] VCCSUS3_3[29] VCCVRM[4] +VCCPLLVRM
E48 Y32
VSS[237] VSS[337] GND GND
E6 Y38 U19
SATA
VSS[238] VSS[338] VCCSUS3_3[30]
PCI/GPIO/LPC
E8 Y43 AH19
VSS[239] VSS[339] +3VA_VCCPSUS VCCIO[10] +VTT_PCH_VCC_SATA
F49 Y46 U20
VSS[240] VSS[340] SP2702 VCCSUS3_3[31]
F5 P49 AD20 +VTT_PCH_VCCIO
G10 Y5 +3VSUS_ORG 2 1 U22
VSS[242] VSS[342] VCCSUS3_3[32]
G14 Y6 AF22
1
G18 Y8 R0402
R2.0--1 C2727 C2744
VSS[244] VSS[344]
G2 P24 AD19
VSS[245] VSS[345] 0.1UF/10V VCCIO[13] 1UF/6.3V
G22 T43 V15 AF20
2
VSS[246] VSS[346] VCC3_3[5] VCCIO[14]
G32 AD51 AF19
流
G36 AT8 V16 AH20
VSS[248] VSS[348] GND VCC3_3[6] VCCIO[16] GND
G40 AD47
VSS[249] VSS[349] +3VS_VCCPCORE
G44 Y47 +3VS_VCC3_3 Y16 AB19
B VSS[250] VSS[350] VCC3_3[7] VCCIO[17] B
G52 AT12 AB20
1
AF39 AM6 C2728 AB22
H16 AT13 AD22
VSS[253] VSS[353] 0.1UF/10V VCCIO[20]
H20 AM5 2 AT18
VSS[254] VSS[354] +VTT_CPU_VCCPCPU V_CPU_IO[1]
H30 AK45 >1mA AA34 +1.05VM_ORG_R1 R0402 2 1 SP2706
CPU
VSS[255] VSS[355] VCCME[13] +1.05VM_ORG
H34 AK39 SP2703 S0 max Y34 +1.05VM_ORG_R2 R0402 2 1 SP2707
VSS[256] VSS[356] VCCME[14]
H38 AV14 +VTT_CPU 2 1 GND AU18 Y35 +1.05VM_ORG_R3 R0402 2 1 SP2708
VSS[257] VSS[366] V_CPU_IO[2] VCCME[15]
H42 AA35 +1.05VM_ORG_R4 R0402 2 1 SP2709
VSS[258] VCCME[16]
1
1
10mil trace +3VSUS_HDA
交
R0402
R2.0--1 C2731 C2730
C2752 R2.0--1 SP2705
RTC
4.7UF/6.3V 0.1UF/10V 0.1UF/10V A12 L30 2 1 +3VSUS_ORG
2
VCCRTC VCCSUSHDA
HDA
1
IBEXPEAK-M C2745 R0402
GND GND GND IBEXPEAK-M R2.0--1
2mA 1UF/6.3V
2
S0 max
+VCC_RTC
GND
1
C2733 C2732
GND GND
纸
0.1UF/10V 0.1UF/10V
2
GND GND +1.05VS +1.05VS <26,57,69,91>
+3VS +3VS <29,48,80,91,92>
+VTT_PCH_VCCA_A_DPL +VTT_PCH_ORG +VTT_PCH_ORG +VTT_PCH_ORG <21,22,26>
+VTT_CPU +VTT_CPU <3,6,7,25,26,29,32,57,82>

L2706
图
+VTT_PCH_VCCA_A_DPL 1 2 +VTT_PCH_VCCIO +VTT_PCH_VCCIO <20,26>
1
+ 1KOhm/100Mhz +3VSUS +3VSUS <30,33,34,37,53,81,82,92>

1
C2746 CE2703
1
@ +VCC_RTC
@ +VCC_RTC <20>
1UF/6.3V 220UF/4V
2
A 0Ohm ? A
R2748 +5VSUS +5VSUS <56,81,91>
ESR=40mOhm/Ir=1.9A
GND GND +5VS +5VS <30,31,37,45,46,48,50,51,56,57,70,80,91>
2
+1.05VM_ORG +1.05VM_ORG
L2707
+VTT_PCH_VCCA_B_DPL 1 2 +3VSUS_ORG +3VSUS_ORG <21,22,24,25>
1
+ 1KOhm/100Mhz +5VSUS_ORG +5VSUS_ORG

1
C2747 CE2704
+VTT_PCH_VCCA_B_DPL @ +1.05VM +1.05VM <57,69,91,92>
1UF/6.3V 220UF/4V Title : PCH(8)_POWER,GND
2
?
ESR=40mOhm/Ir=1.9A Engineer: Kenny Wu
www.vinafix.vn
GND GND BU2/RD1
C G60J 1.4
5 4 3 2 1
5 4 3 2 1
SL2613
2 1
PCH SPI ROM

+3VS 0402 +3VM_SPI
+3VS +3VS <16,17,20,21,22,23,24,25,26,27,29,30,32,36,37,40,43,44,45,46,48,50,51,53,56,57,64,65,66,69,70,80,91,92>
D2801
2 0Ohm
8
+3VM 1 1 +12VS +12VS <45,91>
+3VM_SPI +3VM_SPI R2647 3
@ 2 +12VSUS +12VSUS <81,91>
@
R2.0--2 BAT54C +3VM +3VM <26,53,57,91,92>
1
2
R2833 C2802 0Ohm 2 1 R2847 +3VM_SPI +3VM_SPI <20>
3.3KOhm R2831 0.1UF/16V
D D
3.3KOhm R2.0--1
2
1
1
U2801
1 8
5
<20> SPI_CS#0 CE# VDD
2 1 2 7 +3VM_SPI_00
<20> SPI_SO SO HOLD#
R2829 +3VM_SPI_0 3 6 SPICLK
WP# SCK SPI_CLK <20>
15Ohm 4 5 SPISI
VSS SI SPI_SI <20>
SST25VF040B-50-4C
0
(4Mb)
SPISO
+3VM_SPI +3VM_SPI
7
SMBUS Link device
SPD
2
2
@
1
R2834
3.3KOhm
@
R2832
C2803
0.1UF/16V
CLKGEN
6
@ 3.3KOhm DEBUG
2
1
1
U2802 WLAN
<20> SPI_CS#1 1 8
2 1 2
CE# VDD
SO HOLD#
7 +3VM_SPI_11 CPU XDP
R2823 +3VM_SPI_1 3 6 +12VS +3VS
2
15Ohm 4
WP# SCK
VSS SI
5 PCH XDP
@
SST25VF032B VID CONTROLLER
@ (32Mb) R2.0--1 DSP FM2010
2
5
4.7KOhm 4.7KOhm GAME LED
R2802 R2803
2
SPI FROM EC
1
C
<21> SCL_3A 6 1 SMB_CLK_S <7,16,17,29,38,44,53,69>
C
2
For EC request.
Q2801A
PCH UM6K1N
5
<21> SDA_3A 3 4 SMB_DAT_S <7,16,17,29,38,44,53,69>
Q2801B
UM6K1N
Q：
+12VSUS
2
SPI FLASH CON
Q
<30,56> SMB1_CLK 6 1 SML1_CLK <21>
@ Q2802A
SPI_CS#1 15Ohm 2 R2835 EC UM6K1N
1
PCH
5
+3VM_SPI
SPI_CS#0 15Ohm 1 2 R2836 J2801 @
@ 1 2 3 4
<30,56> SMB1_DAT SML1_DAT <21>
SPI_CS#_CON 3 4 SPICLK
SPISO 5 6 SPISI
7 Q2802B
流
UM6K1N
HEADER_2X4P_K8
B 1206-000C000 B
Put near U2801,U2802
+12VS +3VS
交
SPI Setting for layout:
2
4.7KOhm 4.7KOhm
2
R2807 R2806
1
6 1 SMB1_CLK_S <50,70>
Branch as short as possible.
Q2803A
UM6K1N CPU,VGA Thermal
纸
5
PCH
3 4 SMB1_DAT_S <50,70>
U2001
Q2803B
A UM6K1N
PCH SPI
Flash CON B U2801
图
J2801 U2802
C
A A
EC 8512
U3001
Title : PCH(9)_SPI,SMB
Engineer: Kenny Wu
www.vinafix.vn
BU2/RD1
C G60J 1.4
5 4 3 2 1
5 4 3 2 1
Reserved for new CLK GEN.

Latched Input Select
+3VS SL2901 2 1 +VDDIO_28
0402
+3VS
Pin5 desides pin17/18:
SL2902 2 1 +VDDIO_42
0402 L2902
R2.0--1 0 : Pin 17/18 = LCD_SSCG
C2904 0.1UF/16V 120Ohm/100Mhz
0Ohm 2 R2922 +3VS_VDDPCI +3VS
+VTT_CPU 1 1 2 1 2 1 : Pin 17/18 = PCIe_L0
@ C2903 0.1UF/16V
1
@ 2 0Ohm 2 R2923 R2909 @ 2 10KOhm
8
1 1 1 2 1
+3VS 10UF/10V C2927 @ C2923 C2916 C2917 C2922 +3VS_VDDPCI
L2901 10UF/10V 0.1UF/16V 0.1UF/16V 0.1UF/16V
2
120Ohm/100Mhz 33PCI3 R2907 1 2 10KOhm
1 2 +3VS_VDDPCIEX
1
U2901
1
1
2
C2921 C2919
VDDPCI1
VDDPCI2
C2925 C2924 C2901 C2902 10UF/10V 0.1UF/16V
2
D D
0.1UF/16V 10UF/10V 0.1UF/16V 0.1UF/16V 21 11 +3VS_VDD48 Pin8 desides pin43/44:
2
2
VDDPCIEX1 VDD48
28
VDDPCIEX2 +3VS_VDDREF
42
VDDPCIEX3 VDDREF
56 0 : Pin 43/44 = SRC CLK
1
34 63 STP_PCI#_R 1 0Ohm 2 R2921 STP_PCI# <25> 1 : Pin 43/44 = CPU_ITP CLK
PWRSAVE#* PCI/PCIEX_STOP# @ C2920 C2918
+3VS
R2.0--1 +3VS
50 62 STP_CPU# 10UF/10V 0.1UF/16V
2
VDDCPU CPU_STOP#
SL2900 2 1 +3VS_VDDA 45 R2933 1 @ 2 10KOhm
0402 VDDA
49
0
CPUT_L1F
1
C2907 46
C2926 C2905 C2906 24PF/50V GNDA 33PCIF4 R2908
48 R1.2--2 1 2 10KOhm
10UF/10V X1_CLK CPUC_L1F
0.1UF/16V 0.1UF/16V 2 1 58
2
X1
CLKPCHBCLK
1
52 1 2 CLK_PCH_BCLK <21>
CPUT_L0
7
X2901 RX2914 33Ohm
C2908 14.318Mhz 51 CLKPCHBCLK# 1 2 CLK_PCH_BCLK# <21> Pin9 desides pin14/15,17/18:
24PF/50V CPUC_L0 RX2915 33Ohm
2
2 1 X2_CLK 57 0 : Pin 14/15 = PCIe_L9
X2
44
CPUITPT_L2/PCIeT_L8
Pin 17/18 = 27FIX/27SS
6
43
CPUITPC_L2/PCIeC_L8
1 : Pin 14/15 = DOT_96MHz
17
27FIX/LCD_SSCGT/PCIeT_L0 PEREQ1#/PCIeT_L7
41 SATA_CLK_REQ# <25> Pin 17/18 = LCD_SSCG/PCIe_L0
PEREQ1# Control:(Byte8,R/W) +3VS
40
2
PEREQ2#/PCIeC_L7
SATACLK[bit2]: 0=Not controlled,1=controlled.
R2934 1 2 10KOhm
PCIEX6 [bit1]: 0=Not controlled,1=controlled.
39
PCIeT_L6 PCIEX0 [bit0]: 0=Not controlled,1=controlled. @
R1.2--4 18
27SS/LCD_SSCGC/PCIeC_L0
38 33PCIF5 R2910 1 2 10KOhm
PCIeC_L6
5
36 CLKDMI 1 2 CLK_DMI <21>
PCIeT_L5 RX2920 33Ohm
FSLA R2902 2 1 2.2KOhm 12 35 CLKDMI# 1 2 CLK_DMI# <21> Pin64 desides pin40/41:
FSLA/USB_48MHz PCIeC_L5 RX2919 33Ohm
C C
2
0 : Pin 40/41 = PCIe_L7
30
PCIeT_L4
1 : Pin 40/41 = PEREQ1#,PEREQ2#
31
FSLB PCIeC_L4 +3VS
16
FSLB/TEST_MODE
24 R2928 1 2 10KOhm
PCIeT_L3
25
PCIeC_L3 33PCI0 R2911 @
1 2 10KOhm
33PCI3 5
*SELPCIEX0_LCD#PCICLK3
：
22
PCIeT_L2
23
PCIeC_L2
4 19 +3VS
Q
PCICLK2 PCIeT_L1
20 R1.2--2 STP_PCI#_R 1 2
PCIeC_L1
CK-505 recommend 22ohm RX2935 10KOhm
26 SATACLK 1 2 CLK_SATA <21> STP_CPU# 1 2

SATACLKT_L RX2928 33Ohm RX2936 10KOhm
3
Q
PCICLK1 SATACLK#
27 1 2 CLK_SATA# <21>
SATACLKC_L RX2929 33Ohm
14 CLK_PCIE9 1 2 CLK_DOT96 <21>

PCIeT_L9/DOTT_96MHzL RX2930 33Ohm Reserved for R1.0 Debug
33PCI0 64 15 CLK_PCIE9# 1 2 CLK_DOT96# <21>
PCICLK0/REQ_SEL** PCIeC_L9/DOTC_96MHzL RX2931 33Ohm BCLK FSB FSLC FSLB FSLA
+3VS
133 0 0 1
2
*PEREQ3#
32 166 0 1 1
流
33PCIF5 9 R2905
*SELLCD_27#/PCICLK_F5
PEREQ4#*
33 10KOhm 200 0 1 0
B B
266 0 0 0
1
10 CLK_PWRGD
VttPWR_GD/PD#
33PCIF4 8
ITP_EN/PCICLK_F4
3
3
D +VTT_CPU
<7,16,17,28,38,44,53,69> SMB_CLK_S 54
SCLK REF1 RX2906 1 FSLC
61 2 10KOhm Q2901
REF1/FSLC/TEST_SEL REF0 RX2907 1 11
<7,16,17,28,38,44,53,69> SMB_DAT_S 55 60 2 33Ohm CLK_ICH14 <21> CLK_EN# <80>
SDATA REF0 G 2N7002
交
S 2
1
47
2
+3VS VREF R2912 R2914 R2916
1KOhm 1KOhm 1KOhm
@ @
2
2
1% FSLA
@ 1KOhm 2 FSLB
R2903 GND1 FSLC
6
GND2
13
1
GND3
1
CK505_VREF 29
GND4 R2913 R2915 R2917
37
纸
GND7 1KOhm 1KOhm 1KOhm
53
GND6
1
59 @
R2904 GND5
2
@ 330Ohm ICS9LPR362AGLF-T
1%
2
ICS9LPR364BGLF-T:06G011457011
图
R2903 R2904 R2925
363:VREF 1K 330 @
364:TURBO 10K 0
+3VS +3VS <16,17,20,21,22,23,24,25,26,27,28,30,32,36,37,40,43,44,45,46,48,50,51,53,56,57,64,65,66,69,70,80,91,92> @
364:NO TURBO
A +VTT_CPU +VTT_CPU <3,6,7,25,26,27,32,57,82> @ @ @ A
Title : CLK_ICS9LPR362
Engineer: Gary Tsai
www.vinafix.vn
BU2/RD1
C G50J 1.2
5 4 3 2 1
5 4 3 2 1
For IT8752 Power +3VA_EC
+3VACC
+3VA_EC +3VA_EC
1
+3VS
+3VA +3VA_EC C3006 C3007
10UF/10V 0.1UF/10V For +3VPLL
2
1
1
L3001
120Ohm/100Mhz @ C3003 C3004 C3005 Put beside pin 121
114
121
127
RNX3004D 10UF/10V 0.1UF/10V 0.1UF/10V
26
50
92
11
74
8
<20,44> LPC_AD0 7 47OHM 8 1 2
2
3
RNX3004C U3001 +3VACC
<20,44> LPC_AD1 5 47OHM 6 R2.0--1
3 4 RNX3004B 10 24 SL3004
VSTBY1
VSTBY2
VSTBY3
VSTBY4
VSTBY5
VCC
AVCC
VBAT
VSTBY
<20,44> LPC_AD2 47OHM LAD0 PWM0/GPA0 PWR_LED# <45,56> +3VS
1 2 RNX3004A 9 25 1 2
<20,44> LPC_AD3 47OHM LAD1 PWM1/GPA1 CHG_LED# <56> 0603
8 28 BATSEL_3S# 1 T3013
LAD2 PWM2/GPA2
1
R2.0--1 SL3002 7 29 SL3003
LAD3 PWM3/GPA3 GAME_LED_EC# <69>
1
2
2 1 CLK_KBCPCI 13 30 1 2 R2.0--1 C3001
<24> CLK_KBCPCI_PCH 0402 LPCCLK PWM4/GPA4 LCD_BL_PWM <45> 0603
6 31 C3002 0.1UF/10V
<20,44> LPC_FRAME# FAN_PWM <50>
2
D LFRAME# PWM5/GPA5 0.1UF/10V
D
<3,7,24,32,33,38,40,43,53,64,70> BUF_PLT_RST# 22 32 KB_LED# <31>
2
LPCRST#/WUI4/GPD2 PWM6/GPA6 T3007
<20> INT_SERIRQ 5
SERIRQ PWM7/GPA7
34 1 R2.0--1
LPC
15 EC_AGND EC_AGND
<25> EXT_SMI# ECSMI#/GPD4
23 108 SUSC_EC#_C 2 1
5
<21> EXT_SCI# ECSCI#/GPD3 RXD/GPB0 0402 SUSC_EC# <57,91>
126 109 SUSB_EC#_C 2 1 SL3000
<25> A20GATE GA20/GPB5 TXD/GPB1 0402 SUSB_EC# <36,43,57,91,92>
4 123 CTX0 1 T3008 SL3001
<25> RCIN#
EC_RST# 14 KBRST#/GPB6 CTX/GPB2
112
For PU / PD
<32> EC_RST# WRST# RING#/PWRFAIL#/LPCRST#/GPB7 PM_RSMRST# <22>
T3032 1PM_THERM#_EC 106 119 CRX0 1 T3010
FLRST#/WUI7/GPG0/TM CRX/GPC0
FLASH ROM
SCK 105
0
T3028 FLCLK
1 104 120 AC_IN_OC# <88>
SO FLAD3/GPG6 TMRI0/WUI2/GPC4 +3VA_EC +3VA_EC
103
SI FLAD2/SO
102 124 BAT1_IN_OC# <90>
SCE# FLAD1/SI TMRI1/WUI3/GPC6 R3027 EXP_GATE#
101 16 RFON_SW# <53,56,61> 1 10KOhm 2
T3029 FLAD0/SCE# PWUREQ#/GPC7
1 100
FLFRAME#/GPG2
7
R2.0--1 18 PWRLIMIT# R3021 1 2 47KOhm BAT1_IN_OC# R3028 1 10KOhm 2 PWRLIMIT#
RI1#/WUI0/GPD0 PWRLIMIT# <3,90>
<31> KSI0 58 21 PM_SUSC# <22>
KSI0/STB# RI2#/WUI1/GPD1 R3023
<31> KSI1 59 33 LCD_BACKOFF# <45> 1 2 47KOhm BAT2_IN_OC# R3030 1 10KOhm 2 AC_IN_OC#
KSI1/AFD# GINT/GPD5
<31> KSI2 60 47 FAN0_TACH <50>
KSI2/INIT# TACH0/GPD6 COLOREN# T3053 RN3001A SMB0_CLK +5VS
<31> KSI3 61 48 1 1 4.7KOHM 2
KSI3/SLIN# TACH1/GPD7 RN3001B SMB0_DAT RN3002A TP_CLK
<31> KSI4 62 3 4.7KOHM 4 1 4.7KOHM2
6
KSI4 VSUS_ON RN3001C SMB1_CLK RN3002B TP_DAT
<31> KSI5 63
KSI5 L80HLAT/GPE0
19 VSUS_ON <81,93> 5 4.7KOHM 6 3 4.7KOHM4 R1.4--5
64 82 EGAD RN3001D 7 8 SMB1_DAT RN3005B 3 SUSB_EC#_C
<31> KSI6 KSI6 EGAD/GPE1 4.7KOHM 4.7KOHM4
65 83 EGCS# RN3005A 1 SUSC_EC#_C
<31> KSI7 KSI7 EGCS#/GPE2 4.7KOHM2
84
GPIO
EGCLK/GPE3
<31> KSO0 36 125 PWR_SW# <56>
KSO0/PD0 PWRSW/GPE4
KBMX
37 35 BAT2_IN_OC# GND
2
<31> KSO1 KSO1/PD1 WUI5/GPE5
<31> KSO2 38 17 LID_SW# <45,56>
KSO2/PD2 LPCPD#/WUI6/GPE6
<31> KSO3 39 20 CAP_ACK# <56>
KSO3/PD3 L80LLAT/GPE7
<31> KSO4 40
KSO4/PD4 PM_SUSB# R3029 +3VS
<31> KSO5 41 1 2 100KOHM
KSO5/PD5 PM_SUSC# R3004
<31> KSO6 42 107 PM_SUSB# <22> 1 2 100KOHM
KSO6/PD6 GPG1/ID7
5
<31> KSO7 43
KSO7/PD7 VSUS_ON R3031 A20GATE
<31> KSO8 44 PM_CLKRUN# <22> 1 2 100KOHM R3025 1 10KOhm 2
KSO8/ACK# CPU_VRON R3005
<31> KSO9 45 1 2 100KOHM
KSO9/BUSY 3G_ON 1 T3054 R3026 RCIN#
<31> KSO10 46 1 10KOhm 2
KSO10/PE
<31> KSO11 51
KSO11/ERR#
C
<31> KSO12 52 93 2 @ 0Ohm1 GFX_VR_ON <91>
CAP_ACK# R3006 1 2 100KOHM C
2
KSO12/SLCT GPH0/ID0 R3062 @
<31> KSO13 53 94
KSO13 GPH1/ID1 PM_RSMRST# R3022 +3VSUS
<31> KSO14 54 95 R1.4--5 1 2 10KOhm
KSO14 GPH2/ID2 BAT_LEARN R3073 @
<31> KSO15 55 96 2 1 0Ohm SUSC_EC# <57,91>
KSO15 GPH3/ID3 HSCK R3074 @ PM_PWRBTN#
<22> PM_PWRBTN# 56 97 2 1 0Ohm SUSB_EC# <36,43,57,91,92>
R3024 1 10KOhm 2
KSO16/GPC3 GPH4/ID4 NUM_LED#
<37> OP_SD# 57 98 NUM_LED# <56>
KSO17/GPC5 GPH5/ID5 CAP_LED#
99 CAP_LED# <56>
EC_XIN GPH6/ID6
128
EC_XOUT CK32K NV_OVERT# 1 T3012
2 66
CK32KE ADC0/GPI0
ADC1/GPI1
67 SUS_PWRGD <81,92> iAMT EC strapping need to check
PS/2
<20> PCH_SPI_OV 85 68 ALL_SYSTEM_PWRGD <22,92>

T3030 PS2CLK0/GPF0 ADC2/GPI2
1 86 69 VRM_PWRGD <80,92>
PS2DAT0/GPF1 ADC3/GPI3
：
<56> EXP_GATE# EXP_GATE# 87 70 GFX_VR
PS2CLK1/GPF2 ADC4/GPI4 GFX_VR <6>
T3033 1DISTP# 88 71 ALS_AD <56> Note:
PS2DAT1/GPF3 ADC5/GPI5 KB_ID0 T3035
<31> TP_CLK 89 72 1 EXT_SMI#, EXT_SCI#, PU power plane
PS2CLK2/GPF4 ADC6/GPI6 KB_ID1 T3036
<31> TP_DAT 90 73 1
PS2DAT2/GPF5 ADC7/GPI7 depend on ICH9 GPIO.
110 76 CPU_VRON
<60> SMB0_CLK CPU_VRON <80>
Q
SMCLK0/GPB3 DAC0/GPJ0
SMBus
Battery <60> SMB0_DAT 111

SMDAT0/GPB4 DAC1/GPJ1
77 PM_PWROK <22>
<28,56> SMB1_CLK 115 78 VSET_EC <88>
SMCLK1/GPC1 DAC2/GPJ2
Thermal sensor <28,56> SMB1_DAT 116
SMDAT1/GPC2 DAC3/GPJ3
79 ISET_EC <88>
AVSS
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
<3> THRO_CPU 117

SMCLK2/GPF6 DAC4/GPJ4
80 TP_LED <31> For X'tal Note: For EC Hardware Strap For iAMT pin name
<3,25> H_PECI 2 @ 0Ohm1 118 81 1 T3044
R3072 SMDAT2/GPF7 DAC5/GPJ5
Cload=12.5PF
Q
IT8512E-L I/O Base Address AC_PRESENT
place close to EC
1
12
27
49
91
113
122
75
R3046 PM_S4_STATE#
10MOhm Note: It can be programmable by EC fireware S4_STATE_ON
EC_XIN 2 @ 1EC_XOUT PM_SLP_M#
Share Memory SLP_M_ON
EC_WLAN_PWR
X3001 Note: It can be programmable by EC fireware. MP_PWRGD
GND EC_AGND 32.768Khz AC_PRESENT
+/-20ppm/12.5PF PP Enable LAN_WOL_EN
1
C3008 R3011 for IT8512BX & IT8512CX 1 4 +3VM_PG

C3009 & C3008 for IT8512DX Note: Default Int. Pull-Low +1.5VM_+3VMCLK_PG
流
0.1UF/10V
2
SUSPWR_ACK
3
2
2
B B
C3016 C3017
GND 15PF/50V 15PF/50V
1
GND
交 +3VA_EC
纸
+3VA_EC
EGAD
EGCS#
1
R3053 R3043 C3019
3.3KOhm 3.3KOhm 0.1UF/16V
R3066 2 @ 1 0Ohm ME_SUSPWRDNACK <22>
2
R3067 2 @ 1 0Ohm ME_AC_PRESENT <22>
1
U3003
SCE# 1 8
SO SO_ROM CE# VDD ROM_HD#
2 7
SO HOLD#
图
ROM_WP# 3 6 SCK
WP# SCK SI
4 5
VSS SI
R2.0--1
SST25VF016B
(16Mb)
GND
A A
+3VA_EC +3VA_EC <32>
+3VS +3VS <16,17,20,21,22,23,24,25,26,27,28,29,32,36,37,40,43,44,45,46,48,50,51,53,56,57,64,65,66,69,70,80,91,92>
+3VSUS +3VSUS <27,33,34,37,53,81,82,92>
Title : EC_IT8512(1)
Engineer: Kenny Wu
www.vinafix.vn
BU2/RD1
C G60J 1.4
5 4 3 2 1
5 4 3 2 1
EMI
8
1 2 CN3101A @ KSO7
100PF/50V
3 4 CN3101B @ KSO0
100PF/50V
5 6 CN3101C @ KSI1
100PF/50V
7 8 CN3101D @ KSI7
100PF/50V
1 2 CN3102A @ KSO9
100PF/50V
2
D3101 @ 3 4 CN3102B @ KSI6
100PF/50V
KSO15 6 1 5 6 CN3102C @ KSI5
D 100PF/50V D
7 8 CN3102D @ KSO3
100PF/50V
KSO14 5 GND 2 1 2 CN3103A @ KSI4
100PF/50V
3 4 CN3103B @ KSI2
100PF/50V
KSO12 4 3 KSO10 5 6 CN3103C @ KSO1
5
100PF/50V
7 8 CN3103D @ KSI3
100PF/50V
PACDN045YB6 1 2 CN3104A @ KSI0
100PF/50V
3 4 CN3104B @ KSO13
100PF/50V
D3102 @ 5 6 CN3104C @ KSO5
100PF/50V
KSO7 6 1 KSI7 7 8 CN3104D @ KSO2
100PF/50V
1 2 CN3105A @ KSO4
0
100PF/50V
KSO0 5 GND 2 3 4 CN3105B @ KSO8
100PF/50V
5 6 CN3105C @ KSO6
100PF/50V
KSI1 4 3 KSO9 7 8 CN3105D @ KSO11
100PF/50V
7 8 CN3106D @ KSO15
100PF/50V
PACDN045YB6 5 6 CN3106C @ KSO14
100PF/50V
7
3 4 CN3106B @ KSO12
100PF/50V
D3103 @ 1 2 CN3106A @ KSO10
100PF/50V
KSI2 6 1 KSI6
KSI4 5 GND 2
6
KSO3 4 3 KSI5
PACDN045YB6
D3104 @
KSO8 6 1 KSO2 Keyboard
2
KSO6 5 GND 2 J3101
1 KSO15 <30>
KSO11 KSO4 1
4 3 2 KSO14 <30>
2
3 KSO12 <30>
3
5
PACDN045YB6 25 4 KSO10 <30>
SIDE1 4
5 KSO11 <30>
D3105 @ 5
6 KSO6 <30>
KSI0 KSO1 6
6 1 7 KSO8 <30>
7
8 KSO4 <30>
KSO13 GND 8
C 5 2 9 KSO2 <30> C
2
9
10 KSO5 <30>
KSO5 KSI3 10
4 3 11 KSO13 <30>
11
12 KSI0 <30>
PACDN045YB6 12
13 KSI3 <30>
13
14 KSO1 <30>
14
15 KSI2 <30>
15
16 KSI4 <30>
16
17 KSO3 <30>
17
18 KSI5 <30>
18
26 19 KSI6 <30>
SIDE2 19
20 KSO9 <30>
20
：
21 KSI7 <30>
21
22 KSI1 <30>
22
23 KSO0 <30>
23
24 KSO7 <30>
24
ZIF_CON_24P R1.4--5
Q
R2.0--1
Q
+5V J3103
5
SIDE2
1
1
2
KB_LED_MOS# 2
3
KB_LED_MOS# 3
4
D3107 @ 4
6
TP_CLK TP_DAT R3110 @ SIDE1
6 1 1 2 0Ohm
R3113 1 @ 2 0Ohm
BT_LED_CON# 5 GND 2 FPC_4P
流
CHG_LED_CON# 4 3 WLAN_LED_CON#
PACDN045YB6
B B
+5V
R1.4--5
2
交
R3105
J3102 10KOhm
<30> TP_LED 16
16
+5V 15 18
1
15 SIDE2 KB_LED_MOS#
+5VA 14
14
<56> PWR_LED_CON# 13
13
1
12 3
<56> CHG_LED_CON# 12 D
C3103 C3104 <56> BT_LED_CON# 11
0.1UF/16V 11 Q3102
0.1UF/16V <56> WLAN_LED_CON# 10
2
10 1
9 <30> KB_LED#
9 G 2N7002
8
7
8 2 S
纸
<30> TP_CLK 7
6
6
<30> TP_DAT 5
5
4
4 R1.2--12
+5VS 2 1 3
L3101 3
2 17
2 SIDE1
1
120Ohm/100Mhz 1
C3101 1
0.1UF/16V WTOB_CON_16P
2
图
Bottom Contact
TouchPAD/TP_LED
A A
+3VA_EC +3VA_EC <30,32>
+3V +3V <24,33,43,45,57,61,64,69,91>
+3VS +3VS <29,48,80,91,92>
+5VA +5VA <56,81,82,83>
+5V +5V <36,44,45,52,56,57,65,69,91> Title : EC_IT8512(2)KB, TP,FP

+5VS Engineer: Kenny Wu
www.vinafix.vn
+5VS <27,30,37,45,46,48,50,51,56,57,70,80,91> BU2/RD1
C G60J 1.4
5 4 3 2 1
5 4 3 2 1
2 8 D
0 5
Thermal Policy
6 7
+3VS
5 2
2
C C
2
10KOhm
2 1 R3206
<70> VGA_THERM#
R3200 0Ohm @
1
SL3201
<50> CPU_THERM# 2 1 CPU_VGA_THERM#
0402
R2.0--1
Force-OFF Switch
：
IT8752 has built-in level detection for
SW_FORCE_OFF#
power-on reset circuit
SW3201
1 2 2 1 +3VA_EC
1 2
Q
3 4 R3202 R3204 2 1 100KOhm
3 4
4
33Ohm 5
TP_SWITCH_4P @ UM6K1N D3202 2 1 1SS355
@ Q3202B
3
D3203 2 1 1SS355
Q
<92> FORCE_OFF# EC_RST# <30>
6
R1.2
1
Q3202A C3201
<3,7,24,30,33,38,40,43,53,64,70> BUF_PLT_RST# 2 UM6K1N Output Signal
4.7UF/6.3V
2
+VTT_CPU 3
C Q3201
2 R3201 1 1 B PMBS3904
330Ohm
E
流
@ 2
2 1 56Ohm
R3209
B B
<3,25> H_THRMTRIP#
Input Signal
交
+VTT_CPU +VTT_CPU <3,6,7,25,26,27,29,57,82>
+3VA_EC +3VA_EC <30>
+3VS +3VS <29,48,80,91,92>
纸
图
A A
Title : RST_Reset Circuit

Engineer: Kenny Wu
www.vinafix.vn
BU2/RD1
C G60J 1.4
5 4 3 2 1
5 4 3 2 1
+3VS +3VS <29,48,80,91,92>
+3VSUS +3VSUS <27,30,34,37,53,81,82,92>
2 8 D
5
AR8131:Remove C3322,C3321,L3303,L3304
AR8131:Remove R3301,C3318,C3319
AR8121:Remove C3337,R3324
AR8121:Remove L3302,C3317,R3302,C3336
SP3301
0
AR8131 with overclock: Remove R3315 +AVDDL1 R3303 2 1 2 +AVDD_VCO1
0Ohm
1
R3301 0Ohm @ R0402
1 2 C3318 close to Pin 1 AR8121:Remove R3315 C3337
@ 0.1UF/16V
2
7
要要要要要
L3302 4.7UH SP3302
1 2 +1.7_Pin1 1 2 +AVDD_VCO2
1
1
ground pad
1
C3316 C3317 C3318 R0402 C3323

@ 10UF/6.3V 1UF/10V PCIE_TXN6_C <21> R2.0--1 0.1UF/16V With overclock:Remove R3303
6
2
2
0.1UF/16V @ R3315
PCIE_TXP6_C <21>
2
2
+AVDD_CEN_LAN R2.0--1 Not overclock:Remove R3304
GND 5.1KOHM GND
CLK_PCIE_LAN <21>
GND @
CLK_PCIE_LAN# <21>
SP3300
1 2 +1.7_Pin6
2
PCIE_RXP6_GLAN <21>
+AVDD_VCO2
+AVDDL
PCIE_RXN6_GLAN <21>
1
方方方方方方方方方
R0402
R2.0--1 C3319 C3336 C3335
+DVDDL
+DVDDL
1
1
1UF/10V 0.1UF/16V
RXN
方方chip方方方
@ 0.1UF/16V PCIE Tx,Rx For AR8131: Remove R3305,R3306,C3324,C3325,C3326,Q3301
RXP
2
@ C3334
2
2
5
R2.0--1 0.1UF/16V Chip pin Tx,Rx For AR8121: Remove C3327 R3308
49
48
47
46
45
44
43
42
41
40
39
38
37
GND U3301A Q3301 close to Pin8
GND
LED_10_100n
LED_ACTn
DVDD_REG2
DVDD_REG1
AVDDL5
AVDDL4
RX_N
REFCLKN
TX_N
RX_P
REFCLKP
TX_P
R3305 0Ohm
C 1 2 +3V_LAN C
2
+3V_LAN
2
@
+1.7_Pin1 1 36 +AVDDL
LX AVDDL3 C3324 R3306
2 35 0.1UF/16V
2
BC807-25
VDD3V NOCONN 10KOhm
2
3 34 GND AR8121: Remove R3313 @ Q3301 @
E
PERSTn TESTMODE
的pin name應應 2.5V

<22,44,53> PCIE_WAKE# 4 33
+2.5_Pin5 WAKEn SMDATA +DVDDL
@ +2.5_Pin5
1
pin#5 5 32
AR8131: Remove R3314
1 B
+1.7_Pin6 VDD25V DVDDL2
6 31 C
C3327
SEL_25M VDD17 SMCLK
7 30 +AVDDL
3
0.1UF/16V
+AVDDL SEL_25MHz TWSI_DATA
2
2
1
8 29
X1_LAN VDD11_REG TWSI_CLK +DVDDL SL3302
2
R3310 @ 9 28 C3325 C3326

X2_LAN XTLO DVDDL1 CLK_REQ_LAN
4.7KOhm C3333 10 27 2 1 CLK_REQ5_LAN# <21> 0.1UF/16V @
+AVDD_VCO1 XTLI CLKREQn 0402 10UF/6.3V GND
1
2
C3332 C3331 11 26
：
1000PF/16V AVDD_REG LED_LINK1000n @ SP3303
VDD_+2.5V
1
@ 12 25 VDD_+2.5V
RBIAS AVDDH2 R2.0--1
2
1 2
AVDDH1
AVDDL1
AVDDL2
1
VDDHO
RBIAS
TRXN0
TRXN1
TRXN2
TRXN3
TRXP0
TRXP1
TRXP2
TRXP3
AR8121:Remove R3310 1UF/10V 0.1UF/16V GND
2
R3314
R0402
2
0Ohm R2.0--1
AR8131/25MHz:Remove R3310 C3333 R3311 @
GND GND 2.37KOHM AR8131-AL1E
Q
13
14
15
16
17
18
19
20
21
22
23
24
1
GND
SL3312
1
1 2
VDD_+2.5V
0402 GND
VDD_+2.5V
VDD_+2.5V
+AVDDL
+AVDDL
GND +3VSUS L3301 +3V_LAN
Q
S 2
<3,7,24,30,32,38,40,43,53,64,70> BUF_PLT_RST# 2 3 1 2
3
Q3300 80Ohm/100Mhz
G
1
1
2N7002 C3303 C3304 C3305 C3306 C3307

1
GND @ C3301 C3302

10UF/6.3V 10UF/6.3V 1UF/10V 0.1UF/16V 1UF/10V 0.1UF/16V 0.1UF/16V
2
+3V RN3301A
61
60
59
1 49.9OHM2
U3301B 3 RN3301B 1 0.1UF/25V2 CX3301A
49.9OHM4
5 RN3301C
49.9OHM6
GND12
GND11
GND10
7 RN3301D 3 0.1UF/25V4 CX3301B C3305 close to pin15

49.9OHM8 C3301 C3302 C3303 C3304 close to pin2
1 RN3302A
<34> L_TRDP0 49.9OHM2 GND
流
50 58 3 RN3302B 5 0.1UF/25V6 CX3301C
GND1 GND9 <34> L_TRDN0 49.9OHM4 GND
51 57 5 RN3302C
GND2 GND8 <34> L_TRDP1 49.9OHM6
52 56 7 RN3302D 7 0.1UF/25V8 CX3301D
49.9OHM8
+AVDDL
B GND GND3 GND7 GND <34> L_TRDN1 B
+DVDDL
<34> L_TRDP2
GND4
GND5
GND6
<34> L_TRDN2
<34> L_TRDP3
<34> L_TRDN3
AR8131-AL1E GND
53
54
55
1
C3308 C3309 C3310 C3311 C3312 C3313 C3314 C3315
C3328 1UF/10V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V
2
X2_LAN 1EXT_25/48 1
交
2 T3300 @ @
@
10PF/50V R2.0--1
X3301
For AR8131 : Remove R3309 X1_LAN 1 2 AR8121:Remove C3328 GND GND
GND
R3309 0Ohm 25Mhz AR8131/25MHz: Remove C3328 C3308 close to pin45/46
1
+1.7_Pin6 1 2 VDD_+2.5V C3329 C3330

@
27PF/50V 27PF/50V
2
纸
GND GND
R1.4--6
图
A A
Title : LAN_AR8131
Engineer: Kenny Wu
www.vinafix.vn
BU2/RD1
C G60J 1.4
5 4 3 2 1
5 4 3 2 1
2 8 D
0 5
6 7
C
5 2 C
2
Q：
STUFF for NON_IAMT
Q STUFF for IAMT R1.4-2
流
B B
SP3400
+VLAN 1 2 +3VSUS
R0402
+AVDD_CEN_LAN SL3400A
LTRLP0 1 2 L_TRLP0
D3401 @ 0603
R2.0--1
交
4
3
L_TRDP0 6 1 L_TRDN0 U3401 LX3401 LAN layout note:
1 24 L_CMT0 1 RN3401A 90Ohm/100Mhz C3411
75OHM 2
2 23 LTRLP0 @
<33> L_TRDP0
MOAT
2
SL3400B
+VLAN 5 2 LTRLM0 3
0603
4 L_TRLM0 LAN_GND
3 22 LTRLM0 GND
<33> L_TRDN0
SL3401A
GND 4 21 L_CMT1 3 RN3401B LTRLP1 L_TRLP1
75OHM 4 1
0603
2
5 20 LTRLP1
<33> L_TRDP1
L_TRDP1 4 3 L_TRDN1 U3401 J3401
纸
4
3
LX3402
90Ohm/100Mhz
IP4220CZ6 6 19 LTRLM1 @
<33> L_TRDN1
2
7 18 L_CMT2 5 RN3401C SL3401B
75OHM 6
8 17 LTRLP2 LTRLM1 3 4 L_TRLM1
<33> L_TRDP2 0603
D3402 @ SL3402A C3415
LTRLP2 1 2 L_TRLP2
L_TRDP2 6 1 L_TRDN2 9 16 LTRLM2 0603
<33> L_TRDN2
3
图
10 15 L_CMT3 7 RN3401D LX3403
75OHM 8
11 14 LTRLP3 90Ohm/100Mhz MODULAR_JACK_8P
<33> L_TRDP3
@
+VLAN 5 2 L_TRLP0 1 9
2
SL3402B L_TRLM0 1 P_GND1
2 11
LTRLM3 LTRLM2 L_TRLM2 L_TRLP1 2 NP_NC1
<33> L_TRDN3 12 13 3 4 3
GND 0603 L_TRLP2 3
A 4 A
0.1UF/16V
0.1UF/16V
0.1UF/16V
IH-008 SL3403A L_TRLM2 4

5
1UF/10V
L_TRDP3 L_TRDN3 LAN_GND LTRLP3 1 2 L_TRLP3 L_TRLM1 5

4 3 6
0603 L_TRLP3 6
7 12
7 NP_NC2
1
L_TRLM3 8 10
8 P_GND2
3
IP4220CZ6 @ @ @ LX3404
1
C3411 C3415 90Ohm/100Mhz J3401

C3401
C3402
C3403
C3404
2
1500PF/2KV 1500PF/2KV @
@
2
2
SL3403B
LTRLM3 3 4 L_TRLM3
0603
R2.0--1
Title : LAN_HVL,RJ45
Engineer: Kenny Wu
www.vinafix.vn
BU2/RD1
C G60J 1.4
5 4 3 2 1
5 4 3 2 1
2 8 D
0 5
6 7
C
5 2 C
2
Q：
Q
流
B B
交
纸
图
A A
Title : MDC_****
Engineer: Kenny Wu
www.vinafix.vn
BU2/RD1
C G60J 1.4
5 4 3 2 1
5 4 3 2 1
1 2 1%
Audio Codec R3617 20KOhm
8
Not support 3G Voice. GND_AUDIO
(Pin43/44) +5V_AUDIO
1
2
R2.0--1 @ C3610 C3608
D D
1UF/10V 0.1UF/16V
2
SPDIF HDMI <70> SPDIF2_OUT
1 R2.0--1
5
T3607 GND_AUDIO
<37> EAPD
SPDIF OUT <65> SPDIF1_OUT 2

C3639
1
1UF/10V MONO_OUT <38>
1
C3623 @
0
100PF/50V
@
48
47
46
45
44
43
42
41
40
39
38
37
2
U3601
R2.0--1
AVSS2
AVDD2
SPDIFI/EAPD
SPDIFO
JDREF
SIDE_R(port_H_R)
PIN37_VREFO
SIDE_L(Port_H_L)
LFE(Port_G_R)
CENTER(Port_G_L)
SURR_R(Port_A_R)
SURR_L(Port_A_L)
R3607 1% 2 10KOhm
1 SPDIF_JD <65> SPDIF OUT detect.
7
020J-000S000 R3618 2 5.1KOhm
1
1%
LINE2_JD <65> Jack detect
6
1 36 FRONT-R C3645 1 2 1UF/10V
DVDD FRONT_R(Port_D) AC_SPK_R <37,38>
FRONT-L C3646 2 1UF/10V
T3606
1
1
2
3
GPOI0/DMIC_CLK/SPDIFO2 FRONT_L(Port_D)
35
34 Sense_B
1 AC_SPK_L <37,38> INT Speaker
T3605 GPIO1/DMIC_DATA Sense_B R3611
4 33 1 2 63.4Ohm AC_HP_L
AC_HP_L <37>
DVSS1 AGPIO R3612 AC_HP_R
5 32 1 2 63.4Ohm
<20> ACZ_SDOUT_AUD
6
SDATA_OUT MIC1_VREFO_R
31 C3638 1 2 2.2UF/10V
AC_HP_R <37> HeadPhone Out
2
+3VS +3VS_DVDD <20> ACZ_BCLK_AUD BCLK LINE2_VREFO
7 30 MIC2_VREFOUT_660
L3602 DVSS7 MIC2_VREFO
<20> ACZ_SDIN0_AUD 1 33Ohm 2 8 29 C3636 1 2 2.2UF/10V GND_AUDIO
R3625 SDATA_IN LINE1_VREFO
1 2 9
DVDD_IO MIC1_VREFO_L
28
VREF_CODEC
MIC1_VREFOUT <65> INT MIC IN.
LINE1_R(Port_C_R)
10 27
LINE2_R(Port_E_R)
<20> ACZ_SYNC_AUD
LINE1_L(Port_C_L)
LINE2_L(Port_E_L)
MIC1_R(Port_B_R)
MIC2_R(Port_F_R)
SYNC VREF
MIC1_L(Port_B_L)
MIC2_L(Port_F_L)
120Ohm/100Mhz <20,37> ACZ_RST#_AUD 11 26
RESET# AVSS1
1
5
C3618 PC_BEEP 12 25
PCBEEP AVDD1 +5V_AUDIO
C3616 C3617
1
0.1UF/16V 0.1UF/16V 10UF/10V @ C3611 C3614
2
CD_GND
Sense_A
C3612 C3613 C3624
CD_R
C3619 1UF/10V 0.1UF/16V 0.1UF/16V 10UF/10V 10UF/10V
CD_L
2
C 22PF/50V C
2
@ 2 R2.0--1
ALC663/660-VD_GR
13
14
15
16
17
18
19
20
21
22
23
24
GND_AUDIO GND_AUDIO
R3623 2 1 10KOhm 1% 1 2
LINE IN detect. <65> LINE1_JD
C3640 1UF/10V
LINEIN_R <65>
1 2 LINEIN_L <65>
LINE IN.
R3613 2 1 20KOhm 1% Sense_A C3641 1UF/10V
<65> MIC1_JD
EXT MIC detect. MIC_IN_AC_E_L 2 1 MIC_IN_AC_E <65>
：
C3635 1UF/10V
MIC_IN_AC_E_R 2 1 EXT MIC IN.
C3637 1UF/10V
C3630 2 1 1UF/10V R2.0--1

<38> MIC_IN_AC_I
Q
INT MIC IN C3631 2 1 1UF/10V MIC2VREFOUT
MIC2_VREFOUT <38> INT MIC Vref.
Q
+5V +5V <31,44,45,52,56,57,65,69,91>
+3VS +3VS <29,48,80,91,92>
PC BEEP R3602 1 2 0Ohm
流
R3603 1 @ 2 0Ohm
B B
<20> SB_SPKR 1 2 PC_BEEP_C 1 2 PC_BEEP
R3614 47KOhm C3622 0.1UF/16V R3604 1 @ 2 0Ohm
1
R2.0--1
1
R3615 R3609 1 @ 2 0Ohm

4.7KOhm C3621
100PF/50V R3610 1 @ 2 0Ohm
2
2
交
GND_AUDIO
Audio Power
纸
FOR ADJUST MODE:
Vo=1.25*(1+R3706/R3705)
=1.25*( 1+ 100K/34.8K) = 4.84
Check for fixed type. T3602
图
+5V_AUDIO
R3624 1 2 0Ohm
<30,43,57,91,92> SUSB_EC#
U3602
1
+5V R3622 1 @ 2 0Ohm 1 5

SHDN# SET
2
GND
A 3 4 A
IN OUT 1000PF/50V
>30 mil 1 2
C3601
C3602
G923-470T1UF @
or shape C3606
C3605
C3609
1 R3606 2
2
0606-000X000
1
100KOhm
1
10UF/10V
0.1UF/16V
C3603
1
R3605
1
0.1UF/16V
0.1UF/16V
34.8KOhm
2
1UF/10V
2
R3601 Title : AUD(1)_ALC663VD

2
1 2
Engineer: Kenny Wu
www.vinafix.vn
0Ohm BU2/RD1
GND_AUDIO C G60J 1.4
5 4 3 2 1
5 4 3 2 1
+5VS +5VS_AMP
L3701 +5VS_AMP
80Ohm/100Mhz
1 2
1
C3701 C3702 C3703
8
1UF/10V 0.1UF/16V 0.1UF/16V U3701
21 Internal Speaker Conn.
2
GND5
1 20
GAIN0 GND1 GND4 DE-POP#
2 19
GND_AUDIO GND_AUDIO GND_AUDIO GAIN1 GAIN0 SHUTDOWN# INTSPKR+
3 18
GAIN1 ROUT+
2
INTSPKL+ 4 17 AMP_RIN J3701
AMP_LIN LOUT+ RIN- INTSPKR+
5 16 4 6
D LIN- VDD INTSPKR- 4 SIDE2 D
6 15 3
PVDD1 PVDD2 INTSPKR- INTSPKL+ 3
7 14 2
INTSPKL- RIN+ ROUT- INTSPKL- 2
8 13 1 5
LOUT- GND3 1 SIDE1
9 12
5
LIN+ NC WTOB_CON_4P
10 11
BYPASS GND2
1
C3704 C3705 C3706 G1431F2U
<36,38> AC_SPK_L RX3701 1 2 3KOhm AMP_L CX3701 1 2 1UF/10V AMP_LIN 1UF/10V 1UF/10V 0.22UF/16V
2
R3708 1 2 10KOhm
0
GND_AUDIO GND_AUDIO GND_AUDIO
7
<36,38> AC_SPK_R RX3702 1 2 3KOhm AMP_R CX3702 1 2 1UF/10V AMP_RIN
R3709 1 2 10KOhm
6
GND_AUDIO +5VS_AMP +5VS_AMP
Reserved for EMI
1
INTSPKL- INTSPKL+ INTSPKR- INTSPKR+
R3701 R3713
1
10KOhm 10KOhm
2
@ @
D3703 D3704 D3705 D3706
2
GAIN1 GAIN0 0603-050E101NP-LF 0603-050E101NP-LF 0603-050E101NP-LF 0603-050E101NP-LF
@ @ @ @
2
5
R3714 R3715
0Ohm 0Ohm
2
C C
2
GND_AUDIO GND_AUDIO
Gain0,Gain1 Short to GND?
：
R3706 1 2 0Ohm
+12V
Q
+3VS +3VS +3VSUS Q3704A Q3702A
1
UM6K1N UM6K1N
R3710 <36> AC_HP_R 6 1 1 6 HP1_R R3711 1 2 68OHM AC_HP_R_CON <65>
1
2.2MOhm
R3704 R3702 R3707 @
Q
10KOhm 100KOHM 10KOhm
2
2
@ MUTE_POP#
D3701
2
5
BAT54AW
1
1 Q3705B C3707
<36> EAPD
3 5 UM6K1N 0.1UF/16V <36> AC_HP_L 3 4 4 3 HP1_L R3712 1 2 68OHM AC_HP_L_CON <65>
<30> OP_SD# 2 @
4
2
6
UM6K1N Q3702B @
Q3705A Q3704B
<20,36> ACZ_RST#_AUD 1 R2.0--1 UM6K1N
3 DE-POP# 2 UM6K1N
2
1
流
D3702 R3705 1 2 0Ohm
BAT54AW
B B
交
+5VS +5VS <27,30,31,45,46,48,50,51,56,57,70,80,91>
+3VSUS +3VSUS <27,30,33,34,53,81,82,92>
+12V +12V <91>
+3VS +3VS <29,48,80,91,92>
纸
图
A A
Title : AUD(2)_AMP,JACK
Engineer: Kenny Wu
www.vinafix.vn
BU2/RD1
C G60J 1.4
5 4 3 2 1
5 4 3 2 1
D
MIC2_VREFOUT <36>
2 8 D
1
R3803
5
330Ohm
2
+1.8VS +1.8VS <6,26,57,70,85>
1
C3809
0
R3804 1UF/10V
2.2KOhm
2
2
CX3804 2 1 0.1UF/10V GND_AUDIO UNI_MIC_P <45>
1
C3807
0.01UF/16V
2
CX3805 2 1 0.1UF/10V UNI_MIC_N <45>
1
R3805 R3806
2.2KOhm 2.2KOhm
2
2
CX3806 2 1 0.1UF/10V GND_AUDIO OMNI_MIC_P <45>
1
C3808
CX3808 2 1 0.1UF/10V RX3805 2 1 10KOhm 1% +1.8VS GND_AUDIO 0.01UF/16V
<36> MONO_OUT
5
49
48
47
46
45
44
43
42
41
40
39
38
37
2
@ @ 1 2+1.8VS_FM2010 U3801 CX3807 2 1 0.1UF/10V OMNI_MIC_N <45>
L3801
GND2
NC19
NC20
NC21
NC22
NC23
NC24
NC25
NC26
VSS_CODEC
MIC0_N
MIC0_P
MIC1_P
1
CX3801 2 1 0.1UF/10V 1 RNX3800A 120Ohm/100Mhz
<36,37> AC_SPK_R 10KOHM 2
R3807
C GND_AUDIO C3801 2 1 0.1UF/16V 1 36 2.2KOhm C
2
NC6 NC11
2 35
CX3802 2 VREF MIC1_N
<36,37> AC_SPK_L 1 0.1UF/10V 3 10KOHM 4
RNX3800B CX3803 2 1 0.1UF/10V 3 34 TEST
2
LINE_IN_P TEST
4 33
NC7 NC12
1
C3802 2 1 0.1UF/16V 5 32
LINE_IN_N NC13
1
R2.0--1 R3801 C3803 6 31 PWD# GND_AUDIO

1KOhm 0.01UF/16V LINE_OUT PWD#
7 30
1% C3804 NC8 NC14
2 1 0.1UF/16V 8 29
2
VCOM NC15
9 28
2
VDD_CODEC NC16
10 27
NC9 SCK +1.8VS
11 26
XTAL_IN(CLK_IN) NC17
<36> MIC_IN_AC_I 12 25
NC10 NC18
XTAL_OUT
：
GND_AUDIO PWD# R3808 1 2 10KOhm
IRQ_ANA
RESET#
SHI_S
GND1
<24> CLK_DSPPCI 1 2 CLK_DSP SHI_S R3810 1 2 10KOhm
VDD
SDA
1KOhm
NC1
NC2
NC3
NC4
NC5
RN3801A TEST R3809 1 2 100KOhm
1
C3805 FM2010-NE
13
14
15
16
17
18
19
20
21
22
23
24
Q
4
1UF/10V
RN3801B
1KOhm
2 +1.8VS
SMB_CLK_S <7,16,17,28,29,44,53,69>
SMB_DAT_S <7,16,17,28,29,44,53,69>
GND_AUDIO
Q
BUF_PLT_RST# <3,7,24,30,32,33,40,43,53,64,70>
3
SHI_S
1
R2.0--1
C3806
0.1UF/16V
流
B B
交
纸
图
A A
Title : AUD(3)_FM2010
Engineer: Kenny Wu
www.vinafix.vn
BU2/RD1
C G60J 1.4
5 4 3 2 1
5 4 3 2 1
2 8 D
0 5
6 7
C
5 2 C
2
Q：
Q
流
B B
交
纸
图
A A
Title : AUD(4)_****
www.vinafix.vn
Custom G60J 1.4
5 4 3 2 1
5 4 3 2 1
<21> CLK_1394
R4014 @ 0OHM
SL4001
X4001 MFIO0/SDWP/MSBS/XDD7
XIN_1394 1 2 XOUT_1394
R1.2,item L1 1
0402
2
MFIO1/SDD1/ /XDD6
24.576Mhz
MFIO2/SDD0/MSD1/XDD5
1
8
C4066 C4040 MFIO3/SDD7/ /XDD4
22PF/50V 22PF/50V
2
MFIO4/SDD6/MSD5/XDD3
Closed to Chip MFIO5/SDCLK/MSD0/XDD2

+1.2VS_PCIE_CR
2
Closed to 1394 Connector GND GND
MFIO6/ /XDD1
D Co-Layout 1 2 TPBIAS0 D
C4039 MFIO7/SDD5/MSD4/XDD0
1
C4070
RN4000B 4 3 0.33UF/16V R4003 R4002 0.1UF/16V C4033 MFIO8/SDCMD/MSD2/XDWP#
5
4R8PS
56Ohm 56Ohm 10UF/6.3V
2
1% 1% MFIO9/SDD4/MSD6/XDWE#
GND GND
2
RN4000A 2 1 GND XOUT_1394 MFIO10/SDD3/MSD3/XDALE
4R8PS
XIN_1394 R4010 1 2 10Ohm XDR/B# MFIO11/SDD2/ /XDCLE
0
J4002 @ L4001 Guard GND MFIO14/MSCLK/XDR/B# R4011 1 2 10Ohm MS_CLK
5 1 LTPB0- 8 1 TPB0-_1 TPB0-_1 MFIO12/ /XDCE#
P_GND1 1 LTPB0+
2
2 LTPA0- TPB0+_1 TPB0+_1 MFIO13/MSD7/XDRE#
6
P_GND2 3
3 7 2 MFIO13/ /MSD7/XDRE#
4 LTPA0+ Common Guard GND
4 Choke
7
6 3 TPA0+_1 MFIO12/XDCE# MFIO14/ /MSCLK/XDR/B#
GND IEEE_1394_4P TPA0+_1
TPA0-_1 TPA0-_1 MFIO11/SDD2/XDCLE
12G130012043 5 4
Guard GND
1
IEEE1394 +3VS_CR
R4007 R4006 1 2
1
RN4000D 8 7 56Ohm 1% 56Ohm 1% R4005 1% 5.1KOhm C4073
4R8PS
49
48
47
46
45
44
43
42
41
40
39
38
37
GND
U4003 0.1UF/16V
2
RN4000C 6 5 2 1
TPAP0
TPAN0
TPBP0
TPBN0
PCIE_VOUT2
MFIO14
MFIO13
MFIO12
MFIO11
GND
VCC_3V_2
XI
XO
4R8PS
R2.0--1 C4067 270PF/50V GND +3VS_CARD_IC +3VS_CARD
2
GND SP4001
1 2
TPBIAS0 1 36
TPBIAS0 MF_VOUT MFIO10/SDD3/MSD3/XDALE
R0603
+3VS_CR 2 35
CR_UDIO0 AVCC_3V MFIO10 MFIO9/SDD4/MSD6/XDWE#
<21> CLK_REQ4#_CB 1 2 3 34
0402 UDIO0 MFIO09
5
SL4003 SD_CD0# 4 33 MFIO8/SDCMD/MSD2/XDWP#
MS_CD1# MFCD0# MFIO08 MFIO7/SDD5/MSD4/XDD0
5 32
CR_UDIO1 MFCD1# MFIO07 MFIO6/XDD1 R4013 1
1 6 31 2 10Ohm MSD0
+3VS +3VS_CR T4023 TPC26T CR_UDIO2 UDIO1 MFIO06 MFIO5/SDCLK/MSD0/XDD2 R4012 1 SD_CLK
1 7 30 2 10Ohm
SP4000 T4024 TPC26T CR_UDIO3 UDIO2 MFIO05 MFIO4/SDD6/MSD5/XDD3 R4009 1 XDD2
1 8 29 2 10Ohm
T4025 TPC26T UDIO3 MFIO04 MFIO3/SDD7/XDD4
C 1 2 <3,7,24,30,32,33,38,43,53,64,70> BUF_PLT_RST# 1 2 9 28 C
2
0402
SL4002 GND PERST# MFIO03 MFIO2/SDD0/MSD1/XDD5
10 27
TEST MFIO02
1
R0603 C4069 +3VS_CR 11 26 MFIO1/SDD1/XDD6

C4078 VCC_3V_1 MFIO01 MFIO0/SDWP/MSBS/XDD7
12 25
0.1UF/16V PCIE_VOUT1 MFIO00
1UF/25V +1.2VS_PCIE_CR
2
PCIE_VIN2
PCIE_VIN1
C4071
REFCLKN
REFCLKP
1
C4072
AGND
RREF
GND GND 0.1UF/16V
CPO
RXC
RXN
RXP
TXN
2
TXP
0.1UF/16V
2
GND
GND
13
14
15
16
17
18
19
20
21
22
23
24
R5U230 +1.2VS_PCIE_CR
：
+1.2VS_PCIE_CR
<21> CLK_PCIE_CR
PU:Disable SROM <21> CLK_PCIE_CR#
PD:Enable SROM
1
C4077 C4076
<21> PCIE_TXP5_C
Q
1
0.022UF/16V C4006 R4008 J4001
GND 2 1 C4036 5.1KOhm 0.1UF/16V 0.1UF/16V XDR/B# 1
2
+3VS_CR +3VS_CR 1500PF/50V MFIO13/MSD7/XDRE# XD-R/B
<21> PCIE_TXN5_C 1% 2
2
MFIO12/XDCE# XD-RE
GND GND 3
1
@ MFIO11/SDD2/XDCLE XD-CE
4
XD-CLE
2
+3VS_CR GND GND MFIO10/SDD3/MSD3/XDALE 5
Q
C4068 XD-ALE
R4033 MFIO9/SDD4/MSD6/XDWE# 6
XD-WE
2
100KOhm 1 0.1UF/16V
2 <21> PCIE_RXP5_CR C4018 2 1 0.1UF/16V PCIE_TXP_CR MFIO8/SDCMD/MSD2/XDWP# 7
R4040 R4039 C4019 2 PCIE_TXN_CR MFIO7/SDD5/MSD4/XDD0 XD-WP
<21> PCIE_RXN5_CR 1 0.1UF/16V 8
@ 10KOhm @ 10KOhm MFIO6/XDD1 XD-D0
9
1
MFIO11/SDD2/XDCLE SDD2 XD-D1

8 1 1 SL4018 2 10
CR_UDIO1 VCC A0 MFIO10/SDD3/MSD3/XDALE 0402 2 SDD3 SD-DAT2
7 2 GND 1 SL4011 11
1
CR_UDIO2 WP A1 MFIO8/SDCMD/MSD2/XDWP# 0402 2 SD-DAT3

6 3 1 SL4012 SDCMD 12
CR_UDIO3 SCL A2 0402 SD-CMD
5 4 13
SDA GND 4in1-GND1
2
+3VS_CARD 14
R4034 U4002 MS_CLK MS-VCC
15
@ 100KOhm AT24C02N MSD3 MS-SCLK
1 SL4020 2 16
MS-DATA3
流
0402 MS_CD1# 17
GND @ MS-INS
MFIO8/SDCMD/MSD2/XDWP# 1 SL4013 2 MSD2 18
1
0402 MSD0 MS-DATA2

GND 19
B
MFIO2/SDD0/MSD1/XDD5 MSD1 MS-DATA0 B
1 SL4014 2 20
MFIO0/SDWP/MSBS/XDD7 0402 MFIO0/SDWP/MSBS/XDD7_C MS-DATA1
GND 1 SL4017 2 21
0402 MS-BS
22
4in1-GND2
+3VS_CARD 23
SD_CLK SD-VCC
24
SDD0 SD-CLK
1 SL4015 2 25
0402 XDD2 SD-DAT0
26
MFIO4/SDD6/MSD5/XDD3 XD-D2
27
MFIO3/SDD7/XDD4 XD-D3
交
28
1 SL4016 2 SDD1 29
0402 MFIO2/SDD0/MSD1/XDD5 SD-DAT1
30
31
MFIO0/SDWP/MSBS/XDD7 XD-D6
32
XD-D7
+3VS_CARD 33
XD_CD# XD-VCC
34
MFIO0/SDWP/MSBS/XDD7 XD-CD-SW
35
SD_CD0# SD-WP-SW
36
SD-CD-SW
37
GROUND1
38
GROUND2
39
纸
NP_NC1
40
NP_NC2
D4012 GND CARD_READER_36P

SD_CD0# 1
3 XD_CD# 12G340003605
MS_CD1# 2
BAT54C
图
+3VS_CARD +3VS_CARD
1
C4074
A C4034 A
0.1UF/16V 10UF/6.3V
2
GND GND
put at J4002.14 put at J4002.23
Title : R5U230
Engineer: Kenny Wu
www.vinafix.vn
BU2/RD1
C G60J 1.4
5 4 3 2 1
5 4 3 2 1
+3VS +3VS <29,48,80,91,92>
2 8 D
0 5
6 7
C
5 2 C
2
Q：
Q
流
B B
交
纸
图
A A
Title : CB(2)_R5C833
Engineer: Kenny Wu
www.vinafix.vn
BU2/RD1
C G60J 1.4
5 4 3 2 1
5 4 3 2 1
+3VS +3VS <29,48,80,91,92>
+12V +12V <37,91>
2 8 D
0 5
6 7
C
5 2 C
2
Q：
Q
流
B B
交
纸
图
A A
Title : CB(3)_4in1 CardReader

Engineer: Kenny Wu
www.vinafix.vn
BU2/RD1
C G60J 1.4
5 4 3 2 1
5 4 3 2 1
@ CLKREQ3_NEWCARD# <21,44>
4 0Ohm 3 RNX4300B
NewCard Header
3
USB_P5+ 3
<24> USB_PP5 D
Q4301
3
2N7002 J4301
NWCLK_EN 11 @
8
1
90Ohm/100Mhz G USB_P5- GND1
2 29
LX4301 2 S USB_P5+ 3
USB_D- GND5
27
2
USB_D+ NP_NC1
2
<24> USB_PN5 USB_P5- CP_USB# 4
CPUSB#
@ <44> LPC_FRAME#_DBCARD 5
D4301 RESERVED1
2 0Ohm 1 6
RESERVED2
2
RNX4300A <44> SMB_CLK_R 7
SMBCLK
1 6 <44> SMB_DAT_R 8
D SMBDATA D
+1.5VS_NW 9
+1.5V_1
10
+1.5V_2
<44> WAKE#_R 11
WAKE#
+3V_NW 12
5
PE_RST# +3.3VAUX
2 5 3.0V~3.6V 13
PERST#
Ave= 1000mA +3VS_NW 14
+3VS +3VS_NW +3.3V_1
15
Max= 1300 mA +3.3V_2
<44> CLKREQ#_R 16
CLKREQ#
<44> CP_PE#_R 17
CPPE#
3 4 18
0
<21> CLK_PCIE_NEWCARD#_PCH REFCLK-
1
C4301 C4302 C4303 C4304 19
<21> CLK_PCIE_NEWCARD_PCH REFCLK+
10UF/10V 0.1UF/16V 10UF/10V 0.1UF/16V 20
IP4220CZ6 @ @ GND2
<21> PCIE_RXN3_NEWCARD 21
2
@ PERn0
<21> PCIE_RXP3_NEWCARD 22
PERp0
23
GND3
7
<21> PCIE_TXN3_C 24 28
PETn0 NP_NC2
1.35V~1.65V <21> PCIE_TXP3_C 25
PETp0 GND6
30
Ave= 500 mA 26
+1.5VS +1.5VS_NW GND4
Max= 650 mA EXPRESS_CARD_26P
6
1
1
U4301 C4305 C4306 C4307 C4308
<30,36,57,91,92> SUSB_EC# 1 19 10UF/10V 0.1UF/16V 10UF/10V 0.1UF/16V
STBY# OC# @ @
20 11 +1.5VS_NW
2
R4301 SHDN# 1.5VOUT_1
<44> PE_RST# 2 1 1KOhm 8 13
PERST# 1.5VOUT_2
2
+3VS 2
3.3VIN_1 AUXOUT
15 +3V_NW 3.0V~3.6V
4
3.3VIN_2 +3V +3V_NW Ave= 200mA NewCard Ejecter
If AUXIN use +3VSUS.
+1.5VS 14 3 +3VS_NW
Max= 275 mA
1.5VIN_1 3.3VOUT_1
5
It would leakage from AUXIN to STBY,SHDN#,PERST#. 12 5 J4302
1.5VIN_2 3.3VOUT_2
1
P_GND1
1
+3V 17 10 CP_PE# <44> C4309 C4310 2
AUXIN CPPE# CP_USB# 1UF/10V 0.1UF/16V P_GND2
9
CPUSB# NWCLK_EN @ CARD_EJECTOR_2P
<3,7,24,30,32,33,38,40,53,64,70> BUF_PLT_RST# 6 18
2
SYSRST# RCLKEN @
C 7 C
2
GND1
21 16
GND2 NC
R5538D001 R2.0--1
：
+1.5VS +1.5VS <26,53,57,64,91>
+3V +3V <24,33,45,57,61,64,69,91>
Q
+3VS +3VS <29,48,80,91,92>
Q
流
B B
交
纸
图
A A
Title : CB(4)_NewCard
Engineer: Kenny Wu
www.vinafix.vn
BU2/RD1
C G60J 1.4
5 4 3 2 1
5 4 3 2 1
For NewCard Debug Card
LPC Debug Port
8
Block C
@ 1 2 RN4401A
0OHM
@ 3 4 RN4401B
0OHM
2
@ 5 6 RN4401C
0OHM
@ 7 8 RN4401D
D 0OHM D
R4405 1 @ 2 0Ohm +3VS @
13
14
J4401
1
SIDE1
SIDE2
5
LPC_AD0 1
2
2
3
U4401 LPC_AD1 3
4
4
<24> CLK_DBGPCI2 3 2 CP_PE#_R <43> 5
<20,30> LPC_AD3 7
11
A0
A1
C0
C1
6
10
CLKREQ#_R <43> Block A LPC_AD2 6
7
5
6
0
<20,30> LPC_AD0 WAKE#_R <43>
FPC_CON_12P
A2 C2 LPC_AD3 7
<20,30> LPC_AD1 17 16 SMB_CLK_R <43> 8
A3 C3 8
<20,30> LPC_AD2 21 20 SMB_DAT_R <43> 9
A4 C4 LPC_FRAME# 9
10
10
SIDE3
SIDE4
<43> CP_PE# 4 5 11
B0 D0 11
<21,43> CLKREQ3_NEWCARD# 8 9 <24> CLK_DEBUG 12
B1 D1 12
7
<22,33,53> PCIE_WAKE# PCIE_WAKE#_DBG 14 15
B2 D2
<7,16,17,28,29,38,53,69> SMB_CLK_S 18 19
15
16
B3 D3
<7,16,17,28,29,38,53,69> SMB_DAT_S 22 23
B4 D4 +5V
1 24
6
PE_DEBUGEN# BE# VCC
13 12
BX GND
1
C4401
SN74CBT3383PWR 0.1UF/16V
2
+3V_NW
2
Q4402
11
2N7002
G
PCIE_WAKE# 3 2 PCIE_WAKE#_DBG +3VS

3
S 2
D
5
1
R4404
100KOhm
+3VS
C U4402 C
2
2
PE_DEBUGEN# 1 5
OE# VCC
<20,30> LPC_FRAME# 2
C4402 D4401 R4402 3 A
3 4 LPC_FRAME#_DBCARD <43>
2200PF/50V 1SS355 47KOhm C Q4401 GND Y
1 2 1 2 1 2 1 B PMBS3904 74LVC1G125GV
<43> PE_RST#
+5V +5V <31,36,45,52,56,57,65,69,91>
1
E
1
R4401 C4403 R4403 2

+3VS +3VS <29,48,80,91,92>
10KOhm 0.1UF/16V 47KOhm
@
2
2
：
If don't support NewCard Debug Card,Pls do
(a) DNI all components of Block A
(b) Mount Block C (RN4401,R4405)
Q Q
流
B B
交
纸
图
A A
Title : BUG_Debug
Engineer: Kenny Wu
www.vinafix.vn
BU2/RD1
C G60J 1.4
5 4 3 2 1
5 4 3 2 1
+3V +12VS
+3VS
100KOhm 7
100KOhm 3
100KOhm 5
+3VS
RN4501B
RN4501D
RN4501C
R2.0--1
+3VSLCD +3VS_LCD
Q4502
8
8
1 2.2KOHM 2
4
1 6 L4501
D
RN4500A
80Ohm/100Mhz
3 2.2KOHM
RN4500B
2 5
3 S 4 1 2
1
G
1
SI3456BDV C4510 +3VS_LCD
1
2
Q4501A Q4501B C4501 C4502 C4503 C4504 C4505 R4501 0.1UF/16V
2
UM6K1N UM6K1N 0.1UF/25V 0.1UF/16V 10UF/10V 1UF/10V 0.1UF/16V 330Ohm @ J4501
D <70> L_VDDEN 2 5 D
@ 2 1
1
2
2 1
<71> EDID_CLK 4 3
2
4 3
<71> EDID_DATA 6 5
6 5
100KOhm 1
8 7
5
8 7
3
3 10 9
RN4501A
D <71> LVDS_U0N 10 9 LVDS_L0N <71>

Q4503 <71> LVDS_U0P 12 11 LVDS_L0P <71>
2N7002 12 11
14 13
14 13
11 <71> LVDS_U1N 16 15 LVDS_L1N <71>
G 16 15
<71> LVDS_U1P 18 17 LVDS_L1P <71>
2
2 S 20
18 17
19
2
20 19
<71> LVDS_U2N 22 21 LVDS_L2N <71>
22 21
<71> LVDS_U2P 24 23 LVDS_L2P <71>
24 23
26 25
26 25
<71> LVDS_UCLKN 28 27 LVDS_LCLKN <71>
28 27
<71> LVDS_UCLKP 30 29 LVDS_LCLKP <71>
30 29
7
32 31
32 31
34 33
34 33
+5V 36 35 PWR_LED# <30,56>
36 35
+5VS 38 37 GAME_LED# <69>
38 37
40 39
0.1UF/16V
0.1UF/16V
0.1UF/16V
40 39
1
C4517
C4518
C4516
42 41
6
C4507 C4508 SIDE2 SIDE1
0.1UF/16V 0.1UF/16V WTOB_CON_40P
2
@ @ @ @ @
5 2 R1.4--2
2
SL4500B
USB_P13+ 3 4
0603
USB_PP13 <24>
4
LX4501
90Ohm/100Mhz
：
@
1
+3VS AC_BAT_SYS_INV SL4500A
USB_P13- 1 2 USB_PN13 <24>
0603
Q
AC_BAT_SYS_INV <88> R2.0--1
1
R4504
100KOhm
L4503
C4506 80Ohm/100Mhz This setting is for M52J/G50J colay:
Q
2
<30,56> LID_SW# 1 1UF/10V 1 2 AC_BAT_INV

3 D4501 1 2@ M52J:Camera*1 (F4501,L4502 can cost down)
1
<30> LCD_BACKOFF# 2 BAT54AW C4509 C4512

22UF/25V 0.1UF/25V G50J: USB portx1,Camerax1.
<70> LCD_BACKEN 2 1 D4502 @ L4502
2
RB751V-40 J4502 80Ohm/100Mhz

1 2 +5V_USB13 1 2 +5V_USB13_F F4501 2 1 1.5A/6V +5V
1 2
1 R4505 2 3 4
3 4
1
10KOhm BL_EN 5 6 C4511
5 6 0.1UF/16V
<30> LCD_BL_PWM 2 1 7
7 8
8 R1.2--10
L4507 9 10
2
9 10
流
1KOhm/100Mhz 11 12
A_MIC1_P 11 12
<38> UNI_MIC_P 13 14
A_MIC1_N 13 14 USB_P13- D4503
<38> UNI_MIC_N 15 16
B
A_MIC2_P 15 16 USB_P13+ B
<38> OMNI_MIC_P 17
17 18
18 Camera
<38> OMNI_MIC_N A_MIC2_N 19 20 USB_P13+ 1 6 USB_P13-
19 20
21 22
SIDE1 SIDE2
R2.0--1
WTOB_CON_20P
2 5 +5V_USB13
交
Reserved for EMI
A_MIC1_P A_MIC1_N A_MIC2_P A_MIC2_N +3VS 3 4
+3VS <29,48,80,91,92>
1
+3V +3V <24,33,43,57,61,64,69,91>

IP4220CZ6
D4504 D4505 D4506 D4507 +12VS @
+12VS <28,91>
0603-050E101NP-LF 0603-050E101NP-LF 0603-050E101NP-LF 0603-050E101NP-LF R1.2--10
@ @ @ @ +5V +5V <31,36,44,52,56,57,65,69,91>
2
纸
+5VS +5VS <27,30,31,37,46,48,50,51,56,57,70,80,91>
图
A A
Title : CRT(1)_LVDS
Engineer: Kenny Wu
www.vinafix.vn
BU2/RD1
C G60J 1.4
5 4 3 2 1
5 4 3 2 1
LX4601
120Ohm/100Mhz
CRT_RED 2 1 CRT_R_55 1 2 CRT_R_CON
3
JP4601
8
1
1
SHORT_PIN R4601
150Ohm D4601 C4601 C4602
BAV99 10PF/50V 10PF/50V
2
2
1
2
+3VS
D D
@
16
LX4602 J4601 D4607
120Ohm/100Mhz HSYNC_CON 1 2
CRT_GREEN 2 1 CRT_G_55 1 2 CRT_G_CON
5
6 EGA10603V05A1
3
JP4602 CRT_R_CON 1 11
1
SHORT_PIN R4602 7 D4608
150Ohm D4602 C4603 C4604 CRT_G_CON 2 12 DDC_DATA_CON VSYNC_CON 1 2
BAV99 10PF/50V 10PF/50V 8
2
CRT_B_CON 3 13 HSYNC_CON EGA10603V05A1
0
9
1
+3VS 4 14 VSYNC_CON D4609
10 DDC_CLK_CON 1 2
@ 5 15 DDC_CLK_CON
EGA10603V05A1
7
LX4603
D4610
120Ohm/100Mhz
DDC_DATA_CON 1 2
CRT_BLUE CRT_B_55 CRT_B_CON
2 1 1 2
D_SUB_15P3R
17
1 EGA10603V05A1
3
JP4603
1
SHORT_PIN R4603
6
150Ohm D4603 C4605 C4606
BAV99 10PF/50V 10PF/50V
2
2
1
+3VS
2
@
<70> DDC_DATA_VGA 2 1 CRT_DDC_DATA

SL4608 0402 CFD
<70> DDC_CLK_VGA 2 1 CRT_DDC_CLK
0402 CFD
5
SL4602
<70> CRT_VSYNC_VGA 1 2 CRT_VSYNC
Q4603A CFD 0402 SL4603
UM6K1N SL4609 <70> CRT_HSYNC_VGA 1 2 CRT_HSYNC
CRT_HSYNC 1 6 HSYNC_CRT 1 2 HSYNC_CON CFD 0402 SL4604
C 0603 2 1 CRT_RED C
<70> CRT_R_VGA
2
SL4605 0402 CFD
2
C4611 <70> CRT_G_VGA 2 1 CRT_GREEN
2
47PF/50V SL4606 0402 CFD

c0402 <70> CRT_B_VGA 1 2 CRT_BLUE
1
@ CFD 0402 SL4607
+3VS
GND
5
SL4610
CRT_VSYNC 4 3 VSYNC_CRT 1 2 VSYNC_CON
0603
：
UM6K1N
2
Q4603B C4612
47PF/50V
c0402
1
@
Q
GND
Q
Q4602A
UM6K1N SL4600
CRT_DDC_DATA 1 6 DDC_DATA 1 2 DDC_DATA_CON
0603
1
C4609
2
22PF/25V
@
2
+3VS
流
5
B B
SL4601
CRT_DDC_CLK 4 3 DDC_CLK 1 2 DDC_CLK_CON
0603
UM6K1N
1
D4606 Q4602B C4610

1SS355 22PF/25V
1 2 1 RN4603A DDC_DATA @
+5VS 4.7KOHM2
2
DDC_CLK
交
3 RN4603B
4.7KOHM4
1 RN4602A CRT_DDC_DATA
2.2KOHM2
3 4 RN4602B CRT_DDC_CLK
+3VS 2.2KOHM
纸
+3VS +3VS <29,48,80,91,92>
+5V +5V <31,36,44,45,52,56,57,65,69,91>
+5VS +5VS <27,30,31,37,45,48,50,51,56,57,70,80,91>
图
A A
Title : CRT(2)_D-Sub
Engineer: Kenny Wu
www.vinafix.vn
BU2/RD1
C G60J 1.4
5 4 3 2 1
5 4 3 2 1
2 8 D
0 5
6 7
C
5 2 C
2
Q：
Q
流
B B
交 R2.0
+3VS
+5VS
+3VS
+5VS
纸
<29,48,80,91,92>
<27,30,31,37,45,46,48,50,51,56,57,70,80,91>
图
A A
Title : CRT(3)_Display Port

Engineer: Kenny Wu
www.vinafix.vn
BU2/RD1
C G60J 1.4
5 4 3 2 1
5 4 3 2 1
CAP do GND voiding

HDMI_CLKP_CON
HDMI_CLKN_CON SL4801A C4805

HDMI_TXP2 2 1 1 2 HDMI_TXP2_CON
HDMI_TXP0_CON 0603
0.1UF/16V
HDMI_TXN0_CON
2
L4801
HDMI_TXP1_CON 90Ohm/100Mhz
@
HDMI_TXN1_CON
3
2
HDMI_TXP2_CON SL4801B C4806
HDMI_TXN2 4 3 1 2 HDMI_TXN2_CON
D 0603 D
HDMI_TXN2_CON
0.1UF/16V
R4826
R4829
R4825
R4823
R4828
R4824
R4822
R4827
SL4802A C4807
2
HDMI_TXP1 2 1 1 2 HDMI_TXP1_CON
0603
0.1UF/16V
2
499Ohm
499Ohm
499Ohm
499Ohm
499Ohm
499Ohm
499Ohm
499Ohm
L4802
1
90Ohm/100Mhz
0
@
3
3
3 SL4802B C4808
+5VS D
0603
7
11 Q4802 0.1UF/16V
2
G 2N7002
R4832 2 S SL4803A C4809
2
1MOhm HDMI_TXP0 2 1 1 2 HDMI_TXP0_CON
0603
6
0.1UF/16V
2
L4803
90Ohm/100Mhz
GND @
R1.4--8
3
SL4803B C4818
0603
0.1UF/16V
5
SL4804A C4819
HDMI_CLKP 2 1 1 2 HDMI_CLKP_CON
0603
0.1UF/16V
C C
2
L4804
90Ohm/100Mhz
@
3
SL4804B C4820
HDMI_CLKN 4 3 1 2 HDMI_CLKN_CON
0603
R2.0--1 0.1UF/16V R1.4--8
：
CFD
Q
<70> HDMI_HPD_DGPU SL4800 2 1 HDMI_HPD
0402 CFD
CFD 1 2 RN4805A HDMI_CLKN
<70> HDMI_CLKN_DGPU 2R4PS
CFD 3 4 RN4805B HDMI_CLKP
<70> HDMI_CLKP_DGPU 2R4PS
Q
<70> HDMI_TXN0_DGPU CFD
CFD1
2R4PS 2 RN4806A HDMI_TXN0
<70> HDMI_TXP0_DGPU CFD

CFD3
2R4PS 4 RN4806B HDMI_TXP0
<70> HDMI_TXN1_DGPU CFD

CFD1
2R4PS 2 RN4807A HDMI_TXN1
<70> HDMI_TXP1_DGPU CFD 3 4 RN4807B HDMI_TXP1

2R4PS
<70> HDMI_TXN2_DGPU CFD 1 2 RN4808A HDMI_TXN2

2R4PS
<70> HDMI_TXP2_DGPU CFD

CFD3
2R4PS 4 RN4808B HDMI_TXP2
流
B B
+3VS
R2.0--1
J4801
HDMI_TXP2_CON 1 21
1 P_GND2
2 23
2 P_GND4
2
HDMI_TXN2_CON 3
SL4817 HDMI_TXP1_CON 3
4
HDMI_DDC_CLK_DGPU HDMI_DDCCLK HDMI_SCL 4
<70> HDMI_DDC_CLK_DGPU 1 6 2 1 5
0402 CFD HDMI_TXN1_CON 5
6
6
1
UM6K1N +5VS HDMI_TXP0_CON
交
C4801 7
Q4801A @ 22PF/25V 7
8
8
2
CFD HDMI_TXN0_CON 9
2
9
4.7KOHM
HDMI_CLKP_CON 10
10
2
RN4800A 11
CFD HDMI_CLKN_CON 11
12
D4801 12
13
RB551V_30 13
14
1
HDMI_SCL 14
15
1
F4801 HDMI_SDA 15
16
0.35A/6V 16
17
+5VS_F +5VS_HDMI 17
2 1 2 1 18 22
纸
0.1UF/16V C4803 18 P_GND3
1 2 19 20
+5VS_HDMI 19 P_GND1
R4803 HDMI_CON_19P
1
HDMI_HPD 1KOhm
R4804
3
10KOhm
D4802
2
4
BAV99
4.7KOHM
RN4800B
1
图
+3VS CFD +3VS
3
5
SL4818
<70> HDMI_DDC_DATA_DGPU HDMI_DDC_DATA_DGPU 4 3 HDMI_DDCDATA 2 1 HDMI_SDA
A 0402 CFD A
1
UM6K1N C4802
Q4801B R2.0--1 @ 22PF/25V
CFD
2
Title : TV(1)_HDMI
+3VS +3VS <29,80,91,92>
Engineer: Kenny Wu
www.vinafix.vn
BU2/RD1
+5VS +5VS <27,30,31,37,45,46,50,51,56,57,70,80,91>
R1.4--7 C G60J 1.4
5 4 3 2 1
5 4 3 2 1
2 8 D
0 5
6 7
C
5 2 C
2
Q：
Q
流
B B
交
纸
图
A A
Title : TV(2)_****
Engineer: Kenny Wu
www.vinafix.vn
BU2/RD1
C G60J 1.4
5 4 3 2 1
5 4 3 2 1
8
+3VS +3VS <29,48,80,91,92>
+5VS +5VS <27,30,31,37,45,46,48,51,56,57,70,80,91>
2
D D
CPU Thermal Sensor
5
+3VS
PHILIP PMBS3904
0
Pleace in the center
1
of CPU socket. 0.1UF/10V
C5007
2
CPU_THRM_DA @
7
Q5001 C U5002
@ 1 8
VCC SMBCLK SMB1_CLK_S <28,70>
1
2 7 SMB1_DAT_S <28,70>
B C5001 DXP SMBDATA
3 6
6
DXN ALERT#
2200PF/50V 4 5
2
@ THERM# GND
PMBS3904 G781 @
E
CPU_THRM_DC O/D
2
CPU_THERM# <32>
5
SMBUS addr=1001100x (98)
U5002: Remote(Local) thermal sensor,use remote mode.
C C
PWM Fan
2
：
C5002 put besides J5001.4
+5VS
Q
1
+ Remove diode(+5Vs to GND)
1
+3VS C5002 CE5001
10UF/10V 47UF/6.3V for using 4-wires PWM FAN.
@
Q 2
2
R5001
10KOhm
J5001
4 6
1
4 SIDE2
<30> FAN_PWM 3
3
2
2
<30> FAN0_TACH 1 5
1 SIDE1
1
C5003 C5004 WtoB_CON_4P

100PF/50V 100PF/50V
流
@ @
2
B B
交
纸
图
A A
Title : FAN_Fan,Sensor
Engineer: Kenny Wu
www.vinafix.vn
BU2/RD1
C G60J 1.4
5 4 3 2 1
5 4 3 2 1
8
ODD +3VS
+5VS
+3VS
+5VS
<29,48,80,91,92>
<27,30,31,37,45,46,48,50,56,57,70,80,91>
2
D D
J5101
4 S1
5
NP_NC4 S1 SATA_TXP1_C CX5109 1
S2 2 0.01UF/16V SATA_TXP1 <20>
S2 SATA_TXN1_C CX5112 1
2 S3 2 0.01UF/16V SATA_TXN1 <20>
NP_NC2 S3
S4
S4 SATA_RXN1_C CX5111 1
S5 2 0.01UF/16V SATA_RXN1 <20>
S5 SATA_RXP1_C CX5110 1
S6 2 0.01UF/16V SATA_RXP1 <20>
S6
S7
0
S7
P1 1 T5101
P1
7
P2 +5VS
P2
1 P3
NP_NC1 P3 T5102
P4
P4 1 R2.0--1
1
3 P5 C5108 C5107
NP_NC3 P5 0.01UF/16V
P6 10UF/10V
P6 @
6
SATA_CON_13P
1224-000D000
5 2 C
2
HDD (1st)
Q： HDD (2nd)
Q
J5103
25 1
NP_NC3 1 SATA_TXP0_C CX5101 1
2 2 0.01UF/16V SATA_TXP0 <20>
2 SATA_TXN0_C CX5102 1
23 3 2 0.01UF/16V SATA_TXN0 <20>
NP_NC1 3
4
4 SATA_RXN0_C CX5103 1
5 2 0.01UF/16V SATA_RXN0 <20>
5 SATA_RXP0_C CX5104 1
6 2 0.01UF/16V SATA_RXP0 <20>
6 J5102
7
7
25 1
NP_NC3 1 SATA_TXP4_C CX5105 1
2 2 0.01UF/16V SATA_TXP4 <20>
2 SATA_TXN4_C CX5108 1
23 3 2 0.01UF/16V SATA_TXN4 <20>
NP_NC1 3
流
4
4 SATA_RXN4_C CX5107 1
8 +3VS 5 2 0.01UF/16V SATA_RXN4 <20>
8 5 SATA_RXP4_C CX5106 1
9 6 2 0.01UF/16V SATA_RXP4 <20>
9 6
1
B B
10 C5111 C5101 C5102 7
10 1000PF/50V 0.1UF/16V 7
11
11 10UF/10V R1.2--14
12 @ @ @
2
12
13
13
14
14
15 8 +3VS
15 8
16 +5VS 9
16 9
17 10
17 10
1
交
18 R2.0--1 11 C5113 C5104 C5106
18 11
1
19 C5112 C5103 C5109 12 1000PF/50V 0.1UF/16V 10UF/10V

19 1000PF/50V 0.1UF/16V 12 @ @ @
24 20 10UF/10V 13
2
NP_NC2 20 13
21 14
2
21 14
26 22 15
NP_NC4 22 15
16 +5VS
SATA_CON_22P @ @ 16
17
17
18
18 R2.0--1
1
R2.0--1 19 C5114 C5105 C5110
19 1000PF/50V 0.1UF/16V
1224-000W000 24
NP_NC2 20
20
21
10UF/10V
2
21
26 22
纸
NP_NC4 22
SATA_CON_22P @ @
R2.0--1
1224-001G000
图
A A
Title : XDD_HDD,ODD
Engineer: Kenny Wu
www.vinafix.vn
BU2/RD1
C G60J 1.4
5 4 3 2 1
5 4 3 2 1
2 8 D
5
+5V +5V <31,36,44,45,56,57,65,69,91>
USB ports
7 0
6
+5V +5V_USB L5201 +5V_USB_C
Combine power because these two ports are nearby. F5201 1.6A 80Ohm/100Mhz J5201
1 2 1 2 4 8
USB_P3- 4 P_GND4
3 7
3 P_GND3
1
+ USB_P3+ 2 6
2
2 P_GND2
1
C5203 CE5201 C5201 1 5
0.1UF/16V 0.1UF/16V 1 P_GND1
47UF/6.3V
@ @ USB_CON_1X4P
2
1213-000L000
5
R2.0--1
<24> USB_PP3 2 1 RNX5201A USB_P3+
0Ohm
@
4
C C
2
90Ohm/100Mhz
LX5201
1
<24> USB_PN3 4 3 USB_P3-
0Ohm
RNX5201B
@ D5201 @
6 1
：
+5V_USB_C 5 2
Q
USB_P2+ 4 3 USB_P2-
IP4220CZ6
Q
+5V_USB_C
4 0Ohm 3 RNX5202B J5202
4 8
USB_P2- 4 P_GND4
<24> USB_PN2 @ 3 7
USB_P2+ 3 P_GND3
2 6
2 P_GND2
1
LX5202 1 5
90Ohm/100Mhz 1 P_GND1
USB_CON_1X4P
流
<24> USB_PP2 1213-000L000
B
2 0Ohm 1 B
RNX5202A
@
交
纸
图
A A
Title : USB_USB Port

Engineer: Kenny Wu
www.vinafix.vn
BU2/RD1
C G60J 1.4
5 4 3 2 1
5 4 3 2 1
2 8
+3VS +3VS <29,48,80,91,92>
D D
+3VSUS +3VSUS <27,30,33,34,37,81,82,92>
+1.5VS +1.5VS <26,43,57,64,91>
5
+3VM +3VM <26,28,57,91,92>
7 0
+3VAUX_WLAN
R2.0--1
R0805
WLAN 1 2 SP5300 +3VS
R5322 2 @ 1 0Ohm +3VSUS
6
+1.5VS R5327 2 @ 1 0Ohm +3VM
Shirley Peak/ Echo Peak WLAN_ON_C
2
6
J5302 Q5301A
1 2 UM6K1N WLAN RF Control by H/W:
<22,33,44> PCIE_WAKE# WAKE# 3.3V_1
3 4 2 RFON_SW# <30,56,61> H=RF disable; L=RF on.
Reserved1 GND7
5 6
1
Reserved2 1.5V_1 GPIO power plane: +3VA
<21> CLKREQ2_WLAN# 7 8
CLKREQ# UIM_PWR
3
5
9 10 Q5301B
GND1 UIM_DATA R5301 UM6K1N
<21> CLK_PCIE_WLAN#_PCH 11
REFCLK- UIM_CLK
12
10KOhm
WLAN RF Control by S/W:
<21> CLK_PCIE_WLAN_PCH 13 14 5 WLAN_ON <25>
REFCLK+ UIM_RESET @ L=RF disable; H=RF on.
15 16
4
GND2 UIM_VPP GPIO power plane: +3VSUS
R2.0--1
1
C C
2
17 18
Reserved/UIM_C8 GND8
19 20
Reserved/UIM_C4 W_DISABLE#
21 22 BUF_PLT_RST# <3,7,24,30,32,33,38,40,43,64,70>
GND3 PERST#
<21> PCIE_RXN2_WLAN 23 24
PERn0 +3.3Vaux
<21> PCIE_RXP2_WLAN 25 26
PERp0 GND9
27 28
GND4 1.5V_2 SMBC R5319 @
29 30 1 2 0Ohm SMB_CLK_S <7,16,17,28,29,38,44,69>
GND5 SMB_CLK SMBD R5309 @
<21> PCIE_TXN2_C 31 32 1 2 0Ohm SMB_DAT_S <7,16,17,28,29,38,44,69>
PETn0 SMB_DATA SL5301B
<21> PCIE_TXP2_C 33 34
PETp0 GND10 USB_PN9_C
35 36 4 3 USB_PN9 <24>
GND6 USB_D- USB_PP9_C 0603
37 38 USB_PP9 <24>
Reserved3 USB_D+ @
：
39 40
Reserved4 GND11
3
+3VAUX_WLAN 41 42
Reserved5 LED_WWAN# L5303
43 44
Reserved6 LED_WLAN#
<21> CL_CLK 45 46
Reserved7 LED_WPAN#
<21> CL_DATA 47 48
2
Reserved8 1.5V_3
<21> CL_RST# 49 50
Q
Reserved9 GND12 SL5301A
51 52
Reserved10 3.3V_2
2 1
0603
53 56
GND13 NP_NC2
54
GND14 NP_NC1
55 R2.0--1
Q
MINI_CARD_LATCH_52P
1244-000J000
WLAN +3VAUX bypass capactor: WLAN +1.5VS bypass capactor: WLAN nuts:
Place 0.1UF near pin 2,24,52,39 41. Place 0.1UF near pin 6,28,48. Minicard spec R1.2:
流
Place 10UF near +3VAUX_WLAN source side. Place 10UF near +1.5VS source side. Full size card= 2pcs.
B B
Half size card= 2pcs.
+3VAUX_WLAN +1.5VS
H5303 H5304
A40M20-64AS A40M20-64AS
1
C5312 C5308 C5309 C5310 C5311 C5329 C5318 C5304 C5328
交
10UF/6.3V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 10UF/6.3V 0.1UF/10V 0.1UF/10V 0.1UF/10V
2
@ @ @
R2.0--1 R2.0--1 R2.0--1
纸
图
A A
Title : MINICARD_WLAN
Engineer: Kenny Wu
www.vinafix.vn
BU2/RD1
C G60J 1.4
5 4 3 2 1
5 4 3 2 1
2 8 D
0 5
6 7
C
5 2 C
2
Q：
Q
流
B B
交
纸
图
A A
Title : BAR_****
Engineer: Kenny Wu
www.vinafix.vn
BU2/RD1
C G60J 1.4
5 4 3 2 1
5 4 3 2 1
2 8 D
0 5
6 7
C
5 2 C
2
Q：
Q
流
B B
交
纸
图
A A
Title : SIO_****
Engineer: Kenny Wu
www.vinafix.vn
BU2/RD1
C G60J 1.4
5 4 3 2 1
5 4 3 2 1
3 4 RN5601B NUM_LED_CON# +3VA

<30> NUM_LED# 33Ohm
<30> CAP_LED# 1 2 RN5601A CAP_LED_CON#

33Ohm
1
J5601
R5609 21
10KOhm GND1
R2.0--1 GND 20
20
<28,30> SMB1_CLK 19
SL5600 19
<28,30> SMB1_DAT 18
2
LID_SW_CON# 18
<30,45> LID_SW# 1 2 <30> CAP_ACK# 17
0402 17
8
+3VS 16
16
1
+5VS 15
C5602 HDD_LED_CON# 15
14
0.1UF/10V NUM_LED_CON# 14
13
2
@ 13
+5VSUS 12
CAP_LED_CON# 12
11
11
2
+3VA 10
AC_BAT_SYS +5VA PWR_LED_CON# 10
9
D +3VA LID_SW_CON# 9 D
R2.0--1 8
8
POWER_SW# 7
SL5602 7
GND 6
6
1
<30> EXP_GATE# 1 2 5
5
R5605 R5608 R5607 0402 +5VA_LID 5
4
1MOhm 1MOhm 10KOhm 4
R2.0--1 3
3
3
3 2
D 2
SL5601 <30> ALS_AD 1 @ 2 1
2
POWER_SW# R5620 0Ohm 1
<30> PWR_SW# 1 2 22
0402 GND2
11 Q5602
0
G 2N7002 FPC_20P
2 S
1
Q5604B
5 UM6K1N +5VA_LID D5600 12G183402008
AZ2015-01H.R7F SW5602
4
7
1 2
1 2
6
Q5604A 3 4
LID_SW# UM6K1N 3 4
2
TP_SWITCH_4P
2
POWER ON SWITCH
NO_STUFF AFTER PR
5 2 C
Power LED
2 +3VA
1
R5611
10KOhm R2.0--1
+5V
Q
PWR_LED_CON# PWR_LED_CON# <31> SL5603 SW5601
2
<30,53,61> RFON_SW# 1 2 4 1
1
0402 5 2
1
COM COM
R5618 6 3
10KOhm C5603
220 ohm on small board 0.1UF/10V SLIDE_SWITCH_6P
2
2
6
3
Q5606A Q5606B
<30,45> PWR_LED# 2 UM6K1N 5 UM6K1N
1
4
WLAN LED BT LED
流
WLAN_LED_CON# BT_LED_CON#
B Charger LED <31> WLAN_LED_CON# BT_LED_CON# <31> B
1
+5VA
R5617 R5616
330Ohm 330Ohm
1
+3VS
R5613
HDD LED
2
10KOhm
1
2 1 CHG_LED_CON# <31>
3
交
330Ohm R5614 R5602
2
10KOhm Q5605A Q5605B

<25> WLAN_LED 2 UM6K1N UM6K1N 5 BT_LED <25>
6
2 1 HDD_LED_CON#
2
4
Q5603A Q5603B 330Ohm R5603
1
<30> CHG_LED# 2 UM6K1N 5 UM6K1N
6
R5604 R5606
1
Q5601A Q5601B 100KOHM 100KOHM

<20> SATA_LED# 2 UM6K1N 5 UM6K1N
1
2
纸
图
+3VA +3VA <20,30,57,81,90,93>
+3VS +3VS <29,48,80,91,92>

A +5VSUS A
+5VSUS <27,81,91>
+5VA +5VA <31,81,82,83>
+5V +5V <31,36,44,45,52,57,65,69,91>
+5VS +5VS <27,30,31,37,45,46,48,50,51,57,70,80,91>
AC_BAT_SYS AC_BAT_SYS <70,80,81,82,83,88>
Title : LED_Indicator
Engineer: Kenny Wu
www.vinafix.vn
BU2/RD1
C G60J 1.4
5 4 3 2 1
5 4 3 2 1
8
+3VA +3VA <20,30,56,81,90,93>
+VCORE +VCORE <6,69,80>
+VGFX_CORE +VGFX_CORE
2
+VTT_CPU +VTT_CPU <3,6,7,25,26,27,29,32,82>
D D
+0.75VS +0.75VS <16,17,83>
+1.05VS +1.05VS <26,27,69,91>
5
+1.5VS +1.5VS <26,43,53,64,91>
+1.8VS +1.8VS <6,26,38,70,85>
+3VS +3VS <29,48,80,91,92>
0
+5VS +5VS <27,30,31,37,45,46,48,50,51,56,70,80,91>
+1.5V +1.5V <3,6,16,69,83>
+3V +3V <24,33,43,45,61,64,69,91>
7
+5V +5V <31,36,44,45,52,56,65,69,91>
+1.05VM_LAN +1.05VM_LAN
+3VM +3VM <26,28,53,91,92>
6
+1.05VM +1.05VM <27,69,91,92>
C
+5VS +3VS +1.8VS +1.5VS +1.05VS
5 2
+VTT_CPU +0.75VS +VCORE
C
1 2
1
1
R5703 R5704 R5705 R5706 R5707 R5708 R5713 R5714
+3VA 330Ohm 330Ohm 330Ohm 330Ohm 330Ohm 330Ohm 330Ohm 330Ohm
2
1
R5701 +5VS_DISCHRG +3VS_DISCHRG +1.8VS_DISCHRG +1.5VS_DISCHRG +VTT_PCH_DISCHRG +VTT_CPU_DISCHRG +0.75VS_DISCHRG +VCORE_DISCHRG

100KOhm @ @ @ @ @ @ @ @
6
Q5701B Q5702A Q5702B Q5703A Q5703B Q5704A Q5704B Q5707A
2
：
5 UM6K1N 2 UM6K1N 5 UM6K1N 2 UM6K1N 5 UM6K1N 2 UM6K1N 5 UM6K1N 2 UM6K1N
1
6
@ Q5701A
UM6K1N
<30,36,43,91,92> SUSB_EC# 2 @ @ @ @ @ @ @ @
1
Q
@
+5V +3V +1.5V
Q
1
1
R5710 R5711 R5712
+3VA 330Ohm 330Ohm 330Ohm
2
2
1
R5702 +5V_DISCHRG +3V_DISCHRG +1.5V_DISCHRG

100KOhm @ @ @
3
3
Q5705B Q5706A Q5706B
2
5 UM6K1N 2 UM6K1N 5 UM6K1N
流
4
4
6
@ Q5705A
UM6K1N
B B
<30,91> SUSC_EC# 2 @ @ @
1
@
+3VM +1.05VM
1
交
R5717 R5718
+3VA 330Ohm 330Ohm
2
2
1
R5721
R5709 +3VM_DISCHRG +1.05VM_DISCHRG
SUSB_EC# 2 0Ohm 1 100KOhm @ @
6
@ Q5709A Q5709B
2
2 UM6K1N 5 UM6K1N
纸
1
4
6
R5720 @ Q5708A
<22,91> ME_PM_SLP_LAN# 1 2 UM6K1N
0Ohm 2 @ @
@
1
@
R5719
<91> ME_SLP_M_EC# 1 2
图
0Ohm
@
R2.0--1
A A
Title : DSG_Discharge
Engineer: Kenny Wu
www.vinafix.vn
BU2/RD1
C G60J 1.4
5 4 3 2 1
5 4 3 2 1
2 8 D
0 5
6 7
C
5 2 C
2
Q：
Q
流
B B
交
纸
图
A A
Title : PCI_****
Engineer: Kenny Wu
www.vinafix.vn
BU2/RD1
C G60J 1.4
5 4 3 2 1
5 4 3 2 1
2 8 D
0 5
6 7
C
5 2 C
2
Q：
Q
流
B B
交
纸
图
A A
Title : DJ_****
Engineer: Kenny Wu
www.vinafix.vn
BU2/RD1
C G60J 1.4
5 4 3 2 1
5 4 3 2 1
+VCC_RTC +VCC_RTC <20,27>
8
+3VA_EC +3VA_EC <30,32>
DC Jack +3VA +3VA <20,30,56,57,81,90,93>
+V_DCJACK
Current setting=6A A/D_DOCK_IN +5VA +5VA <31,56,81,82,83>
2
Depend on the current
D
1 T6001 of the adaptor. +3VSUS +3VSUS <27,30,33,34,37,53,81,82,92> D
1 T6002 +5VSUS +5VSUS <27,56,81,91>

1 T6003 L6001 1 2 80Ohm/100Mhz
J6001 1 T6004 +12VSUS
5
+12VSUS <28,81,91>
3 NP_NC Irat=3A
4 P_GND 1vcc L6006 1 2 80Ohm/100Mhz
5 P_GND +1.5V +1.5V <3,6,16,57,69,83>
2
6 P_GND 2GND Irat=3A
1
7 P_GND C6001 D6001 C6002 C6003 C6004 +3V +3V <24,33,43,45,57,61,64,69,91>
0.1UF/25V SS0540 10UF/25V 1UF/25V 0.1UF/25V
0
DC_PWR_JACK_2P @ @ @ +5V +5V <31,36,44,45,52,56,57,65,69,91>
2
2
GND
1
+12V +12V <37,91>
1215-0003000 R2.0--1 R2.0--1
1 T6005
7
1 T6006 GND +0.75VS +0.75VS <16,17,57,83>
1 T6007
1 T6008 +1.05VS +1.05VS <26,27,57,69,91>
+1.5VS +1.5VS <26,43,53,57,64,91>
6
GND +1.8VS +1.8VS <6,26,38,57,70,85>
+3VS +3VS <29,48,80,91,92>
+5VS +5VS <27,30,31,37,45,46,48,50,51,56,57,70,80,91>
2
Battery Connector +12VS +12VS <28,45,91>
AC_BAT_SYS_INV AC_BAT_SYS_INV <45,88>

For EC pin protection,
5
clamping=6.8V AC_BAT_SYS AC_BAT_SYS <56,70,80,81,82,83,88>
A/D_DOCK_IN A/D_DOCK_IN <88>

BAT_CON D6005
BAT_CON BAT_CON <88>
C 4 3 C
2
1 T6009 +1.5V_DDR3 +1.5V_DDR3 <16,17,18>
1 T6010 2 GND
J6002 1 T6011 +VTT_CPU +VTT_CPU <3,6,7,25,26,27,29,32,57,82>
11 1 T6012
P_GND2
5 1 +VCORE +VCORE <6,57,69,80>
9
9 T6017
8 1 +VGFX_CORE +VGFX_CORE
8 T6018 DF5A6.8FU
7 1
7 T6019
6 1 +VTT_PCH_ORG +VTT_PCH_ORG <21,22,26,27>
6 L6002
5 1 2 120Ohm/100Mhz SMB0_CLK <30>
5
：
4 L6003 1 2 120Ohm/100Mhz
1.5NF/50V
1.5NF/50V
1.5NF/50V
1.5NF/50V
4 SMB0_DAT <30> +VTT_PCH_VCCIO +VTT_PCH_VCCIO <20,26,27>

3 L6004 1 2 120Ohm/100Mhz TS1# <90>
3
2 +1.05VM_ORG +1.05VM_ORG <27>
2
1
C6008
C6005
C6009
C6010
C6011
1
1
2
C6006 C6007 47PF/50V +V_NVRAM_VCCQ +V_NVRAM_VCCQ <26>

2
10 @ @ 47PF/50V 47PF/50V @
2
Q
P_GND1 @ @ M_VREFCA_DIMM0 M_VREFCA_DIMM0 <16,18>
1
BATT_CON_9P
1
1 T6013 R2.0--3 M_VREFDQ_DIMM0 M_VREFDQ_DIMM0 <16,18>

1 T6014
1220-000U000 1 T6015 GND GND GND M_VREFCA_DIMM1 M_VREFCA_DIMM1 <17,18>
1 T6016
Q
Recommand max 47PF, M_VREFDQ_DIMM1 M_VREFDQ_DIMM1 <17,18>
GND for BQ20Z90 rising time spec.
流
B B
交
纸
图
A A
Title : DC_DC/BAT CONN

Engineer: Kenny Wu
www.vinafix.vn
BU2/RD1
C G60J 1.4
5 4 3 2 1
5 4 3 2 1
2 8 D
+3V +3V <24,33,43,45,57,64,69,91>
0 5
BLUETOOTH
6 7
2
+3V
1
5
C6102
0.1UF/16V
2
+3V
C C
1
2
R6104
10KOhm J6101
1 7
RB751V-40 1 SIDE1
<24> USB_PP12 2
2
D6101 2
<24> USB_PN12 3
3
<25> BT_ON 2 1 BT_ON_D 4
4
5
5
3
3
D T6101 1 BT_Link_LED 6 8
Q6102 6 SIDE2
2N7002 WTOB_CON_6P
：
<30,53,56> RFON_SW# 11 @
G 1217-002K000
2 S
Q Q
流
B B
交
纸
图
A A
Title : BT_Bluetooth
Engineer: Kenny Wu
www.vinafix.vn
BU2/RD1
C G60J 1.4
5 4 3 2 1
5 4 3 2 1
2 8 D
0 5
6 7
C
5 2 C
2
Q：
Q
流
B B
交
纸
图
A A
Title : TPM_****
Engineer: Kenny Wu
www.vinafix.vn
BU2/RD1
C G60J 1.4
5 4 3 2 1
5 4 3 2 1
2 8 D
0 5
6 7
C
5 2 C
2
Q：
Q
流
B B
交
纸
图
A A
Title : FP_****
Engineer: Kenny Wu
www.vinafix.vn
BU2/RD1
C G60J 1.4
5 4 3 2 1
5 4 3 2 1
+3V +3V <24,33,43,45,57,61,69,91>
+3VS +3VS <29,48,80,91,92>
+1.5VS +1.5VS <26,43,53,57,91> +3V Max: 1200 mA
8
N/A
2 1
L6401 80Ohm/100Mhz
+3VS
2
@
+3V_TUN 2 1
D D
L6402 80Ohm/100Mhz
1
C6401 C6402 C6406
0.1UF/16V 10UF/10V 22UF/6.3V
5
@
2
J6401 +1.5VS
R2.0--1
1 2
WAKE# 3.3V_1
3 4 Max: 375 mA
0
Reserved1 GND7 +1.5VS_TUN
5 6
Reserved2 1.5V_1
<21> CLKREQ1_TV# 7 8
CLKREQ# UIM_PWR
1
9 10 C6403 C6404 C6405
GND1 UIM_DATA 0.1UF/16V 0.1UF/16V 10UF/10V R2.0--1
<21> CLK_PCIE_TV#_PCH 11 12
REFCLK- UIM_CLK @
<21> CLK_PCIE_TV_PCH 13 14
2
REFCLK+ UIM_RESET
7
15 16
GND2 UIM_VPP
17
Reserved/UIM_C8 GND8
18 R2.0--1
19 20
Reserved/UIM_C4 W_DISABLE#
21 22 BUF_PLT_RST# <3,7,24,30,32,33,38,40,43,53,70>
6
GND3 PERST#
<21> PCIE_RXN1_TV 23 24
PERn0 +3.3Vaux
<21> PCIE_RXP1_TV 25 26
PERp0 GND9
27
GND4 1.5V_2
28 R2.0--1
29 30
GND5 SMB_CLK
<21> PCIE_TXN1_C 31 32
PETn0 SMB_DATA
33 34
2
<21> PCIE_TXP1_C PETp0 GND10
35 36 USB_PN4 <24>
GND6 USB_D-
37 38 USB_PP4 <24>
Reserved3 USB_D+
39 40
Reserved4 GND11
41
Reserved5 LED_WWAN#
42 R1.4--1
43 44
Reserved6 LED_WLAN#
5
45 46
Reserved7 LED_WPAN#
47 48
Reserved8 1.5V_3
49 50
Reserved9 GND12
51 52
Reserved10 3.3V_2
C C
2
53 56
GND13 NP_NC2
54 55
GND14 NP_NC1
MINI_PCI_LATCH_52P
：
H6401 H6402 H6403 H6404
W5M-1A W5M-1A W5M-1A W5M-1A
@ @
Q Q
1
J6403
1
流
2 5
GND1 GND4
3 4
GND2 GND3
B B
MCX_JACK_5P
交
纸
图
A A
Title : TUN_TV Tuner

Engineer: Kenny Wu
www.vinafix.vn
BU2/RD1
C G60J 1.4
5 4 3 2 1
5 4 3 2 1
L6501 +5V
80Ohm/100Mhz +3VS
+5V_USB01 2 1+5V_USB01_F F6501 2 1 2A/8V @
Screw Hole A
RNX6500B 3 4
0Ohm
1
C6511 C6510 H6501
1
1000PF/50V 0.1UF/16V C6512 C6513 USB_P0- USB_PN0 <24> H6508
@ 1000PF/50V 0.1UF/16V 1
2
NP_NC
2
@ LX6500 2 5 1
2
J6501 90Ohm/100Mhz GND1 GND4 NP_NC
8
3 4 2 5
GND2 GND3 GND1 GND4
1 3 4
1 GND2 GND3
21 2
3
SIDE2 2 USB_P0+
3 USB_PP0 <24>
3 USB_P0- RT394x315CBD118N
4 @
4 USB_P0+ RT394x315CBD118N
5 1 0Ohm 2
5
2
6 RNX6500A
6 USB_P1-
7
D 7 USB_P1+ @
D
8
8 RNX6501B 3 4
9 0Ohm
9
10 LINE2_JD <36> USB_P1-
10 USB_PN1 <24>
11 SPDIF_JD <36>
5
11
12
2
12 LINE1_JD <36> LX6501
13 MIC1_JD <36>
13 90Ohm/100Mhz
14 SPDIF1_OUT <36>
14 H6504
15 AC_HP_R_CON <37>
15 H6514
16
3
16 AC_HP_L_CON <37> USB_P1+
1
17 C6501 USB_PP1 <24> 1
0
17 LINEIN_R <36> NP_NC
18 LINEIN_L <36> 100PF/50V 1 2 5
18 @ NP_NC GND1 GND4
22 19 1 2 2 5 3 4
2
SIDE1 19 0Ohm GND1 GND4 GND2 GND3
20 MIC1_VREFOUT <36> RNX6501A 3 4
20 GND2 GND3
R2.0
2
GND_AUDIO WTOB_CON_20P GND_AUDIO
7
R6503 RT394x315CBD118N
GND_AUDIO 4.7KOhm RT394x315CBD118N
1
MIC_IN_AC_E <36> Screw Hole B
6
R1.2--11 H6505 H6507
1 CT268B158D138 1 CT268B158D138
D6501 @
2
USB_P0- 6 1 USB_P0+ H6509 H6510
1 CT268B158D138 1 CT268B158D138
5
+5V_USB01 5 2
Screw Hole C
C USB_P1- 4 3 USB_P1+ C
2
IP4220CZ6
H6526
1
NP_NC
2
3
GND1 GND4
5
4
Screw Hole F Screw Hole H
GND2 GND3
：
LINE2_JD C6502 1 2 100PF/50V
@
LINE1_JD C6503 1 2 100PF/50V
@ C110D110N
LINEIN_R C6504 1 2 100PF/50V nb_h_crt413x413bd110n_v4
@
Q
LINEIN_L C6505 1 2 100PF/50V
@
MIC_IN_AC_E C6506 1 2 100PF/50V
@ H6523
MIC1_JD C6507 100PF/50V H6527
1 2
@ 1
Q
AC_HP_L_CON C6508 100PF/50V NP_NC
1 2 1 2 5 Screw Hole I Screw Hole J
@ NP_NC GND1 GND4
2 5 3 4
AC_HP_R_CON C6509 100PF/50V GND1 GND4 GND2 GND3
1 2 3 4
@ GND2 GND3 H6517
GND_AUDIO RT425X346CBD110N 1 6
RT354X346CBD102N NP_NC1GND5
2 5
nb_h_rt354x346cbd102n_p2_v4 NP_NC2GND4
3 4
GND2 GND3
流
2DRILL_D102N_D108N
H6525 H6524
B +3VS +3VS <29,48,80,91,92> B
1 6 1
Screw Hole K Screw Hole L
+5V +5V <31,36,44,45,52,56,57,69,91> NP_NC1GND5 NP_NC
2 5 2 5
NP_NC2GND4 GND1 GND4 H6518 H6519
3 4 3 4
GND2 GND3 GND2 GND3
1 1
NP_NC NP_NC
2 5 2 5
2DRILL CRT729X391DB110N GND1 GND4 GND1 GND4
3 4 3 4
GND2 GND3 GND2 GND3
交
nb_h_2d_do108x140n_v4 nb_h_crt729x391bd110n_p2_v4
RT394x325BD110N C110D110N
Screw Hole M
纸
H6522
1
NP_NC
2 5
GND1 GND4
3 4
GND2 GND3
C315D110N
图
A A
H6529 H6528
1 1 6
NP_NC NP_NC1GND5
5 2 2 5
GND4 GND1 NP_NC2GND4
4 3 3 4
GND3 GND2 GND2 GND3
RT315X335CBD110N 2DRILL
nb_h_rt315x335cbd110n_p2_v4 nb_h_2d_do140x108n_p2_v4
Title : ME_CONN,Skew Hole
Engineer: Kenny Wu
www.vinafix.vn
BU2/RD1
C G60J 1.4
5 4 3 2 1
5 4 3 2 1
+3VS +3VS <29,48,80,91,92>
+1.8VS +1.8VS <6,26,38,57,70,85>
2 8 D
0 5
6 7
C
5 2 C
2
Q：
Q
流
B B
交
E-SATA connector
J6601
1 8
CX6601 2 ESATA_TXP_C 1 P_GND1
<20> SATA_TXP5 1 0.01UF/16V 2 10
CX6602 2 2 P_GND3
<20> SATA_TXN5 1 0.01UF/16V ESATA_TXN_C 3 12
3 NP_NC1
4
CX6603 2 4
1 0.01UF/16V ESATA_RXN_C 5 13
纸
<20> SATA_RXN5 5 NP_NC2
<20> SATA_RXP5 CX6604 2 1 0.01UF/16V ESATA_RXP_C 6 11
6 P_GND4
7 9
7 P_GND2
SATA_CON_7P
12G15110007P
D6601 @
ESATA_TXN_C 6 1 ESATA_TXP_C
图
+3VS
5 2
A A
ESATA_RXN_C 4 3 ESATA_RXP_C
IP4220CZ6
Title : ESA_ESATA
Engineer: Kenny Wu
www.vinafix.vn
BU2/RD1
C G60J 1.4
5 4 3 2 1
5 4 3 2 1
2 8 D
0 5
6 7
C
5 2 C
2
Q：
Q
流
B B
交
纸
+3VS +3VS <29,48,80,91,92>
+1.8VS +1.8VS <6,26,38,57,70,85>
+V_NVRAM_VCCQ +V_NVRAM_VCCQ <26>
图
A A
Title : ONFI
Engineer: Kenny Wu
www.vinafix.vn
BU2/RD1
C G60J 1.4
5 4 3 2 1
5 4 3 2 1
2 8 D
0 5
6 7
C
5 2 C
2
Q：
Q
流
B B
交
纸
图
A A
Title : OTH_LCM
Engineer: Kenny Wu
www.vinafix.vn
BU2/RD1
C G60J 1.4
5 4 3 2 1
5 4 3 2 1
May to be deleted..
8
+3V +3V <24,33,43,45,57,61,64,91>
+3VS +3VS <29,48,80,91,92>
2
D D
5
+3V +3V +VDD
+VDD +VDD +VDD
1 @ 2
R6904 0Ohm 1 @ 2 MODE
1
R6905 10KOhm
C6901 U6901
0
0.1UF/10V 0Ohm 2 @ 1 R6901 SCL_MCU 1 20 SDA_MCU R6902 1 @ 2 100Ohm
<7,16,17,28,29,38,44,53> SMB_CLK_S SMB_DAT_S <7,16,17,28,29,38,44,53>
2
+VDD P3_5/SSCK/SCL/CMP1_2 P3_4/SCS#/SDA/CMP1_1

@ 1 TXD_1 2 19 1
T6901 RST# P3_7/CNTR0#/SSO/TXD1 P3_3/TCIN/INT3#/SSI00/CMP1_0 T6903
3 18 1
XOUT RESET# P1_0/KI0#/AN8/CMP0_0 T6904
4 17 1
XOUT/P4_7(1) P1_1/KI1#/AN9/CMP0_1 T6905
5 16
VSS/AVSS P4_2/VREF
1
7
XIN 6 15
R6906 XIN/P4_6 P1_2/KI2#/AN10/CMP0_2 T6906
7 14 1
@ MODE VCC/AVCC P1_3/KI3#/AN11/TZOUT
8 13
X6901 10KOhm T6902 RXD_1 MODE P1_4/TXD0
1 9 12
XIN 1 2 XOUT @ SBAR_LED_EN 0Ohm @ P4_5/INT0#/RXD1 P1_5/RXD0/CNTR01/INT11#
2 1 R6903 10 11
2
RST# P1_7/CNTR00/INT10# P1_6/CLK0/SSI01
6
20Mhz R5F211A2SP
1
1
C6904 C6903 @
10PF/50V 10PF/50V C6902
2
@ @ 0.1UF/10V
2
@
2
+3VS
1
5
R6908
LED CONTROL For GAME LED
10KOhm
1 2 @
<30> GAME_LED_EC#
2
C SL6900 0402 C
1 2
+VDD +VDD GAME_LED# <45>
C6916 R2.0--1
0.1UF/10V
2
@ Q6901 3
1
C
C6906 C6905 SBAR_LED_EN 1 B PMBS3904
0.1UF/10V 0.1UF/10V @
2
@ @ E
2
For EMI request
Q：
Q
C6907 @ C6923 @
+5V 1 2 +1.05VS 1 2 +VCORE
0.1UF/10V 0.1UF/10V
C6908 @ C6924 @
+5V 1 2 +1.05VS 1 2 +VCORE
流
0.1UF/10V 0.1UF/10V
C6909 @ C6925 @
B B
+5V 1 2 +VCORE 1 2
0.1UF/10V 0.1UF/10V
C6910 @ C6926 @
+5V 1 2 +3VS +VCORE 1 2
0.1UF/10V 0.1UF/10V
C6911 @ C6927 @
交
+5V 1 2 +3VS +VCORE 1 2
0.1UF/10V 0.1UF/10V
C6912 @ C6928 @
+5V 1 2 +3VS +VCORE 1 2
0.1UF/10V 0.1UF/10V
C6913 @ C6929 @
+5V 1 2 +3VS +3VS 1 2 +1.5V
0.1UF/10V 0.1UF/10V
C6914 @ C6930 @
纸
+1.05VM 1 2 +3VS 1 2 +1.5V
0.1UF/10V 0.1UF/10V
C6915 @ C6931 @
+1.05VM 1 2 +3VS 1 2 +1.5V
0.1UF/10V 0.1UF/10V
C6917 @ C6932 @
+1.05VM 1 2 +3VS +3VS 1 2 +1.5V
0.1UF/10V 0.1UF/10V
图
C6918 @ C6933 @
+1.05VM 1 2 +3VS +3VS 1 2 +1.5V
0.1UF/10V 0.1UF/10V
C6919 @ C6934 @
+1.05VM 1 2 +3VS +3VS 1 2
A 0.1UF/10V 0.1UF/10V A
C6920 @ C6935 @
+1.05VM 1 2 +1.05VS +3VS 1 2
0.1UF/10V 0.1UF/10V
C6921 @ C6936 @
+1.05VM 1 2 +1.05VS +3VS 1 2
0.1UF/10V 0.1UF/10V
C6922 @ C6937 @
+1.05VS 1 2
0.1UF/10V
+3VS 1 2
0.1UF/10V
Title : OTH_GAME-LED
Engineer: Kenny Wu
www.vinafix.vn
BU2/RD1
C G60J 1.4
5 4 3 2 1
5 4 3 2 1
Main Board
1 2 SL7012 CLK_PCIE_PEG
<21> CLK_PCIE_PEG_PCH 0402
PCIENB_RXN[15:0] <3>
1 2 SL7013 CLK_PCIE_PEG# PCIENB_RXP[15:0] <3>
<21> CLK_PCIE_PEG#_PCH 0402
PCIEG_RXN[15:0] <3>
R1.2--2 PCIEG_RXP[15:0] <3>
8
R1.4--7
AC mode: AC/BATT# =HIGH
J7001A AC_BAT_SYS
Battery mode: AC/BATT# =LOW
2
HDMI_TXP0 239 132 PCIEG_RXP0 J7001B
<48>
<48>
HDMI_TXP0_DGPU
HDMI_TXN0_DGPU HDMI_TXN0 237
DVI_A_TX0 PEX_TX0
130 PCIEG_RXN0 4A 1 17
D
HDMI_TXP1 DVI_A_TX0# PEX_TX0# PCIENB_RXP0 PWR_SRC1 GND1 D
<48> HDMI_TXP1_DGPU 233 129 3 19
DVI_A_TX1 PEX_RX0 PWR_SRC2 GND2
1
<48> HDMI_TXN1_DGPU HDMI_TXN1 231 127 PCIENB_RXN0 5 20
HDMI_TXP0 DVI_A_TX1# PEX_RX0# PWR_SRC3 GND3
1 @ 2 <48> HDMI_TXP2_DGPU HDMI_TXP2 227 C7013 C7014 C7015 7 21
R7009 300Ohm HDMI_TXN2 DVI_A_TX2 PCIEG_RXP1 10UF/25V 0.1UF/25V 0.1UF/25V PWR_SRC4 GND4
<48> HDMI_TXN2_DGPU 225 126 9 22
2
HDMI_TXN0 DVI_A_TX2# PEX_TX1 PCIEG_RXN1 +1.8VS PWR_SRC5 GND5
2 1 124 11 23
C7001 0.1UF/16V PEX_TX1# PCIENB_RXP1 +1.8VS_MXM PWR_SRC6 GND6
@ HDMI_CLKP 221
DVI PEX_RX1
123
121 PCIENB_RXN1 JP7001
13
15
PWR_SRC7 GND7
24
41
HDMI_TXP1 1 @ 2
<48> HDMI_CLKP_DGPU
<48> HDMI_CLKN_DGPU HDMI_CLKN 219
DVI_A_CLK PEX_RX1#
1 2
3.5A GND
PWR_SRC8 GND8
44
DVI_A_CLK# 1 2 GND9
1
R7010 300Ohm 120 PCIEG_RXP2 C7016 47
HDMI_TXN1 PEX_TX2 PCIEG_RXN2 3MM_OPEN_5MIL 4.7UF/6.3V GND10
2 1 217 118 50
0
<48> HDMI_HPD_DGPU DVI_A_HPD PEX_TX2# GND11
C7002 0.1UF/16V LVDS_LCLKN_VGA 1 2 eDP_HPD_VGA 193 117 PCIENB_RXP2 6 53
2
@ R7020 @ 0Ohm DVI_B_HPD/GND PEX_RX2 PCIENB_RXN2 1V8RUN_1 GND12
115 8 56
PEX_RX2# 1V8RUN_2 GND13
HDMI_TXP2 1 @ 2 Place R as close as to LVDS_LCLKN net. 10
1V8RUN_3 GND14
59
R7011 300Ohm <48> HDMI_DDC_CLK_DGPU 232 114 PCIEG_RXP3 GND 12 62
HDMI_TXN2 DDCB_CLK PEX_TX3 PCIEG_RXN3 1V8RUN_4 GND15
2 1 <48> HDMI_DDC_DATA_DGPU 230 112 14 65
DDCB_DAT PEX_TX3# 1V8RUN_5 GND16
7
C7003 0.1UF/16V <46> DDC_CLK_VGA 155 111 PCIENB_RXP3 VGA_PWR_EN 16 68
@ DDCA_CLK PEX_RX3 PCIENB_RXN3 RUNPWROK GND17
<46> DDC_DATA_VGA 157 109 18 71
HDMI_CLKP DDCA_DAT PEX_RX3# 5VRUN GND18
1 @ 2 74
R7012 300Ohm PCIEG_RXP4 +5VS GND19
108 77
HDMI_CLKN PEX_TX4 PCIEG_RXN4 +3VS GND20
C7004
2 1
0.1UF/16V PEX_TX4#
106
105 PCIENB_RXP4 0.5A GND21
80
83
1.5A
6
@ PEX_RX4 PCIENB_RXN4 GND22
<46> CRT_B_VGA 156 103 238 86
VGA_BLU PEX_RX4# 3V3RUN_1 GND23
1
<46> CRT_R_VGA 148 240 89
VGA_RED 3V3RUN_2 GND24
1
PCIEG_RXP5 C7017
Please set them near
<46> CRT_G_VGA
<46> CRT_HSYNC_VGA
152
151
VGA_GRN VGA PEX PEX_TX5
102
100 PCIEG_RXN5 0.1UF/10V C7018 C7019
242
3V3RUN_3 GND25
92
95
2
VGA_HSYNC PEX_TX5# PCIENB_RXP5 4.7UF/6.3V 0.1UF/10V GND26
the MXM connector. <46> CRT_VSYNC_VGA 153 99 98
2
VGA_VSYNC PEX_RX5 PCIENB_RXN5 GND27
97 101
2
PEX_RX5#
PEX_TX6
96 PCIEG_RXP6
GND 2
234
1V8RUN_6
2V5RUN
GND28
GND29
GND30
104
107
R1.0e
<45> L_VDDEN SL7006 2 1 224 94 PCIEG_RXN6 2V5_RUN: NV no use. GND 110
SL7007 0402 LVDS_PPEN PEX_TX6# PCIENB_RXP6 GND31
<45> LCD_BACKEN 2 1 228 93 113
0402 LVDS_BLEN PEX_RX6 PCIENB_RXN6 GND32
226 91 116
LVDS_BL_BRGHT PEX_RX6# GND33
5
<20> ACZ_SYNC_VGA 141 119
PCIEG_RXP7 RSVD1 GND34
<71> LVDS_U0P_VGA 186 90 <20> ACZ_BCLK_VGA 143 122
LVDS_UTX0 PEX_TX7 PCIEG_RXN7 RSVD2 GND35
<71> LVDS_U0N_VGA 184 88 165 125
LVDS_UTX0# PEX_TX7# PCIENB_RXP7 +3VS RSVD3 GND36
<71> LVDS_U1P_VGA 180 87 167 128
LVDS_UTX1 PEX_RX7 PCIENB_RXN7 RSVD4 GND37
<71> LVDS_U1N_VGA 178 85 169 131
LVDS_UTX1# PEX_RX7# AC/BATT# GND38
C <71> LVDS_U2P_VGA 174 195 138 C
2
LVDS_UTX2 RSVD5 GND39
1
<71> LVDS_U2N_VGA 172 84 PCIEG_RXP8 197 142
LVDS_UTX2# PEX_TX8 PCIEG_RXN8 R7000 RSVD6 GND40
168 82 146 ACZ_RST#_VGA <20>
LVDS_UTX3 PEX_TX8# PCIENB_RXP8 1KOhm GND41
166 81 150
LVDS_UTX3# PEX_RX8 PCIENB_RXN8 GND42
79 241 154
PEX_RX8# GND63 GND43
<71> LVDS_UCLKP_VGA 162 236 158
2
LVDS_UCLK PCIEG_RXP9 SL7017 GND62 GND44
<71> LVDS_UCLKN_VGA 160 78 2 1 235 163 1 SL7016 2
LVDS_UCLK# PEX_TX9 PCIEG_RXN9 0402 GND61 IGP_3 0402
76 229 164
PEX_TX9# GND60 GND45
3
<71> LVDS_L0P_VGA 216 75 PCIENB_RXP9 3
D 223 170 1 SL7005 2
LVDS_LTX0 PEX_RX9 GND59 GND46 0402 SPDIF2_OUT <36>
PCIENB_RXN9 1 SL7015
<71>
<71>
LVDS_L0N_VGA
LVDS_L1P_VGA
214
210
LVDS_LTX0# LVDS PEX_RX9#
73
Q7000
218
212
GND58 IGP_6
175
176 0402
2
LVDS_LTX1 PCIEG_RXP10 GND57 GND47
<71> LVDS_L1N_VGA 208 72 <30,88> AC_IN_OC# 11 2N7002 211 181 1 SL7014 2
LVDS_LTX1# PEX_TX10 GND56 IGP_9 0402
：
<71> LVDS_L2P_VGA 204 70 PCIEG_RXN10 G 206 182
202
LVDS_LTX2 PEX_TX10#
69 PCIENB_RXP10 2 S 205
GND55 GND48
187
<71> LVDS_L2N_VGA
2
LVDS_LTX2# PEX_RX10 PCIENB_RXN10 GND54 GND49
198 67 200 188
LVDS_LTX3 PEX_RX10# GND53 GND50
196 199 194
LVDS_LTX3# PCIEG_RXP11 GND52 GND51
66
PEX_TX11 PCIEG_RXN11 MXM_230P
<71> LVDS_LCLKP_VGA 192 64
Q
LVDS_LCLK PEX_TX11# PCIENB_RXP11 GND
<71> LVDS_LCLKN_VGA 190
LVDS_LCLK# PEX_RX11
63
PCIENB_RXN11
12G16180230V GND
61 GND GND
PEX_RX11#
R2.0--1 SL7014,SL7015,SL7016:
60 PCIEG_RXP12 to compatible with Z97V
PEX_TX12 PCIEG_RXN12
58
PEX_TX12# PCIENB_RXP12
185 57
Q
IGP_11 PEX_RX12 PCIENB_RXN12
183 55
IGP_10 PEX_RX12#
179
IGP_8 PCIEG_RXP13
177 54
IGP_7 PEX_TX13 PCIEG_RXN13
173
171
IGP_5 IGP PEX_TX13#
52
51 PCIENB_RXP13
IGP_4 PEX_RX13 PCIENB_RXN13
49
PEX_RX13#
<20> ACZ_SDOUT_VGA 161
IGP_2 PCIEG_RXP14
<20> ACZ_SDIN2_VGA 159 48
IGP_1 PEX_TX14 PCIEG_RXN14
46
PEX_TX14# PCIENB_RXP14
215 45
IGP/DVI_B_TX0 PEX_RX14 PCIENB_RXN14
213 43
IGP/DVI_B_TX0# PEX_RX14#
流
LVDS_U1P_VGA 3 @ 4 RN7001B eDP_L1P_VGA 209
0OHM IGP/DVI_B_TX1
LVDS_U1N_VGA 1 @ 2 RN7001A eDP_L1N_VGA 207 42 PCIEG_RXP15
0OHM IGP/DVI_B_TX1# PEX_TX15
LVDS_U0P_VGA 3 @ 4 RN7002B eDP_L0P_VGA 203 40 PCIEG_RXN15 H7005 H7006
B 0OHM IGP/DVI_B_TX2 PEX_TX15# B
LVDS_U0N_VGA 1 @ 2 RN7002A eDP_L0N_VGA 201 39 PCIENB_RXP15 CT217B67D47 CT217B67D47
0OHM IGP/DVI_B_TX2# PEX_RX15
37 PCIENB_RXN15
PEX_RX15#
Place RN as close as to LVDS_UX* net. 191
IGP/DVI_B_CLK CLKREQ_PEG# <21>
189 137
IGP/DVI_B_CLK# CLK_REQ# PCIEG_RST#
139
PEX_RST#
GND GND
CLK_PCIE_PEG
TV-OUT PEX_REFCLK
135
133 CLK_PCIE_PEG#
PEX_REFCLK#
交
T7708 1 140
T7707 TV_Y/HDTV_Y/TV_CVBS
1 136 149 VGA_THERM# <32>
T7706 TV_C/HDTV_Pr THERM# SL7002 H7003 H7004
1 144 134
TV_CVBS/HDTV_Pb PRSNT1# PRSNT2# U5F-M-EXPREE U5F-M-EXPREE
38 1 2
PRSNT2# 0402
4
1V8RUN_7
Shared with edP_AUX. SMBUS NP_NC1
243 +1.8VS R2.0--1
SL7008
<71> EDID_CLK_VGA
SL7009
2
2 0402
1
1
222
220
DDCC_CLK OTHER NP_NC2
244
245
GND
<71> EDID_DAT_VGA 0402 DDCC_DAT PIN245
246
SL7010 PIN246
<28,50> SMB1_CLK_S 2 1 147
SL7011 0402 SMB_CLK
2 1 145
纸
<28,50> SMB1_DAT_S 0402 SMB_DAT
MXM_230P
GND
12G16180230V
PCIEG_RST# 1 2 BUF_PLT_RST# <3,7,24,30,32,33,38,40,43,53,64>
SL7003 0402
图
A A
VGA_PWR_EN 1 2 SUSB#_PWR <81,82,83,85,91,93>

SL7004 0402
Title : VGA_MXM(2.1a)
Engineer: Kenny Wu
www.vinafix.vn
BU2/RD1
C G60J 1.4
5 4 3 2 1
5 4 3 2 1
+5VS +5VS <27,30,31,37,45,46,48,50,51,56,57,70,80,91>
2 8
<70> LVDS_LCLKP_VGA 1 2 LVDS_LCLKP <45>
CFD 0402 SL7100
D D
<70> LVDS_LCLKN_VGA 1 2 LVDS_LCLKN <45>
CFD 0402 SL7101
<70> LVDS_L0N_VGA 1 2 LVDS_L0N <45>
CFD 0402 SL7102
5
<70> LVDS_L0P_VGA 1 2 LVDS_L0P <45>
CFD 0402 SL7103
CFD 0402 SL7104
CFD 0402 SL7105
0
CFD 0402 SL7106
CFD 0402 SL7107
<70> LVDS_UCLKP_VGA 1 2 LVDS_UCLKP <45>
0402 SL7108
7
CFD
<70> LVDS_UCLKN_VGA 1 2 LVDS_UCLKN <45>
CFD 0402 SL7109
<70> LVDS_U0N_VGA 1 2 LVDS_U0N <45>
CFD 0402 SL7110
<70> LVDS_U0P_VGA 1 2 LVDS_U0P <45>
6
CFD 0402 SL7111
CFD 0402 SL7112
<70> LVDS_U1N_VGA 1 2 LVDS_U1N <45>
CFD 0402 SL7113
1 2
2
<70> LVDS_U2N_VGA 0402 SL7114 LVDS_U2N <45>
CFD
CFD 0402 SL7115
<70> EDID_CLK_VGA 1 2 EDID_CLK <45>

CFD 0402 SL7116
5
<70> EDID_DAT_VGA 1 2 EDID_DATA <45>
CFD 0402 SL7117
C C
2
Q：
Q
流
B B
交
纸
图
A A
Title : VGA(2)_LVDS Switch

Engineer: Kenny Wu
www.vinafix.vn
BU2/RD1
C G60J 1.4
5 4 3 2 1
5 4 3 2 1
2 8 D
0 5
6 7
C
5 2 C
2
Q：
Q
流
B B
交
纸
图
A A
Title : VGA(3)_****
www.vinafix.vn
Custom G60J 1.4
5 4 3 2 1
5 4 3 2 1
2 8 D
0 5
6 7
C
5 2 C
2
Q：
Q
流
B B
交
纸
图
A A
Title : VGA(4)_****
www.vinafix.vn
Custom G60J 1.4
5 4 3 2 1
5 4 3 2 1
2 8 D
0 5
6 7
C
5 2 C
2
Q：
Q
流
B B
交
纸
图
A A
Title : VGA(5)_****
www.vinafix.vn
Custom G60J 1.4
5 4 3 2 1
5 4 3 2 1
2 8 D
0 5
6 7
C
5 2 C
2
Q：
Q
流
B B
交
纸
图
A A
Title : VGA(6)_****
www.vinafix.vn
Custom G60J 1.4
5 4 3 2 1
5 4 3 2 1
2 8 D
0 5
6 7
C
5 2 C
2
Q：
Q
流
B B
交
纸
图
A A
Title : VGA(7)_****
www.vinafix.vn
Custom G60J 1.4
5 4 3 2 1
5 4 3 2 1
2 8 D
0 5
6 7
C
5 2 C
2
Q：
Q
流
B B
交
纸
图
A A
Title : VGA(8)_****
www.vinafix.vn
Custom G60J 1.4
5 4 3 2 1
5 4 3 2 1
2 8 D
0 5
6 7
C
5 2 C
2
Q：
Q
流
B B
交
纸
图
A A
Title : VGA(9)_****
www.vinafix.vn
Custom G60J 1.4
5 4 3 2 1
5 4 3 2 1
2 8 D
0 5
6 7
C
5 2 C
2
Q：
Q
流
B B
交
纸
图
A A
Title : VGA(10)_****
www.vinafix.vn
Custom G60J 1.4
5 4 3 2 1
5 4 3 2 1
TPC28T +1.05VO
1016
T8035
TPC28T
1 2 VR_VID0 T8062 1 2
1
R8026 1KOhm_0402 @ TPC28T R8025 47KOhm_0402
1 2 VR_VID1 T8069 1 2
1
R8096 1KOhm_0402 @ TPC28T R8081 47KOhm_0402
1 2 VR_VID2 T8059 1 2
1
R8056 1KOhm_0402 @ TPC28T R8054 47KOhm_0402 AC_BAT_SYS
1 2 VR_VID3 T8064 1 2
1
8
R8098 1KOhm_0402 TPC28T R8067 47KOhm_0402 @ AC_BAT_SYS
1 2 VR_VID4 T8075 1 2
1000PF/25V
R8058 1KOhm_0402 TPC28T R8057 47KOhm_0402 @ 09/04/17 09/05/04
C8039 1UF/25V_0805
C8050 10UF/25V_1206
C8041 10UF/25V_1206
1 2 VR_VID5 T8066 1 2
c0805_h57
SIR474DP-T1-GE3
R8085 1KOhm_0402 @ R8060 47KOhm_0402
1
VR_VID6
SIR474DP-T1-GE3
1 2 1 2 + 68UF/25V + 68UF/25V
1
2
Q8007
Q8000
c1206_h75
c1206_h75
R8097 1KOhm_0402 R8071 47KOhm_0402 @ D D CE8008 CE8011
IMON=Gm(IMON) * [ (Vcsp1-Vcsn1) + (Vcsp2-Vcsn2) ] @ @ @
D D
C8045
Vcore=1.0125V
2
RIMON = 0.9V / [ IMAX * Rsense(MIN) * Gm(IMON_MIN)] 4
G S
4
G S
09/06/05
Gm(IMON) = 2.4mS , Gm(IMON_MIN) = 2.36mS
5
@ @
1
2
3
1
2
3
(Max:51A)
C8071 @ TPC28T
2 1 CSN3 U8000B T8057 +VCORE
C8049 @ 42 L8001
GND2
0
1000PF/50V_0402 C8070 2 1 CSP1 43 1 2
1
2 GND3
2
44
GND4
1
Close to C8068 0.22UF/10V 1000PF/50V_0402 45 0.36UH
GND5
2
SI7658ADP-T1-GE3
SHORT_PIN
SHORT_PIN
0.1UF/10V_0402 @ 1% R8093 TOKO/FDU1040-R36M
1
5
U8000
Q8001
Q8005
JP8000
JP8001
Close to R8021 Irat=32A
220UF/2V_7343
470UF/2.5V_7343
NEC-TOKIN/TEPSGV0E477M9-12R
2Ohm_0402
PANASONIC/EEFSX0D221ER <G>
MAX17030GTL D D
1
SI7658ADP-T1-GE3
2.2Ohm_1206
U8000
7
R8094
2
2
2
1% 2Ohm_0402 0.1UF/10V_0402 4 4
1
C8035 C8038 G S G S
1
C8069 @ C8037 @ @ 09/04/17 @ @ + +
2
1
VR_VID6 <19>
A_GND 2 1 CSP3 A_GND 2 1 CSN1 0.22UF/10V @ @
1
2
3
1
2
3
VR_VID5 <19>
VR_VID4 <19>
2
6
R8055
1.8KOHM_0402
1000PF/50V_0402 1000PF/50V_0402 R8075
2
VR_VID3 <19>
CE8015
CE8010
1500PF/50V 1 2 Close to
VR_VID2 <19>
C8027 1%
VR_VID1 <19>
Close to 40.2KOhm_0402 Phase 1
2
VR_VID0 <19>
2.49KOhm_0402 1%
Inductor
1
Phase 1 R8063
2
Low_side +3VS @ 1 2 1 2
1
TPC28T 2009.07.01 1%
T8085 MOSFET R8092 (Typ: Rdson = 2.3m OHM) CSP1
100KOhm_0402 R8065 10KOHM
13KOhm_0402 @ R0603(0ohm) C8036 (Max: Rdson = 2.8m OHM) CSN1 R8053
1
VCC 1 2 1 2 1% 1 2 2 1 3%
2
5
R8068
41
40
39
38
37
36
35
34
33
32
31
1% R8061 100KOhm 0.22UF/25V_0805 AC_BAT_SYS
<6> I_MON
RIMON 1%
GND1
CSN1
CSP1
D6
D5
D4
D3
D2
D1
D0
PGD_IN
09/04/17 09/05/04
C8054 1UF/25V_0805
C8052 10UF/25V_1206
C8056 10UF/25V_1206
1000PF/25V
R8069 10Ohm_0805 C8040 R8072 1%
C 2 1 VCC 0.1UF/25V 2 1 1 2 1 30 2009.07.01 C
+5VS CSN3 BST1
5
Q8004
2
SIR474DP-T1-GE3
SIR474DP-T1-GE3
1KOhm_0402 2 29 D D
CSP3 LX1
1
Q8003
3
THRM U8000A DH1
28 + 68UF/25V + 68UF/25V
1
1
VSSSENSE 1 2 4 27 CE8013 CE8014
C8059 R8079 9.53KOhm R8070 IMON DL1 VDD @ @
5 MAX17030GTL 26 1 2 +5VS 4 4
ILIM VDD
C8053
1UF/10V TPC28T A_GND 1 21% 1 R8084 2 6 25 G S G S
2
2
T8080 137KOHM 16.2KOHM TIME VRHOT# R8077 R0603(0ohm)
7 24
A_GND VCC DL2 @
1% 1% 8 23 09/06/05 09/07/01
1
2
3
1
2
3
FB DH2 @
1 2 1 2 9 22
1
<6> VCCSENSE
DPRSLPVR
10Ohm_0402 R8080 Change to 137K 10
FBAC LX2
21 (Thermal need to solve audio noise issue)
DRVSKP#
GNDS BST2
CLKEN#
PWRGD
1UF/10V
R8074 @ 1% R8082 Rdroop
SHDN#
1%
1
PWM3
CSN2
CSP2
+VCORE 1 2 6.81KOhm TPC28T DCR = 1m OHM
PSI#
TON
1
1
100Ohm_0402 C8044 C8051 R8064 T8060
：
1% 1000PF/50V_0402 1000PF/50V_0402 R0603(0ohm) L8000
2
@ 1 2 2 1 1 2
2
11
12
13
14
15
16
17
18
19
20
1
C8057
TPC28T A_GND R8052
T8087
2009.07.01 1KOhm1% 0.22UF/25V_0805 0.36UH
1
2
R8051 220KOhm_0402
SI7658ADP-T1-GE3
SHORT_PIN
SHORT_PIN
R8086 @ C8047 TOKO/FDU1040-R36M
220UF/2V_7343
CE8012 470UF/2.5V_7343
5
5
Q8002
Q8006
JP8002
JP8003
SI7658ADP-T1-GE3
1 2 2009.07.01 R8022 Irat=32A
2 1
<6> VSSSENSE D D
Q
2.2Ohm_1206
1
VDD
R0402 2 1CSN2 0.1UF/10V_0402
1
1
R8066 4 4 + +
1
2
100Ohm_0402 1% C8046 @ C8024 @ C8034 C8048 1% G S G S @
0.1UF/10V_0402
1
C8060
@ 1000PF/50V_0402 1000PF/50V_0402 @ 09/04/17 @
2
0.22UF/10V @ @
1
1 1
1
2
3
1
2
3
CE8009
A_GND
Q
Close to
2
1
R8095 1500PF/50V @
2
U8000
AC_BAT_SYS
R8062
1.8KOHM_0402
2Ohm_0402 C8028
1%
2
1000PF/50V_0402 1%
40.2KOhm_0402 R8073 Close to @
TPC28T 2 1CSP2 1 2
2
T8074 @ 1% Phase 2
1
<93> CPU_VRON_PWR R8076 C8042 @ (Typ: Rdson = 2.3m OHM) 2.49KOhm_0402
1 2 (Max: Rdson = 2.8m OHM) R8083 R8047 10KOhm Inductor
1
<30> CPU_VRON
Fsw = 1/(CTON x (RTON + 6.5k))=271.5Hz 1 2 1 2
1
100KOhm_0402
1% @ C8043 CTON=16.26pF,RTON=220K 1% 3%
CSP2
流
0.047UF/16V_0402
2
TPC28T
T8070 CSN2
B B
1%
1 R8050 2 499Ohm_0402 JP8004
1
<6> PM_DPRSLPVR TPC28T A_GND 1 2

T8056
2009.07.01 R8048
SHORT_PIN
1 2
1
<6> PM_PSI# @
R0402(0ohm)
78PCS
AC_BAT_SYS
R8000 2 100KOhm TPC28T
交
+3VS 1
T8079 09/04/17 09/05/04
C8062 1UF/25V_0805
C8055 10UF/25V_1206
C8063 10UF/25V_1206
1000PF/25V
2009.07.01 R8023 09/06/05
1 2 @
1
<29> CLK_EN#
5
5
Q8008
SIR474DP-T1-GE3
SIR474DP-T1-GE3
TPC28T D D
1
Q8009
R0402(0ohm) T8051 + 68UF/25V + CE8019
1
2009.07.01 R8078 @ CE8018 68UF/25V
1 2 4 4 @ @
1
<30,92> VRM_PWRGD
C8061
G S G S
2
R0402(0ohm)
1
2
3
1
2
3
@
纸
(Max:51A)
C8067 TPC28T DCR = 1m OHM
0.22UF/10V T8068 +VCORE
L8002
1 2 1 2
1
0.36UH
2
2
SHORT_PIN
SHORT_PIN
+1.05VO TOKO/FDU1040-R36M
220UF/2V_7343
CE8017 470UF/2.5V_7343
5
5
Q8010
Q8011
JP8005
JP8006
SI7658ADP-T1-GE3
SI7658ADP-T1-GE3
R8001 PM_DPRSLPVR PM_PSI# IO_current VO_action R8091 D D R8024 Irat=32A

PM_DPRSLPVR 1 2 R0603(0ohm) 2.2Ohm_1206 09/05/04
9
8
+5VS
H L <3A One Phase 2009.07.01
2
1
1KOhm
0.1UF/10V_0402
图
4 4 + +
GND2
LX
DH
1
C8064
R8003 L H >15A Three Phase G S G S
1
1KOhm_0402 1 6 09/04/17 @ @
@ BST U8003 SKIP# @
L L <15A
1
2
3
1
2
3
2
1
CE8016
MAX8791GTA @ 1500PF/50V @
1
H H X 2 5 C8029
PWM VDD
GND1
A A
2
2
R8088
1.8KOHM_0402
DL
1
C8066
1UF/10V
R8002 @ 1% Close to @
PM_PSI# 2 1 @ 1% 40.2KOhm_0402
3
1 R8089 2 Phase 3
2
2
1KOhm_0402 (Typ: Rdson = 2.3m OHM)

Inductor
1
R8004 TPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28T 2.49KOhm_0402

1KOhm T8048 T8078 T8054 T8077 T8073 T8063 T8050 T8052 T8058 T8065 T8067 T8049 T8089
(Max: Rdson = 2.8m OHM) R8090 R8087 10KOhm
1 2 1 2
09/05/04 +VCORE
1
CSP3 <Variant Name>

2 1 1% 3%
TPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28T
T8091 T8090 T8088 T8055 T8072 T8086 T8082 T8061 T8083 T8071 T8081 T8053 T8084
@ C8065
30PF/50V_0402
CSN3 Title : POWER_VCORE
Engineer: Benson_Lin
www.vinafix.vn
1

Custom G50J 0.3
5 4 3 2 1
5 4 3 2 1
SKIP: TON:(5V/3.3V)
GND : DEM operation; VCC:(200kHz/250kHz)
REF : Ultrasonic Mode operation; REF:(300kHz/375kHz) VENLDO:
VCC : PWM operation. GND:(400kHz/500kHz) Rising Edge:Max:2V;Typ:1.6V;Min:1.2V
8
Falling Edge:Max:1.06V;Typ:1V;Min:0.94V
350mil
82,83,85,91,93 SUSB#_PWR
AC_BAT_SYS
R8128
2
09/07/01 10Ohm
D D
09/04/17 2 1 +5VAO
2
R8123 C8115
1
R0402(0ohm) 09/07/01 R8139 1UF/10V
1
0Ohm MLCC/+/-10% C8113
5
1
R8126 @ @ R8141 1UF/10V
2
R8114 100KOhm 0Ohm MLCC/+/-10%
2
SKIP# R0603(0ohm) 1% @
190mil
1
GND_17020
2
2
09/05/04 GND_17020
0
R8105
0Ohm 160mil R8122 @
r0402_h16 1 2
1
@ 0Ohm 09/04/17 C8102
10UF/25V_1206
MLCC/+/-10%
1
+5VAO
2
09/07/01 0.1UF/50V C8117 AC:LIR=0.33;Iripple=3.31A;Ipk=11.6A
0.1UF/25V
1
5
6
7
8
C8118
C8112 R8146 @ 10UF/25V_1206
C8105
7
R8117
2
2
2
AC:LIR=0.47;Iripple=2.61A;Ipk=6.8A 0.1UF/25V 150KOHM GND_17020 DC:LIR=0.25;Iripple=2.53A;Ipk=11.22A
D
09/04/17 MLCC/+/-10% 1% 1 2 R8142 Q8102
DC:LIR=0.29;Iripple=1.58A;Ipk=6.29A
1
@ C8108 0Ohm SI4134DY-T1-GE3
G
09/05/04
S
1
1
8
7
6
5
@ 4.7UF/6.3V @ VOUT:Typ.=3.32V;Max.=3.388V;Min.=3.253V;T=2.05%
MLCC/+/-10% R0603(0ohm)
4
3
2
1
VOUT:Typ.=5.09V;Max.=5.217V;Min.=4.966V;T=2.5% Q8100 GND_17020 GND_17020
1
SI4134DY-T1-GE3 OCP>12.2A=>OCP setting 8.2A
G
S
OCP>7.15A GND_17020 C8109 40mil
GND_17020 0.22UF/16V
1
2
3
4
2
8
7
6
5
4
3
2
1
+5VO GND_17020 +3VO
40mil 09/07/01 (Max:9.95A)
NC2
LDO
NC1
ENLDO
VIN
VCC
TON
REF
2
(Max:5.5A) DCR:Typ=13.2mOhm;Max=15mOhm Separate GND_17020 DCR:Typ=5.8mOhm;Max=7mOhm
10mil 09/06/05 33 R8124
JP8102 L8101 GND2 +3VO_FB 422KOhm L8100 2.2UH JP8101 @
160mil 9
BYP FB2
32 40mil 400mil
+5VSUS 1
1 2
2 +5VO 1 2 10
11
VOUT1 U8101A ILIM2
31
30
2 1 1 2 +3VO 1
1 2
2
+3VA
FB1 RT8206AGQW VOUT2
POSCAP 150UF/6.3V (7343/D) 20%
CE8101 150UF/6.3V N/A
(0.01A) 3MM_OPEN_5MIL 4.7UH 09/06/05 40mil 12 29 SKIP# 09/07/01 Isat=16A 1MM_OPEN_5MIL (0.12A)
ILIM1 SKIP#
5
Isat=13A R8125 SUS_PWRGD 13 28 R8113 R0603(0ohm) GND_17020 09/06/05
PGOOD1 PGOOD2
@
@ R8115 160KOhm ENBL 14 27 1 2 +5VAO
PANASONIC/EEFCX0G151R
EN1 EN2
2
2.2Ohm@ GND_17020 R8116
1UF/10V
MLCC/+80%-20%
15 26
SANYO/6SVPC220MV
UGATE1 UGATE2
1
+ 5% 16 25 2.2Ohm
CE8105 220UF/6.3V
CE8103 150UF/4V_7343
C C
SANYO/6SVPC220MV
PHASE1 PHASE2
1
8
7
6
5
5
6
7
8
1
r1206 5% +
220UF/6.3V
1
1
LGATE1
LGATE2
+
CE8104
OCP Set Q8103 r1206 C8100
SHORT_PIN
SHORT_PIN
SHORT_PIN
D
+
BOOT1
BOOT2
D
SECFB
1
2
PGND
GND1
PVCC
SI4134DY-T1-GE3 @ 1UF/10V
2
1
2
2
C8103
JP8105
JP8109
JP8104
Q8101 C8110 C8111 @
G
G
2
S
SI4134DY-T1-GE3 0.1UF/25V 09/07/01 0.1UF/25V

2
2
1
C8125 MLCC/+/-10% 09/07/01 MLCC/+/-10% 09/04/17 09/05/04

1
2
3
4
17
18
19
20
21
22
23
24
4
3
2
1
1
@ 1500PF/50V R8118 R8119 C8126
1
1
09/05/04 MLCC/+/-10% @ R0603(0ohm) R0603(0ohm) 1500PF/50V
2
c0603 1 2 1 2 40mil MLCC/+/-10%
2
09/07/01 40mil c0603
DL1 @
(3.3V:375kHz)
(5V:300kHz)
+5VAO GND_17020
2
(Typ: Rdson = 14.5m OHM) R8112
1
JP8108
(Typ: Rdson = 14.5m OHM) C8137 39PF/50V @
(Max: Rdson = 17.5m OHM) 13.3KOhm C8135
2
1
@ (Max: Rdson = 17.5m OHM) C8114 1 2 1% 39PF/50V
1
+5VAO 1 2 +5VA C8134 R8108 1UF/10V @
2
1 2 39PF/50V 30.9KOhm MLCC/+/-10%
1
1MM_OPEN_5MIL @ 1% SECFB 1 2 +3VO_FB
+15VO
Q
2
2
FB1=2V(T=1.25%) R8127 1% C8138
1
2
C8136 GND_17020 200KOhm *SECFB:2V(T=4%) FB1=2V(T=1.25%) 0.1UF/25V
2
0.1UF/25V @
1
2
@ JP8110 @ R8132
1
R8109 39KOHM R8111

20KOhm 2 1 1% U8101B 20KOhm
Q
1% 34 1%
1
SUS_PWRGD GND3
<92> SUS_PWRGD 35
1
SHORT_PIN GND4
36
GND5 09/05/20
GND_17020 37 53PCS
GND_17020 GND6
GND_17020 GND_17020 RT8206AGQW GND_17020 GND_17020
GND_17020 TPC26TTPC26TTPC26TTPC26T
T8110 T8103 T8114 T8120
+5VO
+3VSUS
1
B B
流
JP8107 close to Q8104
TPC26T
JP8107 @ T8125 TPC26TTPC26TTPC26TTPC26T
+12VSUS +5VO T8134 T8132 T8135 T8121
2 1 ENBL 09/07/01
1
1 +5VSUS
1
3
SHORT_PIN
1
AC_BAT_SYS 2 C8122
+3VO 09/07/01 1UF/25V
+3VSUS (Max:0.919A) D8104 MLCC/+/-10% TPC26TTPC26TTPC26TTPC26T
2
1
1
IRF8707PBF C8121 BAT54S 09/07/01 @ T8117 T8107 T8109 T8122
交
0.1UF/25V
8 D S 1 MLCC/+/-10% +3VO
1
7 2 R8133
2
6 3 @ R0603(0ohm)
2
1
5 G 4 C8119 20mil
R8130 0.1UF/25V DL1 +10VO TPC26TTPC26TTPC26TTPC26T
84.5KOhm Q8104 09/07/01 T8123 T8128 T8136 T8124
2
1
TPC26T 1% C8123
1
1
T8129 09/07/01 R8129 2009/01/10 C8120 1UF/25V +3VSUS
1
0.1UF/25V MLCC/+/-10%
2
FORCE_OFF#_PWR MLCC/+/-10%
1 2
Check have or not
1
2
<32,92>
(Max:0.02A)
纸
1 TPC26TTPC26TTPC26TTPC26T
R0603(0ohm)
1
C8104 3 JP8106 @ T8104 T8108 T8116 T8126

2
1000PF/25V +15VO
R8135
Q8106A
2 1
1 2
2
+12VSUS
2
1
1
+5VAO 1 2 2 UM6K1N D8103 C8124 1MM_OPEN_5MIL
R8131 TPC26T 100KOhm_0402 BAT54S 1UF/25V
1
560KOhm T8127 MLCC/+/-10%

1
2
3
TPC26TTPC26TTPC26TTPC26T
Q8106B T8112 T8119 T8101 T8130
1
5 UM6K1N
<30,93> VSUS_ON
VOUT:Typ.=12.256V;Max.=12.962V;Min.=11.571V;T=5.76%
4
1
1
图
A R8136 A
470KOhm_0402
2
TOTAL COUNT ：38 PCS <Variant Name>
Title : POWER_SYSTEM
Custom G50J 0.1
5 4 3 2 1
www.vinafix.vn
5 4 3 2 1
Frequency setting
+5VA F=300KHz-->R8208=845K ohm
F=250KHz-->R8208=1M ohm
1
RT8204AGQW-->0607-003Y000(06G113115010)
R8256
100KOhm_0402 Don't use 0695-00210AS
09/07/01
2
8
6
1
D8200 @ Q8212A 10mil
1SS355 UM6K1N AC_BAT_SYS
2 1 2 100KOhm
R8252 +5VO
C8219 10UF/25V_1206
1
09/07/01
2
3
1
R8200 Q8212B +5VO R8264 D8205
D 09/05/04 D
1% 10KOhm UM6K1N 2 1 RB751V-40
1
2 1 5 1MOhm C8204 C8247
2
<80,93> SLP_LAN#_PWR
2
1% 2009.07.01 0.1UF/50V 10UF/25V_1206
4
1
R8251 R8260 @ @
2
1
C8202 R8253 10Ohm R0603(0ohm) 09/04/17 AC:LIR=0.24;Iripple=1.8A;Ipk=8.41A
0.1UF/25V 470KOhm 1 2
DC:LIR=0.22;Iripple=1.69A;Ipk=8.36A
5
6
7
8
@ Q8200
1
1% SI4134DY-T1-GE3
D
2
1
VOUT:Typ.=1.052V;Max.=1.069V;Min.=1.036V;T=1.62%
G
C8250
17
16
15
14
13
S
5
2
1UF/6.3V U8204A C8248
0.1UF/25V
BOOT
EN/DEM
GND
TON
LEN
2
4
3
2
1
T8249
OCP>8.14A
1
TPC28T DCR:Typ.=5.8mOhm;Max.=7mOhm
T8240 1 12
TPC28T VOUT UGATE
FB=0.75V 2 11 2 1
+1.05VO
1
VDD PHASE
3 10
1.05VO_PWRGD FB OC R8263 L8202 2.2UH
4 9 09/06/05
<G>
<92> 1.05VO_PWRGD (Max:7.514A)
LPGOOD
0
1
PGOOD VDDP
2
6.8KOHM 09/06/05 Irat=14A 09/07/01
LGATE
1
LDRV
SANYO/6SVPC220MV
R8218
CE8201 220UF/6.3V
5
6
7
8
LFB
PANASONIC/EEFSX0D221ER
C8252 2.2Ohm_1206 09/05/04
@
D
4.7UF/6.3V
CE8202
SHORT_PIN
SHORT_PIN
SHORT_PIN
RT8204AGQW Q8203
220UF/2V
+ +
5
6
7
8
1
JP8219
JP8215
JP8218
G
F=250KHz SI4134DY-T1-GE3 C8201
S
@ 0.1UF/25V
1
1500PF/50V @
4
3
2
1
2
7
C8221
09/04/28 LFB=0.75V @
1
@ @
@
EN/DEM Function
U8204B
18 R8254 1%
GND1
VDD Diode-emulation 19
GND2
1 2
6
RT8204AGQW 100KOhm @ (Typ: Rdson = 14.5m OHM)
GND Shutdown (Max: Rdson = 17.5m OHM)
R8259
Floating CCM 8.06KOhm
2 1
1%
2
C 2 1 C
C8244
2
220PF/50V_0402
R8262 @ T8239 T8251 T8248 T8238 T8247 T8244 T8243 T8250
2
20KOhm C8242 TPC28T TPC28T TPC28T TPC28T TPC28T TPC28T TPC28T TPC28T
5
1% 0.1UF/25V
@ +1.05VO
1
09/07/01(don't need)
59pcs
2
+5VA
Frequency setting
F=300KHz-->R8208=845K ohm
F=250KHz-->R8208=1M ohm
1
R8229
100KOhm_0402 RT8204AGQW-->0607-003Y000(06G113115010)
09/07/01 Don't use 0695-00210AS
2
D8201 Q8208A 10mil
：
1SS355 @ UM6K1N AC_BAT_SYS
1
2 1 2 +5VO
1
100KOhm D8202
3
1
+5VO R8221
R8201 Q8208B R8248 RB751V-40 09/05/04 AC:LIR=0.39;Iripple=7.09A;Ipk=21.61A
10UF/25V_1206
10UF/25V_1206
1% 10KOhm UM6K1N 2 1 09/04/17 09/04/17 DC:LIR=0.37;Iripple=6.62A;Ipk=21.37A
2
1
C8218
C8220
2 1 5 1MOhm
0.1UF/50V
<80,93> SUSB#_PWR
2
C8207
1% 2009.07.01 Q8202
4
1
5
R8216 R8235 SIR474DP-T1-GE3 Q8201
Q
D D
2
1
C8203 R8226 10Ohm R0603(0ohm) @ SIR474DP-T1-GE3

0.1UF/25V 470KOhm 1 2
@ 4 4 @ +VTT_CPUO
2
1% G S G S
2
C8234 JP8208 @
17
16
15
14
13
1
2
3
1
2
3
2
B 1UF/6.3V U8203A C8231 1 2 B
0.1UF/25V 1 2
Q
OCP>20.4A
BOOT
EN/DEM
GND
TON
LEN
2
T8200 3MM_OPEN_5MIL
1
TPC28T L8201
T8202 1 12 TOKO/FDH1040B-R56M=P3 <G> JP8205 @ (Max:18.062A)
TPC28T VOUT UGATE
FB=0.75V 2 11 1 2 1 2
+VTT_CPU
1
VDD PHASE 1 2
3 10 2 1
FB OC R8247 0.56UH 3MM_OPEN_5MIL
4 9
(1.05VS/+1.1VS)
LPGOOD
1
<92> VTT_CPU_PWRGD PGOOD VDDP 3KOhm 09/07/01 09/06/05 Irat=20A
LGATE
2
LDRV
EN/DEM Function DCR=1.9m Ohm
0.1UF/25V
LFB
330UF/2V N/A
09/04/28 C8240 R8219
SI7658ADP-T1-GE3
4.7UF/6.3V 09/07/01 2.2Ohm_1206
1
Q8206
CE8204
CE8203
VDD Diode-emulation RT8204AGQW Q8207 @ H_VTTVID1=High;VOUT:Typ.=1.052V;Max.=1.069V;Min.=1.036V
330UF/2V
+ +
5
6
7
8
D D
1
SHORT_PIN
SHORT_PIN
F=250KHz @
JP8202
JP8212
SHORT_PIN
U8203B SI7170DP-T1-GE3 @ R8250=127KOhm;R8255=0 Ohm;H_VTTVID1=Low;VOUT:Typ.=1.1V;Max.=1.118V;Min.=1.082V
JP8213
GND Shutdown 18 4 4
2
GND1
C8217
19 G S G S @ R8250=63.4KOhm;R8255=63.4KOhm;H_VTTVID1=Low;VOUT:Typ.=1.1V;Max.=1.118V;Min.=1.082V
GND2
1
LFB=0.75V 1500PF/50V
流
Floating CCM RT8204AGQW C8222 09/05/04
1
2
3
1
2
3
1
@ @ @
1
R8227 @ 1%
1 100KOhm2
R8255
63.4KOhm R8234 1%
+3VSUS @ 1% 9.53KOHM 09/07/01(Clarkfield CPU change Voltage to 1.1V)
1 2 +VTT_CPU_FB 2 1
(Typ: Rdson =3.6m OHM)

(Max: Rdson = 4.3m OHM)
交
2 1
1
1
C8228 C8227
1
R8250 1000PF/50V 220PF/50V_0402 C8224 T8207 T8235 T8226 T8218

2
R8222 R8231 63.4KOhm @ R8237 @ 0.1UF/25V TPC28T TPC28T TPC28T TPC28T

100KOhm_0402 100KOhm_0402 1% @ 20KOhm @
2
@ @ 1% 1% +VTT_CPUO T8230 T8209 T8210 T8234

2
09/07/01(don't need) 1 TPC28T TPC28T TPC28T TPC28T

1
3 T8232 T8217 T8227 T8223

1
D
TPC28T TPC28T TPC28T TPC28T
1
Q8205
A
1 2N7002 +VTT_CPU A
1
G @
3 2 S
R8228 1% @ C
1 2 1 B Q8210
<12> H_VTTVID1
纸
PMBS3904
10KOhm_0402 E@
2
2
2
C8225 R8223
0.1UF/25V 100KOhm_0402
@ @
1
H_VTTVID1 VTT_CPU CPU R8255 Unmount/mount Voltage Range

1
<Variant Name>
09/07/01(Clarkfield CPU don't need) R8228;Q8210;R8231;R8250;
Low (0V) 1.1V Clarkfield 9.53K ohm Q8205;R8255;C8228=>Unmount Vmax:1.126V;Vtyp:1.107V;Vmin:1.089V
R8228;Q8210;R8231;R8250;
Title : POWER_I/O_1.5VS & 1.05VS
H(1.05V) 1.05V Auburndale 8.06K ohm Q8205;R8255;C8228=>mount Engineer: Benson_Lin
Custom
G50J 0.3
图
5 4 3 2 1
www.vinafix.vn
5 4 3 2 1
09/04/28
U8300B
18
+5VA GND1
19
GND2
RT8204AGQW
8
1
100KOhm RT8204AGQW-->0607-003Y000(06G113115010)
R8302 Don't use 0695-00210AS
2
2
6
D8301 @ Q8306A
1
D 1SS355 UM6K1N D
10mil
2 1 2 100KOhm AC_BAT_SYS
R8301
C8303 10UF/25V_1206
C8304 10UF/25V_1206
1
09/05/04
3
5
Q8306B +5VO AC:LIR=0.34;Iripple=3.68A;Ipk=12.74A
2
R8317 UM6K1N
1
<57,91,93> SUSC#_PWR 1 2 5
+5VO
C8310 DC:LIR=0.31;Iripple=3.33A;Ipk=12.57A
09/04/28 0.1UF/50V
1
R8306 D8303 09/04/17 @
2
2
39KOhm @ 2 1 RB751V-40 VOUT:Typ.=1.5V;Max.=1.53V;Min.=1.47V;T=2%
5
6
7
8
0
1% C8302
0.047UF/16V 470KOhm R8307 1MOhm Q8300
2009.07.01
D
R8303 10Ohm 1% SI4134DY-T1-GE3
2
+1.5VO
2
1% R8342
S
1
R0603(0ohm)
(Max:10.9A)
1
1 2
4
3
2
1
OCP>13.3A
2
C8332
1UF/6.3V C8336 JP8302 @
17
16
15
14
13
U8300A 0.1UF/25V 1 2
1
1 2
6
GND
TON
LEN
BOOT
EN/DEM
T8338 DCR:Typ.=3.8mOhm;Max.=4.2mOhm 3MM_OPEN_5MIL
TPC28T
T8335 1 12 L8300 1.5UH JP8301 @
TPC28T VOUT UGATE
FB=0.75V 2 11 1 2 1 2
+1.5V
1
VDD PHASE 1 2
3 10
FB OC R8308 CYNTEC/PCMC104T-1R5MN 3MM_OPEN_5MIL
2
4 9
(Max:8A)
LPGOOD
SI4134DY-T1-GE3
<92> DDR_PWRGD
1
PGOOD VDDP
4.3KOhm 09/06/05 R8327 Irat=16A
LGATE
SI4134DY-T1-GE3
1
5
6
7
8
5
6
7
8
LDRV
2.2Ohm_1206
LFB
C8309 @ 09/05/04
PANASONIC/EEFCD0D151ER
Q8301
4.7UF/6.3V @
1
RT8204AGQW
CE8302
+ +
470UF/2.5V
150UF/2V_7343
S
S
5
6
7
8
1
5
F=250KHz C8339
CE8300
1UF/6.3V
4
3
2
1
4
3
2
1
2
1500PF/50V @
2
Q8305
C8319
SHORT_PIN
SHORT_PIN
SHORT_PIN
@
JP8306
JP8305
JP8304
2
C @ C
LFB=0.75V (Typ: Rdson = 14.5m OHM)
2
(Max: Rdson = 17.5m OHM)
1
R8345 @ @ @
100KOhm
1 2
1%
EN/DEM Function R8309

20KOhm 1%
2 1 T8349 T8348 T8343
：
VDD Diode-emulation VOUT=1.5V TPC28T TPC28T TPC28T
C8330 +1.5VO
1
GND Shutdown 2 1
T8345 T8344 T8340
220PF/50V_0402
Q
TPC28T TPC28T TPC28T
2
Floating CCM
R8310 @ +1.5V
1
2
20KOhm C8334
1% 0.1UF/25V T8339 T8341 T8336
@ TPC28T TPC28T TPC28T
1
Q
TON=3.85p*RTON*VOUT/(VIN-0.5);
1
Frequency=VOUT/(VIN*TON)
Frequency setting
F=300KHz-->R8305=845K ohm
F=250KHz-->R8305=1M ohm
39PCS
流
B B
VO=0.5*Vin=0.5*1.5=0.75V +5VO
VF=0.75V;T=1%
2
+1.5VO
R8339
R0402(0ohm)
+0.75VO
交
U8301
T8328 9 09/07/01 +1.5VO
(Max:1A)
1
TPC28T GND2
1 8
VIN NC3
2 7
JP8300@ GND1 NC2 +5VO
3 6
1
REFEN VCNTL
1
1 2 4 5
+0.75VS 1 2 VOUT NC1
1
C8327
CE8303 100UF/2.5V_7343
3MM_OPEN_5MIL RT9045GSP 1UF/6.3V 100KOhm

09/07/01
NEC-TOKIN/TEPSLA0E107M(35)8R
@ R8344
0.1UF/16V
2
1
+
2
1
1
09/07/01
纸
C8311 C8308 100KOhm
2
10UF/6.3V_0805 10UF/6.3V_0805 R8337
6
Q8307A @ D8302
C8340
2
UM6K1N 1SS355
1
2 1 2
1
@
1
100KOhm
2
09/04/16 C8331
SHORT_PIN
3
0.1UF/16V R8343 Q8307B R8314
JP8307
UM6K1N 09/05/04 22KOhm

2
5 1 2 SUSB#_PWR
1% SUSB#_PWR <57,91,93>
09/04/16
4
图
Inrush current
1
1
@ R8340
C8321 1 2 SUSC#_PWR
+-18mA 0.033UF/16V
2
68KOHM 1% @
<18> M_VREF
A
+0.75VREF for DDR3 A
09/07/01
Check E.E
T8327 T8330 T8329 T8325

<Variant Name>
TPC28T TPC28T TPC28T TPC28T
+0.75VS
Title : POWER_I/O_DDR & VTT
1
www.vinafix.vn
Custom
G50J 0.3
5 4 3 2 1
5 4 3 2 1
2 8 D
0 5
6 7
5 2
2
C C
Q：
Q
流
B B
交
纸
图
<Variant Name>
A A
Title : POWER_N/A
A
G50J 0.3
5 4
www.vinafix.vn
3
2
Sheet 84
1
of 99
A B C D E
8
1 1
52
7 0
6
2 2
5 2
2
：
@---R1.3(ASUS P.M Change K/P,E.E Change power budget)
Q
3 8015_VDD 3
09/04/17
VF=0.8V;T=1.5%
Q
C8524 @ +1.8VO_SENSE
2
47PF/50V
R8521 MLCC/+/-5%
Thermal &Voltage drop Issue
2
1MOhm 1 2
2
C8523 R8520
Freq=1MHZ C8564 47PF/50V Ra 15KOhm
1
U8503 680PF/50V R8565 MLCC/+/-5% 1%
2
R8562 MLCC/+/-10% 47KOhm 1% @
SHORT_PIN
11
1
GND2
J8361
1 28015_SHDN 1 SHDN/RT COMP 10 8015_COMP 1 2 CM 1 2
流
330KOhm 2 9 8015_FB
GND1 FB
3 LX1 PGOOD 8 1 2
2
+1.8VS_PWRGD <92>
1V8_EN#
09/04/17
C8519 0.1UF/25V
4 LX2 VDD 7
2
8015_LX 5 6 1 2 R8523 Vout=0.8*(1+Ra/Rb)
1
PGND PVDD
2
D8502 @ R8566 0Ohm_0402 R8518
1SS355 100mil RT8015BGQW 1Ohm R8522 Rb 12KOHM
2 1 3 5% @ 0Ohm_0402 1%
D
1
1
@
1
Q8505 8015_VDD VOUT:Typ.=1.8V;Max.=1.857V;Min.=1.745V
交
SUSB#_PWR 1 2 1V8_EN 1 2N7002 JP8506
<70,82,83,91,93> SUSB#_PWR
4
G 60mil 1 2 60mil +5VO 4
R8519 2 S 1 2
1
0Ohm_0402 C8509 3MM_OPEN_5MIL

C8527 22UF/25V
C8518 0.1UF/25V
0.33UF/10V @
MLCC/+/-20%
1
2
C8512
2
10UF/6.3V_0805
@ +1.8VO
2
纸
100mil @ L8503 JP8504 100mil
1 2 100mil 1 1 2 2
+1.8VS
C8516 22UF/25V
C8517 22UF/25V
C8515 0.1UF/25V
2.2UH 3MM_OPEN_5MIL Imax=2.5A
MLCC/+/-20%
MLCC/+/-20%
1
2
Irat=8.3A @
DCR=16.2mOhm 12pcs
@
1
图
@
5 5
RT8015B=>R8523mount;R8522unmount;
<Variant Name>
RT8015A=>R8522mount;R8523unmount
Title : POWER_+1.8VS
www.vinafix.vn G50J
Custom 0.3
A B C D E
5 4 3 2 1
2 8 D
0 5
6 7
5 2
2
C C
Q：
Q
流
B B
交
纸
图
44pcs
A A
G60J CPU use Clarkfiel,so don't need VGA power
<Variant Name>
Title :POWER_+VGFX_CORE
Engineer: Benson Lin
www.vinafix.vn
Custom
G50J 0.3
5 4 3 2 1
5 4 3 2 1
2 8 D
0 5
6 7
5 2
2
C C
Q：
Q
流
B B
交
纸
图
<Variant Name>
A A
Title : POWER_N/A
Engineer: Jeff_Du
A
G50J 0.3
5 4
www.vinafix.vn
3
2
Sheet 87
1
of 99
5 4 3 2 1
8
Adaptor =120W, 19V/6.32A
2
D
120W/90W:R8801=15m OHM(11G21DR01515110) D
16.857V < ACIN <18.014V 65W:R8801=20m OHM(10G21DR02015110) 09/07/03(for EMI)
09/07/01(change 1206 size for cost down)
5
<60> A/D_DOCK_IN Q8801
T8804 T8805 T8801 T8806 T8807 T8800 T8802 T8803 T8808
1 S D 8 R8801 JP8800 @
A/D_DOCK_IN
TPC26T TPC26T TPC26T TPC26T 2 7 1 2 TPC26T TPC26T TPC26T TPC26T TPC26T AC_BAT_SYS 1 2
1
1 2
3 6
09.01.13 4 G 5 15mOhm 3MM_OPEN_5MIL
Q8800
1% TPC26T TPC26T TPC26T TPC26T
0
SI4116DY-T1-GE3 1 S D 8 T8809 T8810 T8811 T8812
2
2 7 JP8801 @
2 BAT BAT
3 6 1 2
BAT_CON
SHORT_PIN
SHORT_PIN
1
1 2
2
R8831 R8802
JP8802
JP8803
4 G 5
10Ohm_0805 100KOHM @ @ 3MM_OPEN_5MIL
1
7
@ 0.5% C8820 C8821
TPC8118
2
S 2 C8813 C8814 1.5NF/50V 1.5NF/50V
1
1
1
G
BAT R8821 1500PF/50V 1500PF/50V @ @
0.1UF/25V
1
2
1
1
2MOhm_0402
C8801
2.2Ohm
ACIN 2N7002 R8803 A/D_DOCK_IN
1%
2
Q8803 1% @ 1%
D 0904
6
2
1
3
09/07/01 R8805 09/07/01(for EMI)
2
1
C8811 1KOhm_0402 R8806 JP8804

1000PF/50V 2 R8807 200KOhm SHORT_PIN
@ R8804 1.82KOhm 1% AC_BAT_SYS 1 2 AC_BAT_SYS_INV
2
1
13.7KOhm 1%
2
1% 1 2 @
2
1
AC_BAT_SYS_INV to Inverter connect,

120W: R8807 = 1.82K Power trace =60mil(min), Put JP8804 close to Q8800
90W: R8807 = 6.98K
5
R8808 1% 65W: R8807 = 17.8K
200KOhm
2 1
AC_BAT_SYS
C C
C8805 0.1UF/25V
4.7UF/25V_0805
4.7UF/25V_0805
2
2
D8800
2
1N4148W
C8803
C8804
5
6
7
8
09/07/01 R8820 TPC26T TPC26T TPC26T
1
1 2 17015_DCIN Q8804 T8813 T8814 T8815
1
IRF8707PBF
S
1
2.2Ohm C8802 09/07/01
1
1UF/25V C8800 09/07/01
4
3
2
1
1% MLCC/+/-10% R8822 0.47UF/25V_0805
9
1Ohm 1% 09/07/01(change 1206 size for cost down)
AD_IINP C8806 14 1 2 2 1
DCIN
CSSN
CSSP
BST
：
4.7UF/6.3V 09/07/01
2 1 LDO 13
LDO DHI
15 12.641V(min) < VBAT-12.515(Typ) < 12.768V(Max)
2
22 L8802 R8812
GND1
1
R8815 C8807 C8808 23

GND2 LX
16 1 2 1 2 BAT BAT
10KOhm 0.1UF/25V 1UF/10V 24
0.5% GND3
1027 2 VAA 6.8UH 20mOhm
1 18 12
2P/3P, 2400mAh
C8809 22UF/25V
C8816 22UF/25V
2
Q
VAA VAA DLO Irat=8A 1%
25
MLCC/+/-20%
MLCC/+/-20%
1
GND4
5
6
7
8
1
11
PGND
2
D
2
AGND Q8805
4
SHORT_PIN
SHORT_PIN
SHORT_PIN
2
CSIN
2
IRF8707PBF
JP8806
JP8805
JP8807
3
S
R8810 AD_IINP CSIP @ @ @
5
Q
<90> AD_IINP IINP
1% 10KOhm 6 @
4
3
2
1
@ BATT R8816 09/07/01
1
VCTL 20 19 1 2
ACOK#
1
R8811 VCTL CC 0Ohm
0.01UF/50V
2
2
ISET ISET ACIN
C8810
BP
<30> ISET_EC 1 2 10 17
R8817 ISET ACIN R8809
2
1KOhm R0402(0ohm) U8800 100KOhm Close to Q8805
21
2
2
R8818 MAX17015BETP+T @
R8814 C8812 1MOhm_0402 09/07/28 PR
1
1
750Ohm 0.1UF/25V @
2
0113
1
流
1
B B
T8816
TPC28T 1024
<30> AC_IN_OC#
1
VFB=2.1;T=0.4%
ISET_EC ISET(Voltage) CHG_CURRENT R8819
交
R8813 249KOhm 0.1%
0.1294V 0.055V 0.157A PRECHG <30> VSET_EC 1 2 1 2
2
2.0188V 0.865V 2.472A(0.52C) Quick CHG 66.5KOhm
0.1% R8828
Ichg=(240m/RS2)*(VISET/VAA) 66.5KOhm
0.1%
Ichg=(240m/20m)*(0.055/4.2)=0.157A
1
Ichg=(240m/20m)*(0.865/4.2)=2.4714A MAX17015 VBAT setting:
VCTL connect to GND,VFB=2.1V
纸
VBAT=2.1*(R8819+R8828)/R8828
VSET_EC BAT Fix R8828 to 10K, adjust R8819
VCTL connect to GND,VFB=2.1V 1.4106V 12.545V ON R8819=30K,VBAT=8.4V(2cell)
VBAT=2.1*(R8819+R8828)/R8828 3.2871V 5.519V OFF R8819=49.9K,VBAT=12.579V(3cell)
R8819=69.8K,VBAT=16.758V(4cell)
12.641V(min)<VBAT-12.515(Typ)<12.768V(Max)
图
A A
<Variant Name>
Title : CHARGER_201
www.vinafix.vn
C G50J 0.3
5 4 3 2 1
5 4 3 2 1
2 8 D
0 5
6 7
5 2
2
C C
Q：
Q
流
B B
交
纸
图
<Variant Name>
A A
Title : POWER_N/A
Engineer: Jeff_Du
A
G50J 0.3
5 4
www.vinafix.vn
3
2
Sheet 89
1
of 99
5 4 3 2 1
BATTERY IN DETECT
+5VO +5VAO TPC26T
T9002 Master Battery: BAT1_IN_OC#
8
Second Battery: BAT2_IN_OC# ADAPTER IN DETECT
1
BAT1_IN_OC# <30>
2
1
D D
Use MAX17015 IC function to Cost down component
1
R9002
100KOhm_0402
5
3
R9001
2
Master Battery: TS1# 100KOhm_0402 Q9000B
5 UM6K1N
2
Second Battery: TS2#
4
0
6
Q9000A
2 UM6K1N
7
<60> TS1#
1
1.Original : mount R9001.R9002.C9003.Q9000A.Q9000B
1
C9003 2.Cost down : mount R9004.R9003.Q9002.C9003
6
1000PF/50V_0402
2
3.Cost down : mount R9008.C9003
2
+3VO +3VA
5
090113(Cost down to Check)
1
1
R9003
C C
R9004 100KOhm_0402
2
100KOhm_0402 @
2
@
2
Q9002 @
1
G
2N7002
2 S
3
D
：
1 2
R9008 5% @ 090703(Cost down to Check)
0Ohm_0402
POWER LIMIT CIRCUIT

@---09.07.01(Cost Down)
Q Q
流
B B
<88> AD_IINP
1
C9008
100PF/50V TPC26T
@ +5VO T9004
2
VAA @
VAA=4.2V;T=0.47% PW RLIMIT#
交
PW RLIMIT# <30>
1
1
R9006
1% 100KOhm D9000 3
D
5
+2.5Vref delete @ 1SS355 @

1 V+ Q9001
2
+ 1
4 2 1 2N7002
Viinp=3.326V(Max); 3 -
G @
3.297V(Typ); U9001 V- 2 S
纸
1
LMV321IDBVR C9006 R9007 @

3.267V(Min)
2
1
1
@ 0.1UF/25V 1 2
1
R9005 C9007 @ C9004 @

2
1
1% 365KOHM 0.1UF/25V 100KOhm 1% C9005 47UF/6.3V_1206
2
@ @ 0.1UF/25V
2
090113(Check) @
2
2
090113(Check)
图
A A
Pinput=111.8625W----->Iinput=5.8875A 4pcs
RS1=20mohm,Glinp=2.8uA/mV,Riinp=10K
<Variant Name>
Iinput=Viinp/(RS1*Giinp*Riinp)=Viinp/(20m*2.8uA/mV*10K)=5.8875A----->Viinp=3.297V
Title : POWER_DETECT
www.vinafix.vn
Custom
G50J 0.3
5 4 3 2 1
5 4 3 2 1
SUSC#_PWR POWER
2009/06/05 TPC26T TPC26T
T9126 T9108
Q9115 (Max:1.25A)
SUSB#_PWR POWER +3VO 8 D S 1
1 1
1
7 2 +3V
6 3 R9109 22KOhm C9106
8
5 4 2 1 0.1UF/25V
G
@
2
1
SI4134DY-T1-GE3 C9110
0.033UF/16V
2
2
2009/06/05 TPC26T TPC26T
T9124 T9113
D
Q9101 (Max:2.21A) D
+5VO 8 D S 1
1
7 2 +5V
5
R9110 22KOhm
Thermal &Voltage drop Issue 6 3
1
C9113
2009/06/05 TPC26T TPC26T
+1.8VS=1.395A 5 G 4 2 1
0.1UF/25V
T9109 T9114 @
(Max:6.825A) SI4134DY-T1-GE3
2
1
Q9108 C9105
0
8 D S 1 0.033UF/16V
+3VO
1
7 2 +3VS
2
1
6 3 R9108 47KOHM C9102 TPC26T
5 G 4 2 1 0.1UF/25V UMC4N T9112
@
2
1
7
SI4134DY-T1-GE3 C9104 +12VSUS
1
0.1UF/25V TPC26T +12V
4
3
T9119
47K
2
1
B
SUSC#_PWR
1
R9103
B
47K
10K
100KOhm
47K
2009/06/05 TPC26T TPC26T
T9101 T9127 1%
(Max:3.28A)
2
Q9106
6
+5VO 8 D S 1 Q9107
1 1
1
+5VS
2
7 2
6 3 R9107 47KOHM C9107
5 4 2 1 0.1UF/25V
G
@
2
1
SI4134DY-T1-GE3 C9109
5
0.033UF/16V
2
IAMT POWER @Cost down---PR Unmount(combine with SUSB#_PWR)

C C
2
2009/06/05 TPC26T TPC26T 2009/06/05 TPC26T TPC26T
T9103 T9128 R9124 @ T9132 T9110
Q9109 (Max:2.9A) 10mOhm_1508 Q9116 @ @ @ (Max:1.3A)
+1.5VO 8 D S 1 +3VO 1 2 8 D S 1
1 1
7 2 1 +1.5VS 1% 7 2 +3VM 09.04.09
6 3 R9117 47KOHM C9108 6 3 R9125 22KOhm C9115
5 4 2 1 0.1UF/25V 5 4 2 1 0.1UF/25V
G G
@ @
2
2
1
1
SI4134DY-T1-GE3 C9111 SI4134DY-T1-GE3 C9117 @
：
0.033UF/16V 0.033UF/16V
@
2
2
2009/06/05 TPC26T TPC26T
R9123 @ T9125 T9115
10mOhm_1508 Q9102 @ @ @ (Max:2.342A)
Thermal &Voltage drop Issue
Q
+1.05VS=+VTT_PCH +1.05VO 1 2 8 D S 1 09.04.09
1
2009/06/05 TPC26T TPC26T 7 2 +1.05VM
T9104 T9130 1% R9120 22KOhm
(Max:5.172A) 6 3
1
Q9110 5 4 2 1 C9116
G
+1.05VO 8 D S 1 @ 0.1UF/25V
1 1
+1.05VS C9118 @
Q
7 2 SI4134DY-T1-GE3
2
1
6 3 R9118 47KOHM C9114 0.033UF/16V
5 4 2 1 0.1UF/25V @
G
@
2
2
1
SI4134DY-T1-GE3 C9112 TPC26T

0.033UF/16V T9116
UMC4N @ @
2
+12VSUS
1
TPC26T +12VM
4
3
T9120
47K
1
R9130 0Ohm @ No circuit connect to E.E circuit
B
SLP_LAN#_PWR 2 1
1
@ R9122
B
47K
10K
2
100KOhm
47K
B TPC26T R9134 B
T9102 100KOhm 1% @
UMC4N
(Max:0.02A)
2
R9129 0Ohm @
6
+12VSUS SLP_M#_PWR 2 1 Q9111
E
+12VS
4
TPC26T +5VSUS
3
1
1
T9129 @
47K
3
B
SUSB#_PWR R9102 R9133 @ 2009/01/10(unmount)
交
1
100KOhm 100KOhm Q9112B

2
B
47K
10K
47K
1% 1 2 5 UM6K1N
2
4
6
1
Q9105 Q9112A
2 UM6K1N
@
1
2009/01/10(add)
纸 2009/07/01_For power +3VA test; If short +3VA JP point to check power;

should be cut off this temp line.
图
TPC26T 2009/07/01 TPC26T 2009/07/01
T9131 T9122
R9105 TPC26T 2009/07/01 R9127
1 2 T9139 NON_IAMT 1 2
<30,36,43,57,92> SUSB_EC# <30,57> ME_SLP_M_EC#
1
A TPC26T R9106 1 TPC26T A

T9135 R0603(1KOhm) 1 2 T9136 R0603(1KOhm)
<30,57> SUSB_EC#
1
R0603(1KOhm)
<70,82,83,85,93> SUSB#_PWR <83,93> SLP_M#_PWR 54pcs
1
TPC26T
T9133 R9126 @ TPC26T 2009/07/01
TPC26T 2009/07/01 1KOhm IAMT T9123
<Variant Name>
T9121 1 2 R9128
<30,36,43,57,92> ME_PM_SLP_LAN#
1
R9104 1 2
<30,57> GFX_VR_ON
1
<30,57> SUSC_EC# 1 2 TPC26T TPC26T

Title : POWER_LOAD SWITCH
1
TPC26T T9137 T9138 R0603(1KOhm)

T9134 R0603(1KOhm) Engineer: Benson_Lin
www.vinafix.vn
<70,82,83,85,93> SLP_LAN#_PWR <83,93> GFX_VRON_PWR
1

<83,93> SUSC#_PWR
1
2009/01/13_R9106(mount); R9126(unmount)for Test Custom

G50J 0.3
5 4 3 2 1
5 4 3 2 1
+3VSUS +3VS
POWER GOOD DETECTER
100KOhm_0402
100KOhm_0402
1
1
R9200
R9205
T9204
2
TPC26T
8
<30,81> SUS_PWRGD 2 1
1
T9203 D9201 +3VSUS
TPC26T
2009.07.01 1SS355
R9202 U9200
2
<83> DDR_PWRGD 1 2 1 A 5
1
VCC
D T9200 D
T9207 R0402 2 B TPC26T
TPC26T
2009.07.01
BOM change R9208 3 GND 4 ALL_SYSTEM_PWRGD <22,30,67>
1
5
1 2 Y
<85> +1.8VS_PWRGD
1
NC7SZ08P5X
1
YES/NO CPU T9205 R0402
TPC26T
2009.07.01 R9212
X Clarkfield R9203 2KOHM_0402
1%
0
<70> PWR_OK_VGA 1 2
1
R9204 Auburndale
2
R0402
H_VTTPWRGD <3>
T9206
1
TPC26T
R9213
7
<86> GFX_PWRGD 1 2 1KOhm_0402
1
R9204 @ 1%
2009.07.01(for CPU Auburndale) 0Ohm_0402
2
T9210
TPC26T
6
ME_+VM_PWRGD 2 1 1006
1
2009.07.01(for CPU IAMT POWER) D9203 @
1SS355
+3VSUS
2
+3VS
100KOhm_0402
1
R9219
100KOhm_0402
1
R9210
2009.07.01(for CPU Auburndale) T9211
5
TPC26T
2
2 1
1
2
<82> 1.05VO_PWRGD
C T9208 D9202 C
2
TPC26T 1SS355
<86> VTT_CPU_PWRGD
1
：
090113(D9202 move to E.E place)
T9201
TPC26T
SUSB_EC#
<30,36,43,57,91> SUSB_EC# FORCE_OFF# <32,81>
1
+3VS
Q
1
1
R9207 2 1 FORCE_OFF#_PWR <32,81>
100KOhm_0402 D9200 R9201 D9204
+3VSUS 1SS355 560KOhm 1SS355
Q
T9209 1% 090113(D9204 add in power place)
3
TPC26T
2
2
U9201 Q9200B
<30,80> VRM_PWRGD 1 A 5 5
1
VCC UM6K1N
4
6
ALL_SYSTEM_PWRGD 2 B
UM6K1N
3 GND 4 2
1
Y Q9200A
1
NC7SZ08P5X C9200
4.7UF/6.3V
流 2
B B
1006
2009.07.01 2009.07.01(For IAMT) +3VSUS
交
1
R9215
+3VSUS 100KOhm_0402
@
2
1
ME_+VM_PWRGD
ME_+VM_PWRGD <3>
R9218
100KOhm_0402 3
D
@ Q9202
纸
2N7002
2
1 @
G
R9217 1% @ 3 2 S
20KOhm C
1 2 1 B Q9203
+1.05VM
PMBS3904 T9202
1
E@ +3VSUS TPC26T
1
R9216 C9202 2 R9209 @ @

100KOhm 0.047UF/16V 2 1 1.05VO_PWRGD <82>
1
1
1% @ 0Ohm_0402
图
2
@ R9206
2
100KOhm_0402
3
@
2009.07.01 Q9201B
2
5 UM6K1N
@
42pcs
4
6
A A
R9214 1% @ Q9201A
+3VM 1 2 2 UM6K1N
270KOhm @
1
1
100KOhm C9201
R9211 0.047UF/16V
<Variant Name>
2
1% @
2
@
2009.07.01 Title : POWER_PROTECT
Engineer: Benson Lin
5 4
www.vinafix.vn 3 2
Size
Custom
Date:
Project Name
Friday, July 31, 2009

G50J
1
Sheet 92 of 99
Rev
0.3
5 4 3 2 1
AC_BAT_SYS
AC_BAT_SYS <70,80,81,82,83,86,88>
BAT BAT <88>
8
BAT_CON BAT_CON <60,88>
2
D
FOR POWER TEST D
+3VA +3VA <20,30,56,57,81>

TPC26T
5
T9301
+5VAO +5VAO <81,85,90> JP9300 @
+5VA +5VA <31,56,81> +3VA 1 2 2 CPU_VRON_PW R <80>
1
1
0
SGL_JUMP
TPC26T
+5VO <81,82,83,90,91> T9302
+5VO JP9301 @
1 2 2
7
+3VO +3VO <81,91> SUSB#_PW R <70,82,83,85,91>
1
1
+1.8VO SGL_JUMP
+1.8VO
+0.9VO TPC26T
+0.9VO
@ T9303
6
JP9302
+1.05VO +1.05VO <80,82>
1 2 SUSC#_PW R <83,91>
1
1 2
+1.5VO +1.5VO <83,91>
SGL_JUMP
2
TPC26T
@ T9304
+5VSUS +5VSUS <27,56,81,86> JP9303
1 2
5
+3VSUS +3VSUS <3,21,22,24,25,27,30,33,37,53,70,81,82,92> VSUS_ON <30,81>
1
1 2
SGL_JUMP
+12VSUS +12VSUS <28,70,81,91>
TPC26T
C C
@ T9305
2
+5V JP9304
+5V <31,36,44,45,46,52,56,57,65,68,70,85,91>
1 2 SLP_M#_PW R <30,81>
1
+3V 1 2
+3V <24,31,43,45,57,61,64,68,69,91>
SGL_JUMP
+12V
+12V <37,42,68,91>
TPC26T
+1.8V @ T9306
+1.8V JP9305
1 2
：
+0.9V +0.9V SLP_LAN#_PW R <30,81>
1
1 2
SGL_JUMP
TPC26T
+3VS +3VS <16,17,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,36,37,40,41,42,43,44,45,46,47,48,50,51,53,56,57,64,65,66,67,70,80,85,91,92>
@ T9307
Q
JP9306
+5VS +5VS <27,31,37,45,46,47,48,50,51,56,57,71,80,91>
1 2 GFX_VRON_PW R <30,81>
1
+12VS 1 2
+12VS <28,45,70,91>
SGL_JUMP
Q
+1.5VS +1.5VS <26,43,53,57,64,70,91>
+VCCP +VCCP
流
+VCORE
+VCORE <6,57,80>
B B
交
纸
图
A A
<Variant Name>
Title : POWER_SIGNAL
www.vinafix.vn
Custom
G50J 0.3
5 4 3 2 1
5 4 3 2 1
Design rating
8
SLP_LAN#_PWR
SI4134 +3VM (1.3A)
VSUS_ON
SI4134 +3VSUS (0.919A)
2
D
SUSC#_PWR
(10.414A) D
SI4134 +3V (1.25A)

+3VO SUSB#_PWR SI4134
+3VS (6.825A)
5
+5VAO
+3VA +3VA (0.12A)
0
AC_BAT_SYS
+5VSUS (0.01A)
+5VO SUSC#_PWR
SI4134
AC(adapter) +5V (2.21A)
7
RT8206A SUSB#_PWR
SI4134 +5VS (3.28A)
VSUS_ON
+5VO +12VSUS
6
BAT_CON UMC4N +12V (0A)
charge pump SUSC#_PWR (6.915A)
(SWITCH)
FORCE_OFF#_PWR +5VO_DL1
UMC4N +12VS (0.02A)
SUSB#_PWR (SWITCH)
2
+5VAO
+5VAO (0A)
SUS_PWRGD
ISET_EC Charger
5
VSET_EC MAX17015B SUSB#_PWR +1.8VO
VIN=+3VS +1.8VS (1.395A)
G966A
C C
Vpp=+5V
2
SLP_LAN#_PWR +1.05VO
SI4134 +1.05VS (5.172A)
RT8204A SLP_LAN#_PWR
(7.514A)
+5VO 1.05VO_PWRGD +1.05VM (2.342A)
SI4134
SUSB#_PWR
SUSB#_PWR
+VTT_CPU
：
RT8204A +VTT_CPU (18.062A) (18.062A)
+5VO VTT_CPU_PWRGD
Q
SUSC#_PWR
+1.5VO
+1.5V (8A)
RT8204A (10.9A)
Q
+5VO DDR_PWRGD SI4134 +1.5VS (2.9A)
SUSB#_PWR
SUSB#_PWR +0.75VO
RT9045
+0.75VS (1A) (1A)
VIN=+1.5VO
VCNTL=+5VO
GFX_VRON_PWR +VGFX_CORE_0
+VGFX_CORE
流
B
MAX17028 (15A) (15A) B
+5VS CPU: GFX_PWRGD

Auburndale
CPU_VRON,
CPU_VRON_PWR
交
MAX17030+
+3VS MAX8791 +VCORE (51A) (51A)
CPU:
Auburndale VRM_PWRGD
1. VR_VID0~VR_VID6;
2. PM_DPRSLPVR,PM_PSI#; Clarkfield
I_MON
3. CLK_EN#;
4. VCCSENSE,VSSSENSE
纸
AC_BAT_SYS_VGA
SUSB#_PWR_VGA NVVDD
ISL6228
NVVDD (19.6A) (19.6A)
Nvdia +1.5VO_VGA
+5VS_VGA +1.5VS_VGA (7A)
(7A)
VCC_GFX_COR_PWRGD
图
SUSB#_PWR_VGA +1.05VO_VGA
A VIN=+1.5VS_VGA +1.05VS_VGA (2.17A) (2.17A) A
G9731
Vpp=+5VS_VGA
<Variant Name>
Title : POWER_FLOWCHART
www.vinafix.vn
Custom
G50J 0.3
5 4 3 2 1
5 4 3 2 1
JUMP must be shorted:

----------------------
JP1601,JP1801,JP1802,JP2601,JP2602,JP2603,
JP2701,JP2702,JP2703,JP2704,JP8100,JP8101,
JP8102,JP8106,JP8205,JP8301,JP8504.
8
OPTIONAL selection:
-------------------
2
D
@ -> no-stuff for all D
CFD -> stuff for Clarkfield with MXM
CFD@ -> no-stuff for Clarkfield with MXM
5
AUB -> stuff for Auburndale with MXM (switchable GFX)
AUB@ -> no-stuff for Auburndale with MXM (switchable GFX)
IAMT -> stuff for IAMT sku
IAMT@ -> no-stuff for IAMT sku
0
NON_IAMT -> stuff for non-IAMT sku
NON_IAMT@ -> no stuff for non-IAMT sku
CPU_XDP -> stuff for CPU XDP using
7
CPU_XDP@ -> no-stuff for CPU XDP using
PCH_XDP -> stuff for PCH XDP using
PCH_XDP@ -> no-stuff for PCH XDP using
6
R1.1--> R1.2 Changed List:
-------------------
2
1.Refer to #413686.
2.For the buffered mode is stable.
3.For Deleting PCH XDP, modify P20,P67.
4.For MXM 2.1a, modify P21, P70.
5
5.For PCIE CB,modify P40, P24.
6.Refer to DG R1.0.
C 7.Del the tested 0ohm. C
2
8.For LVDS display on AUB.
9.Change DP port from B to D by Intel recommendation.
10.For reassigning USB Port, modify P24.
11.Repair R1.1 bug.
12.For Lighting Keyboard.
13.For Non-IAMT.
：
14.Remove PCIE<-->SATA Circuit(P66) for PCH SATA stable.
15.For Project SPEC, Del P68.
16.Add Second Source.
Q
R1.3--> R1.4 Changed List:
-------------------
1.Intel recommended.
Q
2.For G60J SPEC.
3.Change CK505 from ICS3362 to ICS3197.
4.For PCH GPIO Definition.
5.R1.3 bug fixed.
6.GLAN from RTL8111C to AR8131
7.Add HDMI Switch(PI3HDMI201).
8.NV recommonded.
流
B B
交
纸
图
A A
Title : System History

Engineer: Gary Tsai
www.vinafix.vn
BU2/RD1
C G60J 1.1
5 4 3 2 1
5 4 3 2 1
I/O Board
+5V_USB_IO USB Port 0
8
IOJ102
+3VS_IO IOJ101 +5V_USB_IO IO_R104 1 2 0Ohm 1
USB_PN0_IO IO_RNX101B 4 USB_PN0_IO_CON USB_PN0_IO_CON 1 P_GND4 8
20 0Ohm 3 2 2 P_GND3 7
2
20
1
19 + USB_PP0_IO_CON
19 SIDE1 22 3 3 P_GND2 6
1
18 IO_CE101 IO_C101 4 4 P_GND1 5
D D
18
1
USB_PN0_IO 17 IO_LX101 47UF/6.3V 0.1UF/16V
USB_PP0_IO 17 90Ohm/100Mhz USB_CON_1X4P
16
2
16 GND_IO
15
5
15 @
1
USB_PN1_IO 14 GND_IO GND_IO
4
USB_PP1_IO 14 GND_IO GND_IO
13 13
12 USB_PP0_IO IO_RNX101A 2 1 USB_PP0_IO_CON IO_D102 IO_D101
12 0Ohm
HP_JD_IO 11 @ @
11
0
SPDIF_JD_IO 10 0603-050E101NP-LF 0603-050E101NP-LF
LINE1_JD_IO 10
9
2
MIC_JD_IO 9
8 8
SPDIF1_OUT_IO 7
HP_R_IO 7 GND_IO GND_IO
6
7
HP_L_IO 6
LINEIN_R_IO
5
4
5 USB Port 1
LINEIN_L_IO 4
3 3
MIC_IO 2 2 SIDE2 21 IOJ103
6
1 1 USB_PN1_IO IO_RNX102B 4 3 USB_PN1_IO_CON +5V_USB_IO IO_R116 1 2 0Ohm 1 8
0Ohm 1 P_GND4
W TOB_CON_20P USB_PN1_IO_CON 2 7
2 P_GND3
1
+ USB_PP1_IO_CON 3 6
3 P_GND2
1
AGND_IO AGND_IO IO_LX102 IO_CE102 IO_C102 4 5
4 P_GND1
2
90Ohm/100Mhz 150UF/6.3V 0.1UF/16V
USB_CON_1X4P
R1.2 @
1
3
4
GND_IO GND_IO
USB_PP1_IO IO_RNX102A 2 1 USB_PP1_IO_CON GND_IO GND_IO IO_D104 IO_D103
5
0Ohm
@ @
0603-050E101NP-LF 0603-050E101NP-LF
2
C C
2
GND_IO GND_IO
Headphone &
HP1_IN#_IO
S/PDIF Jack
JACK_IN#_IO
IOJ104
6
HP_R_IO IO_R105 1 2 0Ohm HP_R_CON_IO 1
：
SPDIF_JD_IO HP_L_IO IO_R106 1 2 0Ohm HP_L_CON_IO 4
+5V_USB_IO +5V_USB_IO +3VS_IO +3VS_SPDIF_IO 5
1
3 IO_C103 IO_C104
D
100PF/50V 100PF/50V 7
1
UMC4N IO_Q103 @ @
Q
11
2
IO_R112 IO_R113 1 12
E
100KOhm 100KOhm G 2N7002 +3VS_SPDIF_IO

4
3
2 S A GND 9
47K
IO_R107 1 2 0Ohm B VCC MS 10

2
Q
B
HP_JD_IO HP1_IN#_IO SPDIF1_OUT_IO IO_R108 1 2 0Ohm SPDIFOUT_IO C Vin

IO_Q101A IO_Q101B
2
B
47K
10K
6
1
47K
UM6K1N UM6K1N AGND_IO IO_C105 IO_C106 PHONE_JACK_8P

JACK_IN#_IO 0.1UF/16V 100PF/50V
2 5 @
1
2
IO_Q102 HP1_IN#_IO JACK_IN#_IO
1
1
IO_C111 IO_C110
流
AGND_IO AGND_IO 1000PF/50V 1000PF/50V AGND_IO
@ @
2
B B
Line-in Jack
AGND_IO AGND_IO
IOJ105
LINE1_JD_IO 5
4 7
LINEIN_R_IO IO_R109 1 2 0Ohm LINEIN_R_CON_IO 3 R 8
交
IO_C114 1 2 0.1UF/16V 6 9
LINEIN_L_IO IO_R110 1 2 0Ohm LINEIN_L_CON_IO 2 10
IO_C115 1 2 0.1UF/16V 1 L
1
IO_C107 IO_C108 AUDIO JACK
100PF/50V 100PF/50V PHONE_JACK_6P
LINE1_JD_IO @ @
2
AGND_IO GND_IO
R1.2
1
IO_C112
纸
1000PF/50V
@ AGND_IO
2
MIC In Jack
AGND_IO
IOJ106
MIC_JD_IO 5
4 7
图
3 R 8
6 9
MIC_IO IO_R111 1 2 0Ohm MIC_CON_IO 2 10
L
Left Screw Hole Right Screw Hole 1
1
IO_C109 AUDIO JACK
A
IO_H1 IO_H2 R1.2 100PF/50V PHONE_JACK_6P A
MIC_JD_IO @
2
1 NP_NC1GND5 6 1 NP_NC1GND5 6
2 NP_NC2GND4 5 2 NP_NC2GND4 5
1
3 4 3 4 IO_C113
GND2 GND3 GND2 GND3 1000PF/50V
@ AGND_IO
2
GND_IO
D110N&DO130X110N
GND_IO
AGND_IO D110N AGND_IO
Title : USB & Audio Jack
AGND_IO ASUSTeK COMPUTER INC. NB4 Engineer: Kenny Wu
www.vinafix.vn
Custom G60J 1.1
5 4 3 2 1
5 4 3 2 1
2 8 D
0 5
6 7
C
5 2 C
2
Q：
Q
流
B B
交
纸
图
A A
Title : ****
BU2/RD1 Engineer: Gary Tsai
www.vinafix.vn
Custom G60J 1.1
5 4 3 2 1
5 4 3 2 1
Power On Sequence Diagram Rev. 0.2

Reset
Logic
8
(RC)
P.32
PWR_SW# 8 Power On
EC_RST#
2
D Button D
5
ME_AC_PRESENT 7
+3VA ME_SusPwrDnAck 4 ME_PM_SLP_M#
AC_BAT_SYS +5VA EC PM_PWRBTN# 9 ME_PM_SLP_LAN# 10
1 +3VA_EC
0
MAX17020 IT8512E PM_RSMRST# 6 PM_SUSC# 12 To EC
P.81 ME_PWROK 17
SLP_S4# 11
(+IT8301E) PM_SUSB#
ME_PWROK SLP_S3# 12
7
3 VSUS_ON PM_PWROK 27
AUXPWROK
DRAMPWRGD
+3VSUS PCH_PWROK PLT_RST#
6
+5VSUS SYS_PWROK
BUF_PLT_RST#
H_DRAM_PWRGD
5 SUS_PWRGD CPU_PWRGD
SUSB_EC#
SUSC_EC#
ME_SLP_M_EC#
+12VSUS
H_CPUPWRGD
P.81
2
PCH
23 26 16 24
+1.5V
CPU_VRON
VRM_PWRGD
ALL_SYSTEM_PWRGD
ME_+VM_PWRGD
5
+3V 15 14
+5V
C
14 SUSC_EC# +12V 13 29 30 28 C
VCCPWRGOOD_0
VCCPWRGOOD_1
+VGFX_CORE 22 GFX_PWRGD
RSTIN#
VDDPWRGD
19 GFX_VR_ON
：
+0.75VS
+1.5VS PWROK PWROK PWROK
15 SUSB_EC# +1.8VS Logic1 Logic2 Logic3
Q
+3VS P.92 P.92 P.92
+5VS
+12VS H_VTTPWRGD 21 CPU
VTT_PWRGD
Q
18 SYSTEM_PWRGD
20 +VTT_CPU_PWRGD
+VTT_CPU
流
B B
12 13
ME_PM_SLP_LAN# ME_SLP_M_EC#
+VM_OK
+1.1VM_LAN +1.1VM Logic
交
P.84
+VTT_PCH
15 SUSB_EC#
纸
+3VSUS
12 ME_PM_SLP_LAN# +3VM Power On Sequence
图
IMVP6.5
+VCORE
25 CLK_PWRGD CLK Gen.
CK505
1 30
A A
Title : Power On Sequence

Engineer: Gary Tsai
www.vinafix.vn
BU2/RD1
C G60J 1.1
5 4 3 2 1
5 4 3 2 1
1 +3VA/+5VA/+3VA_EC
Power-On Sequence
2 EC_RST# Timing Diagram Rev. 0.2
3 VSUS_ON
8
+3VSUS/+5VSUS (pull up to +3VSUS)
2
D
4 ME_SusPwrDnAck T0=20ms D
5 SUS_PWRGD
T1<200ms(check)
5
6 PM_RSMRST#
7 ME_AC_PRESENT
0
(falling edge)
8 PWR_SW#
7
T2=50ms
9 PM_PWRBTN#
6
10 ME_PM_SLP_M#
2
11 PM_SUSC#
PM_SUSB#/
12 ME_PM_SLP_LAN#
5
+1.1VM_LAN
C C
2
13 ME_SLP_M_EC#
+1.1VM/+3VM
14 SUSC_EC#
：
+1.5V/+3V/+5V
15 SUSB_EC#
Q
+0.75VS/+1.5VS/
/+1.8VS/+3VS/+5VS
Q
16 ME_+VM_PWRGD
T3=2ms
17 ME_PWROK
18 SYSTEM_PWRGD
流
+VTT_CPU
B B
19 GFX_VR_ON
T=TBD
+VGFX_CORE
交
20 +VTT_CPU_PWRGD
T=1.25ms
21 H_VTTPWRGD
T=60us(typ.)
22 GFX_PWRGD
T=TBD
纸
23 ALL_SYSTEM_PWRGD
T02=110ms
24 CPU_VRON
10~100us
+VCORE
图
25 CLK_PWRGD
(inversion of CLK_EN#) 3~20ms
26 VRM_PWRGD
A A
27 PM_PWROK
T04=10ms
28 H_DRAM_PWRGD
Title : Power On Timing
29 H_CPUPWRGD
Engineer: Gary Tsai
www.vinafix.vn
BU2/RD1
30 BUF_PLT_RST# C G60J 1.1

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5 4 3 2 1

SYSTEM PAGE REF.

G60J Schematics for Calpella Platform Rev. 1.5

65. ME_CONN,Skew Hole HDD(2) Page 52 DDR

98. Power On Sequence Page 32 Page 65 Page 92

Title : Block Diagram

+VTT_CPU +VTT_CPU <6,7,25,26,27,29,32,57,82>

PCI EXPRESS -- GRAPHICS

JTAG & BPM

<25> BCLK_CPU_P_PCH 2 1 CLK_CPU_BCLK

2. Pull-down to GND via 1KΩ ± 5% resistor: FDI_FSYNC0 1 2 R0354

0402 SL317 VDDPWRGOOD_R CPU_XDP@

0402 SL318 0402 SL315

DDR SYSTEM MEMORY - B

T0575 CFG10 CFG[9] RSVD55 T0502 VSS34 VSS114 VSS192

CFG strapping information:

+VTT_CPU +VTT_CPU <3,7,25,26,27,29,32,57,82>

+VCORE +VCORE <57,69,80>

VCC21 VTT21 VCCAXG14 GFX_VID[6]

VCC42 VTT39 2 VCCAXG35 VDDQ11

VCC62 VTT63 +VTT_CPU

PEG & DMI

V28 AL33 CPU_VID4 R2.0--1 G28

VCC88 VCC_SENSE VCCSENSE <80> 10uF * 16pcs

+1.5V +1.5V <3,6,57,69,83>

+1.5V_DDR3 +1.5V_DDR3 <17,18>

+0.75VS +0.75VS <17,57,83>

+3VS +3VS <29,48,80,91,92>

M_VREFDQ_DIMM0 M_VREFDQ_DIMM0 <18>

1% M_A_A14 80 39 M_A_DQ21 120 43

C1621 R1603 M_A_A15 78 41 M_A_DQ20 44

M_CLK_DDR#0 DQ19 M_A_DQ16 RAS# VSS18

BA0 DQ20 M_A_DQ17 RESET# VSS19

C1626 R1604 59 M_A_DQ25 2 R1605 1 197 66

M_CLK_DDR#1 CK#0 DQ27 M_A_DQ28 10KOhm VSS26

CK#1 DQ28 M_A_DQ29 VSS27

@ 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V

+1.5V +1.5V <3,6,16,57,69,83>

+1.5V_DDR3 +1.5V_DDR3 <16,18>

+0.75VS +0.75VS <16,57,83>

+3VS +3VS <29,48,80,91,92>

M_VREFDQ_DIMM1 M_VREFDQ_DIMM1 <18>

1% M_B_A14 80 39 M_B_DQ16 114 60

C1720 R1707 M_B_A15 78 41 M_B_DQ21 121 61

M_CLK_DDR#2 DQ19 M_B_DQ20 R1705 10KOhm SA0 VSS24

BA0 DQ20 SA1 VSS25

1% 57 M_B_DQ29 200 133

C1721 R1708 59 M_B_DQ24 134

M_CLK_DDR#3 CK#0 DQ27 M_B_DQ28 TEST VSS32

CK#1 DQ28 M_B_DQ25 VSS33

+1.5V_DDR3 +1.5V_DDR3 <16,17>

M_VREFCA_DIMM0 M_VREFCA_DIMM0 <16>

M_VREFDQ_DIMM0 M_VREFDQ_DIMM0 <16>

DDR3 Vref M_VREFCA_DIMM1

Title : DDR3(3)_CA/DQ Voltage

2 +VTT_CPU +VTT_CPU <3,6,7,25,26,27,29,32,57,82>

Title : VID Controller

+RTCBAT +3VA +VCC_RTC

1% +VCC_RTC R2006 2 1 330KOhm A14 AB9 INT_SERIRQ <30>

R2005 C2005 SGL_JUMP

R2020 1KOhm ACZ_SYNC SATA0RXN

3 4 RN2003B SB_SPICS1# AY3 T3

SPI_MOSI: iTPM strap.