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5 4 3 2 1

A6F Block
FAN + SENSOR
PAGE 4

D
DiagramCPU PAGE 5
CLOCK GEN
ICS954310
D

DISCHARGER
YONAH-2M CIRCUIT
PAGE 36
PAGE 2,3

Power On Sequence
FSB PAGE 39
667MHz
DEBUG PORT

LVDS & INV MCH-M PAGE 41

DDR2-667 Dual Channel DDR2


PAGE 12 Calistoga SO-DIMM X 2
CPU VCORE

CRT & TV OUT 945GM PAGE 14,15,16


PAGE 50

B0:02G010009121 SYSTEM PWR


PAGE 13
C PAGE 6,7,8,9,10,11 C

DMI interface PAGE 51

BAT & CHARGER


PCIE *1 MINI CARD
PAGE 57
WLAN
PAGE 26
SUPER I/O LPC
PRINT PORT 33MHz
PAGE 44
SMSC
LN47N217
ICH7-M 10/100/1000LAN
RTL8110SBL
PAGE 25 Azalia
KEYPAD PCI PAGE 33,34
PCMCIA
MATRIX 33MHz
B0:02G010008811 PAGE 31
PAGE 37
EC IT8510E PAGE
17,18,19,20
CardBus 1394
INSTANT KEY R5C841
PAGE 28,29
IDE USB PAGE 32
PAGE 37 PAGE 30
B B

CARD READER
PAGE 32
LED Control
PAGE 37
HDD Mini PCI
USB 2.0 PAGE 38
PAGE 27 CON X4
PAGE 35
ISA
ODD
ROM Azalia Codec
ALC660 PAGE 27
Bluetooth
PAGE 24
PAGE 21,22,23

PAGE 26

MDC
A
Connector Camera A
PAGE 34

PAGE 12

Title : BLOCK DIAGRAM


ASUSTeK COMPUTER INC
Engineer: Jack WANG
Size Project Name Rev
A3 A6F 1.1
Date: Monday, March 06, 2006 Sheet 1 of 63

5 4 3 2 1
5 4 3 2 1

6 H_A#[16..3]
6 H_REQ#[4..0]
6 H_A#[31..17]

T200
H_D#[0..63] 6
U200A

1
H_A#3 J4 H1 H_ADS#
H_A#4 A[3]# ADS# H_BNR# H_ADS# 6
D L4 E2 U200B D
H_A#5 A[4]# BNR# H_BPRI# H_BNR# 6 H_D#0 H_D#32
M3 A[5]# BPRI# G5 H_BPRI# 6 E22 D[0]# D[32]# AA23
H_A#6 K5 H_D#1 F24 AB24 H_D#33
H_A#7 A[6]# H_DEFER# H_D#2 D[1]# D[33]# H_D#34
M1 A[7]# DEFER# H5 H_DEFER# 6 E26 D[2]# D[34]# V24

ADDR GROUP 0
H_A#8 N2 F21 H_DRDY# H_D#3 H22 V26 H_D#35
H_A#9 A[8]# DRDY# H_DBSY# H_DRDY# 6 H_D#4 D[3]# D[35]# H_D#36
J1 E1 F23 W25

DATA GRP 2
A[9]# DBSY# H_DBSY# 6 D[4]# D[36]#

DATA GRP 0
H_A#10 N3 H_D#5 G25 U23 H_D#37
H_A#11 A[10]# H_BR0# R201 H_D#6 D[5]# D[37]# H_D#38
P5 A[11]# BR0# F1 H_BR0# 6 E25 D[6]# D[38]# U25
H_A#12 P2 56Ohm H_D#7 E23 U22 H_D#39
H_A#13 A[12]# H_IERR# H_D#8 D[7]# D[39]# H_D#40
L1 D20 +VCCP_AGTL+ K24 AB25

CONTROL
H_A#14 A[13]# IERR# H_INIT# H_D#9 D[8]# D[40]# H_D#41
P4 A[14]# INIT# B3 H_INIT# 17 G24 D[9]# D[41]# W22
H_A#15 P1 H_D#10 J24 Y23 H_D#42
H_A#16 A[15]# H_LOCK# H_D#11 D[10]# D[42]# H_D#43
R1 A[16]# LOCK# H4 H_LOCK# 6 J23 D[11]# D[43]# AA26
H_ADSTB#0 L2 2 1 H_D#12 H26 Y26 H_D#44
6 H_ADSTB#0 ADSTB[0]# H_CPURST# +VCCP_AGTL+ H_D#13 D[12]# D[44]# H_D#45
RESET# B1 H_CPURST# 6 F26 D[13]# D[45]# Y22

1
H_REQ#0 K3 F3 H_RS#0 R202 H_D#14 K22 AC26 H_D#46
H_REQ#1 REQ[0]# RS[0]# H_RS#1 H_RS#0 6 H_D#15 D[14]# D[46]# H_D#47
H2 F4 54.9Ohm / H25 AA24
H_REQ#2 REQ[1]# RS[1]# H_RS#2 H_RS#1 6 H_DSTBN#0 D[15]# D[47]# H_DSTBN#2
K2 REQ[2]# RS[2]# G3 H_RS#2 6 T201 6 H_DSTBN#0 H23 DSTBN[0]# DSTBN[2]# W24 H_DSTBN#2 6
H_REQ#3 J3 G2 H_TRDY# H_DSTBP#0 G22 Y25 H_DSTBP#2
H_REQ#4 REQ[3]# TRDY# H_TRDY# 6 6 H_DSTBP#0 H_DINV#0 DSTBP[0]# DSTBP[2]# H_DINV#2 H_DSTBP#2 6
L5 REQ[4]# 6 H_DINV#0 J26 DINV[0]# DINV[2]# V23 H_DINV#2 6
G6 H_HIT#
H_A#17 HIT# H_HITM# H_HIT# 6
Y2 A[17]# HITM# E4 H_HITM# 6
H_A#18 U5 H_D#16 N22 AC22 H_D#48
H_A#19 A[18]# H_D#17 D[16]# D[48]# H_D#49
R3 AD4 K25 AC23 Layout Note:
A[19]# BPM[0]# D[17]# D[49]#
ADDR GROUP 1

H_A#20 W6 AD3 H_D#18 P26 AB22 H_D#50


A[20]# BPM[1]# D[18]# D[50]# Comp0,2 connect with Z0=27.4 ohm,
XDP/ITP SIGNALS

H_A#21 U4 AD1 H_D#19 R23 AA21 H_D#51


H_A#22 A[21]# BPM[2]# +VCCP_AGTL+ H_D#20 D[19]# D[51]# H_D#52 make trace length shorter than 0.5".
Y5 A[22]# BPM[3]# AC4 L25 D[20]# D[52]# AB21

DATA GRP 1
H_A#23 U2 AC2 PRDY# 1 T202 H_D#21 L22 AC25 H_D#53 Comp1,3 connect with Z0=54.9 ohm,

DATA GRP 3
H_A#24 A[23]# PRDY# PREQ# R203 56Ohm / H_D#22 D[21]# D[53]# H_D#54
R4 A[24]# PREQ# AC1 L23 D[22]# D[54]# AD20 make trace length shorter than 0.5".
H_A#25 T5 AC5 TCK 1 R204 2 56Ohm H_D#23 M23 AE22 H_D#55
H_A#26 A[25]# TCK TDI R205 H_D#24 D[23]# D[55]# H_D#56 Comp[3:0] at least 25 mils away from
C
T3 A[26]# TDI AA6 1 2 56Ohm P25 D[24]# D[56]# AF23 C
H_A#27 W3 AB3 TDO R217 56Ohm / H_D#25 P22 AD24 H_D#57 any other toggling signal.
H_A#28 A[27]# TDO TMS H_D#26 D[25]# D[57]# H_D#58
W5 AB5 1 R206 2 56Ohm GND P23 AE21 27.4 ohm connects with an ~18mil
H_A#29 A[28]# TMS TRST# R207 H_D#27 D[26]# D[58]# H_D#59
Y4 A[29]# TRST# AB6 1 2 56Ohm T24 D[27]# D[59]# AD21 wide trace to comp0.
H_A#30 W2 C20 CPU_DBR# 1 T204 +VCCP_AGTL+ H_D#28 R24 AE25 H_D#60
H_A#31 A[30]# DBR# TPC28T H_D#29 D[28]# D[60]# H_D#61 54.9 ohm connect with 5mil-wide
Y1 A[31]# L26 D[29]# D[61]# AF25
H_ADSTB#1 V4 D21 H_PROCHOT_S# H_D#30 T25 AF22 H_D#62 to comp1
6 H_ADSTB#1 ADSTB[1]# PROCHOT# D[30]# D[62]#

2
A24 CPU_THRM_DA H_D#31 N24 AF26 H_D#63
H_A20M# THERMDA CPU_THRM_DC CPU_THRM_DA 4 H_DSTBN#1 D[31]# D[63]# H_DSTBN#3
THERM

A6 A25 R200 M24 AD23


17 H_A20M# H_FERR# A20M# THERMDC CPU_THRM_DC 4 6 H_DSTBN#1 H_DSTBP#1 DSTBN[1]# DSTBN[3]# H_DSTBP#3 H_DSTBN#3 6
A5 1KOhm N25 AE24
17 H_FERR# H_IGNNE# FERR# PM_THRMTRIP# 6 H_DSTBP#1 H_DINV#1 DSTBP[1]# DSTBP[3]# H_DINV#3 H_DSTBP#3 6
C4 C7 1% M26 AC20
17 H_IGNNE# IGNNE# THERMTRIP# PM_THRMTRIP# 4,7,17 6 H_DINV#1 DINV[1]# DINV[3]# H_DINV#3 6
H_STPCLK# GTL_REF H_COMP0 R208 27.4Ohm 1%

1
17 H_STPCLK# D5 STPCLK# AD26 GTLREF COMP[0] R26 1 2
H_INTR C6 <500 mil (55 Ohm) MISC U26 H_COMP1 R209 1 2 54.9Ohm 1% GND
HCLK

17 H_INTR LINT0 COMP[1]

2
H_NMI B4 A22 CLK_CPU_BCLK U1 H_COMP2 R210 1 2 27.4Ohm 1%
17 H_NMI LINT1 BCLK[0] CLK_CPU_BCLK 5 T/B trace 5.5 COMP[2]

1
H_SMI# A3 A21 CLK_CPU_BCLK# C200 R211 R212 1 2 TEST1 C26 V1 H_COMP3 R213 1 2 54.9Ohm 1%
17 H_SMI# SMI# BCLK[1] CLK_CPU_BCLK# 5 TEST1 COMP[3]
0.1UF/10V 2KOhm Space 25 1KOhm
AA1 RSVD[1]
N/A 1% /R214 1 2 TEST2 D25 TEST2 DPRSTP# E5 H_DPRSTP#
H_DPRSTP# 17,50
51Ohm H_DPSLP#

2
AA4 RSVD[2] RSVD[12] T22 DPSLP# B5 H_DPSLP# 17
GND H_DPWR#

1
AB2 RSVD[3] RSVD[A2] A2 DPWR# D24 H_DPWR# 6
AA3 CPU_BSEL0 B22 D6 H_PWRGD
RSVD[4] 5 CPU_BSEL0 CPU_BSEL1 BSEL[0] PWRGOOD H_PWRGD 17
M4 D2 GND GND B23 D7 1
RESERVED

RSVD[5] RSVD[13] 5 CPU_BSEL1 CPU_BSEL2 BSEL[1] SLP#


N5 F6 C21 AE6 T205
RSVD[6] RSVD[14] 5 CPU_BSEL2 BSEL[2] PSI#
T2 D3 H_CPUSLP#
RSVD[7] RSVD[15] PM_PSI# H_CPUSLP# 6,17
V3 C1 SOCKET479P
RSVD[8] RSVD[16] PM_PSI# 50
B2 AF1 BCLK FSB BSEL2BSEL1BSEL0 12G04600479A
RSVD[9] RSVD[17]
C3 RSVD[10] RSVD[18] D22 12G04600479A
RSVD[19] C23 133 533 L L H
B25 RSVD[11] RSVD[20] C24
166 667 L H H
SOCKET479P
B B

12G04600479A 68 ± 5% pull-up to Vcc1_05


If PROCHOT# is not used, then it must be terminated with a
56 pull-up resistor to VCCP.
If PROCHOT# is routed between CPU, IMVP and MCH,
pull-up resistor has to be 75 Ohm ± 5%

+VCCP_AGTL+ +VCCP
+VCCP_AGTL+ +VCCP_AGTL+
JP200
1 2 R215 R216
H_PROCHOT_S# H_PWRGD
28 H_PROCHOT_S#
SHORT_PIN
/ 56Ohm 56Ohm /
2.5A
+VCCP +VCCP 6,9,20,52
+VCCP_AGTL+ +VCCP_AGTL+ 3,5,6,9

A A

Title : YONAH CPU (1)


ASUSTeK COMPUTER INC Engineer: Jack Wang
Size Project Name Rev
Custom A6F 1.0
Date: Monday, March 06, 2006 Sheet 2 of 63
5 4 3 2 1
5 4 3 2 1

YUNAH FSB667 YUNAH FSB667


U200D
LFM TYP HFM Min Typ Max +VCCP_AGTL+ +VCCP_AGTL+ 2,5,6,9
A4 VSS[1] VSS[82] P6
VCC 1.14V 1.2V 1.356V VCCP 0.997V 1.05V 1.102V A8 VSS[2] VSS[83] P21 +VCORE +VCORE 50
A11 P24
C4 C3 C0 Min Typ Max A14
VSS[3] VSS[84]
R2
+1.5VS +1.5VS 9,10,20,26,36,42,52
VSS[4] VSS[85]
ICC 0.9A 7.59A 27A ICCP 2.5A A16 VSS[5] VSS[86] R5
A19 VSS[6] VSS[87] R22
A23 VSS[7] VSS[88] R25
A26 VSS[8] VSS[89] T1
B6 VSS[9] VSS[90] T4
D B8 T23 +VCORE D
+VCORE +VCORE VSS[10] VSS[91]
B11 VSS[11] VSS[92] T26
B13 VSS[12] VSS[93] U3
U200C B16 U6
VSS[13] VSS[94]
A7 VCC[1] VCC[68] AB20 B19 VSS[14] VSS[95] U21
A9 VCC[2] VCC[69] AB7 B21 VSS[15] VSS[96] U24
A10 VCC[3] VCC[70] AC7 B24 VSS[16] VSS[97] V2
A12 VCC[4] VCC[71] AC9 C5 VSS[17] VSS[98] V5
A13 VCC[5] VCC[72] AC12 C8 VSS[18] VSS[99] V22
A15 VCC[6] VCC[73] AC13 C11 VSS[19] VSS[100] V25
A17 VCC[7] VCC[74] AC15 C14 VSS[20] VSS[101] W1
A18 VCC[8] VCC[75] AC17 C16 VSS[21] VSS[102] W4
A20 VCC[9] VCC[76] AC18 C19 VSS[22] VSS[103] W23
B7 VCC[10] VCC[77] AD7 C2 VSS[23] VSS[104] W26 Place these caps on North of Secondary side
B9 VCC[11] VCC[78] AD9 C22 VSS[24] VSS[105] Y3
B10 VCC[12] VCC[79] AD10 C25 VSS[25] VSS[106] Y6

1
B12 AD12 D1 Y21 C301 C302 C303 C304 C305 C306 C307 C308
VCC[13] VCC[80] VSS[26] VSS[107] 22UF/6.3V
B14 VCC[14] VCC[81] AD14 D4 VSS[27] VSS[108] Y24
B15 AD15 D8 AA2 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V c0805
VCC[15] VCC[82] VSS[28] VSS[109]

2
B17 VCC[16] VCC[83] AD17 D11 VSS[29] VSS[110] AA5
B18 VCC[17] VCC[84] AD18 D13 VSS[30] VSS[111] AA8
B20 AE9 D16 AA11 GND GND GND GND GND GND GND GND
VCC[18] VCC[85] VSS[31] VSS[112]
C9 VCC[19] VCC[86] AE10 D19 VSS[32] VSS[113] AA14
C10 VCC[20] VCC[87] AE12 D23 VSS[33] VSS[114] AA16
C12 VCC[21] VCC[88] AE13 D26 VSS[34] VSS[115] AA19
C13 VCC[22] VCC[89] AE15 E3 VSS[35] VSS[116] AA22 Place these caps on North of Primary side
C15 VCC[23] VCC[90] AE17 E6 VSS[36] VSS[117] AA25
C17 VCC[24] VCC[91] AE18 E8 VSS[37] VSS[118] AB1

1
C18 AE20 E11 AB4 C309 C310 C311 C312 C313
C VCC[25] VCC[92] VSS[38] VSS[119] 22UF/6.3V +VCCP_AGTL+ C
D9
D10
VCC[26] VCC[93] AF9
AF10
E14
E16
VSS[39] VSS[120] AB8
AB11 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V c0805 +1.05V Decoupling Capacitor
VCC[27] VCC[94] VSS[40] VSS[121]
Place near CPU

2
D12 VCC[28] VCC[95] AF12 E19 VSS[41] VSS[122] AB13
D14 VCC[29] VCC[96] AF14 E21 VSS[42] VSS[123] AB16
D15 AF15 E24 AB19 GND GND GND GND GND
VCC[30] VCC[97] VSS[43] VSS[124]

1
D17 AF17 F5 AB23 +
VCC[31] VCC[98] VSS[44] VSS[125]

1
D18 AF18 +VCCP_AGTL+ F8 AB26 C314 C315 C316 C317 C318 C319 CE301
VCC[32] VCC[99] VSS[45] VSS[126] c0402 c0402 c0402 c0402 c0402 c0402 470UF/2.5V
E7 VCC[33] VCC[100] AF20 F11 VSS[46] VSS[127] AC3
E9 F13 AC6 Place these caps on South of Primary side 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V c7343d_h75
VCC[34] VSS[47] VSS[128]

2
E10 VCC[35] VCCP[1] V6 F16 VSS[48] VSS[129] AC8
E12 VCC[36] VCCP[2] G21 7 0Ohm 8 RN302D F19 VSS[49] VSS[130] AC11

1
E13 J6 F2 AC14 C320 C321 C322 C323 C324
VCC[37] VCCP[3] VSS[50] VSS[131] 22UF/6.3V
E15 VCC[38] VCCP[4] K6 F22 VSS[51] VSS[132] AC16
E17 M6 F25 AC19 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V c0805
VCC[39] VCCP[5] VSS[52] VSS[133] GND

2
E18 VCC[40] VCCP[6] J21 G4 VSS[53] VSS[134] AC21
E20 VCC[41] VCCP[7] K21 G1 VSS[54] VSS[135] AC24
+VCCA GND GND GND GND GND
F7 VCC[42] VCCP[8] M21 120mA / 20mil G23 VSS[55] VSS[136] AD2
F9 VCC[43] VCCP[9] N21 G26 VSS[56] VSS[137] AD5
F10 VCC[44] VCCP[10] N6 Close to Pin B26 H3 VSS[57] VSS[138] AD8
F12 VCC[45] VCCP[11] R21 H6 VSS[58] VSS[139] AD11
F14 VCC[46] VCCP[12] R6 H21 VSS[59] VSS[140] AD13 Place these caps on South of Secondary side
1

F15 T21 C325 C300 H24 AD16


VCC[47] VCCP[13] VSS[60] VSS[141]
F17 VCC[48] VCCP[14] T6 J2 VSS[61] VSS[142] AD19

1
F18 V21 10UF/10V 0.01UF/16V J5 AD22 C326 C327 C328 C329 C330 C331 C332 C333
VCC[49] VCCP[15] VSS[62] VSS[143] 22UF/6.3V
2

F20 VCC[50] VCCP[16] W21 J22 VSS[63] VSS[144] AD25


AA7 checklist suggests J25 AE1 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V c0805
VCC[51] VSS[64] VSS[145]

2
AA9 B26 K1 AE4
AA10
VCC[52] VCCA GND 10uF POSCAP K4
VSS[65] VSS[146]
AE8
VCC[53] VSS[66] VSS[147] GND GND GND GND GND GND GND GND
AA12 VCC[54] K23 VSS[67] VSS[148] AE11
B B
AA13 AD6 H_VID0 1 2 RN301A K26 AE14
VCC[55] VID[0] 0Ohm VR_VID0 50 VSS[68] VSS[149]
AA15 AF5 H_VID1 3 4 RN301B L3 AE16
VCC[56] VID[1] 0Ohm VR_VID1 50 VSS[69] VSS[150]
AA17 AE5 H_VID2 5 6 RN301C L6 AE19
VCC[57] VID[2] 0Ohm VR_VID2 50 VSS[70] VSS[151]
AA18 AF4 H_VID3 7 8 RN301D L21 AE23
VCC[58] VID[3] 0Ohm VR_VID3 50 VSS[71] VSS[152]
AA20 AE3 H_VID4 1 2 RN302A L24 AE26
VCC[59] VID[4] 0Ohm VR_VID4 50 VSS[72] VSS[153]
AB9 AF2 H_VID5 3 4 RN302B M2 AF3
VCC[60] VID[5] 0Ohm VR_VID5 50 VSS[73] VSS[154]
AC10 AE2 H_VID6 5 6 RN302C M5 AF6
VCC[61] VID[6] 0Ohm VR_VID6 50 VSS[74] VSS[155]
AB10 VCC[62] M22 VSS[75] VSS[156] AF8
AB12 R301 M25 AF11
VCC[63] VCCSENSE VSS[76] VSS[157]
AB14 VCC[64] VCCSENSE AF7 1 2 +VCORE N1 VSS[77] VSS[158] AF13
AB15 VCC[65] N4 VSS[78] VSS[159] AF16
AB17 100Ohm N23 AF19
VCC[66] VSSSENSE VCCSENSE 50 VSS[79] VSS[160]
AB18 VCC[67] VSSSENSE AE7 VSSSENSE 50 N26 VSS[80] VSS[161] AF21
P3 VSS[81] VSS[162] AF24
1

SOCKET479P
12G04600479A R300 SOCKET479P
100Ohm 12G04600479A
GND GND
2

GND

Layout Note:
VCCSENSE/VSSSENSE lines between the
CPU and the VR should have a trace width of
18 mils on 7 mils spacing, with trace
A A
impedance of Zo=27.4 Ohm.
The VCCSENSE/VSSSENSE should be
length matched to within 25 mils.
These resistors should be placed within 2
inch of the CPU. Title : Yonah CPU (2)
ASUSTeK COMPUTER INC Engineer: Jack Wang
Size Project Name Rev
A3 A6F 1.0
Date: Monday, March 06, 2006 Sheet 3 of 63
5 4 3 2 1
5 4 3 2 1

+12V +12V 32,36,61

Fan Speed Control


+5VS +5VS 13,19,20,21,22,27,28,36,37,38,44,50,61
+3VS +3VS 5,7,9,11,12,13,14,15,19,20,21,22,25,26,27,28,30,36,38,39,42,50,52,60,61
+3VA +3VA 12,20,28,37,39,54,59,63

D D

+5VS Q401 +V5S_FAN


KBC will issue a
Using a OP AMP and fine-tuning SI2301BDS_T1_E3

analog ( a voltage +V5S_FAN the level, we can improve the fan 2 3

3 D
speed accuracy.
CPU FAN

2
level ) signal.

2
G
1

1
C400 C402 D400

1 1
1
C401 1 2 1000PF/50V 0.1UF/10V 22UF/6.3V
SW: FAN_DA1 must R401 c0402 c0402 c0805
1N4148W

be low during S3 10KOhm +12V +V5S_FAN CON9 +3VS

2
r0402

1
U401 GND GND

1
FAN_A1 3 A+ + VCC 8 R402 GND

2
R404 1% FAN_OP FAN_PWR_G HOLD1 R403
1 1 2 1
28 FAN0_DA 1 2 FAN_A2 2 A- - AO FANSP1 2 10KOhm

1
14.7KOhm 330Ohm 3 r0402

1
GND 5 B+ + R405 C403 HOLD2
BO 7 10KOhm c0402 WTOB_CON_3P

2
3

Q402/ 3 6 B- - r0402 100PF/50V

5
D GND 4 FAN0_TACH 28
1

2N7002 / GND

2
R406 R407 LM358MX Q403 3

2
22 DLY_OP_SD 11 10KOhm 15KOhm GND GND GND R408 C
G r0402 1% GND FANSP1 1 2 FANSP 1 B
2 S

6
/ 12G170000039
RN400C Q404A 22kOhm E
2

5 FAN_PWR_G2 UM6K1N 1219 r0402 PMBS3904 2


+3VS 10KOhm 6 2
C GND GND GND C

1
Q404B

3
UM6K1N GND
GND
When fan speed is very slow, after RC
AND_OVER_TEMP# 5 integrator the level of FANSP1 will be
+3VS very low that may make south bridge do the

4
wrong detection.
GND
RN400A 1
10KOhm 2
RN400B 3 +3VS
10KOhm 4
U402

7
THERM# 1 A VCC 5
RN400D
28 OVER_TEMP# 2 B
10KOhm +3VA
3 GND 4 AND_OVER_TEMP#
Y 11/29

1
NC7SZ08P5X

8
06G004600811 R409
GND +3VS 10KOhm
r0402
R410 /

1
VSUS_ON

2
1 2 VSUS_ON 28,51
R411

3
0Ohm 1MOhm 3
B D B
r0402 Q405
/ 2N7002
VSUS_ON_G 11

2
G
2 S

1
Q406 3 C404
R412 C 0.22UF/6.3V

2
1 2 TRIP_R 1 B
2,7,17 PM_THRMTRIP#

2
330Ohm E GND
PMBS3904 2 GND

GND

Route H_THERMDA and H_THERMDC


on the same layer +3VS +3VS_THM

R400 Standby Mode: 3uA(Max. 10uA)


------------------OTHER SIGNALS 1 2 +3VS_THM
+3VA_EC Full Active: 0.5 mA(Max. 1mA)
1

12 mils 0Ohm C405


r0402 0.1UF/10V
===============GND +5VS c0402
2

10 mils +3VS_THM
2

R413
=========H_THERMDA(10 mils) 10KOhm Q400 U400
4"-8" CPU_THRM_DA 2
11

10 mils r0402 SMB1_CLK 8 1


28 SMB1_CLK SCLK VCC

1
SMB1_DAT CPU_THRM_DA C406
G

A 28 SMB1_DAT 7 SDA DXP 2 A


=========H_THERMDC(10 mils) SMBALERT# CPU_THRM_DC 2200PF/50V
1

28 THRM_CPU# 3 2 6 3
3

S 2

ALERT# DXN
D

10 mils 5 GND OVERT# 4

2
+3VS 1 2 CPU_THRM_DC 2
=========GND 2N7002 4"-8"
R414 MAX6657MSA THERM#
12 mils 4.7KOhm
---------------------OTHER SIGNALS r0402 Title : THER-SENSOR,FAN
ASUSTeK COMPUTER INC Engineer: Jack Wang
Avoid BPSB,Power Size Project Name Rev
A3 A6F 1.0
Date: Monday, March 06, 2006 Sheet 4 of 63
5 4 3 2 1
5 4 3 2 1

+VCCP_AGTL+

Request Control net Net name R501 / R502 0Ohm


2 1KOhm 1 CPU_BSEL0 1 2 MCH_BSEL0 7 +VCCP_AGTL+ +VCCP_AGTL+ 2,3,6,9
PCIE_REQ1# PCIE0(#),PCIE6(#) None R503 /
FSLC FSLB FSLA
+3VS +3VS 4,7,9,11,12,13,14,15,19,20,21,22,25,26,27,28,30,36,38,39,42,50,52,60,61
2 1KOhm 1 Bclk FSB BSEL2 BSEL1 BSEL0
PCIE_REQ2# PCIE1(#),PCIE8(#) None R504 / R500 0Ohm L L H
2 1KOhm 1 CPU_BSEL1 1 2 MCH_BSEL1 7
133 533
PCIE_REQ3# PCIE2(#),PCIE4(#) CLK_PCIE_MINICARD(#) R505 / R506 0Ohm 166 667 L H H
2 1KOhm 1 CPU_BSEL2 1 2 MCH_BSEL2 7
D D
PCIE_REQ4# PCIE3(#),PCIE5(#), CLK_MCH_3GPLL(#)
PCIE7(#)
GND
+3VS +3VS_CLK

L500
+3VS_CLK
1 2 Layout Note:
Place termination close to source IC

1
120Ohm/100Mhz C503 C504 C505 C500 C506
C501 C502

2
0.1UF/10V 0.1UF/10V 10UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V
L501

2
120Ohm/100Mhz CLK_CPU_BCLK R507 1 2 49.9Ohm
r0402
CLK_CPU_BCLK# R508 1 2 49.9Ohm

1
GND GND r0402
+3VS_VDDPCI
CLK_MCH_BCLK R509 1 2 49.9Ohm

1
r0402
Pin34 is PWRSAVE# C507 C508 C509 CLK_MCH_BCLK# R510 1 2 49.9Ohm
0.1UF/10V 0.1UF/10V 10UF/10V r0402

1
2

2
C510 C511 CLK_PCIE_ICH R511 1 2 49.9Ohm

2
R512 0.1UF/10V r0402
2.2Ohm 10UF/6.3V R513 CLK_PCIE_ICH# R514 1 2 49.9Ohm

2
GND 1Ohm r0402
U500

7
+3VS_CLK
CLK_MCH_3GPLL R515 1 2 49.9Ohm

1
VDDPCI1

VDDPCI2
R516 GND r0402

1
2 1 21 11 +3VS_VDD48 CLK_MCH_3GPLL# R517 1 2 49.9Ohm
C VDDPCIEX1 VDD48 C512 r0402 C
28 VDDPCIEX2
1

2.2Ohm 42 56 +3VS_VDDREF 1 2
X500 C513 C514 VDDPCIEX3 VDDREF CLK_LCD_SSCG R518 1 2 49.9Ohm
14.318Mhz 10UF/10V 0.1UF/10V 1 R519 2 ICS_34 34 VDD PCI/PCIEX_STOP# 63 STP_PCI#
STP_PCI# 19
0.1UF/10V r0402
1 2 0Ohm r0402 / CLK_LCD_SSCG# R520 1 2 49.9Ohm
2

50 62 STP_CPU# GND r0402


VDDCPU CPU_STOP# STP_CPU# 19,50
1

C515 C516
+3VS_VDDA 45 CLK_UMA_96M R521 1 2 49.9Ohm
27PF/50V 27PF/50V GND VDDA CLK_MCH R522 1
CPUCLKT1 49 2 33Ohm CLK_MCH_BCLK 6
r0402
CLK_MCH# R523 1 2 33Ohm CLK_UMA_96M# R524 1 2 49.9Ohm
2

GND 46 GNDA CPUCLKC1 48 CLK_MCH_BCLK# 6


r0402
ICS_X1 58 52 CLK_CPU R525 1 2 33Ohm
X1 CPUCLKT0 CLK_CPU# CLK_CPU_BCLK 2 CLK_PCIE_MINICARD
GND 51 R526 1 2 33Ohm R527 1 2 49.9Ohm
ICS_X2 CPUCLKC0 CLK_CPU_BCLK# 2
57 r0402
X2 CLK_PCIE_MINICARD# R528 1
CPUCLKT2_ITP/PCIEXT8 44 2 49.9Ohm
R529 1 2 33Ohm LCD_SSCG 17 43 r0402
7 CLK_LCD_SSCG 27FIX/LCD_SSCGT/PCIEX0T CPUCLKC2_ITP/PCIEXC8
R530 1 2 33Ohm LCD_SSCG# 18 41 PCIE7 R531 1 2 10KOhm
7 CLK_LCD_SSCG# 27SS/LCD_SSCGC/PCIEX0C PEREQ1#/PCIEXT7 PCIE#7 R532 1
PEREQ2#/PCIEXC7 40 2 10KOhm GND
19 CLK_USB48
R533 1 2 33Ohm FSA 12 FSLA/USB_48MHz PREQ#1
R534 1 2 2.2KOhm 39
2 CPU_BSEL0 PCIEXT6
16 38 GND 0=PCIEX 6/0 Not Controlled
2 CPU_BSEL1 FSLB/TEST_MODE PCIEXC6

PCICLK5 PCIEXT5 36 1=PCIEX 6/0 Controlled


R535 1 2 33Ohm 5 35
33 CLK_LAN_PCI SELPCIEX0_LCD#PCICLK5 PCIEXC5
R536 1 2 10KOhm
GND
30 CLK_CBPCI
R546 1 2 33Ohm PCICLK4 4 PCICLK4 PCIEXT4 30 PCIE4 R538 1 2 33Ohm CLK_MCH_3GPLL 7
31 PCIE#4 R539 1 2 33Ohm PREQ#2
PCICLK3 PCIEXC4 CLK_MCH_3GPLL# 7
R540 1 2 33Ohm 3
25 CLK_SIOPCI PCICLK3 PCIE3
24 R541 1 2 33Ohm 0=PCIEX 8/1 Not Controlled
PCICLK2 PCIEXT3 PCIE#3 R543 1 CLK_PCIE_MINICARD 26
B R542 1 2 33Ohm 64 25 2 33Ohm B
28 CLK_ECPCI PCICLK2/REQ_SEL PCIEXC3 CLK_PCIE_MINICARD# 26
R544 1 2 10KOhm 1=PCIEX 8/1 Controlled
+3VS_CLK PCIE2
22 R545 56Ohm
CLK_MINIPCI PCICLK_F1 PCIEXT2 PCIE#2 R547 CLK_PCIE_ICH 18
9 23 56Ohm
SELLCD_27#/PCICLK_F1 PCIEXC2 CLK_PCIE_ICH# 18
R548 1 2 10KOhm
+3VS_CLK
18 CLK_ICHPCI
R549 1 2 33Ohm PCICLK_F0 8 ITP_EN/PCICLK_F0 PCIEXT1 19 PREQ#3
R550 1 2 10KOhm 20
+3VS_CLK PCIEXC1
14,15,19,26 SMB_CLK_S 54 SCLK 2/23/06 0=PCIEX 4/2 Not Controlled
SATACLKT 26
14,15,19,26 SMB_DAT_S 55 SDATA SATACLKC 27 1=PCIEX 4/2 Controlled
R562 ICS_IREF 47 14 DOT96 R551 1 2 33Ohm
IREF DOTT_96MHz DOT96# R552 1 CLK_UMA_96M 7
10Ohm 15 2 33Ohm
DOTC_96MHz CLK_UMA_96M# 7
2

CLK_MINIPCI 2 1 CLK_MINIPCI_D 38 +3VS_CLK


C520

C518

C519

C517

C521

C522

C523

R553 PREQ#4
475Ohm R554 2 1 10KOhm +3VS
2

/ 0=PCIEX 7/5/3 Not Controlled

1
R561 2 32
GND1 PEREQ3# MCH_CLK_REQ# 7
/ / / / / / / internal R555
1

CLK_DEBUG 41 6 GND2 1=PCIEX 7/5/3 Controlled


10PF/50V

10PF/50V

10PF/50V

10PF/50V

10PF/50V

10PF/50V

10PF/50V

PEREQ4# 2 R556 1 0Ohm 10KOhm


1

13 GND3 pull high PEREQ4# 33 CLKREQ# 26


4.7OHM GND 29 /
GND4 R557 2
37 GND5 1 10KOhm +3VS
/

2
53 GND6 Vtt_PwrGd#/PD 10 CLK_EN# 50
2/23/06 59 GND7 R558 1 2 2.2KOhm CPU_BSEL2 2
SELPCIE0_LCD#: GND
0-->pin17,pin18=LCDCLK(96MHz) or GND 61 REF1 R559 1 2 33Ohm
REF1/FSLC/TEST_SEL REF0 CLK_14_SIO 25
27M/27M_SS 60 R560 1 2 33Ohm
REF0 CLK_ICH14 19
Realtek:Mount R519,Remove R550 R534
A A

SELLCD_27#/PCICLK_F1:
1-->pin17,pin18=LCDCLK(96MHz)
Internal Pull-Up Resistor
PCICLK2/REQ_SEL:
1-->pin40,pin41=PREQ1#,PREQ2# Title : CLOCK GEN
Internal Pull-Down Resistor ASUSTeK COMPUTER INC Engineer: Jack Wang
ITP_EN/PCICLK_F0: Size Project Name Rev
1-->CPU_ITP pair Custom A6F 1.1
Date: Monday, March 06, 2006 Sheet 5 of 63
5 4 3 2 1
5 4 3 2 1

2 H_D#[0..63] H_A#[31..3] 2

+VCCP +VCCP 2,9,20,52


U600A
H_D#0 F1 H9 H_A#3
H_D#1 H_D#_0 H_A#_3 +VCCP_AGTL+ +VCCP_AGTL+ 2,3,5,9
J1 C9 H_A#4
H_D#2 H_D#_1 H_A#_4 H_A#5
H1 H_D#_2 H_A#_5 E11
H_D#3 J6 G11 H_A#6
H_D#4 H_D#_3 H_A#_6 H_A#7
H3 H_D#_4 H_A#_7 F11
D H_D#5 H_A#8 D
K2 H_D#_5 H_A#_8 G12
H_D#6 G1 F9 H_A#9
H_D#7 H_D#_6 H_A#_9 H_A#10 +VCCP +VCCP
G2 H_D#_7 H_A#_10 H11
H_D#8 K9 J12 H_A#11
H_D#9 H_D#_8 H_A#_11 H_A#12
K1 H_D#_9 H_A#_12 G14

2
H_D#10 K7 D9 H_A#13
H_D#11 H_D#_10 H_A#_13 H_A#14 R601 R602
J8 H_D#_11 H_A#_14 J14 5.5/20 mils
H_D#12 H4 H13 H_A#15 54.9Ohm 54.9Ohm
H_D#13 H_D#_12 H_A#_15 H_A#16 1% 1%
J3 H_D#_13 H_A#_16 J15
H_D#14 K11 F14 H_A#17
H_D#15 H_D#_14 H_A#_17 H_A#18 H_XSCOMP H_YSCOMP

1
G4 H_D#_15 H_A#_18 D12
H_D#16 T10 A11 H_A#19
H_D#17 H_D#_16 H_A#_19 H_A#20
W11 H_D#_17 H_A#_20 C11
H_D#18 T3 A12 H_A#21
H_D#19 H_D#_18 H_A#_21 H_A#22 H_XRCOMP H_YRCOMP
U7 H_D#_19 H_A#_22 A13
H_D#20 U9 E13 H_A#23
H_D#_20 H_A#_23

2
H_D#21 U11 G13 H_A#24
H_D#22 H_D#_21 H_A#_24 H_A#25 R603 R604
T11 H_D#_22 H_A#_25 F12
H_D#23 W9 B12 H_A#26 24.9Ohm 10/20mils 24.9Ohm
H_D#24 H_D#_23 H_A#_26 H_A#27 +VCCP_AGTL+ 1% 1%
T1 H_D#_24 H_A#_27 B14
H_D#25 T8 C12 H_A#28
H_D#26 H_D#_25 H_A#_28 H_A#29

1
T4 H_D#_26 H_A#_29 A14
H_D#27 W7 C14 H_A#30
H_D#_27 H_A#_30

2
C
H_D#28 U5 H_D#_28 H_A#_31 D14 H_A#31 <500 mil (55 Ohm) GND GND
C
H_D#29 T9 R605 T/B trace 5.5 ,
H_D#30 H_D#_29
W6 H_D#_30 H_ADS# E8 H_ADS#
H_ADS# 2
100Ohm Space 25
H_D#31 T5 B9 H_ADSTB#0 1%
H_D#32 H_D#_31 H_ADSTB#_0 H_ADSTB#0 2
AB7 C13 H_ADSTB#1
H_D#33 H_D#_32 H_ADSTB#_1 H_VREF H_ADSTB#1 2

1
AA9 H_D#_33 H_AVREF J13
H_D#34 W4 C6 H_BNR# +VCCP
H_D#_34 H_BNR# H_BNR# 2

2
H_D#35 W3 F6 H_BPRI#
HOST
H_D#_35 H_BPRI# H_BPRI# 2

1
H_D#36 Y3 C7 H_BR0# R606 C601
H_D#_36 H_BREQ#0 H_BR0# 2

2
H_D#37 Y7 B7 H_CPURST# 200Ohm
H_D#38 H_D#_37 H_CPURST# H_DBSY# H_CPURST# 2
W5 A7 1% 0.1UF/10V R607
H_D#39 H_D#_38 H_DBSY# H_DEFER# H_DBSY# 2
221Ohm

2
Y10 H_D#_39 H_DEFER# C3 H_DEFER# 2
H_D#40 H_DPWR# 1%

1
AB8 H_D#_40 H_DPWR# J9 H_DPWR# 2
H_D#41 W2 H8 H_DRDY#
H_D#42 H_D#_41 H_DRDY# H_DRDY# 2
GND GND

1
AA4 H_D#_42 H_DVREF K13
H_D#43 AA7 H_XSWING
H_D#44 H_D#_43 H_DINV#0
AA2 H_D#_44 H_DINV#_0 J7 H_DINV#0 2

1
H_D#45 AA6 W8 H_DINV#1 C602
H_D#46 H_D#_45 H_DINV#_1 H_DINV#1 2
AA10 U3 H_DINV#2 Layout Note: R608
H_D#47 H_D#_46 H_DINV#_2 H_DINV#2 2
Y8 AB10 H_DINV#3 100Ohm 0.1UF/10V 10/20mils
H_D#_47 H_DINV#_3 H_DINV#3 2
H_D#48 0.1uF should be placed 100mils or 1%

2
AA1 H_D#_48
H_D#49 AB4 K4 H_DSTBN#0
H_D#50 H_D#_49 H_DSTBN#_0 H_DSTBN#1
H_DSTBN#0 2 less from GMCH pin.

1
AC9 H_D#_50 H_DSTBN#_1 T7 H_DSTBN#1 2
H_D#51 AB11 Y5 H_DSTBN#2 GND
H_D#52 H_D#_51 H_DSTBN#_2 H_DSTBN#2 2
B AC11 AC4 H_DSTBN#3 GND B
H_D#53 H_D#_52 H_DSTBN#_3 H_DSTBN#3 2
AB3 H_D#_53
H_D#54 H_DSTBP#0
H_D#55
AC2 H_D#_54 H_DSTBP#_0 K3
H_DSTBP#1
H_DSTBP#0 2 +VCCP Signal voltage level =
AD1 H_D#_55 H_DSTBP#_1 T6 H_DSTBP#1 2
H_D#56 AD9 AA5 H_DSTBP#2
H_DSTBP#2 2
0.3125*VCCP
H_D#57 H_D#_56 H_DSTBP#_2 H_DSTBP#3
AC1 H_D#_57 H_DSTBP#_3 AC5 H_DSTBP#3 2 Trace should be 10 mil wide

2
H_D#58 AD7 H_D#_58
H_D#59 AC6 H_D#_59
R609 with 20 mil spacing
H_D#60 AB5 D3 H_HIT# 221Ohm
H_D#61 H_D#_60 H_HIT# H_HITM# H_HIT# 2
AD10 D4 1%
H_D#62 H_D#_61 H_HITM# H_LOCK# H_HITM# 2
AD4 H_D#_62 H_LOCK# B3 H_LOCK# 2
H_D#63 H_YSWING

1
AC8 H_D#_63
H_REQ#[4..0] 2

1
H_XRCOMP E1 C600
H_XSCOMP H_XRCOMP H_REQ#0 R610
E2 H_XSCOMP H_REQ#_0 D8
H_XSWING E4 G8 H_REQ#1 100Ohm 0.1UF/10V
H_XSWING H_REQ#_1 H_REQ#2 1%

2
H_REQ#_2 B8
H_YRCOMP Y1 F8 H_REQ#3
H_YSCOMP H_YRCOMP H_REQ#_3 H_REQ#4

1
U1 H_YSCOMP H_REQ#_4 A8 H_RS#[0..2] 2
H_YSWING W1 GND
H_YSWING H_RS#0 GND
H_RS#_0 B4
CLK_MCH_BCLK AG2 E6 H_RS#1
5 CLK_MCH_BCLK CLK_MCH_BCLK# AG1 H_CLKIN H_RS#_1
D6 H_RS#2 R600
5 CLK_MCH_BCLK# H_CLKIN# H_RS#_2 0Ohm
A E3 N_CPUSLP# 2 1 A
H_SLPCPU# H_TRDY# H_CPUSLP# 2,17
H_TRDY# E7 H_TRDY# 2
CALISTOGA_Q137
Title : Calistoga MCH (1)
ASUSTeK COMPUTER INC Engineer: Jack Wang
Size Project Name Rev
B A6F 1.0
Date: Monday, March 06, 2006 Sheet 6 of 63
5 4 3 2 1
5 4 3 2 1

+1.5VS_PCIE +3VS +3VS 4,5,9,11,12,13,14,15,19,20,21,22,25,26,27,28,30,36,38,39,42,50,52,60,61


M_VREF_MCH M_VREF_MCH 14,15,16
+3VS +1.5VS +1.5VS 9,10,20,26,36,42,52
U600C R701
L_BKLTCTL D32 D40 EXP_A_COMP 1 2
12 L_BKLTCTL L_BKLTEN L_BKLTCTL EXP_A_COMPI +1.5VS_PCIE +1.5VS_PCIE 9
J30 L_BKLTEN EXP_A_COMPO D38 +1.8V +1.8V 10,14,15,36,53
R702 1 10KOhm 2 L_CTLA_CLK H30 24.9Ohm
R703 10KOhm 2 L_CTLB_DATA L_CLK_CTLA 1%
1 H29 L_DATA_CTLB EXP_A_RXN_0 F34
R704 1 10KOhm 2 EDID_CLK G26 G38
R705 10KOhm 2 EDID_DAT L_DDC_CLK EXP_A_RXN_1 U600B
1 G25 L_DDC_DATA EXP_A_RXN_2 H34
L_IBG B38 J38 T32 AY35 M_CLK_DDR0
L_VBG L_IBG EXP_A_RXN_3 RSVD_1 SM_CK_0 M_CLK_DDR1 M_CLK_DDR0 15
D T702 1 C35 L34 R32 AR1 D
L_VBG EXP_A_RXN_4 RSVD_2 SM_CK_1 M_CLK_DDR1 15
1
L_VDDEN F32 M38 F3 AW7 M_CLK_DDR2
L_VDDEN EXP_A_RXN_5 +3VS RSVD_3 SM_CK_2 M_CLK_DDR3 M_CLK_DDR2 14
R700 C33 N34 F7 AW40
L_VREFH EXP_A_RXN_6 RSVD_4 SM_CK_3 M_CLK_DDR3 14
1.5KOhm C32 P38 AG11
L_VREFL EXP_A_RXN_7 RSVD_5

RSVD
1% R34 R706 AF11 AW35 M_CLK_DDR#0
LVDS_LCLKN EXP_A_RXN_8 RSVD_6 SM_CK#_0 M_CLK_DDR#0 15
A33 LA_CLK# EXP_A_RXN_9 T38 1 2 PM_EXTTS#0 H7 RSVD_7 SM_CK#_1 AT1 M_CLK_DDR#1
M_CLK_DDR#1 15
LVDS_LCLKP M_CLK_DDR#2
2

A32 LA_CLK EXP_A_RXN_10 V34 10KOhm J19 RSVD_8 SM_CK#_2 AY7 M_CLK_DDR#2 14
LVDS_UCLKN E27 W38 K30 AY40 M_CLK_DDR#3
LVDS_UCLKP LB_CLK# EXP_A_RXN_11 TV_DCONSEL_0 SM_CK#_3 M_CLK_DDR#3 14
GND GND E26 Y34 R707 J29
LB_CLK EXP_A_RXN_12 TV_DCONSEL_1
EXP_A_RXN_13 AA38 1 2 PM_EXTTS#1 A41 RSVD_11 SM_CKE_0 AU20 M_CKE0
M_CKE[0..3] 14,15,16
L_BKLTEN LVDS_L0N C37 AB34 10KOhm A35 AT20 M_CKE1
LVDS_L1N LA_DATA#_0 EXP_A_RXN_14 RSVD_12 SM_CKE_1 M_CKE2 M_CS#[0..3] 14,15,16
B35 LA_DATA#_1 EXP_A_RXN_15 AC38 A34 RSVD_13 SM_CKE_2 BA29 M_ODT[0..3] 14,15,16

LVDS
2

LVDS_L2N A37 D28 AY29 M_CKE3


R708 LA_DATA#_2 RSVD_14 SM_CKE_3
EXP_A_RXP_0 D34 D27 RSVD_15 M_CS#0

DDR MUXING
100KOhm F38 AW13 Layout Note:
EXP_A_RXP_1 SM_CS#_0 M_CS#1
G34 AW12
LVDS_L0P B37
EXP_A_RXP_2
H38 MCH_BSEL0 K16
SM_CS#_1
AY21 M_CS#2 Route as short as
LA_DATA_0 EXP_A_RXP_3 5 MCH_BSEL0 CFG_0 SM_CS#_2
LVDS_L1P MCH_BSEL1 M_CS#3 possible
1

B34 LA_DATA_1 EXP_A_RXP_4 J34 5 MCH_BSEL1 K18 CFG_1 SM_CS#_3 AW21


LVDS_L2P A36 L38 MCH_BSEL2 J18 R709 40.2Ohm /
LA_DATA_2 EXP_A_RXP_5 5 MCH_BSEL2 MCH_CFG_3 CFG_2 M_OCDCOMP0
GND M34 T703 1 F18 AL20 2 1
EXP_A_RXP_6 T704 MCH_CFG_4 CFG_3 SM_OCDCOMP_0 M_OCDCOMP1
EXP_A_RXP_7 N38 1 E15 CFG_4 SM_OCDCOMP_1 AF10 2 1
LVDS_U0N G30 P34 MCH_CFG_5 F15
LVDS_U1N LB_DATA#_0 EXP_A_RXP_8 11 MCH_CFG_5 MCH_CFG_6 CFG_5 M_ODT0
D30 R38 T705 1 E18 BA13 R710 40.2Ohm /
LVDS_U2N LB_DATA#_1 EXP_A_RXP_9 MCH_CFG_7 CFG_6 SM_ODT_0 M_ODT1
F29 LB_DATA#_2 EXP_A_RXP_10 T34 11 MCH_CFG_7 D19 CFG_7 SM_ODT_1 BA12 GND
MCH_CFG_8 M_ODT2

PCI-EXPRESS GRAPHICS
V38 T706 1 D16 AY20
EXP_A_RXP_11 MCH_CFG_9 CFG_8 SM_ODT_2 M_ODT3 +1.8V
W34 11 MCH_CFG_9 G16 AU21

CFG
EXP_A_RXP_12 T707 MCH_CFG_10 CFG_9 SM_ODT_3 R711 80.6Ohm 1%
EXP_A_RXP_13 Y38 1 E16 CFG_10
LVDS_U0P F30 AA34 MCH_CFG_11 D15 AV9 M_RCOMP# 1 2
LVDS_U1P LB_DATA_0 EXP_A_RXP_14 11 MCH_CFG_11 MCH_CFG_12 CFG_11 SM_RCOMP# M_RCOMP
D29 AB38 T708 1 G15 AT9 1 2
C LVDS_U2P LB_DATA_1 EXP_A_RXP_15 T700 MCH_CFG_13 CFG_12 SM_RCOMP C
F28 LB_DATA_2 1 K15 CFG_13
F36 T709 1 MCH_CFG_14 C15 AK1 M_VREF_MCH R712 80.6Ohm 1%
EXP_A_TXN_0 T710 MCH_CFG_15 CFG_14 SM_VREF_0 GND
EXP_A_TXN_1 G40 1 H16 CFG_15 SM_VREF_1 AK41
H36 MCH_CFG_16 G18
EXP_A_TXN_2 11 MCH_CFG_16 MCH_CFG_17 CFG_16
J40 T711 1 H15
R713 2 150Ohm 1 TV_DACA_OUT_L A16 EXP_A_TXN_3 MCH_CFG_18 CFG_17 CLK_MCH_3GPLL#
TV_DACA_OUT EXP_A_TXN_4 L36 11 MCH_CFG_18 J25 CFG_18 G_CLKIN# AF33 CLK_MCH_3GPLL# 5
R714 2 150Ohm 1 TV_DACB_OUT_L C18 M40 MCH_CFG_19 K27 AG33 CLK_MCH_3GPLL
TV_DACC_OUT_L A19 TV_DACB_OUT EXP_A_TXN_5 11 MCH_CFG_19 MCH_CFG_20 CFG_19 G_CLKIN CLK_UMA_96M# CLK_MCH_3GPLL 5
R715 2 150Ohm 1 N36 T712 1 J26 A27

CLK
TV_DACC_OUT EXP_A_TXN_6 CFG_20 D_REFCLKIN# CLK_UMA_96M CLK_UMA_96M# 5
TV

1% P40 A26
TV_IREF EXP_A_TXN_7 PM_BMBUSY# D_REFCLKIN CLK_LCD_SSCG# CLK_UMA_96M 5
2 1 J20 TV_IREF EXP_A_TXN_8 R36 19 PM_BMBUSY# G28 PM_BMBUSY# D_REFSSCLKIN# C40 CLK_LCD_SSCG# 5
GND B16 T40 PM_EXTTS#0 F25 D41 CLK_LCD_SSCG
TV_IRTNA EXP_A_TXN_9 PM_EXTTS#_0 D_REFSSCLKIN CLK_LCD_SSCG 5

PM
R716 B18 V36 R724 1 0Ohm 2 PM_EXTTS#1 H26
TV_IRTNB EXP_A_TXN_10 19,50 PM_DPRSLPVR PM_THRMTRIP# G6 PM_EXTTS#_1
4.99KOhm B19 W40 /
TV_IRTNC EXP_A_TXN_11 2,4,17 PM_THRMTRIP# ICH7_PWROK AH33 PM_THRMTRIP# DMI_TXN0 DMI_TXN[0..3] 18
GND 1% Y36 AE35
EXP_A_TXN_12 19,28 ICH7_PWROK PWROK DMI_RXN_0 DMI_TXN1
EXP_A_TXN_13 AA40 AH34 RSTIN# DMI_RXN_1 AF39
GND
EXP_A_TXN_14 AB36 18,19,27,28 PLT_RST# 2 1 RST_IN#_MCH DMI_RXN_2 AG35 DMI_TXN2
AC40 AH39 DMI_TXN3

MISC
EXP_A_TXN_15 R717 100Ohm DMI_RXN_3
H28 SDVO_CTRLCLK DMI_TXP[0..3] 18
R718 2 150Ohm 1 BLUE_L E23 CRT_BLUE EXP_A_TXP_0 D36 H27 SDVO_CTRLDATA
1% D23 F40 MCH_ICH_SYNC# K28 AC35 DMI_TXP0
CRT_BLUE# EXP_A_TXP_1 18 MCH_ICH_SYNC# ICH_SYNC# DMI_RXP_0
R719 2 150Ohm 1 GREEN_L C22 CRT_GREEN EXP_A_TXP_2 G36 5 MCH_CLK_REQ#
MCH_CLK_REQ# H32 CLK_REQ# DMI_RXP_1 AE39 DMI_TXP1
1% B22 H40 AF35 DMI_TXP2
CRT_GREEN# EXP_A_TXP_3 DMI_RXP_2
R720 2 150Ohm 1 RED_L A21 CRT_RED EXP_A_TXP_4 J36 D1 NC0 DMI_RXP_3 AG39 DMI_TXP3
1% B21 L40 C41
CRT_RED# EXP_A_TXP_5 NC1 DMI_RXN[0..3] 18
VGA

EXP_A_TXP_6 M36 C1 NC2


GND GND N40 BA41 AE37 DMI_RXN0
R721 CRT_DDC_CLK EXP_A_TXP_7 NC3 DMI_TXN_0 DMI_RXN1
C26 CRT_DDC_CLK EXP_A_TXP_8 P36 BA40 NC4 DMI_TXN_1 AF41
39Ohm CRT_DDC_DATA C25 R40 BA39 AG37 DMI_RXN2
DAC_HSYNC_GM 1 CRT_DDC_DATA EXP_A_TXP_9 NC5 DMI_TXN_2 DMI_RXN3
2 N_HSYNC G23 T36 BA3 AH41

DMI
B CRT_HSYNC EXP_A_TXP_10 NC6 DMI_TXN_3 B
J22 CRT_IREF EXP_A_TXP_11 V40 BA2 NC7 DMI_RXP[0..3] 18
DAC_VSYNC_GM 1 2 N_VSYNC

NC
H23 CRT_VSYNC EXP_A_TXP_12 W36 BA1 NC8
Y40 B41 AC37 DMI_RXP0
R722 CRT_IREF EXP_A_TXP_13 NC9 DMI_TXP_0 DMI_RXP1
EXP_A_TXP_14 AA36 B2 NC10 DMI_TXP_1 AE41
39Ohm AB40 AY41 AF37 DMI_RXP2
EXP_A_TXP_15 NC11 DMI_TXP_2
1

AY1 AG41 DMI_RXP3


R723 CALISTOGA_Q137 NC12 DMI_TXP_3
AW41 NC13
255Ohm AW1
1% NC14
A40 NC15
A4 NC16
2

A39 NC17
A3 NC18
GND
CALISTOGA_Q137
put at pin1
LVDS_L0N
LVDS_L0N 12
LVDS_LCLKN
LVDS_LCLKN 12
of 150 Ohm
LVDS_L1N LVDS_LCLKP +3VS
LVDS_L2N LVDS_L1N 12 LVDS_UCLKN LVDS_LCLKP 12
U700
LVDS_L2N 12 LVDS_UCLKP LVDS_UCLKN 12
74LVC1G32GV
LVDS_L0P LVDS_UCLKP 12
LVDS_L0P 12
JP701 SHORT_PIN 1 B VCC 5
LVDS_L1P TV_DACA_OUT_L 1 2 TV_DACA_OUT
LVDS_L2P LVDS_L1P 12 L_BKLTEN TV_DACA_OUT 13 DAC_VSYNC_GM
LVDS_L2P 12 L_BKLTEN 12 2 A
JP702 SHORT_PIN
LVDS_U0N EDID_CLK TV_DACB_OUT_L 1 2 TV_DACB_OUT 3 GND 4 CRT_VSYNC
LVDS_U1N LVDS_U0N 12 EDID_DAT EDID_CLK 12 TV_DACB_OUT 13 CRT_VSYNC 13
Y
LVDS_U2N LVDS_U1N 12 EDID_DAT 12
LVDS_U2N 12 L_VDDEN
L_VDDEN 12
JP703 SHORT_PIN 1 B VCC 5 +3VS
LVDS_U0P TV_DACC_OUT_L 1 2 TV_DACC_OUT
A
LVDS_U1P LVDS_U0P 12 TV_DACC_OUT 13 DAC_HSYNC_GM
A
LVDS_U1P 12 2 A
LVDS_U2P
LVDS_U2P 12 DAC_HSYNC_GM CRT_HSYNC
JP704 SHORT_PIN 3 GND 4
DAC_VSYNC_GM RED_L RED CRT_HSYNC 13
1 2 Y
RED 13
U701
CRT_DDC_CLK JP705 SHORT_PIN 74LVC1G32GV
CRT_DDC_CLK 13
CRT_DDC_DATA
CRT_DDC_DATA 13
GREEN_L 1 2 GREEN
GREEN 13 Title : Calistoga PCI-E (2)
JP706 SHORT_PIN Engineer:
BLUE_L BLUE
ASUSTeK COMPUTER INC Jack Wang
1 2 BLUE 13 Size Project Name Rev
A3 A6F 1.0
Date: Monday, March 06, 2006 Sheet 7 of 63
5 4 3 2 1
5 4 3 2 1

D D

U600D U600E
M_A_DQ0 AJ35 AU12 M_A_BS#0 M_B_DQ0 AK39 AT24 M_B_BS#0
SA_DQ0 SA_BS_0 M_A_BS#0 15,16 SB_DQ0 SB_BS_0 M_B_BS#0 14,16
M_A_DQ1 AJ34 AV14 M_A_BS#1 M_B_DQ1 AJ37 AV23 M_B_BS#1
SA_DQ1 SA_BS_1 M_A_BS#1 15,16 SB_DQ1 SB_BS_1 M_B_BS#1 14,16
M_A_DQ2 AM31 BA20 M_A_BS#2 M_B_DQ2 AP39 AY28 M_B_BS#2
SA_DQ2 SA_BS_2 M_A_BS#2 15,16 SB_DQ2 SB_BS_2 M_B_BS#2 14,16
M_A_DQ3 AM33 M_B_DQ3 AR41
M_A_DQ4 SA_DQ3 M_A_CAS# M_B_DQ4 SB_DQ3 M_B_CAS#
AJ36 SA_DQ4 SA_CAS# AY13 M_A_CAS# 15,16 AJ38 SB_DQ4 SB_CAS# AR24 M_B_CAS# 14,16
M_A_DQ5 AK35 AJ33 M_A_DM0 M_B_DQ5 AK38 AK36 M_B_DM0
M_A_DQ6 SA_DQ5 SA_DM_0 M_A_DM1 M_B_DQ6 SB_DQ5 SB_DM_0 M_B_DM1
AJ32 SA_DQ6 SA_DM_1 AM35 AN41 SB_DQ6 SB_DM_1 AR38
M_A_DQ7 AH31 AL26 M_A_DM2 M_B_DQ7 AP41 AT36 M_B_DM2
M_A_DQ8 SA_DQ7 SA_DM_2 M_A_DM3 M_B_DQ8 SB_DQ7 SB_DM_2 M_B_DM3
AN35 SA_DQ8 SA_DM_3 AN22 AT40 SB_DQ8 SB_DM_3 BA31
M_A_DQ9 AP33 AM14 M_A_DM4 M_B_DQ9 AV41 AL17 M_B_DM4
M_A_DQ10 SA_DQ9 SA_DM_4 M_A_DM5 M_B_DQ10 SB_DQ9 SB_DM_4 M_B_DM5
AR31 SA_DQ10 SA_DM_5 AL9 AU38 SB_DQ10 SB_DM_5 AH8
M_A_DQ11 AP31 AR3 M_A_DM6 M_B_DQ11 AV38 BA5 M_B_DM6
M_A_DQ12 SA_DQ11 SA_DM_6 M_A_DM7 M_B_DQ12 SB_DQ11 SB_DM_6 M_B_DM7
AN38 SA_DQ12 SA_DM_7 AH4 AP38 SB_DQ12 SB_DM_7 AN4
M_A_DQ13 AM36 M_B_DQ13 AR40
M_A_DQ14 SA_DQ13 M_A_DQS0 M_B_DQ14 SB_DQ13 M_B_DQS0
AM34 SA_DQ14 SA_DQS_0 AK33 AW38 SB_DQ14 SB_DQS_0 AM39
M_A_DQ15 AN33 AT33 M_A_DQS1 M_B_DQ15 AY38 AT39 M_B_DQS1
M_A_DQ16 SA_DQ15 SA_DQS_1 M_A_DQS2 M_B_DQ16 SB_DQ15 SB_DQS_1 M_B_DQS2
AK26 SA_DQ16 SA_DQS_2 AN28 BA38 SB_DQ16 SB_DQS_2 AU35
M_A_DQ17 AL27 AM22 M_A_DQS3 M_B_DQ17 AV36 AR29 M_B_DQS3
M_A_DQ18 SA_DQ17 SA_DQS_3 M_A_DQS4 M_B_DQ18 SB_DQ17 SB_DQS_3 M_B_DQS4
AM26 SA_DQ18 SA_DQS_4 AN12 AR36 SB_DQ18 SB_DQS_4 AR16
M_A_DQ19 AN24 AN8 M_A_DQS5 M_B_DQ19 AP36 AR10 M_B_DQS5
M_A_DQ20 SA_DQ19 SA_DQS_5 M_A_DQS6 M_B_DQ20 SB_DQ19 SB_DQS_5 M_B_DQS6
AK28 SA_DQ20 SA_DQS_6 AP3 BA36 SB_DQ20 SB_DQS_6 AR7
M_A_DQ21 AL28 AG5 M_A_DQS7 M_B_DQ21 AU36 AN5 M_B_DQS7
M_A_DQ22 SA_DQ21 SA_DQS_7 M_A_DQS#0 M_B_DQ22 SB_DQ21 SB_DQS_7 M_B_DQS#0
AM24 SA_DQ22 SA_DQS#_0 AK32 AP35 SB_DQ22 SB_DQS#_0 AM40
M_A_DQ23 AP26 AU33 M_A_DQS#1 M_B_DQ23 AP34 AU39 M_B_DQS#1
M_A_DQ24 SA_DQ23 SA_DQS#_1 M_A_DQS#2 M_B_DQ24 SB_DQ23 SB_DQS#_1 M_B_DQS#2
AP23 SA_DQ24 SA_DQS#_2 AN27 AY33 SB_DQ24 SB_DQS#_2 AT35
C M_A_DQ25 AL22 AM21 M_A_DQS#3 M_B_DQ25 BA33 AP29 M_B_DQS#3 C
M_A_DQ26 SA_DQ25 SA_DQS#_3 M_A_DQS#4 M_B_DQ26 SB_DQ25 SB_DQS#_3 M_B_DQS#4
AP21 AM12 AT31 AP16

DDR SYSTEM MEMORY B


SA_DQ26 SA_DQS#_4 SB_DQ26 SB_DQS#_4
DDR SYSTEM MEMORY A

M_A_DQ27 AN20 AL8 M_A_DQS#5 M_B_DQ27 AU29 AT10 M_B_DQS#5


M_A_DQ28 SA_DQ27 SA_DQS#_5 M_A_DQS#6 M_B_DQ28 SB_DQ27 SB_DQS#_5 M_B_DQS#6
AL23 SA_DQ28 SA_DQS#_6 AN3 AU31 SB_DQ28 SB_DQS#_6 AT7
M_A_DQ29 AP24 AH5 M_A_DQS#7 M_B_DQ29 AW31 AP5 M_B_DQS#7
M_A_DQ30 SA_DQ29 SA_DQS#_7 M_B_DQ30 SB_DQ29 SB_DQS#_7
AP20 SA_DQ30 AV29 SB_DQ30
M_A_DQ31 AT21 AY16 M_A_A0 M_B_DQ31 AW29 AY23 M_B_A0
M_A_DQ32 SA_DQ31 SA_MA_0 M_A_A1 M_B_DQ32 SB_DQ31 SB_MA_0 M_B_A1
AR12 SA_DQ32 SA_MA_1 AU14 AM19 SB_DQ32 SB_MA_1 AW24
M_A_DQ33 AR14 AW16 M_A_A2 M_B_DQ33 AL19 AY24 M_B_A2
M_A_DQ34 SA_DQ33 SA_MA_2 M_A_A3 M_B_DQ34 SB_DQ33 SB_MA_2 M_B_A3
AP13 SA_DQ34 SA_MA_3 BA16 AP14 SB_DQ34 SB_MA_3 AR28
M_A_DQ35 AP12 BA17 M_A_A4 M_B_DQ35 AN14 AT27 M_B_A4
M_A_DQ36 SA_DQ35 SA_MA_4 M_A_A5 M_B_DQ36 SB_DQ35 SB_MA_4 M_B_A5
AT13 SA_DQ36 SA_MA_5 AU16 AN17 SB_DQ36 SB_MA_5 AT28
M_A_DQ37 AT12 AV17 M_A_A6 M_B_DQ37 AM16 AU27 M_B_A6
M_A_DQ38 SA_DQ37 SA_MA_6 M_A_A7 M_B_DQ38 SB_DQ37 SB_MA_6 M_B_A7
AL14 SA_DQ38 SA_MA_7 AU17 AP15 SB_DQ38 SB_MA_7 AV28
M_A_DQ39 AL12 AW17 M_A_A8 M_B_DQ39 AL15 AV27 M_B_A8
M_A_DQ40 SA_DQ39 SA_MA_8 M_A_A9 M_B_DQ40 SB_DQ39 SB_MA_8 M_B_A9
AK9 SA_DQ40 SA_MA_9 AT16 AJ11 SB_DQ40 SB_MA_9 AW27
M_A_DQ41 AN7 AU13 M_A_A10 M_B_DQ41 AH10 AV24 M_B_A10
M_A_DQ42 SA_DQ41 SA_MA_10 M_A_A11 M_B_DQ42 SB_DQ41 SB_MA_10 M_B_A11
AK8 SA_DQ42 SA_MA_11 AT17 AJ9 SB_DQ42 SB_MA_11 BA27
M_A_DQ43 AK7 AV20 M_A_A12 M_B_DQ43 AN10 AY27 M_B_A12
M_A_DQ44 SA_DQ43 SA_MA_12 M_A_A13 M_B_DQ44 SB_DQ43 SB_MA_12 M_B_A13
AP9 SA_DQ44 SA_MA_13 AV12 AK13 SB_DQ44 SB_MA_13 AR23
M_A_DQ45 AN9 M_B_DQ45 AH11
M_A_DQ46 SA_DQ45 M_A_RAS# M_B_DQ46 SB_DQ45 M_B_RAS#
AT5 SA_DQ46 SA_RAS# AW14 M_A_RAS# 15,16 AK10 SB_DQ46 SB_RAS# AU23 M_B_RAS# 14,16
M_A_DQ47 AL5 AK23 M_A_RCVENIN# 1 T801 M_B_DQ47 AJ8 AK16 M_B_RCVENIN# 1 T802
M_A_DQ48 SA_DQ47 SA_RCVENIN# M_A_RCVENOUT# 1 T803 M_B_DQ48 SB_DQ47 SB_RCVENIN# M_B_RCVENOUT# 1 T800
AY2 SA_DQ48 SA_RCVENOUT# AK24 BA10 SB_DQ48 SB_RCVENOUT# AK18
M_A_DQ49 AW2 AY14 M_A_WE# M_B_DQ49 AW10 AR27 M_B_WE#
SA_DQ49 SA_WE# M_A_WE# 15,16 SB_DQ49 SB_WE# M_B_WE# 14,16
M_A_DQ50 AP1 M_B_DQ50 BA4
M_A_DQ51 SA_DQ50 M_B_DQ51 SB_DQ50
AN2 SA_DQ51 AW4 SB_DQ51
M_A_DQ52 AV2 M_B_DQ52 AY10
M_A_DQ53 SA_DQ52 M_B_DQ53 SB_DQ52
AT3 SA_DQ53 M_A_DM[0..7] 15 AY9 SB_DQ53 M_B_DM[0..7] 14
B B
M_A_DQ54 AN1 M_B_DQ54 AW5
M_A_DQ55 SA_DQ54 M_B_DQ55 SB_DQ54
AL2 SA_DQ55 M_A_DQS[0..7] 15 AY5 SB_DQ55 M_B_DQS[0..7] 14
M_A_DQ56 AG7 M_B_DQ56 AV4
M_A_DQ57 SA_DQ56 M_B_DQ57 SB_DQ56
AF9 SA_DQ57 M_A_DQS#[0..7] 15 AR5 SB_DQ57 M_B_DQS#[0..7] 14
M_A_DQ58 AG4 M_B_DQ58 AK4
M_A_DQ59 SA_DQ58 M_B_DQ59 SB_DQ58
AF6 SA_DQ59 M_A_A[0..13] 15,16 AK3 SB_DQ59 M_B_A[0..13] 14,16
M_A_DQ60 AG9 M_B_DQ60 AT4
M_A_DQ61 SA_DQ60 M_B_DQ61 SB_DQ60
AH6 SA_DQ61 M_A_DQ[0..63] 15 AK5 SB_DQ61 M_B_DQ[0..63] 14
M_A_DQ62 AF4 M_B_DQ62 AJ5
M_A_DQ63 SA_DQ62 M_B_DQ63 SB_DQ62
AF8 SA_DQ63 AJ3 SB_DQ63
CALISTOGA_Q137 CALISTOGA_Q137

A A

Title : Calistoga DDR2 (3)


ASUSTeK COMPUTER INC Engineer: Jack Wang
Size Project Name Rev
A3 A6F 1.0
Date: Monday, March 06, 2006 Sheet 8 of 63
5 4 3 2 1
5 4 3 2 1

Layout Note:
Place filter components +VCCP_AGTL+ +VCCP_AGTL+ 2,3,5,6
+1.5VS +VCCP_GMCH +VCCP_GMCH 10,42
close to GMCH +1.5VS_PCIE GMCH VCORE +1.5VS_PCIE +1.5VS_PCIE 7
+VCCP +VCCP_GMCH
Layout Note: +3VS +3VS 4,5,7,11,12,13,14,15,19,20,21,22,25,26,27,28,30,36,38,39,42,50,52,60,61
L901 +1.05VS
Caps should be on Top layer +2.5VS +VCCP_AGTL+ +2.5VS +2.5VS 13,36,54
1 2 JP900
3500 mA1 +1.5VS +1.5VS 10,20,26,36,42,52
2

1
120Ohm/100Mhz + VCC3G U600H

1
CE900 C901 C902 +VCCP SHORT_PIN H22 AC14
150UF/4V / VCCSYNC VTT_0
VTT_1 AB14
+VCCP_AGTL+
Layout Note:
/ 10UF/10V 10UF/10V JP901 C30 W14
2 +1.5VS_PCIE VCC_TXLVDS0 VTT_2 Place on the edge

2
D 1 2 B30 VCC_TXLVDS1 VTT_3 V14 D
+1.5VS_3GPLL
GND GND GND SHORT_PIN
A30 VCC_TXLVDS2 VTT_4 T14 800 mA
VTT_5 R14
L902 / AJ41 P14
VCC3G0 VTT_6
1 2 1500 mA AB41 VCC3G1 VTT_7 N14

1
Y41 M14 +
VCC3G2 VTT_8
1

1
30Ohm/100Mhz C903 C904 VCCA_3GPLL V41 L14 C905 C906 C907 CE901
+1.5VS_3GPLL VCC3G3 VTT_9
R41 VCC3G4 VTT_10 AD13 330UF/2.5V
0.1UF/10V 10UF/10V +2.5VS N41 AC13 4.7UF/10V 2.2UF/6.3V 0.22UF/6.3V
VCC3G5 VTT_11
2

2
L41 VCC3G6 VTT_12 AB13
+1.5VS_VCCAUX AC33 AA13
GND GND +1.5VS VCCA_3GPLL VTT_13
G41 VCCA_3GBG VTT_14 Y13
L900 +2.5VS_CRTDAC
VCCD_LVDS 20 mA H41 VSSA_3GBG VTT_15 W13
1 2 V13
Pin A28 B28 C28 F21
VTT_16
U13 Layout Note:
VCCA_CRTDAC0 VTT_17
1

80Ohm/100Mhz + VCCAUX GND E21 T13 GND


VCCA_CRTDAC1 VTT_18 Place in cavity
1

1
CE902 C908 C909 C910 G21 R13
1900 mA VSSA_CRTDAC VTT_19
N13
470UF/2.5V 0.1UF/10V 0.1UF/10V 10UF/10V VTT_20
+1.5VS_DPLLA B26 VCCA_DPLLA VTT_21 M13
GND
2

2
+1.5VS_DPLLB C39 VCCA_DPLLB VTT_22 L13
+1.5VS_DPLLA AF1 AB12
+1.5VS_HPLL VCCA_HPLL VTT_23
GND GND GND GND AA12
L903 VTT_24 +3VS +3VS_DAC +1.5VS
+2.5VS A38 VCCA_LVDS VTT_25 Y12
1 2 B39 VSSA_LVDS VTT_26 W12
+1.5VS V12 R901 D900
VTT_27
1

30Ohm/100Mhz + VCCA_DPLLA VCCD_TVDAC +1.5VS_MPLL AF2 U12 10Ohm 1


VCCA_MPLL VTT_28
1

2
CE903 / C911 GND T12 2 1 +1.5VS_DAC 3
50 mA Pin D21 H20
VTT_29
R12 R900 2
+3VS_TVBG VCCA_TVBG VTT_30
470UF/2.5V 0.1UF/10V G20 P12 0Ohm
VSSA_TVBG VTT_31
1

1
C C912 C913 / BAT54C C
2

VTT_32 N12
+1.5VS_DPLLB M12 L904
GND GND 0.022UF/25V 0.1UF/10V GND VTT_33 180Ohm/100Mhz Total Power Consumption 120 mA

1
VTT_34 L12
L905
2

2
+3VS_TVDACA E19 VCCA_TVDACA0 VTT_35 R11 1 2 +3VS_TVBG
1 2 F19 VCCA_TVDACA1 VTT_36 P11

1
GND GND 24 mA C20 N11 VCCA_TVBG
+3VS_TVDACB VCCA_TVDACB0 VTT_37
1

30Ohm/100Mhz + VCCA_DPLLB D20 M11 C914 C915 C916


VCCA_TVDACB1 VTT_38 Pin H20
1

CE904 / C917 +1.5VS E20 R10 10UF/10V 0.022UF/25V 0.1UF/10V


50 mA +3VS_TVDACC VCCA_TVDACC0 VTT_39
VCCD_QTVDAC

2
F20 VCCA_TVDACC1 VTT_40 P10
470UF/2.5V 0.1UF/10V N10
H19 C28 VTT_41 GND GND GND
2

+1.5VS AH1 VCCD_HMPLL0 VTT_42 M10


+1.5VS_HPLL AH2 P9
VCCD_HMPLL1 VTT_43 +3VS_TVDACA
1

GND GND C918 C919


POWER VTT_44 N9

1
L906 A28 M9 VCCA_TVDACA
+1.5VS VCCD_LVDS0 VTT_45
1 2 0.022UF/25V 0.1UF/10V B28 R8 Layout Note: C920 C921
VCCD_LVDS1 VTT_46 0.022UF/25V 0.1UF/10V Pin E19 F19
2

C28 P8
VCCD_LVDS2 VTT_47 These Caps used in +3VS_TVDACx
1

120Ohm/100Mhz C923 VCCA_HPLL

2
VTT_48 N8
C922 GND GND D21 M8 should be within 250 mils of edge of
45 mA +1.5VS VCCD_TVDAC VTT_49
22UF/6.3V 0.1UF/10V P7 GND GND
VTT_50 GMCH
2

+3VS A23 VCC_HV0 VTT_51 N7 +3VS_TVDACB


+1.5VS_MPLL B23 M7
VCC_HV1 VTT_52

1
GND GND Layout Note: B25 R6 VCCA_TVDACB
L907 VCC_HV2 VTT_53 C924 C925
P6
1 2
These Caps should be within H19
VTT_54
M6 0.022UF/25V 0.1UF/10V Pin C20 D20
+1.5VS VCCD_QTVDAC VTT_55 VTTLF_CAP3
250 mils of edge of GMCH

2
VTT_56 A6
1

120Ohm/100Mhz C926 C927 VCCA_MPLL AK31 R5


+1.5VS_VCCAUX VCCAUX0 VTT_57

1
AF31 P5 C928 GND GND
22UF/6.3V 0.1UF/10V 45 mA AE31
VCCAUX1 VTT_58
N5
VCCAUX2 VTT_59 +3VS_TVDACC
Layout Note: Layout Note: 0.47UF/16V
2

AC31 VCCAUX3 VTT_60 M5

1
B B
VCCA_TVDACC

2
AL30 P4
GND GND 0.1uF caps in 1.5VS_xPLL These 0.1uF caps should AK30
VCCAUX4 VTT_61
N4 C929 C930
need to be located as be placed within 200 mils AJ30
VCCAUX5 VTT_62
M4 0.022UF/25V 0.1UF/10V Pin E20 F20
VCCAUX6 VTT_63 GND

2
AH30 R3
edge caps within 200 mils. of edge AG30
VCCAUX7 VTT_64
P3
VCCAUX8 VTT_65 GND GND
AF30 VCCAUX9 VTT_66 N3
+2.5VS AE30 M3
VCCAUX10 VTT_67
AD30 VCCAUX11 VTT_68 R2
AC30 VCCAUX12 VTT_69 P2
VCC_SYNC VCCA_LVDS VCCA_3GBG VCCTX_LVDS 60 mA AG29 VCCAUX13 VTT_70 M2
AF29 D2 VTTLF_CAP2
Pin H22 Pin A38 10 mA Pin G41 2 mA Pin A30 B30 C30 AE29
VCCAUX14 VTT_71
AB1 VTTLF_CAP1 0.22UF/6.3V
VCCAUX15 VTT_72
AD29 VCCAUX16 VTT_73 R1
1

1
C931 C900 C932 C933 C934 C935 AC29 P1 C936 C937
VCCAUX17 VTT_74 +3VS
AG28 VCCAUX18 VTT_75 N1
0.1UF/10V 0.01UF/25V 0.1UF/10V 0.1UF/10V 0.1UF/10V 4.7UF/10V AF28 M1 0.47UF/16V 12/1
VCCAUX19 VTT_76 +5V +3VS_DAC
2

2
AE28 VCCAUX20 U900

1
AH22 VCCAUX21
GND GND GND GND GND GND AJ21 R902 1
VCCAUX22 GND GND VIN
AH21 VCCAUX23 10KOhm VOUT 5
AJ20 2 R903
VCCAUX24 GND 3VS_DAC_ADJ 1
AH20 VCCAUX25 FB 4 2
D901 3VS_DAC_EN

2
AH19 VCCAUX26 3 SD#

2
R904 35.7KOhm

4.7UF/16V

4.7UF/16V
1 +VCCP_GMCH P19 VCCAUX27

1
20KOhm
C939

C941
1 +VCCP_GMCH_R

0.1UF/50V
2 3 P16 VCCAUX28 SI9183DT
2 +3VS AH15 C938
VCCAUX29

C940

R905
10Ohm VCC_HV 40 mA P15
BAT54C VCCAUX30 0.1UF/50V

2
AH14
Pin A23 B23 B25 VCCAUX31 /

1
A AG14 VCCAUX32 A
+2.5VS_CRTDAC
70 mA AF14 VCCAUX33
1

VCCA_CRTDAC C942 C943 AE14 GND GND GND GND GND GND
L908 VCCAUX34
Y14
1 2
Pin E21 F21 10UF/10V 0.1UF/10V AF13
VCCAUX35
VCCAUX36
2

AE13 VCCAUX37
1

120Ohm/100Mhz AF12 VCCAUX38


C944
0.022UF/25V
C945
0.1UF/10V
Layout Note: GND GND AE12
AD12
VCCAUX39 NOTE:0.1UF CAPS USED IN +1.5VS, Title : Calistoga Power (4)
These Caps should VCCAUX40 +3.3VS Engineer: Jack Wang
2

ASUSTeK COMPUTER INC


be within 250 mils of CALISTOGA_Q137 +2.5VS should be placed within
GND GND Size Project Name Rev
edge of GMCH 200 mils of edge. A3 A6F 1.0
Date: Monday, March 06, 2006 Sheet 9 of 63
5 4 3 2 1
5 4 3 2 1

+VCCP_GMCH +VCCP_GMCH

U600F U600G U600J U600I


AA33 VCC_0 VCC_SM_0 AU41 AD27 VCC_NCTF0 VSS_NCTF0 AE27 J11 VSS_273 VSS_180 AT23 AK34 VSS_97 VSS_0 AC41
W33 AT41 VCC_SM_1 AC27 AE26 D11 AN23 AG34 AA41
VCC_1 VCC_SM_1 VCC_SM_2 VCC_NCTF1 VSS_NCTF1 VSS_274 VSS_181 VSS_98 VSS_1
P33 VCC_2 VCC_SM_2 AM41 AB27 VCC_NCTF2 VSS_NCTF2 AE25 B11 VSS_275 VSS_182 AM23 AF34 VSS_99 VSS_2 W41
N33 VCC_3 VCC_SM_3 AU40 AA27 VCC_NCTF3 VSS_NCTF3 AE24 AV10 VSS_276 VSS_183 AH23 AE34 VSS_100 VSS_3 T41

1
L33 BA34 C1001 C1002 Y27 AE23 AP10 AC23 AC34 P41
VCC_4 VCC_SM_4 VCC_NCTF4 VSS_NCTF4 VSS_277 VSS_184 VSS_101 VSS_4
J33 VCC_5 VCC_SM_5 AY34 W27 VCC_NCTF5 VSS_NCTF5 AE22 AL10 VSS_278 VSS_185 W23 C34 VSS_102 VSS_5 M41
AA32 AW34 0.47UF/16V 0.47UF/16V V27 AE21 AJ10 K23 AW33 J41
VCC_6 VCC_SM_6 VCC_NCTF6 VSS_NCTF6 VSS_279 VSS_186 VSS_103 VSS_6

2
Y32 VCC_7 VCC_SM_7 AV34 U27 VCC_NCTF7 VSS_NCTF7 AE20 AG10 VSS_280 VSS_187 J23 AV33 VSS_104 VSS_7 F41
W32 VCC_8 VCC_SM_8 AU34 T27 VCC_NCTF8 VSS_NCTF8 AE19 AC10 VSS_281 VSS_188 F23 AR33 VSS_105 VSS_8 AV40
D V32 AT34 GND GND R27 AE18 W10 C23 AE33 AP40 D
VCC_9 VCC_SM_9 VCC_NCTF9 VSS_NCTF9 VSS_282 VSS_189 VSS_106 VSS_9
P32 VCC_10 VCC_SM_10 AR34 AD26 VCC_NCTF10 VSS_NCTF10 AC17 U10 VSS_283 VSS_190 AA22 AB33 VSS_107 VSS_10 AN40
N32 VCC_11 VCC_SM_11 BA30 AC26 VCC_NCTF11 VSS_NCTF11 Y17 BA9 VSS_284 VSS_191 K22 Y33 VSS_108 VSS_11 AK40
M32 VCC_12 VCC_SM_12 AY30 AB26 VCC_NCTF12 VSS_NCTF12 U17 AW9 VSS_285 VSS_192 G22 V33 VSS_109 VSS_12 AJ40
L32 VCC_13 VCC_SM_13 AW30 AA26 VCC_NCTF13 AR9 VSS_286 VSS_193 F22 T33 VSS_110 VSS_13 AH40
J32 VCC_14 VCC_SM_14 AV30 Y26 VCC_NCTF14 AH9 VSS_287 VSS_194 E22 R33 VSS_111 VSS_14 AG40
AA31 AU30 W26 GND AB9 D22 M33 AF40
VCC_15 VCC_SM_15 VCC_NCTF15 VSS_288 VSS_195 VSS_112 VSS_15
W31 VCC_16 VCC_SM_16 AT30 V26 VCC_NCTF16 Y9 VSS_289 VSS_196 A22 H33 VSS_113 VSS_16 AE40
V31 AR30 U26 +1.5VS R9 BA21 G33 B40
VCC_17 VCC_SM_17 VCC_NCTF17 VSS_290 VSS_197 VSS_114 VSS_17
T31 VCC_18 VCC_SM_18 AP30 T26 VCC_NCTF18 G9 VSS_291 VSS_198 AV21 F33 VSS_115 VSS_18 AY39
R31 VCC_19 VCC_SM_19 AN30 R26 VCC_NCTF19 VCCAUX_NCTF0 AG27 E9 VSS_292 VSS_199 AR21 D33 VSS_116 VSS_19 AW39
P31 VCC_20 VCC_SM_20 AM30 AD25 VCC_NCTF20 VCCAUX_NCTF1 AF27 A9 VSS_293 VSS_200 AN21 B33 VSS_117 VSS_20 AV39
N31 VCC_21 VCC_SM_21 AM29 AC25 VCC_NCTF21 VCCAUX_NCTF2 AG26 AG8 VSS_294 VSS_201 AL21 AH32 VSS_118 VSS_21 AR39
M31 VCC_22 VCC_SM_22 AL29 AB25 VCC_NCTF22 VCCAUX_NCTF3 AF26 AD8 VSS_295 VSS_202 AB21 AG32 VSS_119 VSS_22 AN39
AA30 VCC_23 VCC_SM_23 AK29 AA25 VCC_NCTF23 VCCAUX_NCTF4 AG25 AA8 VSS_296 VSS_203 Y21 AF32 VSS_120 VSS_23 AJ39
Y30 VCC_24 VCC_SM_24 AJ29 Y25 VCC_NCTF24 VCCAUX_NCTF5 AF25 U8 VSS_297 VSS_204 P21 AE32 VSS_121 VSS_24 AC39
W30 VCC_25 VCC_SM_25 AH29 W25 VCC_NCTF25 VCCAUX_NCTF6 AG24 K8 VSS_298 VSS_205 K21 AC32 VSS_122 VSS_25 AB39
V30 VCC_26 VCC_SM_26 AJ28 V25 VCC_NCTF26 VCCAUX_NCTF7 AF24 C8 VSS_299 VSS_206 J21 AB32 VSS_123 VSS_26 AA39
U30 VCC_27 VCC_SM_27 AH28 U25 VCC_NCTF27 VCCAUX_NCTF8 AG23 BA7 VSS_300 VSS_207 H21 G32 VSS_124 VSS_27 Y39
T30 VCC_28 VCC_SM_28 AJ27 T25 VCC_NCTF28 VCCAUX_NCTF9 AF23 AV7 VSS_301 VSS_208 C21 B32 VSS_125 VSS_28 W39
R30 VCC_29 VCC_SM_29 AH27 R25 VCC_NCTF29 VCCAUX_NCTF10 AG22 AP7 VSS_302 VSS_209 AW20 AY31 VSS_126 VSS_29 V39
P30 VCC_30 VCC_SM_30 BA26 AD24 VCC_NCTF30 VCCAUX_NCTF11 AF22 AL7 VSS_303 VSS_210 AR20 AV31 VSS_127 VSS_30 T39
N30 VCC_31 VCC_SM_31 AY26 AC24 VCC_NCTF31 VCCAUX_NCTF12 AG21 AJ7 VSS_304 VSS_211 AM20 AN31 VSS_128 VSS_31 R39
M30 VCC_32 VCC_SM_32 AW26 AB24 VCC_NCTF32 VCCAUX_NCTF13 AF21 AH7 VSS_305 VSS_212 AA20 AJ31 VSS_129 VSS_32 P39
L30 VCC_33 VCC_SM_33 AV26 AA24 VCC_NCTF33 VCCAUX_NCTF14 AG20 AF7 VSS_306 VSS_213 K20 AG31 VSS_130 VSS_33 N39
AA29 VCC_34 VCC_SM_34 AU26 Y24 VCC_NCTF34 VCCAUX_NCTF15 AF20 AC7 VSS_307 VSS_214 B20 AB31 VSS_131 VSS_34 M39
Y29 VCC_35 VCC_SM_35 AT26 W24 VCC_NCTF35 VCCAUX_NCTF16 AG19 R7 VSS_308 VSS_215 A20 Y31 VSS_132 VSS_35 L39
W29 VCC_36 VCC_SM_36 AR26 V24 VCC_NCTF36 VCCAUX_NCTF17 AF19 G7 VSS_309 VSS_216 AN19 AB30 VSS_133 VSS_36 J39
V29 VCC_37 VCC_SM_37 AJ26 U24 VCC_NCTF37 VCCAUX_NCTF18 R19 D7 VSS_310 VSS VSS_217 AC19 E30 VSS_134 VSS_37 H39
U29 VCC_38 VCC_SM_38 AH26 T24 VCC_NCTF38 NCTF VCCAUX_NCTF19 AG18 AG6 VSS_311 VSS_218 W19 AT29 VSS_135 VSS_38 G39
C
R29
P29
VCC_39 VCC_SM_39 AJ25
AH25
R24
AD23
VCC_NCTF39 VCCAUX_NCTF20 AF18
R18
AD6
AB6
VSS_312 VSS_219 K19
G19
AN29
AB29
VSS_136 VSS VSS_39 F39
D39 C
VCC_40 VCC_SM_40 VCC_NCTF40 VCCAUX_NCTF21 VSS_313 VSS_220 VSS_137 VSS_40
M29 VCC_41 VCC_SM_41 AJ24 V23 VCC_NCTF41 VCCAUX_NCTF22 AG17 Y6 VSS_314 VSS_221 C19 T29 VSS_138 VSS_41 AT38
L29 VCC_42 VCC_SM_42 AH24 U23 VCC_NCTF42 VCCAUX_NCTF23 AF17 U6 VSS_315 VSS_222 AH18 N29 VSS_139 VSS_42 AM38
AB28 BA23 VCC_SM_3 T23 AE17 N6 P18 K29 AH38
VCC_43 VCC_SM_43 VCC_NCTF43 VCCAUX_NCTF24 VSS_316 VSS_223 VSS_140 VSS_43
AA28 VCC_44 VCC_SM_44 AJ23 R23 VCC_NCTF44 VCCAUX_NCTF25 AD17 K6 VSS_317 VSS_224 H18 G29 VSS_141 VSS_44 AG38
1

Y28 BA22 C1003 AD22 AB17 H6 D18 E29 AF38


VCC_45 VCC_SM_45 VCC_NCTF45 VCCAUX_NCTF26 VSS_318 VSS_225 VSS_142 VSS_45
V28 VCC_46 VCC_SM_46 AY22 V22 VCC_NCTF46 VCCAUX_NCTF27 AA17 B6 VSS_319 VSS_226 A18 C29 VSS_143 VSS_46 AE38
U28 AW22 0.47UF/16V U22 W17 AV5 AY17 B29 C38
VCC_47 VCC_SM_47 VCC_NCTF47 VCCAUX_NCTF28 VSS_320 VSS_227 VSS_144 VSS_47
2

T28 VCC_48 VCC_SM_48 AV22 T22 VCC_NCTF48 VCCAUX_NCTF29 V17 AF5 VSS_321 VSS_228 AR17 A29 VSS_145 VSS_48 AK37
R28 VCC_49 VCC_SM_49 AU22 R22 VCC_NCTF49 VCCAUX_NCTF30 T17 AD5 VSS_322 VSS_229 AP17 BA28 VSS_146 VSS_49 AH37
P28 AT22 GND AD21 R17 AY4 AM17 AW28 AB37
VCC_50 VCC_SM_50 VCC_NCTF50 VCCAUX_NCTF31 VSS_323 VSS_230 VSS_147 VSS_50
N28 VCC_51 VCC_SM_51 AR22 V21 VCC_NCTF51 VCCAUX_NCTF32 AG16 AR4 VSS_324 VSS_231 AK17 AU28 VSS_148 VSS_51 AA37
M28
L28
VCC_52 VCC VCC_SM_52 AP22
AK22
U21
T21
VCC_NCTF52 VCCAUX_NCTF33 AF16
AE16
AP4
AL4
VSS_325 VSS_232 AV16
AN16
AP28
AM28
VSS_149 VSS_52 Y37
W37
VCC_53 VCC_SM_53 VCC_NCTF53 VCCAUX_NCTF34 VSS_326 VSS_233 VSS_150 VSS_53
P27 VCC_54 VCC_SM_54 AJ22 R21 VCC_NCTF54 VCCAUX_NCTF35 AD16 AJ4 VSS_327 VSS_234 AL16 AD28 VSS_151 VSS_54 V37
N27 VCC_55 VCC_SM_55 AK21 AD20 VCC_NCTF55 VCCAUX_NCTF36 AC16 Y4 VSS_328 VSS_235 J16 AC28 VSS_152 VSS_55 T37
M27 VCC_56 VCC_SM_56 AK20 V20 VCC_NCTF56 VCCAUX_NCTF37 AB16 U4 VSS_329 VSS_236 F16 W28 VSS_153 VSS_56 R37
L27 VCC_57 VCC_SM_57 BA19 U20 VCC_NCTF57 VCCAUX_NCTF38 AA16 R4 VSS_330 VSS_237 C16 J28 VSS_154 VSS_57 P37
P26 VCC_58 VCC_SM_58 AY19 T20 VCC_NCTF58 VCCAUX_NCTF39 Y16 J4 VSS_331 VSS_238 AN15 E28 VSS_155 VSS_58 N37
N26 VCC_59 VCC_SM_59 AW19 R20 VCC_NCTF59 VCCAUX_NCTF40 W16 F4 VSS_332 VSS_239 AM15 AP27 VSS_156 VSS_59 M37
L26 VCC_60 VCC_SM_60 AV19 AD19 VCC_NCTF60 VCCAUX_NCTF41 V16 C4 VSS_333 VSS_240 AK15 AM27 VSS_157 VSS_60 L37
N25 VCC_61 VCC_SM_61 AU19 V19 VCC_NCTF61 VCCAUX_NCTF42 U16 AY3 VSS_334 VSS_241 N15 AK27 VSS_158 VSS_61 J37
M25 VCC_62 VCC_SM_62 AT19 U19 VCC_NCTF62 VCCAUX_NCTF43 T16 AW3 VSS_335 VSS_242 M15 J27 VSS_159 VSS_62 H37
L25 VCC_63 VCC_SM_63 AR19 T19 VCC_NCTF63 VCCAUX_NCTF44 R16 AV3 VSS_336 VSS_243 L15 G27 VSS_160 VSS_63 G37
P24 VCC_64 VCC_SM_64 AP19 AD18 VCC_NCTF64 VCCAUX_NCTF45 AG15 AL3 VSS_337 VSS_244 B15 F27 VSS_161 VSS_64 F37
N24 VCC_65 VCC_SM_65 AK19 AC18 VCC_NCTF65 VCCAUX_NCTF46 AF15 AH3 VSS_338 VSS_245 A15 C27 VSS_162 VSS_65 D37
M24 VCC_66 VCC_SM_66 AJ19 AB18 VCC_NCTF66 VCCAUX_NCTF47 AE15 AG3 VSS_339 VSS_246 BA14 B27 VSS_163 VSS_66 AY36
AB23 VCC_67 VCC_SM_67 AJ18 AA18 VCC_NCTF67 VCCAUX_NCTF48 AD15 AF3 VSS_340 VSS_247 AT14 AN26 VSS_164 VSS_67 AW36
AA23 VCC_68 VCC_SM_68 AJ17 Y18 VCC_NCTF68 VCCAUX_NCTF49 AC15 AD3 VSS_341 VSS_248 AK14 M26 VSS_165 VSS_68 AN36
Y23 VCC_69 VCC_SM_69 AH17 W18 VCC_NCTF69 VCCAUX_NCTF50 AB15 AC3 VSS_342 VSS_249 AD14 K26 VSS_166 VSS_69 AH36
P23 VCC_70 VCC_SM_70 AJ16 V18 VCC_NCTF70 VCCAUX_NCTF51 AA15 AA3 VSS_343 VSS_250 AA14 F26 VSS_167 VSS_70 AG36
B B
N23 VCC_71 VCC_SM_71 AH16 U18 VCC_NCTF71 VCCAUX_NCTF52 Y15 G3 VSS_344 VSS_251 U14 D26 VSS_168 VSS_71 AF36
M23 BA15 VCC_SM_4 T18 W15 AT2 K14 AK25 AE36
VCC_72 VCC_SM_72 VCC_NCTF72 VCCAUX_NCTF53 VSS_345 VSS_252 VSS_169 VSS_72
L23 VCC_73 VCC_SM_73 AY15 VCCAUX_NCTF54 V15 AR2 VSS_346 VSS_253 H14 P25 VSS_170 VSS_73 AC36
1

AC22 AW15 C1004 U15 AP2 E14 K25 C36


VCC_74 VCC_SM_74 VCCAUX_NCTF55 VSS_347 VSS_254 VSS_171 VSS_74
AB22 VCC_75 VCC_SM_75 AV15 VCCAUX_NCTF56 T15 AK2 VSS_348 VSS_255 AV13 H25 VSS_172 VSS_75 B36
Y22 AU15 0.47UF/16V R15 AJ2 AR13 E25 BA35
VCC_76 VCC_SM_76 VCCAUX_NCTF57 VSS_349 VSS_256 VSS_173 VSS_76
2

W22 VCC_77 VCC_SM_77 AT15 AD2 VSS_350 VSS_257 AN13 D25 VSS_174 VSS_77 AV35
P22 AR15 CALISTOGA_Q137 AB2 AM13 A25 AR35
VCC_78 VCC_SM_78 GND VSS_351 VSS_258 VSS_175 VSS_78
N22 VCC_79 VCC_SM_79 AJ15 Y2 VSS_352 VSS_259 AL13 BA24 VSS_176 VSS_79 AH35
M22 VCC_80 VCC_SM_80 AJ14 U2 VSS_353 VSS_260 AG13 AU24 VSS_177 VSS_80 AB35
+VCCP_GMCH
L22
AC21
VCC_81 VCC_SM_81 AJ13
AH13
VCC(GMCH Core) T2
N2
VSS_354 VSS_261 P13
F13
AL24
AW23
VSS_178 VSS_81 AA35
Y35
VCC_82 VCC_SM_82 VSS_355 VSS_262 VSS_179 VSS_82
AA21 VCC_83 VCC_SM_83 AK12 +1.5VS (5500 mA) or +1.05VS (3500 mA) J2 VSS_356 VSS_263 D13 VSS_83 W35
W21 VCC_84 VCC_SM_84 AJ12 H2 VSS_357 VSS_264 B13 VSS_84 V35
N21 VCC_85 VCC_SM_85 AH12 F2 VSS_358 VSS_265 AY12 VSS_85 T35
1

M21 AG12 +1.8V + + C2 AC12 GND R35


VCC_86 VCC_SM_86 VSS_359 VSS_266 VSS_86
1

L21 AK11 CE1000 CE1001 C1005 C1006 C1007 C1008 C1000 C1009 AL1 K12 P35
VCC_87 VCC_SM_87 VSS_360 VSS_267 VSS_87
AC20 VCC_88 VCC_SM_88 BA8 220UF/4V 220UF/4V VSS_268 H12 VSS_88 N35
AB20 AY8 10UF/10V 10UF/10V 1UF/10V 0.22UF/6.3V0.22UF/6.3V0.22UF/6.3V E12 M35
VCC_89 VCC_SM_89 VSS_269 VSS_89
2

Y20 VCC_90 VCC_SM_90 AW8 VSS_270 AD11 VSS_90 L35


W20 AV8 GND AA11 J35
VCC_91 VCC_SM_91 VSS_271 VSS_91
P20 VCC_92 VCC_SM_92 AT8 VSS_272 Y11 VSS_92 H35
N20 VCC_93 VCC_SM_93 AR8 VSS_93 G35
M20 AP8 CALISTOGA_Q137 F35
VCC_94 VCC_SM_94 GND VSS_94
L20 VCC_95 VCC_SM_95 BA6 VSS_95 D35
AB19 AY6 GND AN34
VCC_96 VCC_SM_96 VSS_96
AA19 VCC_97 VCC_SM_97 AW6
Y19 AV6 Layout Note: CALISTOGA_Q137
VCC_98 VCC_SM_98 +1.8V
N19 AT6
M19
VCC_99 VCC_SM_99
AR6
Place in cavity GND
VCC_100 VCC_SM_100
A L19 VCC_101 VCC_SM_101 AP6 3200 mA A
N18 VCC_102 VCC_SM_102 AN6
M18 VCC_103 VCC_SM_103 AL6 +1.5VS +1.5VS 9,20,26,36,42,52
1

L18 AK6 + + + +1.8V +1.8V 7,14,15,36,53


VCC_104 VCC_SM_104
1

P17 AJ6 C1010 C1011 CE1002/ CE1003/ CE1004


VCC_105 VCC_SM_105 +VCCP_GMCH +VCCP_GMCH 9,42
N17 AV1 VCC_SM_5
VCC_106 VCC_SM_106 VCC_SM_6 10UF/10V 10UF/10V 330UF/2.5V 330UF/2.5V 330UF/2.5V
M17 VCC_107 VCC_SM_107 AJ1
2

N16 VCC_108
1

M16
L16
VCC_109
C1012 C1013 Title : Clistoga GND (5)
VCC_110 0.47UF/16V 0.47UF/16V
ASUSTeK COMPUTER INC Engineer: Jack Wang
CALISTOGA_Q137
2

GND Size Project Name Rev


GND GND Custom A6F 1.0
Date: Monday, March 06, 2006 Sheet 10 of 63
5 4 3 2 1
5 4 3 2 1

7 MCH_CFG_16
CFG16 : FSB DYNAMIC ODT
7 MCH_CFG_5
CFG5 : DMI X2 Select LOW = Dynamic ODT Disabled

1
R1101 /
LOW = DMI X 2 HIGH = Dynamic ODT Enabled (Default)

1
2.2KOhm
R1102 / r0402_h16
2.2KOhm HIGH = DMI X 4 (Default)
r0402_h16

2
D D

2 GND

GND
+3VS

CFG18 : GMCH Core Voltage Level


LOW = 1.05V CFG[17..3] have internal pullup resistors.
7 MCH_CFG_7
CFG[19..18] have internal pulldown resistors.

1
CFG7 : CPU STRAP R1100 / HIGH = 1.5V (default)
1KOhm SDVOCRTL_DATA has internal pulldown
LOW = Reserved
1

r0402
R1103 / resistors.
2.2KOhm HIGH = Mobility CPU (Default)

2
r0402_h16
7 MCH_CFG_18
2

GND

+3VS
7 MCH_CFG_9
C CFG9 : PCIE GRAPHIC LANE CFG19 : DMI LANE REVERSAL C

LOW = REVERSE LANES LOW = NORMAL CFG All are sampled with respect to the
1

leading edge of the GMCH PWROK

1
R1104 /
2.2KOhm HIGH = NORMAL OPERATION (Default) R1105 / HIGH = LANES REVERSED 001 = FSB533
r0402_h16 1KOhm 2:0 FSB Freq select
r0402 011 = FSB667
2

4:3

2
7 MCH_CFG_19 0 = DMI X 2
GND 5 DMI X 2 Select 1 = DMI X 4 (Default)
6
0 = Reserved
7 CPU Strap 1 = Mobile CPU (Default)
8
PCIE Graphics 0 = Reverse Lanes
9 Lane Reversal 1 = Normal (Default)
11:10
7 MCH_CFG_11
CFG11 : Reserved but need to be pull low 00 = Partial Clock Gating Disable
13:12 XOR/ALLZ 01 = XOR Mode Enabled
1

R1106 / 10 = All-Z Mode Enabled


2.2KOhm
r0402_h16 11 = Normal operation (Default)
B 15:14 B
2

0 = Dynamic ODT Disabled


16 FSB Dynamic ODT 1 = Dynamic ODT Enabled (Default)
GND
17
SDVO_C 0 =
No SDVO Card Present (Default)
TRLDATA SDVO Present 1 =
SDVO Card Present
0 =
1.05V (Default)
18 VCC select 1 =
1.5V
DMI Lane 0 =
Normal (Default)
19 Reversal 1 =
Reverse Lanes
SDVO/PCIE 0 =
Only SDVO or PCIE x1 is
20 concurrent operational(Default)
1 = SDVO and PCIE x1 are operating
simultaneously via the PEG port

+2.5VS +2.5VS 9,13,36,54


A A

Title : Calistoga Strapping


ASUSTeK COMPUTER INC Engineer: Jack Wang
Size Project Name Rev
Custom A6F 1.0
Date: Monday, March 06, 2006 Sheet 11 of 63
5 4 3 2 1
5 4 3 2 1

3~3.6V
Full Active: 410 mA(Max. 500 mA)
3~3.6V
S0-S1 M: 410 mA(Max. 500 mA)
LCD LVDS Interface
LCD Panel Power +3VS

SI3865: US$0.22
+3V +12VS GND

31
1

1
D 1209 C1201 C1200 CON10 D

SIDE1
1

1
0.1UF/10V 0.01UF/16V LVDS_LCLKP 1 2
7 LVDS_LCLKP LVDS_LCLKN 1 2
R1201 R1202 LVDS_UCLKP

2
7 LVDS_LCLKN 3 3 4 4 LVDS_UCLKP 7
100KOhm 22kOhm Q1201 5 6 LVDS_UCLKN
+3VS_LCD LVDS_L2P 5 6 LVDS_UCLKN 7
1 6 L1201 7 8
D 7 LVDS_L2P LVDS_L2N 7 8
2 5 80Ohm/100Mhz GND 9 10 LVDS_U2P
S 4 +3VSLCD 7 LVDS_L2N 9 10 LVDS_U2N LVDS_U2P 7
+3VSLCD_G
2

2
3 1 2 11 11 12 12 LVDS_U2N 7
G LVDS_L1P 13 14
3 7 LVDS_L1P 13 14

1
Q1200 3 3 C1202 SI3456BDV C1203 C1204 C1205 C1206 LVDS_L1N 15 16 LVDS_U1P
D D 7 LVDS_L1N 15 16 LVDS_U1P 7
2N7002 17 18 LVDS_U1N
+3VSLCD_DC LVDS_L0P 17 18 LVDS_U1N 7
Q1202 1UF/25V 1 2 0.1UF/10V 10UF/10V 1UF/10V 0.1UF/10V 19 20
7 LVDS_L0P LVDS_L0N 19 20
11 11 2N7002 LVDS_U0P

2
7 L_VDDEN 7 LVDS_L0N 21 21 22 22 LVDS_U0P 7
G G R1203 23 24 LVDS_U0N
2 S 2 S 23 24 LVDS_U0N 7
1

3
GND 3 100Ohm EDID_CLK 25 26
D 7 EDID_CLK 25 26
R1204 r0402 GND GND EDID_DAT
2

2
7 EDID_DAT 27 27 28 28 +3VS

SIDE2
100KOhm Q1203 29 30
+3VSLCD_DG 11 +3VS_LCD 29 30 +3VS_LCD
GND GND 2N7002

1
G C1207
2 S BTOB_CON_30P 0.1UF/10V
2

32
Cable Requirement: GND c0402

2
GND GND

2
GND
Impedence: 100 ohm +/- 10%
Length Mismatch <= 10 mils GND
Twisted Pair(Not Ribbon) GND
Maximum Length <= 16"

C C

+5V +5V_USB67

L1202
2 1

80Ohm/100Mhz

1
l0805_h43 CE1200 C1208 C1209
22UF/6.3V c0402 c0402
c0805 0.1UF/10V 1000PF/50V

LCD Backlight Control

2
Inverter Board GND

BIOS built in 14.1W


LCD_BACKOFF#
When user push "Fn+F7" button LCD Panel L1203 N/A
90Ohm/100Mhz
BIOS active this pin to turn On/Off backlight 18 USB_PN4_B
09G091090000 USB4-_B

USB4

3
EC
INVTER_DA: For
EC output D/A signal ( adjust voltage level) to CMOS USB4+_B

2
18 USB_PP4_B
adjust backlight Camera

1
B +3VS AC_BAT_SYS +3VA B
RN1200A
1 0OHM 2
3 4 D1200 / D1201 /
0OHM
1

D1202 RB717F R1205 L1204 L1205 RN1200B EGA10603V05A1 EGA10603V05A1


LCD_BACKOFF# 1 10KOhm l0805_h43 l0805_h43
28 LCD_BACKOFF#
3 BL_EN_L r0402 80Ohm/100Mhz 80Ohm/100Mhz ESD Guard

2
PCI_RST#
2

25,26,30,33,38 PCI_RST# 2 Close to


2

L_BKLTEN 1 GND USB Port


7 L_BKLTEN
3
28 LID_SW#
LID_SW#
L1208
2
INVERTER Interface
1

1 2 D1203 RB717F
7 L_BKLTCTL
120Ohm/100Mhz L1206 R1200 /
N/A L1207 120Ohm/100Mhz CON11 0Ohm r0402
1 2 AC_INV 2 1 USB_WLAN_ON# 1 2
28 INVTER_DA 2 1 WLAN_ON# 19,26,38
120Ohm/100Mhz L1200
2

4 4 3 3 +5V_USB67

1
120Ohm/100Mhz 6 5 C1210
L1211 / LID_SW#_CON 6 5 c0402 N/A
1 2 8 8 7 7
1 2 ADJ_BL_CON 10 9 1000PF/50V
28 BRIGHT_PWM 10 9
120Ohm/100Mhz BL_EN_CON

2
12 12 11 11
+3VA_CON 14 13 USB4-_B
L1209 120Ohm/100Mhz 14 13 USB4+_B GND
16 16 15 15
1 2 INTMIC_A_GND_CON 18 18 17 17
22 INTMIC_A 1 2 INTMIC_A_CON 20 20 19 19
22 SIDE2 SIDE1 21
1

C1211 L1210 120Ohm/100Mhz C1212 C1213 C1214 C1215 C1216 C1217


A
c0402 c0402 c0402 c0402 0.1UF/10V A
1000PF/50V 1000PF/50V1000PF/50V0.1UF/25V 1UF/25V 1000PF/50V c0402 WTOB_CON_20P
GND GND
2

Title :LVDS & INVERTER


700V rms@5 mA rms
GND_MIC GND
(Min. 3 mA rms)6 mA rms(Max. 6.5 mA rms)
ASUSTeK COMPUTER INC Engineer: Jack Wang
Size Project Name Rev
A3 A6F 1.1
Date: Monday, March 06, 2006 Sheet 12 of 63
5 4 3 2 1
5 4 3 2 1

CRT OUT checklist suggests 47ohm/100MHz

TV OUT
JP1304 SHORT_PIN L1301 CON3
RED 1 2 CRT_RED_R
1 2 CRT_R_CON 1 9
7 RED RED VCC
12G14101107D

1
0.068uH C1301

1
D R1301 C1302 22PF/25V D
checklist suggests 150Ohm 10PF/50V c0402
r0402 c0402

2
150ohm/100MHz &

2
6pF GND

1
9
JP1301 120Ohm/100Mhz L1300 CON2 GND
TV_DACA_OUT 1 2 TV_DACA_OUT_R 1 2 TV_CVBS_CON 2

HC2
7 TV_DACA_OUT CVBS1
7 GND
JP1302 SHORT_PIN 120Ohm/100Mhz L1302 CVBS2
TV_DACB_OUT SHORT_PIN
1 2 TV_DACB_OUT_R 1 2 TV_Y_CON 4 JP1305 SHORT_PIN L1303
7 TV_DACB_OUT Y CRT_GREEN_R CRT_G_CON
6 GREEN 1 2 1 2 2 4
C 7 GREEN GREEN NC1
JP1303 SHORT_PIN 120Ohm/100Mhz L1304 11
NC2

1
TV_DACC_OUT 1 2 TV_DACC_OUT_R
1 2 TV_C_CON 0.068uH C1303
7 TV_DACC_OUT

1
5 R1302 22PF/25V
NC
1

1
C1305 C1306 C1307 C1308 C1309 C1310 150Ohm C1304 c0402
R1303 R1304 R1305 c0402 c0402 c0402 c0402 c0402 c0402 r0402 10PF/50V

2
1

HC1
150Ohm 150Ohm 150Ohm 5.6PF/50V 5.6PF/50V 5.6PF/50V 5.6PF/50V 5.6PF/50V 5.6PF/50V GND0 c0402

2
3 GND1
r0402 r0402 r0402

1
MINI_DIN_7P GND
2

8
Place Terminator GND GND
12-141011072
GND close to GND GND
Connector GND JP1306 SHORT_PIN L1305
BLUE 1 2 CRT_BLUE_R
1 2 CRT_B_CON 3
7 BLUE BLUE

1
0.068uH C1311

1
R1306 C1300 22PF/25V
150Ohm 10PF/50V c0402
C r0402 c0402 C

2
2
1
GND
D1301 D1302
2 2 GND
+3VS +2.5VS
3 TV_DACA_OUT_R 3 CRT_RED_R
1 1 R1307
CRT_HSYNC 1 2 HSYNC_CON 13 15
7 CRT_HSYNC HSYNC
BAV99 BAV99

2
GND 39Ohm C1312 /
GND r0402 47PF/50V
D1303 D1304 c0402

CRT
+3VS 2 +2.5VS 2
3 TV_DACB_OUT_R 3 CRT_GREEN_R PIN
1 1
GND
BAV99 BAV99
GND GND
R1308
D1305 D1306 CRT_VSYNC 1 2 VSYNC_CON 14 1
7 CRT_VSYNC VSYNC
+3VS 2 +2.5VS 2

2
3 TV_DACC_OUT_R 3 CRT_BLUE_R 39Ohm C1313 /
1 1 r0402 47PF/50V
c0402
BAV99 BAV99

1
GND
GND
PLACE ESD Diodes PLACE ESD Diodes GND
B
near TV port near VGA port B

D1300 R1309
1 2 1 6 DDC2BD_5 1 2 DDC_DAT_CON 12
+5VS +5VS_CRT 7 CRT_DDC_DATA DATA
D1307

2
1N4148W 2 Q1300A 0Ohm C1314
+3VS
3 CRT_HSYNC UM6K1N 47PF/50V
SIDE_G16 16
c0402

2
1 SIDE_G17 17

1
BAV99
+5VS
GND GND GND
D1308
+5VS_CRT 2
+3VS
3 CRT_VSYNC Q1300B

5
1 UM6K1N
R1310 1 6.8KOhm2 DDC2BD_5 R1300
DDC2BD_5

GND5
GND4
GND3
GND2
GND1
BAV99 4 3 DDC2BC_5 1 2 DDC_CLK_CON 15
7 CRT_DDC_CLK DCLK
R1311 1 6.8KOhm2 DDC2BC_5 GND
DDC2BC_5

2
0Ohm C1315
47PF/50V

10
+3VS c0402

8
7
6
5
D_SUB_15P

1
R1312 1 2.2KOhm2 CRT_DDC_DATA
GND 12G101102152
A
R1313 1 2.2KOhm2 CRT_DDC_CLK A
GND

Title : CRT & TV OUT


ASUSTeK COMPUTER INC Engineer: Jack Wang
Size Project Name Rev
A3 A6F 1.0
Date: Monday, March 06, 2006 Sheet 13 of 63
5 4 3 2 1
5 4 3 2 1

8 M_B_DQ[0..63]

8,16 M_B_A[0..13] M_VREF_DIMM1 M_VREF_DIMM1 7,15,16


+1.8V +1.8V 7,10,15,36,53
+3VS +3VS 4,5,7,9,11,12,13,15,19,20,21,22,25,26,27,28,30,36,38,39,42,50,52,60,61

CON8B
B102 M_B_A0 B5 M_B_DQ1
M_B_A1 B:A0 B:DQ0 M_B_DQ4
B101 B:A1 B:DQ1 B7
B100 M_B_A2 B17 M_B_DQ7
M_B_A3 B:A2 B:DQ2 M_B_DQ3 Group0
B99 B:A3 B:DQ3 B19
D B98 M_B_A4 B4 M_B_DQ5 D
M_B_A5 B:A4 B:DQ4 M_B_DQ0
B97 B:A5 B:DQ5 B6
B94 M_B_A6 B14 M_B_DQ2
M_B_A7 B:A6 B:DQ6 M_B_DQ6
B92 B:A7 B:DQ7 B16
B93 M_B_A8 B23 M_B_DQ8
M_B_A9 B:A8 B:DQ8 M_B_DQ9
B91 B:A9 B:DQ9 B25
B105 M_B_A10 B35 M_B_DQ14
M_B_A11 B:A10/AP B:DQ10 M_B_DQ15 Group1
B90 B:A11 B:DQ11 B37
B89 M_B_A12 B20 M_B_DQ13
M_B_A13 B:A12 B:DQ12 M_B_DQ12
B116 B:A13 B:DQ13 B22
B86 B36 M_B_DQ11
B:A14 B:DQ14 M_B_DQ10
B84 B:A15 B:DQ15 B38
M_B_BS#2 B85 B43 M_B_DQ21
8,16 M_B_BS#2 M_B_BS#0 B:A16_BA2 B:DQ16
B107 B45 M_B_DQ16
8,16 M_B_BS#0 M_B_BS#1 B:BA0 B:DQ17
B106 B55 M_B_DQ22
8,16 M_B_BS#1 M_CS#2 B:BA1 B:DQ18 Group2
B110 B57 M_B_DQ23
7,16 M_CS#2 M_CS#3 B:S0# B:DQ19
B115 B44 M_B_DQ17
7,16 M_CS#3 M_CLK_DDR3 B:S1# B:DQ20
B30 B46 M_B_DQ20
7 M_CLK_DDR3 M_CLK_DDR#3 B32 B:CK0 B:DQ21
B56 M_B_DQ19
7 M_CLK_DDR#3 M_CLK_DDR2 B164 B:CK0# B:DQ22
B58 M_B_DQ18
7 M_CLK_DDR2 M_CLK_DDR#2 B166 B:CK1 B:DQ23
B61 M_B_DQ29
7 M_CLK_DDR#2 M_CKE2 B:CK1# B:DQ24
B79 B63 M_B_DQ25
7,16 M_CKE2 M_CKE3 B:CKE0 B:DQ25 M_B_DQ31
7,16 M_CKE3 B80 B:CKE1 B:DQ26 B73
M_B_CAS# B113 B75 M_B_DQ30 Group3
8,16 M_B_CAS# M_B_RAS# B:CBS# B:DQ27
B108 B62 M_B_DQ26
8,16 M_B_RAS# M_B_WE# B:RAS# B:DQ28
11/14 B109 B64 M_B_DQ24
8,16 M_B_WE# B:WE# B:DQ29
+3VS 1 R1401 2 r0402 B198 B:SA0 B:DQ30 B74 M_B_DQ28
10KOhm 1 R1402 2 r0402 B200 B76 M_B_DQ27
GND SMB_CLK_S B:SA1 B:DQ31
10KOhm B197 B123 M_B_DQ32
5,15,19,26 SMB_CLK_S SMB_DAT_S B:SCL B:DQ32
C B195 B125 M_B_DQ33 C
5,15,19,26 SMB_DAT_S B:SDA B:DQ33
B135 M_B_DQ34
M_ODT2 B:DQ34 M_B_DQ35 Group4
7,16 M_ODT2 B114 B:ODT0 B:DQ35 B137
M_ODT3 B119 B124 M_B_DQ36
7,16 M_ODT3 B:ODT1 B:DQ36
B126 M_B_DQ37
+1.8V M_B_DM0 B:DQ37 M_B_DQ38
B10 B:DM0 B:DQ38 B134

For Data Swap


M_B_DM1 B26 B136 M_B_DQ39
M_B_DM2 B:DM1 B:DQ39 M_B_DQ41
B52 B:DM2 B:DQ40 B141
M_B_DM3 B67 B143 M_B_DQ40
M_B_DM4 B:DM3 B:DQ41 M_B_DQ46
B130 B:DM4 B:DQ42 B151
1

C1401 C1402 C1403 C1400 M_B_DM5 B147 B153 M_B_DQ43


M_B_DM6 B:DM5 B:DQ43 M_B_DQ44 Group5
B170 B:DM6 B:DQ44 B140
0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V M_B_DM7 B185 B142 M_B_DQ45
B:DM7 B:DQ45 M_B_DQ42
2

B:DQ46 B152
M_B_DQS0 B13 B154 M_B_DQ47
M_B_DQS1 B:DQS0 B:DQ47 M_B_DQ53
B31 B:DQS1 B:DQ48 B157
Layout Note: GND M_B_DQS2 B51 B159 M_B_DQ49
M_B_DQS3 B:DQS2 B:DQ49 M_B_DQ54
B70 B:DQS3 B:DQ50 B173
Place these resistors M_B_DQS4 B131 B175 M_B_DQ51 Group6
M_B_DQS5 B:DQS4 B:DQ51 M_B_DQ48
near the GMCH B148 B:DQS5 B:DQ52 B158
M_B_DQS6 B169 B160 M_B_DQ52
M_B_DQS7 B:DQS6 B:DQ53 M_B_DQ50
B188 B:DQS7 B:DQ54 B174
M_B_DQS#0 B11 B176 M_B_DQ55
M_B_DQS#1 B:DQS0# B:DQ55 M_B_DQ63
B29 B:DQS1# B:DQ56 B179
M_B_DQS#2 B49 B181 M_B_DQ57
M_B_DQS#3 B:DQS2# B:DQ57 M_B_DQ62
B68 B:DQS3# B:DQ58 B189
M_B_DQS#4 M_B_DQ61 Group7
Layout Note: M_B_DQS#5
B129 B:DQS4# B:DQ59 B191
M_B_DQ56
B146 B:DQS5# B:DQ60 B180
Place these M_B_DQS#6 B167 B182 M_B_DQ60
B +1.8V M_B_DQS#7 B:DQS6# B:DQ61 M_B_DQ58 B
8 M_B_DM[0..7] Caps near B186 B:DQS7# B:DQ62 B192
B194 M_B_DQ59
B:DQ63
8 M_B_DQS[0..7] SO DIMM 1 +1.8V

8 M_B_DQS#[0..7] B111 B:VDD2 B:VSS26 B127


1

1
1

C1408 C1411 C1409 C1410 B117 B139


B:VDD3 B:VSS27
B95 B:VDD5 B:VSS29 B145
0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V B81 B165
+1.8V B:VDD7 B:VSS30
2

B87 B171
2

B:VDD9 B:VSS31
B103 B:VDD10 B:VSS33 B177
B:VSS34 B187
GND B47 B9
B:VSS1 B:VSS37
GND B133 B:VSS2 B:VSS38 B21
1

C1412 C1413 C1414 C1415 C1416 B183 B33


+3VS B:VSS3 B:VSS39
B77 B:VSS4 B:VSS40 B155
2.2UF/6.3V 2.2UF/6.3V 2.2UF/6.3V 2.2UF/6.3V 2.2UF/6.3V B71 B3
B:VSS9 B:VSS47
2

B121 B:VSS11 B:VSS48 B15


B193 B:VSS14 B:VSS49 B27
B41 B:VSS18 B:VSS50 B39
1

C1404 C1405 B53 B149


GND 2.2UF/6.3V 0.1UF/10V B:VSS19 B:VSS51
B59 B:VSS22 B:VSS52 B161 GND
B65 B:VSS23
2

B199 B:VDDSPD B:NC1 B83


GND GND B120
B:NC2
B1 B:VREF B:NC3 B50
M_VREF_DIMM1 B69
B:NC4
B:NCTEST B163
A VREF -> 10/10 mils A
DDR_DIMM_331P
1

C1406 C1407
2.2UF/6.3V 0.1UF/10V
2

GND GND
Title : DDR2_SO-DIMM(1)
ASUSTeK COMPUTER INC Engineer: Jack Wang
Size Project Name Rev
A3 A6F 1.0
Date: Monday, March 06, 2006 Sheet 14 of 63
5 4 3 2 1
5 4 3 2 1

8 M_A_DQ[0..63]
Green Part Number:12G025122006
8,16 M_A_A[0..13] +1.8V +1.8V 7,10,14,36,53
+3VS +3VS 4,5,7,9,11,12,13,14,19,20,21,22,25,26,27,28,30,36,38,39,42,50,52,60,61
M_VREF_DIMM0 M_VREF_DIMM0 7,14,16

CON8A
M_A_A0 A102 A5 M_A_DQ6
M_A_A1 A:A0 A:DQ0 M_A_DQ7
A101 A:A1 A:DQ1 A7
M_A_A2 A100 A17 M_A_DQ2
M_A_A3 A:A2 A:DQ2 M_A_DQ3 Group0
D A99 A:A3 A:DQ3 A19 D
M_A_A4 A98 A4 M_A_DQ4
M_A_A5 A:A4 A:DQ4 M_A_DQ5
A97 A:A5 A:DQ5 A6
M_A_A6 A94 A14 M_A_DQ0
M_A_A7 A:A6 A:DQ6 M_A_DQ1
A92 A:A7 A:DQ7 A16
M_A_A8 A93 A23 M_A_DQ14
M_A_A9 A:A8 A:DQ8 M_A_DQ8
A91 A:A9 A:DQ9 A25
M_A_A10 A105 A35 M_A_DQ10
M_A_A11 A:A10/AP A:DQ10 M_A_DQ11 Group1
A90 A:A11 A:DQ11 A37
M_A_A12 A89 A20 M_A_DQ13
M_A_A13 A:A12 A:DQ12 M_A_DQ12
A116 A:A13 A:DQ13 A22
A86 A36 M_A_DQ15
A:A14 A:DQ14 M_A_DQ9
A84 A:A15 A:DQ15 A38
M_A_BS#2 A85 A43 M_A_DQ16
8,16 M_A_BS#2 A:A16_BA2 A:DQ16
A45 M_A_DQ20
M_A_BS#0 A:DQ17 M_A_DQ18
8,16 M_A_BS#0 A107 A:BA0 A:DQ18 A55
M_A_BS#1 A106 A57 M_A_DQ23 Group2
8,16 M_A_BS#1 M_CS#0 A:BA1 A:DQ19
A110 A44 M_A_DQ21
7,16 M_CS#0 M_CS#1 A:S0# A:DQ20
A115 A46 M_A_DQ17
7,16 M_CS#1 A:S1# A:DQ21
M_CLK_DDR0 A30 A56 M_A_DQ19
7 M_CLK_DDR0 A:CK0 A:DQ22
M_CLK_DDR#0 A32 A58 M_A_DQ22
7 M_CLK_DDR#0 A:CK0# A:DQ23
M_CLK_DDR1 A164 A61 M_A_DQ28
7 M_CLK_DDR1 A:CK1 A:DQ24
M_CLK_DDR#1 A166 A63 M_A_DQ25
7 M_CLK_DDR#1 M_CKE0 A:CK1# A:DQ25
A79 A73 M_A_DQ31
7,16 M_CKE0 M_CKE1 A:CKE0 A:DQ26 Group3
A80 A75 M_A_DQ26
7,16 M_CKE1 M_A_CAS# A:CKE1 A:DQ27
A113 A62 M_A_DQ24
8,16 M_A_CAS# M_A_RAS# A:CAS# A:DQ28
A108 A64 M_A_DQ29
8,16 M_A_RAS# M_A_WE# A:RAS# A:DQ29
A109 A74 M_A_DQ30
8,16 M_A_WE# A:WE# A:DQ30
A198 A76 M_A_DQ27
C A:SA0 A:DQ31 M_A_DQ34 C
A200 A:SA1 A:DQ32 A123
R15002 10KOhm

R15001 10KOhm 5,14,19,26 SMB_CLK_S


SMB_CLK_S A197 A125 M_A_DQ33
A:SCL A:DQ33
1

1 5,14,19,26 SMB_DAT_S
SMB_DAT_S A195 A:SDA A:DQ34 A135 M_A_DQ39
A137 M_A_DQ38
M_ODT0 A:DQ35 M_A_DQ36 Group4
7,16 M_ODT0 A114 A:ODT0 A:DQ36 A124
M_ODT1 A119 A126 M_A_DQ32
7,16 M_ODT1 A:ODT1 A:DQ37
A134 M_A_DQ37
M_A_DM0 A:DQ38 M_A_DQ35
2

A10 A:DM0 A:DQ39 A136


M_A_DM1 A26 A141 M_A_DQ45
M_A_DM2 A:DM1 A:DQ40 M_A_DQ41
A52 A:DM2 A:DQ41 A143
GND GND M_A_DM3 A67 A151 M_A_DQ47
M_A_DM4 A:DM3 A:DQ42 M_A_DQ46
A130 A:DM4 A:DQ43 A153
For Data Swap

M_A_DM5 A147 A140 M_A_DQ44 Group5


M_A_DM6 A:DM5 A:DQ44 M_A_DQ40
A170 A:DM6 A:DQ45 A142
M_A_DM7 A185 A152 M_A_DQ43
A:DM7 A:DQ46 M_A_DQ42
A:DQ47 A154
M_A_DQS0 A13 A157 M_A_DQ52
M_A_DQS1 A:DQS0 A:DQ48 M_A_DQ53
A31 A:DQS1 A:DQ49 A159
M_A_DQS2 A51 A173 M_A_DQ54
M_A_DQS3 A:DQS2 A:DQ50 M_A_DQ55 Group6
A70 A:DQS3 A:DQ51 A175
M_A_DQS4 A131 A158 M_A_DQ49
M_A_DQS5 A:DQS4 A:DQ52 M_A_DQ48
A148 A:DQS5 A:DQ53 A160
M_A_DQS6 A169 A174 M_A_DQ51
M_A_DQS7 A:DQS6 A:DQ54 M_A_DQ50
A188 A:DQS7 A:DQ55 A176
M_A_DQS#0 A11 A179 M_A_DQ61
M_A_DQS#1 A:DQS0# A:DQ56 M_A_DQ63
A29 A:DQS1# A:DQ57 A181
M_A_DQS#2 A49 A189 M_A_DQ56
M_A_DQS#3 A:DQS2# A:DQ58 M_A_DQ62 Group7
A68 A:DQS3# A:DQ59 A191
M_A_DQS#4 A129 A180 M_A_DQ57
B
M_A_DQS#5 A:DQS4# A:DQ60 M_A_DQ60 B
A146 A:DQS5# A:DQ61 A182
M_A_DQS#6 A167 A192 M_A_DQ59
8 M_A_DM[0..7] A:DQS6# A:DQ62
M_A_DQS#7 A186 A194 M_A_DQ58
A:DQS7# A:DQ63
8 M_A_DQS[0..7] GMCH=====>SODIMM1=>SODIMM0 +1.8V
8 M_A_DQS#[0..7]
A112 A:VDD1 A:VSS21 A54
A96 A:VDD4 A:VSS24 A60
A118 A:VDD6 A:VSS25 A66
+1.8V
Layout Note: A82 A:VDD8 A:VSS28 A128
A88 A:VDD11 A:VSS32 A172
Place these A104 A178
A:VDD12 A:VSS35
Caps near A:VSS36 A190
A12 A:VSS5 A:VSS41 A34
1

SO DIMM 0 A48 A:VSS6 A:VSS42 A132


C1500 C1505 C1506 C1507 A184 A144
0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V A:VSS7 A:VSS43
A78 A:VSS8 A:VSS44 A156
+3VS
2

A72 A:VSS10 A:VSS45 A168


+1.8V
Layout Note: A122 A:VSS12 A:VSS46 A2
A196 A:VSS13 A:VSS53 A28
Place these GND A8 A40
A:VSS15 A:VSS54
Caps near A18 A:VSS16 A:VSS55 A138
1

C1501 C1502 A24 A150


A:VSS17 A:VSS56
1

SO DIMM 0 2.2UF/6.3V 0.1UF/10V


GND A42 A:VSS20 A:VSS57 A162 GND
C1508 C1509 C1510 C1511 C1512
2.2UF/6.3V 2.2UF/6.3V 2.2UF/6.3V 2.2UF/6.3V 2.2UF/6.3V
2

A199 A:VDDSPD A:NC1 A83


2

A:NC2 A120
A1 A:VREF A:NC3 A50
NP_NC1
NP_NC2
NP_NC3
NP_NC4

A
GND GND A69 A
A:NC4
GND1
GND2
GND3
GND4

A:NCTEST A163
GND
M_VREF_DIMM0
DDR_DIMM_331P
201
202
203
204

205
206
208
207

VREF -> 10/10 mils


Title : DDR2 SO-DIMM(0)
1

C1503 C1504
2.2UF/6.3V 0.1UF/10V ASUSTeK COMPUTER INC Engineer: Jack Wang
Size Project Name Rev
2

GND GND
A3 A6F 1.0
Date: Monday, March 06, 2006 Sheet 15 of 63
5 4 3 2 1
5 4 3 2 1

+0.9VS
NEED TO SWAP M_VREF_DIMM0 M_VREF_DIMM0 7,14,15
M_VREF_DIMM1 M_VREF_DIMM1 7,14,15
M_A_A2 M_A_A[0..13] 8,15 M_VREF_MCH M_VREF_MCH 7,14,15
1 16 RN1601A
56Ohm +0.9VS +0.9VS 36,53
2 15 RN1601B M_A_A0
56Ohm M_A_BS#1 M_A_BS#[0..2] 8,15
3 14 RN1601C
56Ohm
D 4 13 RN1601D M_A_RAS# D
56Ohm M_A_CAS# 8,15
5 12 RN1601E M_ODT0
56Ohm M_A_RAS# 8,15
6 11 RN1601F M_CS#0
56Ohm M_A_WE# 8,15
7 10 RN1601G M_CS#2
56Ohm
8 9 RN1601H M_ODT2
56Ohm
1 16 RN1602A M_B_A11
56Ohm
2 15 RN1602B M_B_A6
56Ohm
3 14 RN1602C M_B_A7
56Ohm M_B_A4 M_B_A[0..13] 8,14
4 13 RN1602D
56Ohm M_B_A2
5 12 RN1602E
56Ohm M_B_A0 M_B_BS#[0..2] 8,14
6 11 RN1602F
56Ohm M_B_BS#1
7 10 RN1602G
56Ohm M_B_RAS# M_B_CAS# 8,14 +0.9VS
8 9 RN1602H
56Ohm M_B_RAS# 8,14
M_B_BS#0 M_B_WE# 8,14 M_VREF_DIMM1
1 16 RN1603A L1600
56Ohm M_B_A10
2 15 RN1603B 1 2
56Ohm M_B_WE# M_VREF_MCH
3 14 RN1603C
56Ohm M_B_CAS#
4 13 RN1603D 120Ohm/100Mhz
56Ohm M_CS#3 M_VREF_DIMM0
5 12 RN1603E
56Ohm M_ODT3
C 6 11 RN1603F C
56Ohm M_ODT1
7 10 RN1603G
56Ohm M_CS#[0..3] 7,14,15
8 9 RN1603H M_CS#1
56Ohm
M_ODT[0..3] 7,14,15

M_CKE[0..3] 7,14,15

1 16 RN1605A M_B_A12 +0.9VS


56Ohm M_B_BS#2
2 15 RN1605B
56Ohm M_A_A12
3 14 RN1605C
56Ohm M_A_BS#0
4 13 RN1605D
56Ohm M_A_BS#2
5 12 RN1605E
56Ohm M_CKE2
6 11 RN1605F
56Ohm
1

1
7 10 RN1605G M_CKE0 C1601 C1602 C1603 C1604 C1605 C1606 C1607 C1608 C1609 C1610 C1600 C1611 C1612
56Ohm M_CKE3
8 9 RN1605H c0402 c0402 c0402 c0402 c0402 c0402 c0402 c0402 c0402 c0402 c0402 c0402 c0402
56Ohm
0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V
RN1606A M_B_A13
2

2
1 56Ohm 16
2 15 RN1606B M_CKE1
56Ohm M_A_A13
B 3 14 RN1606C B
56Ohm M_A_A4
4 13 RN1606D
56Ohm M_A_A6
5 12 RN1606E
6
56Ohm
56Ohm 11 RN1606F M_A_A7 Layout note: GND
7 56Ohm 10 RN1606G
RN1606H
M_A_A11
M_A_A9
+0.9VS Place one cap close to every 2 pull-up resistors terminated to +0.9VS
8 56Ohm 9

1 16 RN1607A M_A_A5
56Ohm M_B_A1
2 15 RN1607B
56Ohm
3 14 RN1607C M_B_A3
56Ohm
1

1
4 13 RN1607D M_B_A5 C1613 C1614 C1615 C1616 C1617 C1618 C1619 C1620 C1621 C1622 C1623 C1624 C1625
56Ohm
5 12 RN1607E M_B_A8 c0402 c0402 c0402 c0402 c0402 c0402 c0402 c0402 c0402 c0402 c0402 c0402 c0402
56Ohm
6 11 RN1607F M_A_A3 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V
56Ohm
RN1607G M_A_A8
2

2
7 56Ohm 10
8 9 RN1607H M_B_A9
56Ohm
1 2 RN1608A M_A_CAS#
56Ohm M_A_WE#
3 4 RN1608B
56Ohm
5 6 RN1608C M_A_A10 GND
56Ohm
7 8 RN1608D M_A_A1
56Ohm
A A

Title : DDR2 TERM


ASUSTeK COMPUTER INC Engineer: Jack Wang
Size Project Name Rev
A4 A6F 1.0
Date: Monday, March 06, 2006 Sheet 16 of 63
5 4 3 2 1
5 4 3 2 1

2 1 RTC_X1
C1701 12PF/50V
X1700
+1.5VS_PCIE_ICH +1.5VS_PCIE_ICH 18,20

2
+VCC_RTC 2
2 +VCCP_ICH +VCCP_ICH 20
3 R1701
SIDE +VCC_RTC +VCC_RTC 20
R1702 1 10MOhm
RTCRST# 1 +VCCP +VCCP 2,6,9,20,52
2 1 +1.5VS +1.5VS 9,10,20,26,36,42,52
+5VS +5VS 4,13,19,20,21,22,27,28,36,37,38,44,50,61

1
180KOhm C1700 132.768KHZ RTC_X2

1
2 +3VS +3VS 4,5,7,9,11,12,13,14,15,19,20,21,22,25,26,27,28,30,36,38,39,42,50,52,60,61
0.1UF/10V C1702 12PF/50V
+3VA +3VA 4,12,20,28,37,39,54,59,63
11/30

2
D 1 2 D
1 2 GND
JRST1

GND

U1700A
RTC_X1 AB1 AA6 LPC_AD0
RTC_X2 RTCX1 LAD0 LPC_AD1 LPC_AD0 25,28,38,41
AB2 RTCX2 LAD1 AB5 LPC_AD1 25,28,38,41
+VCC_RTC AC4 LPC_AD2
RTCRST# LAD2 LPC_AD3 LPC_AD2 25,28,38,41
R1703 AA3 Y6

RTC
RTCRST# LAD3 LPC_AD3 25,28,38,41

LPC
1MOhm
11/14 1 2 INTRUNDER# Y5 AC3 LPC_DRQ#0
INTVRMEN INTRUDER# LDRQ0# LPC_DRQ#1 LPC_DRQ#0 19,25
1 2 W4 INTVRMEN LDRQ1#/GPIO23 AA5 1
T1701
R1704 W1 AB3 LPC_FRAME#
EE_CS LFRAME# LPC_FRAME# 25,28,38,41
330KOhm Y1 EE_SHCLK A20GATE +VCCP_ICH
Y2 EE_DOUT A20GATE AE22 A20GATE 28
W3 AH28 H_A20M#
EE_DIN A20M# H_A20M# 2
V3 AG27 S_CPUSLP# 1 2 R1705 /
LAN_CLK CPUSLP# H_CPUSLP# 2,6

CPU
0Ohm R1706
U3 AF24 S_DPRSTP# 1 2 R1700 / 56Ohm
LAN_RSTSYNC TP1/DPRSTP# H_DPSLP# H_DPRSTP# 2,50
AH25 0Ohm

LAN
TP2/DPSLP# H_DPSLP# 2
U5 LAN_RXD0
R1707 V4 AG26 H_FERR#
LAN_RXD1 FERR# H_FERR# 2
C 39Ohm T5 C
LAN_RXD2 H_PWRGD
21 ACZ_BCLK_AUD 1 2 GPIO49/CPUPWRGD AG24 H_PWRGD 2
U7 LAN_TXD0
R1708 V6 DPRSTP# routing from Intel 82801GBM to
39Ohm LAN_TXD1 H_IGNNE#
V7 AG22 H_IGNNE# 2
1 2 ACZ_BCLK LAN_TXD2 IGNNE#
AG21 INIT3_3V# 1 T1702 Yonah processor is required. Routing to VR
34 ACZ_BCLK_MDC ACZ_BCLK INIT3_3V# H_INIT#
U1 ACZ_BCLK INIT# AF22 H_INIT# 2 must be done last and must have de-bounce
ACZ_SYNC R6 AF25 H_INTR
H_INTR 2 filtering to handle daisy chain topology.

AC-97/AZALIA
R1709 ACZ_SYNC INTR +VCCP_ICH
39Ohm ACZ_RST# R5 AG23 RCIN#
ACZ_RST# RCIN# RCIN# 28
21 ACZ_SYNC_AUD 1 2
ACZ_SDIN0 T2 AH24 H_NMI
21 ACZ_SDIN0 ACZ_SDIN1 ACZ_SDIN0 NMI H_SMI# H_NMI 2
R1711 T3 AF23 R1710
34 ACZ_SDIN1 ACZ_SDIN2 ACZ_SDIN1 SMI# H_SMI# 2
39Ohm 1 T1 56Ohm
ACZ_SYNC T1703 ACZ_SDIN2 H_STPCLK#
34 ACZ_SYNC_MDC 1 2 STPCLK# AH22 H_STPCLK# 2
ACZ_SDOUT T4 ACZ_SDOUT S_THRMTRIP#
THERMTRIP# AF26 2 1 R1712 PM_THRMTRIP# 2,4,7
R1713 T1704 1 SATALED# AF18 24.9Ohm
39Ohm SATALED#
SATA0_R IDE_PDD0 IDE_PDD[15:0] 27
21,22 ACZ_RST#_AUD 1 2 1 R1714 2 AF3 SATA0RXN DD0 AB15
0Ohm AE3 AE14 IDE_PDD1 24 ± 5% series termination resistor
R1715 T1700 SATA0_TN SATA0RXP DD1 IDE_PDD2
1 AG2 AG13
39Ohm T1705 1 SATA0_TP AH2
SATA0TXN DD2
AF13 IDE_PDD3 placed within 2" from Intel 82801GBM,
ACZ_RST# SATA0TXP DD3 IDE_PDD4
34 ACZ_RST#_MDC 1 2 DD4 AD14 56 ± 5% pull-up resistor has to be
1 R1716 2 SATA2_R AF7 AC13 IDE_PDD5
0Ohm AE7
SATA2RXN DD5
AD12 IDE_PDD6 within 2" from the series resistor
R1717 T1706 SATA2_TN SATA2RXP DD6 IDE_PDD7
1 AG6 SATA2TXN DD7 AC12
39Ohm T1707 1 SATA2_TP AH6 AE12 IDE_PDD8
SATA2TXP DD8 IDE_PDD9
B 21 ACZ_SDOUT_AUD 1 2 DD9 AF12 B
1 R1718 2 SATA_CLK AF1 AB13 IDE_PDD10
SATA_CLKN DD10

SATA
R1719 0Ohm AE1 AC14 IDE_PDD11
39Ohm SATA_CLKP DD11 IDE_PDD12
DD12 AF14
1 2 ACZ_SDOUT 2 R1720 1 SATA2_RBIASAH10 AH13 IDE_PDD13
34 ACZ_SDOUT_MDC SATARBIASN DD13 IDE_PDD14
0Ohm AG10 AH14
SATARBIASP DD14 IDE_PDD15
DD15 AC15
GND
IDE_PDIOR# AF15 AH17 IDE_PDA0
27 IDE_PDIOR# IDE_PDIOW# DIOR# IDE DA0 IDE_PDA1 IDE_PDA0 27
27 IDE_PDIOW# AH15 DIOW# DA1 AE17 IDE_PDA1 27
IDE_PDDACK# AF16 AF17 IDE_PDA2
27 IDE_PDDACK# INT_IRQ14 DDACK# DA2 IDE_PDA2 27
27 INT_IRQ14 AH16 IDEIRQ
IDE_PIORDY AG16 AE16 IDE_PDCS1#
27 IDE_PIORDY IDE_PDDREQ IORDY DCS1# IDE_PDCS3# IDE_PDCS1# 27
27 IDE_PDDREQ AE15 DDREQ DCS3# AD16 IDE_PDCS3# 27
ICH7M
GPIO16 should not be pulled high PD
/DPRSLPVR
GPIO25 RSMRST# rising should not be pulled low PU

ACZ_SDOUT PWROK rising TP3 pull low: allow entrance to XOR Chain testing INTVRMEN ALWAYS high: Enable integrated VccSus1_05 VRM
TP3 not pull low: sets bit 1 of RPC.PC PD
LINKALERT# REQUIRE an extenal pull-up R Need
ACZ_SYNC PWROK rising sets bit 0 of RPC.PC PD PU
REQ[4:1]# PWROK rising
EE_CS should not be pulled high PD
SATALED# should not be pulled low Conditional
EE_DOUT should not be pulled low PU PU
SPKR PWROK rising high: "No reboot" mode PD
A GNT2# should not be pulled low PU A
TP3 PWROK rising should not be pulled low unless PU
GNT3# PWROK rising low: "top-block swap" mode PU using XOR Chain testing

GNT5#/GPIO17# GNT5# GNT4#

Title : ICH7-M (1/4)


GNT4#/GPIO48 PWROK rising 0 1 SPI PU
1 0 PCI
1 1 LPC
ASUSTeK COMPUTER INC Engineer: Jack Wang
Size Project Name Rev
Custom A6F 1.0
Date: Monday, March 06, 2006 Sheet 17 of 63
5 4 3 2 1
5 4 3 2 1

+3V

14

14
U1800C U1800D
U1700B 9 VCC 12 VCC
30,33,38 PCI_AD[31:0]
PCI_AD0 E18 D7 PCI_REQ#0 8 11
AD0 REQ0# PCI_REQ#0 19
PCI_AD1 C18 PCI E7 PCI_GNT#0 1 T1801 10 13
PCI_AD2 AD1 GNT0# PCI_REQ#1 GND GND
A16 AD2 REQ1# C16 PCI_REQ#1 19,30
PCI_AD3 F18 D16 PCI_GNT#1 SN74LV08APWR SN74LV08APWR
AD3 GNT1# PCI_GNT#1 30
PCI_AD4 PCI_REQ#2

7
E16 AD4 REQ2# C17 PCI_REQ#2 19,33
PCI_AD5 A18 D17 PCI_GNT#2
PCI Device PCI_AD6 E17
AD5
AD6
GNT2#
REQ3# E13 PCI_REQ#3
PCI_GNT#2 33
PCI_REQ#3 19,38
PCI_AD7 A17 F13 PCI_GNT#3 R1801
AD7 GNT3# PCI_GNT#3 38
D PCI_AD8 A15 A13 PCI_REQ#4 1KOhm / D
AD8 REQ4#/GPIO22 PCI_REQ#4 19 GNT#5 GNT#4
Device IDSEL# REQ#/GNT# Interrupts PCI_AD9 C14 A14 PCI_GNT#4 1 2
PCI_AD10 AD9 GNT4#/GPIO48 PCI_REQ#5 LPC 11 1 1 (default)
E14 AD10 GPIO1/REQ5# C8 PCI_REQ#5 19
PCI_AD11 D14 D8 PCI_GNT#5 1 2 PCI 10 1 0
PCI_AD12 AD11 GPIO17/GNT5# SPI 01 0 1
CardBus AD17 REQ1#/GNT1# B, C, D B12 AD12
PCI_AD13 C13 B15 PCI_C/BE#0 R1802
AD13 C/BE0# PCI_C/BE#0 30,33,38
LAN AD23 REQ2#/GNT2# A PCI_AD14 G15 C12 PCI_C/BE#1 1KOhm /
AD14 C/BE1# PCI_C/BE#1 30,33,38
PCI_AD15 G13 D12 PCI_C/BE#2 GND
AD15 C/BE2# PCI_C/BE#2 30,33,38
Mini-PCI AD19 REQ3#/GNT3# E, F PCI_AD16 E12 C15 PCI_C/BE#3
AD16 C/BE3# PCI_C/BE#3 30,33,38
PCI_AD17 C11
PCI_AD18 AD17 PCI_IRDY#
D11 AD18 IRDY# A7 PCI_IRDY# 19,30,33,38
PCI_AD19 A11 E10 PCI_PAR
AD19 PAR PCI_PAR 30,33,38 +3V
PCI_AD20 A10 B18 PCI_RST#_ICH
PCI_AD21 AD20 PCIRST# PCI_DEVSEL#
F11 AD21 DEVSEL# A12 PCI_DEVSEL# 19,30,33,38
PCI_AD22 PCI_PERR#

14
F10 AD22 PERR# C9 PCI_PERR# 19,30,33,38
PCI_AD23 E9 E11 PCI_LOCK# U1800A
AD23 PLOCK# PCI_LOCK# 19 VCC
PCI_AD24 D9 B10 PCI_SERR# 1
AD24 SERR# PCI_SERR# 19,30,33,38
PCI_AD25 B9 F15 PCI_STOP# 3
AD25 STOP# PCI_STOP# 19,30,33,38 PCI_RST# 12,25,26,30,33,38
PCI_AD26 A8 F14 PCI_TRDY# PCI_RST#_ICH 2
AD26 TRDY# PCI_TRDY# 19,30,33,38 GND
PCI_AD27 A6 F16 PCI_FRAME#
AD27 FRAME# PCI_FRAME# 19,30,33,38
PCI_AD28 C7 SN74LV08APWR
PCI_AD29 AD28 PLT_RST#_SB

7
B6 AD29 PLTRST# C26
PCI_AD30 E6 A9 CLK_ICHPCI Do not connect to reset on PCI
AD30 PCICLK CLK_ICHPCI 5

7
PCI_AD31 D6 B19 PCI_PME# U1800B
AD31 PME# PCI_PME# 19,25,30,33,38 PLT_RST#_SB_R GND down devices.
5
Interrupt I/F 6 PLT_RST# 7,19,27,28
PCI_INTA# A3 G8 PCI_INTE# 4
19,33 PCI_INTA# PIRQA# GPIO2/PIRQE# PCI_INTE# 19,38
PCI_INTB# PCI_INTF#
VCC
19,30 PCI_INTB# B4 PIRQB# GPIO3/PIRQF# F7 PCI_INTF# 19,38

1
C PCI_INTC# C5 F8 PCI_INTG# SN74LV08APWR +3V C
19,30 PCI_INTC# PCI_INTG# 19

14
PCI_INTD# PIRQC# GPIO4/PIRQG# PCI_INTH# C1800 N/A
19,30 PCI_INTD# B5 PIRQD# GPIO5/PIRQH# G7 PCI_INTH# 19
0.01UF/16V

2
+3V C1801

2
T1802 S_RSVD1
MISC S_RSVD6 T1803
1 AE5 RSVD_1 RSVD_6 AE9 1
T1804 1 S_RSVD2 AD5 AG8 S_RSVD7 1 T1805 0.1UF/10V
T1806 S_RSVD3 RSVD_2 RSVD_7 S_RSVD8 T1807 R1800

1
1 AG4 RSVD_3 RSVD_8 AH8 1
T1808 1 S_RSVD4 AH4 F21 S_RSVD9 1 T1809 PLT_RST#_SB 1 2 PLT_RST#_SB_R
T1810 S_RSVD5 RSVD_4 RSVD_9 MCH_ICH_SYNC#
1 AD9 RSVD_5 MCH_SYNC# AH20 MCH_ICH_SYNC# 7
0Ohm
ICH7M

U1700D
T1811 1 PE_RN1 F26 V26 DMI_RXN0
PERn1 DMI0RXN DMI_RXN0 7
T1812 1 PE_RP1 F25 V25 DMI_RXP0
PERp1 DMI0RXP DMI_RXP0 7
T1813 1 PE_TN1 E28 U28 DMI_TXN0
PETn1 DMI0TXN DMI_TXN0 7
T1814 1 PE_TP1 E27 U27 DMI_TXP0
PETp1 DMI0TXP DMI_TXP0 7

Direct Media Interface


H26 Y26 DMI_RXN1
26 PCIE_RXN2_MINICARD PERn2 DMI1RXN DMI_RXN1 7
H25 Y25 DMI_RXP1
26 PCIE_RXP2_MINICARD PERp2 DMI1RXP DMI_RXP1 7
C1802 1 2 0.1UF/10VPE_TN2 G28 W28 DMI_TXN1
26 PCIE_TXN2_MINICARD PETn2 DMI1TXN DMI_TXN1 7
C1803 1 2 0.1UF/10V PE_TP2 G27 W27 DMI_TXP1
26 PCIE_TXP2_MINICARD PETp2 DMI1TXP DMI_TXP1 7

PCI-Express
c0402
T1815 1 PE_RN3 K26 AB26 DMI_RXN2
B PERn3 DMI2RXN DMI_RXN2 7 B
T1816 1 PE_RP3 K25 AB25 DMI_RXP2
PERp3 DMI2RXP DMI_RXP2 7
T1817 1 PE_TN3 J28 AA28 DMI_TXN2
PETn3 DMI2TXN DMI_TXN2 7
T1818 1 PE_TP3 J27 AA27 DMI_TXP2
PETp3 DMI2TXP DMI_TXP2 7
T1819 1 PE_RN4 M26 AD25 DMI_RXN3
PERn4 DMI3RXN DMI_RXN3 7
T1820 1 PE_RP4 M25 AD24 DMI_RXP3
PERp4 DMI3RXP DMI_RXP3 7
T1821 1 PE_TN4 L28 AC28 DMI_TXN3
PETn4 DMI3TXN DMI_TXN3 7
T1822 1 PE_TP4 L27 AC27 DMI_TXP3
PETp4 DMI3TXP DMI_TXP3 7
T1823 1 PE_RN5 P26 AE28 CLK_PCIE_ICH#
PERn5 DMI_CLKN CLK_PCIE_ICH# 5
T1824 1 PE_RP5 P25 AE27 CLK_PCIE_ICH
PERp5 DMI_CLKP CLK_PCIE_ICH 5
T1825 1 PE_TN5 N28
T1826 PE_TP5 PETn5 R1803 24.9Ohm 1%
1 N27 C25
PETp5 DMI_ZCOMP
DMI_IRCOMP D25 DMI_COMP 1 2 +1.5VS_PCIE_ICH
USB Devices
T1827 1 PE_RN6 T25
T1800 PE_RP6 PERn6 USB_PN0_B
T1828
1
1 PE_TN6
T24
R28
PERp6 USBP0N F1
F2 USB_PP0_B
USB_PN0_B 35 Port 0 Conn. 0
PETn6 USBP0P USB_PP0_B 35
T1829 1 PE_TP6 R27 PETp6 USBP1N G4 USB_PN1_B
USB_PN1_B 35 Layout Note: Port 1 Conn. 1
G3 USB_PP1_B
T1830 1 SPI_CLK R2 SPI_CLK
USBP1P
USBP2N H1 USB_PN2_B
USB_PP1_B
USB_PN2_B
35
35
Pull-ups must be placed within 500 Port 2 Conn. 2
T1831 1 SPI_CS# P6 SPI_CS# USBP2P H2 USB_PP2_B
USB_PP2_B 35 mils from Intel 82801GBM pins Port 3 Conn. 3
T1832 1 SPI_ARB P1 J4 USB_PN3_B
SPI_ARB USBP3N USB_PN3_B 35
USB_PP3_B Port 4
SPI

T1833 1 SPI_MOSI P5
USBP3P J3
K1 USB_PN4_B
USB_PP3_B 35 CMOS Camera
SPI_MOSI USBP4N USB_PN4_B 12 Port 5
T1834 1 SPI_MISO P2 SPI_MISO USBP4P K2 USB_PP4_B
USB_PP4_B 12 Bluetooth
USB

USB_PN5_B
USB_OC_0# D3
USBP5N L4
L5 USB_PP5_B
USB_PN5_B 26 Port 6 NC
+3VSUS 35 USB_OC_0# OC0# USBP5P USB_PP5_B 26
A 35 USB_OC_1#
USB_OC_1#
USB_OC_2#
C4 OC1# USBP6N M1 USB_PN6_B
USB_PP6_B
1 T1838
T1839
Port 7 Mini Card A
D5 OC2# USBP6P M2 1
USB_OC_3# D4 N4 USB_PN7_B
OC3# USBP7N USB_PN7_B 26
RN1801A1 2 USB_OC_0# USB_OC_4# E5 N3 USB_PP7_B
10KOhm OC4# USBP7P USB_PP7_B 26
RN1801B3 4 USB_OC_1# USB_OC_5# C3
10KOhm OC5#/GPIO29
RN1801C5 6 USB_OC_7# USB_OC_6# A2 D2 R1804
10KOhm OC6#/GPIO30 USBRBIAS#
RN1801D7 8 USB_OC_6# USB_OC_7# B3 D1 USBRBIAS 1 2
RN1802A1
RN1802B3
10KOhm
10KOhm 2
4
USB_OC_5#
USB_OC_3#
OC7#/GPIO31
ICH7M
USBRBIAS
22.6Ohm 1%
Title : ICH7-M (2/4)
10KOhm
RN1802C5
10KOhm 6 USB_OC_4# ASUSTeK COMPUTER INC Engineer: Jack Wang
RN1802D7 8 USB_OC_2# GND
10KOhm Size Project Name Rev
Custom A6F 1.0
Date: Monday, March 06, 2006 Sheet 18 of 63
5 4 3 2 1
5 4 3 2 1

+3VS
U1700C DPRSLPVR contains same information
SMB_CLK C22 AF19 GPIO21 2 R1901 1100Ohm as DPRSTP#.
SMBCLK GPIO21/SATA0GP GND
SMB_DAT GPIO19 T1900 PCI_TRDY# RP1900A1

GPIO
B22 AH18 1 5

SATA
SMBDATA GPIO19/SATA1GP DPRSLPVR is preferred over DPRSTP# 18,30,33,38 PCI_TRDY# 8.2KOHM
LINKALERT# A26 AH19 BT_LED_EN# 10

SMB
LINKALERT# GPIO36/SATA2GP BT_LED_EN# 37
SM_LINK0 B25 AE19 PCB_ID0 if only one signal will be used. PCI_LOCK# RP1900B2 5
SMLINK0 GPIO37/SATA3GP 18 PCI_LOCK# 8.2KOHM
SM_LINK1 A25 10
SMLINK1 CLK_ICH14 PCI_SERR# RP1900C3
CLK14 AC1 CLK_ICH14 5 18,30,33,38 PCI_SERR# 5
8.2KOHM

Clocks
RING# A28 B2 CLK_USB48 10
RI# CLK48 CLK_USB48 5
PCI_PERR# RP1900D4 5
18,30,33,38 PCI_PERR# 8.2KOHM

2
D SPKR_SB A19 C20 SUSCLK 1 T1901 C1900 / 10 D
21 SPKR_SB SPKR SUSCLK
SUS_STAT# A27 10PF/50V PCI_REQ#5 RP1900E6 5
SUS_STAT# 18 PCI_REQ#5 8.2KOHM
SYS_RST# A22 B24 SLP_S3# 2 R1902 1 0Ohm 10
SYS_RST# SLP_S3# PM_SUSB# 28
SLP_S4# 2 R1900 1 0Ohm PCI_REQ#0 RP1900F7

1
SLP_S4# D23 PM_SUSC# 28 18 PCI_REQ#0 5
8.2KOHM
PM_BMBUSY# AB18 F22 SLP_S5# 1 10
7 PM_BMBUSY# GPIO0/BM_BUSY# SLP_S5# T1902 GND PCI_IRDY# RP1900G8 5
18,30,33,38 PCI_IRDY# 8.2KOHM

MGT
GPIO11 B23 AA4 ICH7_PWROK 10
ICH7_PWROK 7,28

SYS GPIO
SMBALERT#/GPIO11 PWROK PCI_DEVSEL# RP1900H9
18,30,33,38 PCI_DEVSEL# 5
8.2KOHM

2
STP_PCI# AC20 AC22 PM_DPRSLPVR 10
5 STP_PCI# GPIO18/STPPCI# GPIO16/DPRSLPVR PM_DPRSLPVR 7,50
STP_CPU# AF21 R1903

Power
5,50 STP_CPU# GPIO20/STPCPU#
C21 PM_BATLOW# 10KOhm
T1903 GPIO26 TP0/BATLOW# PCI_INTB# RP1901A1
1 A21 GPIO26 18,30 PCI_INTB# 5
8.2KOHM
C23 PM_PWRBTN# 10
PWRBTN# PM_PWRBTN# 28
WLAN_ON# PCI_INTA# RP1901B2

1
12,26,38 WLAN_ON# B21 GPIO27 18,33 PCI_INTA# 5
8.2KOHM
BT_ON E23 GND 10
26 BT_ON GPIO28
C19 PLT_RST# PCI_INTC# RP1901C3 5
LAN_RST# PLT_RST# 7,18,27,28 18,30 PCI_INTC# 8.2KOHM
PM_CLKRUN# AG18 10
30,33,38 PM_CLKRUN# GPIO32/CLKRUN#
Y4 PM_RSMRST# PCI_INTD# RP1901D4 5
RSMRST# PM_RSMRST# 28 18,30 PCI_INTD# 8.2KOHM

2
T1904 1 GPIO33 AC19 10
T1905 GPIO34 GPIO33/AZ_DOCK_EN# SATA_DET#0 PCI_INTG# RP1901E6
1 U2 E20 If ICH7M embedded Lan 18 PCI_INTG# 5
8.2KOHM
GPIO34/AZ_DOCK_RST# GPIO9 USB_PWRSEL R1904
GPIO10 A20 controller was used 10
SB_WAKE# F20 F19 KB_SCI# 10KOhm PCI_INTF# RP1901F7 5
26 SB_WAKE# WAKE# GPIO12 KB_SCI# 28 "LAN_RST#" should be 18,38 PCI_INTF# 8.2KOHM
INT_SERIRQ AH21 E19 SIO_SMI# 10
25,28,30,38 INT_SERIRQ SERIRQ GPIO13 SIO_SMI# 25
PM_THERM# PR_IN#_SB connected to "RSMRST#" PCI_INTH# RP1901G8

1
28 PM_THERM# AF20 THRM# GPIO14 R4 18 PCI_INTH# 5
8.2KOHM
E22 802_LED_EN# 10
GPIO15 802_LED_EN# 37
1 2 VRMPWRGD AD22 R3 GPIO24 1 GND PCI_INTE# RP1901H9 5
39 IMVPOK VRMPWRGD GPIO24 18,38 PCI_INTE# 8.2KOHM
R1905 0Ohm D20 CB_SD# T1907 10
GPIO25 CB_SD# 30
T1908 1/ GPIO6 AC21 AD21 GPIO35 1
RF_OFF_SW# GPIO6 GPIO GPIO35 PCB_ID1 T1909
AC18 GPIO7 GPIO38 AD20
C EXTSMI# E21 AE20 PCB_ID2 PCI_REQ#4 RP1902A1 5 C
28 EXTSMI# GPIO8 GPIO39 18 PCI_REQ#4 8.2KOHM
10
ICH7M PCI_REQ#1 RP1902B2 5
18,30 PCI_REQ#1 8.2KOHM
10
PCI_REQ#2 RP1902C3 5
18,33 PCI_REQ#2 8.2KOHM
10
D1900 PCI_REQ#3 RP1902D4
18,38 PCI_REQ#3 5
8.2KOHM
PM_BATLOW# 1 2 10
BAT_LL# 28
PM_CLKRUN# RP1902E6 5
GPIO Power Plane 1N4148W
8.2KOHM
10
PM_THERM# RP1902F7 5
+3VSUS 8.2KOHM
CPU Vcore GPIO[49] PCI_FRAME# RP1902G8
10
18,30,33,38 PCI_FRAME# 5
8.2KOHM
5V Core GPIO[5:1] 10
+5VS PCI_STOP# RP1902H9 5
3.3V Core GPIO[0][7:6][23:16][39:32][48] USB_PWRSEL 1 R1906 2 10KOhm
18,30,33,38 PCI_STOP# 8.2KOHM
10
3.3V Resume GPIO[15:8][31:24] Q1901

11
2N7002 KB_SCI# 1 R1907 2 10KOhm SMB_CLK_S 2 R1908 1 2.2KOhm

G
ICH7_PWROK 3 3 2 VRMPWRGD SYS_RST# 1 R1909 2 10KOhm SMB_DAT_S 2 R1910 1 2.2KOhm

S 2
checklist suggests
D

2
GPIO11 1 R1911 2 10KOhm
R1912 +3Vsus INT_SERIRQ 1 R1913 2 10KOhm
10KOhm
Q1902 2N7002 RING# 1 R1914 2 8.2KOhm STP_PCI# 1 R1915 2 10KOhm /

SMB_CLK PM_BATLOW# 2 R1916 1 8.2KOhm STP_CPU# 1 R1917 2 10KOhm /


S 2

1
D

5,14,15,26 SMB_CLK_S 2 3
3

11/29
GND SATA_DET#0 1 R1918 2 8.2KOhm <Optional>
G

B B
1

GPIO6 2 R1919 1 8.2KOhm


SIO_SMI# 1 R1920 2 8.2KOhm
1

+5VS
RF_OFF_SW# 2 R1921 1 8.2KOhm
1

802_LED_EN# 1 R1922 2 8.2KOhm


1
G

GPIO19 2 R1923 1 8.2KOhm


SMB_DAT PR_IN#_SB 1 R1924 2 8.2KOhm
2 S

5,14,15,26 SMB_DAT_S 2 3
D

BT_LED_EN# 1 R1925 2 8.2KOhm

Q1900 2N7002 CB_SD# 1 R1926 2 8.2KOhm /


Internal pull up LPC_DRQ#0 2 R1927 1 8.2KOhm /
17,25 LPC_DRQ#0
Internal pull up
SMB_CLK 1 R1928 2 2.2KOhm

SMB_DAT 1 R1929 2 2.2KOhm


+3VS +3VS +3VS BT_ON 1 R1930 2 8.2KOhm
SB_WAKE# 1 R1931 2 1KOhm WLAN_ON# 1 R1932 2 8.2KOhm
1

R1933 R1934 R1935 PM_RSMRST# 1 R1936 2 10KOhm


8.2KOhm 8.2KOhm 8.2KOhm +3VSUS
/ / /
PCB_VID3 : PROJECT CODE
r0402_h16 r0402_h16 r0402_h16 PCB_VID 0 1 2 PM_DPRSLPVR 1 R1937 2 100KOhm/
PCB_ID0 RN1900A 1 10KOhm Internal pull down
2

2
PCB_ID1 MB V1.0 0 0 0 SM_LINK1 RN1900B 3 10KOhm 4
PCB_ID2 SM_LINK0 RN1900C 5 10KOhm 6
LINKALERT# RN1900D 7 10KOhm 8 GND
1

A
R1938 R1939 R1940 A
8.2KOhm 8.2KOhm 8.2KOhm SUS_STAT# R1941 1 2 4.7KOhm
r0402_h16 r0402_h16 r0402_h16 /

R1942 1 2 10KOhm
2

18,25,30,33,38 PCI_PME#
Internal pull up /

GND Title : ICH7-M (3/4)


ASUSTeK COMPUTER INC Engineer: Jack Wang
Size Project Name Rev
A3 A6F 1.0
Date: Monday, March 06, 2006 Sheet 19 of 63
5 4 3 2 1
5 4 3 2 1

+VCCP_ICH +VCCP U1700E


+3VS A4 P28
JP2001 Vss1 Vss98
A23 Vss2 Vss99 R1
D2000 1 2 B1 R11
Vss3 Vss100
2 B8 Vss4 Vss101 R12
3 SHORT_PIN B11 R13
+5VS / Vss5 Vss102
1 B14 Vss6 Vss103 R14
B17 Vss7 Vss104 R15
R2001 BAT54C U1700F 940 mA JP2000 B20 R16
V5REF Vss8 Vss105
1 2 6 mA G10 V5REF_1 Vcc1_05_1 L11 1 2 B26 Vss9 Vss106 R17
Vcc1_05_2 L12 B28 Vss10 Vss107 R18

1
100Ohm C2001 AD17 L14 + SHORT_PIN C2 T6
0.1UF/10V V5REF_2 Vcc1_05_3 C2002 C2003 CE2001/ Vss11 Vss108
D
Vcc1_05_4 L16 C6 Vss12 Vss109 T12 D
10 mA F6 L17 0.1UF/10V 1UF/10V 470UF/2.5V C27 T13
V5REF_Sus Vcc1_05_5 c7343d_h75 Vss13 Vss110

2
Vcc1_05_6 L18 D10 Vss14 Vss111 T14
+3VSUS
If ICH7 embedded Lan

2
AA22 Vcc1_5_B_1 Vcc1_05_7 M11 D13 Vss15 Vss112 T15
GND AA23 M18 D18 T16
D2001 AB22
Vcc1_5_B_2 Vcc1_05_8
P11
R2000 controller was used, these D21
Vss16 Vss113
T17

CORE
Vcc1_5_B_3 Vcc1_05_9 GND Vss17 Vss114
2 AB23 Vcc1_5_B_4 Vcc1_05_10 P18 1 0Ohm 2 +3VS pins should connect to D24 Vss18 Vss115 U4
3 AC23 T11 E1 U12
+5VSUS 1 AC24
Vcc1_5_B_5 Vcc1_05_11
T18 R2002 +3VSUS for S3-S5 wake up. E2
Vss19 Vss116
U13
Vcc1_5_B_6 Vcc1_05_12 Vss20 Vss117
AC25 Vcc1_5_B_7 Vcc1_05_13 U11 1 2 +3VSUS E4 Vss21 Vss118 U14
R2003 BAT54C AC26 U18 0Ohm / E8 U15
Vcc1_5_B_8 Vcc1_05_14 Vss22 Vss119

1
1 2 V5REF_SUS AD26 V11 C2004 E15 U16

VCCSUS3
Vcc1_5_B_9 Vcc1_05_15 Vss23 Vss120
AD27 Vcc1_5_B_10 Vcc1_05_16 V12 Layout Note: F3 Vss24 Vss121 U17

1
10Ohm C2005 AD28 V14 0.1UF/10V +3VS F4 U24
Layout Note:
Vcc1_5_B_11 Vcc1_05_17 Place within 100 mils of ICH7-M Vss25 Vss122

2
D26 Vcc1_5_B_12 Vcc1_05_18 V16 F5 Vss26 Vss123 U25
0.1UF/10V D27 V17 on the Bottom side or 140 mils F12 U26
Place above Caps within 100 mils of Vcc1_5_B_13 Vcc1_05_19 GND Vss27 Vss124

2
D28 V18 F27 V2
Vcc1_5_B_14 Vcc1_05_20 on the Top near pin Vss28 Vss125

1
ICH7-M on the Bottom side or 140 mils VCCPAUX C2006
GND
E24 Vcc1_5_B_15 40 mA F28 Vss29 Vss126 V13
E25 V5 G1 V15
on the Top near pin D28, T28 & AD28 E26
Vcc1_5_B_16 VccSus3_3/VccLAN3_3_1
V1 0.1UF/10V G2
Vss30 Vss127
V24
Vcc1_5_B_17 VccSus3_3/VccLAN3_3_2 Vss31 Vss128

2
F23 Vcc1_5_B_18 VccSus3_3/VccLAN3_3_3 W2 G5 Vss32 Vss129 V27
F24 Vcc1_5_B_19 VccSus3_3/VccLAN3_3_4 W7 G6 Vss33 Vss130 V28
+1.5VS +1.5VS_PCIE_ICH GND
G22 Vcc1_5_B_20 56 mA G9 Vss34 Vss131 W6
G23 Vcc1_5_B_21 Vcc3_3/VccHDA U6 G14 Vss35 Vss132 W24
L2001 770 mA H22 10 mA G18 W25
Vcc1_5_B_22 +VCCP_ICH Vss36 Vss133
1 2 H23 Vcc1_5_B_23 VccSus3_3/VccSusHDA R7 +3VSUS G21 Vss37 Vss134 W26
J22 Vcc1_5_B_24 G24 Vss38 Vss135 Y3
1

80Ohm/100Mhz + C2007 C2008 1 C2009 J23 Vcc1_5_B_25 V_CPU_IO1 AE23 14 mA G25 Vss39 Vss136 Y24
CE2000 K22 AE26 G26 Y27
Vcc1_5_B_26 V_CPU_IO2 Vss40 Vss137

1
C 220UF/4V 0.1UF/10V 0.1UF/10V 0.1UF/10V K23 AH26 C2010 C2011 C2012 H3 Y28 C
c7343d_h75 Vcc1_5_B_27 V_CPU_IO3 Vss41 Vss138
Layout Note:
2

L22 Vcc1_5_B_28 H4 Vss42 Vss139 AA1


0.1UF/10V 0.1UF/10V 4.7U/6.3V
2

L23 AA7 H5 AA24


Vcc1_5_B_29 Vcc3_3_3 Place within 100 mils of ICH7-M Vss43 Vss140

2
M22 AB12 H24 AA25

VCCA3GP
Vcc1_5_B_30 Vcc3_3_4 Vss44 Vss141
M23 Vcc1_5_B_31 Vcc3_3_5 AB20 on the Bottom side or 140 mils H27 Vss45 Vss142 AA26
GND +3VS N22 AC16 270 mA H28 AB4
Vcc1_5_B_32 Vcc3_3_6 +3VS on the Top near pin Vss46 Vss143
N23 AD13 GND J1 AB6

IDE
Vcc1_5_B_33 Vcc3_3_7 Vss47 Vss144

1
P22 AD18 C2013 J2 AB11
Vcc1_5_B_34 Vcc3_3_8 Vss48 Vss145
Layout Note: P23 Vcc1_5_B_35 Vcc3_3_9 AG12 J5 Vss49 Vss146 AB14
1

C2014 R22 AG15 0.1UF/10V J24 AB16


Place within 100 mils of ICH7-M Vcc1_5_B_36 Vcc3_3_10 Vss50 Vss147

2
R23 Vcc1_5_B_37 Vcc3_3_11 AG19 J25 Vss51 Vss148 AB19
on the Bottom side or 140 mils 0.1UF/10V R24 +3VS J26 AB21
Vcc1_5_B_38 GND Vss52 Vss149
Layout Note:
2

R25 A5 K24 AB24


on the Top R26
Vcc1_5_B_39 Vcc3_3_12
B13 K27
Vss53 Vss150
AB27
GND T22
Vcc1_5_B_40 Vcc3_3_13
B16 Distribute in PCI section K28
Vss54 Vss151
AB28
Vcc1_5_B_41 Vcc3_3_14 Vss55 Vss152
T23 Vcc1_5_B_42 Vcc3_3_15 B7 L13 Vss56 Vss153 AC2

1
+1.5VS +1.5VS_DMIPLL T26 C10 C2015 C2016 C2017 L15 AC5
Vcc1_5_B_43 Vcc3_3_16 Vss57 Vss154

PCI
T27 Vcc1_5_B_44 Vcc3_3_17 D15 L24 Vss58 Vss155 AC9
R2004 L2000 T28 F9 0.1UF/10V 0.1UF/10V 0.1UF/10V L25 AC11
Vcc1_5_B_45 Vcc3_3_18 +VCC_RTC Vss59 Vss156
2 +1.5VS_DMIPLL_L 50 mA

2
1 1 2 U22 Vcc1_5_B_46 Vcc3_3_19 G11 L26 Vss60 Vss157 AD1
U23 Vcc1_5_B_47 Vcc3_3_20 G12 M3 Vss61 Vss158 AD3
1

1Ohm 80Ohm/100Mhz C2018 C2000 V22 G16 M4 AD4


Vcc1_5_B_48 Vcc3_3_21 GND Vss62 Vss159
V23 Vcc1_5_B_49 M5 Vss63 Vss160 AD7

1
10UF/10V 0.01UF/50V W22 W5 C2019 C2020 M12 AD8
Vcc1_5_B_50 VccRTC Vss64 Vss161
2

W23 Vcc1_5_B_51 M13 Vss65 Vss162 AD11


Layout Note: Y22 P7 45 mA 0.1UF/10V 0.1UF/10V M14 AD15
Vcc1_5_B_52 VccSus3_3_1 +3VSUS Vss66 Vss163
GND

2
Y23 M15 AD19
Place within 100 mils of ICH7-M Vcc1_5_B_53 Vss67 Vss164

1
A24 C2021 C2022 M16 AD23
VccSus3_3_2 Vss68 Vss165
B
on the Bottom side or 140 mils B27 Vcc3_3_1 VccSus3_3_3 C24 M17 Vss69 Vss166 AE2
B
D19 0.1UF/10V 0.1UF/10V GND M24 AE4
on the Top near pin AG5 +1.5VS VccSus3_3_4 Vss70 Vss167

2
AG28 VccDMIPLL VccSus3_3_5 D22 M27 Vss71 Vss168 AE8
VccSus3_3_6 G19 M28 Vss72 Vss169 AE11
640 mA AB7 Vcc1_5_A_1 +3VSUS
N1 Vss73 Vss170 AE13
AC6 Vcc1_5_A_2 VccSus3_3_7 K3 N2 Vss74 Vss171 AE18
1

C2023 +1.5VS AC7 K4 GND N5 AE21


Vcc1_5_A_3 VccSus3_3_8 Vss75 Vss172
Layout Note: AD6 Vcc1_5_A_4 VccSus3_3_9 K5 N6 Vss76 Vss173 AE24
0.1UF/10V 50 mA AE6 K6 N11 AE25
ARX

Place within 100 mils of Vcc1_5_A_5 VccSus3_3_10 Vss77 Vss174


2

AF5 Vcc1_5_A_6 VccSus3_3_11 L1 N12 Vss78 Vss175 AF2


1

ICH7-M on the Bottom side or C2024 AF6 Vcc1_5_A_7 VccSus3_3_12 L2 C2025 1 C2026 N13 Vss79 Vss176 AF4
GND AG5 L3 N14 AF8
USB

140 mils on the Top 0.1UF/10V AH5


Vcc1_5_A_8 VccSus3_3_13
L6 0.1UF/10V 0.1UF/10V N15
Vss80 Vss177
AF11
Vcc1_5_A_9 VccSus3_3_14 +3VA +VCC_RTC Vss81 Vss178
2

VccSus3_3_15 L7 N16 Vss82 Vss179 AF27


+3VS AD2 M6 N17 AF28
GND VccSATAPLL VccSus3_3_16 T2000 D2002 Vss83 Vss180
VccSus3_3_17 M7 N18 Vss84 Vss181 AG1
AH11 N7 GND 2 N24 AG3
Vcc3_3_2 VccSus3_3_18 +1.5VS R2005 Vss85 Vss182
Layout Note:

1
3 N25 Vss86 Vss183 AG7
1

C2027 +3VSUS +1.5VS AB10 AB17 RTC_BAT 2 1 RTC_BAT_R 1 N26 AG11


Place within 100 mils of Vcc1_5_A_10 Vcc1_5_A_19 Vss87 Vss184

1
AB9 AC17 C2028 P3 AG14
0.1UF/10V Vcc1_5_A_11 Vcc1_5_A_20 1KOhm RB715F Vss88 Vss185
ICH7-M on the Bottom side or AC10 Vcc1_5_A_12 P4 Vss89 Vss186 AG17
1

1
ATX

C2029 T2001 1UF/10V


2

AD10 T7 1 P12 AG20


140 mils on the Top Vcc1_5_A_13 Vcc1_5_A_21 Vss90 Vss187
1

C2031 BAT1

2
AE10 Vcc1_5_A_14 Vcc1_5_A_22 F17 P13 Vss91 Vss188 AG25
GND C2030 AF10 G17 0.1UF/10V P14 AH1
0.1UF/10V 1UF/10V Vcc1_5_A_15 Vcc1_5_A_23 BATT_HOLDER Vss92 Vss189
2

AF9 Vcc1_5_A_16 P15 Vss93 Vss190 AH3


2

2
AG9 Vcc1_5_A_17 Vcc1_5_A_24 AB8 P16 Vss94 Vss191 AH7
AH9 AC8 GND P17 AH12
+1.5VS GND GND Vcc1_5_A_18 Vcc1_5_A_25 GND Vss95 Vss192
Layout Note: P24 Vss96 Vss193 AH23
E3 K7 SUS1_05 1 T2002 P27 AH27
Place within 100 mils of ICH7-M VccSus3_3_19 VccSus1_05_1 Vss97 Vss194
A 17 mA ICH7M
A
on the Bottom side or 140 mils 10 mA C1 VccUSBPLL VccSus1_05_2 C28
+1.5VS
G20
on the Top near pin AG9 VccSus1_05_3
1

C2032 T2003 1 VCCLAN AA2 VccSus1_05/VccLAN1_05_1


GND GND
c0402 30 mA Y7 A1
0.1UF/10V VccSus1_05/VccLAN1_05_2 Vcc1_5_A_26
Vcc1_5_A_27 H6 Layout Note:
1
USB CORE

C2033
2

H7
Vcc1_5_A_28 Place within 100 mils of
Vcc1_5_A_29 J6
J7 0.1UF/10V ICH7-M on the Bottom side
Title : ICH7-M (4/4)
GND Vcc1_5_A_30
Engineer: Jack Wang
2

or 140 mils on the Top ASUSTeK COMPUTER INC


ICH7M
GND Size Project Name Rev
A3 A6F 1.0
Date: Monday, March 06, 2006 Sheet 20 of 63
5 4 3 2 1
5 4 3 2 1

CD-L
CD-G
CD-R C21111
MIC_2 1 2 1UF/10V
C21121 EXT_MIC 23
MIC_1 1 2 1UF/10V

LINE_IN_LC 1 2C21251 LINE_IN_L 22


1UF/10V
LINE_IN_RC 1 2 C21241 LINE_IN_R 22
1UF/10V

13
14
15
16
17
18
19
20
21
22
23
24
D D
+3VS U2100 +5V_AUDIO

MIC2-L(PORT-F-L)
SenseA
LINE2-L(PORT-E-L)
LINE2-R(PORT-E-R)

CD-GND

MIC1-L(PORT-B-L)
MIC2-R(PORT-F-R)

CD-R

MIC1-R(PORT-B-R)

LINE1-R(PORT-C-R)
CD-L

LINE1-L(PORT-C-L)
1

1
C2115 C2116 C2117 C2113 C2114

10UF/10V 0.1UF/10V 0.1UF/10V 10UF/10V 0.1UF/10V

2
PCBEEP 12 25
R2100 1 PCBEEP AVDD1
17,22 ACZ_RST#_AUD 2 0Ohm RESET# 11 RESET# AVSS1 26 GND_AUDIO
ACZ_SYNC_AUD 10 27 VREF_FILT
17 ACZ_SYNC_AUD SYNC VREF
9 28 VREF_OUT/MIC_1/2
DVDD2 MIC1-VREFO-L VREFOUT_MIC 23
R2109 1 2 39Ohm SDATA_IN 8 29
17 ACZ_SDIN0 SDATA-IN NC8
7 30 POP#2 12/1
BIT_CLK DVSS2 MIC2-VREFO
6 BCLK LINE2-VREFO 31
VREF_OUT/MIC_2/2 T2101
17 ACZ_SDOUT_AUD 5 SDATA-OUT MIC1-VREFO-R 32 1
4 DVSS1 NC7 33
1N4148W
/ 1 2 D2102 POP#1 3 34
NC6 SenseB LINE_OUT_L C2103 2 1UF/10V
2 NC5 FRONT-L(PORT-D-L) 35 1 OUT_L 22
1 36 LINE_OUT_R C2102 2 1 1UF/10V
DVDD1 FRONT-R(PORT-D-R) OUT_R 22
1N4148W1 2 D2101 POP#0
22 MUTE_POP_AZGPIO#

CENTER(PORT-G-L)

SURR-R(PORT-A-R)
/

SURR-L(PORT-A-L)
ALC 660 NC pin

LFE(PORT-G-R)
GND_AUDIO
+5V_AUDIO

SPDIFO
C 2 1 C2105 / C

AVDD2
AVSS2

JDREF
10PF/50V

NC4
NC3
NC2

NC1
R2107 1 2 0Ohm BIT_CLK
17 ACZ_BCLK_AUD

1
ALC660-GR

48
47
46
45
44
43
42
41
40
39
38
37
+5V_AUDIO 12/1 R2121
10KOhm
S/PDIF r0402
22 S/PDIF
EAR_L
EAR_L 22 D2103
EAR_R

2
ALC 660 NC pin EAR_R 22
2 R2123 1 22 JACK_IN# 2 1 AMP_SHDN# 22
4.99KOhm
12/1 GND_AUDIO 1%
1N4148W
D2104 GND_AUDIO
POP#2 2 1 MUTE_POP_AZGPIO#
1

R2124 1N4148W
/
+5VS 10KOhm
r0402
/
2
2

R2120
GND_AUDIO
0Ohm
1

B +5V_AUDIO B
T2100
1

C2118 C2119
C2101
1

10UF/10V 1UF/10V 1 2 CD_L_A_R 2 1 CD-L


27 CD_L_A
1

C2121 R2101 0Ohm 1UF/10V


2

2
U2102 c0402
1 5 10UF/10V R2102
GND IN OUT
2

2 GND 47KOhm
25,33,36,37,39,60,61 SUSB# 3 EN NR/FB 4 /
NR/FB

GND_AUDIO
TPS793475DBVR

1
2

GND C2123 1 2 GND_AUDIO


R2117 0Ohm
5V-5VA LDO 0.1UF/10V
CD_GND_A_R
C2104
CD-G
1

1 2 27 CD_GND_A 1 2 2 1
C2120 0.1UF/10V D2105 R2118 0Ohm R2104 0Ohm 1UF/10V
30 SPKR_CB 2 1 1 2GND_AUDIO c0402

2
c0402 VREF_FILT
06/01 1 2
1

R2119 0Ohm R2105


R2125
1N4148W
47KOhm

2
33KOhm C2108 C2109
r0402 GND GND_AUDIO /
10UF/10V 0.1UF/10V

1
2

1
GND_AUDIO
GND R2108 C2106
C2122 0.1UF/10V D2100 C2110 CD_R_A_R CD-R
A 27 CD_R_A 2 1 2 1 A
19 SPKR_SB 2 1 c0402 1 2 1 2 PCBEEP 1UF/10V GND_AUDIO
c0402

2
0.1UF/10V 0Ohm
1

1N4148W R2110
R2112 R2111
33KOhm 33KOhm 47KOhm
r0402 r0402 /
Title : AZALIA ALC660

1
Engineer: Jack Wang
2

ASUSTek COMPUTER INC. NB1


GND GND GND_AUDIO Size Project Name Rev
A3 A6F 1.0
Date: Monday, March 06, 2006 Sheet 21 of 63
5 4 3 2 1
5 4 3 2 1

JP2200
AMP_SHDN# 1 2
+5VS +VAMP
AMP_SHDN# 21
SHORTPIN
INTMIC_A:GND_AUDIO J2200
8 10
: W/P/X = 12/5/15mils
Close to OP 11/29
R2201 +VAMP +5VS
GND_AUDIO
/
GND_MIC MIC JACK 7
5
4
8
7
5
4
NP_NC2
NP_NC1 9
1

1
C2201 C2200 C2202 1 2 L2201 1 2 120Ohm/100Mhz MIC_R GND 3
+VAMP GAIN0 GAIN1 SE/BTL# AV(V/V) 3
10UF/10V 0.1UF/10V 1UF/10V R2202 INTMIC_A L2202 1 2 120Ohm/100Mhz INTMIC_LE 6
12 INTMIC_A 6

1
c0805_h57 c0402 10KOhm 1 0Ohm 2 0 0 0 -2 EXT_MIC_L L2203 1 2 120Ohm/100Mhz MIC_L 2
+5VS 0 1 0 -6 23 EXT_MIC_L 2
R2203 r0402 R2204
2

2
1 1

1
0Ohm / 1 0Ohm 1 0 0 -12 C2205 C2206 C2207
D
r0402 U2200
2
1 1 0 -24
to pre AMP 100PF/50V 100PF/50V 100PF/50V
D

GND_AUDIO GND_AUDIO 1 24 X X 1 -1 c0402 / c0402 / c0402 / PHONE_JACK_6P


GND1 GND4 GND
11/29

2
2 GAIN0 RLINEIN 23
11/29 GAIN1_MB 3 22 AMP_SHDN# R2205
R2206 SPKL+ GAIN1 SHUTDOWN# SPKR+ 0Ohm GND GND GND
4 LOUT+ ROUT+ 21
0Ohm GND_AUDIO 5 20 OUT_R_RC 1 2 OUT_R_R 1 2
LLINEIN RHPIN OUT_R 21
1 2 OUT_L_R 1 2 OUT_L_RC 6 19
21 OUT_L LHPIN VDD

1
C2204 1UF/10V 7 18 C2203 r0402
r0402 AMP_RIN PVDD1 PVDD2 1UF/10V R2216
8 17

R2217 /
27kOhm
1 SPKL-
AMP_LIN
AMP_BP
9
10
11
RIN
LOUT-
LIN
BYPASS
HP/LINE#
ROUT-
SE/BTL#
PC-BEEP
16
15
14
SPKR-
SE/BTL#
27kOhm
r0402
/
LINE IN JACK 8
7
J2201

8
7
NP_NC2
NP_NC1
10
9
r0402

2
12 GND2 GND3 13 5 5
2

2
C2208 C2209 C2210 4
TPA0212PWPRG4 R2218 1 0Ohm LINE_INR GND 4
2

21 LINE_IN_R 2 3 3
0.47UF/16V 0.47UF/16V 0.47UF/16V GND_AUDIO 6
GND_AUDIO GND_AUDIO R2219 1 0Ohm LINE_INL 6
11/29
1

1
21 LINE_IN_L 2 2 2
GND_AUDIO 1 1

1
C2211 C2212
AUDIO OUT AMP

1
+3V 100PF/50V 100PF/50V
GND_AUDIO R2220 R2221 c0402 / c0402 / PHONE_JACK_6P
CE2200 33KOhm 33KOhm GND

2
+
11/14 EAR_L_Q 1 2 EAR_L_C r0402 r0402
47UF/6.3V c6032 / / GND GND
14

14

14

14
SN74LV14APWR SN74LV14APWR SN74LV14APWR SN74LV14APWR

2
VCC VCC VCC VCC CE2201

+
13 12 11 10 9 8 5 6 EAR_R_Q 1 2 EAR_R_C
47UF/6.3V c6032 GND_AUDIO GND_AUDIO
C GND GND GND GND R2222 1 0Ohm 2 C

1
U2202F U2202E U2202D U2202C
R2223 R2224 R2225 1 0Ohm
7

7
2
F(highpass) = 1/(2*3.14*R*C) 10KOhm 10KOhm
+3VS r0402 r0402 +VAMP
DLY_OP_SD 4
11/29 R=32 Ohm for Headphone, so C=68uF / /
1

+3V +3V GND_AUDIO GND

1
R2214 But in order to reduce component type, use
10MOhm Default : H R2226
HEADPHONE & S/PDIF
14

14

r0402 SN74LV14APWR SN74LV14APWR


100uF/6.3V(11-041210721), but 100uF is too 10KOhm
D2200 VCC VCC big for A3N, so change to 47uF. Jack In : L r0402
OP_SD#_D DLY_OP_SD# GND_AUDIO
2

28 OP_SD# 2 1 1 2 3 4
JACK_IN# R2227 1 0Ohm JACK_IN#_R J2202

2
21 JACK_IN# 2 5
1

1N4148W C2213 GND GND 4


R2215 0.1UF/10V U2202A U2202B EAR_L_C R2228 1 10Ohm 2 ER_L2 R2229 1 0Ohm 2 ER_L1 2
10KOhm c0402 EAR_R_C R2230 1 10Ohm 2 ER_R2 R2231 1 0Ohm ER_R1
7

2 3
r0402
2

2
C2214 C2215
/ /
2

SPEAKER CONN. L2200


100PF/50V 100PF/50V
c0402 c0402

1
SPKR+ L2205 1 2 120Ohm/100Mhz SPKR+_CON 1 2 11
+12VS SPKR- L2206 1 2 120Ohm/100Mhz SPKR-_CON
Pop noise can be heard 1KOhm/100Mhz
12

1
+5V EAR_R C2219 C2220 L2209
via headphone when EAR_R 21
1

c0402 c0402 GND_AUDIO GND 120Ohm/100Mhz


6

R2210 Q2201A 100PF/50V 100PF/50V CON12 OPTIC_HP 1


system boot, restart and 10KOhm UM6K1N
2

2
1 1 SIDE1 5
1

+3VS
B resume from S3. Add R2232
r0402 2
SPKL+ L2207 1 2 120Ohm/100Mhz SPKL+_CON
2
3
2 D2203
L2204
120Ohm/100Mhz B
3
OP_SD# to control the 100KOhm AMP_RST# EAR_R_QC SPKL- L2208 1 2 120Ohm/100Mhz SPKL-_CON OPTIC_VCC 2 +SPDPWR +SPDPWR_L
2

4 4 SIDE2 6 1 1 2 8
r0402 7
1

1
turn-on timing. R2211
Q2200A
UM6K1N
5 Q2201B
UM6K1N
C2221
c0402
C2222
c0402 WtoB_CON_4P
1SS400 C2217
c0402
2

10
10KOhm HP_OFF 2 100PF/50V 100PF/50V 0.1UF/10V

6
9
r0402

2
3

Q2200B EAR_R_Q C2218


1

21 MUTE_POP_AZGPIO#
UM6K1N
2

1 2
5 EAR_L GND
D2201 EAR_L 21
100PF/50V
A6VM SPDIF 021406
6

DLY_OP_SD# GND_AUDIO Q2202A c0402 /


4

2 1
+VAMP UM6K1N
1N4148W 2 +VAMP +VAMP
11/29 +VAMP GND
D2202 GND_AUDIO EAR_L_QC Q2205 U2203
1
1

2 1 SI2301BDS_T1_E3 1 A 5
17,21 ACZ_RST#_AUD 29 S/PDIF VCC
4

R2213 5 Q2202B
1

1N4148W 10KOhm C2223 UM6K1N R2233 2 3 OPTIC_VCC 2 B

3 D
r0402

2
10KOhm

2
1UF/25V 3 GND 4 S/PDIF_O

G
EAR_L_Q OPTIC_HP R2234 R2235 Y
2

11

1
SE/BTL# NC7SZ08M5
11

100KOHM 100KOHM
Q2204 C2226
1
G

GND_AUDIO 0.1UF/10V DIGITAL


3

Q2203B JACK_IN# 3 OPTIC_VCC_EN#

1
2 S

2
D

UM6K1N
HP_OFF#5 C2224 2N7002 GND_AUDIO GND_AUDIO GND_AUDIO
1

SE/BTL#_G
A 06/01 A
1
4

But when system resume Q2203A 0.1UF/10V C2225


JACK_IN# OPTIC_HP
6

UM6K1N
from S3, pop noise is
2

0.1UF/10V
2

behind OP_SD# pull high. 2 JACK_IN#


GND_AUDIO
L H SPDIF
Add a delay circuit to GND_AUDIO Title : AUDIO AMP
1

L L LINE OUT Engineer: Jack Wang


prevent it. GND_AUDIO
ASUSTek COMPUTER INC. NB1
Size Project Name Rev
H H NO CONNECT A3 A6F 1.1
Date: Monday, March 06, 2006 Sheet 22 of 63
5 4 3 2 1
5 4 3 2 1

D D

R2301
1 100KOhm2 r0402

R2302
1 100KOhm2 r0402
MIC AMP
+5V_AUDIO
Bias voltage for MIC1 jack
2.5V/3.75Vreference
GND_AUDIO C2301 U2300 L2300
voltage 39PF/50V 4490_POS 3 A+ + VCC 8 +5VMIC 1 2
1 2 1 R_MIC 2 1 EXT_MIC
4490_NEG 2 A- - AO 120Ohm/100Mhz

1
R2303 l0805_h43
VREFOUT_MIC 2 1 VREFOUT_MIC_R 5 B+ + 0Ohm C2302
21 VREFOUT_MIC BO 7 r0402 0.1UF/10V

1
R2304 6 B- - / c0402

2
GND 4
C2303 C2304 270KOhm R2305
C
10UF/10V 1UF/10V r0402_h16 10KOhm NJM2100M
2/23/06 GND_AUDIO
C

c0805_h57 r0402

2
2

GND_AUDIO
R2306 VREF_RC

12
2/23/06 4.7KOhm
GND_AUDIO GND_AUDIO C2305 R_1
1UF/10V 1 2
r0402
R2307
1

2
100KOhm
GND_AUDIO r0402
C_1 R_2
EXT_MIC_L 1 2 EXT_MIC_C 1 2 EXT_MIC_RC 1 2 EXT_MIC
22 EXT_MIC_L EXT_MIC 21
C2300 R2308 C2306
0.1UF/10V 10KOhm 39PF/50V
c0402 r0402

B B
R2300
1 2

0Ohm r0402

High-Pass Filter Cutoff Frequency Gain = - R_1 / R_2 = -10


Fc = 1 / (2*3.14*C_1*R_2) = 159 Hz

A A

Title : MIC Pre-AMP


ASUSTek COMPUTER INC. NB1 Engineer: Jack Wang
Size Project Name Rev
A4 A6F 1.1
Date: Monday, March 06, 2006 Sheet 23 of 63
5 4 3 2 1
5 4 3 2 1

D D

+3VA_EC +3VA_EC

1
C2400 C2401

1UF/10V 1UF/10V
ISA ROM

2
GND GND SST-PLCC32 4Mbits Flash ROM
+3VA_EC PN:05-001004100(+3.3V)
FA18
28 FA18
FA16
28 FA16
FA15 FWR#
28 FA15 FWR# 28
C FA12 FA17 C
28 FA12 FA17 28

U2400

32
31
30
4
3
2
1
A8
A9
RST#

VCC2
VPP

A10
R/C#/CLK
FA7 5 29 FA14
28 FA7 A7 IC FA14 28
FA6 6 28 FA13
28 FA6 A6 GNDA FA8 FA13 28
FA5/ SHBM 7 27
28,29 FA5/ SHBM A5 VCCA FA9 FA8 28
FA4/ PPEN 8 26
28,29 FA4/ PPEN A4/TBL# GND2 FA9 28
FA3/ BADDR1 9 25 FA11
28,29 FA3/ BADDR1 A3 VCC1 FA11 28
FA2/ BADDR0 10 SOCK_32P 24 FRD#
28,29 FA2/ BADDR0 A2 INIT#/OE# FRD# 28
FA1 11 23 FA10
28 FA1 A1 WE# FA10 28
FA0 12 22 FCS#
28 FA0 A0 RY/BY# FCS# 28
FD0 13 21 FD7
28 FD0 DQ0 DQ7 FD7 28

GND1
DQ1
DQ2

DQ3
DQ4
DQ5
DQ6
14
15
16
17
18
19
20
PLCC32 Socket PN:
B B
12G04300032F 28 FD1
FD1 FD6
FD6 28
FD2 FD5
28 FD2 FD5 28
FD4
FD4 28
FD3
FD3 28
GND

A A

Title : ISA ROM


ASUSTeK COMPUTER INC Engineer: Jack Wang
Size Project Name Rev
A4 A6F 1.0
Date: Monday, March 06, 2006 Sheet 24 of 63
5 4 3 2 1
5 4 3 2 1

D D

+3VS

Close to Super I/O

1
C2502 C2503 C2504 C2505 C2506
+3VS +3VS c0402 c0402 c0402 c0402 10UF/10V
0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V c0805_h57
44 SLCT_PE

2
44 SLCT_BUSY
1

C2501
44 SLCT_ACK# LPT_SLCT 44
0.1UF/10V
44 SLCT_ERROR# LPT_PD7 44
c0402 GND
44 SLCT_AFD# LPT_PD6 44
2

SLTC_ERROR#
44 SLCT_STB# LPT_PD5 44
LPT_PD4 44

SLTC_BUSY
SLTC_ACK#
SLTC_AFD#
SLTC_STB#

LPT_PD7

LPT_PD6
LPT_PD5
LPT_PD4
GND

LPT_SLCT
SLTC_PE
T2501 1 SER_RXDA
Layout Note:
Close to Super I/O
Pin 7
T2502
T2503 1
1 SER_TXDA
SER_DSRA# Super I/O
GND +3VS W=35mil

64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
U2500
RN2501A 1 2

nSTROBE

nERROR
nALF

nACK
BUSY
PE
nDSR1
TXD1
RXD1

SLCT
VCC4
PD7
VSS4
PD6
PD5
PD4
+3VS 33OHM
RN2501B 3 4
/
33OHM
T2504 1 SER_RTSA# 1 48 LPT_PD3 RN2501C 5 6
T2505 1 SER_CTSA# 2
nRTS1
nCTS1
PD3
PD2 47 LPT_PD2
LPT_PD3 44
LPT_PD2 44
RN2501D 7
33OHM
/
33OHM
/ 8 W=35mil
C T2506 1 SER_DTRA# 3 46 LPT_PD1 RN2502A 1 2 C
nDTR1 PD1 LPT_PD1 44 /33OHM
T2507 1 R2501 / SER_RIA# 4 45 RN2502B 3 4
nRI1 VCC3 33OHM
/
T2508 1 4.7KOhm SER_DCDA# 5 44 LPT_PD0 RN2502C 5 6
nDCD1 PD0 LPT_PD0 44 /33OHM
1 2 SIO_PME# 6 43 RN2502D 7 8
18,19,30,33,38 PCI_PME# IO_PME# VSS3 33OHM
/ U2501
7 42 SLTC_SLIN# RN2503A 1 2
+3VS VTR nSLCTIN SLCT_SLIN# 44 33OHM
/
8 41 SLTC_INIT# RN2503B 3 4
VSS1 nINIT SLCT_INIT# 44 /33OHM
CLK_14_SIO 9 40 RN2503C 5 6 +VCC_IRED 1
5 CLK_14_SIO CLOCKI GP23 33OHM
/ IRED_Anode
LPC_AD0 10 39 RN2503D 7 8 2
17,28,38,41 LPC_AD0 LAD0 IRMODE/IRRX3 /
33OHM IRED_Cathode
11 38 IRTX IRTX 3
VCC1 IRTX2 / Txd
LPC_AD1 12 37 IRRX IRRX 4
17,28,38,41 LPC_AD1 LAD1 IRRX2 Rxd
LPC_AD2 13 36 R2503 5
17,28,38,41 LPC_AD2 LAD2 GP14/IRQIN2 NC
LPC_AD3 14 35 1 2 +3VS_LED_SIR 6
17,28,38,41 LPC_AD3 LAD3 GP13/IRQIN1 +3VS VCC1/SD

PCI_RESET#
LPC_FRAME# 15 34 SIOSMI# 7
17,28,38,41 LPC_FRAME# LFRAME# GP12/IO_SMI# SC

1
LPC_DRQ#0 SIO_GP11 C2500
10Ohm C2508 C2509

CLKRUN#
16 33 1 2 8

SER_IRQ
17,19 LPC_DRQ#0

PCI_CLK
LDRQ# GP11/SYSOPT GND

LPCPD#
0.1UF/16V
/ 4.7UF/10V 0.1UF/16V

VCC2
R2502 c0402 / c0402

VSS2
GP40
GP41
GP42

GP43
GP44
GP45
GP46
GP47
GP10
2.7KOhm GND / / TFDU4100_TR3

2
GND GND GND /
LPC47N217 GND GND GND
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
12,18,26,30,33,38 PCI_RST#
PCI_RST# W=20mil
+3VS
R2500 10KOhm
+3VS 1 2
r0402 GND
D2500 INT_SERIRQ
INT_SERIRQ 19,28,30,38
21,33,36,37,39,60,61 SUSB# 2 1 SIO_LPCPD#
1N4148W / +3VS
1

B B
C2507
CLK_SIOPCI 5PF/50V
5 CLK_SIOPCI +3VS
c0402 /

2
2

R2504
GND 4.7KOhm Q2500

1
r0402 2N7002

1
G
SIOSMI# SIO_SMI#
1

2 S

3
2 3 SIO_SMI# 19

A A

Title : SUPER I/O


ASUSTeK COMPUTER INC Engineer: Jack Wang
Size Project Name Rev
A3 A6F 1.1
Date: Monday, March 06, 2006 Sheet 25 of 63
5 4 3 2 1
5 4 3 2 1

+3V +3VS
36,39,61 SUSC#

1
MINI PCIEX CONNECTOR R2601

1
+3V 8.2KOhm
/ PCIE Wake R2603 R2611
10KOhm 10KOhm
system

1
r0402 r0402

2
+1.5VS R2602 WAKE_G function /
8.2KOhm

2
1 B
D
+3VS / Q2601 D
Open Drain PMBS3904
CON13 MINI_WAKE# / MC_WL_N/F#

2
+3V SB_WAKE# 19

C
MINI_WAKE#

2
E

3
1 WAKE# 3.3V_1 2

3
BT_DATA 3 4 3
Reserved1 GND7 D
BT_CHCLK 5 6 1 2 Q2600
CLKREQ# Reserved2 1.5V_1
5 CLKREQ# 7 CLKREQ# UIM_PWR 8

1
9 GND1 UIM_DATA 10 C2601 R2604
12,19,38 WLAN_ON# 11 2N7002
CLK_PCIE_MINICARD# 11 12 0.1UF/10V 0Ohm G
5 CLK_PCIE_MINICARD# REFCLK- UIM_CLK 2 S
CLK_PCIE_MINICARD 13 14 c0402
5 CLK_PCIE_MINICARD REFCLK+ UIM_RESET

2
15 GND2 UIM_VPP 16

GND
17 18 GND
C2602 0.1UF/10V Reserved/UIM_C8 GND8 MC_WL_N/F#
19 Reserved/UIM_C4W_DISABLE# 20
18 PCIE_RXN2_MINICARD 1 2 PER- 21 GND3 PERST# 22 PCI_RST# 12,18,25,30,33,38
23 PERn0 +3.3Vaux 24
18 PCIE_RXP2_MINICARD 1 2 PER+ 25 PERp0 GND9 26
0.1UF/10V 27 28 R2605 0Ohm / +1.5VS
C2603 c0402 GND4 1.5V_2 MC_CLK 2
29 GND5 SMB_CLK 30 1 SMB_CLK_S 5,14,15,19
31 32 MC_DATA 2 1
18 PCIE_TXN2_MINICARD PETn0 SMB_DATA SMB_DAT_S 5,14,15,19
33 34 R2600 0Ohm /
18 PCIE_TXP2_MINICARD PETp0 GND10
35 GND6 USB_D- 36 USB_PN7_B 18

1
37 38 C2604 C2605 C2606 C2607
Reserved3 USB_D+ USB_PP7_B 18
39 40 10UF/10V c0402 c0402 c0402
Reserved4 GND11 c0805_h57 0.1UF/10V 0.1UF/10V 0.01UF/50V
41 Reserved5 LED_WWAN# 42
MC_LED# T2600

2
43 Reserved6 LED_WLAN# 44 1
CON14
1 2
45
47
Reserved7 LED_WPAN# 46
48
+3V : 1000 mA(peak)
SIDE1 SIDE2 Reserved8 1.5V_3
C 5 NP_NC1 NP_NC2 6 49 Reserved9 GND12 50
+3VS
+1.5V: 500mA(peak) C
3 4 51 52 GND
SIDE3 SIDE4 Reserved10 3.3V_2 +3VSUS: 330mA(peak)
MINI_PCI_LATCH_4P
53 GND13 NP_NC2 56
GND 12G162200040 GND 54 55
GND14 NP_NC1

1
1219 C2609 C2610 C2611 C2612
MINI_CARD_LATCH_52P C2608 c0402 c0402 c0402 c0402
0.1UF/10V 0.1UF/10V 0.01UF/50V 0.01UF/50V
GND GND 10UF/6.3V

2
12G030000523

1219
R2606 Check O/D output
1 2 GND or push pull
BT_USB_PP5
18 USB_PP5_B
3

0Ohm
r0402 L2600
200Ohm/100MHz
BT_USB_PN5
18 USB_PN5_B R2608 N/A
2

1 2
BLUETOOTH CONNECTOR
0Ohm
r0402

B B

R2607
0Ohm
+3V COEX_CLK_BT BT_CHCLK
Signal direction- BT 1 2 BT_CHCLK 38
CLK: BT -> WLAN; r0402 WLAN
DATA: WLAN -> BT
R2609
1

C2615 C2616 0Ohm


c0402 c0402 BT_ON 3.3V at BT COEX_DATA_BT 1 2 BT_DATA
BT_DATA 38
1UF/10V 0.1UF/10V
GPIO38 r0402
2

WLAN

1
R2610
BT Module has no leakage, so 100KOhm
A6VM discard PMOS block circuits
/

CON15 GND

2
10 SIDE2 8 8
9 7 COEX_DATA_BT
SIDE1 7 COEX_CLK_BT T2601
6 6
5 BT_LED_CON 1
5 BT_USB_PN5
4 4
3 BT_USB_PP5
3 BT_ON
2 2 BT_ON
1 1 +3V

A A
WtoB_CON_8P

BT Connector 021406
Title :MINI PCIEX (TV) & BT Conn
ASUSTeK COMPUTER INC Engineer: Jack Wang
Size Project Name Rev
A3 A6F 1.1
Date: Monday, March 06, 2006 Sheet 26 of 63
5 4 3 2 1
5 4 3 2 1

R2701 CD-ROM R2702


CON16
10KOhm 10KOhm
r0402 r0402 IDE_RST# 1
17 IDE_PDD[15:0]

NP_NC1
1

P_GND1
1 2 1 2 2 2 NP_NC3 47
CON4 IDE_PDD7

51
53
3 3 NP_NC1 45
D IDE_PDD8 4 49 D
BtoB_CON_50P 4 GND1
CD_L_A 1 2 CD_R_A IDE_PDD6 5
21 CD_L_A CD_GND_A CD_GND_A CD_R_A 21 IDE_PDD9 5
21 CD_GND_A 3 4 6 6
IDE_RST# 5 6 IDE_PDD8 IDE_PDD5 7
+3VS IDE_PDD7 IDE_PDD9 IDE_PDD10 7 GND
7 8 8 8
R2703 IDE_PDD6 9 10 IDE_PDD10 IDE_PDD4 9
4.7KOhm IDE_PDD5 IDE_PDD11 IDE_PDD11 9
11 12 10 10
1 2 IDE_PIORDY IDE_PDD4 13 14 IDE_PDD12 IDE_PDD3 11
IDE_PDD3 IDE_PDD13 IDE_PDD12 11
15 16 12 12
R2704 IDE_PDD2 17 18 IDE_PDD14 IDE_PDD2 13
8.2KOhm IDE_PDD1 IDE_PDD15 IDE_PDD13 13
19 20 14 14
1 2 INT_IRQ14 IDE_PDD0 21 22 IDE_PDDREQ IDE_PDD1 15
IDE_PDIOR# IDE_PDD14 15
23 24 16 16
IDE_PDIOW# 25 26 IDE_PDD0 17
+5VS IDE_PIORDY IDE_PDDACK# IDE_PDD15 17
27 28 18 18
R2705 / INT_IRQ14 29 30 IDE_IOCS16_2# 19
10KOhm IDE_PDA1 IDE_DIAG 19
31 32 20 20
1 2 IDE_DIAG IDE_PDA0 33 34 IDE_PDA2 IDE_PDDREQ 21
IDE_PDCS1# IDE_PDCS3# 17 IDE_PDDREQ 21
35 36 22 22
R2706 IDE_PDASP# 37 38 IDE_PDIOW# 23
17 IDE_PDIOW# 23
C 10KOhm 39 40 24 C
IDE_PDASP# IDE_PDIOR# 24
1 2 +5VS 41 42 +5VS 17 IDE_PDIOR# 25 25
43 44 26 26

1
R2700 / 45 46 IDE_PIORDY 27
ODD_CSEL 17 IDE_PIORDY HDD_CSEL 27
10KOhm 47 48 CE2701 28
IDE_IOCS16# 10UF/10V IDE_PDDACK# 28
1 2 49 50 17 IDE_PDDACK# 29 29
c1206

2
30 30
R2707 / INT_IRQ14

NP_NC2

P_GND2
17 INT_IRQ14 31

52
54
10KOhm IDE_IOCS16# 31
32 32
1 2 IDE_IOCS16_2# GND GND GND IDE_PDA1 33
17 IDE_PDA1 IDE_DIAG 33
34 34
IDE_PDA0 35
17 IDE_PDA0 IDE_PDA2 35
17 IDE_PDA2 36 36
R2708 IDE_PDCS1# 37
IDE_DIAG 17 IDE_PDCS1# IDE_PDCS3# 37
1 2 17 IDE_PDCS3# 38 38
IDE_PDASP# 39
37 IDE_PDASP# 39
10KOhm 40 40
+5VS 41 41 GND2 50
GND 42 46
42 NP_NC2
43 43 NP_NC4 48

1
B HDD_CSEL: CE2700 44 B
10UF/10V 44
Pull-Down HDD as Master c1206
+5VS +5VS HDD_CON_44P

2
R2709 GND GND
470Ohm GND
HDD
1
1 2 HDD_CSEL
R2710
1

10KOhm
R2711 r0402
GND 10KOhm
ODD_CSEL: r0402 IDE_RST#
2
6

Pull-Up CDROM as Slave


2

Q2700A D2700
+5VS Pull-Down CDROM as Master IDE_RST#_G 2 UM6K1N 1 2 EC_IDE_RST# EC_IDE_RST# 28
R2712
3

470Ohm 1N4148W
1

1 2 ODD_CSEL Q2700B sod123


5 UM6K1N
7,18,19,28 PLT_RST#
A GND A
4

1 2

R2713 / Title : HDD & CDROM


470Ohm GND
GND ASUSTeK COMPUTER INC Engineer: Jack Wang
Size Project Name Rev
A4 A6F 1.0
Date: Monday, March 06, 2006 Sheet 27 of 63
5 4 3 2 1
5 4 3 2 1

+3VA_EC +3VS

C2815
CLK_ECPCI
+3VPLL
TYPE JP UK US

2
C2801
1

1
C2802 C2803 C2804
0.1UF/10V +3VA_EC +3VS +3VACC / +5VS KID0 H H L

10PF/50V
10UF/10V 0.1UF/10V 0.1UF/10V

1
RN2801A1 EXT_PS2_CLK KID1 L H L
2

2
8.2KOHM 2
RN2801B3 4 EXT_PS2_DAT
8.2KOHM PS2CLK1
GND RN2801C5 6
8.2KOHM

123
136
157
166

161
GND RN2801D7 PS2DAT1

34
45

16

95
8.2KOHM 8
U2800 GND CON17
D LPC_AD0 15 163 SMCLK_BAT D

VCC

AVCC
VSTBY1
VSTBY2
VSTBY3
VSTBY4
VSTBY_PLL
VSTBY5

VBAT
17,25,38,41 LPC_AD0 LPC_AD1 LAD0 SMCLK0/GPB3 SMCLK_BAT 40 +3VS
14 164 SMDATA_BAT to Battery 30
17,25,38,41 LPC_AD1 SMDATA_BAT 40

SMBus
LPC_AD2 LAD1 SMDAT0/GPB4 SMB1_CLK SIDE2 KSI7
17,25,38,41 LPC_AD2 13 LAD2 SMCLK1/GPC1 169 SMB1_CLK 4 28 28
LPC_AD3 10 170 SMB1_DAT to Thermal RN2802A1 2 TPAD_CLK 27 KSI6
17,25,38,41 LPC_AD3 CLK_ECPCI LAD3 SMDAT1/GPC2 SMB1_DAT 4 4.7KOHM TPAD_DAT TPAD_CLK 37 27
18 RN2802B3 4 26 KSI5
5 CLK_ECPCI LPC_FRAME# LPCCLK BAT0_AD 4.7KOHM SMB1_CLK TPAD_DAT 37 26
9 81 RN2802C5 6 25 KSO0
17,25,38,41 LPC_FRAME# PLT_RST# LFRAME# ADC0 EC_ADC1 BAT0_AD 29 4.7KOHM SMB1_DAT 25 KSO1
30 82 1 T2801 RN2802D7 8 24
7,18,19,27 PLT_RST# LPCRST#/WUI4/GPD2 ADC1 4.7KOHM 24

ADC
INT_SERIRQ 7 83 AC_AD 23 KSO2
19,25,30,38 INT_SERIRQ SERIRQ ADC2 AC_AD 29 23

LPC
EXTSMI# 22 84 EC_ADC3 1 T2802 22 KSI4
19 EXTSMI# ECSCI# ECSMI# ADC3 KB_ID0 +3VS 22 KSO3
31 ECSCI#/GPD3 ADC8 93 21 21
A20GATE 5 94 KB_ID1 20 KSO4
17 A20GATE RCIN# GA20/GPB5 ADC9 A20GATE 20 KSO5
6 RN2803A1 2 A6 Keyboard 19
17 RCIN# EC_RST# KBRST#/GPB6 FAN0_DA 8.2KOHM RCIN# 19 KSO6
19 99 RN2803B3 4 18
WRST# DAC0 FAN0_DA 4 8.2KOHM 021206 18

DAC
1 PWUREQ# 23 100 EC_DAC1 1 T2803 RN2803C5 6 KB_ID0 17 KSO7
PWUREQ# DAC1 INVTER_DA 8.2KOHM KB_ID1 17 KSO8
T2804 101 RN2803D7 8 16
FRD# DAC2 BATSEL_2P# INVTER_DA 12 8.2KOHM 16
150 102 15 KSI3
24 FRD# FWR# FRD# DAC3 BATSEL_2P# 57 15 KSO9
24 FWR# 151 FWR# 14 14
FCS# 173 32 BRIGHT_PWM +3VA_EC 13 KSI2
24 FCS# FD0 FCS# PWM0/GPA0 FAN_PWM BRIGHT_PWM 12 13
138 33 1 T2820 12 KSI1
24 FD0 FD1 FD0 PWM1/GPA1 EC_GPA2 BAT_IN_OC# 12 KSO10
139 36 1 T2806 R2801 1 10KOhm 2 11
24 FD1 FD2 FD1 PWM2/GPA2 EC_GPA3 11
140 37 1 T2819 r0402 10 KSI0
24 FD2 FD3 FD2 PWM3/GPA3 CHG_LED_UP# ACIN_OC# 10 KSO11
141 38 R2802 1 10KOhm 2 9
24 FD3 FD4 FD3 PWM4/GPA4 PWR_LED_UP# CHG_LED_UP# 37 9 KSO12
144 39 r0402 8
24 FD4 FD5 FD4 PWM5/GPA5 EC_GPA6 PWR_LED_UP# 37 SMCLK_BAT 8 KSO13
145 40 1 T2807 R2803 1 4.7KOhm2 7
24 FD5 FD6 FD5 PWM6/GPA6 LCD_BACKOFF# 7 KSO14
146 43 r0402 6
24 FD6 FD6 PWM7/GPA7 LCD_BACKOFF# 12 6
FLASH ROM
FD7 147 R2804 1 4.7KOhm2 SMDATA_BAT 5 KSO15
24 FD7 FA0 FD7 NUM_LED 5
124 153 r0402 4
24 FA0 FA1 FA0 RXD/GPB0 CAP_LED NUM_LED 37 4 KB_ID0
125 154 R2805 1 10KOhm 2 DJ_SW# 3
24 FA1 FA2/ BADDR0 FA1 TXD/GPB1 SCRL_LED CAP_LED 37 3
126 162 r0402 2
24,29 FA2/ BADDR0 FA3/ BADDR1 FA2/BADDR0 GPB2 THRO_CPU SCRL_LED 37 LID_EC# 2 KB_ID1
C 127 165 1 T2800 RN2805C 5 C
24,29 FA3/ BADDR1 FA4/ PPEN FA3/BADDR1 RING#/PWRFAIL#/LPCRST#/GPB7 10KOhm 6 1 1
24,29 FA4/ PPEN 128 FA4/PPEN SIDE1 29
FA5/ SHBM 131 47 DJ_LED# R2822 2 100KOhm1 PWRLMT#
24,29 FA5/ SHBM FA6 FA5/SHBM CLKOUT/GPC0 EMAIL_LED# DJ_LED# 37 +3VSUS
132 171 r0402
24 FA6 FA7 FA6 GPC3 ACIN_OC# EMAIL_LED# 37
133 172 FPC_CON_28P
24 FA7 FA8 FA7 TMRI0/WUI2/GPC4 OP_SD# ACIN_OC# 59
143 175 R2806 1 10KOhm 2 EXTSMI# GND
24 FA8 FA9 FA8 GPC5 BAT_IN_OC# OP_SD# 22
142 176 r0402
24 FA9 FA10 FA9 TMRI1/WUI3/GPC6 EC_IDE_RST# BAT_IN_OC# 59
135 1 R2807 1 10KOhm 2 PM_PWRBTN#
24 FA10 FA11 FA10 CK32KOUT/GPC7 EC_IDE_RST# 27
134 r0402
24 FA11 FA12 FA11 PM_SUSB#
24 FA12 130 FA12 RI1#/WUI0/GPD0 26 PM_SUSB# 19
FA13 129 29 PM_SUSC# R2808
24 FA13 FA14 FA13 RI2#/WUI1/GPD1 PR_IN#_EC PM_SUSC# 19 SUSB_EC# +3VA_EC +3VPLL
121 41 1 T2832 2 1 100KOhm
24 FA14 FA15 FA14 GPD4 EC_GPD5 no define
120 42 1 T2808 r0402
24 FA15 FA16 FA15 GINT/GPD5 FAN0_TACH
113 62 R2809 R2800
24 FA16 FA17 FA16/GPG0 TACH0/GPD6 EC_GPD7 FAN0_TACH 4 SUSC_EC#
112 63 1 T2809 2 1 100KOhm 1 0Ohm 2
24 FA17 FA18 FA17/GPG1 TACH1/GPD7
104 r0402
24 FA18 FA18/GPG2

1
1 FA19 103 87 EMAIL# RN2805A +3VACC
FA19/GPG3 ADC4/GPE0 INTERNET# EMAIL# 37 PM_SUSB#
T2810 88 1 C2805 R2810 C2806
INTERNET# 37 10KOhm 2
GPIO

KSI0 ADC5/GPE1 MARATHON# 10UF/10V


71 KSI0/STB# ADC6/GPE2 89 MARATHON# 37 1 0Ohm 2 0.1UF/10V
KSI1 DISTP# RN2805B

2
72 KSI1/AFD# ADC7/GPE3 90 DISTP# 37

1
KSI2 73 2 PWRSW#_EC PM_SUSC# 3
37 KSI2 KSI3 KSI2/INIT# PWRSW/GPE4 EC_GPE5 PWRSW#_EC 37 10KOhm 4
74 44 1 T2811 GND C2800
37 KSI3 KSI4 KSI3/SLIN# WUI5/GPE5 LID_EC#
77 24 0.1UF/10V GND
37 KSI4 KSI5 KSI4 LPCPD#/WUI6/GPE6 EC_GPE7 T2812

2
37 KSI5 78 KSI5 CLKRUN#/WUI7/GPE7 25 1
KSI6 79 GND
KSI7 KSI6 TPAD_CLK GND
80 KSI7 PS2CLK2/GPF4 116
KSO0 49 117 TPAD_DAT +3VA_EC
KSO0/PD0 PS2DAT2/GPF5
KBMX

KSO1 50 118 PWRLMT# D2801


37 KSO1 KSO2 KSO1/PD1 PS2CLK3/GPF6 DJ_SW# PWRLMT# 57
51 KSO2/PD2 PS2DAT3/GPF7 119 DJ_SW# 37 2 OVER_TEMP# 4
B KSO3 B
52 KSO3/PD3 3
KSO4 53 3 THRM_CPU# 1 D2803
KSO4/PD4 FA20/GPG4 THRM_CPU# 4 PM_THERM# 19

8
KSO5 56 4 EC_GPG5 1 1N4148W
KSO6 KSO5/PD5 FA21/GPG5 PMTHERM# T2814 RB715F RN2805D /
57 KSO6/PD6 LPC80HL/GPG6 27
KSO7 58 28 AC_APR_UC# LID_EC# 1 2
KSO8 KSO7/PD7 LPC80LL/GPG7 10KOhm LID_SW# 12
59 KSO8/ACK#
KSO9 60 48 EC_GPH0 R2812 1 100Ohm 2
KSO10 KSO9/BUSY GPH0 VSUS_GD# VSUS_ON 4,51
61 54 R2820
KSO11 KSO10/PE GPH1 IMVPOK# VSUS_GD# 39
1 0Ohm

7
64 KSO11/ERR# GPH2 55 IMVPOK# 39 2
KSO12 65 69 PM_PWRBTN# AC_APR_UC# r0402
KSO12/SLCT GPH3 PM_PWRBTN# 19

3
KSO13 66 70 SUSC_EC# 3 Q2800
KSO13 GPH4 SUSC_EC# 39 D
KSO14 67 75 SUSB_EC# D2802 2N7002
KSO15 KSO14 GPH5 CPU_VRON SUSB_EC# 39
68 76 1N4148W
KSO15 GPH6 PM_RSMRST# CPU_VRON 50 11
105 /
EC_XIN GPH7 PM_RSMRST# 19 AC_APR_UC 57,59
158 G
EC_XOUT CK32K EC_GPI0 S 2
R2813 1 0Ohm 2 watchdog

2
160 CK32KE GPI0 148 ICH7_PWROK 7,19
WATCHDOG#

2
GPI1 149
EXT_PS2_CLK 110 152 EC_GPI2 1
PS2CLK0/GPF0 GPI2
PS/2

EXT_PS2_DAT 111 155 CHG_EN# T2818 GND


PS2CLK1 PS2DAT0/GPF1 GPI3 PRECHG CHG_EN# 57 +3VA_EC
114 PS2CLK1/GPF2 GPI4 156 PRECHG 57
PS2DAT1 115 168 BAT_LL# U2801
PS2DAT1/GPF3 GPI5 BAT_LEARN BAT_LL# 19 EC_RST_SW# EC_RST#
AVSS
NC10
NC11
NC12
NC13
NC14
NC15

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7

174 BAT_LEARN 57 37 EC_RST_SW# 5 1


NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9

GPI6 CD OUT
VDD 2

1
C2807 4 3
NC GND

1
R2821 C2808
106
107
108
109

122
137
159
167
11
12
20
21
85
86
91
92
97
98

17
35
46

96

close to EC IT8510TE 1 0Ohm 1UF/10V RN5VD30CA


8

51,60 FORCE_OFF# 2
/ 0.1UF/10V

2
C2809 1 EC_XIN GND

2
2
A
12PF/50V GND A
X2800 +3VA_EC GND
1205 Change threshold = 2.9V
1

GND 2 +3VA +3VA_EC GND EC_AGND


2 JP2800 H_PROCHOT_S# 2
3 R2815 / tD = 0.69*10^6*CD ps = 6.9 ms
SIDE

3
1 10MOhm 1 2 1 2 5 6 RN2804C EMAIL# 1 2 C2810 0.1UF/10V 3
1 1 2 10KOhm D
CLK32 3 4 RN2804B INTERNET# 1 2 C2811 0.1UF/10V Q2801
10KOhm
GND 1MM_OPEN_5MIL R2816 7 8 RN2804D DISTP# 1 2 C2812 0.1UF/10V
10KOhm 2N7002
32.768KHZ R2817 GND 0Ohm EC_AGND RN2804A MARATHON# C2813 0.1UF/10V THRO_CPU 11 Title : EC IT8510TE
2

1 10KOhm 2 1 2
C2814 1 2 2 1 EC_XOUT G
12PF/50V R2818 Layout Note: 2 S Engineer: Jack Wang
ECSCI# ASUSTek COMPUTER INC
0Ohm 1 KB_SCI# GND

2
2 KB_SCI# 19
GND Cload=12.5PF Close to Switch Size Project Name Rev
0Ohm
GND
A3 A6F 1.1
Date: Monday, March 06, 2006 Sheet 28 of 63
5 4 3 2 1
5 4 3 2 1

Strap value sampled after


VSTBY power up reset
EC Hardware Strap
D
EC ADC D

Battery
+3VA_EC +3VA_EC
PNPCFG base address set by BAT +3VACC
SWCBAHR/SWCBALR
16.8V
1

2
R2901 / R2902
10KOhm 10KOhm R2903 / D2901 /
r0402 r0402 18KOhm 1N4148W
r0402_h16
FA2/ BADDR0 FA3/ BADDR1 R2904 /
2

2
FA2/ BADDR0 24,28 FA3/ BADDR1 24,28 BAT0_R_AD 1

1
2 BAT0_AD 28
1

2
R2905 R2906 / 1KOhm

1
10KOhm 10KOhm BADDR[1:0] R2907 / C2900 /
r0402 r0402 3.92KOhm D2902 / 0.1UF/10V
No pull up: The register pair to access PNPCFG is 1N4148W c0402
2

2
C C
002Eh and 002Fh.

1
Ext 10K up on BADDR0: The register pair to access PNPCFG is
GND GND
004Eh and 004Fh.
Ext 10K up on BADDR1: The register pair to access PNPCFG is GND
determined by EC domain registers
SWCBALR and SWCBAHR.

Adaptor
A/D_DOCK_IN +3VACC

+3VA_EC +3VA_EC 19V

2
Share Memory R2908 / D2903 /
1

B 20KOhm 1N4148W B
R2909 R2900 /
10KOhm 10KOhm R2910 /
r0402 r0402 AC_R_AD

1
1 2 AC_AD 28

2
FA5/ SHBM FA4/ PPEN 1KOhm
2

FA5/ SHBM 24,28 FA4/ PPEN 24,28 3V

1
R2911 / C2901 / 2.99V
1

3.74KOhm D2900 / 0.1UF/10V


R2912 / R2913 1N4148W c0402
10KOhm 10KOhm

2
r0402
SHBM r0402
PPEN

1
No pull up: Disable shared memory No pull up: Normal
2

with host BIOS Ext 10K up: KBS interface pins are switched
GND Ext 10K up: Enable shared memory GND to parallel port interface for GND
with host BIOS in-system programming.

A A

Title : EC IT8510TE(2/2)
ASUSTek COMPUTER INC Engineer: Jack Wang
Size Project Name Rev
A4 A6F 1.0
Date: Monday, March 06, 2006 Sheet 29 of 63
5 4 3 2 1
5 4 3 2 1

U3000A
+3VS

1
5mA C3001 C3002 C3003 C3000 +3V

10UF/10V 0.1UF/10V 0.1UF/10V 0.01UF/16V J18


CADR25 AD19/A25 31

2
2

2
CADR24 J15 AD17/A24 31
R3001 C1 K16
NC2 CADR23 CFRAME#/A23 31
GND GND 0Ohm L16
CADR22 CTRDY#/A22 31
GND GND L18
+3V CADR21 CDEVSEL#/A21 31
External 1.8V source D1 NC3 CADR20 M16 CSTOP#/A20 31
71mA 8mA

1
CADR19 N19 CBLOCK#/A19 31,41
VCC_RIN_CB N16
CADR18 RFU/A18 31,41
E1 P16 R3002
1 NC4 CADR17 AD16/A17 31

1
D C3004 C3005 C3006 C3007 C3008 C3009 C3010 L19 CCLK/A16_R 1 2 D
CADR16 CCLK/A16 31
U3000B K15 22Ohm
CADR15 CIRDY#/A15 31
10UF/10V 0.1UF/10V 0.1UF/10V 10UF/10V 0.1UF/10V 1000PF/50V 1000PF/50V C2 N18 SHIELD GND
NC5 CADR14 CPERR#/A14 31,41

1
C3011
2

2
GND W3 VCC_PCI3V_1 VCC_3V_1 F5 CADR13 N15 CPAR/A13 31
R11 J19 +3V K18 5PF/50V
VCC_PCI3V_2 VCC_3V_3 CADR12 CBE2#/A12 31
R12 VCC_PCI3V_3 VCC_3V_4 K19 D2 NC6 CADR11 R18 AD12/A11 31 L.C.A
1

2
C3012 C3013 C3014 C3015 GND

2
CADR10 U19 AD9/A10 31
R3000 R19
CADR9 AD14/A9 31
0.47UF/16V 0.47UF/16V 0.1UF/10V 0.1UF/10V R6 G5 +3V_CB 1 2 E2 P15 GND
VCC_RIN_1 VCC_3V_2 +3V NC7 CADR8 CBE1#/A8 31
2

E13 VCC_RIN_2 CADR7 J16 AD18/A7 31


VCC_ROUT_CB L1 4mA 0Ohm H15
VCC_ROUT_1 CADR6 AD20/A6 31

2
E14 A4 C3016 E4 H18
VCC_ROUT_2 VCC_MD3V NC8 CADR5 AD21/A5 31
2 1 CB_REGEN# R7 G15
GND REGEN# CADR4 AD22/A4 31

1
GND R3003 100KOhm C3017 C3018 0.1UF/10V G18
CADR3 AD23/A3 31

1
18,33,38 PCI_AD[31:0] GND1 J1 CADR2 F15 AD24/A2 31
J5 10UF/10V 1000PF/50V F18
GND2 CADR1 AD25/A1 31
PCI_AD31

2
M2 AD31 GND3 K5 CADR0 E16 AD26/A0 31
PCI_AD30 M1 E9 GND
PCI_AD29 AD30 GND4
N5 AD29 GND5 R10 CDATA15 U18 AD8/D15 31
PCI_AD28 N4 T10 W18
AD28 GND6 CDATA14 RFU/D14 31,41
PCI_AD27 N2 V10 GND V17
AD27 GND7 CDATA13 AD6/D13 31
PCI_AD26 N1 W10 V16
AD26 GND8 CDATA12 AD4/D12 31
PCI_AD25 P5 L15 V15
AD25 GND9 CDATA11 AD2/D11 31
PCI_AD24 P4 M19 B19
PCI_AD23 AD24 GND10 CDATA10 AD31/D10 31
R4 AD23 AGND_1 A9 CDATA9 C18 AD30/D9 31
PCI_AD22 R2 B9 D18
AD22 AGND_2 CDATA8 AD28/D8 31
PCI_AD21 R1 D9 W17
AD21 AGND_3 CDATA7 AD7/D7 31
PCI_AD20 T2 D14 W16
AD20 AGND_4 CDATA6 AD5/D6 31
C PCI_AD19 T1 A15 W15 C
AD19 AGND_5 +3V CDATA5 AD3/D5 31
PCI_AD18 U2 B15 T15
AD18 AGND_6 CDATA4 AD1/D4 31
PCI_AD17 U1 R14
AD17 CDATA3 AD0/D3 31
PCI_AD16 V1 F4 C19
AD16 TEST CDATA2 RFU/D2 31,41

2
PCI_AD15 T7 D19
AD15 CDATA1 AD29/D1 31
Open Drain : PCI_AD14 V7 R3004 E19
AD14 CDATA0 AD27/D0 31
PCI_AD13 W7 GND 10KOhm
PME#, PCI_AD12 AD13
R8 AD12
SERR#, PCI_AD11 T8 T3000 1 CB_MDIO19 E8 T19 AD11/OE# 31
C3019
PCI_AD10 AD11 CB_HWSUSP# MDIO19 OE# 0.01UF/16V

1
INTn# V8 AD10 HWSPND# F2 WE# M15 CGNT#/WE# 31
PCI_AD9 W8 T3001 1 CB_MDIO18 D8 T18
AD9 MDIO18 CE2# AD10/CE2# 31
PCI_AD8 R9 F1 SPKR_CB V19 1 2
AD8 SPKROUT SPKR_CB 21 CE1# CBE0#/CE1# 31 GND
PCI_AD7 V9 F16
AD7 REG# CBE3#/REG# 31
PCI_AD6 W9 R3005 1 2 100KOhm T3002 1 CB_MDIO17 B8 H19
AD6 GND MDIO17 RESET CRST#/RESET 31
PCI_AD5 T11 T3003 1 CB_MDIO16 A8 G16
AD5 MDIO16 WAIT# CSERR#/WAIT# 31,41
PCI_AD4 V11 T3004 1 CB_MDIO15 E7 A18
AD4 MDIO15 WP/IOIS16# CCLKRUN#/IOIS16# 31,41
PCI_AD3 W11 SPKRCB PULL DOWN : USE SROM T3005 1 CB_MDIO14 D7 M18
AD3 MDIO14 RDY/IREQ# CINT#/IREQ# 31
PCI_AD2 T12 SD/MS/XDDAT3 B7 F19
AD2 32 SD/MS/XDDAT3 MDIO13 BVD2 CAUDIO/SPKR_IN#/BVD2 31,41
PCI_AD1 V12 G1 CB_UDIO5 1 T3006 SD/MS/XDDAT2 A7 E18
AD1 UDIO5 32 SD/MS/XDDAT2 MDIO12 BVD1 CSTSCHG/STSCHG#/BVD1 31,41
PCI_AD0 W12 SD/MS/XDDAT1 E6 H16
AD0 32 SD/MS/XDDAT1 MDIO11 VS2# CVS2 31
V6 H5 1394_SDA SD/MS/XDDAT0 D6 R16
18,33,38 PCI_PAR PAR UDIO4 1394_SDA 32 32 SD/MS/XDDAT0 MDIO10 VS1# CVS1 31
PCI_C/BE#3 P2 SHIELD GND L.C.A D15
C/BE3# CD2# CCD2# 31
PCI_C/BE#2 W2 H4 1394_SCL 2 1 MDIO09 B6 T14
C/BE2# UDIO3 1394_SCL 32 32 SD/MSCLK_XDRE# MDIO09 CD1# CCD1# 31,41
PCI_C/BE#1 W6 R3006 22Ohm G19
C/BE1# INPACK# CREQ#/INPACK# 31
PCI_C/BE#0 T9 H2 CB_UDIO2 1 T3007 A6
C/BE0# UDIO2 32 SDCMD_MSBS_XDWE# MDIO08
IDSEL_CB P1 IDSEL CB_UDIO1 T3008
UDIO1 H1 1 SHIELD GND R3007 2 0Ohm 1 MDIO07 D5 MDIO07 IORD# P18 AD13/IORD# 31
18,33,38 PCI_C/BE#[3:0]
18,19 PCI_REQ#1 M4 REQ# IOWR# P19 AD15/IOWR# 31
M5 J4 INT_SERIRQ T3009 1 CB_MDIO6 B5
B 18 PCI_GNT#1 GNT# UDIO0/SRIRQ# INT_SERIRQ 19,25,28,38 MDIO06 B
V3 GND 90 ohm
18,19,33,38 PCI_FRAME# FRAME#
V4 T3010 1 CB_MDIO5 A5 V14 CB_USBDP 1 T3011
18,19,33,38 PCI_IRDY# IRDY# MDIO05 USBDP
W4 W14 CB_USBDM 1 T3012
18,19,33,38 PCI_TRDY# TRDY# USBDM
T5 SD/MS/XDPWR B4
18,19,33,38 PCI_DEVSEL# DEVSEL# 32 SD/MS/XDPWR MDIO04
V5 J2 PCI_INTB# +3V
18,19,33,38 PCI_STOP# STOP# INTA# PCI_INTB# 18,19
W5 SDWP_XDR/B# B3
18,19,33,38 PCI_PERR# PERR# 32 SDWP_XDR/B# MDIO03
T6 K4 PCI_INTC# 2 1
18,19,33,38 PCI_SERR# SERR# INTB# PCI_INTC# 18,19 +VCCCB
T3013 1 CB_MDIO2 A3 R3008 100KOhm
CB_GBRST# PCI_INTD# MDIO02
G2 GBRST# INTC# K2 PCI_INTD# 18,19
L4 MSCD# A2 W13
12,18,25,26,33,38 PCI_RST# PCIRST# 32 MSCD# MDIO01 VPPEN1 AVPP1 31

2
5 CLK_CBPCI K1 PCICLK NC1 L2 VPPEN0 V13 AVPP0 31
SDCD# B1 T13 R3009
32 SDCD# MDIO00 VCC3EN# VCC3_EN# 31
L5 RICOH R5C841 : R13 100KOhm
19,33,38 PM_CLKRUN# CLKRUN# VCC5EN# VCC5_EN# 31
G4 /
18,19,25,33,38 PCI_PME# RI_OUT#/PME#

2
INT A#--> CARDBUS
INT B#--> 1394 R3010 CCLKRUN#/IOIS16#

1
INT C#--> CARD READER 100KOhm
1

C3020 C3021 /

L.C.A 5PF/50V 5PF/50V MDIO00--> SD Card Detect

1
/ / L.C.A MDIO01--> MS Card Detect
2

VCC_3V POWER : MDIO02--> XD Card Enable R5C841-CSP208Q GND


PME#, SPKROUT, RI_OUT# MDIO03--> SD Write Protect XD Card Ready/Busy#
GND GND MDIO04--> SD/MS/XD Card Power0 Control
HWSUSP#, GBRST#, IRQn MDIO05--> XD Card Write Protect UDIO03 H : Enable SD
CCD1#, CCD2#, VS1# , VS2# MDIO06--> SD/MSXD LED
MDIO07--> SD/MS External Clock D3000 UDIO04 H : Enable MS
TEST, VCC5EN#, VCC3EN# R5C841-CSP208Q MDIO08--> SD Command/MS Bus State /XD Card Write Enable 1N4148W
A
VPPEN0, VPPEN1, SD/MS I/F CB_HWSUSP#
VPPEN0 H : Enable XD A
MDIO09--> SD/MS Clock /XD Card Read Enable 1 2 CB_SD# 19
MDIO10--> SD/MS/XD Data 0
MDIO11--> SD/MS/XD Data 1
VCCPCI POWER : +3V ==> CB_GBRST# MDIO12--> SD/MS/XD Data 2
PCI BUS PCI_AD17 1 2 IDSEL_CB MDIO13--> SD/MS/XD Data 3 GBRST# POWER SEQ
R3011 100Ohm
1ms < T < 100ms
MDIO14--> XD Data 4 +3V ==> (GBRST#/CB_HWSUSP#) ==>PCIRST#
VCC_SLOT POWER : CB_GBRST# R3012 2 1 100KOhm
MDIO15-->
MDIO16-->
XD Data 5
XD Data 6
Title : RICOH R5C841
+3V
CARD_BUS, MDIO17--> XD Data 7 H/W SUSPEND# POWER SEQ : ASUSTeK COMPUTER INC Engineer: Jack Wang
C3022 2 1 0.1UF/10V MDIO18--> XD Card Command Latch
CAUDIO , CSTSCHG GND SUSPEND : CB_HWSUSP# LO=> PCIRST# LO=> +3VS OFF Size Project Name Rev
MDIO19--> XD Card Address Latch
RESUME : +3VS ON => PCIRST# HI=> CB_HWSUSP# HI Custom A6F 1.0
Date: Monday, March 06, 2006 Sheet 30 of 63
5 4 3 2 1
5 4 3 2 1

+AVCC_PHY_CB

2
U3000C
R3100 CON3701 +VCCCB
0Ohm
r0402 56
30 AD19/A25 A25
30 AD17/A24 55 A24 VCC1 17
1

D 30 CFRAME#/A23 54 A23 VCC2 51 D


CPS D11 E10 +AVCC_PHY_CB CTRDY#/A22 53 +VPPCB
CPS AVCC_PHY_1 +AVCC_PHY_CB 30 CTRDY#/A22 CDEVSEL#/A21 A22
AVCC_PHY_2 E11 30 CDEVSEL#/A21 50 A21
A17 +3V +AVCC_PHY_CB CSTOP#/A20 49 18
AVCC_PHY_3 30 CSTOP#/A20 A20 VPP1
B17 37mA CBLOCK#/A19 48 52
AVCC_PHY_4 30,41 CBLOCK#/A19 A19 VPP2
L3100 47
+AVCC_PHY_CB 30,41 RFU/A18 A18
1 2 30 AD16/A17 46 A17
CCLK/A16 19
30 CCLK/A16 A16

1
D12 TPBIAS0 120Ohm/100Mhz C3101 C3102 C3103 C3104 C3105 CIRDY#/A15 20
TPBIAS0 TPBIAS0 32 30 CIRDY#/A15 A15
CPERR#/A14 14 69
30,41 CPERR#/A14 A14 GND_POWER1
10UF/10V 0.1UF/10V 1000PF/50V0.1UF/10V 1000PF/50V 13 70
30 CPAR/A13 A13 GND_POWER2

2
30 CBE2#/A12 21 A12 GND_POWER3 71
X2_1394 A16 10 72
XI 30 AD12/A11 A11 GND_POWER4
30 AD9/A10 8 A10 GND_POWER5 73
30 AD14/A9 11 A9 GND_POWER6 74
30 CBE1#/A8 12 A8 GND_POWER7 75
A13 TPB0-_1 GND 22 76
TPBN0 TPB0-_1 32 30 AD18/A7 A7 GND_POWER8
30 AD20/A6 23 A6 GND_POWER9 77
X1_1394 B16 B13 TPB0+_1 24 78
XO TPBP0 TPB0+_1 32 30 AD21/A5 A5 GND_POWER10
30 AD22/A4 25 A4 GND_POWER11 79
30 AD23/A3 26 A3 GND_POWER12 80
Layout: SHIELD GND 30 AD24/A2 27 A2 GND_POWER13 81
1

C3106 28 82
TPA0-_1 30 AD25/A1 A1 GND_POWER14
c0402 A12 29 83
TPAN0 TPA0-_1 32 30 AD26/A0 A0 GND_POWER15
0.01UF/16V 41 84
TPA0+_1 30 AD8/D15 D15 GND_POWER16
1394_FIL
2

A14 FIL0 TPAP0 B12 TPA0+_1 32 30,41 RFU/D14 40 D14


+VCCCB +VPPCB 39
30 AD6/D13 D13
30 AD4/D12 38 D12
GND 37 GND
C 1394_REXT B14 30 AD2/D11 D11 C
REXT 30 AD31/D10 66 D10
CINT#/IREQ# 1 T3100 65
30 AD30/D9 D9

2
CSERR#/WAIT# 1 T3101 C3107 C3108 C3109 C3110 64
30 AD28/D8 D8
1

CREQ#/INPACK# 1 T3102 6 85
1394_VREF D13 CAUDIO/SPKR_IN#/BVD2 30 AD7/D7 D7 NP_NC1
R3101 1 T3103 0.1UF/10V 10UF/10V 10UF/10V 0.1UF/10V 5 86
VREF 30 AD5/D6 D6 NP_NC2
10KOhm

1
30 AD3/D5 4 D5
1

r0402_h16 C3100 CSTOP#/A20 1 T3104 3


CDEVSEL#/A21 30 AD1/D4 D4
c0402 1 T3105 2
CTRDY#/A22 30 AD0/D3 D3
0.01UF/16V E12 T3106
2

NC9 1 30,41 RFU/D2 32 D2


CIRDY#/A15 T3107
2

1 30 AD29/D1 31 D1
GND GND 30
CSTSCHG/STSCHG#/BVD1 30 AD27/D0 D0
1 T3108 GND 44
CBLOCK#/A19 30 AD13/IORD# IORD#
GND 1 T3109 45
CPERR#/A14 30 AD15/IOWR# IOWR#
1 T3110 9
CCLKRUN#/IOIS16# 30 AD11/OE# OE#
1 T3111 15
30 CGNT#/WE# WE#
30 AD10/CE2# 42 CE2# P_GND1 87
30 CBE0#/CE1# 7 CE1# P_GND2 88
30 CBE3#/REG# 61 REG# P_GND3 89
T3112 58 90
TPBIAS1 30 CRST#/RESET RESET P_GND4
D10 1 CSERR#/WAIT# 59
TPBIAS1
PCMCIA CCD1# CCD2#
L L 16bit
30,41 CSERR#/WAIT#
30,41 CCLKRUN#/IOIS16#
30 CINT#/IREQ#
CCLKRUN#/IOIS16#
CINT#/IREQ#
33
16
WAIT#
WP
READY
SOCKET OTHER 32bit 30,41 CAUDIO/SPKR_IN#/BVD2
30,41 CSTSCHG/STSCHG#/BVD1
CAUDIO/SPKR_IN#/BVD2
CSTSCHG/STSCHG#/BVD1
62
63
BVD2
BVD1
30 CVS2 57 VS2#
30 CVS1 43 VS1# GND1 1
TPBN1 A11 30 CCD2# 67 CD2# GND2 34
30,41 CCD1# 36 CD1# GND3 35
B11 CREQ#/INPACK# 60 68
B TPBP1 30 CREQ#/INPACK# INPACK# GND4 B

1
C3111 C3112 PCMCIA_CON_84P
GND c0402 c0402
270PF/50V 270PF/50V GND
TPA1-_1 T3113

2
TPAN1 A10 1
TPA1+_1
12G161400684
B10 1 T3114
TPAP1 GNDGND Top side connector pin define
Q3100
2N7002

VCC5EN#
S 2

30 VCC5_EN# 2 3 1 2 +3V
3

R3102
G
1

10KOhm
D3100 +5V CCLK/A16
1

F01J4L

1
2 1 C3113
41 CBDEBUGEN#
5PF/50V
/

2
R3103 +VCCCB C3114 C3115

2
10KOhm / c0402
1 2 VCC3EN# U3100 10UF/10V 0.1UF/10V
30 VCC3_EN#
c0805_h57 GND

1
1 VCC5_EN GND 16
2 VCC3_EN VCC5IN2 15
AVPP0 3 14 +3V
30 AVPP0 AVPP1 EN0 VCCOUT3
4 13 GND
30 AVPP1 EN1 VCC5IN1
R5C841-CSP208Q 5 12
FLG VCCOUT2
A 1205 6 NC1 VCC3IN 11 A
X3100 7 10
NC2 NC3 1

2
X2_1394 1 2 X1_1394 8 9 C3116 C3117
+VPPCB VPPOUT VCCOUT1 / c0402
1

24.576Mhz R5531V002 10UF/10V 0.1UF/10V


2

C3118 C3119 C3120 c0805_h57


2

1
2

20PF/50V 20PF/50V C3121 C3122


0.1UF/10V c0402 c0402 Title :CARDBUS SOCKET
2

0.1UF/10V 0.1UF/10V GND


1

Engineer: Jack Wang


1

ASUSTeK COMPUTER INC


GND GND
GND Size Project Name Rev
GND A3 A6F 1.0
Date: Monday, March 06, 2006 Sheet 31 of 63
5 4 3 2 1
5 4 3 2 1

2 1 1 2
R3201 56Ohm C3201 0.33UF/16V
CON5 1%
2 1 1 2
5 IEEE_1394 C3200 0.01UF/25V
P_GND2 P_GND1 R3202 56Ohm c0402
1% GND
D 1 LTPB0- D
1 LTPB0+ TPBIAS0 31
2 L3200
2 LTPA0- LTPA0+ 4
3 3 5 TPA0+_1 31
4 LTPA0+
4 LTPA0- 3 6 TPA0-_1 31
Choke
LTPB0- 2
Common
7 +3V
TPB0-_1 31
LTPB0+ 1
6

8 TPB0+_1 31

2
R3203 56Ohm1% C3203
2 1 1 2 C3202 c0402 R3204 R3205
Swap 060105 270PF/50V U3200 0.1UF/10V 10KOhm 10KOhm
R3206 TPB_R c0402 r0402 r0402

1
1 A0 VCC 8
2 1 2 1 2 A1 WP 7
GND

1
3 A2 SCL 6 1394_SCL 30
56Ohm 1% R3207 4 5
GND SDA 1394_SDA 30
5.11KOhm
r0402_h16 GND AT24C02N
GND GND

1. Close to R5C841
2. The area is as compact as possible,length < 10 mm
3. TPA Pair and TPB pair mismatch < 2.5mm
4. No via recommend , maxmium is one.
5. Total length < 50 mm
C
6. Differential impedance is 110+/- 6 ohm C

7. TPA Pair trace or TPB pair trace mismatch < 1.25mm

SDCD# +3V
30 SDCD#
SDWP_XDR/B#
30 SDWP_XDR/B#
MSCD#
30 MSCD#

2
2

R3208
2

2
R3210 R3200 C3206 C3207 C3208 10KOhm 2
S
270PF/50V 270PF/50V 270PF/50V r0402
10KOhm 10KOhm / / / Soft start Q3201
/ / MC_VCC_G 11 +MC_VCC
1

1
G SI2301BDS_T1_E3
1

3 D

3
3
+MC_VCC D

3
Q3200
+3V

2
GND
30 SD/MS/XDPWR 11 2N7002
SWP1
GND2

GND1

2
SCD1

G C3204 C3205 R3209


2 S c0402 c0402 150KOhm
+MC_VCC CON19 GND GND +MC_VCC 0.1UF/10V 0.1UF/10V r0402

1
GND2
SD_WP_PROTECT

SD_CD_DETECT
GND1

B B

1
NP_NC1 1
SD/DAT1 S8 M1
SD/MS/XDDAT0 SD_DAT1 MS_VSS1 SDCMD_MSBS_XDWE# GND
30 SD/MS/XDDAT0 S7 SD_DAT0 MS_BS M2 SDCMD_MSBS_XDWE# 30
S6 M3 SD/MS/XDDAT1 GND GND
SD/MSCLK_XDRE# SD_VSS1 MS_VCC1 SD/MS/XDDAT0 SD/MS/XDDAT1 30
S5 SD_CLK MS_SDIO M4
S4 M5 SD/MS/XDDAT2 Layout Note:
SD_VCC MS_RESERVED1 MSCD# SD/MS/XDDAT2 30
S3 M6
SDCMD_MSBS_XDWE# S2
SD_VSS2 MS_INS
M7 SD/MS/XDDAT3 Place close to card reader socket
SD/MS/XDDAT3 SD_CMD MS_RESERVED2 SD/MSCLK_XDRE#
30 SD/MS/XDDAT3 S1 SD_DAT3 MS_SCLK M8 SD/MSCLK_XDRE# 30
SD/DAT2 S9 M9 R3212
SD_DAT2 MS_VCC2
MS_VSS2 M10 1 0Ohm 2
NP_NC2 2 Q3202

SD_CARD_19P 2N7002
GND GND /
SD/MS/XDDAT1 3 2 SD/DAT1

2 S
D
Layout: SHIELD GND

G
1 1
R3213 1 0Ohm 2

2N7002
/ Q3203
SD/MS/XDDAT2 3 2 SD/DAT2

2 S
D
3

G
1 R3211 2 10KOhm SD_CD

1 1
+12V

3
/ 3
D
A A
Q3204
SDCD# 11 2N7002
G /
2 S

2 Title : 1394 & 3 IN 1 CON


GND
FOR SD short Engineer: Jack Wang
ASUSTeK COMPUTER INC
Size Project Name Rev
A3 A6F 1.0
Date: Monday, March 06, 2006 Sheet 32 of 63
5 4 3 2 1
5 4 3 2 1

+3VSUS

PCI_AD[0..31] 18,30,38

1
R3300
+3VSUS_LAN
3.6KOhm
U3300
EECS

2
1 CS VCC 8
EESK 2 7 PCI_C/BE#0
SK DC 18,30,38 PCI_C/BE#0

1
EEDI/AUX 3 6 C3300
EEDO DI ORG PCI_C/BE#1
4 DO GND 5 PCI_C/BE#1 18,30,38
D 0.1UF/10V +3VSUS_LAN D
PCI_PAR 18,30,38

2
AT93C46 PCI_SERR# 18,19,30,38

PCI_AD10
PCI_AD11
PCI_AD12

PCI_AD13
PCI_AD14

PCI_AD15
PCI_PERR# 18,19,30,38

PCI_AD2

PCI_AD3
PCI_AD4
PCI_AD5

PCI_AD7

PCI_AD8
PCI_AD9
PCI_AD6
PCI_STOP# 18,19,30,38
GND GND
PCI_DEVSEL# 18,19,30,38
PCI_TRDY# 18,19,30,38

*All termination resistors CLKRUN 2 R3312 10Ohm PM_CLKRUN# 19,30,38


/
should be near chip
C3301 2 1 0.01UF/50V 2 1 L_TRDM0
R3301 2 1 49.9Ohm L_TRDP0
R3302 49.9Ohm

102
101
100
C3302 1 0.01UF/50V L_TRDM1 U3301

99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
2 2 1
R3303 2 1 49.9Ohm L_TRDP1 RTL8110SBL GND
R3304 49.9Ohm

PCIAD2
VSSPST6
GND7
VDD12_6
PCIAD3
PCIAD4
PCIAD5
PCIAD6
VDD33_5
PCIAD7
CBEB0
VSSPST5
PCIAD8
PCIAD9
M66EN
PCIAD10
PCIAD11
PCIAD12
VDD33_4
PCIAD13
PCIAD14
VSSPST4
GND6
PCIAD15
VDD12_5
CBEB1
PAR
SERRB
NC1
GND5
NC0
VDD33_3
PERRB
STOPB
DEVSELB
TRDYB
VSSPST3
CLKRUNB
C3303 2 1 0.01UF/50V 2 1 L_TRDM2
R3305 2 1 49.9Ohm L_TRDP2
R3306 49.9Ohm PCI_AD1 103 64
C3304 PCIAD1 VDD12_4
2 1 0.01UF/50V 2 1 L_TRDM3 PCI_AD0 104 PCIAD0 IRDYB 63 PCI_IRDY# 18,19,30,38
R3307 2 1 49.9Ohm L_TRDP3 105 62
R3308 49.9Ohm EECS LANWAKE GND4
106 EECS FRAMEB 61 PCI_FRAME# 18,19,30,38
107 60 PCI_C/BE#2
VDD33_6 CBEB2 PCI_C/BE#2 18,30,38
EEDO 108 59 PCI_AD16
EEDI/AUX EEDO PCIAD16 PCI_AD17
GND 109 EEDI PCIAD17 58
110 57 PCI_AD18
VDD12 EESK VDD12_7 PCIAD18
111 EESK VDD33_2 56
112 55 PCI_AD19
GND8 PCIAD19
113 LED3 VDD12_3 54
114 53 PCI_AD20
LED2 PCIAD20
115 LED1 GND3 52
116 VDD12_8 VSSPST2 51
117 50 PCI_AD21
AVDDH LED0 PCIAD21 PCI_AD22
118 GND9 PCIAD22 49
119 VSSPST7 GND2 48
120 47 PCI_AD23
XTAL1 AVDDH2 PCIAD23 PCI_AD23
121 XTAL1 IDSEL 46 2 1
The Crystal should be placed XTAL2 122 45 R3311 33Ohm
XTAL2 VDD12_2 PCI_C/BE#3
123 44 PCI_C/BE#3 18,30,38
C far away from I/O ports, 124
VSS4 CBEB3
43 PCI_AD24 C
CTRL12 VSS5 PCIAD24 PCI_AD25
important or high frequency 125 CTRL12 PCIAD25 42
R3309 126 41
signal traces (Tx, Rx,power), LAN_RSET VDD12_9 VDD33_1 PCI_AD26
1 2 127 RSET PCIAD26 40

ISOLATEB
128 39 PCI_AD27

VSSPST0

VSSPST1
magnetics or board edges.

VDD12_0

VDD33_0
PCIRSTB

VDD12_1
PCIAD31
PCIAD30

PCIAD29
PCIAD28
VSS6 PCIAD27

AVDDH0

AVDDH1
AVDDL0

AVDDL1

AVDDL2

AVDDL3
CTRL25
2.49KOhm

PCICLK
129 GND

MDI0+

MDI1+

MDI2+

MDI3+

INTAB

REQB
PMEB
GND0

GNTB

GND1
MDI0-

MDI1-

MDI2-

MDI3-
VSS0

VSS1

VSS2

VSS3
R3310

VSS
X3300 GND 1 2
XTAL1 1 2 XTAL2
L3300 / 5.6KOhm

10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
25Mhz VDD12

1
2
3
4
5
6
7
8
9
1 2
GND
1

C3305 C3306 120Ohm/100Mhz


C3307 C3308
22PF/25V 22PF/25V 10UF/10V 0.1UF/10V
2

AVDDL
GND
L_TRDM0
34 L_TRDM0
GND 34 L_TRDP0
L_TRDP0
GND L_TRDM1
34 L_TRDM1 +3VSUS_LAN
GND L_TRDP1
34 L_TRDP1 VDD12
CTRL25
L_TRDM2

PCI_AD31
PCI_AD30

PCI_AD29
PCI_AD28
34 L_TRDM2
L_TRDP2
34 L_TRDP2
L_TRDM3
34 L_TRDM3
L_TRDP3
34 L_TRDP3

ISOLATEB
21,25,36,37,39,60,61 SUSB#

PCI_PME#
18,19 PCI_INTA# PCI_PME# 18,19,25,30,38
12,18,25,26,30,38 PCI_RST# PCI_REQ#2 18,19
5 CLK_LAN_PCI PCI_GNT#2 18

CTRL12

B +3VSUS_LAN VDD12 B

1 B
R3313 20 mil L3303
1 2 1 2

3
E

C
2

1
+3VSUS +3VSUS_LAN 0Ohm C3321 C3322 120Ohm/100Mhz
Q3301

1
AVDDH C3323 C3324 C3325
C3319 C3320 2SB1188 10UF/10V0.1UF/10V
10UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V

2
L3301 L3302

2
30 mil 30 mil
1 2 1 2 GND GND
GND GND GND
120Ohm/100Mhz 120Ohm/100Mhz
1

GND
C3309 C3310 C3311 C3312 C3313 C3314 C3315 C3316 C3317 C3318
0.1UF/10V 10UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V
2

GND GND GND


CTRL25
+3VSUS_LAN
1 B AVDDL

20 mil L3304
1 2
3
E

C
2

120Ohm/100Mhz
Q3302
1

1
C3326 C3327 C3328 C3329 C3330 C3331 C3332
2SB1188
10UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V
2

2
GND GND GND GND GND GND GND
A A

Title : RTL8110SBL
ASUSTeK COMPUTER INC Engineer: Jack Wang
Size Project Name Rev
A2 A6F 1.0
Date: Monday, March 06, 2006 Sheet 33 of 63
5 4 3 2 1
5 4 3 2 1

+2.5V_LAN

2
R3400
1
TCT1 1
L3400
24 MCT1L_CMT0
12G17100002E
LAN PORT
0Ohm
CON21 L3401 CON22
TD1+ 2 23 MX1+1219
L_TRLM1 4 1KOhm/100Mhz 1 17
33 L_TRDM1 SIDE2 RJ11_RING_CON 1 SIDE1
2 1 2 RJ11_RING 2 15
2 RJ11_TIP_CON 2 P_GND1
1 1 1 2 RJ11_TIP 3 3 NP_NC1 13
TD1- 3 3 4
33 L_TRDP1 SIDE1 LTRLP0 4
22 MX1-L_TRLP1 L3402 5 5

1
D 21 MCT2L_CMT1 1KOhm/100Mhz C3406 LTRLM0 6 D
TCT2 4 WTOB_CON_2P LTRLP1 6
7 7
1000PF/3KV LTRLP2 8
c1808_inverter LTRLM2 8

2
9 9

1
TD2+ 5 20 MX2+L_TRLM0 C3407 LTRLM1 10 14
33 L_TRDM0 LTRLP3 10 NP_NC2
GND 11 16
1000PF/3KV LTRLM3 11 P_GND2
12 12 SIDE2 18
TD2- 6 c1808_inverter

2
33 L_TRDP0
19 MX2-L_TRLP0
18 MCT3L_CMT2 MODULAR_JACK_12P
TCT3 7 GND 12G142111120
060104
TD3+ 8 17 MX3+L_TRLP2
33 L_TRDP2

TD3- 9
33 L_TRDM2
16 MX3-L_TRLM2
15 MCT4L_CMT3
12-142313122
TCT4 10

P8 P2P1 P14 P9
TD4+ 11 14 MX4+L_TRLP3 P16 P7 P15
33 L_TRDP3

TD4- 12
33 L_TRDM3 AVDDL +2.5V_LAN
13 MX4-L_TRLM3 RJ 45 & RJ 11
1GB
BOTTOM VIEW
2 R3414 10Ohm
C C

RDC
LAN
1

R3403
C3400
0.01UF/25V
C3401
0.01UF/25V
C3402
0.01UF/25V
C3403
0.01UF/25V PORT 2

0Ohm
1
2

L_TRLM1 LTRLM1

1
GND L3403

L_TRLP1 180OHM/100MHz LTRLP1


N/A

4
R3404
2 1
L_CMT0 1 2 RN3401A R3405 0Ohm
75Ohm
2 1
L_CMT1 3 4 RN3401B
75Ohm
0Ohm
L_CMT2 5 6 RN3401C L_TRLM0 LTRLM0
75Ohm

1
L_CMT3 7 8 RN3401D L3404
75Ohm
2 R3415 10Ohm 180OHM/100MHz
1

B L_TRLP0 LTRLP0 B
C3404 C3405
N/A
2 R3416 10Ohm c0402 1000PF/2KV

4
0.1UF/10V R3406
2

2 1

GND_LAN GND_LAN 0Ohm

GND GND_LAN R3407


2 1

0Ohm

L_TRLP2 LTRLP2
Change 1228

1
L3405

MDC Conn L_TRLM2 180OHM/100MHz LTRLM2


N/A

4
R3408
2 1

R3402 1 0Ohm 2 / R3409 0Ohm


+3V_MDC +3VSUS
2 1
CON20 R3401 1 0Ohm
13
15
17
19

2 +3V
GND BTOB_CON_12P 0Ohm
1

C3408 L_TRLM3 LTRLM3


GND1
GND3
GND5
NP_NC2 NP_NC1

1
1 1 2 2
3 4 0.1UF/10V L3406
17 ACZ_SDOUT_MDC 3 4
2

A 5 5 6 6 180OHM/100MHz A
R3411 7 8 L_TRLP3 LTRLP3
17 ACZ_SYNC_MDC 7 8 N/A
1 39Ohm 2 MDC_SDIN GND
3

4
17 ACZ_SDIN1 9 9 10 10
GND2
GND4
GND6

11 12 R3410
17 ACZ_RST#_MDC 11 12 ACZ_BCLK_MDC 17
2 1
1

C3409 / 0Ohm
Title : RJ11/45 & MDC
14
16
18
20

22PF/50V
2

12.26 swap1229
ASUSTeK COMPUTER INC Engineer: Jack Wang
GND Size Project Name Rev
12G161200120
GND A3 A6F 1.0
Date: Monday, March 06, 2006 Sheet 34 of 63
5 4 3 2 1
5 4 3 2 1

L3501 N/A
90Ohm/100Mhz LP0-_B +5V_USB_01 9 11
18 USB_PN0_B
L3502

3
80Ohm/100Mhz GND CON24
GND3 GND5
1 2 +5V_USB_01_0 1
LP0-_B VCC1
2

12G131111087
1P-

1
LP0+_B

USB_CON_2X4P
C3501 3
LP0+_B 0.1UF/10V 1P+

2
18 USB_PP0_B 4 GND1
c0402

1
2 RN3500A +5V_USB_01_1

2
1 0OHM 5 VCC2
D 3 4 RN3500B D3501 D3502 LP1-_B 6 D
0OHM LP1+_B 0P-
/ / L3503 GND 7
80Ohm/100Mhz 0P+
ESD Guard 8 GND2
Close to USB Port 1 2
GND4 GND6

1
+ C3502

2
CE3501 0.1UF/10V GND 10 12
c0402
GND 100UF/6.3V

2
L3504 N/A GND

2
90Ohm/100Mhz LP1-_B GND
18 USB_PN1_B
GND
4

3
+5V_USB_2 GND
L3505 CON23
80Ohm/100Mhz
LP1+_B +5V_USB_2_L
1

18 USB_PP1_B 1 2 9 11

1
+ C3500
GND3 GND5
1 0OHM 2 RN3501A D3503 D3504 CE3502 0.1UF/10V 1 VCC1
3 4 RN3501B / / c0402 LP2-_B 2
0OHM 100UF/6.3V 1P-

12G131111087
LP2+_B

USB_CON_2X4P
2
3 1P+
ESD Guard

2
GND 4 GND1
GND
Close to USB Port GND
2

2
C
5 VCC2 C
LP3-_B 6
+5V_USB_2 LP3+_B 0P-
7 0P+
GND L3500 8
GND GND2
L3506 N/A 80Ohm/100Mhz
90Ohm/100Mhz LP2-_B +5V_USB_3_L GND4 GND6
18 USB_PN2_B 1 2
4

1
+ C3503 10 12
CE3500 0.1UF/10V
11/29 c0402
100UF/6.3V GND

2
LP2+_B
1

2
18 USB_PP2_B
GND
1

GND
1 0OHM 2 RN3502A D3505 D3506
3 0OHM 4 RN3502B / /

ESD Guard
+5VO
Close to USB Port U3501
2

1 8 +5V_USB_01
GND GND OUT_1
+5V 2 IN_1 OUT_2 7

1
GND 3 6
L3507 N/A R3519 IN_2 OUT_3
4 EN#/EN FLG 5 1 R3521 2 1KOhm USB_OC_0# 18

1
90Ohm/100Mhz LP3-_B C3504
18 USB_PN3_B
B 100KOHM G528P1UF 0.1UF/10V B
4

c0402
USB_DISEN
2

2
3

3
D
LP3+_B GND
1

18 USB_PP3_B
Q3501
1

11 U3502
+3V 2N7002 +5V_USB_2
1 0OHM 2 RN3503A D3500 D3507 G
GND 1 GND OUT_1 8 4/12
2 S
1

3 0OHM 4 RN3503B / /
+5V 2 IN_1 OUT_2 7
R3520
2

3 IN_2 OUT_3 6
ESD Guard 1MOhm 4 EN#/EN FLG 5 1 R3522 2 1KOhm USB_OC_1# 18

1
C3505
Close to USB Port G528P1UF 0.1UF/10V
2

c0402
2

2
swap1229 GND GND GND
4/12
GND

Jack 12/12

A A

Title : USB CONN X 4


ASUSTeK COMPUTER INC Engineer: Jack Wang
Size Project Name Rev
Custom A6F 1.0
Date: Monday, March 06, 2006 Sheet 35 of 63
5 4 3 2 1
5 4 3 2 1

+12V +5V +3V +1.8V

1
R3600 R3601 R3602 R3603
2.2KOhm 330Ohm 330Ohm 330Ohm
r0402_h16
D D

2
+12V_R +5V_R +3V_R +1.8V_R

3
3 3 3 3
+5VSUS D D D D
Q3600 Q3601 Q3602 Q3603
2N7002 2N7002 2N7002 2N7002
11 11 11 11

1
G G G G
R3604 2 S 2 S 2 S 2 S
10KOhm

2
r0402
GND GND GND GND
SUSC_DIS

2
3
3
D
Q3604
2N7002
26,39,61 SUSC# 11
G +12VS +5VS +3VS +2.5VS +1.5VS +0.9VS
C 2 S C
2

1
R3605 R3606 R3607 R3608 R3609 R3610
GND 2.2KOhm 330Ohm 330Ohm 330Ohm 330Ohm 330Ohm
r0402_h16

2
+12VS_R +5VS_R +3VS_R +2.5VS_R +1.5VS_R +0.9VS_R

3
3 3 3 3 3 3
+5VSUS D D D D D D
Q3605 Q3606 Q3607 Q3608 Q3609 Q3610
2N7002 2N7002 2N7002 2N7002 2N7002 2N7002
11 11 11 11 11 11
1

G G G G G G
R3611 2 S 2 S 2 S 2 S 2 S 2 S
10KOhm
2

2
r0402
GND GND GND GND GND GND
SUSB_DIS
2

B B
3

3
D
Q3611
2N7002
21,25,33,37,39,60,61 SUSB# 11
G
2 S
2

+3VS_LCD

GND

1
R3612
330Ohm
/
2

+3VS_LCD_R
3

3
D
A Q3612 A
2N7002
SUSB_DIS 11 /
G
2 S
Title : Discharge Circuit
Engineer: Jack Wang
2

ASUSTeK COMPUTER INC


GND Size Project Name Rev
A4 A6F 1.0
Date: Monday, March 06, 2006 Sheet 36 of 63
5 4 3 2 1
5 4 3 2 1

+5VSUS
CON25
PWR_LED#_R SCRL_LED# NUM_LED# 22
Q3701A Q3701B GND2
+5VS 20 20

3
UM6K1N UM6K1N 802_LED_EN#_R 19 19

1
R3702 18
+5VSUS EMAIL_LED#_R 18
R3721 470Ohm 2 5 17
28 SCRL_LED 28 NUM_LED CHG_LED#_R 17
100KOhm r0402_h16 16
+5VS r0402 16

4
+5VLCM 15 15
PWR_LED#_R2 PWR_LED#_R

2
14 14
R3703 LED3701 GREEN Q3702A GND DJPLAY#

2
28 KSI3 13 13

6
D 1 680Ohm 2 IDE 1 + 2 IDE_LED# UM6K1N
28 KSI5
DJSTOP# 12 12 D
r0402 07G015700021 CAP_LED# DJFWARD# 11
28 KSI2 DJBWARD# 11
2 Q3702B 10
28 KSI4 10

3
Q3703A UM6K1N DJ_SCAN 9 9

6
R3704 LED3702 GREEN UM6K1N DJ_LED_R

1
8 8
1 680Ohm 2 NUM 1 + 2 NUM_LED#
28 CAP_LED 5 28 DJ_SW#
DJ_SW# 7 7
r0402 07G015700021 2 6
28 PWR_LED_UP# 6

4
5 5

1
4 4
R3705 LED3703 GREEN TPAD_DAT 3
28 TPAD_DAT 3
1 680Ohm 2 CAP 1 + 2 CAP_LED#
28 TPAD_CLK
TPAD_CLK 2 2
r0402 07G015700021 1
RN3701A +5VS_TPL 1
+V5S_TP 1 2 GND1 21
1 2

1
R3706 LED3704 GREEN 80Ohm/100Mhz C3700
1 680Ohm 2 SCRL 1 + 2 SCRL_LED# L3701 / c0402 GND FPC_20P
r0402 07G015700021 100KOhm 1 2 0.1UF/10V GND
+5VS
RN3701D

2
7 8 80Ohm/100Mhz
+5VSUS +5VSUS L3700 GND
100KOhm

D3700 Q3704 /
A6 Touch Pad 021306

1
IDE_PDASP# 2 1 IDE_LED# +5VSUS MMBT2907ALT1G
27 IDE_PDASP#

3
R3707 07G003031320
1N4148W 680Ohm

C
3

E
2
+V5S_TP +5VSUS
sod123 RN3701B r0402
100KOhm

5
2

1 B
C DJ_LED_PWR R3708 C

6
RN3701C R3709

4
1 2
Q3705A 100KOhm ML_LEDR 1 2 EMAIL_LED#_R
DJ_LED 2 UM6K1N TP_PWR_B
1KOhm 2.7KOhm

2
r0402 /

6
Q3705B Q3706A R3710
5 UM6K1N DJ_LED_R ML_LED 2 UM6K1N
28 DJ_LED# 2.2KOhm
19 802_LED_EN# /

3
4

1
Q3706B

1
Q3710B Q3710A 5 UM6K1N
28 EMAIL_LED#
3

UM6K1N UM6K1N GND TP_PWR_BR

3
/ / 3

4
+5VLCM D
5 2 Q3707
/
38 802_LINKLED 802_ACTLED 38
2N7002
11
4

21,25,33,36,39,60,61 SUSB#
1

R3712 G
R3711 CHG_LEDR 1 2 CHG_LED#_R 2 S
100KOhm

2
6

+3VA r0402 1KOhm


Q3708A r0402
CHG_LED 2 UM6K1N GND
2
1

Q3708B
3

R3700 UM6K1N
1

100KOhm +3VSUS +5V


r0402 5
28 CHG_LED_UP#
R3713

1
WL_LEDR 1 2 802_LED_EN#_R
2

B EC_RST_SW# B
R3714 R3715
EC_RST_SW# 28
100KOhm 100KOhm 1KOhm

6
SW3701 r0402 r0402 r0402
1 2 Q3709A
1 2 +5VS

WL_LED#
WL_LED 2 UM6K1N

2
3 3 4 4

3
D3701

1
5 5
1 Q3709B
19 802_LED_EN#

1
UM6K1N

1
3 5

G
TACT_SWITCH_5P 2
19 BT_LED_EN#
GND 12G091030050 GND DJ_SCAN

2 S

3
28 KSO1 2 3

D
RB717F
+3VA Q3700
2N7002
2

R3722
10KOhm
r0402
R3716 R3717 R3718 R3719 R3720
1

100Ohm R3723 100Ohm 100Ohm 100Ohm 100Ohm


1 2 2 1 INTERNET# EMAIL# DISTP# MARATHON#
PWRSW#_EC 281 2 INTERNET# 28 1 2 EMAIL# 28 1 2 DISTP# 28 1 2 MARATHON# 28
r0402_h16 r0402_h16 r0402_h16 r0402_h16 r0402_h16
10KOhm
PWRSW#_R r0402 INTERNET#_R EMAIL#_R DISTP#_R MARATHON#_R
1

A
C3701 A
SW3702 SW3703 SW3700 SW3704 SW3705
1 2 0.01UF/16V 1 2 1 2 1 2 1 2
1 2 1 2 1 2 1 2 1 2
2

3 3 4 4 3 3 4 4 3 3 4 4 3 3 4 4 3 3 4 4
5 5 5 5 5 5 5 5 5 5
GND

TACT_SWITCH_5P TACT_SWITCH_5P TACT_SWITCH_5P TACT_SWITCH_5P TACT_SWITCH_5P


Title :LED/SW/TouchPad
GND 12G091030050 GND GND 12G091030050 GND GND 12G091030050 GND GND 12G091030050 GND GND 12G091030050 GND Engineer: Jack Wang
ASUSTeK COMPUTER INC
Size Project Name Rev
A3 A6F 1.1
Date: Monday, March 06, 2006 Sheet 37 of 63
5 4 3 2 1
5 4 3 2 1

+3VS +3VS

125
126
CON26 GND
18,30,33 PCI_AD[0..31]
1 2

SIDE1
SIDE2
TIP RING
3 LAN_RESERV1 LAN_RESERV2 4
5 LAN_RESERV3 LAN_RESERV5 6
D 7 8 D
17,25,28,41 LPC_AD0 LAN_RESERV4 LAN_RESERV7 LPC_AD1 17,25,28,41
17,25,28,41 LPC_AD2 9 LAN_RESERV6 LAN_RESERV10 10 LPC_AD3 17,25,28,41
37 802_LINKLED 11 LAN_RESERV8 LAN_RESERV12 12 802_ACTLED 37
MPCI_WL_N/F# 13 14
MPCI_WL_N/F# LAN_RESERV9 LAN_RESERV13
15 LAN_RESERV11 LAN_RESERV14 16 LPC_FRAME# 17,25,28,41
18,19 PCI_INTF# 17 INTB# 5V_1 18 +5VS
C3801 19 20
3.3V_7 INTA# PCI_INTE# 18,19
GND 1 2 10PF/50V 21 RESERVED9 RESERVED3 22
c0402 / 23 24
GROUND15 3.3VAUX1 +3V
5 CLK_MINIPCI_D 25 CLK RST# 26 PCI_RST# 12,18,25,26,30,33
27 GROUND4 3.3V_3 28
18,19 PCI_REQ#3 29 REQ# GNT# 30 PCI_GNT#3 18
31 3.3V_4 GROUND7 32
PCI_AD31 33 34
PCI_AD29 AD[31] PME# PCI_PME# 18,19,25,30,33
35 36 BT_CHCLK
AD[29] RESERVED6 PCI_AD30 BT_CHCLK 26
37 GROUND8 AD[30] 38
PCI_AD27 39 40
PCI_AD25 AD[27] 3.3V_5 PCI_AD28
41 AD[25] AD[28] 42
BT_DATA 43 44 PCI_AD26
26 BT_DATA RESERVED8 AD[26] PCI_AD24
18,30,33 PCI_C/BE#3 45 C/BE[3]# AD[24] 46
C PCI_AD23 47 48 IDSEL 1 2 PCI_AD19 C
AD[23] IDSEL R3801 33Ohm
49 GROUND11 GROUND9 50
PCI_AD21 51 52 PCI_AD22
PCI_AD19 AD[21] AD[22] PCI_AD20
53 AD[19] AD[20] 54
55 56 +3VS
PCI_AD17 GROUND13 PAR PCI_AD18 PCI_PAR 18,30,33
57 AD[17] AD[18] 58
59 60 PCI_AD16
18,30,33 PCI_C/BE#2 C/BE[2]# AD[16]
18,19,30,33 PCI_IRDY# 61 IRDY# GROUND10 62
63 3.3V_8 FRAME# 64 PCI_FRAME# 18,19,30,33

2
65 66 C3802 C3803 C3805
19,30,33 PM_CLKRUN# CLKRUN# TRDY# PCI_TRDY# 18,19,30,33
67 68 10UF/10V 0.1UF/10V 0.1UF/10V
18,19,30,33 PCI_SERR# SERR# STOP# PCI_STOP# 18,19,30,33
69 70 c0805_h57 c0402 c0402
GROUND14 3.3V_6

1
18,19,30,33 PCI_PERR# 71 PERR# DEVSEL# 72 PCI_DEVSEL# 18,19,30,33
18,30,33 PCI_C/BE#1 73 C/BE[1]# GROUND12 74
PCI_AD14 75 76 PCI_AD15
AD[14] AD[15] PCI_AD13 +3VS
77 GROUND16 AD[13] 78
PCI_AD12 79 80 PCI_AD11 GND
PCI_AD10 AD[12] AD[11]
81 AD[10] GROUND1 82
83 84 PCI_AD9
PCI_AD8 GROUND2 AD[09]
85 AD[08] C/BE[0]# 86 PCI_C/BE#0 18,30,33

1
B PCI_AD7 87 88 C3806 C3800 C3808 B
AD[07] 3.3V_1 PCI_AD6 c0402 c0402 c0402
89 3.3V_2 AD[06] 90
PCI_AD5 91 92 PCI_AD4 0.01UF/16V 0.01UF/16V 0.01UF/16V
AD[05] AD[04] PCI_AD2

2
93 RESERVED4 AD[02] 94
PCI_AD3 95 96 PCI_AD0
AD[03] AD[00]
+5VS 97 5V_2 RESERVED1 98
PCI_AD1 99 100 +3VS
AD[01] RESERVED2 INT_SERIRQ 19,25,28,30
101 102 GND
GROUND6 GROUND3
103 AC_SYNC M66EN 104

1
+3VS 105 106 +
AC_SDATA_IN AC_SDATA_OUT CE3800
107 AC_BIT_CLK AC_CODEC_ID0# 108
109 AC_CODEC_ID1# AC_RESET# 110 100uF/6.3V
1

111 MOD_AUDIO_MON RESERVED5 112 /


R3800

2
113 AUDIO_GND2 GROUND5 114
10KOhm 115 116
r0402 S_AUDIO_OUT S_AUDIO_IN GND
117 S_AUDIO_OGND S_AUDIO_I GND 118
119 120
127 POST1
128 POST2

MPCI_WL_N/F# AUDIO_GND1 AUDIO_GND


2

121 RESERVED7 MCPIACT# 122


123 VCC5A 3.3VAUX2 124 +3V
3

3
D
A MINI_PCI_124P A
Q3800 H:6mm
11 2N7002 GND GND
12,19,26 WLAN_ON#
G
2 S
Title : MINIPCI ( 802.11 )
Engineer: Jack Wang
2

ASUSTeK COMPUTER INC


Size Project Name Rev
GND A4 A6F 1.0
Date: Monday, March 06, 2006 Sheet 38 of 63
5 4 3 2 1
5 4 3 2 1

R3901
28 SUSC_EC# 1 2 SUSC# 26,36,61
0Ohm
r0402
D D

R3900
28 SUSB_EC# 1 2 SUSB# 21,25,33,36,37,60,61
0Ohm
r0402

+3VA1

+3VSUS
R3902
10KOhm

1
r0402
C +3VS R3903 C
100KOhm
2

VSUS_GD# 28
3

3
D

2
IMVPOK# 28
Q3900 R3904

3
51,60 3V_5V_PWRGD 11 100KOhm 3
D
G 2N7002 r0402 Q3901
2 S 2N7002
11
2

2
50,60 VRM_PWRGD
G
2 S
Reserve for

1
C3900 /

2
0.22UF/10V
99ms delay

2
R3905
VRM_PWRGD 2 1 IMVPOK 19
0Ohm /
B r0402 B

A A

Title : POWER-ON SEQ.


ASUSTeK COMPUTER INC Engineer: Jack Wang
Size Project Name Rev
A4 A6F 1.0
Date: Monday, March 06, 2006 Sheet 39 of 63
5 4 3 2 1
5 4 3 2 1

DC Power Jack +V_DCJACK


CON7
T4001 A/D_DOCK_IN
6 NP_NC C4001 1
D 5 3 0.1UF/25V D
P_GND2 3 L4001 1 80Ohm/100Mhz
2 2 1 2 2
4 P_GND1 1 1
L4002 1 2 80Ohm/100Mhz
09G011080004

2
DC_PWR_JACK_3P L4003 80Ohm/100Mhz

1
T4002 D4000 C4002 C4000
1 2 1
SS0540 0.1UF/25V 0.1UF/25V
L4004 80Ohm/100Mhz 07G004074020
DC_JACK_GND T4003

2
1 2 1

1
09G011080004
GND GND GND
R4000 1 0Ohm
2
MODIFY 0102 /
For EMI

GND

BAT_CON T4004 T4000 T4005


C CON6 C

1 1
(detect BATTERY IN)

1
2 2
3 TS#_L L4000 1 2 1KOhm/100Mhz TS#
3 SMCLK_BAT TS# 57,59
4 SMCLK_BAT_L L4005 1 2 1KOhm/100Mhz
4 SMDATA_BAT_L SMDATA_BAT SMCLK_BAT 28
5 L4006 1 2 1KOhm/100Mhz
5 SMDATA_BAT 28
6 6
7 7
8 8
1

C4003
0.1UF/25V
1

BATT_CON_8P C4005 C4006 C4004


1

0.1UF/25V 0.1UF/25V C4007 100PF/50V


2

T4006 T4007 T4008 T4009 100PF/50V


c0402
c0402
2

GND
2
1

GND GND
GND
B B

A A

Title : DC/ BATT IN


ASUSTeK COMPUTER INC Engineer: Jack Wang
Size Project Name Rev
A4 A6F 1.0
Date: Monday, March 06, 2006 Sheet 40 of 63
5 4 3 2 1
5 4 3 2 1

+3V

D Isolate card bus control and slot signal D

when debug card plug in

1
C4101
0.1UF/10V
c0402

2
PCMCIA DEBUG PORT

10
GND
U4101B
R4100 12 9

PR
D Q CBDEBUGEN# 31
100KOhm
1 2 74LV74A_CK 11 8
+3V CK Q#

1
r0402 C4100 7 14 +3V

CLR
0.1UF/10V GND VCC

1
c0402 C4102
+3V 74LV74A 0.1UF/10V

13
GND c0402

2
1

74LV74A_D
C GND C
R4101
8.2KOhm GND
+3V +3V

Q4100

2
30,31 CCD1# 1 B VCC 5

30,31 CSTSCHG/STSCHG#/BVD1 2 A

1
U4101A
3 GND 4 3 6

CLR
CK Q#

1
Y
R4102 74LVC1G00GV 2 5
1MOhm D Q
7 GND VCC 14

PR
2

74LV74A

4
GND
B +3V B
GND

+5V

U4100
CBDEBUGEN# 1 24
BEA# Vcc
30,31 CCLKRUN#/IOIS16# 2 B0 B9 23
CLK_DEBUG 3 22
5 CLK_DEBUG A0 A9
17,25,28,38 LPC_FRAME# 4 A1 A8 21
30,31 CAUDIO/SPKR_IN#/BVD2 5 B1 B8 20
30,31 CPERR#/A14 6 B2 B7 19 CBLOCK#/A19 30,31
7 18 DBG_A7 1 T4101
17,25,28,38 LPC_AD0 A2 A7 DBG_A6
8 17 1 T4100
17,25,28,38 LPC_AD1 A3 A6
30,31 RFU/D2 9 B3 B6 16 CSERR#/WAIT# 30,31
A 30,31 RFU/D14 10 B4 B5 15 RFU/A18 30,31 A
17,25,28,38 LPC_AD2 11 A4 A5 14 LPC_AD3 17,25,28,38
CBDEBUGEN#
12 GND BEB# 13
Title : PCMCIA Debug
PI5C3384QEX
06G016002110 ASUSTeK COMPUTER INC Engineer: Jack Wang
GND Size Project Name Rev
A4 A6F 1.0
Date: Monday, March 06, 2006 Sheet 41 of 63
5 4 3 2 1
5 4 3 2 1

H4207
H4210
CPU 1 NP_NC1
2 NP_NC2 H4214
3 GND1 GND14 16 1 NP_NC GND7 8
H4201 4 15 2 7
GND2 GND13 GND1 GND6
1 5 GND3 GND12 14 3 GND2 GND5 6 1 NP_NC GND8 9
C268B178D138 6 GND4 GND11 13 4 GND3 GND4 5 2 GND1 GND7 8
D @ 7 GND5 GND10 12 3 GND2 GND6 7 D
H4202 8 11 4 6
GND6 GND9 GND3 GND5
1 9 GND7 GND8 10 CR276X236D91N GND4 5
C268B178D138 @ @
@ SCREW GND GND C299D91N
H4203 @
1 GND GND
C268B178D138 GND GND
H4211 H4215
@
H4204
1 1 NP_NC GND8 9 1 NP_NC GND8 9
C268B178D138 H4208 2 8 2 8
GND1 GND7 GND1 GND7
@ 1 NP_NC1 3 GND2 GND6 7 3 GND2 GND6 7
GND 2 4 6 4 6
NP_NC2 GND3 GND5 GND3 GND5
3 GND1 GND14 16 GND4 5 GND4 5
4 15 @
GND2 GND13 C276D91N
5 GND3 GND12 14 CR276X256D91N
6 13 GND @ GND GND GND
GND4 GND11
7 GND5 GND10 12
8 GND6 GND9 11 H4216
9 GND7 GND8 10

SCREW H4212
1 NP_NC GND8 9
@ 2 8
GND1 GND7
1 NP_NC GND8 9 3 GND2 GND6 7
GND GND 2 8 4 6
GND1 GND7 GND3 GND5
3 GND2 GND6 7 GND4 5
@
MDC H4209 4 GND3 GND5 6
5 C276D91N
C GND4 GND GND C
1 NP_NC GND8 9 CR276X295D91N
H4205 H4206 2 8 GND @ GND
L4E_1A L4E_1A GND1 GND7 H4217
3 GND2 GND6 7
4 GND3 GND5 6
GND4 5 1 NP_NC GND8 9
@ 2 8
C276D91N H4213 GND1 GND7
3 GND2 GND6 7
GND GND GND GND 4 6
GND3 GND5
1 NP_NC GND8 9 GND4 5
2 8 @
GND1 GND7
3 GND2 GND6 7 CR268X276D91N
4 GND3 GND5 6
5 GND GND
GND4
CR366X366D91N
GND GND

U4201
1 smd591x197
1

U4202
B +VCORE B
1 smd591x197
1
+VCCP_AGTL+
AC_BAT_SYS +3VS +3VS
@

2
2

2
C4213 C4214 C4220
C4204 C4205 C4206 C4212 C4217 C4218 C4219 C4211
0.1UF/10V 0.1UF/10V0.1UF/10V
1UF/10V 1UF/10V

1
0.1UF/10V 0.1UF/10V 0.1UF/10V 1UF/10V
1UF/10V 1UF/10V c0402 c0402 c0402
1

1
GND c0402 c0402 c0402
/ / /
GND GND
GND +3V +5V GND GND
2

C4210
2

0.1UF/10V C4207 C4208 C4209 AC_BAT_SYS


1

c0402
/ 0.1UF/10V 0.1UF/10V 0.1UF/10V
1

c0402 c0402 c0402


/ / /
1

1
GND C4216
GND C4215
1UF/25V
0.1UF/50V
2

2
A
GND For EMI A

FOR EMI
Title : SCREW HOLE
ASUSTeK COMPUTER INC Engineer: Jack Wang
Size Project Name Rev
A3 A6F 1.0
Date: Monday, March 06, 2006 Sheet 42 of 63
5 4 3 2 1
5 4 3 2 1

R1.1
11/14 1. Change resistor number from R1 to R1401
2. Change R1704 value from 10K to 330K
3. Add U2202 C D E F
D
4. Change C2511 value from 0.1uF to 0.047uF(11G232147316360) D

5. Change C2510, C2514 and C2515 value from 0.1uF to


0.33uF(11G232333436030)

11/29 1. Remove R409


2. USB port (J3500) power control on shutdown of AC mode
3. Change U2202 power source form "+3VS" to "+3V" to solve
pop noise
4. Add D2202 1N 4148W P/N 07G001001612 to solve pop noise
when power off
5. Remove R2201 and mount R2203 to change Gain Setting

12/1 1. Change component D2103 DAP202K to 1N4148W P/N 07G001001612


2. Add Components 10K Ohm & 1N4148W P/N 07G001001612 and
C connect U2100 pin 30 C

3. Change J1500,U900,U2502,U3400,H4225,H4226,H4228,H4229,H4230
,H4223,H4231,Q4400 to green part

12/2 1. Change Thermal Sensor to SO-8 MAX6657


2. USB4-->Camera, USB6-->PB

12/5 1.Change material CE1200, F3500, F3501, F3502


2. Add EC new function-->THRO_CPU
3. Change X3100, C3118, C3119 J3401 part number

B
12/7 1.Change J2500 footprint B

12/9 1.Change R1202 value

A A

Title : HISTORY
ASUSTeK COMPUTER INC Engineer: Jack Wang
Size Project Name Rev
Custom A6F 1.0
Date: Monday, March 06, 2006 Sheet 43 of 63
5 4 3 2 1
5 4 3 2 1

+5VS +5VS

For EMI (NEAR CONNECTOR)

1
+
D4401 CE4400 +5VS
SS0540
100UF/6.3V

1
C4401

2
1206 SWAP
0.1UF/16V
D D
c0402

2
GND

SLCT_STB# RP4400A1 5 2.7KOHM


25 SLCT_STB#
10
LPT_PD7 RP4401A1 5 2.7KOHM SLCT_AFD# RP4400B2 5 2.7KOHM
25 LPT_PD7 25 SLCT_AFD#
10 10
GND
SLCT_ACK#RP4401B2 5 2.7KOHM LPT_PD0 RP4400C3 5 2.7KOHM
25 SLCT_ACK# 25 LPT_PD0
10 10

SLCT_BUSYRP4401C3 5 2.7KOHM SLCT_ERROR#


RP4400D4 5 2.7KOHM
25 SLCT_BUSY 25 SLCT_ERROR#
10 10

SLCT_PE RP4401D4 5 2.7KOHM LPT_PD1 RP4400E6 5 2.7KOHM


25 SLCT_PE 25 LPT_PD1
10 10
LPT_PD3 RP4401E6 5 2.7KOHM SLCT_INIT# RP4400F7 5 2.7KOHM
25 LPT_PD3 25 SLCT_INIT#
10 10
LPT_PD4 RP4401F7 5 2.7KOHM LPT_PD2 RP4400G8 5 2.7KOHM
PRINT PORT
25 LPT_PD4 25 LPT_PD2

27
10 10
CON1
LPT_PD5 RP4401G8 5 2.7KOHM SLCT_SLIN# RP4400H9 5 2.7KOHM D_SUB_25P
25 LPT_PD5 25 SLCT_SLIN#
10 10 SLCT_L_STB# 1
14 SLCT_L_AFD#
LPT_PD6 RP4401H9 5 2.7KOHM LPT_L_PD0 2
25 LPT_PD6
10 15 SLCT_L_ERROR#
C LPT_L_PD1 3 C
LPT_SLCT R4415 1 2 2.7KOhm 16 SLCT_L_INIT#
25 LPT_SLCT
LPT_L_PD2 4
17 SLCT_L_SLIN#
Swap 060108 LPT_L_PD3 5
18
LN4401 LPT_L_PD4 6
SLCT_SLIN# 1 2 SLCT_L_SLIN# 19
LN4400 LPT_PD2 LPT_L_PD2 LPT_L_PD5
3 4 7
SLCT_PE 1 2 SLCT_L_PE SLCT_INIT# 5 6 SLCT_L_INIT# 20
SLCT_BUSY3 SLCT_L_BUSY LPT_PD1 LPT_L_PD1 LPT_L_PD6

150pF/50V
150pF/50V
150pF/50V
150pF/50V
4 7 8 8
SLCT_ACK#5 6 SLCT_L_ACK# 21
LPT_PD7 7 8 LPT_L_PD7 LPT_L_PD7 9
120Ohm/100MHz 22
SLCT_L_ACK#
150pF/50V
150pF/50V
150pF/50V
150pF/50V

10

CN4400B
CN4400A
120Ohm/100MHz

CN4400D
CN4400C
23
SLCT_L_BUSY 11
24

8
6
4
2
SLCT_L_PE 12
CN4401B
CN4401A
CN4401D
CN4401C

25
LPT_SLCT 1 2 SLCT_L_SLCT 13
8
6
4
2

1
80Ohm/100Mhz
L4401 C4403

7
5
3
1

26
150PF/50V

2
7
5
3
1

B B

LN4402 LN4403
SLCT_ERROR#
1 2 SLCT_L_ERROR# LPT_PD6 1 2 LPT_L_PD6
LPT_PD0 3 4 LPT_L_PD0 LPT_PD5 3 4 LPT_L_PD5
SLCT_AFD# 5 6 SLCT_L_AFD# LPT_PD4 5 6 LPT_L_PD4
SLCT_STB# 7 8 SLCT_L_STB# LPT_PD3 7 8 LPT_L_PD3

150pF/50V
150pF/50V
150pF/50V
150pF/50V
120Ohm/100MHz 120Ohm/100MHz
150pF/50V
150pF/50V
150pF/50V
150pF/50V

CN4403B
CN4403A
CN4403D
CN4403C
CN4402B
CN4402A
CN4402D
CN4402C

8
6
4
2
8
6
4
2

7
5
3
1
7
5
3
1

A A

Title : Printer PORT


ASUSTeK COMPUTER INC Engineer: Jack Wang
Size Project Name Rev
Custom A6F 1.0
Date: Monday, March 06, 2006 Sheet 44 of 63
5 4 3 2 1
5 4 3 2 1

A3F --> A6F Change List


1.Page 35, USB Power change Ploy fuse to TPS2024
2. Page 44, delete Dockig add Printer Port
D D

3. Page 22, add SPDIF on/off circuit


4. Page 14,15 2 DDR2 Socket --> single double side DDR2 socket
5. change connector part reference .
6. change CON23, CON24, CON21, CON13, CON14, CON9 Part Number.
7. change Q2211A,Q2211B part number

C
8. change bat1 part number . C

9. page 33 , change L_RDP and L_RDN net name to connect correctly.


10. Remove the LED 3700.
11. Remove C2512, C2513.
12. Change all hole to A6. 13. ChangeX1700 X2800 Partnumber for height reason.
14. Change R2811,R2819 to RN2805C/D. 15. Change PCMCIA footprint.
B 15. Remove c3804 c3807 c2600 c2613 c2614 for space. B

16. Remove CE300,CE302 for power side has Add.


17. Remove Hole for VGA(South Bridge)
18. Add Chock on LAN connector.
19. change the R,C sequence at the connector of MDC and BAT.
20. change the LAN to 1000M LAN.Add PME to SouthBridge(Ref.A7T)
A A
Title : Change List
ASUSTeK COMPUTER INC Engineer: Jack Wang
Size Project Name Rev
A A6F 1.0
Date: Monday, March 06, 2006 Sheet 45 of 63
5 4 3 2 1
5 4 3 2 1

Reset
A/D_DOCK_IN
+5VLCM IC
+2.5VREF
PWRSW#_EC 6 Power On
2 SWITCH
D D

AC_BAT_SYS +3VA_EC 1 7 PM_PWRBTN#


+3VA_EC PM_SUSC#
EC
To EC
+3VA 5 PM_RSMRST#
IT8510E ICH7 PM_SUSB#
3 VSUS_ON
PWROK
12 VRMPWRGD
+3VSUS 4

H_PWRGD
PLT_RST#
VSUS_GD#
+5VSUS

SUSB_ON
SUSC_ON
+12VSUS Delay 13 13
99ms

IMVPOK#
C C
8
SUSC_EC#
+1.8V 14
+1.5V 11
Calistoga H_CPURST# CPU
+2.5V
+3V
+5V ICH7_PWROK
PWROK
+1V

11 CLK_EN# CLK
+0.9VS Gen.
+1.5VS
B B
+2.5VS
+3VS
9 +5VS
+12VS
SUSB_EC#

Power On Sequence
10
DELAY
___ms
CPU_VRON 1 14
+VCORE

A A

Title : FLOWCHART
ASUSTeK COMPUTER INC Engineer: Jack Wang
Size Project Name Rev
Custom A6F 1.0
Date: Monday, March 06, 2006 Sheet 46 of 63
5 4 3 2 1
5 4 3 2 1

PCI Device IDSEL# REQ/GNT# Interrupts


10/100 RTL8100CL AD23 2 A
CARD READER AD17 1 D
CARDBUS AD17 1 B
1394 AD17 1 C
D MINIPCI ( 802.11a/b/g ) AD19 3 E,F D

SM-Bus Device SM-Bus Address


Clock Generator 1101001x ( D2 )
SO-DIMM 0 1010000x ( A0 )
SO-DIMM 1 1010001x ( A2 )
Thermal Sensor 1001100x ( 98 )

ICH7-M GPIO A3F Note Volt


C
GPIO08 EXTSMI# +3VSUS C

GPIO09 SATA_DET#0 +3VSUS


GPIO12 KBCSCI# +3VSUS
GPIO13 SIO_SMI# +3VSUS
GPIO14 PWRLED_1Hz +3VSUS
GPIO15 802_LED_EN# +3VSUS
GPIO25 CB_SD# +3VSUS
GPIO27 WLAN_ON# +3VSUS
GPIO28 BT_ON +3VSUS
GPIO36 BT_LED_EN# +3VS
GPIO37 PCB_ID0 +3VS
GPIO38 PCB_ID1 +3VS
GPIO39 PCB_ID2 +3VS

B B

A A

Title : SYSTEM RESOURCE


ASUSTeK COMPUTER INC Engineer: Jack Wang
Size Project Name Rev
Custom A6F 1.0
Date: Monday, March 06, 2006 Sheet 47 of 63
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title : N/A
ASUSTeK COMPUTER INC Engineer: Jack Wang
Size Project Name Rev
Custom A6F 1.0
Date: Monday, March 06, 2006 Sheet 48 of 63
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title : N/A
ASUSTeK COMPUTER INC Engineer: Jack Wang
Size Project Name Rev
C A6F 1.0
Date: Monday, March 06, 2006 Sheet 49 of 63
5 4 3 2 1
5 4 3 2 1

+1.05VO

VR_VID0 1 2 AC_BAT_SYS
R5001 47KOhm @
VR_VID1 1 2 AC_BAT_SYS
R5002 47KOhm @
VR_VID2 1 2
63 CPU_VRON_PWR R5003 47KOhm @ CE5000 CE5001 C5001 C5002
VR_VID3 1 2
28 CPU_VRON R5004 47KOhm @

1
15UF/25V

15UF/25V
1 R5005 2 499Ohm VR_VID4

1000PF/25V
1UF/25V
7,19 PM_DPRSLPVR 1 2
D R5006 47KOhm @ D
1 R5007 2 0Ohm @ VR_VID5 1 2
5,19 STP_CPU#

5
6
7
8

5
6
7
8
100KOhm
R5008 47KOhm @

2
1 R5009 2 0Ohm VR_VID6 1 2

D
5 CLK_EN#
R5010 47KOhm @

0Ohm

0Ohm

0Ohm

0Ohm

0Ohm

0Ohm

0Ohm
1 R5056 2 0Ohm

G
S

S
2,17 H_DPRSTP#
Q5001 Q5002 PCPU_GND1

2
SI4392DY SI4392DY

4
3
2
1

4
3
2
1
R5011
1
+3VS

R5000

R5012

R5013

R5014

R5015

R5016

R5017
TPC28T

1UF/6.3V

1
+VCORE (35A)

1
C5003 @ @ @ @ @ @ @ T5001
C5004 2 1 L5000
1 2

1
39,60 VRM_PWRGD 0.047UF/50V

SI4336DY_T1_E3

SI4336DY_T1_E3
@ 0.36UH

2
EC31QS04
2 PM_PSI#

5
6
7
8

5
6
7
8

10KOhm
R5020 3.65KOhm

R5018
R5019 CE5002 CE5003

2
D D
1Ohm

3
3
3
3

3
VR_VID6

VR_VID4

VR_VID2
VR_VID1
VR_VID0
VR_VID5

VR_VID3
52 MCH_OK

1
Q5003

Q5004
+ +

330UF/2V
1%

SOP8

SOP8

330UF/2V
4G 4G

for current
R5054

1
S S

D5000
2 1

1
2
3

1
2
3

2
balence
10KOhm 1% @

1
@

15.8KOhm 1%
2

PCPU_GND1 C5005
1

1
R5021

C
2 1 C
0Ohm

0Ohm

1% 0Ohm

VSUM

ISEN1
R5022

R5023

R5024

0.22UF/10V
0.015uF/50V
2

C5007
147KOhm

U5000 2.7Ohm VCC_PRM


C5000

ISL6262CRZ
2 1

49
48
47
46
45
44
43
42
41
40
39
38
37
1 2 2 1
@

R5026 0.22UF/25V AC_BAT_SYS


1

GND2
3V3
CLK_EN#
DPRSTP#

VID6
VID5
VID4
VID3
VID2
VID1
VID0
DPRSLPVR
VR_ON
10KOHM
R5027

Close to Phase 1
R5025

CE5004 CE5005 C5008 C5009


2

Inductor VR_PWRGD 1 36 Place these two


PGOOD BOOT1

15UF/25V

15UF/25V
PSI#

1UF/25V
2 PSI# UGATE1 35 CAP under CPU
499Ohm

1000PF/25V
1

3 PGD_IN PHASE1 34 socket.

1
@ R5028 4 33 PCPU_GND1
+3VS RBIAS PGND1
1 2 5 VR_TT# LGATE1 32

5
6
7
8

5
6
7
8
6 31 PVCC
NTC PVCC +5VS
R5030 16KOhm

2
7 30

D
VCC_PRM SOFT LGATE2 PCPU_GND2
2 1 8 OCSET PGND2 29

G
9 28

S
VW PHASE2 PCPU_GND2
10 COMP UGATE2 27
Q5005 Q5006
5600PF/50V

2 1 2 1 11 FB BOOT2 26
R5031 3.57KOhm

SI4392DY SI4392DY

4
3
2
1

4
3
2
1
12 FB2 NC 25
1

0Ohm

0Ohm

0.1UF/50VC5010 C5011 TPC28T


DROOP
1

VDIFF

ISEN2
ISEN1
VSUM

GND1
VSEN
@

@ 390PF/50V T5002
VDD
RTN

DFB
1

C5014
VIN

2.7Ohm L5001
1.5KOhm

VO
R5032

R5034

C5013 1 2 2 1 1 2
1.82KOhm

@
C5012

0.033UF/16V
2

1
13
14
15
16
17
18
19
20
21
22
23
24

SI4336DY_T1_E3

SI4336DY_T1_E3
R5036 0.22UF/25V 0.36UH
2

2
10KOhm
3.65KOhm
R5033

R5035
1

2 1

5
6
7
8

5
6
7
8

R5039
R5040
1

1
D D

EC31QS04
R5037 61.9KOhm 2 1 1% 1Ohm + CE5006 + CE5007

2
Q5000

Q5007
ISEN1

1
SOP8

SOP8

330UF/2V

330UF/2V
B 470PF/50V C5015 4G 4G B
ISEN2 R5055 C5016

1
1 2 S S

for current
3 VCCSENSE

R5038
0.1UF/10V

2
2 1
2

R5041 0Ohm R5044 D5001


0.01UF/50V

1
2
3

1
2
3

2
1
C5018

10KOhm 1% @
0.01UF/50V

1
2 1

balence
+5VS
1

R5043
C5019

27.4Ohm 10Ohm 2 1
1

@
2

VCC_PRM
C5020 C5017
1

2.2UF/6.3V PCPU_GND2 0.22UF/10V

VSUM

ISEN2
2

3 VSSSENSE 1 2
R5046
2

R5045
0.01UF/50V

2 1 AC_BAT_SYS
1
C5021

0Ohm R5048
27.4Ohm 10Ohm
2

@ R5049 for
C5022
2

load line 0.1UF/50V


1

TPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28T
1

C5023 180PF/50V T5000 T5003 T5004 T5005 T5006 T5007 T5008 T5009 T5010 T5011 T5012 T5013 T5014 T5015 T5016 T5017
1

0.22UF/10V

2 1
C5006

Close to Pin 18
2

2.87KOhm

05/11/24 +VCORE

1
R5049

1KOhm
R5050 PVCC
TPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28T
1

1 2
T5018 T5019 T5020 T5021 T5022 T5023 T5024 T5025 T5026 T5027 T5028 T5029 T5030 T5031 T5032 T5033
1

VCC_PRM
A A
R5051 11KOhm C5024
4.7UF/6.3V
0.33UF/16V

1
1 2
1

2
C5029

C5028 R5052 R5053 3.65KOhm


0.033UF/16V 1 2 1 2
PCPU_GND1 PCPU_GND2
2

VSUM 10KOHM
Title : POWER_VCORE
short to be near
to pin 33 & pin29 ASUSTeK COMPUTER INC Engineer: Johnson Zhang
C5028 & C5029 for Close to Phase 1 Size Project Name Rev
transient response Inductor Custom A6F 1.0
Date: Monday, March 06, 2006 Sheet 50 of 63
5 4 3 2 1
5 4 3 2 1

AC_BAT_SYS
R5101
AC_BAT_SYS

1UF/25V
1 2

1
C5101
0Ohm

1
51KOhm

1
CE5105

15UF/25V
CE5101

15UF/25V
C5102
8200PF/50V C5103

2
D D

2
0.1UF/25V

2
5
6
7
8
Q5100

2
SI4800BDY

D
R5102
R5103
330Ohm

S
R5104 +5VO
TPC28T

4
3
2
1
1 2
T5101
AC_BAT_SYS 0Ohm
L5100 (7.0A) JP5100
SUSB#_PWR 52,53,54,61,63
C5104

1
R5105 1 2 1 1 2 2 +5VSUS (0.03A)
100KOhm

1 2 1 2
2

5
6
7
8
R5107 3.8UH 1MM_OPEN_5MIL

2
R5106 10KOhm 1500PF/50V 1.8KOhm 0.1UF/25V Q5101 @

D
1

0Ohm U5100 C5105 SI4800BDY D5100

100UF/6.3V

100UF/6.3V
G
1 2 1 30 1 2

S
INV1 VBST1 FS1J4TP

1
C5106 4700PF/50V 2 29 + +
COMP1 OUT1_U

1
CE5100

CE5102
C5107
1

1 2 3 SSTRT1 LL1 28
1UF/10V

4
3
2
1

1
4 SKIP# OUT1_D 27
R5108
2

5 VO1_VDDQ OUTGND1 26

2
6 DDR# TRIP1 25 1 2
7 24 R5109 18KOhm @
T5100 GND VIN
1 8 REF_X TRIP2 23 1 2
TPC28T R5110 18KOhm @ +5VAO AC_BAT_SYS
ENBL
9 ENBL1 VREG5 22 +5VAO
10 ENBL2 REG5_IN 21 +5VO

CE5103

15UF/25V
11 VO2 OUTGND2 20

1
3V_5V_PWRGD 12 19
39,60 3V_5V_PWRGD PGOOD OUT2_D
1 2 13 18 R5100 0Ohm C5108
C SSTRT2 LL2 C
2 1 1 2 14 COMP2 OUT2_U 17 2 1 1UF/25V
1
100KOhm

0.01UF/50V

2
15 INV2 VBST2 16 1 2
C5100 C5109 R5111
R5112

@ 3300PF/50V 2.7KOhm TPS51020 C5110 0.1UF/25V

4.7UH/16V
1
F=450KHz C5111 Q5102

1
2

R5115 R5113 R5114 TPC28T


+3VO
Vref=0.85V

2
1 D1_1 G1 8
1 2 15KOhm T5102
15.8KOhm 2 7
D1_2 S1/D2_3
10KOhm L5101 (5.7A) JP5101
1%

1
3 6 1 2 1 1 2 2 +3VSUS
2

G2 S1/D2_2

R5116 4 5 5.2UH 1MM_OPEN_5MIL (0.39A)


S2 S1/D2_1
330Ohm @
2

30.1KOhm

SI4914DY
R5117

150UF/4V
1
+

C5112
1

1
CE5104

1UF/10V
1
1

C5113

2
6800PF/50V
2

B B

+12VSUS TPC28TTPC28TTPC28TTPC28T TPC28TTPC28TTPC28T


T5103 T5104 T5105 T5106 T5107 T5108 T5109

+5VO +3VO

1
TPC28T
T5112

AC_BAT_SYS
1

+12VSUS TPC28TTPC28TTPC28TTPC28T TPC28TTPC28TTPC28T


C5114 Imax=100mA T5113 T5114 T5115 T5116 T5117 T5118 T5119
2

0.1UF/25V U5101 D5101


1 2 1 5 R5118 2 1
IN OUT 28,60 FORCE_OFF#
845KOhm

1
1

2 GND C5115 1SS355


1UF/25V
1

3 EN NC or ADJ 4
2
2

MIC5235YM5
R5119
A A
1 2 FB=1.24V 95.3KOhm
4,28 VSUS_ON
R5120 100KOhm 1 2 ENBL
4,28 VSUS_ON
1

R5121 1KOhm

Title : POWER_SYSTEM
ASUSTeK COMPUTER INC Engineer: Johnson Zhang
Size Project Name Rev
Custom A6F 1.0
Date: Monday, March 06, 2006 Sheet 51 of 63
5 4 3 2 1
5 4 3 2 1

AC_BAT_SYS

+5VO

15UF/25V
0.1UF/25V
3

C5201
8
7
6
5

CE5201
5
6
7
8
Q5201 R5201 D5201 R5202

D
D SI4800BDY 4.7Ohm RB717F 10Ohm D

2
+1.05VO

G
S
TPC28T

S
15UF/25V
T5201 Q5202

1
SI4800BDY

1
2
3
4
1
CE5202
JP5201

4
3
2
1
0.1UF/25V

2
C5202
JP5204 C5203

21
1 1 2 2

8
7
6
5

1
+VCCA 1 2 D5200 R5203 0.1UF/25V
1 2 FS1J4TP 0Ohm TPC28T 3MM_OPEN_5MIL

2
1MM_OPEN_5MIL T5202 @

0.1UF/25V
1
C5204

R5204

0Ohm
@ Q5203 C5205 4.7UF/6.3V L5201 JP5202

2
(7.7A) +VCCP

G
S
SI4800BDY

1
+1.5VO JP5203
1 2 1 2 1 1 2 2

1
3.8UH 3MM_OPEN_5MIL

1
2
3
4

2
1 1 2 2
U5200 @

1
3MM_OPEN_5MIL Q5204 + +

100UF/2.5V

100UF/2.5V
28 VCC GND 1

5
6
7
8

1
CE5200

CE5206
@ SI4800BDY

0.1UF/25V
27 LGATE2 LGATE1 2

C5206
JP5200 (6A) L5200 26 3

D
PGND2 PGND1
+1.5VS 1 1 2 2 1 2 25 PHASE2 PHASE1 4

2
G
24 5

S
3MM_OPEN_5MIL 3.8UH UGATE2 UGATE1 D5202
100UF/2.5V

100UF/2.5V 23 6
BOOT2 BOOT1
1

+ 1 +
CE5204

CE5205
@ 1 2 22 7 1 R5206 2 FS1J4TP
ISEN2 ISEN1
1

C5207 R5207 0Ohm @ R5205 3.92KOhm

4
3
2
1

1
21 EN2 EN1 8
0.1UF/25V 2 1 2.2KOhm 20 9
VOUT2 VOUT1
1 2 19 VSEN2 VSEN1 10
2

18 OCSET2 OCSET1 11
R5208 6.65KOhm 17 12
1% SOFT2 SOFT1
16 PG2/REF DDR 13
15 PG1 VIN 14
1 2 2 1

C5210
115KOhm
C5208 0.01UF/50V

1
C C
ISL6227CAZ_T C5209 R5209 0Ohm @

2
0Ohm
R5213 1.78KOhm

C5211 0.01UF/50V

R5214 137KOHM
VREF = 0.9V

1
R5211
R5210 0.1UF/25V 1 2

2
0.01UF/50V

1
R5212
9.76KOhm
1% C5212 0.01UF/50V

2
1

1
2 1

1
VREF = 0.9V R5200
0Ohm
60 1.05V_1.5V_PWRGD
R5215
10.2KOhm

2
R5216
51,53,54,61,63 SUSB#_PWR 2 1

1
200KOhm 0.1UF/50V
C5213

R5217
51,53,54,61,63 SUSB#_PWR 2 1
1

200KOhm 0.1UF/50V
C5200
2

B B

+3VS
1

R5218 TPC28T TPC28T TPC28T TPC28T TPC28T TPC28T TPC28T TPC28T


100KOhm T5200 T5203 T5204 T5205 T5206 T5207 T5208 T5209
100KOhm

+3VO
1

1
MCH_OK 50 +1.5VO
R5219

+1.05VO
3

3
D
Q5200
2

11 TPC28T TPC28T TPC28T TPC28T TPC28T TPC28T TPC28T TPC28T


G 2N7002 T5210 T5211 T5212 T5213 T5214 T5215 T5216 T5217
3 2 S
R5220 C Q5205
2

+1.05VO 1 B PMBS3904

1
1 2
1

4.7KOhm E
1

C5214 R5221
0.22UF/16V 10KOhm
2

A A
2

Title :POWER_I/O_1.5VS & 1.05VS


ASUSTeK COMPUTER INC Engineer: Johnson Zhang
Size Project Name Rev
Custom A6F 1.0
Date: Monday, March 06, 2006 Sheet 52 of 63
5 4 3 2 1
5 4 3 2 1

+5VO

C5311 0.1UF/25V
R5300 1 2
61,63 SUSC#_PWR 2 1
60 DDR_PWRGD

1
0Ohm 0.1UF/50V R5309
C5300 2 1 AC_BAT_SYS

2
D D

15UF/25V
0.1UF/25V
C5301
1
R5312 CE5300
1,52,54,61,63 SUSB#_PWR 2 1

1
240KOhm 0.47UF/16V

2
5
6
7
8
C5305

2
Q5300

D
R5301 SI4800BDY

2
10Ohm
+1.8VO

S
JP5301

4
3
2
1
R5305 1 2
1 2

1
VCCA

RB751V_40
1 2

D5300
TPC28T 3MM_OPEN_5MIL
0Ohm T5301 @
2

L5300 (8.84A) JP5302 +1.8V


R5304 1 2 1 1 2 2
U5300

1
0Ohm

2
23 Q5301 3.8UH 3MM_OPEN_5MIL
@ GND

12Ohm
R5306
1 22 SI4800BDY @
VDDQEN PGND

1
150UF/2V

150UF/2V
+ +

CE5301

CE5307
@
1

2 VTTEN BGDDQ 21

5
6
7
8

0.1UF/25V
3 FPWM# VCCP 20

C5307
4 19

D
SS SWDDQ

11
5 VTTGND TGDDQ 18

2
G
6 17 1 2

S
VTT BOOST
2

C5308
C5304 0.1UF/25V D5301

2200PF/50V
7 VTTI OCDDQ 16
R5303 8 15 @ FS1J4TP
C FBVTT PGOOD REF R5302 C

4
3
2
1

1
9 AGND VTTREF 14
0Ohm 10 13 C5317 100PF/50V 1 2
DDQREF FBDDQ
1

C5310
VCCA 11
10UF/6.3V

10UF/6.3V

10UF/6.3V

VCCA COMP 12 1 2
1

1
C5319

C5314

C5315

C5309 0Ohm
1

1
5600PF/50V

10UF/6.3V
NCP5214MNR2G

1
C5306 R5311

1UF/6.3V
2

1UF/6.3V

4.7UF/6.3V
2

1 2 2 1

1
C5302

C5318

C5303
2 2200PF/50V 6.19KOhm 1 2

1
R5310 4.3KOhm
C5312

2
4700PF/50V

2
1 2

1
R5308 130Ohm

R5307
3.3KOhm

2
+0.9VO

JP5300 (1.8A)
+0.9VS 1 1 2 2

3MM_OPEN_5MIL
@
1

B C5313 B
0.1UF/25V
2

TPC28T TPC28T TPC28T TPC28T TPC28T TPC28T TPC28T TPC28T


T5300 T5302 T5303 T5304 T5305 T5306 T5307 T5308
1

1
+0.9VO +1.8VO

TPC28T TPC28T TPC28T TPC28T TPC28T TPC28T TPC28T TPC28T


T5309 T5310 T5311 T5312 T5313 T5314 T5315 T5316

A A
1

Title : POWER_I/O_DDR & VTT


ASUSTeK COMPUTER INC Engineer: Johnson Zhang
Size Project Name Rev
Custom A6F 1.0
Date: Monday, March 06, 2006 Sheet 53 of 63
5 4 3 2 1
5 4 3 2 1

+3VAO

TPC28T
+3VA TPC28T
T5406 T5407
JP5400
+3VAO 1 2
1 2

1
D 1MM_OPEN_5MIL @ D

TPC28T
Vref = 1.23V T5400

1
+3VAO

2
U5401 R5404 IOUT = 40 ~ 60mA
1 ADJ GND4 8
2 7 16.9KOhm
AC_BAT_SYS IN GND3
3 OUT GND2 6

1
4 EN GND1 5

MIC5236YM

1
2
C5404

1
10UF/6.3V
C5405 R5405

2
1UF/25V 10KOhm

1
C C

+2.5VS

+5VO

TPC28T TPC28T +3VA


T5401 T5403

2
B JP5401 R5401 B
1MM_OPEN_5MIL @ U5400 9.76KOhm
1

1 1 2 2 1 8 TPC28T
+3V VIN PGND
2 7 T5405
VFB AGND

1
1
3 VOUT0 VCCA 6
TPC28T 4 5
GND

T5404 JP5402 VOUT1 REFEN R5402

1
1MM_OPEN_5MIL @ 100KOhm
+2.5VS 1 1 2 2 CM8562GISTR

6
Q5400A

0.01UF/25V
1

2
1

1
10.2KOhm
10UF/10V

Imax=2A UM6K1N

C5403
C5402

R5406 2
1

1
10UF/10V
C5401

TPC28T CE5400
2

3
T5408 Q5400B R5413
10UF/6.3V UM6K1N 82.5KOhm
2

+2.5VO 5 SUSB#_PWR 51,52,53,61,63


1

1
4
C5400
0.1UF/50V
@

2
A A

Title : POWER_I/O_+3VA & +2.5VS

ASUSTeK COMPUTER INC Engineer: Johnson Zhang


Size Project Name Rev
Custom A6F 1.0
Date: Monday, March 06, 2006 Sheet 54 of 63
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title : Dummy
ASUSTeK COMPUTER INC
Engineer: Johnson Zhang
Size Project Name Rev
C A6F 1.0
Date: Monday, March 06, 2006 Sheet 55 of 63
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title : Dummy
ASUSTeK COMPUTER INC
Engineer: Johnson Zhang
Size Project Name Rev
C A6F 1.0
Date: Monday, March 06, 2006 Sheet 56 of 63
5 4 3 2 1
5 4 3 2 1

T5701 T5722
TPC28T TPC28T
R5700
POWER PATH & BAT_LEARN 22kOhm JP5705 SHORT_PIN
CSSP TPC28T TPC28T TPC28T TPC28T

1
1 2 2 1
JP5701 SHORT_PIN L5702 PT5717 PT5718 PT5719 PT5720
1 2 CSSN 150Ohm/100Mhz

T5700 T5703 T5704 T5723 Q5700 Q5701 T5706 T5707 T5708 T5709 T5710
BAT 2 1 BAT_CON

1
8 1 1 8 TPC28T L5701
29,40,59,60 A/D_DOCK_IN
TPC28T TPC28T TPC28T TPC28T R5701 TPC28T TPC28T TPC28T TPC28T TPC28T T5721
1KOhm/100Mhz

1
A/D_DOCK_IN 7 2 2 7 1 2 AC_BAT_SYS
BAT_S

S
1 2

D
S
D
20mOHM

0.01UF/25V

1
6 3 3 6

1
Q5702 TPC8107

C5721
5 4 4 5 1 8

G
G
BAT

1
D D

2
2 7
TPC8107 TPC8107

D
3 6
D5700

2
2 1 4 5

G
C5701
1SS355 0.01UF/25V
CHG_PDL

R5702
22kOhm
1 2 CHG_PDS

MAX8725_LDO
CHG_SRC
CSSP
PKPRES#

2
CSSN
CHG_SRC

R5727

100KOhm
AC_IN Threshold 2.048Vmax A/D_DOCK_IN

0.1UF/25V

0.1UF/25V
> 17.44V active

3
C5702
3
D

C5703
Adapter Iin(max) = [0.075V/Rsense(ADin)]*[VCLS/VREF]
Rsense(ADin)=0.02 ohm TPC28T Q5703

1
VCLS= 3.685V T5711 11

2
=> Iin(max)=3.27A G 2N7002
=> Constant Power = 19 * 3.27 = 62.13W 2 S
CHG_PDS
=>R5708=20K,R5714=137K

2
AC_BAT_SYS

0.1UF/25V
CHG_PDL

3
3

PC5704
Charge Current Ichg = [0.075V/Rsense(CHG)]*[VICTL/3.6V] D
Rsense(CHG)=0.025 ohm
VICTL= 3V => Ichg = 2.5A Q5710

1
VICTL= 1.68V => Ichg = 1.4A + 15UF/25V 11

0.1UF/25V
40,59 TS#

2
2N7002

C5705
C5722 G C5716
2 S 0.22uF/16V
Vbatt = Cell * { Vref +[ (VCTL- 1.8V) / 9.52 ] } TPC28T TPC28T

2
VCTL= 1.588V A/D_DOCK_IN A/D_DOCK_IN MAX8725_LDO T5705 T5702

2
C C
=> Vbatt = 4.2V T5712
TPC28T

1
Mode pin : Vmode > 2.8V (trie to LDO pin) ----> 4 Cells MAX8725_LDO

1
4
3
2
1
0.8 > Vmode (trie to GND) ----> Learning mode

1
C5706 Q5704

S
2

G
D5701 0.1UF/25V

2
2

VICTL< 0.8V or DCIN < 7V -->Charger Disable 1SS355 R5705 R5703 SI4835BDY

D
R5704

100KOhm

U5700 33Ohm

29
28
27
26
25
24
23
22
1 2
MAX1909_REF MAX8725ETI
Precgarge current=150mA LDO : 5.4V 100KOhm C5707 12/05/05
2

5
6
7
8
PDS
CSSP
CSSN
SRC
DHI
DHIV
GND2
PDL
1UF/25V

1
REF : L5700 R5706
1

1 DCIN DLOV 21 1 2
4.2235V(4.2023~4.2447) 2 LDO DLO 20 1 2 1 2 BAT
3 ACIN PGND 19
MAX1909_REF 4 18 10UH 25mOHM
REF CSIP
1UF/16V

1UF/16V
5 GND/PKPRES# CSIN 17
2

4.7UF/25V

6 ACOK BATT 16
1

5
6
7
8

2
C5708

R5707

VCTL
7 15

ICTL

CCV
CCS
IINP
CLS
MODE GND1
2

1
CCI
13.3KOhm Q5706 D5702 +

SHORT_PIN
D
20KOhm

40.2KOhm

33.2KOhm
R5708

SI4800BDY FS1J4TP C5700

SHORT_PIN
R5709

R5710

C5709

C5710

JP5702

JP5703
2

S
10
11
12
13
14
15UF/25V
1

8
9

2
CHG_CCI
CHG_CCS
1

4
3
2
1

1
1.588V

2
10KOhm
PR5711
36.5KOhm
R5712 1%

0.047UF/50V
3.685V

1
CHG_CCV
AD_IINP

C5712
0.01UF/50V

1
2.544V
2
1.91KOhm

C5711
R5713

2
20KOhm
97.6KOhm
137KOhm

2
0.1UF/25V
1
10KOhm
R5714

R5715

R5716

R5717
1

0.1UF/25V
1
C5713

C5714
3

B 3 B
1

D
Q5705
2
1

28 BATSEL_2P# 11 2N7002 2
G
2 S
2

3 PKPRES#
D
Q5712
Power Limit
1

C5715
2N7002
28 PRECHG 11 1UF/16V
G +5VLCM +2.5VREF
2 S
2

28 PWRLMT#
3

3
2

D
Q5707 C5717

2
0.1UF/25V
28 CHG_EN# 11 2N7002 @ R5723

1
G 1SS355 D5706 U5701
2 S 88.7KOhm

3
R5722 3 @2 LMV321IDBVR
D 1 @

5
R5718 @
2

1 2 +5VCHG 100KOhm Q5711 V+ 1 AD_IINP

1
11 +
4.7KOhm 2 1 MAX8725_LDO 2N7002 2 1 4
@ G 3
28,59 AC_APR_UC S 2 -
R5724 V-
1

1
100KOhm 1%

47UF/6.3V

0.1UF/25V
1

1
C5720

340KOhm
@ @ R5726

2
C5718

1 R5725
15KOhm C5719
@ @
0.1UF/25V 90.9KOhm
R5721 @ @

2
2

2
D5705
2 1
Ilimit=3.31A
60 A/D_SD#
Plimit=62.8W
3

3
D
1SS355 Q5709
2N7002
28 BAT_LEARN 11
A G A
2 S
2
3

3 R5720
2

D
Q5713
2N7002 1MOhm
11
1

G
S 2
2

Title : POWER_CHARGER
<OrgName> Engineer: Johnson Zhang
Size Project Name Rev
C A6F 1.0
Date: Monday, March 06, 2006 Sheet 57 of 63
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title : Dummy
ASUSTeK COMPUTER INC
Engineer: Johnson Zhang
Size Project Name Rev
C A6F 1.0
Date: Monday, March 06, 2006 Sheet 58 of 63
5 4 3 2 1
5 4 3 2 1

BATTERY IN DETECT +3VA ADAPTER IN DETECT


TPC28T
T5900

BAT_IN_OC# 28

1
100KOhm

100KOhm
1
D T5901 D

R5901
TPC28T

1
Q5900B

2
R5900
5 UM6K1N

2
ACIN_OC# 28

4
6

3
3
D
Q5900A Q5901
2 UM6K1N
40,57 TS#
28,57 AC_APR_UC 11 2N7002

1
G
2 S

1000PF/16V
1

2
C5900
2

C C

+5VLCM, +5VCHG & +2.5VREF

B B

A/D_DOCK_IN +5VCHG +5V +5VLCM

TPC28T
TPC28T D5900 T5902
T5903 1
U5900 3
1

3 INPUT OUTPUT 1 2
1
GND

F02JK2E
R5904
L78L05ACUTR TPC28T 1KOhm
T5904
2

+2.5VREF
1
2
1

C5904
LM4040BIM3
1

C5903 1UF/25V C5902


1

4.7UF/25V 1UF/10V
1UF/10V

2
1

U5901
2

C5905

3
2

A A

Title : POWER_DETECT
ASUSTeK COMPUTER INC Engineer: Johnson Zhang
Size Project Name Rev
Custom A6F 1.0
Date: Monday, March 06, 2006 Sheet 59 of 63
5 4 3 2 1
5 4 3 2 1

BATTERY A/D_SD# (OVP)

A/D_DOCK_IN

D D

1
R6001
47KOhm

1
R6002

2
100KOhm
T6001
R6003

5.1KOhm
2

1
2

2
TPC28T +2.5VREF
E Q6001 C6000
@ 0.1UF/25V BAT_S
57 A/D_SD#
PMBS3906
1

2
B 1
C OVP=17.25V
3

340KOhm
R6010
T6000
PMBS3904 +5VLCM
3
TPC28T R6007
Q6002 C U6000

1
B 1 2 1 1 8
VOUT1 VCC
1

2 VIN1- VOUT2 7
E 10KOhm 3 6
2 VIN1+ VIN2-
4 GND VIN2+ 5
2

10UF/6.3V

0.1UF/16V

0.1UF/16V
2
R6006 LMV358IDR
1

1
57.6KOhm

C6005

C6004
5.6KOhm

R6013

C6002
C6001
C
4.7UF/10V C
2

2
1

POWER GOOD DETECTER


B B
+3VSUS +3VS
1

R6023
100KOhm
2

21,25,33,36,37,39,61 SUSB# FORCE_OFF# 28,51


TPC28T T6003
1 VRM_PWRGD
2

TPC28T T6004
1

JP6000 R6022 D6000 R6021 1 DDR_PWRGD


39,50 VRM_PWRGD 2 1 @ 100KOhm 1SS355 560KOhm
TPC28T T6005
6

SHORTPIN Q6010A 1 3V_5V_PWRGD


JP6001 UM6K1N
1

1 @ T6007 TPC28T T6006


2

53 DDR_PWRGD 2 2
TPC28T 1 1.05V_1.5V_PWRGD
3

SHORTPIN Q6010B
1

D6001 UM6K1N
1

39,51 3V_5V_PWRGD 2 1 5
1

1SS355 C6007
4

JP6003 4.7UF/6.3V
1 @
2

A 52 1.05V_1.5V_PWRGD 2 A

SHORTPIN

Title : POWER_PROTECT
ASUSTeK COMPUTER INC Engineer: Johnson Zhang
Size Project Name Rev
Custom A6F 1.0
Date: Monday, March 06, 2006 Sheet 60 of 63
5 4 3 2 1
5 4 3 2 1

SUSC#_PWR POWER
TPC28T TPC28T TPC28T TPC28T
T6100 T6101 T6102 T6103

+3VO (1.52A) TPC28T


+3V
T6104

1
6
5
4
Q6100 R6101

1
PMN45EN C6100

S
21,25,33,36,37,39,60 SUSB#
0.1UF/50V TPC28T

1
@ T6105 1KOhm

2
D D

G
R6100 10KOhm
51,52,53,54,63 SUSB#_PWR

1
2
3

1
2 1

1
C6101
0.01UF/50V

2
TPC28T TPC28T
T6106 T6107
Q6106
DRAIN_1 DRAIN_2
+5VO 1 8 TPC28T TPC28T
T6108 T6109
1

SOURCE_1 SOURCE_3
2 7

N
3 6 +5V (5.52A)

1
SOURCE_2 SOURCE_4
4 5
GATE_1 GATE_2

FDW2501NZ
R6102 0Ohm
2 1

1
C6102
3900PF/50V R6110

100KOhm

2
TPC28T TPC28T
T6123 T6125

2
C C

+12VSUS
1

1
TPC28T
+12V (0.001A)

4
3

E
47K

100KOhm
T6124

1
B
Q6105
53,63 SUSC#_PWR
UMC4N
1

47K
2

10K
B
47K

R6104
2
1

SUSB#_PWR POWER TPC28T


T6114
R6106
TPC28T TPC28T
26,36,39 SUSC#
T6110 T6111 TPC28T

1
TPC28T TPC28T T6119 1KOhm
T6112 T6113
+3VO
6
5
4

Q6102
1

53,63 SUSC#_PWR
PMN45EN
S

1
+3VS (2.55A)

11

1
B B
D

2 R6105 1 C6103
G

0.1UF/25V
0Ohm @
1
2
3

2
1

C6104
0.1UF/50V
2

TPC28T TPC28T
T6115 T6116 Q6108
PMN45EN TPC28T TPC28T
6
5
4

+5VO T6117 T6118


S
1

+5VS (3.1A)
11

1
D

2 R6107 1 C6105
0.1UF/25V
1
2
3

0Ohm @
2

C6106
0.1UF/50V
2

R6108

100KOhm
TPC28T TPC28T
T6120 T6121
2

A A

+12VSUS
1

TPC28T
+12VS (0.002A)
C

4
3

E
47K

100KOhm

T6122
1

Q6104
B

UMC4N
51,52,53,54,63 SUSB#_PWR
1

47K
2

10K
B

Title : POWER_LOAD SWITCH


47K

R6109

Engineer: Johnson Zhang


2
1

ASUSTeK COMPUTER INC


Size Project Name Rev
Custom A6F 1.0
Date: Monday, March 06, 2006 Sheet 61 of 63
5 4 3 2 1
5 4 3 2 1

A/D_DOCK_IN
L78L05ACUTR +5VCHG +5VLCM
SWITCH
(Regulator)
+5V (F02JK2E)
LM4040BIM +2.5VREF

AC_APR_UC (Regulator)
BATSEL_2P# PRECHG MAX8724 AC_BAT_SYS
(Controllor) BAT
D A/D_SD# BAT_LEARN D

BATSEL_3S# CHG_EN#
MAX1836
PRECHG (Regulator) SUSC#_PWR +12V
AC_BAT_SYS UMC4N
(SWITCH)
MIC5235BM +12VSUS (1mA)
VSUS_ON (Regulator) UMC4N +12VS
SUSB#_PWR (SWITCH)
MIC5235BM +3VAO +V3V
SHUT_DOWN# (Regulator)

+3.3VSUS

+3VO (5.7A) +12V PMN451N +3V (2.7A)


C (SWITCH) C

TPS51020
+12VS PMN45EN +3VS (2.555A)
SHUT_DOWN# (Controllor)
FORCE_OFF# (SWITCH)
SUSC#_PWR 3V_5V_PWRGD
+5VSUS

+12V FDW2501NZ +5V (1.3A)


VSUS_ON +5VO(7.0A) (SWITCH)
+12VS FDW2501NZ +5VS (5.098A)
(SWITCH)
SUSB#_PWR +2.5VO +2.5VS (2.0A)
CM8562
(Regulator)
+5VAO
B B

+1.5VO +1.5VS (5.741A)


+5VO
ISL6227CAZ
(Controllor) +1.05VO +1.05VS(7.05A)
SUSB#_PWR
1.05V_1.5V_PWRGD

+1.8VO +1.8V (8.2A)

+5VO NPC5214 +0.9VO +0.9VS (2A)


SUSB#_PWR (Controllor)
SUSC#_PWR DDR_PWRGD

PWR_OK_VGA
A A

+5VO & +3VO


+VCORE (36A)
ISL6262CRZ
CPU_VRON Title : POWER_FLOWCHART
VR_VID0~VR_VID6, STP_CPU#, (Controllor) Engineer: Johnson Zhang
ASUSTeK COMPUTER INC
PM_DPRSLPVR, MCH_OK, VRM_PWRGD, CLK_PWR_GD# Size Project Name Rev

PM_PSI#,VCCSENSE,VSSSENSE Custom A6F 1.0


Date: Monday, March 06, 2006 Sheet 62 of 63
5 4 3 2 1
5 4 3 2 1

AC_BAT_SYS
AC_BAT_SYS 12,50,51,52,53,54,57
D D

+3VA +3VA 4,12,20,28,37,39,54,59


FOR POWER TEST

+5VO +5VO 35,51,52,53,54,61

+3VO +3VO 51,52,61


JP6300
+3VSUS +3VSUS 18,19,20,28,33,34,37,39,51,60
+3VA 1 1 2 2 CPU_VRON_PWR 50
+5VSUS +5VSUS 20,36,37,51
SGL_JUMP
+3V @
+3V 12,18,22,26,30,31,32,34,35,36,38,41,54,61
JP6301
+3VS +3VS 4,5,7,9,11,12,13,14,15,19,20,21,22,25,26,27,28,30,36,38,39,42,50,52,60,61 SUSB#_PWR
1 1 2 2 SUSB#_PWR 51,52,53,54,61
SGL_JUMP
@
+12VSUS
+12VSUS 51,61
+12V JP6302
+12V 4,32,36,61 SUSC#_PWR
1 1 2 2 SUSC#_PWR 53,61
+12VS
+12VS 12,22,36,61
SGL_JUMP
@

+5V
+5V 9,12,22,31,35,36,37,41,59,61
C C
+5VS +5VS 4,13,19,20,21,22,27,28,36,37,38,44,50,61

+2.5VO +2.5VO 54

+2.5VS +2.5VS 9,13,36,54

+1.8VO +1.8VO 53

+1.8V +1.8V 7,10,14,15,36,53

+0.9VS +0.9VS 16,36,53

BAT BAT 29,57

+5VCHG +5VCHG 57,59

+5VLCM +5VLCM 37,57,59,60

+2.5VREF +2.5VREF 57,59,60


B +VCORE B
+VCORE 3,50

BAT_CON BAT_CON 40,57

A A

Title : POWER_SIGNAL
ASUSTeK COMPUTER INC Engineer: Johnson Zhang
Size Project Name Rev
Custom A6F 1.0
Date: Monday, March 06, 2006 Sheet 63 of 63
5 4 3 2 1

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