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331 SOFTWARE

PLC user's manual ver. 3.11


Doc. MS129605
Ed. 02 – english – 26 July 1996

Via dell’Artigianato, 21
31050 VASCON (TV)
Tel. 0422/447411 - Fax 0422/447444
e-mail:cmz@cmz.it - support@cmz.it
331 SOFTWARE PLC user's manual ver. 3.11

WARNING
CMZ Sistemi Elettronici can modify or improve the products herein described at any time without prior notice.

This manual has been written by CMZ Sistemi Elettronici exclusively for its customers to provide them with the latest
and more updated information on its products. Information in this document is subject to change and does not represent a
commitment on the part of the company.

Special attention is required when using the functions herein described to avoid any possible danger for workers, damages
to the machines or any consequential damage that may result from wrong installation or misuse of the equipment.

No further guarantees are given by CMZ Sistemi Elettronici in particular for imperfections, incomplete information
and/or operative difficulties.

This manual is valid for the following systems:


• CTE300 from operative system rev. R.025 and later.
• 331CPU (CTX618 and CTD913) from rev. 19.03.1996 and following.

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SUMMARY

SUMMARY

AIM OF THE MANUAL ....................................................................................................................... 5

chapter 1. OVERVIEW.......................................................................................................................... 6
1.1 PLC RESET.....................................................................................................................................6
1.1.1 Total reset.................................................................................................................................6
1.1.2 Partial reset...............................................................................................................................7
1.2 USING THE PLC PROGRAM WITHOUT A COEXISTING FORTH PROGRAM.................7
1.2.1 CTE300 ....................................................................................................................................7
1.2.2 331CPU ....................................................................................................................................8
1.3 USING PLC PROGRAM WITH A COEXISTING FORTH PROGRAM..................................9
1.4 FLASH EPROM ..........................................................................................................................12
1.4.1 CTE300 ..................................................................................................................................13
1.4.2 331CPU ..................................................................................................................................13
1.5 features...........................................................................................................................................14

chapter 2. DESCRIPTION OF VIDEO PAGES.............................................................................. 15


2.1 MAIN MENU................................................................................................................................15
2.2 TEST ..............................................................................................................................................16
2.2.1 Keys assignment....................................................................................................................17
2.3 OPTION.........................................................................................................................................17
2.3.1 Key assignment .....................................................................................................................18
2.3.2 Parameters description ..........................................................................................................18

chapter 3. EDITOR PROGRAM........................................................................................................ 21


3.1 DESCRIPTION .............................................................................................................................21
3.1.1 Keys assignment....................................................................................................................21
3.2 THE FILES VIDEO PAGE. .........................................................................................................25
3.2.1 Keys assignment....................................................................................................................26

chapter 4. PROGRAMMING ............................................................................................................. 27


4.1 EDITING A PROGRAM..............................................................................................................27
4.1.1 Instruction syntax..................................................................................................................27
4.1.2 Program editing .....................................................................................................................29
4.1.3 Comments..............................................................................................................................29
4.2 STRUCTURED PROGRAMMING.............................................................................................30
4.3 THE INSTRUCTIONS..................................................................................................................37
4.3.1 Logical-combining instructions ............................................................................................38
4.3.2 Dynamic control instructions ...............................................................................................43
4.3.3 Storing instructions ...............................................................................................................44
4.3.4 Timing instructions................................................................................................................46
4.3.5 Counting instructions............................................................................................................52
4.3.6 Loading/transferring instructions .........................................................................................55
4.3.7 Indexed loading/transferring instructions ............................................................................59
4.3.8 Logical/arithmetical instructions...........................................................................................61
4.3.9 Comparison instructions.......................................................................................................70

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331 SOFTWARE PLC user's manual ver. 3.11

4.3.10 Complementing instructions...............................................................................................72


4.3.11 System instructions .............................................................................................................73
4.3.12 Library operations ...............................................................................................................84

chapter 5. PROGRAMMING TECHNIQUES................................................................................. 86


5.1 INPUT ............................................................................................................................................86
5.2 OUTPUTS......................................................................................................................................86
5.3 TIMER ...........................................................................................................................................87

chapter 6. DEFINITION OF FUNCTIONS CALLABLE FROM AWL ..................................... 89


6.1 FORTH WRITTEN FUNCTIONS ...............................................................................................89
6.2 ASSEMBLER WRITTEN FUNCTIONS ....................................................................................89
6.3 ACCESSING PLC PARAMETERS............................................................................................90
6.3.1 FORTH words for interfacing AWL ....................................................................................90

appendix A. MS-DOS PROGRAMS.................................................................................................. 93


A.1 PCTER ..........................................................................................................................................93
A.2 BLOAD.........................................................................................................................................93
A.3 RIGEN ..........................................................................................................................................93

appendix B. MEMORY CONFIGURATION................................................................................... 94

appendix C. FUNCTIONS OF THE BASIC LIBRARY................................................................. 95

appendix D. CONFIGURATION OF FRONT PANEL.................................................................. 98


D.1 CTE300 .........................................................................................................................................98
D.2 CTX618.........................................................................................................................................99
D.3 CTD913.......................................................................................................................................100

appendix E. FAST GUIDE FOR AWL INSTRUCTIONS ........................................................... 101

appendix F. SYSTEM VARIABLES LIST..................................................................................... 105

appendix G. ERRORS........................................................................................................................ 107


G.1 FLASH EPROM ........................................................................................................................107
G.2 DISK ...........................................................................................................................................107
G.3 COMPILING..............................................................................................................................108
G.4 RUN-TIME .................................................................................................................................109
G.5 WATCH DOG............................................................................................................................111

appendix H. PROGRAMMING EXAMPLE.................................................................................. 113

ANALYTIC INDEX............................................................................................................................ 115

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AIM OF THE MANUAL

AIM OF THE MANUAL

This manual is aimed at giving AWL programmers all the necessary information to use the internal
PLC of the systems based on MC68331 CPU (CTE300, CTX618 and CTD913 controllers).

This manual introduces the AWL language syntax, the use of test video pages and of the internal
editor. The reader should have a general knowledge on PLC.

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331 SOFTWARE PLC user's manual ver. 3.11

chapter 1. OVERVIEW

The PLC software program implemented in the controller enables the system to work as a normal
PLC that can be programmed in the instructions list (AWL)

It can work either independently or together with FORTH or ASSEMBLER programs. It can also
call programs written in both these languages. This characteristic enabled the creation of application
packages for various branches of industrial automation that enhance PLC functions.

The program has two sections: the run-time (from here on called PLC cycle) and the user interface
(PLC user interface).
By means of user interface the source code is created and stored in the controller’s RAM. This code
is then compiled to generate the object code, which is also stored in the controller’s RAM.
In order to program in AWL or other languages, the controller must be connected to a PC IBM or
compatible with a RS232 serial port (in PCs the COM1 is used as standard port). A special program,
supplied as a MS-DOS executable file called PCTER, enables to change the PC into a terminal for
the controller. The transmission protocol has the following format: 9600 baud, 8 data bit, even
parity, one stop bit.

NOTE
The PCTER program is similar to the standard communication program TER that enables the controller to
better manage disks.

Once the PCTER program is connected and activated, a message appears on the top of the screen:

«C.M.Z. PCTER VGA v 1.00 03/30/95»

It is then possible to switch on the controller.


If no self starting program has been installed in the system, the prompt message on the screen is:

CMZ Forth ...

followed by the system identifier and the operative system’s revision number. At pressing the Enter
key the system answers with the message ok indicating it is ready to work.

1.1 PLC RESET

Whenever the PLC cycle is activated, the system executes a total reset to initialise all working
memory areas and internal variables, or a partial reset to clear not retentive PLC variables.

1.1.1 Total reset

When the PLC is first started, a total reset is executed and all standard working memory areas are
allocated and cleared.
The PLC knows it has to execute a total reset because: a) memory areas are dirty (variable
FOR_PLC); b) after working areas have been modified (word PLC_CFG); c) in the systems
equipped with UNIPOW60 - power supply unit - , when a fixed number of switching-ons is
reached the number of power on with flat backup battery.

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chapter 1. OVERVIEW

The total reset procedure performs the following steps:


• Any running PLC cycle is stopped.
• All PLC’s internal variables are reset.
• Working areas are set with standard default values:
- from 1C8000 to 1D7BFD for CTE300 series controllers.
- from 107000 to 13DFFD for 331CPU systems.
• or with the values requested by the function PLC_CFG.
• All working areas are cleared.
• An AWL source code is searched in flash eprom. If found, it is loaded, compiled and executed
in RAM.

The user can force this condition as follows by the program PCTER:
• Stop the execution of all active tasks by pushing the keys Ctrl+Shift+Esc, then the Esc key
alone.
• Clear the variable FOR_PLC by typing the instructions:

0 FOR_PLC D! <enter>

Restart program execution by typing:


TASK <enter>

1.1.2 Partial reset

Each time the PLC is started, the partial reset is executed to reset only not retentive variables.

The partial reset procedure performs the following steps:

• The PLC cycle is started.


• Not retentive variables are reset.

This condition can be forced in the following way by using the program PCTER:

• Stop the execution of all active tasks by pushing the keys Ctrl+Shift+Esc, then only the Esc
key.
• Restart program execution by typing:
TASK <enter>

1.2 USING THE PLC PROGRAM WITHOUT A COEXISTING FORTH PROGRAM

1.2.1 CTE300

To start the PLC with PCTER program, type:


TASK <enter>

In this way the PLC cycle is activated. If necessary, at first starting a total reset procedure is
executed. The RUN/STOP condition maintains its last active condition (unless after a total reset, a

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331 SOFTWARE PLC user's manual ver. 3.11

flash eprom program is loaded automatically).

To enter programming and test video pages type:


PCPLC <enter>

Now the system is ready to work.


This system is normally not self-starting, so even further starts of the CTE300 will not activate the
PLC cycle. To modify it type:
1 FSTART C! <enter> (For a self-starting system)
0 FSTART C! <enter> (For a not selfstarting system)

When the PLC program is set, it must be stored in flash eprom (see correspondent chapter) and
made completely selfstarting by typing:
AUTOPLC <enter>

NOTE
If the PLC program is selfstarting, when the controller is switched on the PLC cycle will be activated but the
RUN/STOP condition will remain the same until turning off.

1.2.2 331CPU

For the 331CPU systems the program is normally selfstarting: at system starting, the keyword TASK
is automatically executed and the PLC starts, when necessary with a total reset. The RUN/STOP
condition maintains its last active condition (unless after a total reset, a flash eprom program is
loaded automatically).

For LCD and integrated keyboard systems(CTX618 and CTD913) also the user interface program is
activated.

To program this system by using a PC and the PCTER program, it is necessary to exit from the user
interface program in the LCD by pushing the key Esc on the integrated keyboard. When the system
gives the message:
Now PCPLC is enable.
press any key to resume.

on the PC keyboard type:


PCPLC <enter>

Now the system is ready to work.


As above described the system is selfstarting. To modify it, type:
0 FSTART C! <enter> (For a not self-starting system)
1 FSTART C! <enter> (For a self-starting system)

In a not selfstarting system, after switching on make the PLC system active by typing:
TASK <enter>

When the PLC program is set, it must be stored in flash eprom (see correspondent chapter) and
made completely selfstarting by typing:

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chapter 1. OVERVIEW

AUTOPLC <enter>

1.3 USING PLC PROGRAM WITH A COEXISTING FORTH PROGRAM

Please, note: for a better comprehension of this paragraph knowledge of the FORTH language
is necessary.

To develop a part of the application software in FORTH, the following rules are extremely
important:
- the source code program and the AWL object code on the standard version occupy the RAM
memory from 1C8000 to 1D7BFD for CTE300 series controllers and from 107000 to 13DFFD for
the CTX and CTD series controllers (331CPU card). The standard assignment can be modified
from the OPTIONS video page (later described) or by using the FORTH keyword PLC_CFG.
Note that changing the default memory assignments causes the complete clearing of the source
code program, of the object code program and of all the PLC internal variables (total reset).
- The PLC cycle runs on task 4 and needs at least 1 millisecond of waiting time at the end of the
cycle scan.
- The PLC user interface runs as a keyword (child process) of the calling task.

Some FORTH keywords provided in the system firmware enable to activate various sections of the
PLC program and to select some options. These keywords are:

PLC_CFG

It configures PLC memory areas and resets PLC internal variables. In case of total reset or when
PLC memory areas assignment are changed, the source code and AWL object code are cleared and
a source code program is searched first in the internal flash eprom, then in the external one (if
installed) starting from the bank 0. If the source code is found, it is loaded, compiled and set to
RUN. If more than one source code program are found, the newest is loaded.
The search modality of the source code program in flash eprom depends on the bank access mask.

Syntax: ram1 ram2 flash1 flash2 mask ---


Arguments: ram1 Ram area initial address (only multiples by 4 ).
ram2 Ram area end address (only multiples by 4 -1).
flash1 Flash eprom area start address (only multiples by 4).
flash2 Flash eprom area end address (only multiples by 4 -1).
mask Flash eprom bank access mask
bit 0 enable internal F.E.
bit 8 enable external F.E. bank 0 (not relevant for CTE300)
bit 9 enable external F.E. bank 1 (not relevant for CTE300)
bit 10 enable external F.E. bank 2 (not relevant for CTE300)
bit 11 enable external F.E. bank 3 (not relevant for CTE300)

STD_CNF

It returns default values for the word PLC_CFG.

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331 SOFTWARE PLC user's manual ver. 3.11

Syntax: --- ram1 ram2 flash1 flash2 mask


Arguments: ram1 Ram area initial address.
ram2 Ram area end address.
flash1 Flash eprom area start address.
flash2 Flash eprom area end address.
mask Flash eprom bank access mask
bit 0 enable internal F.E.
bit 8 enable external F.E. bank 0 (not relevant for CTE300)
bit 9 enable external F.E. bank 1 (not relevant for CTE300)
bit 10 enable external F.E. bank 2 (not relevant for CTE300)
bit 11 enable external F.E. bank 3 (not relevant for CTE300)

GO_PLC

It verifies that initialisation with PLC_CFG has been achieved. If so; all not retentive variables are
cleared and the PLC executor is activated. The cycle starts without changing the run/stop state or
AWL program in memory.

Syntax: ---

GO_EDIT

It starts PLC user interface. This word is usually called from a FORTH program by a special softkey.

Syntax: x1 y1 x2 y2 chser col1 col2 col3 col4 col5 col6 ---


Arguments: x1 Upper left corner column.
y1 Upper left corner line.
x2 Lower right corner column.
y2 Lower right corner line.
chser Number of main serial port for disk management (-1= current serial port)
col1 Screen colour.
col2 Reverse screen colour
col3 Windows colour
col4 Reverse windows colour
col5 Softkey colour.
col6 Reverse softkey colour.

The example below shows some words to enclose in FORTH sources for a proper PLC start.

( ---------------------------------------------------------------
( Starts PLC user interface to be hooked to a softkey
( of the FORTH user interface.
( This word can not be used for the CTE300 series systems.
( ---------------------------------------------------------------
: COLL_PLC
0 0 79 23 ( Screen co-ordinates
-1 ( Use current serial port
$ 17 $ 71 ( Screen colour
$ 70 $ 07 ( Windows colour
$ 30 $ 0F ( Softkey colour
GO_EDIT ( Launch user interface program.
AZP ( Repaint current video page
;

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chapter 1. OVERVIEW

( ---------------------------------------------------------------
( Execute user application program total reset
( This word must execute all variables initialisation
( of the application program.
( ---------------------------------------------------------------
: ResetApp
( *** Initialise application program variables
...
...
( *** Set the total reset flag for the user application program
$ 12345678 ForApp D!
;

( ---------------------------------------------------------------
( System unconditional total reset.
( ---------------------------------------------------------------
: RESETT
RESETT ( Call reset procedure for basic library program
ResetApp ( Application program total reset
;

( ---------------------------------------------------------------
( System partial reset
( ---------------------------------------------------------------
: RESETP
RESETP ( Call partial reset procedure for basic library prog.

( ForApp D@ $ 12345678 <> ( *** Test for total reset


( IF ( *** only for library program
( ResetApp ( *** NOT ON THE USER APPLICATION PROGRAM
( THEN ( ***
( ***** Initialisation of application program variables
...
...
;

( ---------------------------------------------------------------
( TASK Start
( N.B. The addresses for PLC memory areas are valid only for systems
( with 331CPU
( ---------------------------------------------------------------
: TASK

1000 %WAIT ( Wait for possible interruption from keyboard.

( ***** Test the execution of total reset


ForApp D@ $ 12345678 <> ( Test flag of appl. program total reset
?RESETT OR ( Test flag of operative system total reset
IF
RESETT ( Execute total reset on all programs
( ***** PLC configuration
$ 120000 $ 12FFFF ( PLC buffer
$ 310000 $ 33FFFF ( Internal flash eprom area
% 011000000000 ( Enable bank 2 and 3 external flash eprom
PLC_CFG ( PLC configuration

( ***** Axes program configuration


( or any other package

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331 SOFTWARE PLC user's manual ver. 3.11

( NOT TO BE DONE ON THE LIBRARY PROGRAMS


( BUT ONLY ON THE USER APPLICATION PROGRAM
5 N.ASSI ! ( Set 5 axes
$ 105000 PUNT 5 4*+D! ( Set PUNT 5th axis
CM-RESETT ( Execute 5th axis total reset
1200 0 KN ! ( Set axes parameters
1000 0 KP !
1500 0 KI !
...
...
!RESETT ( Set total reset flag
THEN
RESETP ( Execute partial reset

( ***** Program starting operations


( ONLY ON THE USER APPLICATION PROGRAM NOT ON LIBRARY PROGRAMS
...
...
...
( ***** Start PLC program
GO_PLC ( Start PLC program
;

1.4 FLASH EPROM

The flash eprom is a non-volatile memory, whose content is not lost even if power is off. So when
the program debugging is finished, it has to be permanently stored in flash eprom.

The system has a flash eprom integrated on the CPU board (internal flash eprom) and an optional
card called SSDISK, which contains up to four memory banks (external flash eprom). SSDISK card
is not available for CTE300 systems because they only have an internal flash eprom.

The internal flash eprom is designed to contain FORTH programs and AWL source code. Instead,
each bank of the external flash eprom can contain only AWL source code or user program machine
parameters.

NOTE
We suggest to store AWL source programs only in the external flash eprom, because in case of CPU
substitution, it is not necessary to reload and compile the program and to reserve the internal flash eprom only
for program updating.

During operations on flash eprom the operative system can issue some information or error
messages; for their meaning see appendix G.

WARNING
As all operation on flash eprom disable interrupts, during their operation procedure programs
running on tasks and hooked to interrupts are momentarily suspended.

WARNING
Clearance of the internal flash eprom causes all tasks’ and all the interrupt routine service’s
automatic stop. Clearance requires user’s confirmation: when this operation is finished, the system
is restarted.

The use of flash eprom with CTE300 systems and 331CPU card based systems is slightly different.

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chapter 1. OVERVIEW

1.4.1 CTE300

The CTE300 system only has the internal flash eprom (128 Kb) where both FORTH programs and
AWL source code are stored.

An AWL source code can be stored only in the flash eprom area enabled by the word PLC_CFG (if
FORTH and AWL programs are not coexisting the whole flash eprom is normally available for the
PLC).
When an AWL source program is stored in flash eprom, it is queued to the previous.
To read an AWL source program, the program number must be specified.

In case of total reset the last program stored is loaded and compiled from flash eprom.

Only by using the DOS program RIGEN.EXE it is possible to erase which erase all the AWL source
program in flash eprom.

1.4.2 331CPU

The systems based on 331CPU card have either the internal flash eprom or the optional external
one.
The flash eprom integrated on the 331CPU card has a capacity of 256Kb (or optionally 512Kb) and
is divided in 8 logical blocks. In each logical block, FORTH programs or AWL source programs can
be stored.

An AWL source code can only be stored in the flash eprom area enabled by the word PLC_CFG.
The limits set by the word PLC_CFG must match with the addresses of start and end block:

Block number 331 with 256 Kb 331 with 512 Kb


1° $ 300000 ÷ $ 307FFF $ 300000 ÷ $ 30FFFF
2° $ 308000 ÷ $ 30FFFF $ 310000 ÷ $ 31FFFF
3° $ 310000 ÷ $ 317FFF $ 320000 ÷ $ 32FFFF
4° $ 318000 ÷ $ 31FFFF $ 330000 ÷ $ 33FFFF
5° $ 320000 ÷ $ 327FFF $ 340000 ÷ $ 34FFFF
6° $ 328000 ÷ $ 32FFFF $ 350000 ÷ $ 35FFFF
7° $ 330000 ÷ $ 337FFF $ 360000 ÷ $ 36FFFF
8° $ 338000 ÷ $ 33FFFF $ 370000 ÷ $ 37FFFF

An AWL source program can only be stored in the external flash eprom in the banks enabled by the
mask defined with the word PLC_CFG.
When an AWL source program is stored in flash eprom, it is queued after the previous.
To read an AWL source program, first specify bank and program number.

In case of total reset, the last stored program is reached and compiled, starting from the internal flash
eprom in the those external one starting from bank 0.

It is possible to erase the external flash eprom from the PLC user interface only if the external bank
is enabled, while it is possible to erase the internal flash eprom only if all banks contain exclusively
AWL source programs and the word AUTOPLC has not been used.

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331 SOFTWARE PLC user's manual ver. 3.11

1.5 FEATURES

Typical execution time for 1000 instructions 6 ms for CTE300


2 ms for 331CPU
RAM memory capability 100Kb (approx. 5000 instr.) for CTE300
240Kb (approx. 12000 instr.) for standard 331CPU
500Kb (approx. 25000 instr.) for 331CPU with
memory expansion.
In the Ram are stored: the AWL source program, the PLC
object program and PLC variables. The presence of an user
FORTH program reduces the memory for AWL.
FLASH EPROM memory capability. 128 Kb for CTE300
256 Kb or 512 Kb for 331CPU
4× 128 Kb for SSDISK card (only for 331CPU)
Merkers 2048 : M0.0÷ M255.7
Retentive 512 : M0.0÷ M63.7
Not retentive 1536 : M64.0÷ M255.7
The AWL program can modify the program number of
merkers up to 480000 merkers (from M0.0 to M59999.7).
Timers 128 : T0÷ T127
Retentive 32 : T0÷ T31
Not retentive 96 : T32÷ T127
The AWL program can modify the number of timers up to
2000 timers (from T0 to T1999).
Time range 0 ÷ 2147483647 "/100
Counters 128 : Z0÷ Z127
Retentive 8 : Z0÷ Z7
Not retentive 120 : Z8÷ Z127
The AWL program can modify the number of counters up to
5000 counters (from Z0 to Z4999).
Count range -2147483648÷ 2147483647
Data memory 512 byte : ÷ DB511 (DW510 or DD508)
The AWL can modify the program number of data memory
up to 60000 byte (from DB0 to DB59999).
AWL instructions set 95 instructions

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chapter 2. DESCRIPTION OF VIDEO PAGES

chapter 2. DESCRIPTION OF VIDEO PAGES

NOTE
The following paragraphs refer to standard video pages generated for the PC in which the PCTER program is
running. instructions and information are the same if the PLC user interface runs on the integrated terminals of
the CTX618 and CTD913 systems or with non-standard video pages. For keyboard control of CTX618 and
CTD913 systems see the table in paragraph D.2.

The PLC user interface works when the PC is connected to the system by means of video pages
herein explained in detail. To enter these video pages type the word PCPLC from PC keyboard.
By typing PCPLC /C dimension and colours of the PLC user interfaces video pages can be
changed.

2.1 MAIN MENU

The first video page is the Main menu from where all other video pages can be entered.

The softkeys used are here briefly described.

F1 key is always active and present with the same meaning in all video pages. Its function is to set
the PLC in STOP or RUN state that is to stop or enable the PLC cycling. The state of actual system
is shown in the top right corner of the screen.
When the PLC cycle is not operative, switching from STOP to RUN is not possible.

F2 key enters the Editor program.

F3 key enters the video page for I/O test and variables.

F9 key enters the OPTION video page, where some options can be selected: the length of the
memory buffer for editor program, the PLC cycling time and the flash eprom management.

Esc key exits the PLC user interface and returns to the FORTH environment or to the calling

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331 SOFTWARE PLC user's manual ver. 3.11

FORTH program, if existing.

The following video pages can be entered from the Main Menu’s function keys above described.

2.2 TEST

This video page can be entered from the main menu by pushing F3 key. From here it is possible to
verify and modify the state of all AWL variables. he same action and result can be achieved with the
function VIEW in the editor program.
The video page is as following:

The video page has three columns repeated twice:


• the first column shows the variable identifier string. The name of the variable to test must be
typed here.
• the second column represents the numerical basis with which the variable is shown.
• the third column represents the variable value which is continuously shown. It can also be
modified.

To change from an input field to another, use arrow keys. To erase an input field just use the
Backspace key on it. Note that the less the number of fields is, the faster fields updating is.

To identify the variables see the rules explained in the paragraph 4.1.1. The following table lists
recognised variables.

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chapter 2. DESCRIPTION OF VIDEO PAGES

Variable Base Modif. Description


Ex.y b YES State of input x.y (memory image)
EBx b/d/h YES State of input byte x (memory image)
EWx d/h YES State of input word x (memory image)
EDx d/h YES State of input double word x (memory image)
Ax.y b YES State of output x.y
ABx b/d/h YES State of output byte x
AWx d/h YES State of output word x
ADx d/h YES State of output double word x
Mx.y b YES State of merker x.y
MBx b/d/h YES State of merker byte x
MWx d/h YES State of merker word x
MDx d/h YES State of merker double word x
DBx b/d/h YES State of data byte x
DWx d/h YES State of data word x
DDx d/h YES State of data double word x
Tx d NO Timer value x
Zx d NO Counter value x
PEx b/d/h NO State of input byte x

When a variable is modified by the user, its effect might be temporary; the same when set by the
PLC program because its state is forced by the PLC cycle.

WARNING
If the PLC is set to STOP the input memory image is not updated. To verify the input state in this
condition, use the PEx variable rather than Ex.y, EBx, EWx or EDx.

2.2.1 Keys assignment

F1 key changes PLC state, from STOP to RUN or viceversa.

F2 key enter the Editor program described in chapter 3.

F3 key resets the bit state on which the cursor is (only if visualised on the binary).

F6 key changes the base for data visualisation.

F7 key freezes the variables visualisation.

Esc key returns to the main menu.

2.3 OPTION

The F9 key enters in the MAIN MENU this video page. Some standard values and parameters can
be changed.

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331 SOFTWARE PLC user's manual ver. 3.11

2.3.1 Key assignment

F1 key changes PLC state from STOP to RUN or viceversa.

F2 key enables modifications on the working area memory allocation. This function, which is
operative only if the address or length of the PLC memory area have been modified, sets the PLC
to STOP and erases the AWL source code from the memory.

F3 key reads AWL source program previously stored in flash eprom (see paragraph 1.4).

F4 key stores AWL source program in flash eprom (see paragraph 1.4).

F5 key erases the specified flash eprom bank. This function is not available on systems having only
the internal flash eprom (CTE300).

WARNING
Erasing the internal flash eprom causes the automatic stop of all tasks and of the interrupt routine
service. The flash eprom erasure requires for confirmation and. When this operation is finished, the
system is restarted.

F6 key selects hexadecimal or decimal base of input/output values for the working areas and length
PLC work area.

F7 key selects visualisation in continuous mode according to maximum cycling time (in the second
case to force calculation of the maximum value press F7 key twice).

Esc key returns to the main menu.

2.3.2 Parameters description

The cycling time is the PLC cycle duration: it is obtained by inserting a time break of the PLC
TASK at the end of every cycle. The time break is given by the set cycling time less the measured
cycling duration. The default value is 20 ms and it cannot be less than the effective cycle duration.

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chapter 2. DESCRIPTION OF VIDEO PAGES

However at least one millisecond is necessary to enable lower priority tasks to work. If PLC’s set
cycling time is close to the real cycle duration, the PLC program will run faster but other TASKs will
be slower.
The real cycle duration measured is updated only if the measured duration is higher than the one
currently visualised. To know the real cycle duration at every time, press F7 key. A new pressure of
F7 key will restore the maximum visualisation value, then the maximum value will be erased and
recalculated (whenever the OPTIONS video page is entered, the maximum cycle duration time is
visualised).

The editor priority enables to modify the editor priority to speed the user interface program.
Remember that the system is multitasking and the AWL control program runs on task number 4,
while the user interface program runs on task 0. Task 0 has the lowest priority, so if the AWL cycle
is very heavy (or there are other tasks running) the user interface program will not be very efficient.
By typing in this field a value other than zero (from 1 on) task 0’s priority is increased and the PLC
user interface program can run faster.
This option must be used only when necessary to modify the program and in all those cycle phases
where no maximum speed for program cycle is required.

WARNING
To increase task 0’s priority, the other tasks’ priorities must be contemporaneously decreased (also
the AWL program cycle execution task). It should be noted that in some operations the task 0 can
become very heavy (for example when the TEST video page has to show many fields or in the
VIEW function or disk operations) and the AWL cycle execution may be very slow and dangerous.
The editor priority must be reset to zero as soon as possible in order to guarantee the maximum
execution time for all other tasks.

The work area is composed by two fields that are respectively the initial and final address of the
memory buffer where the AWL program is stored (source+object).
The initial address (left field) must always be an even number, while the final address (right field)
must always be an odd number.
The input of one of these values updates the working area length.
The length PLC work area is the buffer memory size that is automatically calculated as the
difference between the initial address and final address. Also this new value can be inserted, in this
case the final address is updated in the working area.

WARNING
Once the working area memory allocation has been modified, the operation must be confirmed by
pressing key F2, in order to completely erase the source and the object program.
Note that the system performs no control on the exactness of the values inserted, so it is better not
to give addresses and/or lengths that can overlap RAM areas reserved to other application or
referring to not existing RAM areas (see the system memory map).

Language . When the cursor is in this field, you can select the language: ITALIAN or ENGLISH by
pressing any alphanumerical key.

Program number as read from flash eprom. You can choose which program stored in flash eprom
to move in the RAM memory.

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Flash eprom access enables to choose which of the following operations is to be executed in the
internal flash eprom or in the external one. This parameter is not available for systems with internal
flash eprom only (CTE300).

The flash eprom bank number, shows flash eprom’s bank number (from 0 to 3) of in the SSDISK
card, to which all the following commands on flash eprom will refer. This parameter is not available
for systems with internal flash eprom only (CTE300).

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chapter 3. EDITOR PROGRAM

chapter 3. EDITOR PROGRAM

3.1 DESCRIPTION

Enter the Editor program from the main menu by pressing key F2 (Edit). The video page appears
as in the following picture:

The first area, under the word Nseq, is the line number and is automatically generated by the PLC
editor program.

The second area, under the word Action, is the instructions’ mnemonic code. The cursor is normally
in this field.

An asterisk on the top left means that the text currently in memory does not match the running
AWL program (the source code has been modified from the last compilation).

3.1.1 Keys assignment

The use of arrow keys is similar to that of other editors and allows the cursor movements.

The PgUp and PgDn keys scroll up and down the AWL source code on the screen.

The Home and End keys move the cursor at the beginning/end of the line if pressed once, at the
beginning/end of the page if pressed twice or at the beginning/end of the source code if pressed
thrice.

The Enter key gives a carriage return.

The BackSpace key erases one character on the left of the cursor and all the other characters in the
line move left. If the cursor is on the first character of a line, the other characters move up to the end
of the previous line.

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The Del key erases the character on which the cursor is positioned and all the other characters in the
line move left. If the cursor is at the end of the line the following line moves up.

The Ins key enables to choose between characters introduction mode: insert mode (INS) and
overwrite mode (OVR), that appear on the top left of the screen.

By pressing the keys Ctrl+Z a current video page refresh is forced.

The Shift+F1 key changes the Select text mode. Once the text has been selected, the cursor can be
moved to define the selected block that is highlighted in reverse. Note that only entire lines can be
selected, not just parts of them.

The Shift+F2 key deletes the selected block, the block deleting requires an user confirmation.

The Shift+F3 key deletes the selected block and copies it in a temporary area (positioned at the end
of the editor buffer). When the temporary area is full to contain the selected text, an error message is
issued and the operation is aborted.

The Shift+F4 key copies the selected block in a temporary area. When the temporary area is full to
contain the selected text an error message is issued and the operation is aborted.

The Shift+F5 key inserts the text stored in the temporary area at the cursor position.
At the end of the operation the instruction to erase the block contained on the temporary area must
be confirmed. If there is not enough memory to insert the block, an error message is issued and the
operation is aborted.

The Shift+F6 key enables to position the cursor on the desired row. At program request insert the
line number to reach included between 0 and the last text line.

The Shift+F7 key enables searching for a text string (20 characters length max.). The string search
starts from the cursor position. The cursor stops when it finds the string.

The Shift+F8 key enables to continue searching.

The Shift+F9 key enables to substitute the string with another (20 characters length max.). It is
possible to confirm every single substitution or to execute a global substitution in all the text.

The F1 key changes the PLC state from STOP to RUN or viceversa.

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F2 key (TEST) enters the TEST video page described in the previous chapter.

F3 key (VIEW) enables to visualise, at the right of the instructions, a window with the operands’
logical state or numerical values of the AWL lines.
Note that this visualisation mode is asynchronous with the PLC cycle.
The VIEW function is similar to the TEST video page (see the paragraph 2.2 for the meaning of the
function keys and to modify the variables).

To exit from this window use the Esc key.

With F4 key (FILES) enables to enter the FILES video page that will be described in paragraph 3.2.

F5 key (ERROR) enables searching for the source code line where the RUN TIME error has
occurred.

F6 key (SINTAX) checks the syntax of the AWL source program. The syntax check detects the
errors made during the AWL source code editing (see appendix G for errors list). At the end of this
operation if no errors are found, the following window will be displayed:

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This window shows the source code length, the object code length, the system memory area length
and the available memory (if the working area is not large enough an error message will be issued
indicating that memory is insufficient, the free memory value and a negative number that is the
amount of memory needed).
When an error is found, the corresponding error message will be displayed on the screen and the
cursor will go to the program line where the error was found.

F7 key (COMPIL) enables the compilation of the AWL source code to create the object the PLC
cycle will execute. The compilation first check the syntax then, if no errors are found, generates the
object code. Note that during the object code creation, the PLC is temporarily stopped then reset to
the previous state before compiling.
At the end of this operation the following window will be displayed:

This window shows the source code length, the object code length, the system memory area length
and the available memory.

F9 key (HELP) opens a window where the meaning of those function keys not described in the last

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chapter 3. EDITOR PROGRAM

row of the editor video page is explained.

The Esc key (EXIT) returns to the main menu.

3.2 THE FILES VIDEO PAGE.

The FILES video page can be entered by pressing the F4 key from the EDITOR page. It disk
loading and saving operations of AWL programs. This page also shows the subroutines list stored in
memory. By moving the cursor on a subroutine name and pressing the key F4 (or Enter) it is
possible to edit only the selected subroutine (to edit the whole program, underline the file name).

On the top left of the screen the message "Disk:ON" or "Disk:OFF" indicates if the disk
management is enabled or not (Disk management is automatically enabled if the system is
connected to a PC with the program PCTER.EXE).
On the left side of the screen the message Memory indicates the amount of free editor memory
buffer(in percentage).

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The current file name of the program in memory, its creation date and time and the current path are
also visualised.

3.2.1 Keys assignment

The function keys enabled in this video page are:

The F2 key (SAVE) enables the programmer to save on disk the AWL program in memory, created
with the PLC editor or loaded in RAM from the flash eprom. The file is saved in ASCII format so it
can be modified with any other ASCII text editor. If no file extension is specified the editor
automatically adds the extension .AWL. To save a file without extension just add a point at the end
of its name.

The F3 key (LOAD) loads a program from disk.


To load the wanted program type the file name then press the Enter key. If no extension is specified
the editor adds automatically the extension .AWL. To load a file without extension just add a point
at the end of the name.
The "Program List" will be automatically updated, the editor current buffer will be initialised but not
the memory area meant for the object code. If the specified file name doesn't exist the current buffer
will not be lost.

The F4 key (EDITOR) enters the PLC editor that enables to write and modify the AWL programs.
When entering the first page of the AWL source code will always be displayed.

The F5 (DIR) or Shift+F5 keys (DIRW) can show the directory of the current path. After typing the
search mask (the default mask is *.*) the directory is shown in full format (F5 key) FILENAME,
LENGTH, DATE and TIME or in short format (Shift+F5 key) where only the file name is
displayed, as for the DOS command DIR/W. If the directory occupies more than a video page, press
a key to display the following.

The F6 key (ERASE) erases the whole editor buffer (but not the memory area for the object code).
Confirmation is always required.
The Shift + F6 key (DELETE) deletes a file from disk. The file name must be specified.

The F8 key (PATH) changes the current path. If there is a specified path, when operating on disk,
the file name (or the file mask if creating a directory) will be added to the current path only if the
first character is not '\' and the second is not ':' (in these cases the name already contains the path
specification). If no path is specified the operation will be dealt on the driver and current path. (All
DOS rules about path names are valid).

The Esc key (EXIT) returns to the main menu.

During disk operations some error or warning messages could be issued on the screen; for their
meaning see appendix G.

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chapter 4. PROGRAMMING

There are three ways to edit an AWL source program:

1. to use the controller built-in PLC EDITOR.


2. to type the AWL source program on a PC using any editor for ASCII files, then load the source
file in the PLC memory by means of the function of the FILES video page in the PLC EDITOR.
3. to load the AWL source program, written with a PC, by using the MS-DOS program "BLOAD".

The PLC Editor enables to write a program in instruction list, to compile it and correct syntax errors
or to modify it. Every character typed from the keyboard is stored in the editor buffer. It is not
necessary to press the Enter key to confirm. The editor buffer occupies the first part of the PLC
buffer.

NOTE
Even if the program can define the operand maximum value, form hereon the maximum operand value will
always be considered as the default one .

4.1 EDITING A PROGRAM

Before analysing how to edit a program in instructions list, the programming language will be
shortly introduced.

4.1.1 Instruction syntax

Every instruction is represented on the screen with a line number (automatically generated by the
editor), a mnemonic code indicating the kind of instruction and function, and an operand (if
necessary). Only the last two fields are stored in memory (the line number is not stored).

LINE MNEMONIC OPERAND


27 U M0.0
bit number
byte number
operand type
logical operation
line number

In the PLC program language the following operand code can be used:

E Input Physical on/off input from process to PLC

A Output Physical on/off output from PLC to process

M Merker One bit memory for binary results

K Constants Identifies a constant value during the data loading operations, in all
other cases it identifies a front panel key

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D Data Memory for numerical data in a byte mode, word or double word.

T Timers Memory for timing operations

Z Counters Memory for counter operations

DS Data system System variables

The input E and the output A must be followed by the byte number (for byte is a group of 8 inputs
or 8 outputs) and the input or the output’s number in this byte.

Example: E0.0 represents the input 0 of byte 0.


E2.4 represents the input 4 of byte 2.
A1.3 represents the output 3 of byte 1.

The merker M must be followed by the byte number and the bit number (the byte number must
range between 0 and 255, while the bit number must range between 0 and 7). The PLC has a
maximum of 256 * 8 = 2048 merker.

Example: M0.0 means bit 0 of byte 0.


M2.4 means bit 4 of byte 2.

NOTE
The first 64 merker’s bytes are retentive, that is they maintain their value when the system is turned off and on.
All other bytes are cleared.

The data D (the PLC has a maximum of 512 data byte) can be processed as byte, word or double
word and must be followed by one of these three letters B, W, D, which mean Byte, Word and
Double-word for the operand and by an integer number as identifier.
This number must be:

between 0 and 511 for data-byte (DB).


an even number between 0 and 510 for data-word (DW).
an even number between 0 and 508 for double-word (DD).

Example : DB3 means data byte 3.


DW8 means data word composed of 2 bytes DB8 and DB9.
DD6 means data double-word composed of 4 bytes DB6, DB7, DB8 and
DB9.

The following picture represents three different configurations of the first 8 bytes in the data area.

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chapter 4. PROGRAMMING

byte0 byte1 byte2 byte3 byte4 byte5 byte6 byte7


DB0 DB1 DB2 DB3 DB4 DB5 DB6 DB7

DW0 DW2 DW4 DW6

DD0 DD4

DD2 DD6

Pay special attention to avoid memory overlapping, as shown in the following picture, where DD2
shares a DD0 word and a DD4 word.

DD0 DD4
DD2

The timers T and the counters Z must be followed by a number between 0 and 127 (128 timers and
128 counters are available).

Example: T2 means the timer number 2.


Z28 means the counter number 28.

The Call C must be followed by the name of an ASSEMBER subroutine or a FORTH word in the
vocabulary. If the word does not exist, an error message is issued during program compilation.

4.1.2 Program editing

As previously described an AWL program for PLC can be written on a PC by using any text editor
for ASCII files. The files stored in the disk must be loaded in PLC RAM memory using the
functions examined in paragraph 3.2. If the editor used is BRIEF by BORLAND ITALIA it is
possible to directly transfer the PLC source code without using the program PCTER for PC-PLC
connection (See the appendix in the BRIEF EDITOR CMZ manual with a the description of the
macros created for BRIEF connected to PCTER program).
Using the built-in PLC editor, that can be entered from the main menu by pressing F2, the source
program starting at the line 0 is shown on the screen. After a CPU total reset, this screen is usually
empty (if no programs are stored in eprom or flash eprom then load in RAM) and program editing
can start. If some unwanted instructions are in memory, they can be cleared with the command
previously described.
All syntax errors will be recognised only at the next compilation of the source code.

4.1.3 Comments

The comments are identified with the character * (asterisk). All the character written on the right of
the asterisk until the end of the line are considered comments and ignored by the compiler.
Example:

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* PROGRAM TURN ON A LIGHT


*
U E0.1 * TEST THE MAIN SWITCH
U E1.2 * TEST THE ALARM BUTTON
= A0.0 * TURN ON LIGHT
BE * END OF PROGRAM

4.2 STRUCTURED PROGRAMMING

The structured programming makes the comprehension of an AWL program easier. This method
consists in subdividing the program in more subroutines, each of them with a particular aim. The
execution of every subroutine depends on its definition. For example some subroutines are
executed when recalled on the main program, others according to different procedures.

The subroutine definition begins typing the character # at the start of the line followed by the name.
In addition the subroutine name identify its execution mode. Every subroutine must be ended with
the instruction BE.
The type of subroutines accepted by the compiler will be now analysed.

#DEFPLC

It identifies the starting of a PLC configuration subroutine.. In this subroutine, which must be the
first to be defined, only configuration parameters and not AWL instructions can be inserted. See the
following syntax:

MERKER x y Define the total number of merker bytes (x parameter) and the total number of retentive
merker bytes (y parameter). The x parameter can have a value between 4 and 60000 while y
can have a value between 0 and x.
Default = MERKER 256 64
DATA x Define the total number of data bytes (between 4 and 60000).
Default = DATA 512
COUNTER x y Define the total number of counters (x parameter) and the total number of retentive
counters (y parameter). The x parameter can have a value between 2 and 2000 while y can
have a value between 0 and x.
Default = COUNTER 128 8
TIMER x y Define the total number of timers (x parameter) and the total number of retentive timers (y
parameter). The x parameter can have value between 2 and 5000 while y can have a value
between 0 and x.
Default = TIMER 128 32
INPUT x Define the number of input bytes processed by the system (between 4 and 64).
Default = INPUT 32
The default value 4 is the only value accepted for x parameter in CTE300.
OUTPUT x Define the number of output bytes processed by the system (between 4 and 64).
Default = OUTPUT 32
The default value 4 is the only value accepted for x parameter in CTE300.
USER x Define the maximum number of #USER processable (between 2 and 1000).
Default = USER 40
BE Close subroutine #DEFPLC.

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Only values multiples of four are valid for all parameters

If standard packages are compiled in the system (for example the CAN network program) the
maximum value of #DEFPLC can be different in order to allow a proper configuration of the
package compiled (see package manual).

The #DEFPLC can be omitted as for some parameter definitions. In this case the parameters will be
given their values before last configuration.
All defined parameters are allocated in a memory area on the PLC buffer. This memory area cannot
exceed 64 Kbyte. The maximum value limits for every parameter are valid if the others maintain
their default value (for example, 60000 merker bytes and 60000 data bytes cannot coexist).
When the value of each parameter is reduced to its minimum, there is a better system performance
as the memory for AWL program is larger and the process speed is faster due to the lowered
quantity of timer and I/O.

Example:

* PLC configuration
#DEFPLC
MERKER 100 0 * 100 merker bytes not retentive
DATA 5000 * 5000 data bytes
COUNTER 2 0 * No counters, minimum value = 2
TIMER 10 2 * 10 timer the first 2 retentive
INPUT 4 * 4 input bytes
OUTPUT 4 * 4 output bytes
USER 6 * 6 #USER
BE

#MAIN x

It identifies the beginning of the main program, that is the program executed cyclically.
It can be followed by a numerical value that is the PLC cycling time in milliseconds (from 1 to 500).
In compiling time this value is assumed as the new cycling time, if no value is specified, the time
remains unchanged.

Example:

* Main program definition with cycling time of 10 msec


#MAIN 10
...
...
...
BE

#SUBTIMEx y

It identifies the beginning of a subroutine that has to be executed every y milliseconds. The
maximum number allowed of #SUBTIME is 4, identified by the values 0,1,2 and 3 (parameter x)
with time values from one millisecond to 32767 milliseconds (parameter y).
The programmer has to avoid inserting long instructions sequences in these subroutines (the
#SUBTIME duration cannot last more than one millisecond).

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The instructions AST and DST (see paragraph 4.3.11) enable the execution of every #SUBTIME.
After each compilation, every defined #SUBTIME is always enabled if its state has not been
previously modified by these instructions, otherwise it remains in the state (enabled or disabled)
given by the last instruction AST or DST executed.

Example: Three #SUBTIME with different execution time are below shown.

*
* Increase the DW0 every second
*
#SUBTIME 0 1000
INC DW0
BE
*
* Increase the DW2 every two seconds
*
#SUBTIME 1 2000
INC DW2
BE
*
* Copy the state of E0.0 in A0.0 every millisecond
*
#SUBTIME 2 1
L PE0 * Read input byte number 0
T EB0 * Update memory image
U E0.0 * Read E0.0
= A0.0 * Copy to output image
T PA0 * Update output byte number 0
BE

#RUN

It identifies the beginning of a subroutine that has to be executed when the PLC state changes from
STOP to RUN.
This subroutine normally contains the initialisation operations of the application program.
If the block #RUN has not been programmed, the default operation after switching from RUN to
STOP consists in clearing all the outputs, otherwise they remain unchanged.
After its execution the control is up to #MAIN.

Example: See #RESET. example

#START

It identifies the beginning of a subroutine that has to be executed at the start of the PLC cycle (word
GO_PLC or system power up).
If the block #START has not been programmed, the default operation at the PLC starting up is to
clear all the outputs, otherwise they remain unchanged.
After its execution the control is up to #MAIN while the subroutine #RUN is not executed.

Example: See #RESET. example

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#RESET

It identifies the beginning of a subroutine that has to be executed at every PLC total reset.
In case of total reset the program is moved from flash eprom to the RAM system and compiled so
the #RESET is executed.
If the block #RESET is not programmed, the default operation after the PLC total reset is to clear all
the outputs, otherwise they remain unchanged.
After its execution the control is given to #MAIN while the subroutines #START and #RUN are
not executed.

Example: At every PLC program starting up (all types) the DW0 and DW2 must be set to 100.

*
* Start after STOP->RUN
*
#RUN
JSR 0
BE
*
* Start after power up
*
#START
JSR 0
BE
*
* Start after total reset
*
#RESET
JSR 0
BE
*
* Program initialisation
*
#USER 0
L KZ100
T DW0
T DW2
L KZ0 * Reset all outputs
T AD0
BE

#STOP

It identifies the beginning of a subroutine that has to be executed when the PLC state changes from
RUN to STOP. After the execution of this subroutine the PLC is stopped, no other subroutines are
processed.
If the block #STOP is not programmed, the default operation after switching from RUN to STOP is
to clear all the outputs.

Example: When the PLC stops also the exe number 0 has to be immediately stopped (for more details on axes control,
see the manual Controlling axes with AWL).

#STOP
L KZ0
C w.asse
C cm-lock

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L KZ0 * Reset all output


T AD0
BE

#BATTERY x

It identifies the beginning of a subroutine that has to be executed at every system switching on
(before #START) if the backup battery state is flat.
After executing x system switching-ons with a flat battery, the operative system executes a TOTAL
RESET.
The system variables DS48 and DS49 enable to know the number of system switching-ons done
with flat battery and the maximum number of system switching-ons to be done with flat battery (x
parameter).
If the parameter x is not specified the maximum number of system switching-ons remains
unchanged (default value is 100).

Note: The #BATTERY subroutine works correctly only with systems having a power supply unit UNIPOW19 (for
CTE300) or UNIPOW60 (for CTX618 or CTD913).
Example: If more than 20 system switching-ons have been executed with a flat battery, the A1.2 output must be set to
indicate this error condition.

#BATTERY 100 * 100 maximum system power up


L DS48 * Reads the number of system switching-ons
L KZ20
>F * Bigger than 20
S A1.2
BE

#ERROR

It identifies the beginning of a subroutine that has to be executed at the following PLC starting up
after a PLC RUN TIME error.
When a PLC RUN TIME error is issued, the system is stopped. At the following starting up (if the
program is selfstarting this operation is instantaneous) this subroutine is executed before the
program launch, at the end of this subroutine the PLC remains in STOP until there is a manual
intervention.
The DS30÷DS36 enables to know the error number, while the DS46, after having corrected the
error, sets PLC to RUN.
If the block #ERROR is not programmed, the default operation at the starting up after a RUN TIME
error is clearing up all the outputs and the PLC remains in STOP.

Example: The output A0.0 indicates that the program is running correctly, if an error is detected this output must be
turned off, and a manual intervention is requested to fix this error condition.

* Main program
#MAIN
S RLC * Forces A0.0 turning on
S A0.0
...
...
BE
* RUN TIME errors handling routine
#ERROR

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S RLC * Forces A0.0 turning off


R A0.0
BE

#USER x

It identifies the beginning of an user subroutine that can be called from #MAIN or from any other
subroutine with the instruction JSR. Each user subroutine is identified by a number, the maximum
number is 40 #USER numbered from 0 to 39.
After the execution of this subroutine the control goes back to the instruction immediately following
JSR which has called the #USER.
A subroutine can recall itself and allow a recursive programming.
The maximum nesting level is limited by the return stack depth that can be different according to the
instructions or functions called. (It is normally possible to reach a depth of 100 nesting levels).

The following picture shows the generic organisation of a structured program.

#USER 1

#MAIN
...
JSR 1
BE
...

#USER 2 #USER 4 #USER n


... ...
JSR 2 JSR 4 .....
... ...
BE BE BE
...
JSR 3
#USER 3
...
BE

BE

Level 1 Level 2 Level 3 ..... Level xx

Example: The input E0.0 determines the functioning way (0=manual, 1=automatic). The manual cycle is managed by
#USER 10, the automatic cycle by #USER 11.

*
* Main program 20 milliseconds
#MAIN 20
UN E0.0 * Test if manual
= JSR 10 * Call #USER 10
U E0.0 * Test if automatic
= JSR 11
BE
*
* Manual managing
#USER 10
...
...
BE
*
* Automatic managing
#USER 11
...
...

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BE

#INT x

It identifies the beginning of a subroutine which is executed by the FORTH word Exeint or by the
assembler subroutine exeint that respectively need on the stack or on D0 register the number of
#INT to execute. A maximum of four #INT (from 0 to 3) are allowed. Calling a not existing
subroutine #INT does not generate errors because the default programming of every #INT is BE.
If a task calls an #INT while the PLC is in STOP this subroutine is not executed.

Example: When pressing F1 key, the user interface must start the zero search in axe 0.

*
* Zero positioning
*
#INT 0
U M100.0 * Zero positioning started exit from #INT
= BEA
L KZ0
C w.asse
C cm-rtac
UN M100.0
S M100.0
BE

In FORTH the following word must be written and hooked to the F1 key (the name of the word is an example).

: F1Q1 0 Exeint ;

#SUBCHECK

It identifies the beginning of a subroutine whose execution is conditioned by a particular bit of the
CONDITION CODE REGISTER inside the CPU, tested by the instruction CHK.
Within the #SUBCHEK subroutine it is possible to know by means of DS52 and DS53 the kind of
test and the value of a particular identifier given with the instruction CHK.

Example: DD100 cannot contain the value 0.

...
L DD100
CHK EQ 123 * Test Equal to the identifier 123
...

#SUBCHECK
L DS53
L KZ123
=F * SUBCHECK call from test with identifier 123
IF
L KZ1 * Put 1 in DD100
T DD100
ENDIF
BE

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4.3 THE INSTRUCTIONS

Note that for a correct use of the instructions the PLC works with a memory image of all the inputs,
which is updated at the beginning of each scanning, while the state of all the outputs is updated at
the end. In addition the operative system refreshes the outputs’ state every 10 milliseconds to enable
the output updating set by FORTH programs.

Update
inputs image

Program
execution

Outputs
updating

The combining-logical result of a sequence of instructions is stored in a memory cell called RLC. It
is normally loaded with the result from the first instruction; while during further instructions the
operands are combined in AND or OR with the RLC state and their value is modified if necessary.
There are two 32 bit-wide memories called ACC1 and ACC2 that can be used with many
instructions (see counters, timers, arithmetical operations and so on).

The following instructions list show belonging classes, possible operands and connections to the
RLC. In particular:

RLC dependent: indicates if the instruction is an RLC function


NO = The instruction is executed independently from the RLC value
YES = The instruction is executed only if RLC = 1
YESá = The instruction is executed only on RLC’s positive edge
YESâ = The instruction is executed only on RLC’s negative edge

Modify RLC: indicates if the instruction can modify RLC

RLC Limits: during the following logical-combining instruction, the RLC is reloaded (YES) or
combined (NO) with the operand logical state.

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4.3.1 Logical-combining instructions

The logical-combining instructions can enquire on the state of the specified operand and combine it
(AND or OR) to the RLC.

The U instruction enquires the operand on the logical state 1 and stores the result in combination
with an AND and RLC operation. If this enquiring instruction is the first of a series, the operand
value is copied in the RLC.

Belonging class: Logical-combining instructions


Allowed operands: E A M T Z K
RLC dependent: NO
Modify RLC: YES
Limits RLC: NO
See also: UN O ON = S R

Example: Turn on the output A0.0 only if the inputs E0.0 and E0.1 are on together.

E0.0 E0.1 A0.0

U E0.0 * Transfer to RLC the E0.0 state


U E0.1 * Logical AND between RLC (E0.0) and the E0.1 input
= A0.0 * The RLC (E0.0 AND E0.1) is copied in A0.0

UN

The UN instruction enquires the operand on the logical state 0 and stores the result in combination
with an AND and RLC operation. If this enquiring instruction is the first of a series, the operand
value is denied then copied in the RLC.

Belonging class: Logical-combining instructions


Allowed operands: E A M T Z K
RLC dependent: NO
Modify RLC: YES
Limits RLC: NO
See also: U O ON = S R

Example: Turn on the output A0.0 only when the input E0.0 is on and the timer T15 is not finished .

E0.0 T15 A0.0

U E0.0 * Transfer to RLC the E0.0 state


UN T15 * Logical AND between RLC (E0.0) and the T15 state
= A0.0 * The RLC (E0.0 AND T15) is copied to A0.0

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The O instruction enquires the operand on the logical state 1 and stores the result in combination
with an OR and RLC operation. If this enquiring instruction is the first of a series, the operand value
is copied in the RLC.

Belonging class: Logical-combining instructions


Allowed operands: E A M T Z K
RLC dependent: NO
Modify RLC: YES
Limits RLC: NO
See also: U UN ON = S R

Example: Turn on the output A0.0 only when at least one of the inputs E0.0 , E0.1 and E0.2. is on

E0.0 A0.0

E0.1

E0.2

O E0.0 * Transfer to RLC the E0.0 state


O E0.1 * Logical OR between RLC (E0.0) and E0.1
O E0.2 * Logical OR between RLC (E0.0 OR E0.1) and E0.2
= A0.0 * The RLC (E0.0 OR E0.1 OR E0.2) is copied in A0.0

ON

The ON instruction enquires the operand on the logical state 0 and stores the result in combination
with an OR and RLC operation. If this enquiring instruction is the first of a series, the operand value
is denied and then copied in the RLC.

Belonging class: Logical-combining instructions


Allowed operands: E A M T Z K
RLC dependent: NO
Modify RLC: YES
Limits RLC: NO
See also: U UN O = S R

Example: Turn on the output A0.0 only when the input E0.0 is on or the input E0.1 is off.

E0.0 A0.0

E0.1

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O E0.0 * Transfer to RLC the E0.0 state


ON E0.1 * Logical OR between RLC (E0.0) and denied E0.1
= A0.0 * The RLC (E0.0 OR NOT E0.1) is copied in A0.0

O (without operands)

The instruction O (without operands) allows to achieve the OR combination among groups of
logical-combining operations. That is, each group generates a partial RLC then combined with OR
and the previously calculated RLC. This instruction cannot be the first of an instructions series.

Belonging class: Logical-combining instructions


Allowed operands: No operands allowed
RLC dependent: NO
Modify RLC: YES
Limits RLC: YES
See also: O( U( )

Example: Turn on the output A0.0 if the inputs E0.0 and E0.1 are on, or the inputs E0.2 and E0.3 are on or the inputs
E0.4 and E0.5 are on.

E0.0 E0.1 A0.0

E0.2 E0.3

E0.4 E0.5

U E0.0 * Transfer to RLC the E0.0 state


U E0.1 * Logical AND between RLC (E0.0) and the E0.1 input
O * The RLC (E0.0 AND E0.1) is stored in a partial RLC
U E0.2 * Transfer to RLC the E0.2 state
U E0.3 * Logical AND between RLC (E0.2) and the E0.3 input
O * The RLC (E0.2 AND E0.3) is in OR with
* a partial RLC and stored
U E0.4 * Transfer to RLC the E0.4 state
U E0.5 * Logical AND between RLC (E0.4) and the E0.5 input
= A0.0 * The RLC is ORed with the partial RLC and the
* result is transferred to RLC. The RLC value is
* transferred to the A0.0 output

O(

The O( instruction is equivalent to the instruction O (without operands). It is better to use this
instruction in case of complex programming sequences and when groups of not logical-combining
operations have to be OR combined.

Belonging class: Logical-combining instructions


Allowed operands: No operands allowed
RLC dependent: NO
Modify RLC: YES

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Limits RLC: YES


See also: O U( )

Example: Turn on the output A0.0 when both the inputs E0.0 and E0.1 are on or when the Data Word 20 contains the
value 100.

U E0.0 * Transfer to RLC the E0.0 state


U E0.1 * Logical AND between RLC (E0.0) and the E0.1 input
O( * The RLC (E0.0 AND E0.1) is stored in a partial RLC
L DW20 * Load the Data Word 20 value
L KZ100 * Load value 100.
=F * Set the RLC if the two accumulators are equal
) * Close the instructions group
= A0.0 * The RLC is ORed with the partial RLC and the result
* is transferred to RLC. The RLC value is copied to the
* A0.0 output

U(

The instruction U( enables to execute the logical AND combination between instructions groups not
including only logical-combining operations. This instruction works as the instruction O( but its
partial result is AND combined with the previous.

Belonging class: Logical-combining instructions


Allowed operands: No operands allowed
RLC dependent: NO
Modify RLC: YES
Limits RLC: YES
See also: O O( )

Example: Turn on the output A0.0 when both the inputs E0.0 and E0.1 are on or when the Data Word 20 contains the
value 100.

U E0.0 * Transfer to RLC the E0.0 state


U E0.1 * Logical AND between RLC (E0.0) and the E0.1 input
U( * The RLC (E0.0 AND E0.1) is stored in a partial RLC
L DW20 * Load the Data Word 20 value
L KZ100 * Load value 100.
=F * Set the RLC if the two accumulators are equal
) * Close the instructions group
= A0.0 * The RLC is AND combined with the partial RLC and its
result
* is transferred to RLC. The RLC value is copied in the
* output A0.0

The instruction ) closes an instructions group opened by the instructions U( and O(.
A maximum of 8 parenthesis levels can be used in other words and a maximum of 8 groups of
instruction can be nested.
If the number of opened groups does not match with the number of parenthesis, an error message is

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issued during the AWL program compiling time.

Belonging class: Logical-combining instructions


Allowed operands: No operands allowed
RLC dependent: NO
Modify RLC: YES
Limits RLC: NO
See also: O O( U( )

Example: See the instructions O( and U(.

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4.3.2 Dynamic control instructions

This group (composed only by the instruction D) enables to detect the RLC’s leading edge.

The instruction D stores the intermediate result and so enables to simplify the operations aimed at
detecting the RLC’s leading edge. The operand of this instruction shall not be used in any other of
the program to avoid errors and unwanted results.

Belonging class: Dynamic control instructions


Allowed operands: M
RLC dependent: NO
Modify RLC: YES
Limits RLC: NO

Example: The PLC should test only the leading edge of the logical combination between the E0.0 input and the M4.2
merker. The result must be stored to the M64.3 merker and the auxiliary merker is M255.0.

E0.0 M4.2 M255.0 M64.3


D

U E0.0 * Transfer to RLC the E0.0 state


U M4.2 * AND between RLC and the M4.2 merker
D M255.0 * Detect the RLC’s leading edge of
= M64.3 * Store the result in M64.3. This merker remains
* in position 1 only for a PLC scanning cycle.

Note: Without instruction D the previous example can be written as following.

E0.0 M4.2 M255.0 M64.3

E0.0 M4.2 M255.0

U E0.0 * Transfer to RLC the E0.0 state


U M4.2 * AND between RLC and the M4.2 merker
UN M255.0 * AND NOT with the previous result (see below)
= M64.3 * Store the leading edge in M64.3. M64.3 remains in position
* 1 only for a PLC scanning cycle.
U E0.0 * Transfer to RLC the E0.0 state
U M4.2 * AND between RLC and the M4.2 merker
= M255.0 * Store the result

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4.3.3 Storing instructions

These instructions - no matter the RLC value - allow to modify the operand state.

The instruction = copies RLC’s value in the operand.

Belonging class: Storing instructions


Allowed operands: E A M
RLC dependent: NO
Modify RLC: NO
Limits RLC: YES
See also: U UN O ON S R

Example: Copy E0.0 input in the A0.0 output and in the merker M4.3.

E0.0 A0.0

M4.3

U E0.0 * Transfer to RLC the E0.0 state


= A0.0 * Copy RLC (E0.0) in the A0.0 output
= M4.3 * Copy RLC (E0.0) in the M4.3 merker

The instruction S sets the specified operand if RLC is 1.

Belonging class: Storing instructions


Allowed operands: E A M
RLC dependent: YES
Modify RLC: NO
Limits RLC: YES
See also: = R ZV ZR

Example: Set the merker M5.0 as soon as the input E0.0 takes the logical state 1. Any other change in E0.0 input’s value
will not modify merker M5.0.

E0.0 M5.0
S

U E0.0 * Transfer to RLC the E0.0 state


S M5.0 * If RLC (E0.0) = 1 the merker M5.0 is settled

The instruction R resets the specified operand if the RLC is 1.

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Belonging class: Storing instructions


Allowed operands: E A M
RLC dependent: YES
Modify RLC: NO
Limits RLC: YES
See also: = S ZR ZV SE YES SS SA SV

Example: Further to the previous example, the merker M5.0 should be reset in case the input E0.1 takes the logical value
1.

E0.0 M5.0
S

E0.1 M5.0
R

U E0.0 * Transfer to RLC the E0.0 state


S M5.0 * If RLC (E0.0) = 1 the merker M5.0 is set
U E0.1 * Transfer to RLC the E0.1 state
R M5.0 * If RLC (E0.1) = 1 the merker M5.0 is reset

S (RLC)

The instruction S with the operand RLC unconditionally sets to 1 the value of RLC.

Belonging class: Storing instructions


Allowed operands: RLC
RLC dependent: NO
Modify RLC: YES
Limits RLC: NO
See also: R (RLC)

R (RLC)

The instruction R with the operand RLC unconditionally sets to 0 the RLC value.

Belonging class: Storing instructions


Allowed operands: RLC
RLC dependent: NO
Modify RLC: YES
Limits RLC: NO
See also: S (RLC)

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4.3.4 Timing instructions

These instructions allow to set the 128 timers available.


Each timer is composed of a timer and an internal relay. Its logical state is 0 or 1 depending on the
starting instruction given.
The timer preset value must be contained in ACC1 and expressed in hundredth of seconds.
The timer can be tested by reading the internal relay with the logical-combining instructions. In
addition it is possible to read the timer’s counting value at every moment by a loading instruction.

NOTE
It is not possible to start the same timer more than once within an AWL program, because the PLC cannot detect
the leading edge of the logical operation starting the timer, so it does not work correctly.

SI

The instruction SI starts an impulse timer. The time counting begins with the RLC‘s leading edge;
the timer output is set when the timer starts and is reset when the time counting is over or reset or if
the RLC goes back to zero. The timer’s counting value must be expressed in hundredths of seconds
and stored on ACC1 when the timer starts.

Belonging class: Timing instructions


Allowed operands: T
RLC dependent: YES
Modify RLC: NO
Limits RLC: YES
See also: SE SS SA SV

Example: The output A0.0 must follow the state of input E0.0 but it cannot be activated for more than 40 seconds. (See
following diagram). If the input E0.1 goes to 1, the output A0.0 must be reset in any case.

SIGNAL STATE

E0.0

E0.1

A0.0
Timer
40 seconds

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T0
E0.0
SI
S

KT400.1 K

E0.1 A0.0
R OUT

U E0.0 * Transfer to RLC the E0.0 state


L KT400.1 * Load in ACC1 a time constant of 400 tenth of seconds
SI T0 * Start the timer T0
U E0.1 * Transfer to RLC the E0.1 state
R T0 * Reset (if RLC=1) the timer T0
U T0 * Transfer to RLC the logical state of timer T0
= A0.0 * Transfer RLC to A0.0

SV

The instruction SV starts a timer as an extended impulse. The time counting begins with the RLC
leading edge, the timer output is set when the timer starts and is reset when the time counting is over
or when the timer is reset. The time counting value must be expressed in hundredths of seconds and
stored on ACC1 when the timer starts.

Belonging class: Timing instructions


Allowed operands: T
RLC dependent: YES
Modify RLC: NO
Limits RLC: YES
See also: SE SS SA SI

Example: The output A0.0 must be set for 40 seconds each time the input E0.0 goes to 1 (even if less than 40 seconds).
Anyway the output A0.0 must be cleared by the input E0.1.

SIGNAL STATE

E0.0

E0.1

A0.0
Time
40 seconds 40 seconds

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T0
E0.0
SV
S

KT400.1 K

E0.1 A0.0
R OUT

U E0.0 * Transfer to RLC the E0.0 state


L KT400.1 * Load in ACC1 a time constant of 400 tenths
SV T0 * Start the timer T0
U E0.1 * Transfer to RLC the E0.1 state
R T0 * Reset (if RLC=1) the timer T0
U T0 * Transfer to RLC the state of the timer T0
= A0.0 * Transfer RLC to A0.0

SE

The instruction SE starts a timer as a delay in insertion. The timer count begins with the RLC
leading edge, the timer output is settled when the timer is over and the output is reset when the RLC
goes back to zero, or when the timer is reset. The RLC starting the timer must last longer than the
preset timer. The time counting value must be expressed in hundreds of seconds and stored in
ACC1 when the timer starts.

Belonging class: Timing instructions


Allowed operands: T
RLC dependent: YES
Modify RLC: NO
Limits RLC: YES
See also: SV SS SA SI

Example: The output A0.0 must be set 40 seconds after the input E0.0 was activated and must be reset when the input
E0.0 goes to zero. Anyway the output A0.0 must be reset by the input E0.1. If the input E0.0 is active for less than 40
seconds the output A0.0 cannot be set.

SIGNAL STATE

E0.0

E0.1

A0.0
Time
40 seconds 40 seconds

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T0
E0.0
SE
S

KT400.1 K

E0.1 A0.0
R OUT

U E0.0 * Transfer to RLC the E0.0 state


L KT400.1 * Load on ACC1 a timer constant of 400 tenths
SE T0 * Start the timer T0
U E0.1 * Transfer to RLC the E0.1 state
R T0 * Reset (if RLC=1) the timer T0
U T0 * Transfer to RLC the state of the timer T0
= A0.0 * Transfer RLC to A0.0

SA

The instruction SA starts a timer as a delay in disinsertion. The timer counting begins with the RLC
falling edge, the timer output is set with the RLC leading edge and reset when the timer is over or
reset. The time counting value must be expressed in hundreds of seconds and stored in ACC1 when
the timer starts.

Belonging class: Timing instructions


Allowed operands: T
RLC dependent: YES
Modify RLC: NO
Limits RLC: YES
See also: SV SS SE SI

Example: The output A0.0 must be settle every time the input E0.0 goes on and must be high at least 40 seconds.
Anyway the output A0.0 must be reset by the input E0.1.

SIGNAL STATE

E0.0

E0.1

A0.0
Time
40 seconds

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T0
E0.0
SA
S

KT400.1 K

E0.1 A0.0
R OUT

U E0.0 * Transfer to RLC the E0.0 state


L KT400.1 * Load in ACC1 a timer constant of 400 tenths
SA T0 * Start the timer T0
U E0.1 * Transfer to RLC the E0.1 state
R T0 * Reset (if RLC=1) the timer T0
U T0 * Transfer to RLC the state of the timer T0
= A0.0 * Transfer RLC to A0.0

SS

The instruction SS starts a timer as a delay in insertion with self memorisation. The timer counting
begins with the RLC leading edge, the timer output is set when the timer is over, and is reset only
when also the timer is reset. The difference with the SE instruction is that SS enables delays in
insertion also with starting timer impulses lasting less than the preset timer. The timer counting value
must be expressed in hundreds of seconds and stored in ACC1 when the timer starts.

Belonging class: Timing instructions


Allowed operands: T
RLC dependent: YES
Modify RLC: NO
Limits RLC: YES
See also: SV SA SE SI

Example: The output A0.0 must be reset 40 seconds after the input E0.0 is set and must be reset whenever the input
E0.1 is set. The input E0.0 can have a less than 40 seconds impulse.

SIGNAL STATE

E0.0

E0.1

A0.0
Time
40 seconds 40 seconds

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T0
E0.0
SS
S

KT400.1 K

E0.1 A0.0
R OUT

U E0.0 * Transfer to RLC the E0.0 state


L KT400.1 * Load on ACC1 a timer constant of 400 tenths
SS T0 * Start the timer T0
U E0.1 * Transfer to RLC the E0.1 state
R T0 * Reset (if RLC=1) the timer T0
U T0 * Transfer to RLC the state of the timer T0
= A0.0 * Transfer RLC to A0.0

The instruction R resets the timer counting value specified as operand.

Belonging class: Timing instructions


Allowed operands: T
RLC dependent: YES
Modify RLC: NO
Limits RLC: YES
See also: R SV SA SE SI SS

Example: See examples in the instructions SV, SA, SE, SI and SS.

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4.3.5 Counting instructions

These instructions permit to increase or decrease the value of one of the 128 available counters (the
first 8 counters are retentive).
Each counter has an internal relay which can be used as operand in the logical instructions with the
form: U Z0, etc... The internal relay has a logical value 1 if the counter value is different from zero.

ZV

The instruction ZV increases the counter value specified in the operand; the counter increases its
value only with the RLC leading edge.

Belonging class: Counting instructions


Allowed operands: Z
RLC dependent: YES
Modify RLC: NO
Limits RLC: YES
See also: S R ZR

Example: Count the number of leading edge (0 1) of the input E0.0. The input E0.1 is the counter reset . The output
A0.0 is set if the counter has a value other than zero.

Z0
E0.0
UP

DOWN

E0.1 A0.0
R OUT

U E0.0 * Transfer to RLC the E0.0 input state


ZV Z0 * Increase Z0 with the RLC’s leading edge
U E0.1 * Transfer to RLC the E0.1 input state
R Z0 * If RLC = 1 reset the counter value
U Z0 * Transfer to RLC the state of the counter output
= A0.0 * Transfer RLC to A0.0

ZR

The instruction ZR decreases the counter value specified in the operand; the counter increases its
value only with the RLC leading edge.

Belonging class: Counting instructions

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Allowed operands: Z
RLC dependent: YES
Modify RLC: NO
Limits RLC: YES
See also: S R ZV

Example: Reset the 'output A0.0 after 1000 leading edges of the input E0.0. The input E0.1 initialises the counter at the
value 1000.

Z0

UP

E0.0
DOWN

E0.1
S

KZ1000 K

A0.0
R OUT

U E0.0 * Transfer to RLC the E0.0 input state


ZR Z0 * Decrease Z0 with the RLC’s leading edge
U E0.1 * Transfer to RLC the E0.1 input state
L KZ1000 * Load 1000 on ACC1
S Z0 * If RLC = 1 initialises the counter value to 1000
U Z0 * Transfer to RLC the state of the counter output
= A0.0 * Transfer RLC to A0.0

The instruction S initialises the counter specified as operand with the value stored in ACC1.

Belonging class: Counting instructions


Allowed operands: Z
RLC dependent: YES
Modify RLC: NO
Limits RLC: YES
See also: ZV ZR R

Example: See the example in instruction ZR.

The instruction R resets the counter specified as operand.

Belonging class: Counter instructions


Allowed operands: Z
RLC dependent: YES

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Modify RLC: NO
Limits RLC: YES
See also: ZV ZR S

Example: See the example in instruction ZV.

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4.3.6 Loading/transferring instructions

These instructions permit to load or transfer the accumulators’ value. If the operand specifies a byte
or word loading or transfer, its value is justified on the right, that is in the less relevant byte or word
and the sign is extended to 32 bits.

The instruction L copies in ACC2 the value stored in ACC1 and transfers the value specified in the
operand to ACC1. This instruction is independent from RLC and does not affect its value. The
original value of ACC2 goes lost.

Belonging class: Loading/transferring instructions


Allowed operands: KT KZ KH KM T Z EB EW ED AB AW AD MB MW MD
DB DW DD PE DS
RLC dependent: NO
Modify RLC: NO
Limits RLC: NO
See also: T

The different formats of this instruction are here examined.

L KZ
Load in ACC1 a value in decimal basis. Example:

L KZ1000 * Load on ACC1 the number 1000


L KZ-500 * Load on ACC1 the number -500

Since the accumulators (ACC1 and ACC2) are 32 bit-wide, the loading value must be between -2147483648 and
+2147483647.

L KH
Load in ACC1 a value on hexadecimal basis. Example:

L KH7C4E * Load in ACC1 the number $ 7C4E (dec. 31822)


L KHFFFFFFFF * Load in ACC1 the number $ FFFFFFFF (dec. -1)

The loading value must be between $ 0 and $ FFFFFFFF.

L KM
Load in ACC1 a value on binary base. Example:

L KM10010101 * Load on ACC1 the number b.10010101 (dec. 149)

L KT
Load in ACC1 a value calculated as following:

(numerical value) power of 10

the instruction form is the following

L KT XXX.Y

where XXX is the numerical value (from 0 to 999) and Y is the power of 10 (from 0 to 4). Example:

L KT123.3 * Load in ACC1 the value 123000


L KT200.0 * Load in ACC1 the value 200

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This is the best instruction to set the timer counting values. See examples in instructions SI, SV, SE, SA and SS.

L T
Load in ACC1 the value of the specified timer. The value is expressed in hundredth of seconds.
Example: Reset the output A4.3 after 10 of the 25 seconds preset for the timer T15.

L T15 * Load in ACC1 the timer value T15


L KT15.2 * Move to ACC2 the value in ACC1 and set to ACC1
* the value 1500 (since the timers have less, to know if 10
* seconds have passed, it is
* necessary to check if the timer’s value is less than 25-10
<=F * Check if ACC2 is less or equal to ACC1
R A4.3 * If RLC = 1 resets the A4.3 output

L Z
Load in ACC1 the value of the specified counter. For example (as in the example of instruction ZV) set the output A0.1
when the counter is bigger than 500.

L Z0 * Load in ACC1 the counter value Z0


L KZ500 * Move to ACC2 the value in ACC1 and load the
* value 500 in ACC1
>F * Check if ACC2 is bigger than 500
= A0.1 * Set the A0.1 output according to the comparison result

L EB, L AB, L MB, L DB


Load in ACC1 respectively the value of the: input byte, output byte, merker byte and data byte. Since the accumulators
are 32 bits wide, these instructions load the specified value on the 8 less relevant bits and clear up the remaining 24 bits.
Example.

L EB1 * Load in ACC1 the input byte number 1


L AB0 * Load in ACC1 the output byte number 0
L MB56 * Load in ACC1 the merker byte number 56
L DB500 * Load in ACC1 the data byte number 500

L EW, L AW, L MW, L DW


Load in ACC1 respectively the value of the: input word, output word, merker word and data word. Since the
accumulators are 32 bit-wide, these instructions load the specified value on the 16 less relevant bits and clear up the
remaining 16 bits. The operand value must be even. Example.

L EW0 * Load in ACC1 the input word number 0


L AW2 * Load in ACC1 the output word number 2
L MW56 * Load in ACC1 the merker word number 56
L DW500 * Load in ACC1 the data word number 500

L ED, L AD, L MD, L DD


Load in ACC1 respectively the value of the: input double word, output double word, merker double word and data
double word. The operand value must be even. Example.

L ED0 * Load in ACC1 the input double word number 0


L AD2 * Load in ACC1 the output double word number 2
L MD56 * Load in ACC1 the merker double word number 56
L DD500 * Load in ACC1 the data double word number 500

L PE
Load in ACC1 the value of the specified input byte. It is not read from the memory input image but directly from the
peripheral. The instruction is useful to read inputs within very fast #SUBTIME.

L PE0 * Load in ACC1 the input byte 0


T EB0 * Update the memory image

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L DS
Load in ACC1 the value of the specified system variable. For variables index see the table in appendix F.

L DS40 * Load in ACC1 the cycle time of #MAIN


T DW510 * Transfer to DW510

The instruction T transfers on the specified operand the value stored in ACC1. This instruction is
not RLC dependant and does not modify it.

Belonging class: Loading/transferring instructions


Allowed operands: EB EW ED AB AW AD MB MW MD DB DW DD DS
RLC dependent: NO
Modify RLC: NO
Limits RLC: NO
See also: L

Example:

T EB0 * Transfer ACC1 to the input input number 0


T EW0 * Transfer ACC1 to the input word number 0
T ED0 * Transfer ACC1 to the input double word n 0
T AB2 * Transfer ACC1 to the output byte number 2
T AW2 * Transfer ACC1 to the output word number 2
T AD2 * Transfer ACC1 to the double word number 2
T MB50 * Transfer ACC1 to the merker byte number 50
T MW50 * Transfer ACC1 to the merker word number 50
T MD50 * Transfer ACC1 to the merker double word n° 50
T DB500 * Transfer ACC1 to the data byte number 500
T DW500 * Transfer ACC1 to the data word number 500
T DD500 * Transfer ACC1 to the data double word number 500
T DS41 * Transfer ACC1 to the system variable 41.

T (PA)

The instruction T with PA operand transfers the image of the specified output byte directly to the
peripheral output byte. The accumulators ACC1 and ACC2 are not modified. This instruction is
RLC independent and does not modify it.

Belonging class: Loading/transferring instructions


Allowed operands: PA
RLC dependent: NO
Modify RLC: NO
Limits RLC: NO
See also: L T

Example:

T PA0 * Transfers AB0 to the output byte 0 and writes the


* value directly in the peripheral.

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TAK

The instruction TAK exchanges the values stored in ACC1 and ACC2.

Belonging class: Loading/transferring instructions


Allowed operands: No operands allowed
RLC dependent: NO
Modify RLC: NO
Limits RLC: NO

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4.3.7 Indexed loading/transferring instructions

These instructions allow to load or transfer the value stored in ACC1 in an indexed way. The
instructions are the same as for L and T, but here the address of the wanted value is calculated by an
index register.

The instruction B loads the index register with the value of the DATA WORD or MERKER
WORD specified in the operand.
The following instructions LI and TI calculate the address according to the value loaded with this
instruction.

Belonging class: Indexed loading/transferring instructions


Allowed operands: MW DW
RLC dependent: NO
Modify RLC: NO
Limits RLC: NO
See also: LI TI

Example: See the example for the instructions LI and TI.

LI

The instruction LI transfers the value stored in ACC1 to ACC2, whose original value is lost. It
transfers the value of the operand number + index register to ACC1.

Belonging class: Indexed loading/transferring instructions


Allowed operands: EB EW ED AB AW AD MB MW MD DB DW DD
RLC dependent: NO
Modify RLC: NO
Limits RLC: NO
See also: B TI

Example:

L KZ10 * Index initialisation


T MW0 * MW0 is considered as the index
B MW0 * Load the index register
LI EW6 * Load in ACC1 the EW number 6+index register,
* since the index register value is 10, EW16 is loaded.
L MW0 * Increase the index of 2
ADD KZ2
T MW0
B MW0
LI DW200 * Load in ACC1 the DW212

TI

The instruction TI transfers the value stored in ACC1 to the operand whose number is calculated as

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operand number + index register.

Belonging class: Indexed loading/transferring instructions


Allowed operands: EB EW ED AB AW AD MB MW MD DB DW DD
RLC dependent: NO
Modify RLC: NO
Limits RLC: NO
See also: B LI

Example: Transfer the DWs from 0 to 98 to the DWs from 100 to 198 on the leading edge of M10.0.

U M10.0 * Test the leading edge of M10.0


UN M10.1 * Transfer not started
IF
S M10.1 * Set the transfer flag ongoing
L KZ0 * Index initialisation
T MW0
ENDIF

U M10.1 * Execute the transfer


IF
B MW0 * Load index register
LI DW0 * Load in ACC1 the DW0+index register
TI DW100 * Transfer ACC1 to DW100+index register
L MW0 * Increase the index
ADD KZ2
T MW0
L KZ100 * Test if transfer is finished
>=F
R M10.0 * Reset transfer request
R M10.1 * Reset transfer started flag
ENDIF

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4.3.8 Logical/arithmetical instructions

These instructions allow to modify the accumulators' content.

UW

The instruction UW executes the bitwise AND between the values of ACC1 and ACC2. The result is
stored in ACC1 and its original value is lost.

31 23 15 7 0
ACC2 1 0 1 1 0 1 0 0 0 0 1 0 1 0 1 0 0 1 0 0 1 1 1 1 0 0 1 1 0 0 0 0

UW
31 23 15 7 0
ACC1 0 0 1 0 1 1 0 0 1 0 1 1 0 0 1 0 1 1 0 1 0 1 0 0 0 1 0 1 0 1 0 0

31 23 15 7 0
ACC1 0 0 1 0 0 1 0 0 0 0 1 0 0 0 1 0 0 1 0 0 0 1 0 0 0 0 0 1 0 0 0 0 RESULT
Belonging class: Logical/arithmetical instructions
Allowed operands: No operands allowed
RLC dependent: NO
Modify RLC: NO
Limits RLC: NO
See also: OW XOW

Example: Output A0.0 must become the series for E0.0 and E2.0., output A0.1 the series for E0.1 and E2.1, output
A0.2 the series for E0.2 and E2.2 and so on until output A1.7, series for E1.7 and E3.7.

L EW0 * Load the first 16 bit input


L EW2 * Load the second 16 bit input
UW * Execute bitwise AND between EW0 and EW2
T AW0 * Transfer the result to the output word n° 0

OW

The instruction OW executes the bitwise OR between the values in ACC1 and ACC2. The result is
stored in ACC1 and its original value is lost.

31 23 15 7 0
ACC2 1 0 1 1 0 1 0 0 0 0 1 0 1 0 1 0 0 1 0 0 1 1 1 1 0 0 1 1 0 0 0 0

OW
31 23 15 7 0
ACC1 0 0 1 0 1 1 0 0 1 0 1 1 0 0 1 0 1 1 0 1 0 1 0 0 0 1 0 1 0 1 0 0

31 23 15 7 0
ACC1 1 0 1 1 1 1 0 0 1 0 1 1 1 0 1 0 1 1 0 1 1 1 1 1 0 1 1 1 0 1 0 0 RESULT
Belonging class: Logical/arithmetical instructions
Allowed operands: No operands allowed
RLC dependent: NO
Modify RLC: NO
Limits RLC: NO
See also: UW XOW

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Example: The output A0.0 must be the parallel between E0.0 and E2.0, A0.1 the parallel between E0.1 and E2.1, A0.2
the parallel between E0.2 and E2.2, etc until A1.7 is the parallel between E1.7 and E3.7

L EW0 * Load the first 16 bit input


L EW2 * Load the second 16 bit input
OW * Execute bitwise OR between EW0 and EW2
T AW0 * Transfer the result to the output word n° 0

XOW

The instruction XOW executes the bitwise EXCLUSIVE OR between the values of ACC1 and
ACC2, the result is stored in ACC1 and its original value is lost.

31 23 15 7 0
ACC2 1 0 1 1 0 1 0 0 0 0 1 0 1 0 1 0 0 1 0 0 1 1 1 1 0 0 1 1 0 0 0 0

XOW
31 23 15 7 0
ACC1 0 0 1 0 1 1 0 0 1 0 1 1 0 0 1 0 1 1 0 1 0 1 0 0 0 1 0 1 0 1 0 0

31 23 15 7 0
ACC1 1 0 0 1 1 0 0 0 1 0 0 1 1 0 0 0 1 0 0 1 1 0 1 1 0 1 1 0 0 1 0 0 RESULT
Belonging class: Logical/arithmetical instructions
Allowed operands: No operands allowed
RLC dependent: NO
Modify RLC: NO
Limits RLC: NO
See also: UW OW

Example: Store in the merker word 0 the leading edges of the first 16 inputs.

L EW0 * Load EW0


L MW240 * Load the previous inputs’ state
XOW * Execute the EXCLUSIVE OR (consider only the changed bits)
UW * Execute the AND of EW0 with the result of EXCLUSIVE OR
* (consider only the bits from 0 to 1 that have changed)
T MW0 * Store the leading edges
L EW0 * Load EW0
T MW240 * Update the previous inputs state

+F

The instruction +F adds the ACC1 value to the ACC2 content, the result is stored in ACC1 and its
original value is lost.

Belonging class: Logical/arithmetical instructions


Allowed operands: No operands allowed
RLC dependent: NO
Modify RLC: NO
Limits RLC: NO
See also: -F

Example: Add DW2 with MW4 and store the result in DW0

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L DW2 * Load DW2


L MW4 * Load MW4
+F * Execute the sum
T DW0 * Transfer the result to DW0

-F

The instruction -F subtracts the ACC1 value from the ACC2 content, the result is stored in ACC1
and its original value is lost..

Belonging class: Logical/arithmetical instructions


Allowed operands: No operands allowed
RLC dependent: NO
Modify RLC: NO
Limits RLC: NO
See also: +F

Example: Subtract 5000 from DD4 and store the result in DD0

L DD4 * Load DD4


L KZ5000 * Load the decimal value 5000
-F * Execute the subtraction
T DD0 * Transfer the result to DD0

ADD

The instruction ADD increases the value stored in ACC1 according to the value specified in the
operand.

Belonging class: Logical/arithmetical instructions


Allowed operands: KZ KH KM
RLC dependent: NO
Modify RLC: NO
Limits RLC: NO
See also: SUB

Example: Increase DW0 by two on every M0.0’s leading edge

U M0.0 * Test leading edge


D M0.1
IF
L DW0
ADD KZ2
T DW0
ENDIF

SUB

The instruction SUB decreases the value stored in ACC1 according to the value specified in the
operand.

Belonging class: Logical/arithmetical instructions


Allowed operands: KZ KH KM
RLC dependent: NO

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Modify RLC: NO
Limits RLC: NO
See also: ADD

INC

The instruction INC increases of one the specified operand.

Belonging class: Logical/arithmetical instructions


Allowed operands: DB DW DD MB MW MD
RLC dependent: NO
Modify RLC: NO
Limits RLC: NO
See also: DEC

Example: Increase DW0 on every M0.0’s leading edge of

U M0.0 * Test leading edge


D M0.1
IF
INC DW0
ENDIF

DEC

The instruction DEC decreases of one the specified operand.

Belonging class: Logical/arithmetical instructions


Allowed operands: DB DW DD MB MW MD
RLC dependent: NO
Modify RLC: NO
Limits RLC: NO
See also: INC

XF

It multiplies ACC1 by ACC2, the result is stored in ACC1 (ACC1 ACC2 ACC1). The operands are
considered as being 32 bit wide and are signed.

Belonging class: Logical/arithmetical instructions


Allowed operands: No operands allowed
RLC dependent: NO
Modify RLC: NO
Limits RLC: NO
See also: :F XFS XFX

:F

It divides ACC2 by ACC1, the result is stored in ACC1 (ACC2/ACC1 ACC1) and the remainder in
ACC2. The operands are considered as being 32 bit wide and are signed.

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Belonging class: Logical/arithmetical instructions


Allowed operands: No operands allowed
RLC dependent: NO
Modify RLC: NO
Limits RLC: NO
See also: XF :FS :FX

XFS

It multiplies ACC1 by ACC2, the result is stored in ACC1 (ACC1 ACC2 ACC1). The operands are
considered as being 16 bit wide and are signed.

Belonging class: Logical/arithmetical instructions


Allowed operands: No operands allowed
RLC dependent: NO
Modify RLC: NO
Limits RLC: NO
See also: :FS XF XFX

:FS

It divides ACC2 by ACC1, the result is stored in ACC1 (ACC2/ACC1 ACC1) and the remainder on
ACC2. The operands are considered as being 16 bit wide and are signed.

Belonging class: Logical/arithmetical instructions


Allowed operands: No operands allowed
RLC dependent: NO
Modify RLC: NO
Limits RLC: NO
See also: XFS :F :FX

XFX

It multiplies ACC1 by ACC2 (both have 32 bit). The result of 64 bit is stored in ACC1 and also in a
temporary memory called ACC3 (ACC1 ACC2 ACC3:ACC1).
Since ACC3 is not accessible by AWL standard instructions, this instruction should be used only
together with the instruction :FX (see example).

Belonging class: Logical/arithmetical instructions


Allowed operands: No operands allowed
RLC dependent: NO
Modify RLC: NO
Limits RLC: NO
See also: :FX XF XFS

:FX

It divides ACC3:ACC2 by ACC1, the result is stored in ACC1 (ACC2/ACC1 ACC1) and the
remainder in ACC2. The dividend is 64 bit wide while the divisor is 32 bit, the result and the

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remainder are 32 bit wide.

Belonging class: Logical/arithmetical instructions


Allowed operands: No operands allowed
RLC dependent: NO
Modify RLC: NO
Limits RLC: NO
See also: XFX :F :FS

Example: Execute the following operation


50000 × 150000
525
L KZ50000
L KZ150000
XFX
L KZ525
:FX
T DD0

It is correct 14285714 to be stored in DD0, if the same operation would be executed with normal instructions XF and :F
even these instructions work 32 bit data the result would be completely wrong.

ASS

The instruction ASS calculates ACC1’s absolute value, the result is stored n ACC1 and its original
value is lost.

Belonging class: Logical/arithmetical instructions


Allowed operands: No operands allowed
RLC dependent: NO
Modify RLC: NO
Limits RLC: NO
See also: KZW

Example: Make DW0 always positive.

L DW0 * Load DW0


ASS * Calculate the absolute value
T DW0 * Transfer to DW0

KEW

The instruction KEW calculates ACC1’s complement at 1, the result is stored in ACC1 and its
original value is lost.

31 23 15 7 0
ACC1 0 0 1 0 1 1 0 0 1 0 1 1 0 0 1 0 1 1 0 1 0 1 0 0 0 1 0 1 0 1 0 0

KEW
31 23 15 7 0
ACC1 1 1 0 1 0 0 1 1 0 1 0 0 1 1 0 1 0 0 1 0 1 0 1 1 1 0 1 0 1 0 1 1 RESULT
Belonging class: Logical/arithmetical instructions
Allowed operands: No operands allowed

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RLC dependent: NO
Modify RLC: NO
Limits RLC: NO
See also: KZW

Example: Make the outputs from A0.0 to A1.7 opposite to the input from E0.0 to E1.7.

L EW0 * Load the input word number 0


KEW * Execute the complement to 1
T AW0 * Transfer the result to the output word 0

KZW

The instruction KZW calculates ACC1’s complement at 2, the result is stored in ACC1 and its
original value is lost.

31 23 15 7 0
ACC1 0 0 1 0 1 1 0 0 1 0 1 1 0 0 1 0 1 1 0 1 0 1 0 0 0 1 0 1 0 1 0 0

KZW
31 23 15 7 0
1 1 0 1 0 0 1 1 0 1 0 0 1 1 0 1 0 0 1 0 1 0 1 1 1 0 1 0 1 0 1 1

+1
31 23 15 7 0
ACC1 1 1 0 1 0 0 1 1 0 1 0 0 1 1 0 1 0 0 1 0 1 0 1 1 1 0 1 0 1 1 0 0 RESULT

Belonging class: Logical/arithmetical instructions


Allowed operands: No operands allowed
RLC dependent: NO
Modify RLC: NO
Limits RLC: NO
See also: KEW ASS

Example: Make DW0 always have a value opposite to its present.

L DW0 * Load DW0


KZW * Execute the complement to two
T DW0 * Update DW0 with its opposite

SLB

The instruction SLB executes the left shift of the less relevant byte in ACC1. The shift is executed
as many times as the value content specified in ACC2, the result is stored in ACC1 and its original
value is lost.

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ACC2 KZ1

31 23 15 7 0
ACC1 1 0 1 0 1 0 1 1 1 0 1 0 1 0 1 1 1 0 1 0 1 0 1 1 1 0 1 0 1 0 1 1

SLB 0
31 23 15 7 0
ACC1 1 0 1 0 1 0 1 1 1 0 1 0 1 0 1 1 1 0 1 0 1 0 1 1 0 1 0 1 1 0 0 0 RESULT

Belonging class: Logical/arithmetical instructions


Allowed operands: No operands allowed
RLC dependent: NO
Modify RLC: NO
Limits RLC: NO
See also: SRB SLW SRW SLD SRD

SRB

The instruction SRB executes the right shift of the less relevant byte in ACC1. The shift is executed
as many times as the value content specified in ACC2, the result is stored in ACC1 and its original
value is lost.

ACC2 KZ1

31 23 15 7 0
ACC1 1 0 1 0 1 0 1 1 1 0 1 0 1 0 1 1 1 0 1 0 1 0 1 1 1 0 1 0 1 0 1 1

SRB 0
31 23 15 7 0
ACC1 1 0 1 0 1 0 1 1 1 0 1 0 1 0 1 1 1 0 1 0 1 0 1 1 0 1 0 1 0 1 0 1 RESULT

Belonging class: Logical/arithmetical instructions


Allowed operands: No operands allowed
RLC dependent: NO
Modify RLC: NO
Limits RLC: NO
See also: SLB SLW SRW SLD SRD

SLW

The instruction SLW executes the left shift of the less relevant 16 bits in ACC1. The shift is
executed as many times as the value content specified in ACC2, the result is stored in ACC1 and its
original value is lost.

Belonging class: Logical/arithmetical instructions


Allowed operands: No operands allowed
RLC dependent: NO
Modify RLC: NO
Limits RLC: NO

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See also: SLB SRB SRW SLD SRD

SRW

The instruction SRW executes the right shift of the less relevant 16 bit in ACC1. The shift is
executed as many times as the value content specified in ACC2, the result is stored in ACC1 and its
original value is lost.

Belonging class: Logical/arithmetical instructions


Allowed operands: No operands allowed
RLC dependent: NO
Modify RLC: NO
Limits RLC: NO
See also: SLB SRB SLW SLD SRD

SLD

The instruction SLD executes the left shift in ACC1. The shift is executed as many times as the
value content specified in ACC2, the result is stored in ACC1 and its original value is lost.

Belonging class: Logical/arithmetical instructions


Allowed operands: No operands allowed
RLC dependent: NO
Modify RLC: NO
Limits RLC: NO
See also: SLB SRB SLW SRW SRD

Example: Multiply DD0 by 2 and store the result in DD4.

L KZ1 * Load the number of shifts


L DD0 * Load DD0
SLD * Execute one left shift
T DD4 * Transfer the result to DD4

SRD

The instruction SRD executes the right shift in ACC1. The shift is as many times as the value
content specified in ACC2, the result is stored in ACC1 and its original value is lost.

Belonging class: Logical/arithmetical instructions


Allowed operands: No operands allowed
RLC dependent: NO
Modify RLC: NO
Limits RLC: NO
See also: SLB SRB SLW SRW SLD

Example: Divide DD0 by 4 and store the result in DD4.

L KZ2 * Load the number of shift


L DD0 * Load DD0
SRD * Execute two right shift
T DD2 * Transfer the result to DD4

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4.3.9 Comparison instructions

These instructions allow to compare data loaded on the accumulators. With their result they affect
the RLC and therefore can be used in a program with the logical-combining instructions. In this case
the comparison operation must be the first among the enquiring series or combined with the
instructions U( and O(.

=F

The instruction =F compares ACC1 to ACC2 and sets RLC if ACC1 is equal to ACC2.

Belonging class: Comparison instructions


Allowed operands: No operands allowed
RLC dependent: NO
Modify RLC: YES
Limits RLC: NO
See also: <>F >F <F >=F <=F

Example: Set the output A0.0 if the input word 0 is equal to $ 1234.

L EW0 * Load EW0


L KH1234 * Load the comparison value
=F * Compare
= A0.0 * Set the output A0.0 if EW0 = $ 1234

<>F

The instruction <>F compares ACC1 to ACC2 and sets RLC if ACC1 is different from ACC2.

Belonging class: Comparison instructions


Allowed operands: No operands allowed
RLC dependent: NO
Modify RLC: YES
Limits RLC: NO
See also: =F >F <F >=F <=F

Example: See instruction =F

>F

The instruction >F compares ACC1 to ACC2 and sets RLC if ACC2 is bigger than ACC1.

Belonging class: Comparison instructions


Allowed operands: No operands allowed
RLC dependent: NO
Modify RLC: YES
Limits RLC: NO
See also: =F <>F <F >=F <=F

Example: See instruction =F

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<F

The instruction <F compares ACC1 to ACC2 and sets RLC if ACC2 is lower than ACC1.

Belonging class: Comparison instructions


Allowed operands: No operands allowed
RLC dependent: NO
Modify RLC: YES
Limits RLC: NO
See also: =F <>F >F >=F <=F

Example: See instruction =F

>=F

The instruction >=F compares ACC1 to ACC2 and sets RLC if ACC2 is bigger than or same as
ACC1.

Belonging class: Comparison instructions


Allowed operands: No operands allowed
RLC dependent: NO
Modify RLC: YES
Limits RLC: NO
See also: =F <>F >F <F <=F

Example: See instruction =F

<=F

The instruction <=F compares ACC1 to ACC2 and sets RLC if ACC2 is lower than or same as
ACC1.

Belonging class: Comparison instructions


Allowed operands: No operands allowed
RLC dependent: NO
Modify RLC: YES
Limits RLC: NO
See also: =F <>F >F <F >=F

Example: See instruction =F

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4.3.10 Complementing instructions

This group of instructions allows to complement the specified operand.

The instruction I inverts the state of the specified operand if RLC=1.

Belonging class: Complementing instructions


Allowed operands: E A M K
RLC dependent: YES
Modify RLC: NO
Limits RLC: YES
See also: I (RLC)

Example: Invert the state of output A0.0 on every leading edge of input E0.0.

U E0.0 * Transfer to RLC the E0.0 state


D M0.0 * Issue the leading edge
I A0.0 * Invert the state of A0.0 if there has been a leading edge

I (RLC)

The instruction I with RLC operand inverts the RLC’s value.

Belonging class: Complementing instructions


Allowed operands: RLC
RLC dependent: NO
Modify RLC: YES
Limits RLC: NO
See also: I

Example: Activate output A0.0 at the same time with E0.0 and E0.1. Activate A0.1 when one of the two inputs is at low
level. (A0.0 and A0.1 are opposites).

U E0.0 * Transfer to RLC the E0.0 state


U E0.1 * AND between RLC and E0.1
= A0.0 * Update A0.0 output
I RLC * Invert the RLC value
= A0.1 * Update A0.1 output

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4.3.11 System instructions

These instructions allow to modify the normal program execution flow.

STP

The instruction STP, when executed unconditionally puts the PLC in STOP at the end of the cycle.
It is useful when there is a dangerous situation. The RUN state must be set manually.

Belonging class: System instructions


Allowed operands: No operands allowed
RLC dependent: NO
Modify RLC: NO
Limits RLC: YES
See also: = STP STI

= STP

The instruction = STP, executed only if RLC=1, puts the PLC in STOP at the end of the cycle. It is
useful when there is a dangerous situation. The RUN state must be set manually.

Belonging class: System instructions


Allowed operands: No operands allowed
RLC dependent: YES
Modify RLC: NO
Limits RLC: YES
See also: STP STI

Example: The E1.7 input must always be active. If not the cycle must be aborted.

UN E1.7 * Transfer to RLC the denied state of E1.7


= STP * Stop if E1.7 = 0

STI

The instruction STI, executed unconditionally, immediately puts the PLC in STOP and all further
instructions are not processed anymore. It can be used as the previous instruction or to insert
breakpoints within the program during the program set-up. The RUN state must be set manually.

Belonging class: System instructions


Allowed operands: No operands allowed
RLC dependent: NO
Modify RLC: NO
Limits RLC: YES
See also: STP = STP

Example: The input E1.7 must always be active. If not the cycle must be aborted..

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UN E1.7 * Transfer to RLC the denied state of E1.7


IF * Open a conditional block
STI * Stop if E1.7 = 0
ENDIF * Close the block

IF

The instruction IF opens a block of instructions to be executed only if RLC is 1. The instruction
ENDIF closes the block.
The instructions block allows a faster execution of the program (The instructions within the block
are not executed if the condition is not true). It also allows to adapt to the RLC all the instructions
(for example loading or transferring instructions) that are not RLC dependant.

Belonging class: System instructions


Allowed operands: No operands allowed
RLC dependent: YES
Modify RLC: NO
Limits RLC: YES
See also: ENDIF ELSE

Example:

U E0.0 * Condition for executing block 1


IF
... * Instructions within block 1
...
U E0.1 * Condition for executing block 2
IF
... * Instructions within block 2
...
U E0.2 * Condition for executing block 3
IF
... * Instructions within block 3
...
U E0.3 * Condition for executing block 4
IF
... * Instructions within block 4
...
ENDIF * End of block 4
ENDIF * End of block 3
ENDIF * End of block 2
ENDIF * End of block 1

ELSE

The instruction ELSE closes a block of instructions opened by instruction IF and opens a new
block to be executed if the RLC previous to instruction IF is equal to 0. The instructions IF, ELSE
and ENDIF do not modify the RLC, therefore the conditioned instructions following the instruction
ELSE must be preceded by instruction S RLC to be executed.

Belonging class: System instructions


Allowed operands: No operands allowed
RLC dependent: NO
Modify RLC: NO

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Limits RLC: YES


See also: IF ENDIF

Example: DW0 must be increased if the input E0.0 is 1, or decreased when this input is 0. The output A0.0 must
represent the state of E0.0.

U E0.0 * Testing condition


IF * Open the instructions block to be executed
* if the condition is true
S A0.0 * Set the output A0.0
INC DW0
ELSE * Open the instructions block to be executed
* if the condition is false
S RLC * Set the RLC to execute the following instruction
R A0.0 * Reset the output A0.0
DEC DW0
ENDIF * Close instructions block

ENDIF

The instruction ENDIF closes a block opened by instructions IF or ELSE.

Belonging class: System instructions


Allowed operands: No operands allowed
RLC dependent: NO
Modify RLC: NO
Limits RLC: YES
See also: IF ELSE

BEGIN

The instruction BEGIN opens an instructions block to be executes cyclically. The instructions block
must be closed by the UNTIL instruction that repeats the cycle if RLC is zero or exits the cycle if
RLC is 1.

Belonging class: System instructions


Allowed operands: No operands allowed
RLC dependent: NO
Modify RLC: NO
Limits RLC: YES
See also: UNTIL

Example: Set value 1 to the DATA BYTE from 0 to 99 on E0.0 leading edge.
U E0.0 * Testing edge
D M0.0
IF
L KZ0 * Clear index
T MW2
BEGIN
B MW2 * Update the variable
L KZ1
TI DB0
INC MW2 * Update index
L KZ100
>=F * Exit from BEGIN...UNTIL if MW2>=100

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UNTIL

ENDIF

UNTIL

The instruction UNTIL closes an instructions block opened by the BEGIN instruction. When
UNTIL is executed, the cycle re-starts from the instruction following BEGIN if RLC=0 or it
continues with the instruction following UNTIL if RLC=1.

Belonging class: System instructions


Allowed operands: No operands allowed
RLC dependent: YES
Modify RLC: NO
Limits RLC: YES
See also: BEGIN

CASE

The instruction CASE permits to execute only one instructions block included between the
instructions CASE and ENDCASE, according to the comparison between ACC1 and a list of
constants declared at the beginning of each block. Every instructions block is defined with one of
the following couples of instructions:

OF ... ENDOF
TOF ... ENDOF
MOF ... ENDOF
COF ... ENDOF
ELSEOF ... ENDOF

Belonging class: System instructions


Allowed operands: No operands allowed
RLC dependent: NO
Modify RLC: NO
Limits RLC: YES
See also: ENDCASE OF TOF COF MOF ELSEOF ENDOF

Example:
L DW0 * Read index
CASE * Open block CASE

OF 1
... * Instructions to execute if DW0=1
...
ENDOF * Close block opened with OF and go to ENDCASE

OF 2
... * Instructions to be executed if DW0=2
...
ENDOF

TOF 3 10
... * Instructions to be executed if DW0 contains a value

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... * between 3 and 10 (extremes included)


ENDOF

MOF 5 20 30 40 50 60
... * Instructions to be executed if DW0 contains one of the
... * past 5 values (20, 30, 40, 50 or 60)
ENDOF

U M30.0
U M30.1
COF
... * Instructions to be executed if tests fail
... * and if RLC=1 (if M30.0=1 and M30.1=1)
ENDOF

ELSEOF
... * Instructions to be executed if tests fail
...
ENDOF

ENDCASE * Close block CASE

ENDCASE

Close an instructions block opened by the instruction CASE.

Belonging class: System instructions


Allowed operands: No operands allowed
RLC dependent: NO
Modify RLC: NO
Limits RLC: YES

Example: See example of CASE.

OF

It opens an instructions block to be executed only if the value stored in ACC1, before the instruction
CASE, is equal to the parameter given to the instruction OF.

Belonging class: System instructions


Allowed operands: Testing value
RLC dependent: NO
Modify RLC: NO
Limits RLC: YES

Example: See example in CASE.

TOF

It opens an instructions block to be executed only if the value stored in ACC1, before the instruction
CASE, is within the two values (extremes included) given to the instruction TOF. The two limits to
be tested must be given increasingly.

Belonging class: System instructions

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Allowed operands: Upper limit and lower limit


RLC dependent: NO
Modify RLC: NO
Limits RLC: YES

Example: See example in CASE.

MOF

It opens an instructions block to be executed only if the value stored in ACC1, before the instruction
CASE, is equal to one of the values given to the instruction MOF. The first value among the past
ones contains the number of values to be tested.

Belonging class: System instructions


Allowed operands: Number of values to be testes and list of testing values
RLC dependent: NO
Modify RLC: NO
Limits RLC: YES

Example: See example in CASE.

COF

It opens an instructions block to be executed only if all previous tests have failed and RLC=1.

Belonging class: System instructions


Allowed operands: No operands allowed
RLC dependent: YES
Modify RLC: NO
Limits RLC: YES

Example: See example of CASE.

ELSEOF

It opens an instructions block to be executed only if all previous tests have failed.

Belonging class: System instructions


Allowed operands: No operands allowed
RLC dependent: NO
Modify RLC: NO
Limits RLC: YES

Example: See example of CASE.

ENDOF

It closes an instructions block opened by the instructions OF, TOF, MOF, COF and ELSEOF.
The execution of the instruction ENDOF causes skipping to the instruction that follow ENDCASE.

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Belonging class: System instructions


Allowed operands: No operands allowed
RLC dependent: NO
Modify RLC: NO
Limits RLC: YES

Example: See example in CASE.

BE

The instruction BE closes the current subroutine, but the program process continues in the
subroutine that has recalled the current block, or in case of #MAIN it goes back to the first
instruction. Since this instruction is also used by the compiler to close the compilation, it must be
present at the end of each subroutine.

Belonging class: System instructions


Allowed operands: No operands allowed
RLC dependent: NO
Modify RLC: NO
Limits RLC: YES

Example:

INSTRUCTION 1
INSTRUCTION 2
. . .
. . .
INSTRUCTION n
BE * End of program

BEA

This instruction is the same as BE but it is not interpreted by the compiler.

Belonging class: System instructions


Allowed operands: No operands allowed
RLC dependent: NO
Modify RLC: NO
Limits RLC: YES

Example: If the input E0.0 is zero, DW10 must be set to 100 and the following instructions must be skipped.

...
...
UN E0.0 * Test if E0.0 = 0
IF
L KZ100
T DW10
BEA
ENDIF
... * Instructions that must be processed only if E0.0=1
...
BE * End of program and compilation

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= BEA

This instruction is the same as BEA and it is executed only if RLC = 1.

Belonging class: System instructions


Allowed operands: No operands allowed
RLC dependent: YES
Modify RLC: NO
Limits RLC: YES

JSR

It recalls the #USER whose number is specified in the operand.

Belonging class: System instructions


Allowed operands: Number #USER to call
RLC dependent: NO
Modify RLC: NO (the RLC depends on the execution of the called subroutine)
Limits RLC: YES

= JSR

It recalls the #USER whose number is specified in the operand only if RLC = 1.

Belonging class: System instructions


Allowed operands: Number #USER to call
RLC dependent: YES
Modify RLC: NO (the RLC depends on the execution of the called subroutine)
Limits RLC: YES

Example: Call the #USER0 if MW0=0, the #USER1 if MW0=1 and the #USER2 if MW0=2.

L MW0 * Test if MW0=0


L KZ0
=F
= JSR 0
L MW0 * Test if MW0=1
L KZ1
=F
= JSR 1
L MW0 * Test if MW0=2
L KZ2
=F
= JSR 2

AST

It enables the execution of the #SUBTIME whose number is specified in the operand. Note that if a
#SUBTIME has never been affected by the instructions AST and DST it is enabled (default
condition) after each compilation. Otherwise it remains in its current condition.
Belonging class: System instructions
Allowed operands: Number of #SUBTIME to enable

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RLC dependent: NO
Modify RLC: NO
Limits RLC: NO

Example: The #SUBTIME 0 must be executed only if the input E1.5 is on.

U E1.5 * Test leading edge of E1.5


D M200.0
IF
AST 0
ENDIF
UN E1.5 * Test falling edge of E1.5
D M200.1
IF
DST 0
ENDIF

DST

It disables the execution of the #SUBTIME whose number is specified in the operand.

Belonging class: System instructions


Allowed operands: Number of #SUBTIME to disable
RLC dependent: NO
Modify RLC: NO
Limits RLC: NO

Example: See the example of the instruction AST.

AIN

It enables the execution of the #INT whose number is specified in the operand.
Note that if a #INT has never been affected by the instructions AIN and DIN it is enabled (default
condition) after each compilation. Otherwise it remains in its current state.

Belonging class: System instructions


Allowed operands: Number of #INT to enable
RLC dependent: NO
Modify RLC: NO
Limits RLC: NO

Example: The #INT 0 must be executed only if the input E1.5 is on.

U E1.5 * Test leading edge of E1.5


D M200.0
IF
AIN 0
ENDIF
UN E1.5 * Test falling edge of E1.5
D M200.1
IF
DIN 0
ENDIF

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DIN

It disables the execution of the #INT whose number is specified in the operand.

Belonging class: System instructions


Allowed operands: Number of #INT to call
RLC dependent: NO
Modify RLC: NO
Limits RLC: NO

Example: See the example for AIN instruction.

CHK

The instruction CHK permits to test a particular bit in the CPU CONDITION CODE REGISTER
and eventually jump to the subroutine #SUBCHECK.
The instruction must be followed by the code identifying the bit and the test type to be performed
and by a numerical value (from 0 to 32767) useful to asses in which point of the #SUBCHECK the
call was made.
It is possible to know the type of test and the value of the past identifier in the subroutine
#SUBCHECK by means of DS52 and DS53.

The following table represents the type of tests available:

Code DS52 Description


EQ 0 Test if equal to zero.
NE 1 Test if different from zero.
CC 2 Test if carry is equal to zero.
CS 3 Test if carry is different from zero.
GE 4 Test if the destination is bigger than or equal to the source (signed). (*)
LE 5 Test if the destination is lower than or equal to the source (signed). (*)
GT 6 Test if the destination is bigger than the source (signed). (*)
LT 7 Test if the destination is lower than the source (signed). (*)
HI 8 Test if the destination is bigger than the source (unsigned). (*)
LS 9 Test if the destination is lower than or equal to the source (unsigned). (*)
MI 10 Test if the result is negative.
PL 11 Test if the result is positive.
VC 12 Test if the overflow has not occurred.
VS 13 Test if overflow has occurred.
(*) All tests are meaningful only after comparison instructions, the terms destination and source
refer to ACC2 and ACC1.

Belonging class: System instructions


Allowed operands: Test code and arbitrary defined identifier.
RLC dependent: NO
Modify RLC: NO (RLC depends on the execution of the subroutine #SUBCHECK)
Limits RLC: NO

Example: Store the resulting sum of DD0 and DD4 in DD8 (DD8=DD0+DD4). If the result is bigger than 32 bit DD8
must be contain the hexadecimal value 7FFFFFFF. Moreover if the result is 0, DD8’s value must be 1000.

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chapter 4. PROGRAMMING

...
...
L DD0
L DD4
+F
CHK VS 1 * Test if there is overflow
CHK EQ 2 * Test if the result is 0
T DD8
...
...

#SUBCHECK
L DS53
CASE
OF 1 * Overflow
L KH7FFFFFFF
ENDOF
OF 2 * ACC1=ACC2
L KZ1000
ENDOF
ENDCASE
BE

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4.3.12 Library operations

These instructions allow to execute functions, written by FORTH or ASSEMBLER languages and
stored in memory. RLC can be modified by these instructions.

The instruction C executes a function previously defined in the vocabulary. The function call is
independent from RLC , its value can be modified by the function called.

Belonging class: Library instructions


Allowed operands: Functions defined with CALL_PLC or :PLC
RLC dependent: NO
Modify RLC: Function of the operand
Limits RLC: Function of the operand

Example: Execute the function "cm-start" that initialises the axis controller program. It requires the number of axis to be
controlled in ACC1.

L KZ3 * Set to three the number of axis


C cm-start * Call the function cm-start

=C

The instruction =C is similar to instruction C and its function is executed only if RLC is 1.

Belonging class: Library instructions


Allowed operands: Functions defined by CALL_PLC or :PLC
RLC dependent: YES
Modify RLC: Operand Function
Limits RLC: YES

Example: Execute the function "cm-restot" that performs a total parameters reset of the axis controller program (the
function requires in ACC1 the number of axis) only if the merker M0.0 is 0, then the merker M0.0 is set in order to avoid
other calls.

UN M0.0 * Transfer to RLC the denied state of the merker M0.0


L KZ3 * Set to three the axis number
= C cm-restot * Call the function cm-restot
S M0.0 * Set M0.0 to avoid other calls of cm-restot

UC

The instruction U C calls the specified function. When this function modifies the RLC, the latter is
put in an AND condition with the previous RLC. If this instruction is the first of a series, the RLC
returned from the function is copied in the RLC.

Belonging class: Library instructions


Allowed operands: Functions defined by CALL_PLC or :PLC
RLC dependent: NO
Modify RLC: YES

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Limits RLC: NO

Example: Set the merker M10.0 if the input E0.0 is active and the axes 0 is not running.

L KZ0 * Select axes 0


C w.asse
U E0.0 * Test input E0.0
U C ?fermo * Axes 0 stopped
= M10.0

UN C

The instruction UN C calls the specified function. When this function modifies the RLC, the latter is
NEGATED and then put in an AND condition with the previous RLC. If this instruction is the first
of a series, the RLC returned from the function is copied in the RLC.

Belonging class: Library instructions


Allowed operands: Functions defined with CALL_PLC or :PLC
RLC dependent: NO
Modify RLC: YES
Limits RLC: NO

OC

The instruction O C calls the specified function. If this function modifies the RLC, the latter is ORed
with the previous RLC. If this instruction is the first of a series, the RLC returned from the function
is copied in the RLC.

Belonging class: Library instructions


Allowed operands: Functions defined by CALL_PLC or :PLC
RLC dependent: NO
Modify RLC: YES
Limits RLC: NO

ON C

The instruction ON C calls the specified function. If this function modifies the RLC, the latter is
NEGATED and then ORed with the previous RLC. If this instruction is the first of a series, the RLC
returned from the function is copied in the RLC.

Belonging class: Library instructions


Allowed operands: Functions defined with CALL_PLC or :PLC
RLC dependent: NO
Modify RLC: YES
Limits RLC: NO

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chapter 5. PROGRAMMING TECHNIQUES

5.1 INPUT

At the beginning of each PLC cycle all inputs are copied in a memory area called input image.
During the PLC cycle every reference to an input will be relative to its memory image. By using the
storing instructions it is possible to modify also the input state. For instance, if the input E0.0 is the
emergency button that should always be on, though it is not yet connected, bypass it by producing a
program run anyway and put at the head of the program the following instructions:
U M10.0 *
= E0.0 * Assign to the input E0.0 the value of the merker M10.0
. . * From here on the input E0.0 will be the same as the merker
M10.0
. .
BE

5.2 OUTPUTS

The outputs updating is done at the end of the #MAIN execution. Since the system is multitasking
the operative system performs an outputs updating every 10 milliseconds in order to update the
outputs set by others tasks. It is possible the outputs updating (executed by the operative system) to
occur during the PLC cycle, as shown in the following picture where the PLC cycle runs every 3
milliseconds.

(1) Output updating executed at the end of the PLC cycle


(2) Output updating executed every 10 ms by the operative system

(1) (2) (1) (1) (1) (2) (1) (1) (1) (1) (2)

3 ms 3 ms 3 ms 3 ms 3 ms 3 ms 3 ms
10 ms 10 ms
We suggest not to instruct an output in more points of the program to avoid impulses on it.
Consider the following program as an example:
A button (normally opened) connected to the input E0.0 activates the output A0.0, another button
(normally closed) connected to the input E0.1 turns it off.
U E0.0
S A0.0
UN E0.1
R A0.0

This program is correct, but if both the buttons are simultaneously pressed the image of output

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chapter 5. PROGRAMMING TECHNIQUES

A0.0 is set and immediately then reset. If between SET and RESET the operative system is updated,
an impulse to A0.0 is issued which persists until the end of the PLC cycle.

The program could be written in one of the following ways:

1 Solution - use the instruction = instead of S and R.

U(
O E0.0
O A0.0
)
U E0.1
= A0.0

2 Solution - create an image of the output using a merker.

U E0.0
S M0.0
UN E0.1
R M0.0

U M0.0
= A0.0

In this case the merker M0.0 is an image representing the output A0.0. This solution allows to test
the program without the activating the output by simply erasing the last two instructions.

5.3 TIMER

Since the timers’ functioning is independent from the program execution, it is necessary to the timer
test to happen within the same instructions block, as analysed in the following program:

U E0.0
IF
U E0.1
L KT100.1
SE T60
ENDIF
U T60
= A0.0

If the inputs E0.0 and E0.1 are active, timer T60 starts. As soon as it starts, both E0.0 and E0.1 inputs
go off, the instructions block is not processed anymore and timer T60 continues decreasing because
the instruction SE T60 is not processed. When the timer finishes its performance, the output A0.0 is
however set, even if the program conditions to do so are not present. If the last two instructions
would have been within the block, the program could have worked correctly.
It is better to set an eventual reset timer instruction before the test timer instruction, because if the
start timer and the reset timer instructions are contemporaneously present, when the timer time is
over its test will give an RLC = 1, even with a the reset condition still present. The following
instruction sequence is wrong:

U E0.0

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L KT100.0
SE T0
U T0
= A0.0
U E0.1
R T0

After a second from the activation of input E0.0, the output A0.0 is set independently from the state
of E0.1 input.

The correct sequence is the following:


U E0.0
L KT100.0
SE T0
U E0.1
R T0
U T0
= A0.0

After a second from the activation of input E0.0, the output A0.0 is set only if the input E0.1 is low.

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chapter 6. DEFINITION OF FUNCTIONS CALLABLE FROM AWL

chapter 6. DEFINITION OF FUNCTIONS CALLABLE FROM AWL

The functions callable from AWL by the instruction C (and the others = C, U C, UN C, O C and
ON C) must be written with FORTH or ASSEMBLER languages.
The definition mode for these functions and some rules to correctly approach ACC1, ACC2, RLC
etc will now be explained. See the correspondent manual for the FORTH and ASSEMBLER
languages’ syntax.

6.1 FORTH WRITTEN FUNCTIONS

The definition of a FORTH written function callable from AWL has the following format:

type :PLC function_name ( Open definition


... (
... ( Define Function
... (
;RTS ( Close definition

where type is a value between 0 and 2 that determines the impact of the function on the RLC
limitation when the function is called by the instruction C and allows the compiler to recognise any
improper use of the function. If the function is called by the instructions = C, U C, UN C, O C and
ON C the RLC limitation is not imposed by type but by instruction itself (which limits the RLC in
case of = C, but does not limit RLC in all other cases).

The type meaning is summarised in the following table.

0 The function limits the RLC, the following enquiring will set a new value to RLC.
The 0 type functions cannot be used by the instructions U C, UN C, O C and ON C.
1 The function does not limit the RLC, the following enquiring will combine its operand
with the RLC and will set a new value to RLC.
The 1 type functions cannot be used by the instruction = C.
2 The function does not consider the RLC limitation.
The 2 type functions can be called by any instruction.

6.2 ASSEMBLER WRITTEN FUNCTIONS

The definition for the ASSEMBLER written function is similar to the FORTH function definition:

type CALL_PLC function_name ( Open definition


... (
... ( Define Function
... (
RTS ; ( Return to AWL cycle
END-CODE ( Close definition

All the rules explained for the definition of the FORTH function are valid for ASSEMBLER too.

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6.3 ACCESSING PLC PARAMETERS

The following table shows the main parameters used by the PLC.

ACC1 D3 register of CPU


ACC2 D4 register of CPU
ACC3 D2 register of CPU. This register is loaded by the instruction XFX and read
by the instruction :FX, but it can be used by other instructions too, as a
temporary register, so between the instructions XFX and :FX there must
only be transfer or loading operations
Index D5 register of CPU. This register is loaded with the instruction B and later
used by the instructions LI and TI
RLC D6 register of CPU
Output map pointer A5 register of CPU
System RAM pointer A6 register of CPU
Merker area Address contained in the variable Mapmer
Data area Address contained in the variable Mapdat
Input image area Address contained in the variable Mapein
Input area Address defined by the CONSTANT ADDRIN
Output image area Address defined by the CONSTANT OUT-TAB
Output area Address defined by the CONSTANT ADDOUT
Timer area Address contained in the variable Maptim
Counters area Address contained in the variable Mapcnt

6.3.1 FORTH words for interfacing AWL

This list of FORTH words can help the interfacing with the AWL program.

It returns to the stack the value of the specified merker.

Syntax: byte bit --- value


Arguments: byte number of merker bytes
bit number of merker bits
value value of the specified merker
See also: MS MR

Example: Store in the variable Var1 the state of the merker M62.3

...
62 3 m ( Read the merker
Var1 ! ( Memorisation
...

MS

It sets the specified merker.

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chapter 6. DEFINITION OF FUNCTIONS CALLABLE FROM AWL

Syntax: byte bit ---


Arguments: byte number of merker bytes
bit number of merker bits
See also: m MR

Example: If the variable Var1 is 1 set the merker M62.4 otherwise it must be reset.

...
Var1 @ ( Test condition
IF
62 3 MS ( Set merker
ELSE
62 3 MR ( Reset merker
THEN
...

MR

It resets the specified merker.

Syntax: byte bit ---


Arguments: byte number of merker bytes
bit number of merker bits
See also: m MS

Example: See example in MS.

It returns to the stack the value of the specified PLC timer.

Syntax: ntimer --- value


Arguments: ntimer timer number
value specified timer value
See also: m z

It returns to the stack the value of the specified counter.

Syntax: ncount --- value


Arguments: ncount counter number
value value of the specified counter
See also: m t

AS

It sets the specified output.

Syntax: byte bit ---


Arguments: byte number of output bytes
bit number of output bits

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331 SOFTWARE PLC user's manual ver. 3.11

See also: AR MS MR

AR

It resets the specified output.

Syntax: byte bit ---


Arguments: byte number of output bytes
bit number of output bits
See also: AS MS MR

ein

It returns on the stack the state of the specified input.

Syntax: byte bit --- value


Arguments: byte number of input bytes
bit number of input bits
value state of the specified input
See also: m

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appendix A. MS-DOS PROGRAMS

appendix A. MS-DOS PROGRAMS

A.1 PCTER

This program enables the PC to become the terminal of the controller. It is useful for programming
and as user for application programs. It is connected to the controller by the serial communication
port COM1, as shown in the picture below.
5 SG GND 5

COM1 PC 3 RXD RD 3 RS232 Controller


2 TXD TD 2

DSUB 9 FEMALE DSUB 9 MALE

GND 5

RD 3 RS232 Controller
TD 2

7 SG DSUB 9 MALE
COM1 PC

If the controller ground is not


the same of the PC, the cable shield
3 TXD must be connected only to the
controller side.
2 RXD

DSUB 25 FEMALE

The format for the default transmission protocol is: 9600 bauds, 8 data bits, even parity, one stop bit.
The command PCTER /? shows the various program options.

A.2 BLOAD

This program permits to transfer the content of memory areas from the PC to the controller and
viceversa. It can be used to transfer or read AWL programs. The command BLOAD without
parameters shows the various program options.

A.3 RIGEN

This program erases all AWL programs stored in flash eprom. In case of a sudden interruption of
the operation (i.e. no power supply), by calling again RIGEN the operation interrupted can be
successfully completed. The command RIGEN /? shows all program options. This program can be
used only in systems with internal flash eprom (CTE300).

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331 SOFTWARE PLC user's manual ver. 3.11

appendix B. MEMORY CONFIGURATION

CTE300 331CPU
0 0
Firmware EPROM area Firmware EPROM area
$ 3FFFF $ FFFFF
$ 100000
$ 100000
RAM area used
FLASH EPROM area
by the firmware
$11FFFF
$ 104FFF
$ 1C0000 $ 105000
RAM area used Free RAM area
$ 106FFF
by the firmware $ 107000
$ 1C5FFF
$ 1C6000
Free RAM area Free RAM area
$ 1C7FFF for the PLC (relocable)
$ 1C8000

$ 13DFFD
$ 13DFFE
Free RAM area Pointers area
for the PLC (relocable)
$ 13FFFF
$ 140000

$ 1D7BFD
$ 1D7BFE Free RAM area
T_MOT RAM area (expansion)
and pointers
$ 1DFFFF
$ 17FFFF
$ 300000

FLASH EPROM area

$ 3FFFFF

The memory areas used by the merker, timers, counters etc. are allocated at the end of the PLC’s
reserved buffer. To know the real address of these areas type in FORTH ì the following commands:

Parameters Command
Merker Mapmer D@ H.
Data word Mapdat D@ H.
Timers Maptim D@ H.
Counters Mapcnt D@ H.
Input Mapein D@ H.
Output OUT-TAB H.

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appendix C. FUNCTIONS OF THE BASIC LIBRARY

appendix C. FUNCTIONS OF THE BASIC LIBRARY

Inside the operative system EPROM there is a basic library with general functions to recall by the
instruction C.

S1LED

It turns on the front panel LED, whose code is specified in ACC1. See appendix D for the LED code
table.

Belonging class: Basic library


Calling mode: C =C
Modify RLC: NO
Requested parameters ACC1: LED code
ACC2: Ineffective
Returned parameters ACC1: Unchanged
ACC2: Unchanged
See also: S0LED

Example: Turn on the LED n 0 when the input E0.0 is active. The operations of turning on and off the LED are executed
only by the changing the state edge of E0.0 to avoid unnecessary overloading of the cycle execution.

L KZ0 * Load in ACC1 the number of the wanted LED


U E0.0 * Test the leading edge of E0.0
D M250.0
= C S1LED * Conditioned call for the function of LED turning on
UN E0.0 * Test the falling edge of E0.0
D M250.1
= C S0LED * Conditioned call for the function of LED turning off

S0LED

It turns off the front panel LED whose number is specified in ACC1. See appendix D for the LED
code table.

Belonging class: Basic library


Calling mode: C =C
Modify RLC: NO
Requested parameters ACC1: LED code
ACC2: Ineffective
Returned parameters ACC1: Unchanged
ACC2: Unchanged
See also: S1LED

Example: See S1LED.

SFLED

It enables the flashing mode for the LED whose number is specified in ACC1. Use the function
S0LED to disable the flashing mode.

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331 SOFTWARE PLC user's manual ver. 3.11

Belonging class: Basic library


Calling mode: C =C
Modify RLC: NO
Requested parameters ACC1: LED code
ACC2: Ineffective
Returned parameters ACC1: Unchanged
ACC2: Unchanged
See also: S0LED S1LED

R.QD

Return in ACC1 the screen number (video page) of the running user interface program, specify in
ACC1 the TASK number where the user interface program is running.

Belonging class: Basic library


Calling mode: C =C
Modify RLC: NO
Requested parameters ACC1: TASK number
ACC2: Ineffective
Returned parameters ACC1: Video page number
ACC2: Unchanged
See also: R.PVPE

Example: Set the merker M10.0 when the current video page of TASK 1 is equal to 2.

L KZ1 * TASK number


C R.QD
L KZ2 * Check if screen 2
=F
= M10.0

R.PVPE

It returns in ACC1 the line number and in ACC2 the column number of the current input field,
specify in ACC1 the TASK number where the user interface program is running.

Belonging class: Basic library


Calling mode: C =C
Modify RLC: NO
Requested parameters ACC1: TASK number
ACC2: Ineffective
Returned parameters ACC1: Row number (PV)
ACC2: Column number (PE)
See also: R.QD

abiwd

It enables controlling the watch dog circuit that resets and restarts the system when an error
condition is detected (see appendix G).

Belonging class: Basic library


Calling mode: C =C
Modify RLC: NO

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appendix C. FUNCTIONS OF THE BASIC LIBRARY

Requested parameters ACC1: Ineffective


ACC2: Ineffective
Returned parameters ACC1: Unchanged
ACC2: Unchanged
See also: diswd comwd

diswd

It disables controlling the watch dog circuit (default condition).

Belonging class: Basic library


Calling mode: C =C
Modify RLC: NO
Requested parameters ACC1: Ineffective
ACC2: Ineffective
Returned parameters ACC1: Unchanged
ACC2: Unchanged
See also: abiwd comwd

comwd

It is a complement to the watch dog control bit. The function must be called at each #MAIN cycle.

Belonging class: Basic library


Calling mode: C =C
Modify RLC: NO
Requested parameters ACC1: Ineffective
ACC2: Ineffective
Returned parameters ACC1: Unchanged
ACC2: Unchanged
See also: abiwd diswd

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331 SOFTWARE PLC user's manual ver. 3.11

appendix D. CONFIGURATION OF FRONT PANEL

D.1 CTE300

cmz CTE 300 series

(0) (4) (6) (11) (12) (41) (40)


(17) (16) (23) (22) (21) (19) (11)
F1 F2 F3 F4 F5 START STOP

(9) (8) (15) (14) (13) (20) (4) (26) (3) (25)
1 2 3 4 5 - CLEAR CTRL ESC

(44) (23)
(1) (0) (7) (6) (5) (12) (18) (10) (2) (24)
6 7 8 9 0 . ENTER

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appendix D. CONFIGURATION OF FRONT PANEL

D.2 CTX618

A D G
F1 F6 7 B 8 E 9 H ESC EXT X+ Y+ Z+
+ C F I Ctrl-Z

J M P
F2 F7 4 K 5 N 6 Q
X- Y- Z-
- L O R Del

S V Y
F3 F8 1 T 2 W 3 Z E
U X [SP] N
T

F4 F9 0
(
)
. =
$ - *
+ E
R
% / Ins
"

F5 Fn O
Home PgUp PgDw End

1
0 25 41 27 11 28 31 29 5 46

3
32 33 1 35 43 12 15 13 61 6

0 2 4 5
16 17 26 2 51 55 53 21 14

56 57 34 42 19 52 7 63 62 22

/6 6
8 40 18 58 36 44 39 54

This table shows the meaning of each key when pressed alone or after pressing key Fn (within 5
seconds).

Meaning
Symbol Aline After key Fn (Rolling codes)
F1 F1 Shift+F1
F2 F2 Shift+F2
F3 F3 Shift+F3
F4 F4 Shift+F4
F5 F5 Shift+F5
F6 F6 Shift+F6
F7 F7 Shift+F7
F8 F8 Shift+F8
F9 F9 Shift+F9
ESC Esc Ctrl+Z
Backspace Del
ENTER Enter Insert
Left Home
Up PageUp

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331 SOFTWARE PLC user's manual ver. 3.11

Down PageDown
Right End
7 7 A B C a b c
8 8 D E F d e f
9 9 G H I g h i
4 4 J K L j k l
5 5 M N O m n o
6 6 P Q R p q r
1 1 S T U s t u
2 2 V W X v w x
3 3 Y Z space y z _
0 0 ( ) " [ ] ' { } ` < >
. . = $ % # & | ! @ ?
- - + * / \ ^ , : ; ~

D.3 CTD913

F1 A B C D E F
+ ! @ # $ % ^ 0 5 21 38 31 39 63

F2 G H I J K L
- & * ( ) [ ] 32 37 61 46 62 55 47
F3 M N O P Q R
{ } : ; " ' 16 45 53 30 22 15 23

F4 S T U V W X
, < > ? / \ 56 13 29 14 54 7 4
F5 Y Z Back
Space TAB space
| _ 8 24 6 10 50 12
F6 7 8 9 -
E Ins
~ = ` +
N
25 41 27 11 19 60
T
F7 E
4 5 6 0 R Del
33 1 35 43 34 52 20

F8 1 2 3 . é Esc
PgUp 17 26 2 51 42 58 28
F9 ê
F11
Alt Ctrl ç è 57 3 59 18 36 44
Home PgDw End

F10 Fn
F12 9 40

Shift
49

The CTD913 keyboard is completely similar to a standard PC keyboard. Keys’ alternative codes
can be obtained by pressing and releasing (within 5 seconds) Fn key.

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appendix E. FAST GUIDE FOR AWL INSTRUCTIONS

appendix E. FAST GUIDE FOR AWL INSTRUCTIONS

Instruction Pag Belonging class RLC RLC RLC Description


dep. mod. lim.
) 41 Logical instructions N Y N Close an instruction block opened with U( or O(.
+F 62 Logical-arithmetical N N N Sum ACC1 and ACC2. The result is stored in ACC1,
instr. the previous value is lost.
-F 63 Logical-arithmetical N N N Subtract ACC1 from ACC2 (ACC2-ACC1). The
instr. result is stored in ACC1, the previous value is lost.
:F 64 Logical-arithmetical N N N Divide ACC2 at 32 bit wide by ACC1
instr. (ACC2/ACC1). The result is stored in ACC1 and the
remainder in ACC2, their previous values are lost
:FS 65 Logical-arithmetical N N N Divide ACC2 at 16 bit wide by ACC1
instr. (ACC2/ACC1). The result is stored in ACC1 and the
remainder in ACC2, their previous values are lost
:FX 65 Logical-arithmetical N N N Divide ACC3:ACC2 (64 bit wide) by ACC1 at 32
instr. bit wide The result is stored in ACC1 and the
remainder in ACC2.
<=F 71 Comparison N Y N Compare ACC1 with ACC2, if ACC2 ACC1 the
instructions RLC is set to 1.
<>F 70 Comparison N Y N Compare ACC1 with ACC2, if ACC2 ACC1 the
instructions RLC is set to 1.
<F 71 Comparison N Y N Compare ACC1 with ACC2, if ACC2<ACC1 the
instructions RLC is set to 1.
= 44 Storing instructions N N Y Assign RLC value to the operand.
=BEA 80 System instructions Y N Y Conditioned closure of a subroutine.
=C 84 Library instructions Y - (1) Y RLC conditioned calling of a FORTH vocabulary
function
=F 70 Comparison N Y N Compare ACC1 with ACC2, if ACC2=ACC1 the
instructions RLC is set to 1.
= JSR 80 System instructions Y N (3) Y Conditioned calling of #USER whose number is
specified in the operand.
=STP 73 System instructions Y N Y Stop at the end of the PLC cycle (only if RLC=1).
>=F 71 Comparison N Y N Compare ACC1 with ACC2, if ACC2 ACC1 the
instructions RLC is set to 1.
>F 70 Comparison N Y N Compare ACC1 with ACC2, if ACC2>ACC1 the
instructions RLC is set to 1.
ADD 63 Logical-arithmetical N N N Increase ACC1 with the value specified in the
instr. operand.
AIN 81 System instructions N N N Enable the execution of the #INT subroutine whose
number is specified in the operand.
ASS 66 Logical-arithmetical N N N Calculate the absolute value of ACC1, the result is
instr. stored in ACC1, the previous value is lost.
AST 80 System instructions N N N Enable the execution of the #SUBTIME subroutine
whose number is specified in the operand.
B 59 Indexed load/transf N N N Load index register for the next load/transfer
instructions operations.
BE 79 System instructions N N Y Unconditioned closure of a subroutine.
BEA 79 System instructions N N Y Unconditioned closure of a subroutine.
BEGIN 75 System instructions N N Y Open an instruction group for a cyclic execution.
C 84 Library instructions N - (1) - (2) Unconditioned calling of a FORTH vocabulary
function.

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Instruction Pag Belonging class RLC RLC RLC Description


dep. mod. lim.
CASE 76 System instructions N N Y Jump to one of the following program blocks
indexed with ACC1.
CHK 82 System instructions N N (3) N Check a condition of the CONDITIONAL CODE
REGISTER and eventually jump to the subroutine
#SUBCHECK.
COF 78 System instructions Y N Y Open an instruction block within a
CASE...ENDCASE that is executed only if RLC=1.
D 43 Dynamic control N Y N Detect the RLC edges, the RLC image is stored in
instructions the specified merker as operand.
DEC 64 Logical-arithmetical N N N Decrease by 1 the specified operand.
instr.
DIN 82 System instructions N N N Disable the execution of the subroutine #INT whose
number is specified in the operand.
DST 81 System instructions N N N Disable the execution of the subroutine #SUBTIME
whose number is specified in the operand.
ELSE 74 System instructions N N Y Close an instructions block opened by IF and open
an instructions block to be executed in alternative to
the block opened by the instruction IF.
ELSEOF 78 System instructions N N Y Open an instructions block by CASE...ENDCASE
that be executed if all previous tests have failed.
ENDCASE 77 System instructions N N Y Close a block opened by the instruction CASE.
ENDIF 75 System instructions N N Y Close an instructions block opened by IF or ELSE.
ENDOF 78 System instructions N N Y Close an instructions block opened by the
instructions OF, TOF, MOF, COF or ELSEOF.
The program processing continues on the line
immediately following the ENDCASE.
I 72 Complementing S N S Complement the operand state (if RLC=1).
instructions
I RLC 72 Complementing N S N Complement RLC.
instructions
IF 74 System instructions Y N Y Open an instructions block to be executed only if the
RLC=1.
INC 64 Logical-arithmetical N N N Increase by 1 the specified operand.
instr.
JSR 80 System instructions N N (3) Y Unconditioned calling of the #USER whose number
is specified in the operand.
KEW 66 Logical-arithmetical N N N Calculate the complement to 1 of ACC1, the result
instr. is stored in ACC1, the previous value is lost.
KZW 67 Logical-arithmetical N N N Calculate the complement to 2 of ACC1, the result
instr. is stored in ACC1, the previous value is lost.
L 55 Load/transf. N N N Load the operand in ACC1, the previous value of
Instructions ACC1 is transferred to ACC2.
LI 59 Indexed load/transf. N N N Indexed loading in ACC1, the previous value of
Instructions ACC1 is transferred to ACC2.
MOF 78 System instructions N N Y Open an instructions block within a
CASE...ENDCASE to be executed only if the value
stored in ACC1 is equal to one of the given value.
O 39 Logical instructions N Y N OR between the RLC and the operand.
O 40 Logical instructions N Y Y OR of AND combinations.
no op.

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appendix E. FAST GUIDE FOR AWL INSTRUCTIONS

Instruction Pag Belonging class RLC RLC RLCl Description


dep. mod. im.
O( 40 Logical instructions N Y Y OR between parenthesis blocks.
OC 85 Library instructions N Y N OR between the RLC generated by the called
subroutine with the previous RLC.
OF 77 System instructions N N Y Open an instructions block within a
CASE...ENDCASE to be executed only if ACC1 is
equal to the given value.
ON 39 Logical instructions N Y N Negated OR between the RLC and the operand.
ON C 85 Library instructions N Y N Negated OR between the RLC generated by the
called subroutine and the previous RLC.
OW 61 Logical-arithmetical N N N Logical OR between ACC1 and ACC2, the result is
instr. stored in ACC1, the previous value is lost.
R 44 Storing instructions Y N Y Reset the operand if RLC=1.
R 53 Counting Y N Y Reset the counter if RLC=1.
instructions
R 51 Timing instructions Y N Y Reset the timer if RLC=1.
R RLC 45 Storing instructions N Y N Unconditionally set to 0 the RLC.
S 44 Storing instructions Y N Y Set the operand if RLC=1.
S 53 Counting Y N Y Set the counter with the value specified in ACC1 (if
instructions RLC=1).
S RLC 45 Storing instructions N Y N Unconditionally set to 1 the RLC.
SA 49 Timing instructions Y N Y Start a timer as a disinsertion delay. The time value is
specified in ACC1.
SE 48 Timing instructions Y N Y Start a timer as an insertion delay. The time value is
specified in ACC1.
SI 46 Timing instructions Y N Y Start a timer as a limited impulse. The time value is
specified in ACC1.
SLB 67 Logical-arithmetical N N N Left shift of the less relevant byte of ACC1, the shift
instr. number is specified in ACC2.
SLD 69 Logical-arithmetical N N N Left shift of ACC1, the shift number is specified in
instr. ACC2.
SLW 68 Logical-arithmetical N N N Left shift of the less relevant word of ACC1, the
instr. shift number is specified in ACC2.
SRB 68 Logical-arithmetical N N N Right shift of the less relevant byte of ACC1, the
instr. shift number is specified in ACC2.
SRD 69 Logical-arithmetical N N N Right shift of ACC1, the shift number is specified in
instr. ACC2.
SRW 69 Logical-arithmetical N N N Right shift of the less relevant word of ACC1, the
instr. shift number is specified in ACC2.
SS 51 Timing instructions Y N Y Start a timer as an insertion delay with memory. The
time value is specified in ACC1.
STI 73 System instructions N N Y Immediately stop the PLC.
STP 73 System instructions N N Y Unconditionally stop the PLC at the end of the cycle.
SUB 63 Logical-arithmetical N N N Decrease ACC1 with the value specified in the
instr. operand.
SV 47 Timing instructions Y N Y Start a timer as extended impulse. The timer value is
specified in ACC1.
T 57 Loading/tranf. N N N Transfer ACC1 to the specified operand.
Instructions
T PA 57 Loading/tranf. N N N Transfer the output image byte in the physical
Instructions peripheral output byte.
TAK 58 Loading/tranf. N N N Exchange ACC1 with ACC2.
Instructions

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Instruction Pag Belonging class RLC RLC RLC Description


dep. mod. lim.
TI 59 Indexed load/tranf. N N N Indexed transferring of ACC1.
Instructions
TOF 77 System instructions N N Y Open an instructions block within
CASE...ENDCASE to be executed if ACC1 is in
between the two given values.
U 38 Logical instructions N Y N AND between RLC and the operand.
U( 41 Logical instructions N Y Y AND between parenthesis blocks.
UC 84 Library instructions N Y N AND between the RLC generated by the called
subroutine, with the previous RLC.
UN 38 Logical instructions N Y N Negated AND between the RLC and the operand.
UN C 85 Library instructions N Y N Negated AND between the RLC generated by the
called subroutine with the previous RLC .
UNTIL 76 System instructions Y N Y Close an instructions block to be executed cyclically.
UW 61 Logical-arithmetical N N N Logical AND between ACC1 and ACC2, the result
instr. is stored in ACC1, the previous value is lost.
XF 64 Logical-arithmetical N N N Multiply 32 bit wide ACC1 by ACC2 (ACC2
instr. ACC1), the result is stored in ACC1 the previous
value is lost.
XFS 65 Logical-arithmetical N N N Multiply 16 bit wide ACC1 by ACC2 (ACC2
instr. ACC1), the result is stored in ACC1 the previous
value is lost.
XFX 65 Logical-arithmetical N N N Multiply ACC2 by ACC1 32 bit wide with the result
instr. 64 bit wide in ACC3:ACC1.
XOW 62 Logical-arithmetical N N N EXCLUSIVE OR between ACC1 and ACC2, the
instr. result is stored in ACC1, the previous value is lost.
ZR 52 Counting Y N Y Decrease by 1 a counter.
instructions
ZV 52 Counting Y N Y Increase by 1 a counter.
instructions

(1) The instruction modifies or not the RLC depending on the called function.
(2) The instruction limits or not the RLC depending on the type of function called.
(3) The RLC is not modified by the instruction, but its state depends on the relative subroutine execution.

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appendix F. SYSTEM VARIABLES LIST

appendix F. SYSTEM VARIABLES LIST

In the following table there is a list of system variables that can be entered by the instructions L DS
and T DS. Some variables are only for reading, if during the program execution a writing instruction
is found, it will be ignored.

Index Access Description


0 R/W Register D0 of the CPU.
1 R/W Register D1 of the CPU.
2 R/W Register D2 of the CPU. Correspond to ACC3.
3 R/W Register D3 of the CPU. Correspond to ACC1.
4 R/W Register D4 of the CPU. Correspond to ACC2.
5 R/W Register D5 of the CPU. Correspond to the index register used by the
instructions B, LI and TI.
6 R/W Register D6 of the CPU. Correspond to the RLC.
7 R/W Register D7 of the CPU.
8 R/W Register A0 of the CPU.
9 R/W Register A1 of the CPU.
10 R/W Register A2 of the CPU.
11 R/W Register A3 of the CPU.
12 R/W Register A4 of the CPU. Pointer to the remote output memory map with CAN
network.
13 R/W Register A5 of the CPU. Pointer to output memory map.
14 R/W Register A6 of the CPU. Pointer to PLC system area.
15 R/W Register A7 of the CPU.
16 19 Not used
20 R Merker area address (Mapmer).
21 R Data memory area address (Mapdat).
22 R Input image address (Mapein).
23 R Input area address (ADDRIN).
24 R Output image address (OUT-TAB).
25 R Output area address (ADDOUT).
26 R Timers’ area address (Maptim).
27 R Counters’ area address (Mapcnt).
28 R Address of #USER addresses.
29 Not used
30 R/W Enable RESET after exceptions.
31 R Type of system power
32 R Exception status register
33 R Exception program counter
34 R Format and Vector offset
35 R Exception address error
36 R Exception number task
37÷39 Not used
40 R/W Cycle time of #MAIN
41 R/W Execution time of the #SUBTIME 0
42 R/W Execution time of the #SUBTIME 1
43 R/W Execution time of the #SUBTIME 2

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331 SOFTWARE PLC user's manual ver. 3.11

44 R/W Execution time of the #SUBTIME 3


45 Not used
46 R/W Flag to force the PLC STOP.
47 R/W Flag to execute starting subprograms.
48 R/W System power on counter with the back up battery state low.
The returned value is relevant only for the systems that use power supply unit
UNIPOW19 or UNIPOW60.
49 R/W Maximum number of system power to be executed when the backup battery is
flat, after this the system will perform a TOTAL RESET.
The returned value is relevant only for systems using power supply unit
UNIPOW19 or UNIPOW60.
50÷51 Not used
52 R/W Type of test issuing a jump to the #SUBCHECK.
53 R/W Identifier for instruction CHK.
54 Not used
55 R RTC value. It is a double word increased by the operative system every
millisecond.
56 R/W Last PLC cycle duration.
57 R/W Maximum duration of the PLC cycle.
58 R Software release of PLC.
59 Not used

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appendix G. ERRORS

appendix G. ERRORS

G.1 FLASH EPROM

The following table shows the error messages that can appear during flash eprom operations.

No source program An attempt to save in flash eprom was done with empty
editor buffer.
Insufficient memory An attempt to load or save a too big program was done
Illegal PLC program number An attempt to load a not existing program from flash
eprom was done.
Write error A flash eprom writing error has occurred.
Read error A flash eprom reading error has occurred.
Flash Eprom chip not present An attempt to execute an operation in a not existing flash
eprom bank has occurred.
Erasure error An error has occurred during flash eprom erasure.
The object code will be lost. An attempt to load a source code from flash eprom was
Confirm ? done but due to its dimension the current object code will
be overwritten. By answering YES the PLC will be
stopped and the new source code will be loaded.
FORTH source in the F.E. An attempt to save a program has occurred, but due to its
dimension or the number of programs previously stored,
it will overlap the flash eprom used by the FORTH.
F.E. erasable only by FORTH An attempt to erase the flash eprom was done when the
compilation of a FORTH source code has overwritten the
AWL reserved area.
WARNING Internal Flash Eprom This warning message is issued when the instruction
will be not erasable from PLC AUTOPLC is executed, and the selfstarting mark is
stored in the PLC reserved area.

G.2 DISK

During disk operations the following errors can occur.


If the PLC user interface is running on a terminal with less than 40 columns, the error message is
substituted with a code number.

Code Message Meaning


19 Disk write protected An attempt to save a file in a disk write protected
was done.
2,18 File not found The required file cannot be found.
3 Path not found The required directory does not exist.
23,25,27, Disk error Read or write disk error.
29,30

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5 Access denied The required file cannot be accessed.


8 Insufficient memory An attempt to load a file longer than the editor
buffer was done.
15,20,26 Illegal unit The required unit does not exist.
21 Drive not ready The required unit does not exist or is not ready.
255, Time out or CRC error The PCTER program does not answer or an error
32767 during serial communication has occurred.
38 Disk full No more space for data file on disk.
xxx Error number xxx Generic error number xxx.
M. not aval.! K.OBJ? An attempt to load a file which would overwrite the
Y(1)/N(0) object program memory has occurred..

G.3 COMPILING

First the program compilation executes a syntax check in order to find errors in the AWL file.
Possible error messages are:

MESSAGE CAUSE
No source program Compilation or syntax check of a not existing
program
Insufficient memory Compilation of a source too large program. Note
that the PLC memory buffer has to contain the
source program, the object program and the
system area.
Extend the length of the editor buffer or reduce
the length of the source program.
Syntax error The instruction is incorrectly written.
Odd number The instruction accepts only even numbers.
Number not admitted The number written in the instruction is not
within the limits allowed.
Unknown operative code The written mnemonic is not recognised as an
allowed instruction.
Block not closed An IF instruction has not been closed by the
instruction ENDIF before the program end.
No opened block A block closure instruction ENDIF has been
issued even if the block was not previously
opened by the instruction IF.
Max block level reached Too many blocks have been nested IF...ENDIF
or BEGIN...UNTIL or CASE...ENDCASE.
Brackets not closed In the program the instructions U( or O( were
used without brackets .
No opened brackets In the program the instruction ) was used
without ever opening the bracket with the
instructions U( or O(.
Max brackets level reached Too many instructions sequences U( ... ) or O(
... ) have been nested together.

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appendix G. ERRORS

Function not found or enabled A non-existing or not defined function has been
called with CALL_PLC or :PLC.
Error function call The function type is not compatible with the
instruction used for its call. Ex., a type 0
function called by the instruction U C xxx or a
type 1 function called by the instruction = C.
Subroutine not closed with BE The subroutine beginning with #... has not been
closed with the instruction BE.
Unknown subroutine code The name of the subroutine after the character #
is not allowed.
Unknown SUBTIME An instruction AST or DST referred to a not
defined #SUBTIME. has been used.
Unknown INT An instruction AIN or DIN referred to a not
defined #INT has been used.
Unknown USER An instruction JSR or =JSR referred to a not
defined #USER has been used..
Wrong prog. sequence The instruction sequence typed is not correct.
Subroutine already defined A subroutine has been defined more than once.
Insufficient system area More than 64 Kbyte are requested for the
system area on #DEFPLC . Otherwise the
available memory is not sufficient to contain the
system area.
DEFPLC first block only The block #DEFPLC is not the first block of the
program.

G.4 RUN-TIME

During the program execution some errors can stop the program from running.
In these cases, the operative system stops all running tasks and all programs on interrupt (same as a
keyboard break, pressing the keys Ctrl+Shift+Esc and Esc), then it restarts the operative system
and also the user application program (if selfstarting).

At the restarting of the user program, the PLC is set to STOP and the subroutine #ERROR is
executed which can test the error condition by DS, correct the error and eventually set to RUN the
PLC.

When the PLC user interface is activated, a window containing an error identification message is
issued.

Operative system error The system has been restarted after a run-time error. The message
gives the task number of where the error was issued or says if the
error was on interrupt.
Watch dog intervention The system has been restarted after a CPU reset due to the watch
dog circuit intervention.

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PLC total reset done A PLC total reset of the memory area has been executed, after
losing memory or after a memory reallocation by the user.
Low battery Total reset A PLC total reset of the memory area has been executed because
the counter’s maximum level of system power was achieved with
flat battery.
Only for systems equipped with UNIPOW19 or UNIPOW60
Low battery The system was turned on with a flat battery state.
Only for systems equipped with UNIPOW19 or UNIPOW60.
The last three messages are not run time errors but are shown when at PLC’s user interface starting, that error condition
is found.

In case of Operative system error it is possible to find the error cause by using the task number
given with this message.

TASK 4 The error has been generated within the PLC cycle. The error is surely due to
AWL program.
TASK 0 The error has been generated by the debugger task. The error is due to the AWL
program only if a subroutine #INT has been called from the keyboard by the
instruction Exeint.
TASK x The error has been issued within task x. The error is due to the AWL program
only if a subroutine #INT has been called within this task.
IRQ The error has been issued within a program hooked to interrupt. The error is due
to the AWL program only if there are some #SUBTIMEs or if some #INT
subroutine are hooked to interrupt.

If the error is due to the AWL program, it is possible by the editor’s F5 key to execute a false
compilation in order to recognise the AWL row that issued the error (the operation is valid only if
the source AWL program has not been modified).
If the error search line issues the following message:
Error is not in the AWL object code

it means that the error is due to the AWL program or that the error has been generated by a function
called in the AWL program by the instruction C.

At restarting the operative system stores in:

DS31 Type of system power on:


1 = Normal power on.
2 = Reset generated by the watch dog.
3 = Reset after a keyboard break command.
4 = Reset after a run time error.
DS32 Status register at the moment of the run time error.
DS33 Program counter at the moment of the run time error.

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appendix G. ERRORS

DS34 Format and vector offset:


8 = Bus error
12 = Address error
16 = Illegal instruction
20 = Division by zero
24 = CHK,CHK2 instructions
28 = TRAPcc, TRAPV instructions
32 = Privtheege violation
40 = Line 1010 emulator
44 = Line 1111 emulator
96 = Spurious interrupt
DS35 Address that issued the error.
DS36 Task number where the run time error has been detected (-1 = the error was on
an interrupt program).

In the subroutine #ERROR it is possible to read all these information and to store them in variables
in order to go back to the error cause.
To interpret these DSs a good acknowledge of the operative system is required.

By the DS30 it is possible to enable or disable to control the run time errors. When this function is
disabled, if there is an error, the system goes to the debugger program.

On the subroutine #ERROR, it is possible to set to RUN the PLC clearing the DS46.

G.5 WATCH DOG

The watch dog is a circuit placed on the power supply unit with the aim of watching a continuos
change in a particular line. If within a certain time the state of this line does not change, the power
supply unit sends a reset to the CPU, the operative system is restarted and eventually also the user
program - if selfstarting. (After a watch dog intervention the function is the same as after a run time
error, so the notes in paragraph G.4 are still valid).

The watch dog circuit is normally disabled. To enable it use the function abiwd, then the program
will call cyclically the function comwd that will complement the watch dog control line.

The watch dog enabling instruction (abiwd) must be placed in the starting subroutine, while the
complementing watch dog control line instruction (comwd) must be placed in #MAIN.
#RESET * Start after a total reset
... * Various initialisations
C abiwd * Enable watch dog
BE

#START * Normal start


... * Various initialisations
C abiwd * Enable watch dog
BE

#RUN * STOP to RUN change


... * Various initialisations
C abiwd * Enable watch dog
BE

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#MAIN * Main program


C comwd * Change watch dog control line
... * Program
...
BE

Since the program starting the watch dog always stays enabled. So if the PLC is set to STOP
manually or a program compilation is made (that stops the PLC cycle momentarily) the function
comwd is no more executed: this fact causes a watch dog intervention. To solve this problem the
subroutine #STOP must be programmed to disable the watch dog circuit.
#STOP * Change to STOP
C diswd * Disable the watch dog
... * Other operations
BE

The given example is suggested for abiwd, comwd and diswd and is good in many AWL
programming situations. There is no limit in the use of this instruction, in fact the instruction comwd
can be called more than once within the program to get through the critical part of the program or to
disable and enable the watch dog in certain situations.

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appendix H. PROGRAMMING EXAMPLE

appendix H. PROGRAMMING EXAMPLE

In the following appendix the fundamental phases for building an AWL program are explained.

Example: Consider to program a binary divider as in the picture.

E1.0

A3.0

The phases to achieve this task are:

1. Connect the PC to the controller with a serial cable (appendix A.1).

2. At DOS prompt type the command that starts the communication program:
PCTER <enter>

the following message will be issued:


PCTER VGA v 1.00 03/30/95»

3. Turn on the controller. On the screen the number of the operative system version will appear.
Verify that the connection is activated by pressing the Enter key, the message ok shall be
issued.

4. If the controller is the CTX618 or the CTD913 and on the LCD the main menu is shown, it is
necessary to exit from it by pressing the key Esc from the controller front panel keyboard; on
the LCD the following message will appear:
Now PCPLC is enabled.
press any key to resume.

5. Type on the PC keyboard:


PCPLC <enter>

6. Press key F2 to enter the EDITOR.

7. Type the following program (binary divider), for example:


#MAIN
U E1.0 * Transfer to RLC the E1.0 state
D M0.0 * Test the leading edge of E1.0
I A3.0 * Invert the output value on every leading edge of E1.0
BE

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8. Save the program on disk using the function in the video page FILES.

9. Press F6 to verify eventual syntax errors on the program. Correct the errors then go to the next
step.

10. Press F7 to compile the program. Correct eventual errors (appendix G) and repeat this step.

11. Set to RUN the PLC, if it was in STOP, press key F1.

12. Verify the program functioning, by using the function SHOW (paragraph 3.3.1) and/or TEST
(paragraph 2.2). If some program modifications are needed make them by using the EDITOR
and repeat the procedure from step 8.

13. During the program testing phase, it can be useful to enable or disable the program’s selfstarting
condition. To do it exit from the FORTH interpreter and type:
1 FSTART C! <enter> To enable the selfstarting condition
0 FSTART C! <enter > To disable the selfstarting condition

14. Save the program in the flash eprom in the video page OPTIONS, after choosing the flash eprom
bank, press the key F4 and confirm.

15. Set the program as completely selfstarting, exit from the FORTH interpreter and type:
AUTOPLC <enter>

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ANALYTIC INDEX

ANALYTIC INDEX

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ANALYTIC INDEX

CTE158 update notes for manual


331 SOFTWARE Basic notions
3.3.4 System in debugger

The access to debugger is, by default, disabled (flag=1).

4.2 OPERATING SYSTEM RESET FROM KEYBOARD

Fourth point: The communication parameters don’t change.

4.3 RESET FORTH FROM KEYBOARD

Warning: The reset command from the keyboard can be executed with any communication
parameters. After this operation the communication parameters of the system are setted as in the
PC.

Fourth point: The communication parameters are setted as in the PC.

4.4 UNLINK FROM KEYBOARD AND FLASH EPROM ERASURE

Warning: The reset command from the keyboard can be executed with any communication
parameters. After this operation the communication parameters of the system are setted as in the
PC.

NEW FEATURES OF OPERATING SYSTEM

VREG
The Forth word VREG allows to verify the CPU status at the moment of the last start-up. This word
simplifies the interpretation of the debugger messages described at chapter 5.
VREG prints all the information memorised by operating system. The message interpretation is
showed at chapter 5.
Note that the datas memorised are relative to the last start-up of the operating system, therefore if
the system restarts for a run-time error and then it is turn-off and on again, VREG prints the
informations about the last turn-on operation, and the run-time informations are losted.

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ANALYTIC INDEX

CTE158 update notes for manual


331 SOFTWARE PLC user manual ver.3.11
1.1.1 Total reset

Third point: The standard area is from 10A000 to 11DFFB

1.2 USING THE PLC PROGRAM WHITOUT A COEXISTING FORTH PROGRAM

The system is not self-starting (FSTART=0), see the paragraph 1.2.1 CTE300

1.3 USING PLC PROGRAM WITH A COEXISTING FROTH PROGRAM

The standard area is from 10A000 to 11DFFB

4.1.1 Instruction syntax

KS Identifies a front panel key. It must be used with the instruction: U, UN, O, ON
For example if you want to test the key F3 (code 4) you must write

U KS4

appendix B. MEMORY CONFIGURATION

0 Firmware EPROM
$ FFFFF
$ 100000 RAM area used by the firmware
$ 106FFF
$ 107000 Free RAM area
$ 109FFF
$ 10A000 Free RAM area RAM for the PLC (relocable)
$ 11DFFB
$ 117BFE T_MOT RAM area and pointers
$ 11DFFF
$ 300000 Flash-EPROM area
$31FFFF /
$37FFFF

appendix C. FUNCTIONS OF THE BASIC LIBRARY

All the functions that manage the LEDs finish with a ‘S’:

S1LEDS Turn on LED. ACC1 specifies the LED number.


S0LEDS Turn off LED. ACC1 specifies the LED number.
SFLEDS Turn on LED in flashing mode. ACC1 specifies the LED number.

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appendice D. CONFIGURATION OF FRONT PANEL

A D
1 B E
C
2 F
ERROR

G J
FAULT
3 H 4 K
I L
RUN

M P
5 N 6 Q
O R

F1 F2 F3 ALT - =
$ 7
S
T 8
V
W
+ - PgUp % U X

F4 F5 F6 Fn
. +
* 9
Y
Z 0
(
)
Home End Del / [SP]
"

PgDw
F7 F8 F9 ESC ENTER
Ctrl-Z Ins

11 7
2
1
23 27
0

15 19

32 28 4 24 20 12 35 31

33 29 5 25 21 17 13 9 10 18

34 30 6 26 22 14

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