Phase-locked loop for grid-connected three-phase

power conversion systems

S.-K.Chung

Abstract: Analysis and design of a phase-locked loop (PLL) is presented for the power factor control
of grid-connected three-phase power conversion systems. The dynamic characteristics of the closed
loop PLL system with a second order are investigated in both continuous and discrete-time domains,
and the optimisation method is discussed. In particular, the performance of the PLL in the three-
phase system is analysed under the distorted utility conditions such as the phase unbalancing,
harmonics, and offset caused by nonlinear loads and measurement errors. The PLL technique for the
three-phase system is implemented in software of a digital signal processor to verify the analytic
results, and the experiments are carried out for various utility conditions. This technique is finally
applied to the grid-connected photovoltaic power generation system with the current-controlled PWM
inverter as a subpart for generating the current reference of the inverter. The experimental results
demonstrate its phase tracking capability in the three-phase grid-connected operation.

1 Introduction angular position [6-81. In three-phase systems, the dq trans-

Grid-connected operation is often utilised to increase the
usability of the local power generation systems using the
photovoltaic or wind energy that cannot provide a constant
power in time and region [l]. The power factor control is
known as one of the most important techniques in connect-
ing the utility grid because the unity power factor ensures
perfect transmission of generated power without the circu-
lating energy [l]. It is necessary for the power factor control
to detect the accurate phase information of the utility volt-
ages. Therefore, the phase-locked loop (PLL) can be con-
sidered to be an important part of grid-connected power
generation systems.
The PLL technique has been used as a common way of
recovering the phase and frequency information in electri-
cal systems [2, 31. In the area of power electronics, the PLL
techmque has been adopted for the speed control of electric
motors [4, 51. This is also available for generating the cur-
rent references synchronised with the utility voltages in the
power conversion system. A simple method of obtaining
the phase mformation is to detect the zero crossing points
of the utility voltages [2]. However, since the zero crossing
points can be detected only at every half-cycle of the utility
frequency (i.e. 120 times per second), the phase tracking
action is impossible between the detecting points, and fast
tracking performance cannot be achieved. Another method
is the technique using the quadrature of the input wave-
form shifted by 90 degrees [2]. This technique is often used
in the various applications for the detection of the phase or
form of the three-phase variables has the same properties
with t h s technique, and the PLL can be implemented by
using the 4 transform and proper design of the loop filter.
This paper describes the characteristics of the PLL using
the dq transform of the three-phase variables and discusses ,
the proper design method. In particular, the performance
of the PLL is analysed and tracking errors are derived for
the distorted utility conditions, such as the phase unbalanc-
ing, harmonics, and offset. In addition to analytical studies,
the experimental verifications are carried out using the dig-
ital signal processor (DSP) system under various uthty
conditions. The important considerations are thus provided
for the design of the PLL in the three-phase grid-connected
operation. Finally, the three-phase PLL technique is
applied to the photovoltaic power generation system con-
nected to the three-phase utility grid.
loop filter VCO 1 1
utility j
voltage;
Vas id'at t v~
I I reference

0IEE, 2000
IEE Proceeukgs online no. 2oooO328
DOf 10.1049/ipepa:20000328
Paper fmt received 22nd July 1999 and in revisad form 20th January 2000
The author is with the Department of Control and Instrumentation Enginer-
ing, Research Institute of Industrial Technology, Gyeongsang National Univer-
sity,900 Gazwa-Dong, chinjy Kyungnam 660-701, Korea
IEE Proc-Electr. Power Appl., Vol. 147, No. 3, May 2000
2 System descriptions
Fig. 1 shows the current reference generator of the three-
phase inverter using the PLL, whch tracks the phase of the
utility voltage. In t h s system, the utility voltage can be rep-
resented as:
213
 second-order loop can be given as:

cos (e + F)
where vdcs = [vu vb, vJT. If the utility voltage is balanced, where Kp and z denote the gains of the PI 1
eqn. 1 can be expressed in a stationary reference frame as: closed loop transfer function is rewritten i
form of the second-order loop as:
vap T s ' vabcs (2)
where vap = [v, va]' and T, denotes the transform matrix
given by:
where

Eqn. 3 can be rewritten in a synchronous reference frame

as:
loop filter vco
vqde = T e (6) v a p
' (4)
where vgde = [v,, vkIT and T, ( 8 ) denotes the rotating
matrix gven by:
Te(8) = (cos8 - sine
sin8 cos8 (5) I I

Fig. 2 Lkarired model of three-phme PLL system

The voltage of interest is the d-axis component and derived
as:
loop filter
V d e = E, sin S and VCO

=e (6)
where E, = -V, and 6 = 8 - 8. The angular frequency can
be represented as:

Fig. 3 Dkrete-time domain model of three-phme PLL system

where Kf denotes the gain of the loop filter. If it is assumed
that the phase difference 6 is very small, eqn. 6 can be line-
arised as: 3.2 Second-order loop in discrete-time domain
Since the PLL is implemented in a digital manner using a
e E,S (8) DSP, the discrete-time model is more useful than the con-
Hence, the PLL output 6 can track the phase of the utility tinuous-time model. The discrete-time model is shown in
voltage by the proper design of the loop fdter. The current Fig. 3. The block Kdz) is the z-transform of the loop fdter
reference in phase the utility voltage can be produced as: and the voltage-controlled oscillator (VCO). The closed
loop transfer function can be represented as:
i:bcs TF1 . TF1(8) ' i:de (9)
where

For the second-order loop using the PI loop filter, Kdz)

can be obtained as:
z(z - a)
K ~ ( z=) Kp-
( z - 1)2
where ct = 1 - TIT and T denotes the sampling time. The
3 Closed loop system transfer function of the discrete-time system can be derived
by substituting eqn. 14 into eqn. 13 as:
3.1 Second-order loop in continuous-time
domain z(z -a)
Fig. 2 shows the linearised model of the system described in H c ( z ) = Hc, . z2 - az + b
Fig. 1. The closed loop transfer function of t h s system can
where
be represented as:
EmKp
a=
+
2 E,Kpa
Hcm =
1 E, K p+ +
1 EmKp
1
where O(s) and 6(s) denote the Laplace transform of 8 and b=
8, respectively. There are various methods to design the
+
1 EmKp
loop fdter. The second-order loop is commonly used as a Fig. 4 shows the root loci of the closed loop system. When
good trade-off of the fdter performance and system stabil- T > 22, the closed loop system is unstable if the open loop
ity [2]. The proportional-integral (PI) loop filter for the zero a is located at the outside of the unit circle.
214 IEE Proc.-Electr. Power Appl.. Vol. 147, NO. 3, May 2000
 bandwidth. However, the use of hgher bandwidth does not
provide better results in all conditions. In some practical
cases such as the distorted utility, the traclung error
increases as the bandwidth increases. Therefore, the selec-
tion of the bandwidth is a compromise between various
factors, which will be discussed in the next Sections.
4 Error analysis for distorted utility
In practice, the utility voltage is not pure sinusoid but is
distorted by the various factors such as the nonlinearities of
the load and measurement devices and by the signal con-
version errors, whch results in the phase unbalancing, har-
monics, and offset. The distorted utility causes various
types of the error in the PLL system.

4. I Phase unbalancing
The utility voltage considering the unbalanced phase can be
given as follows:
U,, = v, cos 0 (18)
Fig.4 Root loci of discrete-time PLL system with secon&r&r

3.3 Optimisation of closed loop performance

In the design of the loop filter, it is desirable that the

+ y)cos (0 +);-
dynamic performance should satisfy the fast tracking and
good fdtering characteristics. However, both requirements U,, = Vm(l 2 (20)
cannot be satisfied simultaneously because the two condi-
tions are inconsistent. Therefore, a trade-off is required in where /3 and y are constants. The d-axis voltage after the 4
the design. transform using eqns. 2-5 can be derived as:
One of the most widely used techniques is the Wiener
method, which is known as the best optimisation method
[2]. By using this method, the transfer function for the
second-order loop is given as:
+P+r
6
(sinocosi + c o s o s i n o
^> 1
From eqn. 12, the damping ratio can be derived as 5 = Under the assumption of very small 6 and 8 + 6 = 26,
0.707. The closed loop bandwidth of the PLL can be deter- eqn. 21 can be simply represented as:
mined by using the stochastic information of the signal and U& E EmS - EmEpu COS(~O + (22)

/m
noise, and can be given in the Wiener method as: where:

EPu=
where Acc, is the deviation of the frequency, P, is the power
of the input signal, WOis the spectral density of the input
noise, and A is the Lagrangian multiplier that determines
the relative proportions of the noise and transient error. Since the d-axis voltage vde is controlled to zero by the PI
type loop fdter, the resultant error caused by the phase
Table 1: Steady-stateerrors for three types of input unbalancing is given as:
Steady-state
Steady-state error for
Type of input
second-order PLL ~ ~ ~
It is noted that the ~phase unbalancing
~ produces~the error ~ ~
with 213 frequency component, where w is the frequency of
Step change of e 0 0
the utility voltage as w = dO/dt.
Step change of w Aw/KAO)€,,, 0
Step Change of 6 A6IKf(0)€,,,+ AU/wn2 Ab/@? 4.2 Voltage harmonics
The source of the voltage harmonics is the nonlinearities of
The steady-state performance of the PLL system is the measurement devices and load. The utility voltage with
related to the shape of the input and the order of the loop harmonics in the balanced condition can be represented as
fdter. In the second-order PLL, the errors for the three follows:
types of input are summarised in Table I, where A h U,, = Vi COS 0 + Vs COS 50 + V7 COS 70 + . . . (24)
denotes the deviations of the derivative of the frequency. It
is shown in this table that the second-order PLL with the
PI type loop fdter has the steady-state error for the step
change of the derivative of the frequency in whch the
frequency varies in time. This error can be reduced by
choosing the higher natural frequency that gives the wider +v7cos7
(0 - - 28+... (25)

IEE Proc-Electr. Power Appl.. Vol. 147, No. 3, May 2000 215
 5 Experiments
w,, = v, cos
(e +):-
2
+ v5cos5 (o + Y)
-
5. I Test of PLL performance
+v7cos7 8 + -
( 3+ . . .
where V,, Vs, V7,... denote the magnitude of the harmonic
The proposed PLL technique is implemented using a soft-
ware of DSP TMS320C31 with a clock frequency. of
40MHz [9, lo]. Fig. 5 shows the experimental set-up for
testing the performance of the PLL. The utility voltages are
components. The d-axis voltage is derived as: generated by using the three-phase arbitrary voltage gener-
'U& = -VI sin 6 + V, sin(8+ 50) + ~7 sin(8 - 78) + . . . ator. The generated three-phase voltages are measured by
the isolation transformer, and the measured signals are
(27) converted to digital values using the analogue-to-digital
This can be rewritten for the small 6 as: (AD)converters, with a resolution of 12 bits. The arbitrary
sin68+(V11 - V I S ) sin E O + . . .
Ude E - V 1 S + ( V 5 - V 7 )
voltage generator can produce various conditions of utility
voltage such as phase unbalancing, harmonics, and offset.
(28)
Therefore, the error caused by the utility harmonics can be
represented as: *T- -
arbitrary
DSP _.

62 Eh6 sin68 + E h 1 2 sin 128 + . . . (29) host pc

~

7TMS320C31*--L- waveform
generator
where:

measurement
It is noted in eqn. 29 that the utility harmonics causes the
error with the frequency components of 601, 1204 ..., which display
are the multiples of six times the utility frequency.
Fig.5 E x p e r ~ t dset-upfor three-phasePLL system
4.3 Voltage offset
The voltage offset is often produced in the measurement
and data conversion processes. The utility voltage with the
offset can be expressed as:
= Vm COS 8 +Vao (30)

The d-axis voltage in the synchronous frame can be repre-

sented as: "de
(100 V/div)
vde = -Vm sin b + V,, sin 6' + Vp, cos 8 (33)
where:

v,, = pa,+
1

vbo
1
+ Vc0) v,, = -&vc0 - Vb,)
This can also be rewritten for the small 6 as:
h

ude Em6 + Eo cos(@+ $0) (34)

0
(2 rad/div)
where:

I I I I I I I I I I I
5 mddiv
Therefore, the error caused by the voltage offset can be Fig.6 Responses ofthree-phe PLL system
v,, = V,, cos 0, V,,, = 311V
shown as: w, = 314 rads, 5 = 0.707

6 E d , COS(8 -k 4,) (35)

where: Figs. 6-8 show the transient responses of the PLL when
the bandwidth are chosen as 50Hz, l O O H z , and 1kHz (i.e.
U,, = 314, 628, and 6280 radls, respectively, where the
damping ratio is chosen as f = 0.707 and V, = 31 1V).
It is shown in this result that the error caused by the offset Under these conditions, the gains of the loop filter can be
has the same frequency component as that of the utility chosen as Kp = 1.43, 2.85, and 28.5, and z = 0.004506,
voltage. 0.002247, and 0.0002251, respectively.
216 IEE Proc.-Electr. Power Appl., Vol. 147, No. 3, May 2000
 that in the 1kHz bandwidth. This is the low pass filtering
effect of the loop filter, and it is known that the lower
bandwidth is more effective at reducing t h s type of the
error.

“de (0.2
(100 V/div)

0
(2 radldiv)

2 msldiv
Fig.9 Errors ofthree-phase PLL system under phase unbalrmcing
v,, = V,, cos 0, V, = 311V
T 5 msldiv w, = 314 rads, 5 =0.707

Fig.7 Responses of three-phme PLL system

v,= V,cosB, V , = 3 1 1 V
w,, = 628 rads, 5 = 0.707

(0.2

T 2 ms/div
Fig. 10 Errors ofthree-phase PLL system under phase wd~uhcing
v, = V, cos 0, V,, = 311V
w, = 628 rad/s, 5 = 0.707

h
0
(2 rad/div)

I I I I I I I I

I$
5 msldiv
Fig.8 Responres of three-phase PLL system
v, = V,, cos R, V, = 311V
= 6280 rads, 5 = 0.707
U,J,

Figs. 9-11 show the errors of the PLL under the phase
unbalancing of the utility voltage. The magnitudes of the
phase Figs. 10 and 11 voltages are given as 90% and 110%
of the phase Fig. 9. As derived in eqn. 22, it is shown that
the error that caused the phase unbalancing has a 2w fre-
quency component. It can be also noted in this figure that 1‘ 2 msldiv

the magmtude of the error is reduced as the bandwidth Fig. 11 Errors of t h r e e y h e PLL system under phase unbahcing
V, = v, COS e, v, = 3iiv
decreases. The error in 50Hz bandwidth is about 50% of w, = 6280 rads, 5 = 0.707
IEE Proc.-Electr. Power Appl.. Vol. 147, No. 3, May 2000 217
 tively. These figures show the time responses and frequency
spectrums. It is shown in Figs. 12-14 that the error has the
frequency component of 6w as shown in eqn. 29. The low
pass filtering effect can also be shown and the error caused
by the harmonics decreases as the bandwidth decreases.
Fig. 15 shows the frequency spectrums of the utility voltage
and cos 8 . It is noted that the 5th and 7th harmonics are
reduced as the bandwidth decreases. This means that the
phase error caused by the 5th and 7th harmonics is
reduced, and that the reproduced signal cos 8 is closer to
the pure sinusoidal wave cos 8 as the bandwidth decreases.

20 dbm/div

va
2 msldiv
Fig. 12 Errors of three-phase PLL system lolder voltage hannonicr
V, = v,,,COS e, v,,,= 311v
w, = 314 radis, 5 = 0.707

20 dbmldiv

cos ii

wn=314 rad

20 dbmldiv

cos ii

w,=628 rad

T 2 msldiv
20 dbmldiv
Fig. 13 Errors of three-phase PLL.system under voltage harmonics
COS e, v, = 311v
V, = v,,,
w, = 628 rads, 5 = 0.707

cos D
wn=6280 rad
I I I I I I I I I

m
100 Hz/div
Fig. 15 Frequency s ectrums of utility voltage and cos 8 under utility har-
moniesf i r variom d i i l h s

Fig. 16 shows the responses of the PLL under the voltage

offset. The DC voltage, which is 10% of the peak utility
voltage, is added to phase a. It is shown, in this figure, that
the error has the same frequency component as that of the
utility voltage as shown in eqn. 35. Since the frequency of
the error is relatively low, the low pass filtering effect of the
loop filter cannot be expected. The extremely low band-
width can provide the filtering effect. However, this may
'I. 2 msldiv
degrade the dynamic performance.
Fig. 14 Errors of three-phase PLL system under voltage ham?onics
V,=V,COSS, V , = ~ I I V 5.2 Application to photovoltaic power
radis, 5 = 0.707
U, = 6280 generation system
The proposed PLL is applied to the grid-connected photo-
The responses of the PLL under the voltage harmonics voltaic power generation system consisting of the PLL, the
are shown in Figs. 12-15, where the 5th and 7th harmonics maximum power point tracking (MPPT) controller, and
are given as 5% and 3% of the fundamental voltage, respec- the current-controlled PWM inverter as shown in Fig. 17.
218 IEE Proc-Electr. Power Appl.. Vol. 147, No. 3, May 2000

t 2 msldiv
Fig.16 Errors of three-phase PLL system under voltage ofset
v, = V, cos 0, V,,, = 311V, w, = 314 rads, C = 0.707
F--k
array
I,
I, control
~
Fig. 17 Conzguraiwn of grd-connected photovoltaic three-phme power gen-
eration system
The rated power of this system is 10.5 [kw].The PLL pro-
duces the current references of the current-controlled three-
phase PWM inverter. The phase currents of the PWM
inverter are controlled to have the same phase as that of
the utility voltages and flow to the AC line without circu-
lating energies. The synchronous frame PI controller is
used to control the phase current. More details on the
MPPT and PWM current controllers are not presented in
this paper because it is out of the main scope. The control
algorithms including the PLL, MPIT, and current control
are implemented in the DSP TMS320C31 system. The
sampling frequency of the control system is 15kHz, which
coincides with the switching frequency of the PWM
inverter.
Vas
100 Vldiv
/.
T
I I
I ,
5 msldiv
Fig. 18 Experimental wuvefoim of gri&omctedp/wtovoltaic power gener-
utwn system
IEE Proc-Electr. Power Appl., Vol. 147, No. 3, May 2000
The gains of the PLL applied in this power generation
system are chosen as Kp = 2.85 and z = 0.002247, which
result in the closed loop bandwidth of 628 (rad/s). Fig. 18
illustrates the utility voltage, current reference, and actual
current of the photovoltaic power generation system,
respectively. It is shown in this figure that the current refer-
ence and actual current are in phase with the utility voltage,
and it should be noted that the unity power factor opera-
tion is achieved in this system.
6 Conclusions
The analysis and design of the three-phase PLL system for
the utility interface inverter have been presented in this
paper. The dynamic modelling, characteristics and optimi-
sation of the PLL system have been discussed. In particu-
lar, the errors caused by the distorted utility conditions
have been analysed. From these studies, the design consid-
erations of the PLL for the three-phase system have been
provided.
The PLL consists of two major parts, the phase detecting
device and loop fdter. The phase detecting can be readily
implemented by using the 4 transform in the three-phase
system. The design parameters of the loop filter are the
<
damping ratio and the natural frequency U,, which deter-
mine the dynamic characteristics.The damping ratio can be
chosen by the Wiener method that has been generally
accepted as the best optimisation. The bandwidth of the
loop fdter is a trade-off between the filtering performance
and response time. W e the higher bandwidth offers the
faster dynamic responses, the traclung error is increased
under the distorted utility conditions. The errors caused by
the phase unbalancing and harmonics have the frequency
components of 2 0 and multiples of 60, respectively, and
can be considerably reduced by using the loop fdter with
the low bandwidth. The error caused by the voltage offset
is of the same frequency as that of the utility voltage. To
reduce this error by the loop fdter, the extremely low band-
width is required. However, this degrades the dynamic per-
formance and is not acceptable.
The presented PLL technique was finally applied to the
photovoltaic power generation system with a power rate of
10.5kW. The experimental result well demonstrated the
phase tracking action of the PLL in the three-phase system.
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219