You are on page 1of 89

THE 8085 INSTRUCTION SET

Prepared By:
Ajay Shah
Asst. Prof., CE Dept
ACET, Khatraj
WHAT IS A MICROPROCESSOR?
 The word comes from the combination micro and
processor.
 Processor means a device that processes whatever.
 In this context processor means a device that
processes numbers, specifically binary numbers, 0’s
and 1’s.
 To process means to manipulate. It is a general
term that describes all manipulation. Again in this content,
it means to perform certain operations on the numbers
that depend on the microprocessor’s design.

Prepared By: Ajay Shah


WHAT ABOUT MICRO?
 Micro is a new addition.
 In the late 1960’s, processors were built using
discrete elements.
 These devices performed the required operation, but
were too large and too slow.

 In the early 1970’s the microchip was invented.


All of the components that made up the processor
were now placed on a single piece of silicon. The size
became several thousand times smaller and the
speed became several hundred times faster. The
“Micro”Processor was born.
3

Prepared By: Ajay Shah


DEFINITION OF THE MICROPROCESSOR

The microprocessor is a programmable device that takes in


numbers, performs on them arithmetic or logical operations
according to the program stored in memory and then
produces other numbers as a result.

Prepared By: Ajay Shah


DEFINITION (CONTD.)
 Lets expand each of the underlined words:
 Programmable device: The microprocessor can perform
different sets of operations on the data it receives
depending on the sequence of instructions supplied in the
given program.
By changing the program, the microprocessor manipulates
the data in different ways.

 Instructions: Each microprocessor is designed to execute a


specific group of operations. This group of operations is
called an instruction set. This instruction set defines what
the microprocessor can and cannot do.
5

Prepared By: Ajay Shah


DEFINITION (CONTD.)
 Takes in: The data that the microprocessor
manipulates must come from somewhere.
 It comes from what is called “input devices”.

 These are devices that bring data into the system

from the outside world.


 These represent devices such as a keyboard, a

mouse, switches, and the like.

Prepared By: Ajay Shah


DEFINITION (CONTD.)
 Numbers: The microprocessor has a very narrow view
on life. It only understands binary numbers.

 A binary digit is called a bit (which comes from


binary digit).

 The microprocessor recognizes and processes a group


of bits together. This group of bits is called a “word”.

 The number of bits in a Microprocessor’s word, is a


measure of its “abilities”. 7

Prepared By: Ajay Shah


DEFINITION (CONTD.)
 Words, Bytes, etc.
 The earliest microprocessor (the Intel 8088 and Motorola’s 6800)
recognized 8-bit words.
 They processed information 8-bits at a time. That’s why they are
called “8-bit processors”. They can handle large numbers, but in order to
process these numbers, they broke them into 8-bit pieces and processed
each group of 8-bits separately.

 Later microprocessors (8086 and 68000) were designed with 16-bit


words.
 A group of 8-bits were referred to as a “half-word” or “byte”.
 A group of 4 bits is called a “nibble”.

 Also, 32 bit groups were given the name “long word”.

 Today, all processors manipulate at least 32 bits at a time and there


exists microprocessors that can process 64, 80, 128 bits or more at a8
time.
Prepared By: Ajay Shah
DEFINITION (CONTD.)
 Arithmetic and Logic Operations:
 Every microprocessor has arithmetic operations such as add and
subtract as part of its instruction set.
 Most microprocessors will have operations such as multiply
and divide.
 Some of the newer ones will have complex operations such as
square root.

 In addition, microprocessors have logic operations as well. Such


as AND, OR, XOR, shift left, shift right, etc.

 Again, the number and types of operations define the


microprocessor’s instruction set and depends on the specific 9
microprocessor.
Prepared By: Ajay Shah
DEFINITION (CONTD.)
 Program: A program is a sequence of instructions
that bring data into the microprocessor, processes
it and sends it out.

 There are many programming languages (C, C++,


FORTRAN, and JAVA…) However, these programming
languages can be grouped into three main levels (these
days a fourth level is developing).

10

Prepared By: Ajay Shah


DEFINITION (CONTD.)
 Programming Languages
 Machine language
 Machine language is the lowest level programming

language. It is a language intended to be understood by


the microprocessor (the machine) only.
In this language, every instruction is described by binary
patterns.

e.g. 11001101 may mean 1 + 2

This is the form in which instructions are stored in


memory. This is the only form that the microprocessor
understands.

11

Prepared By: Ajay Shah


DEFINITION (CONTD.)
 Programming Languages
 Assembly language
 This language is more understandable by humans. In

this language, the binary patterns are assigned


mnemonics (short abbreviated names).

e.g. “Add 1,2” is assigned to the machine language


pattern 11001101 mentioned above to refer to the
operation 1+2.

There is usually one assembly language instruction for


each machine language instruction.

12

Prepared By: Ajay Shah


DEFINITION (CONTD.)
 Programming Languages
 High level languages
 These are languages like C, PASCAL and FORTRON. These
are more natural for humans to use than assembly or machine
languages. They are also more compact (i.e. it takes less
statements to write the program).

One high level instruction translates into many assembly or


machine language instructions.

e.g. x = y + z may translate into:


MOV 1000, R1
MOV 1004, R2
13
ADD R1, R2
MOV R1, 1008
Prepared By: Ajay Shah
DEFINITION (CONTD.)
 Programming Languages
 The new level being developed: is ultra high level
languages which would contain things like C++, and
JAVA.
 Here a single instruction may translate into

hundreds of assembly or machine language


instructions.

14

Prepared By: Ajay Shah


DEFINITION (CONTD.)
 Stored in memory :
 First, what is memory?
 Memory is the location where information is kept while not
in current use.
 Memory is a collection of storage devices. Usually, each
storage device holds one bit. Also, in most kinds of memory,
these storage devices are grouped into groups of 8. These 8
storage locations can only be accessed together. So, one can
only read or write in terms of bytes to and form memory.
 Memory is usually measured by the number of bytes it can
hold. It is measured in Kilos, Megas and lately Gigas. A Kilo in
computer language is 210 =1024. So, a KB (KiloByte) is 1024
bytes. Mega is 1024 Kilos and Giga is 1024 Mega.
15

Prepared By: Ajay Shah


DEFINITION (CONTD.)
 Stored in memory:
 When a program is entered into a computer, it is stored in
memory. Then as the microprocessor starts to execute the
instructions, it brings the instructions from memory one at a time.

 Memory is also used to hold the data.


 The microprocessor reads (brings in) the data from memory
when it needs it and writes (stores) the results into memory
when it is done.

16

Prepared By: Ajay Shah


DEFINITION (CONTD.)
 Produces: For the user to see the result of the execution
of the program, the results must be presented in a human
readable form.
 The results must be presented on an output device.

 This can be the monitor, a paper from the printer, a simple LED or
many other forms.

17

Prepared By: Ajay Shah


A MICROPROCESSOR-BASED SYSTEM
From the above description, we can draw the
following block diagram to represent a
microprocessor-based system:

Input Output

Memory

18

Prepared By: Ajay Shah


INSIDE THE MICROPROCESSOR
 Von Neumann Architecture:
 Share memory for program and data with one data bus
and one address bus between processor and memory.
 Instruction and data have to be fetched in sequential
order, limiting the operation bandwidth.
 The 8085 follows the von Neumann architecture with a
16 bit address bus and 8 bit data bus.

 Harvard Architecture:
 Uses physically separate memories for instruction and
data, requiring dedicated buses for each of them.
 Instruction and operands can be fetched
simultaneously.

 Internally, the microprocessor is made up of 3 main units.


 The Arithmetic/Logic Unit (ALU)
 The Control Unit.
 An array of registers for holding data while it is being
manipulated. 19
Design of the harvard architecture

Prepared By: Ajay Shah


ARITHMETIC LOGIC UNIT

 Is the area of microprocessor where various


computing functions are performed on data such
as addition, subtraction, logic operations (AND,
Or and exclusive OR).

20

Prepared By: Ajay Shah


REGISTER ARRAY
 This area of μp identified by letters such
as B, C, D, E,H and L.
 Used to store data temporarily during the
execution of a program and are accessible
to the user through instructions.

21

Prepared By: Ajay Shah


CONTROL UNIT
 Provides the necessary timing and control
signals to all the operations in the
microcomputer.
 Control the flow of data between μp and
memory and peripheral.

22

Prepared By: Ajay Shah


MEMORY
 Two types of memory:
 ROM (read only memory)
 RAM ( random access memory)

23

Prepared By: Ajay Shah


INPUT/OUTPUT
 Used to communicate with the outside world.
 The I/O device is knows as peripherals.

 Input devices:
 Keyboard
 Switches
 ADC

 Output devices:
 LED
 DAC
 LCD

24

Prepared By: Ajay Shah


THE 8085 PROGRAMMING MODEL
 Registers:
 6 general purpose
registers to store 8 bit
data (B, C, D, E, H, L)
 Can be combined as
registers pairs-BC, DE
and HL – to perform 16
bit operations
 To store or copy data
into registers
 Accumulator:
 The Accumulator is an 8-bit register that is part of arithmetic/logic
unit(ALU)
 Used to perform arithmetic and logic operations and the result is
stored in the accumulator and also called register A 25
 Stack pointer, SP, is an 16-bit register, which contains the address of
the top of the stack.
Prepared By: Ajay Shah
THE 8085 PROGRAMMING MODEL (CONTD.)
 Flags:
 The ALU includes five flip-flops, which are set or
reset after an operation according to data
conditions of the result in the accumulator and
registers.
 Used for decision making process of the
microprocessor

 S – Sign flag –D7


 Z – Zero flag – D6

 AC – Auxiliary Carry flag – D4

 P – Parity flag – D2

 CY – Carry flag – D0 26

Prepared By: Ajay Shah


THE 8085 PROGRAMMING MODEL (CONTD.)
 The sign flag, S, indicates the sign of a value calculated by an
arithmetic or logical instruction.

 The zero flag, Z, is set to 1 if an arithmetic or logical operation


produces a result of 0;otherwise set to 0.

 The parity flag, P, is set to 1 if the result of an arithmetic or


logical operation has an even number of 1’s; otherwise it is set to
0.

 The carry flag, CY, is set when an arithmetic operation generates


a carry out.

 The auxiliary carry flag, AC, very similar to CY, but it denotes27a
carry from the lower half of the result to the upper half.
Prepared By: Ajay Shah
THE 8085 PROGRAMMING MODEL (CONTD.)
 The Program Counter (PC):
 This is a register that is used to control the sequencing of the
execution of instructions.
 This register always holds the address of the next instruction.
 Since it holds an address, it must be 16 bits wide.

 The Stack pointer (SP):


 The stack pointer is also a 16-bit register that is used to point
into memory.
 The memory this register points to is a special area called the
stack.
 The stack is an area of memory used to hold data that will be
retreived soon.
28
 The stack is usually accessed in a Last In First Out (LIFO)
fashion.
Prepared By: Ajay Shah
THE 8085 INSTRUCTIONS
 An instruction is a binary pattern designed inside a microprocessor to
perform a specific function
 The entire group of instructions, called the instruction set, determines
what functions the microprocessor can perform
 The microprocessor performs a task by reading and executing the set of
instructions, written in sequence, is called a program

 Since the 8085 is an 8-bit device it can have up to 28 (256)


instructions.
 However, the 8085 only uses 246 combinations that represent a total of 74
instructions.
 Most of the instructions have more than one format.

 These instructions can be grouped into five different groups:


 Data Transfer Operations
 Arithmetic Operations
 Logic Operations 29

 Branch Operations
 Machine Control Operations Prepared By: Ajay Shah
INSTRUCTION FORMATS
 Each instruction has two parts.
 The first part is the task or operation to be
performed.
 This part is called the “opcode” (operation code).

 The second part is the data to be operated on


 Called the “operand”.

 Exa: MVI A,B

30

Prepared By: Ajay Shah


OPERAND TYPES
 There are different ways for specifying the
operand:
 There may not be an operand (implied operand)
 CMA
 The operand may be an 8-bit number (immediate
data)
 ADI 4FH
 The operand may be an internal register (register)
 SUB B
 The operand may be a 16-bit address (memory
address)
 LDA 4000H
31

Prepared By: Ajay Shah


INSTRUCTION SIZE
 Depending on the operand type, the
instruction may have different sizes. It will
occupy a different number of memory bytes.
 Typically, all instructions occupy one byte only.
 The exception is any instruction that contains
immediate data or a memory address.

 Instructions that include immediate data use two


bytes.
 One for the opcode and the other for the 8-bit data.
 Instructions that include a memory address occupy
three bytes.
 One for the opcode, and the other two for the 16-bit
address. 32

Prepared By: Ajay Shah


8085 INSTRUCTION TYPES

33

Prepared By: Ajay Shah


8085 INSTRUCTION TYPES (CONTD.)

34

Prepared By: Ajay Shah


8085 INSTRUCTION TYPES (CONTD.)

35

Prepared By: Ajay Shah


THE 8085 ADDRESSING MODES
 Addressing Modes is the technique used to fetch
the desired operand during the execution of an
instruction.
 Instructions can be categorized according to their
method of addressing the hardware registers
and/or memory.
 The 8085 MPU uses five addressing Modes:
1.Immediate Addressing Mode
2. Register Addressing Mode
3. Direct Addressing Mode
4. Register Indirect Addressing Mode
36
5. Implied Addressing Mode
Prepared By: Ajay Shah
THE 8085 ADDRESSING MODES (CONTD.)
 Immediate Addressing Mode:
 Data immediately follow the op code in program
memory.
 The operand comes from next byte in program
memory.
 The immediate instructions indicate immediate
data (add instruction is ADD - add immediate
instruction is ADI)
 Use 2 bytes instruction.
 Example:
 ADI 05H
 MVI A, 12H 37

Prepared By: Ajay Shah


THE 8085 ADDRESSING MODES (CONTD.)
 Register Addressing Mode:
 The operand is retrieved from internal CPU
Register
 Data is provided through the registers.
 Example:
 MOV A,D
 ADD H

38

Prepared By: Ajay Shah


THE 8085 ADDRESSING MODES (CONTD.)
 Direct Addressing Mode:
 Used to accept data from outside devices to store
in the accumulator or send the data stored in the
accumulator to the outside device.
 In this type address of data is directly provided
as a part of instruction
 Example:
 LDA 2050H
 IN 34H
 OUT 45H

39

Prepared By: Ajay Shah


THE 8085 ADDRESSING MODES (CONTD.)
 Register Indirect Addressing Mode:
 The instructions reference memory using the
content of a register pair.
 The instruction MOV M,C moves the contents of
the C register into the memory address stored in
the H and L register pair.
 Instruction specifies register pair containing
address, where the data is located.
 Example:
 MOV M,C
 ADD M 40

Prepared By: Ajay Shah


THE 8085 ADDRESSING MODES (CONTD.)
 Implied Addressing Mode:
 Certain Instructions is implied by the
instruction’s function.
 Not A real addressing modes.
 Example :
 STC (set carry flag) instruction deals only with the
carry flag,
 HLT

41

Prepared By: Ajay Shah


THE 8085 ADDRESSING MODES (CONTD.)
 Combined Addressing Mode:
 Some instruction combines more than one
addressing mode
 Example:
 CALL 2050H – Combines direct and indirect
addressing mode

42

Prepared By: Ajay Shah


DATA TRANSFER OPERATIONS

MOV - Copy from Source to Destination.

Instruction Bytes M-cycle T-states Flags Example


MOV Rd, Rs 1 1 4 None MOV B,C
F
MOV M, Rs 1 2 7 None MOV M, C
F W
MOV Rd, M 1 2 7 None MOV B,M
F R
43

Prepared By: Ajay Shah


DATA TRANSFER OPERATIONS

MVI – Move Immediate 8 bit.

Instruction Bytes M-cycle T-states Flags Example


MVI Rd, Data 2 2 7 None MVI B,3AH
F R
MVI M, Data 2 3 10 None MVI M,3AH
FRW

44

Prepared By: Ajay Shah


DATA TRANSFER OPERATIONS

LDA – Load accumulator direct

Instruction Bytes M-cycle T-states Flags Example


LDA Addr16 3 4 13 None LDA 2050H
FRRR

45

Prepared By: Ajay Shah


DATA TRANSFER OPERATIONS

LDAX – Load accumulator Indirect

Instruction Bytes M-cycle T-states Flags Example


LDAX Reg. Pair 1 2 7 None LDAX B
FR

46

Prepared By: Ajay Shah


DATA TRANSFER OPERATIONS

LXI – Load register Pair immediate

Instruction Bytes M-cycle T-states Flags Example


LXI Reg. Pair,16bit 3 3 10 None LXI
data FRR B,2050H

47

Prepared By: Ajay Shah


DATA TRANSFER OPERATIONS

LHLD – Load H & L direct

Instruction Bytes M-cycle T-states Flags Example


LHLD 16bit 3 5 16 None LHLD
addr FRRRR 2050H

48

Prepared By: Ajay Shah


DATA TRANSFER OPERATIONS

STA – store accumulator direct

Instruction Bytes M-cycle T-states Flags Example


STA 16bit 3 4 13 None STA 2050H
addr FRRW

49

Prepared By: Ajay Shah


DATA TRANSFER OPERATIONS

STAX – store accumulator Indirect

Instruction Bytes M-cycle T-states Flags Example


STAX Reg 1 2 7 None STAX B
pairB/D FW

50

Prepared By: Ajay Shah


DATA TRANSFER OPERATIONS

SHLD – Store H & L Registers Direct

Instruction Bytes M-cycle T-states Flags Example


SHLD 16bit 3 5 16 None SHLD
addr FRRWW 2050H

51

Prepared By: Ajay Shah


DATA TRANSFER OPERATIONS

XCHG – Exchange H & L with D & E

Instruction Bytes M-cycle T-states Flags Example


XCHG 1 1 4 None XCHG
F

52

Prepared By: Ajay Shah


DATA TRANSFER OPERATIONS

SPHL – Copy H & L to stack pointer

Instruction Bytes M-cycle T-states Flags Example


SPHL 1 1 6 None SPHL
S

53

Prepared By: Ajay Shah


DATA TRANSFER OPERATIONS

XTHL – Exchange H & L with top of the stack

Instruction Bytes M-cycle T-states Flags Example


XTHL 1 5 16 None XTHL
FRRW
W

54

Prepared By: Ajay Shah


DATA TRANSFER OPERATIONS

PUSH – push register onto stack

Instruction Bytes M-cycle T-states Flags Example


PUSH Reg. 1 3 12 None PUSH B
pair SWW

55

Prepared By: Ajay Shah


DATA TRANSFER OPERATIONS

POP – pop off stack to register pair

Instruction Bytes M-cycle T-states Flags Example


POP Reg. 1 3 10 None POP H
pair FRR

56

Prepared By: Ajay Shah


DATA TRANSFER OPERATIONS

Instruction Bytes M-cycle T-states Flags Example


OUT 8bit addr 2 3 10 None OUT 45H
FRO
IN 8bit addr 2 3 10 None IN 0FH
FRI

57

Prepared By: Ajay Shah


ARITHMETIC OPERATIONS

Instruction Bytes M-cycle T-states Flags Example


ADD R 1 1 4 All ADD B
F
ADD M 1 2 7 All ADD M
F R
58

Prepared By: Ajay Shah


ARITHMETIC OPERATIONS

Instruction Bytes M-cycle T-states Flags Example


ADC R 1 1 4 All ADC B
F
ADC M 1 2 7 All ADC M
F R

59

Prepared By: Ajay Shah


ARITHMETIC OPERATIONS

Instruction Bytes M-cycle T-states Flags Example


ADI 8BIT 2 2 7 All ADI 59H
F R

60

Prepared By: Ajay Shah


ARITHMETIC OPERATIONS

Instruction Bytes M-cycle T-states Flags Example


ACI 8BIT 2 2 7 All ACI 59H
F R

61

Prepared By: Ajay Shah


ARITHMETIC OPERATIONS

Instruction Bytes M-cycle T-states Flags Example


DAD REG 1 3 10 CY DAD B
PAIR FBB

62

Prepared By: Ajay Shah


ARITHMETIC OPERATIONS

Instruction Bytes M-cycle T-states Flags Example


SUB R 1 1 4 All SUB B
F
SUB M 1 2 7 All SUB M
F R

63

Prepared By: Ajay Shah


ARITHMETIC OPERATIONS

Instruction Bytes M-cycle T-states Flags Example


SBB R 1 1 4 All SBB B
F
SBB M 1 2 7 All SBB M
F R

64

Prepared By: Ajay Shah


ARITHMETIC OPERATIONS

Instruction Bytes M-cycle T-states Flags Example


SUI 8bit data 2 2 7 All SUI 59H
F R

65

Prepared By: Ajay Shah


ARITHMETIC OPERATIONS

Instruction Bytes M-cycle T-states Flags Example


SBI 8bit data 2 2 7 All SBI 59H
F R

66

Prepared By: Ajay Shah


ARITHMETIC OPERATIONS

Instruction Bytes M-cycle T-states Flags Example


INR R 1 1 4 All INR B
F EXCEPT
CY
INR M 1 3 10 All INR M
FRW EXCEPT
CY

67

Prepared By: Ajay Shah


ARITHMETIC OPERATIONS

Instruction Bytes M-cycle T-states Flags Example


INX Reg. 1 1 6 NONE INX B
Pair S

68

Prepared By: Ajay Shah


ARITHMETIC OPERATIONS

Instruction Bytes M-cycle T-states Flags Example


DCR R 1 1 4 All DCR B
F EXCEPT
CY
DCR M 1 3 10 All DCR M
FRW EXCEPT
CY

69

Prepared By: Ajay Shah


ARITHMETIC OPERATIONS

Instruction Bytes M-cycle T-states Flags Example


DCX Reg. 1 1 6 NONE DCX B
Pair S

70

Prepared By: Ajay Shah


ARITHMETIC OPERATIONS

Instruction Bytes M-cycle T-states Flags Example


DAA 1 1 4 ALL DAA
F

71

Prepared By: Ajay Shah


LOGICAL OPERATIONS

Instruction Bytes M-cycle T-states Flags Example


CMP R 1 1 4 ALL CMP B
F
CMP M 1 2 7 ALL CMP M
FR
72

Prepared By: Ajay Shah


LOGICAL OPERATIONS

Instruction Bytes M-cycle T-states Flags Example


CPI 8BIT 2 2 7 ALL CPI C2H
DATA F R

73

Prepared By: Ajay Shah


LOGICAL OPERATIONS

Instruction Bytes M-cycle T-states Flags Example


ANA R 1 1 4 ALL ANA B
F
ANA M 1 2 7 ALL ANA M
FR

74

Prepared By: Ajay Shah


LOGICAL OPERATIONS

Instruction Bytes M-cycle T-states Flags Example


ANI 8BIT 2 2 7 ALL ANI 20H
DATA FR

75

Prepared By: Ajay Shah


LOGICAL OPERATIONS

Instruction Bytes M-cycle T-states Flags Example


XRA R 1 1 4 ALL XRA B
F
XRA M 1 2 7 ALL XRA M
FR

76

Prepared By: Ajay Shah


LOGICAL OPERATIONS

Instruction Bytes M-cycle T-states Flags Example


XRI 8BIT 2 2 7 ALL XRI 20H
DATA FR

77

Prepared By: Ajay Shah


LOGICAL OPERATIONS

Instruction Bytes M-cycle T-states Flags Example


ORA R 1 1 4 ALL ORA B
F
ORA M 1 2 7 ALL ORA M
FR

78

Prepared By: Ajay Shah


LOGICAL OPERATIONS

Instruction Bytes M-cycle T-states Flags Example


ORI 8BIT 2 2 7 ALL ORI 20H
DATA FR

79

Prepared By: Ajay Shah


LOGICAL OPERATIONS

Instruction Bytes M-cycle T-states Flags Example


RLC 1 1 4 CY RLC
F

80

Prepared By: Ajay Shah


LOGICAL OPERATIONS

Instruction Bytes M-cycle T-states Flags Example


RRC 1 1 4 CY RRC
F

81

Prepared By: Ajay Shah


LOGICAL OPERATIONS

Instruction Bytes M-cycle T-states Flags Example


RAL 1 1 4 CY RAL
F

82

Prepared By: Ajay Shah


LOGICAL OPERATIONS

Instruction Bytes M-cycle T-states Flags Example


RAR 1 1 4 CY RAR
F

83

Prepared By: Ajay Shah


LOGICAL OPERATIONS

Instruction Bytes M-cycle T –states Flags Example

CMA 1 1 4 NONE CMA


F
CMC 1 1 4 CY CMC
F
STC 1 1 4 CY STC 84
F
Prepared By: Ajay Shah
CONTROL OPERATIONS

Instruction Bytes M-cycle T-states Flags Example


NOP 1 1 4 None NOP
F
HLT 1 1 4 None HLT
F

85

Prepared By: Ajay Shah


CONTROL OPERATIONS

Instruction Bytes M-cycle T-states Flags Example


DI 1 1 4 None DI
F
EI 1 1 4 None EI 86
F

Prepared By: Ajay Shah


CONTROL OPERATIONS

Instruction Bytes M-cycle T-states Flags Example


RIM 1 1 4 None RIM
F
87

Prepared By: Ajay Shah


CONTROL OPERATIONS

Instruction Bytes M-cycle T-states Flags Example


SIM 1 1 4 None SIM
F
88

Prepared By: Ajay Shah


REFERENCES
1.Microprocessor Architecture, Programming, and
Applications with the 8085 - Ramesh S. Gaonkar
Pub: Penram International.

89

Prepared By: Ajay Shah

You might also like