APW7137

1MHz, High Efficiency, Step-Up Converter with Internal FET Switch

Features General Description

• Wide 2.5V to 6V Input Voltage Range
• Built-in 0.6Ω N-Channel MOSFET
• Built-in Soft-Start
• High Efficiency up to 90%
• <1µA Quiescent Current During Shutdown
• Current-Mode Operation
- Stable with Ceramic Output Capacitors
- Fast Transient Response
• Current-Limit Protection
• Over-Temperature Protection with Hysteresis
• Available in a Tiny 5-Pin SOT-23 Package
• Lead Free and Green Devices Available
The APW7137 is a fixed switching frequency (1MHz
typical), current-mode, step-up regulator with an inte-
grated N-channel MOSFET. The device allows the usage
of small inductors and output capacitors for portable
devices. The current-mode control scheme provides fast
transient response and good output voltage accuracy.
The APW7137 includes under-voltage lockout, current
limit, and over-temperature shutdown preventing dam-
age in the event of an output overload.
100
VIN=5V
90
80
70
Efficiency, η (%)

(RoHS Compliant)
60
VIN=3.3V
50

Applications 40

30

20
• Cell Phone and Smart Phone 10 VOUT=12V
• PDA, PMP, MP3 0
• Digital Camera 0.1 1 10 100 1000
Output Current, IOUT (mA)
• Boost Regulators

Pin Configuration Simplified Application Circuit

VIN VOUT
L1

LX 1 5 VIN 5V 10µH 12V

GND 2 C1 5 VIN
4.7µF LX 1 C2
FB 3 R1 4.7µF
4 EN 1.2MΩ
2
GND
SOT-23-5 (Top View) ON APW7137
4
OFF EN FB 3
R2
137kΩ

ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and
advise customers to obtain the latest version of relevant information to verify before placing orders.

Copyright  ANPEC Electronics Corp. 1 www.anpec.com.tw

Rev. A.4 - Oct., 2008
APW7137

Ordering and Marking Information

APW7137 Package Code
B : SOT-23-5
Assembly Material Operating Ambient Temperature Range
I : -40 to 85 oC
Handling Code
Handling Code
Temperature Range TR : Tape & Reel
Package Code Assembly Material
L : Lead Free Device G : Halogen and Lead Free Device
APW7137 B : W37X X - Date Code

Note: ANPEC lead-free products contain molding compounds/die attach materials and 100% matte tin plate termination finish; which
are fully compliant with RoHS. ANPEC lead-free products meet or exceed the lead-free requirements of IPC/JEDEC J-STD-020C for
MSL classification at lead-free peak reflow temperature. ANPEC defines “Green” to mean lead-free (RoHS compliant) and halogen
free (Br or Cl does not exceed 900ppm by weight in homogeneous material and total of Br and Cl does not exceed 1500ppm by
weight).

Absolute Maximum Ratings (Note 1)

Symbol Parameter Rating Unit

VIN VIN Pin to GND -0.3 to 7 V
VLX LX Pin to GND -0.3 to 36 V
VEN EN Pin to GND -0.3 to VIN V
TJ Maximum Junction Temperature 150 °C
TSTG Storage Temperature Range -65 to 150 °C
TSDR Maximum Lead Soldering Temperature, 10 Seconds 260 °C
Note 1: Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are
stress ratings only and functional operation of the device at these or any other conditions beyond those indicated in the
operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended
periods may affect device reliability.

Thermal Characteristics
Symbol Parameter Typical Value Unit
(Note 2)
Junction to Ambient Thermal Resistance
θJA 260 °C/W
SOT-23-5
Note 2: θJA is measured with the component mounted on a high effective thermal conductivity test board in free air. The exposed pad
of package is soldered directly on the PCB.

Recommended Operating Conditions (Note 3)

Symbol Parameter Range Unit

VIN VIN Input Voltage 2.5 ~ 6 V
VLX LX to GND Voltage -0.3 ~ 32 V
VOUT Converter Output Voltage VIN ~ 30 V
CIN Input Capacitor 2.2 ~ µF
COUT Output Capacitor 2.2 ~ µF
TA Ambient Temperature -40 ~ 85 °C
TJ Junction Temperature -40 ~ 125 °C
Note 3: Refer to the application circuit for further information

Copyright  ANPEC Electronics Corp. 2 www.anpec.com.tw

Rev. A.4 - Oct., 2008
APW7137

Electrical Characteristics
Refer to the typical application circuits. These specifications apply over VIN = 3.6V, IOUT = 0mA, TA = -40°C to 85°C, unless
otherwise noted. Typical values are at TA = 25°C.
APW7137
Symbol Parameter Test Conditions Unit
Min. Typ. Max.
SUPPLY VOLTAGE AND CURRENT
VIN Input Voltage Range TA = -40 ~ 85°C, TJ = -40 ~ 125°C 2.5 - 6 V
IDD VFB = 1.0V, switching - 1 2 mA
Input DC Bias Current
ISD EN = GND - 0.1 1 µA
UNDER-VOLTAGE LOCKOUT
UVLO Threshold Voltage VIN Rising 2.0 2.2 2.4 V
UVLO Hysteresis Voltage 50 100 150 mV
REFERENCE AND OUTPUT VOLTAGES
TA = 25°C 1.212 1.23 1.248
VREF Regulated Feedback Voltage V
TA = -40 ~ 85°C 1.205 - 1.255
IFB FB Input Current -50 - 50 nA
INTERNAL POWER SWITCH
FSW Switching Frequency VFB=1.1V 0.8 1.0 1.2 MHz
RON Power Switch On Resistance - 0.6 - Ω
ILIM Power Switch Current Limit 1 1.3 1.6 A
LX Leakage Current VEN=0V, VLX=0V or 5V, VIN = 5V -1 - 1 µA
DMAX LX Maximum Duty Cycle 92 95 98 %
SOFT-START AND SHUTDOWN
TSS Soft-Start Duration (Note 4) - 2 3 ms
VTEN EN Voltage Threshold VEN Rising 0.4 0.7 1 V
EN Voltage Hysteresis - 0.1 - V
ILEN EN Leakage Current VEN=5V, VIN = 5V -1 ±0.5 1 µA
OVER-TEMPERATURE PROTECTION
TOTP Over-Temperature Protection (Note 4) TJ Rising - 150 - °C
Over-Temperature Protection
- 40 - °C
Hysteresis (Note 4)
Note 4: Guaranteed by design, not production tested.

Copyright  ANPEC Electronics Corp. 3 www.anpec.com.tw

Rev. A.4 - Oct., 2008
APW7137

Typical Operating Characteristics

(Refer to Fig 1. in the section “Typical Application Circuits”, VIN=3.6V, TA=25oC, unless otherwise specified)

Switching Current vs. Supply Voltage Reference Voltage vs.

Junction Temperature
1.2 1.28
1.27
1

Reference Voltage, VREF (%)

Switching Current, IDD (mA)

1.26
1.25
0.8
1.24
0.6 1.23
1.22
0.4
1.21

0.2 1.20

VFB=1.0V 1.19
0 1.18
2.5 3 3.5 4 4.5 5 5.5 6 -50 -25 0 25 50 75 100 125
Supply Voltage, V IN (V) Junction Temperature, T J (°C)

Switch ON Resistance vs. Maximum Duty Cycle vs.

Junction temperature Supply Voltage
0.9 100
Switch ON Resistance, RON (Ω)

Maximum Duty Cycle, DMAX (%)

0.8
90

0.7
80
0.6
VIN=2.7 70
0.5 V
60
0.4 VIN=3.6V

0.3 50
VIN=5V
0.2 40
-50 -25 0 25 50 75 100 125 2.5 3 3.5 4 4.5 5 5.5 6

Junction Temperature, T J (°C) Supply Voltage, V IN (V)

Switching Frequency vs. Switching Frequency vs.

Supply Voltage Junction Temperature
1.2 1.2
Switching Frequency, FSW (MHz)

1.1
Switching Frequency, FSW (MHz)

1.1

1 1

0.9 0.9

0.8 0.8

0.7 0.7

0.6 0.6

0.5 0.5

0.4 0.4
2.5 3 3.5 4 4.5 5 5.5 6 -50 -25 0 25 50 75 100 125
Supply Voltage, V IN (V) Junction Temperature, T J (°C)

Copyright  ANPEC Electronics Corp. 4 www.anpec.com.tw

Rev. A.4 - Oct., 2008
APW7137

Typical Operating Characteristics (Cont.)

(Refer to Fig 1. in the section “Typical Application Circuits”, VIN=3.6V, TA=25oC, unless otherwise specified)

Efficiency vs. Output Current Output Voltage vs. Output Current

100 12.20
VIN=5V
90
12.15
80

Output Voltage, VOUT(V)

12.10
70 VIN=5V
Efficiency, η (%)

60 12.05
VIN=3.3V
50 12.00
40
11.95
30 VIN=3.3V
11.90
20
10 VOUT=12V 11.85

0 11.80
0.1 1 10 100 1000 0.1 1 10 100 1000
Output Current, I OUT (mA)
Output Current, IOUT (mA)
Output Voltage vs. Supply Voltage
12.20

12.15
Output Voltage, VOUT(V)

12.10

12.05

12.00

11.95

11.90

11.85

11.80
2.5 3 3.5 4 4.5 5 5.5 6
Supply Voltage, VIN (V)

Copyright  ANPEC Electronics Corp. 5 www.anpec.com.tw

Rev. A.4 - Oct., 2008
APW7137

Operating Waveforms
(Refer to Fig 1. in the section “Typical Application Circuits”, VIN=3.6V, TA=25oC, unless otherwise specified)

Start-up Start-up

VEN, 1V/Div, DC VEN, 1V/Div, DC

1 1
VOUT, 5V/Div, DC VOUT, 5V/Div, DC

2 2 IIN, 100mA/Div
VIN=3.6V
IOUT=1mA

IIN, 100mA/Div

3 3 VIN=3.6V
Time: 0.5ms/Div Time: 0.5ms/Div IOUT=100mA

CH1: VEN, 1V/Div, DC CH1: VEN, 1V/Div, DC

CH2: VOUT, 5V/Div, DC CH2: VOUT, 5V/Div, DC
CH3: IIN, 100mA/Div, DC CH3: IIN, 100mA/Div, DC
Time: 0.5ms/Div Time: 0.5ms/Div

Normal Operation Normal Operation

VLX, 10V/Div VLX, 10V/Div

1 1

VOUT, 50mV/Div VOUT, 50mV/Div

2 2
IL, 100mA/Div

IL, 100mA/Div

VIN=3.3V VIN=5V
Time: 1µs/Div IOUT=80mA Time: 1µs/Div IOUT=80mA
3 3
CH1: V LX, 10V/Div, DC CH1: VLX, 10V/Div, DC
CH2: V OUT, 50mV/Div, AC CH2: VOUT, 50mV/Div, AC
CH3: I L, 100mA/Div, DC CH3: IL, 100mA/Div, DC
Time: 1µs/Div Time: 1µs/Div

Copyright  ANPEC Electronics Corp. 6 www.anpec.com.tw

Rev. A.4 - Oct., 2008
APW7137

Operating Waveforms (Cont.)

(Refer to Fig 1. in the section “Typical Application Circuits”, VIN=3.6V, TA=25oC, unless otherwise specified)

Load Transient Response Load Transient Response

VOUT, 200mV/Div, AC VOUT, 200mV/Div, AC

1 1

VIN=3.3V
30mA IOUT, 50mA/Div VOUT=12V
30mA
1mA IOUT, 50mA/Div
1mA
2 VIN=3.3V 2
Time: 0.2ms/Div VOUT=12V Time: 0.5ms/Div

CH1: VOUT, 200mV/Div, AC CH1: VOUT, 200mV/Div, AC

CH2: IOUT, 50mA/Div, DC CH2: IOUT, 50mA/Div, DC
Time: 0.2ms/Div Time: 0.5ms/Div

Load Transient Response Load Transient Response

VOUT, 200mV/Div, AC
VOUT, 200mV/Div, AC
1 1

VIN=5V
VOUT=12V
30mA IOUT, 50mA/Div 30mA
1mA 1mA IOUT, 50mA/Div
2 VIN=5V 2
Time: 0.2ms/Div VOUT=12V Time: 0.5ms/Div

CH1: VOUT, 200mV/Div, AC CH1: VOUT, 200mV/Div, AC

CH2: IOUT, 50mA/Div, DC CH2: IOUT, 50mA/Div, DC
Time: 0.2ms/Div Time: 0.5ms/Div

Copyright  ANPEC Electronics Corp. 7 www.anpec.com.tw

Rev. A.4 - Oct., 2008
APW7137

Operating Waveforms (Cont.)

(Refer to Fig 1. in the section “Typical Application Circuits”, VIN=3.6V, TA=25oC, unless otherwise specified)

Load Transient Response Load Transient Response

VOUT, 200mV/Div, AC VOUT, 200mV/Div, AC

1 1

IOUT, 50mA/Div 150mA

150mA

IOUT, 50mA/Div
30mA 30mA

2 VIN=3.3V 2 VIN=3.3V
Time: 0.1ms/Div VOUT=12V Time: 0.1ms/Div VOUT=12V

CH1: VOUT, 200mV/Div, AC CH1: VOUT, 200mV/Div, AC

CH2: IOUT, 50mA/Div, DC CH2: IOUT, 50mA/Div, DC
Time: 0.1ms/Div Time: 0.1ms/Div

Load Transient Response Load Transient Response

VOUT, 200mV/Div, AC VOUT, 200mV/Div, AC

1 1

IOUT, 50mA/Div 150mA

150mA

IOUT, 50mA/Div
30mA 30mA

2 VIN=5V 2 VIN=5V
Time: 0.1ms/Div VOUT=12V Time: 0.1ms/Div VOUT=12V

CH1: VOUT, 200mV/Div, AC CH1: VOUT, 200mV/Div, AC

CH2: IOUT, 50mA/Div, DC CH2: IOUT, 50mA/Div, DC
Time: 0.1ms/Div Time: 0.1ms/Div

Copyright  ANPEC Electronics Corp. 8 www.anpec.com.tw

Rev. A.4 - Oct., 2008
APW7137

Operating Waveforms (Cont.)

(Refer to Fig 1. in the section “Typical Application Circuits”, VIN=3.6V, TA=25oC, unless otherwise specified)

Line Transient Response Line Transient Response

VIN, 1V/Div, DC VIN, 1V/Div, DC

5V 4.2V

4V 3.2V

VOUT, 0.2V/Div, AC VOUT, 0.2V/Div, AC

2 2

1 IOUT=40mA IOUT=40mA
Time: 0.2ms/Div VOUT=12V Time: 0.2ms/Div VOUT=5V

CH1: VIN, 1V/Div, DC CH1: VIN, 1V/Div, DC

CH2: VOUT, 0.2/Div, AC CH2: VOUT, 0.2/Div, AC
Time: 0.2ms/Div Time: 0.2ms/Div

Copyright  ANPEC Electronics Corp. 9 www.anpec.com.tw

Rev. A.4 - Oct., 2008
APW7137

Pin Description
PIN.
FUNCTION
NO NAME
1 LX Switch pin. Connect this pin to inductor/diode here.
2 GND Power and signal ground pin.
Feedback Input. The device senses feedback voltage via FB and regulate the voltage at 1.23V.
3 FB Connecting FB with a resistor-divider from the output that sets the output voltage in the range from
VIN to 30V.
Enable Control Input. Forcing this pin above 1.0V enables the device. Forcing this pin below 0.4V to
4 EN shut it down. In shutdown, all functions are disabled to decrease the supply current below 1µA. Do
not left this pin floating.
5 VIN Main Supply Pin. Must be closely decoupled to GND with a 2.2µF or greater ceramic capacitor.

Block Diagram

VIN

EN UVLO

Gate Driver LX

Control Logic

Over-Temperature
Protection Current Current Sense
Limit Amplifier
Slop
Compensation
Σ
Oscillator

Error
ICMP Amplifier
GND
COMP FB
EAMP
VREF
1.23V

Soft-Start

Copyright  ANPEC Electronics Corp. 10 www.anpec.com.tw

Rev. A.4 - Oct., 2008
APW7137

Typical Application Circuits

Fig 1. Typical 5V to 12V Supply
VIN L1 VOUT
10µH
5V 12V
C1 5 VIN
4.7µF LX 1 C2
R1 4.7µF
1.2MΩ
2
GND
ON APW7137
4
OFF EN FB 3
R2
137kΩ

Fig 2. Standard 3.3V to 5V Supply

VIN L1 VOUT

3.3V 4.7µH
5V
C1 5 VIN
4.7µF LX 1 C2
R1 10µF
430kΩ
2
GND
ON APW7137
4
OFF EN FB 3
R2
140kΩ

Fig 3. Brightness control using a PWM signal apply to EN

VIN L1 VOUT
22µH
C1
4.7µF 5 VIN LX 1 C2
1µF Up to 8
WLEDs
2
GND
100Hz~300Hz APW7137
4
EN FB 3
Duty=100%, ILED=20mA R1
Duty=0%, LED off 62Ω

Fig 4. Multiple Output for TFT-LCD Power Supply

C5 C9
+13V
C6
0.47µF 0.1µF 0.1µF -8V
C3 C7
+9V C10
0.47µF
C4 0.1µF 0.1µF
0.47µF
-4V
C8
0.47µF VOUT
VIN L1
4.7µH 5V
C1 5 VIN
4.7µF LX 1 C2
R1 10µF
430kΩ
2
GND
ON APW7137
4
OFF EN FB 3
R2
140kΩ

Copyright  ANPEC Electronics Corp. 11 www.anpec.com.tw

Rev. A.4 - Oct., 2008
APW7137

Function Description
Main Control Loop Over-Temperature Protection (OTP)

The APW7137 is a constant frequency and current-mode The over-temperature circuit limits the junction tempera-
switching regulator. In normal operation, the internal N- ture of the APW7137. When the junction temperature ex-
channel power MOSFET is turned on each cycle when the ceeds 150 oC, a thermal sensor turns off the power
oscillator sets an internal RS latch, and then turned off MOSFET allowing the devices to cool. The thermal sen-
when an internal comparator (ICMP) resets the latch. The sor allows the converters to start a soft-start process and
peak inductor current at which ICMP resets the RS latch regulates the output voltage again after the junction tem-
is controlled by the voltage on the COMP node which is perature cools by 40oC. The OTP is designed with a 40oC
the output of the error amplifier (EAMP). An external resis- hysteresis to lower the average Junction Temperature
tive divider connected between VOUT and ground allows (TJ) during continuous thermal overload conditions in-
the EAMP to receive an output feedback voltage VFB at FB creasing the lifetime of the device.
pin. When the load current increases, it causes a slightly
Enable/Shutdown
to decrease in VFB associated with the 1.23V reference,
which in turn, it causes the COMP voltage to increase Driving EN to the ground places the APW7137 in shut-
until the average inductor current matches the new load down mode. When in shutdown, the internal power
current. MOSFET turns off, all internal circuitry shuts down, and
the quiescent supply current reduces to 1µA maximum.
VIN Under-Voltage Lockout (UVLO)
The Under-Voltage Lockout (UVLO) circuit compares the
input voltage at VIN with the UVLO threshold to ensure
the input voltage is high enough for reliable operation.
The 100mV (typ) hysteresis prevents supply transients
from causing a restart. Once the input voltage exceeds
the UVLO rising threshold, startup begins. When the in-
put voltage falls below the UVLO falling threshold, the
controller turns off the converter.

Soft-Start

The APW7137 has a built-in soft-start to control the output

voltage rise during start-up. During soft-start, an internal
ramp voltage, connected to the one of the positive inputs
of the error amplifier, raises up to replace the reference
voltage (1.23V typical) until the ramp voltage reaches the
reference voltage.

Current-Limit Protection

The APW7137 monitors the inductor current, flows through

the N-channel MOSFET, and limits the current peak at
current-limit level to prevent loads and the APW7137 from
damaging during overload or short-circuit conditions.

Copyright  ANPEC Electronics Corp. 12 www.anpec.com.tw

Rev. A.4 - Oct., 2008
APW7137

Application Information
Input Capacitor Selection The peak inductor current is calculated as the following
equation:
The input capacitor (CIN) reduces the ripple of the input
current drawn from the input supply and reduces noise 1 VIN ⋅ (VOUT − VIN )
IPEAK = IIN(MAX ) + ⋅
injection into the IC. The reflected ripple voltage will be 2 VOUT ⋅ L ⋅ FSW
smaller when an input capacitor with larger capacitance
IL
VIN IIN LX D1 IOUT VOUT
is used. For reliable operation, it is recommended to
select the capacitor with maximum voltage rating at least
1.2 times of the maximum input voltage. The capacitors CIN N-FET ISW ESR

should be placed close to the VIN and the GND.

COUT

Inductor Selection
Selecting an inductor with low dc resistance reduces con- IL
duction losses and achieves high efficiency. The efficiency ILIM
is moderated whilst using small chip inductor which op-
IPEAK
erates with higher inductor core losses. Therefore, it is
∆IL
necessary to take further consideration while choosing
IIN
an adequate inductor. Mainly, the inductor value deter-
mines the inductor ripple current: larger inductor value
ISW
results in smaller inductor ripple current and lower con-
duction losses of the converter. However, larger inductor
value generates slower load transient response. A rea-
sonable design rule is to set the ripple current, ∆IL, to be
30% to 50% of the maximum average inductor current,
IL(AVG). The inductor value can be obtained as below, ID

2
 V  VOUT − VIN η IOUT
L ≥  IN  ×
 F ⋅I ×
 
 VOUT  SW OUT (MAX )
 ∆IL 
 IL (AVG ) 
  Output Capacitor Selection
where The current-mode control scheme of the APW7137 al-
VIN = input voltage lows the usage of tiny ceramic capacitors. The higher
VOUT = output voltage capacitor value provides good load transients response.
FSW = switching frequency in MHz Ceramic capacitors with low ESR values have the lowest
IOUT = maximum output current in amp. output voltage ripple and are recommended. If required,
η = Efficiency tantalum capacitors may be used as well. The output ripple
is the sum of the voltages across the ESR and the ideal
∆IL /IL(AVG) = inductor ripple current/average current
output capacitor.
(0.3 to 0.5 typical)
To avoid the saturation of the inductor, the inductor should Δ VOUT = ΔVESR + ΔVCOUT
be rated at least for the maximum input current of the
IOUT V − VIN 
converter plus the inductor ripple current. The maximum ∆VCOUT ≈ ⋅  OUT 
COUT  VOUT ⋅ FSW 
input current is calculated as below:
IOUT (MAX ) ⋅ VOUT ∆VESR ≈ IPEAK ⋅ RESR
IIN(MAX ) =
VIN ⋅ η where IPEAK is the peak inductor current.

Copyright  ANPEC Electronics Corp. 13 www.anpec.com.tw

Rev. A.4 - Oct., 2008
APW7137

Application Information (Cont.)

Output Capacitor Selection (Cont.)

For ceramic capacitor application, the output voltage ripple VOUT D1 L1

is dominated by the ∆VCOUT. When choosing the input and
LX
output ceramic capacitors, the X5R or X7R with their good VIN

C2
t e m p e r a t u r e an d v o l t a g e c h a r ac t e r i s t i c s a r e

C1
recommended.

R1

R2
Output Voltage Setting VEN

The output voltage is set by a resistive divider. The exter-

nal resistive divider is connected to the output which al- Optimized APW7137 Layout
lows remote voltage sensing as shown in “Typical Appli-
cation Circuits”. A suggestion of the maximum value of
R1 is 2MΩ and R2 is 200kΩ for keeping the minimum
current that provides enough noise rejection ability through
the resistor divider. The output voltage can be calculated
as below:
 R1   R1 
VOUT = VREF ⋅  1 +  = 1.23 1 + 
 R 2   R 2

Diode Selection

To achieve the high efficiency, a Schottky diode must be

used. The current rating of the diode must meet the peak
current rating of the converter.

Layout Consideration

For all switching power supplies, the layout is an impor-

tant step in the design especially at high peak currents
and switching frequencies. If the layout is not carefully
done, the regulator might show noise problems and duty
cycle jitter.
1. The input capacitor should be placed close to the VIN
and the GND without any via holes for good input volt-
age filtering.
2. To minimize copper trace connections that can inject
noise into the system, the inductor should be placed as
close as possible to the LX pin to minimize the noise
coupling into other circuits.
3. Since the feedback pin and network is a high imped-
ance circuit the feedback network should be routed away
from the inductor. The feedback pin and feedback net-
work should be shielded with a ground plane or trace to
minimize noise coupling into this circuit.
4. A star ground connection or ground plane minimizes
ground shifts and noise is recommended.

Copyright  ANPEC Electronics Corp. 14 www.anpec.com.tw

Rev. A.4 - Oct., 2008
APW7137

Package Information
SOT-23-5

D
e

SEE
VIEW A
E1

b c
e1

0.25
A2

GAUGE PLANE
SEATING PLANE
A1

L
0

VIEW A

S SOT-23-5
Y
M MILLIMETERS INCHES
B
O
L MIN. MAX. MIN. MAX.
A 1.45 0.057
A1 0.00 0.15 0.000 0.006
A2 0.90 1.30 0.035 0.051
b 0.30 0.50 0.012 0.020
c 0.08 0.22 0.003 0.009
D 2.70 3.10 0.106 0.122
E 2.60 3.00 0.102 0.118
E1 1.40 1.80 0.055 0.071
e 0.95 BSC 0.037 BSC
e1 1.90 BSC 0.075 BSC
L 0.30 0.60 0.012 0.024
0 0° 8° 0° 8°
Note : 1. Follow JEDEC TO-178 AA.
2. Dimension D and E1 do not include mold flash, protrusions or gate
burrs. Mold flash, protrusion or gate burrs shall not exceed 10 mil
per side.

Copyright  ANPEC Electronics Corp. 15 www.anpec.com.tw

Rev. A.4 - Oct., 2008
APW7137

Carrier Tape & Reel Dimensions

OD0 P0 P2 P1 A

E1
F

W
B0

K0 A0 OD1 B A
B

SECTION A-A

T
SECTION B-B

d
H
A

T1

Application A H T1 C d D W E1 F
8.4+2.00 13.0+0.50
178.0±2.00 50 MIN. 1.5 MIN. 20.2 MIN. 8.0±0.30 1.75±0.10 3.5±0.05
-0.00 -0.20
SOT-23-5 P0 P1 P2 D0 D1 T A0 B0 K0
1.5+0.10 0.6+0.00
4.0±0.10 4.0±0.10 2.0±0.05 1.0 MIN. 3.20±0.20 3.10±0.20 1.50±0.20
-0.00 -0.40

(mm)

Devices Per Unit

Package Type Unit Quantity

SOT-23-5 Tape & Reel 3000

Copyright  ANPEC Electronics Corp. 16 www.anpec.com.tw

Rev. A.4 - Oct., 2008
APW7137

Taping Direction Information

SOT-23-5

USER DIRECTION OF FEED

Reflow Condition (IR/Convection or VPR Reflow)

TP tp
Critical Zone
TL to TP
Ramp-up

TL
tL
Temperature

Tsmax

Tsmin
Ramp-down
ts
Preheat

25
t 25°C to Peak

Time

Reliability Test Program

Test item Method Description
SOLDERABILITY MIL-STD-883D-2003 245°C, 5 sec
HOLT MIL-STD-883D-1005.7 1000 Hrs Bias @125°C
PCT JESD-22-B, A102 168 Hrs, 100%RH, 121°C
TST MIL-STD-883D-1011.9 -65°C~150°C, 200 Cycles
ESD MIL-STD-883D-3015.7 VHBM > 2KV, VMM > 200V
Latch-Up JESD 78 10ms, 1tr > 100mA

Copyright  ANPEC Electronics Corp. 17 www.anpec.com.tw

Rev. A.4 - Oct., 2008
APW7137

Classification Reflow Profiles

Profile Feature Sn-Pb Eutectic Assembly Pb-Free Assembly
Average ramp-up rate
3°C/second max. 3°C/second max.
(TL to TP)
Preheat
100°C 150°C
- Temperature Min (Tsmin)
150°C 200°C
- Temperature Max (Tsmax)
60-120 seconds 60-180 seconds
- Time (min to max) (ts)
Time maintained above:
183°C 217°C
- Temperature (TL)
60-150 seconds 60-150 seconds
- Time (tL)
Peak/Classification Temperature (Tp) See table 1 See table 2
Time within 5°C of actual
10-30 seconds 20-40 seconds
Peak Temperature (tp)
Ramp-down Rate 6°C/second max. 6°C/second max.
Time 25°C to Peak Temperature 6 minutes max. 8 minutes max.
Note: All temperatures refer to topside of the package. Measured on the body surface.
Table 1. SnPb Eutectic Process – Package Peak Reflow Temperatures
3 3
Volume mm Volume mm
Package Thickness
<350 ≥350
<2.5 mm 240 +0/-5°C 225 +0/-5°C
≥2.5 mm 225 +0/-5°C 225 +0/-5°C

Table 2. Pb-free Process – Package Classification Reflow Temperatures

3 3 3
Volume mm Volume mm Volume mm
Package Thickness
<350 350-2000 >2000
<1.6 mm 260 +0°C* 260 +0°C* 260 +0°C*
1.6 mm – 2.5 mm 260 +0°C* 250 +0°C* 245 +0°C*
≥2.5 mm 250 +0°C* 245 +0°C* 245 +0°C*
* Tolerance: The device manufacturer/supplier shall assure process compatibility up to and including the stated
classification temperature (this means Peak reflow temperature +0°C. For example 260°C+0°C) at the rated MSL
level.

Customer Service

Anpec Electronics Corp.

Head Office :
No.6, Dusing 1st Road, SBIP,
Hsin-Chu, Taiwan, R.O.C.
Tel : 886-3-5642000
Fax : 886-3-5642050

Taipei Branch :
2F, No. 11, Lane 218, Sec 2 Jhongsing Rd.,
Sindian City, Taipei County 23146, Taiwan
Tel : 886-2-2910-3838
Fax : 886-2-2917-3838

Copyright  ANPEC Electronics Corp. 18 www.anpec.com.tw

Rev. A.4 - Oct., 2008