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Tunnel field-effect transistors with graphene channels

Article  in  Semiconductors · February 2013

DOI: 10.1134/S1063782613020218

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ISSN 10637826, Semiconductors, 2013, Vol. 47, No. 2, pp. 279–284. © Pleiades Publishing, Ltd., 2013.
Original Russian Text © D.A. Svintsov, V.V. Vyurkov, V.F. Lukichev, A.A. Orlikovsky, A. Burenkov, R. Oechsner, 2013, published in Fizika i Tekhnika Poluprovodnikov, 2013,
Vol. 47, No. 2, pp. 244–250.

IX INTERNATIONAL CONFERENCE
“SILICON2012”,
ST. PETERSBURG, JULY 9–13, 2012

Tunnel FieldEffect Transistors with Graphene Channels1

D. A. Svintsova, V. V. Vyurkova^, V. F. Lukicheva, A. A. Orlikovskya, A. Burenkovb, and R. Oechsnerb
a
Institute of Physics and Technology, Russian Academy of Sciences, Moscow 117218, Russia
b
Fraunhofer Institute of Integrated Systems and Device Technology, Erlangen 91058, Germany
^email vyurkov@ftian.ru
Submitted July 17, 2012; accepted for publication July 17, 2012

Abstract—The lack of an OFFstate has been the main obstacle to the application of graphenebased tran
sistors in digital circuits. Recently vertical graphene tunnel fieldeffect transistors with a low OFFstate cur
rent have been reported; however, they exhibited a relatively weak effect of gate voltage on channel conduc
tivity. We propose a novel lateral tunnel graphene transistor with the channel conductivity effectively con
trolled by the gate voltage and the subthreshold slope approaching the thermionic limit. The proposed
transistor has a semiconductor (dielectric) tunnel gap in the channel operated by gate and exhibits both high
ONstate current inherent to graphene channels and low OFFstate current inherent to semiconductor
channels.
DOI: 10.1134/S1063782613020218

INTRODUCTION thin tunneltransparent dielectric layer of boron

Graphenebased fieldeffect transistors (FETs)
possess unique highfrequency properties due to their
high carrier mobility. Application of these FETs in dig
ital circuits is, however, impossible due to the low ratio
of ON to OFFstate currents. The lack of an OFF
state, in turn, is a consequence of the graphene elec
tron spectrum. Graphene is a gapless semiconductor
with a linear dependence of the quasiparticle energy ε
on the quasimomentum p in the vicinity of band
extrema:
ε = ± v F p,
here vF = 106 m/s is the characteristic electron velocity
in graphene, the plus and minus signs refer to the con
duction and valence bands, respectively.
It is the lack of a band gap in singlelayer graphene
and the small band gap (on the order of 0.1 eV [1, 2])
in a graphene bilayer, nanoribbons and semiconductor
nanotubes that leads to the small ratio of ON and
OFFstate currents in FETs based on carbon materials.
One of the possible solutions to this problem is to
introduce a tunnel contact in the FET channel. In this
case the conductivity of the channel can be controlled
in two ways: first, the penetrability of the barrier can be
varied; second, the Fermi energy in graphene can be
varied too, which leads to a change in the tunneling
density of states.
A graphenebased tunnel FET was first presented
in [3]. The vertical construction represented two par
allel graphene sheets (source and drain) separated by a
1 The article was translated by the authors.
nitride. Both the barrier height and electron density in
the contacts were controlled by the bottom gate. The
measured characteristics showed that the influence of
the gate voltage on the channel conductivity was weak
(nonexponential) and the ON/OFF ratio reached
only 50.
In this article we propose a novel construction of
graphenebased tunnel FETs. The dependence of the
current on the gate voltage in the proposed device is
exponential with an inverse subthreshold slope reach
ing (60 mV/dec)–1 at room temperature. Considering
(1) the current–voltage characteristics of the device we
take into account simultaneously both tunnel and
thermionic current and show that the inverse sub
threshold slope of the proposed FET (as well as of any
Schottky barrier FET) is limited to (60 mV/dec)–1.
In the first section of the article we describe the
possible device structures. In the second section we
consider the distribution of electric potential along the
FET channel. The third section is devoted to calcula
tion of the FET current. In the fourth section the
results obtained are discussed. The rigorous proof con
cerning the ultimate subthreshold slope is singled out
into the appendix.
The Proposed Device Structure
The tunnel contact in the proposed FET is the con
tact between graphene and the dielectric (semicon
ductor). To provide a sufficient ONstate current, the
tunneling penetrability of the barrier should be rather
high, i.e. either the barrier should be narrow or the

279
280 SVINTSOV et al.
(a)
Source Gate Drain
Boron nitride Graphene
Silicon
−L/2 L/2
(b)
Source Drain
Oxide Gate
Boron nitride Graphene
Silicon
Fig. 1. Schematic view of the proposed FET structures:
(a) tunnel contact in the middle of the channel, (b) tunnel
contact near the drain.
work function of the transition of electron from
graphene to the barrier material should be low. The
barrier height is governed by the material of the tunnel
contact; it is rather high for dielectric materials. In [4]
a barrier height of 1.5 eV for holes and 4 eV for elec
trons was reported for the graphene–hexagonal boron
nitride interface. To reduce the work function one can
use a semiconductor material as the tunnel contact
(e.g. silicon); in this case the barrier height equals
approximately half the semiconductor band gap.
The two proposed structures of tunnel FETs with
graphene channels are schematically depicted in
Fig. 1 in a cross section.
In Fig. 1a a silicon insert with the width L is placed
in the middle of the conducting channel, and the
graphene sheet is surrounded by a dielectric. To pro
vide high electron mobility and weak residual doping
one can use hexagonal boron nitride [5]. The channel
conductivity is controlled by the top gate located at a
distance of d from the graphene sheet.
In Fig. 1b the silicon tunnel contact is placed near
the drain, the gate and drain electrodes being sepa
rated by a thin dielectric spacer layer. The latter can be
formed, for example, by the oxidation of a metal elec
trode. The structure can be operated both by the top
and bottom gates.
Band Diagrams and Distribution of Electric Potential
in the FET Channel
To work out the characteristics of the proposed
FET one should know the dependence of the local
electric potential ϕ in the device channel on the gate
voltage VG and the tunneling transparency D of the
barrier.
Far from the tunnel contact and source and drain
electrodes, the local electric potential in the channel
does not depend on coordinate and equals ϕ0 (the
source is grounded). The value of ϕ0 can be obtained
from the gradual channel approximation [6] yield
ing the local relation between the charge density
and voltage:
x κκ
0 ( V G – ϕ 0 ) = e [ n e ( ϕ 0 ) – n h ( ϕ 0 ) ], (2)
d
where κ is the permittivity of the gate dielectric
(κ = 5.04 for hexagonal boron nitride [7]), κ0 is the
electric constant, e > 0 is the elementary charge, ne and
nh are the electron and hole concentrations per unit
area.
x Assuming that the Fermi level in graphene at the
source and drain contacts is located exactly between
the conduction and valence bands (at the so called
Dirac point), one can directly obtain the electron and
hole concentrations in the channel. As eϕ0 is the local
Fermi energy, at low temperatures (kT  eϕ0) and a
positive gate potential one arrives at a simple expres
sion for the electron concentration:
2 2
e ϕ0
n e = 
2 2
. (3)
π v F
Hence, the local electric potential in the channel is
given by
πv F κκ 0  ⎛ 4de V G ⎞
2 2 3
ϕ 0 = 
 ⎜ 2 + 1 – 1⎟ .
 (4)
2de
3
⎝ πv F κκ 0 
2
⎠
The potential in the tunnel contact, determining
the height of the barrier for tunneling electrons, signif
icantly depends on the ratio L/d in structures with a
barrier in the middle of the channel. It is reasonable to
assume that for long barriers (L  d) the potential
inside the barrier equals VG almost everywhere except
near the graphene edges. At L  d, on the contrary, the
gate potential almost does not penetrate into the tun
neling gap. In this case the barrier height counted off
from the Dirac point does not depend on the gate volt
age; the latter just controls the charge carrier concen
tration in graphene. A similar situation occurs in the
structure in Fig. 1b with the tunnel contact placed out
side the gated section: here the gate voltage barely
affects the barrier height.
In the following we shall consider two characteris
tic potential profiles along the FET channel. The first
one corresponds to a long tunnel gap in the middle of
channel (Fig. 1a); the corresponding band diagram is
shown in Fig. 2. The second type of potential distribu
tion corresponds to a FET with a tunnel contact out
side the gated section (Fig. 1b); the corresponding
band diagram is presented in Fig. 3. We also assume
that the applied source–drain voltage drops only at the
SEMICONDUCTORS Vol. 47 No. 2 2013
 TUNNEL FIELDEFFECT TRANSISTORS WITH GRAPHENE CHANNELS 281

eϕ0 eϕ0
eVG
Φ0 Φ0
eϕ0 eϕ0

eϕ0 eVD eϕ0 eVD

Φ0
eϕ0 Φ0
eϕ0

Gated section
Gated section
Fig. 3. Band diagrams for a graphene FET with a tunnel
Fig. 2. Band diagrams for a graphene FET with a tunnel contact near the drain at zero drain voltage (from the top)
contact in the middle of the channel (L  d) at zero drain and positive drain voltage VD. A cross indicates the posi
voltage (from the top) and positive drain voltage VD. tion of the Dirac point with respect to the band diagram.
A cross indicates the position of the Dirac point with
respect to the band diagram.
In the above expression εc(x) is the position of the
tunnel contact. The latter assumption is valid if the conduction band bottom in the tunnel contact, mx is
resistance of the tunnel contact markedly exceeds the the effective tunneling mass, which is, in fact, a fitting
resistance of the graphene sheet. In both situations parameter obtained from comparison with experi
(Figs. 2 and 3) the tunnel barrier will be treated as mental results [11], [12], and m⊥ is the transverse
trapezoidal in form. effective mass (the latter masses, generally, can be dif
ferent).
The calculation of trapezoidalbarrier penetrability
Calculation of the Tunnel Current yields the following result:
Tunneling through the band gap of a semiconduc
4 2m ⎧
2 3/2
D ( ε, p ⊥ ) = exp – x ⎨ ⎛ Φ + 
 – ε⎞
tor was studied by Kane [8] and Keldysh [9] in the p⊥
middle of the 20th century, however, the generaliza 3eF ⎩ ⎝ 2m ⊥ ⎠
tion of these works accounting for the exact band
structure of silicon appeared quite recently [10]. 2 3/2
⎫
– ⎛ Φ – eV D + 
 – ε⎞
To our knowledge, a theoretical model for tunneling p⊥
⎝ ⎬
through the band gap in a graphene–silicon system 2m ⊥ ⎠ ⎭
has not yet been developed and it deserves separate (7)
study. In the following calculations we shall apply a at ε–
2
p ⊥ /2m ⊥ < Φ – eV D ,
simplified model sufficient for preliminary estima
2 3/2
tions of the FET characteristics. The model is based
D ( ε, p ⊥ ) = exp – x ⎛ Φ + 
 – ε⎞
4 2m p⊥
on quasiclassical description of tunneling: ⎝
3eF 2m ⊥ ⎠
x2
⎛ ⎞ at
2
Φ – eV D < ε – p ⊥ /2m ⊥ < Φ,
D ≈ exp ⎜ – 2 p x ( x ) dx⎟ ,
⎝  ∫ ⎠
(5)
where Φ is the effective barrier height, for structures
x1
with a long tunnel gap (L  d) in the middle of the
where x1 and x2 are classical turning points, and the channel (Fig. 1a) it is efficiently controlled by the gate
momentum component px in the barrier region can be voltage:
obtained from energy and transverse (orthogonal to
the x axis) momentum conservation: Φ A = Φ 0 + e ( ϕ 0 – V G ). (8)
2 2 In structures with a short tunnel gap near the drain
px p⊥
ε = ε c ( x ) + 
 + 
. (6) (Fig. 1b, band diagram in Fig. 3) the effective barrier
2m x 2m ⊥ height barely depends on the gate voltage: Φ = Φ0. In the

SEMICONDUCTORS Vol. 47 No. 2 2013

282 SVINTSOV et al.

Current density j, mA/μm Current density j, mA/μm

4
VG = 0.1 V
VD = 0.4 V VG = 0.75 V
3 VD = 0.2 V 3 VG = 0.6 V
VD = 0.1 V
2
2

1
1

0
0 0.2 0.4 0.6 0.8 1.0 0
0 0.1 0.2 0.3 0.4 0.5
Gate voltage VG, V Drain voltage VD, V

Fig. 4. Current vs. gate voltage for a graphene FET with a Fig. 5. Current vs. drain voltage for graphene FET with a
tunnel contact in the middle of the channel. Gap width is tunnel contact in the middle of the channel. Gap length is
L = 5 nm, gate dielectric thickness is d = 1 nm, tempera L = 5 nm, gate dielectric thickness is d = 1 nm, tempera
ture is T = 300 K. ture is T = 300 K.

above expressions Φ0 is the work function of the tran
sition of electron from graphene to the tunnelcontact
material at zero gate voltage, counted off from the
Dirac point in graphene. The electric field in the gap is
denoted by F in Eq. (7). The expressions for F are dif
ferent for the two structures:
V ⎝ kT ⎠
F A = e D , (9)
L 1
VD – ϕ0
F B = e 
, (10)
L ⎝
for the structures in Fig. 1a and Fig. 1b, respectively.
The authors of [13] proposed to substitute the
“light” mass of the conduction band for mx in Eq. (7)
as the tunneling transparency for light carriers is the
highest and, therefore, those carriers mainly contrib
ute to current. In the following calculations we use the
band parameters mx = 0.19me, mt = 0.98 me, where
me is the free electron mass, Φ0 = Δ/2 = 0.56 eV, where
Δ = 1.12 eV is the band gap in silicon.
Provided the potential distribution and the barrier
penetrability are known, one can apply the ballistic
formula to obtain the transistor current. To reduce the
number of equations in the intermediate calculations
we do not treat the tunnel and thermionic currents
separately, instead, we set the penetrability to unity at
2 nents) on the drain and gate voltages are presented in
ε – p ⊥ /2m ⊥ > Φ. In this notation the expression for the
source–drain current density reads
∞ p ⊥max
2eg  dε [ f ( ε ) – f ( ε ) ]
( 2π ) –∞ ∫
j = 
2 S D ∫ D ( ε, p ⊥ ) dp ⊥ , (11)
0
where g = 4 is the electronic degeneracy factor in
graphene, fS and fD are the Fermi distribution func
tions in the source and drain contacts, respectively.
If the energy is counted from the Dirac point, these
functions are given by:
1
f S ( ε ) = 
,
ε – eϕ 0⎞
⎛
1 + exp 
(12)
f D ( ε ) =  .
ε – eϕ 0 + eV D⎞
1 + exp ⎛  
kT ⎠
Integration over the transverse momentum com
ponent is performed from zero to the maximum
momentum at the given energy p⊥max = ε/vF; integra
tion over energy can be expanded to the range (–∞, +∞)
as the Fermi function (at high energies) and barrier
penetrability (at small energies) decrease exponen
tially. It should be noted that the states with negative
energies are occupied by the valenceband electrons in
graphene, which can contribute to the tunneling cur
rent too.
DISCUSSION OF THE RESULTS
The calculated dependences of the current density
(including both the tunneling and thermionic compo
Figs. 4–7 for the two proposed structures. Prior to the
calculations it is reasonable to assume that the FET
with a long tunneling gap in the middle of the channel
is operated by the gate more efficiently than that with
the gap near the drain.
Indeed, the current density in the FET with the
tunnel contact in the middle of the channel falls expo
nentially at gate voltages lower than the work function
of the transition of electron from graphene to the

SEMICONDUCTORS Vol. 47 No. 2 2013

 TUNNEL FIELDEFFECT TRANSISTORS WITH GRAPHENE CHANNELS
Current density j, mA/μm
1.4
1.2 VD = 0.4 V
VD = 0.2 V
1.0
VD = 0.1 V
0.8
0.6
0.4
0.2
0 0
0 1 2 3 4 0
Gate voltage VG, V
Fig. 6. Current vs. gate voltage for a graphene tunnel FET
with a tunnel contact near the drain. Gap length is L =
1 nm, gate dielectric thickness is d = 5 nm, temperature is
T = 300 K.
semiconductor (eVG < Φ0). The subthreshold slope at
d = 1 nm and L = 5 nm (see Fig. 4) equals kT/e; there
fore one can conclude that the thermionic current
dominates over the tunnel current. Such ratio between
the current components is also typical for Schottky
barrier FETs with high barrier penetrability [14].
Compared to the classical silicon MOSFETs on a bulk
substrate, the variation in the conductivity in our
structure is not only caused by variation in the barrier
height but also variation in the Fermi energy eϕ0 in the
graphene contacts. The latter effect is especially pro
nounced for thin dielectrics. Substituting VG = 2 V, d =
1 nm and κ = 5.06 in Eq. (4), we arrive at a Fermi
energy of 0.7 eV, which is even higher than the barrier
at the graphene–silicon interface. Figuratively speak
ing, at such gate voltages the electrons can be freely
“poured” from source to drain.
The dependences of the transistor current on the
drain voltage, exhibiting distinct saturation (Fig. 5),
are similar to those for classical bulk MOSFETs. The
weak dependence of the saturation current on the
drain voltage is due to the tunnel current, as increasing
the drain voltage leads to increasing field strength in
the gap and, as a consequence, in the tunneling pene
trability as well. The ONstate current of the proposed
FET is rather high compared to that of silicon FETs
which is the consequence of the outstanding injection
properties of the graphene contacts. The silicon insert
does not restrict the maximum FET current as the elec
tron motion in silicon at L = 5 nm is purely ballistic.
The characteristics of a graphene tunnel FET with
a short tunnel gap near the drain exhibit a completely
different behavior (Figs. 6 and 7). Some peculiarities
of the characteristics (nonexponential decrease in cur
rent at low drain voltages and lack of saturation) are
akin to those reported in [3] for vertical tunnel
SEMICONDUCTORS Vol. 47 No. 2 2013
283
Current density j, mA/μm
1.0
VG = 2 V
VG = 1 V
0.8
VG = 0.5 V
0.6
0.4
0.2
0.2 0.4 0.6 0.8 1.0
Drain voltage VD, V
Fig. 7. Current vs. drain voltage for a graphene tunnel FET
with a tunnel contact near the drain. Gap length is L =
1 nm, gate dielectric thickness is d = 5 nm, temperature is
T = 300 K.
graphene FET. It was already mentioned that a power
law dependence of the current on gate voltage was
observed when the gate affected only the density of
states of tunneling electrons but not the barrier height.
In twodimensional systems with a linear spectrum,
the tunneling density of states is proportional to the
Fermi energy eϕ0, which, in turn, is a square function
of the gate voltage.
In structures with a short tunnel gap (L = 1 nm,
d = 5 nm for the characteristics in Figs. 6 and 7), the
major component of current is the tunnel one, and
high ONstate currents predicted for the previous
structure cannot be achieved here. Despite the fact
that the current is mostly due to tunneling, the sub
threshold slope of this FET is still limited by the value
of kT/e. It is known that the subthreshold slope of the
tunnel current itself can possess any value. However, at
a high subthreshold slope of tunnel current, the tunnel
current itself is less than the thermionic one, and vice
versa. A rigorous proof concerning the ultimate sub
threshold slope of this FET (as well as of any Schot
tkybarrier FET) is singled out in the appendix.
The values of the current density obtained are just
rough estimates. There are several phenomena omit
ted in this consideration, which can either increase or
decrease the estimated value. First, the spatial charge
in the tunnel gap can restrict the growth of current at
high gate voltages. Second, the reflection of electrons
from the graphene–silicon interface can substantially
reduce barrier penetrability. Third, the local Fermi
energy in the vicinity of the graphene edge may
exceed eϕ0. This fact, omitted in the preceding cal
culations would lead to a higher estimate of current
density.
284 SVINTSOV et al.

APPENDIX The variation in the potential energy in the transis

tor channel cannot exceed eVG in absolute value, i.e.
Ultimate Subthreshold Slope of Shottky Barrier FETs
|∂U(x, VG)/∂VG| ≤ 1, hence,
In this section we examine the subtheshold slope of x2
Schottkybarrier FETs without specifying the exact d ln j sub 2e d
shape U(x, VG) of the potential barrier near the tunnel
ing edge. All the following expressions are accurate to dV G ∫
 ≤   { 2m [ U ( x, V G ) – ε 0 ] } dx
 dU
x1
within the leading exponential term, which is only of x2
(A.5)
significance for the estimate of the subthreshold slope.
= – 2e d e.
The injection current of the transistor is propor  
 dε 0 ∫ 2m [ U ( x, V G ) – ε 0 ] dx = 
kT
tional to the product of the Fermi function fS(ε) in the x1 ε = ε0
source, the penetrability D(ε, VG) of the potential bar
rier, and, possibly, some power function of energy aris We have shown that the limiting subthreshold slope
ing from the density of states (this will be omitted fur of a Shottkybarrier FET cannot be higher than
ther). The Fermi function decreases exponentially at (60 mV/dec)–1 at room temperature. It is worth
ε > μ (here μ is the Fermi energy in the source con emphasizing that the tunnel current can exhibit any
tact), and the penetrability D grows rapidly with subthreshold slope, in particular, higher than
increasing ε. These facts allow us to apply the saddle (60 mV/dec)–1. Still, the consideration of both tunnel
point approximation to estimate the current. Intro and thermionic currents leads to the above mentioned
ducing the notation restriction.
x2
The derived limitation cannot be applied to transis
ε 2 tors based on tunneling p–n junctions where tunneling
g ( ε ) =  + 
kT  ∫ 2m [ U ( x, V G ) – ε ] dx, (A.1) between the conduction and valence bands occurs.
In such devices the tunnel current is limited by the
x1
band edge, and the subthreshold slope can exceed
we obtain the following expression for the injection (60 mV/dec)–1, which was demonstrated theoretically
current in the subthreshold mode: (for instance, for carbonbased FETS in [14]) and
experimentally in [12].
∫
j sub ∝ exp [ – g ( ε ) ] dε

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