VLSI System Design

Name: Harshith C S
Reg No: 18BEC0585

Lab Task No: 1

CMOS Implementation of a Boolean Expression

Aim: To implement a CMOS circuit for the expression Y=[(AB+C)(AB)] and verify its
functionality
Tool: LTSpice
Truth Table:

Input Output
A B C Y
0 0 0 1
0 0 1 1
0 1 0 1
0 1 1 1
1 0 0 1
1 0 1 1
1 1 0 0
1 1 1 0
Circuit Diagram:

Procedure:
1. Open LTSpice software
2. Draw the schematic for the given expression.
3. Add the voltages sources. V1 for VDD and rest for inputs A, B and C. Right click on
the voltage source and goto advanced to apply pulse voltage.
4. Give three different time periods to A, B and C to notice all the possible
combinations of voltages.
5. Assign the values of width to PMOS and NMOS according to sizing.
6. M3, M2, M4 PMOS will have 3.1µm width and M5 and M6 will have 1.55µm.
7. M1, M7, M10, M11 NMOS will have 2µm and M8 will have 1µm width.

8. Goto SPICE Directive and add the library file for 180nm MOSFETs
9. Simulate → Edit Simulation Cmd and in Transient give stop time as 200ns and place
it on the schematic

10. Run the the schematic and for every waveform introduce a new graph plane to view the
result.
Graph:

Result and Inference:

From the graph that is obtained, the output obtained matches the desired output according
to the truth table for the Boolean expression.