AN-410 Application Note A UNIFIED APPROACH TO OPTIMUM FET MIXER DESIGN Prepared by Siang-Ping Kwok Applications Engineering The optimization of conversion gain, noise figure, and cross modula: tion are treated in relation to the basic mixer analysis and meaningful device parameters. The result is a unified ap- proach to the optimum design of FET mixers, MOTOROLA Semiconductor Products Inc.A UNIFIED APPROACH TO OPTIMUM FET MIXER DESIGN INTRODUCTION In this application note, circuit examples are first sgiven andare then followed by the development of the de- Sign, The gate-to-source bias points and local oscilla tor injection levels for optimum conversion gain, noise figure, and cross modulation are related to the gate-to- source cut-off voltage of the device. A linear model of ‘a mixer based on a more general analysis of mixer op- eration in the depletion region, which includes that be- yond cut-off, and the variation ‘of the channel and input resistances with respect to gate bias, is used to caleu- late conversion gain and predict the bias point for which conversion gain is maximum. Finally, the mixer analysis and associated FET pa- rameters lead to a simple guide for determining the de~ vice parameters required for high conversion gain and low noise figure. CIRCUIT DESCRIPTION AND PERFORMANCE ‘The common source FET mixer shown in Figure 1 has ‘2 200 Mliz input signal, a 260 Miz local oscillator (LO) Signal, and a 60 MHz output signal. The 2N3823 was se- lected for this circuit because of its good high frequency characteristics and low noise figure. Regarding the se~ lection of individual FETS, if the LO swing is limited, select low Ipss units for high gain and low noise. Ifa large signal handling capability 1s desired, and a sulfi- cient LO voltage swing is available, select high Ip3g units. Both input and output of the circuit shown are terminated in 50 ohms. Referring to Figure 1, C1, C2, and Li form the input matching network, C3,"C4,' and “L2 form the output matching network. ‘The LO signal is injectedat the source across RF choke L3. Standard molded chokes of 2.7 if and 10 ul are usedas RF chokes for 200 MHz and 60 MHz respectively. ‘The three 0.001 uF capacitors are used for coupling. ‘The drain-to-source voltage is set at 15 volts which is, ‘well into the pinch-off region for the 2N3825. The gate- to-source bias i set to 0.8 Vp, where Vp is the gate dias vollage for which the device is cut off. The peak voltage level of the LO should be set a8 high as possible Until conversion gain begins to decrease. This level, in practice, 1s large enough to drive the JFET into the en- hancement region. The degree the device can be driven into this region 1s proportional to the value of Vp. A reasonable thoice for Vio 18 Vgo +0-6 volts. ‘To avoid oscillation, the input network should be first ‘tuned for maximum cutput. When properly tuned, the ‘output signal fed back to the input port is grounded, ‘thus preventing regeneration. The output network should then be tuned for maximum output. If necessary, slightly ad~ just the gate bias for maximum output then retune the in- ‘put and output as previously described. ‘The conversion fain for the circuit shown in Figure 1is 11 dB. When the eireuil is adjusted for low noise, a noise figure of 6.5 dB ean be achieved with a conversion gain of 9.0 4B. Figure 2 depicts a circuit with a parallel trap at the output to remove the LO signal. An auto-transformer is used at the output for high impedance matehing. The matching networks used are of the type shown below: Davee Tobe tenet Vos 18 vse S TURNS TINNED #zOWIRE, T= Disincues, LENGTH = {UG INGHES. ALL OTHER INDUCTORS [ARE STANGARD MOLDED CHOKES. FIGURE 1 — 200 Mz COMMON SOURCE, SOURCE INJECTION MER Ceut diagrams external to Motorola products are included as means ST ilustane fypiel semonductor applesons: consequent” com: fete informaticn sufficient for constuction purposes thot neces. any gen ‘The information mths Application Note hes been carefully checked and i believed to be ential reliable. However, no respons Sy fs ascumed for inaccuracies, Furthermore, such information does ot convey to the purchaser of the semiconductor devies described ‘ny ieee under the patent rights of Motorola In. or others‘This form has an advantage over pi matchingnetworks {in that only Cy controls the realpart of the impedance to be matched: Lp and Cp are usedonly to resonate the cit cuitat the destred frequency. In tuning this cireuit, the LO trap is first tuned for a ‘minimum LO signal at the output; the input network 18 then tuned for maximum output signal, and finally the output network 16 adjusted for maximum output signal. It might be necessary to repeat the tuning procedure until ‘minimum LO signal and maximum output signal are ob- tained. The conversion gain for this cireuit is 10 dB with 2 noise figure of 6.8 dBand abandwidth of 2.2 Miiz. ‘A common source, gate injection mixer yields slightly higher conversion gain than source Injection because the presence of impedance between the source terminal and {ground in the latter case gives riseto negative feedback. However, if the source impedance is low, e.g. 80 ohms as is the case here, the feedback factor is: (1+g,R) = 145.0% 109 x 60 25, which is essentially unity when Rg =0. A more detailed analysis will be given in the discussion of a linear model for a FET mixer For the source injected mixer where gmRs <1, the effect of impedance between the source terminal’ and {ground on the device input and output impedances is neg- Tigible. ‘For this reason, the measurements of the gate injected mixer ean be Used for the design of the source Injected mixer, and vice versa. Figures $a and 3b show the common source gate Injected and source injected mixers respectively. Note that except for the LO injec tion networks, thetwo cireults are identical. Gate injec tion is introduced through a small capacitance which is Fa san OS8pF aot aga net Lr + 36 Tuas 226 evamecen mine ‘001 CLOSE wouND oN 14"10 FORM (Ta SLUG. TAP AT APPROX LENGTH NATELY Va OF TOTAL LENGTH ROW ONE END, se1a9F 2 = 1arzTunns resort oRAWH ume Ona 10 INCH 1, 3 NCH AALLOTHER COILS ARE STANDARD ‘moLoeo CHOKES, FRGURE 2 — 200 Miz COMMON SOURCE, SOURCE INJECTION WER TE TURNS #24 ENAMELED WIRE, CLOSE UE ‘WOUND OW 14 INCH I. FORK S/IDINGH LO, 03 INCH LONG ALL OTHER GOILS ARE STANDARO MOLOED CHOKES. L305 aH u oy sont TURNS a1 TIMED WIRE i sis cs OSapF 15 ee z sau are sera 118 L2 ARE THE SAME AS N FIGURE 2. ALLOTHER COILS AME STANDARD MOLOED CHOKES. 0.280 me sy ro 5009F soa.‘much smaller than the total parallel capacitance of the ‘input network, This is done to minimize the loading ef- fect (in this particular case the capacitance value 1s 1 pF). Source injection is introduced across an RF choke. The conversion gain characteristics of both mixers are given in Figure 4. As indicated in the figure, the gate injected mixer has a slightly higher conversion gain than the source injected circuit. ‘The noise figure can be minimized by first biasing the gate at 0.8 Vp, then adjust the LO signal until conver~ sion gain is maximum. At this point both the source and the load havebeen tuned to match the input and output m= pedances of the device. To further reduce the noise fig- ure, vary the input source resistance, tune out the re- actance of the input network for a maximum output signal, and repeat until a minimum noise figure #8 obtained. If necessary, the gate bias can be varied slightly (from 0.7 Vp to 0.85 Vp) and the previous optimizing steps re- peated. conmon source SOURCE NUECTION SATE MEcTION Vpr tay nates 1140 vine 250M, 200 He some VEO=O8V5 0 At this point, the conversion gain and noise figure are close to their ‘respective optimum values. The cross modulation is reasonably low. Further reduction of ‘cross modulation can be obtained by increasing the gate reverse bias. It should be noted however that this will necessitate a compromise of conversion gain and noise figure. A more detailed background for the optimiza- dons of noise figure and cross modulation is given ina later section. DESIGN OF FET MIXERS ‘The design of a FET mixer is simplified by the fact that the input port is resonated at the incoming signal frequency and the output at the output frequency. If the ‘wo ports are made to be frequency selective, then any Signal fed from one port is grounded at the other port. For this case, Yin = Y11 and Yout = Yaz. The effective Yin and Yout can be easily measured using the circuits given in Figure $ and Figure 6. Once Yin and Yout are measured under the intended operating conditions, the available conversion gain can bbe calculated from the equation: st - dare econ | . gu ., * 3 10] H \ re [¥,.] 2 a 3 \ Fae ® Now ae | Pout} Zu 11 the conversion gain meets the required specification, 3 il the next step is to realize the matching networks for Yin © 30 + rt and Yout for the desired bandwidth. Particular attention : Source mtnon| Should be paid fo the np network to male ceva tat = 20 aa it can yield a wide range of source resistances for the rs L Optimization at nlae gee DESIGN EXAMPLE 02 oe a a wo a 8 Reman As. desl example, considera FET miner reqlred ‘cove for converting a 200 MHz signal to a 60 MHz signal with "UE 4 PONE CONVERSION AN {minimum conversion gin of 8-0 dDy a bandwith "et = 7 cron Becnon] Vos. A D wert etn eu source mieeron Lommuecrion aaa a) Ae Figg , t J cts) on ane oo URE 6h — Yo, ATE WUE TONis 10% or less of the output frequency, and a noise fig- ure no greater than 7.0'dB. The design is carried out step by step as follows: 1. Select @ suitable FET (the 2N3828 in this case) and measure the input and output admittances at the operating conditions. These are given in terms of Rp and Cp in Figures 7and 8. The approxi- ‘até optimum operating conditions are: A, effective gate bias: Vgg =0.8 V, 3, >, LO injection level: Vy o(peak) 7 ‘The input _and output admittances measured in terms of Ry and Cp are: Y,,¢ 4009//5.5 pF at 200 Miz (Figure 7) Yout! 10 0//2.0 pF at 60 MHz (Figure 8) ‘The conversion gain of the mixer when both input ‘and output are matched can be calculated fromthe following data: Bjyo * 5000 umhos (2NSE23) 8 Vp = Vig) 8 V5 = Vz) = 10k2 4002 & Wego 285 Fine taco in Weo = 0-8 Vy * Vy0) 12 Zoo wie: fig * 260Mie Vig = Ve Vip 28] OOF oF Os ae 40 4218 8 Yoo FIGURE 7 — FET MIXER INPUT EQUALENT ADMITTANCE aft = 260K yt = BD MNE aly 38 vol f aT) Ven""e FIGURE 8 — FET MIXER OUTPUT EQUIVALENT ADMITTANCE then the available conversion gain 6, = 0.265 «8x 1079 10 x 1 40) sab as, which meets the specification. With a higher V1.0. level, a higher conversion gain can be obtained (ee Figure 11) ‘The 10% bandwidth specification requires an out put network with a loaded Q, equal to 10. Ika pi network is to be used for matching, the elements of Figure 9 can be calculated with the followings? R 1 ‘out _ 10,000 _ 599 ohms % 5" BAC, FE) * BQ, ~~ 20 ~ 500 ohm: where f, = 60 Miz and Cy = 8.8 - 2.0 = 3.3 pF Fi oe Xe," wee = 50 [who some (400 + 1) - 108750 then Cy = 59pF, and 2, + ®ouy Ry) vy, «tray = Bon oa Pi /Kes (2,7? 64 A rot 20 x 104 + 10! x 50/50 «59 5 game +1 therefore, L, = 195 nit Tk Tr r THGURE 9 — Fr MATORING NETWORK IQ, = 5 is chosen for the input network the same calculations give: cl = 85 pF C2 = 15 pF Li = 44a Allow a wide range of C1, C2, and possibly Ly for a corresponding range of source resistance for the optimization of noise figure. ‘The finished cireult (Figure 1) has a measured conversion gain of 9 4B at the operating condl- tons used for calculation. However, with an in= ‘Computer generated design solutions are given for the pi and several other popular matching networks ia reference 6, With the lability of reference 6, the calculations in steps 3 and 4 would not be necessary.creased Vo maximum conversion gain of 114B. can be oblained. The noise figure measured at 9.0 dB of conversion gain is 6.9 dB with a band width of 6.0 Miz. FET MIXER THEORY CONVERSION GAIN ‘The more fundamental parameters, conversion trans~ conductance, fe; drain-to-source channel resistance, ri and input resistance, iq are first discussed. This is followed by a general discussion on conversion gain. Conversion transconductance, ge, is defined as the ratio of drain current to input signal voltage at their re- spective frequencies: ig At oup oat» i) ig fin and for square law operation, Veo Vio *%y ®) p~ Yoo Vio +s Conversion transconductance for a given device is pro- portional to the magnitude of LO signal as given in the equation, Emo @ For large signal operation (Figure 10) where the ex- cursion of the LO signal goesbeyond the cut-off gate bias point, but is limited to the depletion region at all time Veo Yio 2° Yoo *¥L02 Vp anes! a] FIGURE 10 ~ TRANSCONDUCTANCE, Gi, AND LO.MODULATED ‘TRANSCONDUCTANCE,& (i) ‘The conversion transconductance is given by the equa- tons! Emo anv, P gol r+ 28-8in29) +4608 8(7,-Vag)} “aj a Yio Note that equation (4) becomes equation (8) when (| = % IVyo and Vp are held constant, the maximum ge o€~ curs at 2 gate Blas equal to:! v y, co. ‘to “eet 6 %p ‘The plots of normalized conversion transconductance, Se/emo, Versus the normalizedquiescent gate-to-souree bias, Woo Vp, for different LOinjectiontevels are given in Figure 11." ‘The flat plateau of Vig < 1/2 Vp corre Sponds to operation inthe square law Fegion, equation (9). As VGO/Vp increases, the Ge/fmo starts 0 decrease steadily until it equals zero. This region of decreasing Sc/8mo 18 cut prematurely at the point Vag = VLO be Gause for lower Vgo, LO excursion intothe enhancement region occurs. The enhancement region is a forbidden region for JFETS EFFECTIVE DRAIN TO SOURCE CHANNEL RESISTANCE AND INPUT RESISTANCE. ‘The drain-to-source channel resistance, ra, 1s de~ pendent on the width of the non-depleted channel which, in turn is varied by gate-to-source bias. A typical plot of rq normalized against rss (ra at Vos = 0) vs. nor~ mallzed Vgo is given in Figure 12. The Ta/tass is¢iven by the solid line and the variation of rin with respect to bias is also shown. Ey i 1 O02 oF Os Ob 1012 a as a 20 Veo" FIGURE 11 — NORMALZED CONVERSION TRANSCONDUCTANCE [ek (0 02 04 06 us 10 12 14 16 18 20 Yoo FIGURE 12 — NORMALIZED DRAIN-SOURCE CHANNEL RESISTANCE.LINEAR MODEL OF MIXER A simple linear model of a mixer can be constructed fas shown in Figure 13. This model is for a gate injected ‘mixer with a grounded source. Fora source injected mixer, the linear model has to include the source im= pedance as shown below: It rq >> Rs, the above model can be simplified by the equivalent eireult: nl eR) Moreover, If Rg 1s made small, e-g., 50 ohms LO source Impedance, the typical value of fm Rs for FETS is (6 x 10°3) (50) "= 0.25 <1. Therefore the model in Figure 13 still represents an accurate model. In reference to Figure 13, the input network is reso rated at the input frequency and the output, atthe outpst {requency.. This simple model ean be used to calculate the conversion gain of the mixer. The transducer gain, Gr, ean be expressed in terms of the model ~ Power delivered to the toad * Power available at the Taput “63d (gg) Me ‘when input is matched. For Ry, or © === Locus OF Mio * Yeo [2™ v2 Oe os as 10 128 Voor AVAILABLE POWER GAIN CHARACTERISTICS E wlssunto— Vig = 08Vp = == CALCULATED SINS To = ane AF = SOM If 10aIe= Brig? Jo 7 2a common souRce SOURCE MUECTION AVAILABLE POWER CONVERSION GAIN ous as a8 0 12 8 Yeo" FIGURE 15 ~ 283823 COMMON SOURCE. SOURCE INJECTION GRVERSION GAIN CHARACTERISTICS. fore, conversion gain. Though the analysis used here does not account for operation inthe enhancement region, fn practice, higher conversion gain can be obtained by further increasing the LO injection level until the de~ crease in input and drain channel resistances becomes dominant. The amount the device can be driven into the enhancement region is proportional to the value of Vp- A reasonable choice of Vig is Vgo + 0-6 volts. BIASING WITH SELF-BIAS RESISTANCE, ‘The analysis of optimum gate bias is valid for com- ‘mon source mixers with gate injection or source injec tion schemes. For a practical load resistance, RL < rg. the optimum bias point is in the range between 0.7 Vp to 0.8 Vp. Inthe case where a self-biasing resistance is used, "the effective quiescent bias point must take into ‘account the contribution of de current due tothe injection of LO into a nonlinear device. When the FET js oper- fated in the square law region, quiescent bias is: FIGURE 13 — UNEAR MODEL OF FET MIXER Using the curves given in Figure 1f and Figure 12, the normalized available gain, Ga = ge" Tq Tiny 18 plotted in Figure 14. Figure 15 shows the measured gain charac teristics. The calculated curves are normalized against the peak of the measured values. The model predicts the ‘bias point for whieh conversion gain is maximum. LOCAL OSCILLATOR INJECTION LEVEL For a JFET operated in the depletion region, conver~ sion transconductance, ge, increases monotonically with LO injection level (equation (4) and Figure 11), and there- + 4] Ry. When operated with a high LO injection level, trial and error may be needed to determine Rg, the source self bias resistance. The self-bias scheme is shown in Fig- ure 16. (8) [o5-veo8 4 NOIE FIGURE ‘The approximate noise figure of a FET mixer can be expressed as: Req , Be we afe (RE)] 0SIONAL 16.16 FAGURE 16 — SELF-IAS SCHEME squivalent noise resistance” @ K = Characteristic constant of the device R,, = Gate Bias Resistance For a given source resistance the noise figure is mini- mum When Rgq is minimum. To minimize noise figure, Ge should be maximized. According to Figure 11y a JPET mixer operated in the depletion region should be biased at 0.7 Vp and Figure 17 shows the variation of noise figure with respect to gate bias while the source resistance is held constant. ‘The correlation plot of gain characteristics is also given. Optimum noise figure and maximum conversion gain both occur in the vieinity of Oey = nOTSE FIGURE CONV. GAIN y nie ipo sae fig > 1oMae sol Lt io 002 04 Os o8 10 12 14 18 ‘CONVERSION GAIN as) FIGURE 17 — NOISE FIGURE AND CONVERSION GAIN CORRELATION ‘Once the optimum biaspoint hasbeen chosen, the noise figure can be further reduced by an appropriate choice of source resistance. Figure 18 shows that this is 900 ‘ohms for the 2N3823 operating with an input frequency of 50 Miz, and an output frequency of 10 MHz. 1 tow. gan zw z % Sx Yeo z Mo" 99 3 jt’ Zao a. hose _ | = ©" common souace Freuae: gL S00CE muEETON [ | Tan 40) S00 OOo) Ton (OHMS) FGURE 18 — NOISE FIGURE VERSUS SOURCE RESISTANCE {Sirigly, he cross modulation fv not infinite, because the denominator of the Owe of 1b/VGo) and some other negligible terms which have been omitted. Moreover, Wien fin = ‘unwanted) appearing a the output ‘CROSS MODULATION Assuming a non-linear device, the small signal drain ccurrent around the quiescent point can be expressed by the Maclaurin series: Ly (V 3 oa y a ee 1 Woo) Bod y 3 Bye yt © were, 4, ; b 15 oo) = aes Yas ~ Yoo 21 15 oo) = G8 Yos~ Yoo te os If the input consists of an unmodulated desired signal, Vg, of trequeney og, and undesired signal, Vy of fre= aiueney wy ‘wth My percent AM modulation of frequency Gm, the Small signal input gate-to-source vollage, Vos, is then: Vgg = Vq cobugt +V, (1 +M, cose, cose, t.(10) ‘There will be some modslation appearing on the desired Signal.” The amount of this crass modulation is given by the expression enclosed in the inside brackets. of the ; oe aoe vgenas fte [BSR aFE oaas|n 5 where K is a proportional factor. Given an undesired signal level, the amount of cross ‘modulation is porportional to the ratio of the third de- rivative of Ip with respect to Vgg at the quiescentbias point tothe first derivative, gy. Two extreme cases are obvious: 1. Ifa FET were a perfect square law device, then the third and higher derivatives would be zero, as ‘would cross modulation. 2, If a FET were operated at cut-off when gm = 0, the cross modulation would be infinite.” ‘There: fore, bias point is very important in minimizing cross modulation. As expected, cross modulation is minimum when the device 1s operated in the square law region. This fact ean be Seen in Figure 19 by the peak of the undesired signal required to produce 1% cross modulation at bias v, v, Point Vg = and injection level Vig = ap « Unfor- tunately, the coneersion gain is typically 9.0 48 below the peal gain at the bias point. Though there 18 4 lack of theoretical Justification, measurements show that Gross modulation Is greatly’ reduced as the gate bia fs Shifted closer to and beyond cut-oll. 1 is also improved With increasing LO injection level. Therefore, high in- Jeetion operation not only sles high aly, bu also i= Broved eross modulation performance. Figure 20 shows Gross mogsation characteristics of high injection oper= Sten. on a the bracket Of (11) involves the sum ‘there will be no signal (wanted orSELECTION OF DEVICE PARAMETERS FOR HIGH GAIN Power conversion gain is proportional to ge”, and ge 4s in turn related to the more accessible FET parame ters of Ipgg and Vp- or square aw operation, gis ato (S92) Vay but Iygg = 8B? Vj cam then be expressed a , me (ts) Yio" a) ; rom equation (12), the concuson might be made tat Reno taveign ts ntacsute hecooaey NDS er Sones ineelSotype Sees ei ower i for higher tyggs Table 1 st te vate ot (88) tor ¥ p 2N028 PETS wth ferent valves of tpg ‘oRmERRED | | wim] Sonat'=ef\ | ssiaca =" smv a : ene wo A = is reer 8s 2 [ehinox ze 3 ad) atunce sw 22 3 “lsounce N\ ge | Mnecon 85 2 s0t+—+ 120 25 oT ow 33 2 a oan in 8 vin = a5¥p g ad vp 28¥ o 8 ot | 0 ya 8 a a veo! Icune 19 —cR0ss MODULATION CHARACTERISTICS | 0 zal wo 2 ‘e050 MH z aaj coun source o & Sounce nection z eee ane ‘er | z ge verze ‘unoEsinED}” 2 Lhe SMALE genes am 8 : ” cow" 3 g an, gy Mn 2 By f wo 5 ‘ w & rm | | ty # att lo 2 | 1 Taree ae ae is Veo!¥e FIGURE 20 — HIGH INJECTION CROSS MODULATION CHARACTERISTICS TABLE 1 — 283823 FET VALUES 2 1 Be 2 Sng “Vs (umbo) im unto) sao raf saso 1940 rao f223| esto 1940 u.30 |s.55| avo 20 4.00 [13.0] 800 20 ‘The table shows that for widespread values of Ipss, the gmo 48 relatively constant. If gmo 18 assumed {0 be ‘constant equal to 2K, then g, can be expressed as ee = &) Wyo) a3) ‘The equation states that for a given Vio, high Ipgs de~ vices have lower go. So far, the discussion has been centered only on ge, bbat power conversion gain is to a large degree, propor tonal to geerg, and rq monotonically decreases with in- creasing Ings. A typical plot of rq versus the spread of Ipgg of another N-channel JFET, the MFE2193, is given im Figure 21. One can conclude that, given an LO injec tion level for the same type of device, low Ipgs units have high power conversion gain. It should be noted that high Ipss units are capable of high conversion gain if LO injection level is increased. hurezids Vos" 00 DDRAIN SOURCE RESISTANCE, r (OHMS) Ves" 3 Vere a Iss ma) [HOURE 21 — VARIATION OF DRAIN CHANNEL RESISTANCE WTA RESPECT TO ly, SPREAD DEVICE PARAMETERS FOR LOW NOISE In applications where LO drive is limited, low Ipss ‘units have inherently high conversion transconductance, ‘and the equivalent noise resistance tends to be low. For this reason, low Ipgg units have both features of high gain and low noise for such applications. It should be noted that high Ipgg units are capable of the same, or better performance only if there is a larger Vig drive.CONCLUSION ‘The conversion gain of FET mixers can be caleulated from the expression of conversion transconductance and the linear mixer model given in this note. Also given ‘are the circuits which measure the cireuit elements of the model. Once the input and output admittanees at the operating conditions are measured, the design of a FET mixer be comes a routine realization of matching networks. For maximum conversion gain, low noise and a rea sonably good cross modulation performance, "effective ly" bias the gate at 0.8 Vp, and inject the LO signal as hnigh as possible. For a'depletion mode operation this, means VL = Vco = 0-8 Vp. The analysis used did not ‘account for operation of JFETS inthe enhancement mode. However, in practice, larger conversion gain is obtained when the mixer is driven into enhancement mode opera tion. This trend continues until the decrease in the input and the drain channelimpedancesbeeome dominant. ‘The amount the device can be driven into the enhancement ‘mode before gain deteriorates is proportionately depend- gent on the value of Vp; an LO injection level equal to Veo + 0-6 volts is a reasonable choice, ‘The high injection operation fails to take full advantage of Iow intermodulation and low spurious distortions af- forded by a squire law device. Conversely, mixing in the square law region yields only a small’ fraction of ‘maximum possible gain. Finally, for operation with low level LG injection, se- lect devices with a high value of Ipsg/Vpe (usually these are low Ipsg units) to obiain high conversion gain and low noise. When a large signal handling capability is required, select high Vp or high Ipgg units. REFERENCES 1. Field Bifect Transistor RF Mixer Design Techniques, Siang-Ping Kwok, WESCON Convention Record, 1967, 2. Electronic and Radio Engineering, pp. 570-581, Fredrick E. Terman. 3. The Field-Effect Transistor ALUHF, V. L. Rohde, Wireless World, January, 1066. 4. Third Order Distortion And Cross Modulation in Grounded Emitter Transistor Amplifiers, Helmut Lotsch, IRE Trans. Audio, March 1961 5. RE Small Signal Design Using Admit fers, Motorola Application Note AN-215. 6. Matching Network Designs With Computer Solutions, Motorola Application Note AN-DOPs MOTOROLA Semiconductor Products Inc.