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D D D D D D D: SN54AHC16541, SN74AHC16541 16-Bit Buffers/Drivers With 3-State Outputs
D D D D D D D: SN54AHC16541, SN74AHC16541 16-Bit Buffers/Drivers With 3-State Outputs
16-BIT BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS
SCLS332F – MARCH 1996 – REVISED JANUARY 2000
FUNCTION TABLE
(each 8-bit buffer/driver)
INPUTS OUTPUT
OE1 OE2 A Y
L L L L
L L H H
H X X Z
X H X Z
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
logic symbol†
1 &
1OE1
48 EN1
1OE2
24 &
2OE1
25 EN2
2OE2
47 2
1A1 1 1 1Y1
46 3
1A2 1Y2
44 5
1A3 1Y3
43 6
1A4 1Y4
41 8
1A5 1Y5
40 9
1A6 1Y6
38 11
1A7 1Y7
37 12
1A8 1Y8
36 13
2A1 1 2 2Y1
35 14
2A2 2Y2
33 16
2A3 2Y3
32 17
2A4 2Y4
30 19
2A5 2Y5
29 20
2A6 2Y6
27 22
2A7 2Y7
26 23
2A8 2Y8
† This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
47 2 36 13
1A1 1Y1 2A1 2Y1
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
Output voltage range, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to VCC + 0.5 V
Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –20 mA
Output clamp current, IOK (VO < 0 or VO > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25 mA
Continuous current through each VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±75 mA
Package thermal impedance, θJA (see Note 2): DGG package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70°C/W
DGV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58°C/W
DL package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63°C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51.
VCC
Timing Input 50% VCC
tw 0V
th
VCC tsu
VCC
Input 50% VCC 50% VCC
Data Input 50% VCC 50% VCC
0V 0V
VOLTAGE WAVEFORMS VOLTAGE WAVEFORMS
PULSE DURATION SETUP AND HOLD TIMES
VCC VCC
Output
Input 50% VCC 50% VCC 50% VCC 50% VCC
Control
0V 0V
www.ti.com 10-Dec-2020
PACKAGING INFORMATION
Orderable Device Status Package Type Package Pins Package Eco Plan Lead finish/ MSL Peak Temp Op Temp (°C) Device Marking Samples
(1) Drawing Qty (2) Ball material (3) (4/5)
(6)
SN74AHC16541DGGR ACTIVE TSSOP DGG 48 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 AHC16541
SN74AHC16541DGVR ACTIVE TVSOP DGV 48 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 HE541
SN74AHC16541DL ACTIVE SSOP DL 48 25 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 AHC16541
SN74AHC16541DLR ACTIVE SSOP DL 48 1000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 AHC16541
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com 10-Dec-2020
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com 20-Jan-2021
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com 20-Jan-2021
Pack Materials-Page 2
MECHANICAL DATA
0,23
0,40 0,07 M
0,13
24 13
0,16 NOM
4,50 6,60
4,30 6,20
Gage Plane
0,25
0°–8°
0,75
1 12
0,50
A
Seating Plane
0,15
1,20 MAX 0,08
0,05
PINS **
14 16 20 24 38 48 56
DIM
4073251/E 08/00
C
8.3 SEATING PLANE
TYP
7.9
PIN 1 ID 0.1 C
A
AREA
46X 0.5
48
1
12.6 2X
12.4 11.5
NOTE 3
24
25
0.27
48X
6.2 0.17 1.2
B
6.0 0.08 C A B 1.0
(0.15) TYP
0.25
SEE DETAIL A GAGE PLANE
0.15
0 -8 0.75 0.05
0.50
DETAIL A
TYPICAL
4214859/B 11/2020
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed 0.15 mm per side.
4. Reference JEDEC registration MO-153.
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EXAMPLE BOARD LAYOUT
DGG0048A TSSOP - 1.2 mm max height
SMALL OUTLINE PACKAGE
48X (0.3)
46X (0.5)
(R0.05) SYMM
TYP
24 25
(7.5)
4214859/B 11/2020
NOTES: (continued)
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EXAMPLE STENCIL DESIGN
DGG0048A TSSOP - 1.2 mm max height
SMALL OUTLINE PACKAGE
48X (0.3)
46X (0.5)
SYMM
(R0.05) TYP
24 25
(7.5)
4214859/B 11/2020
NOTES: (continued)
7. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
8. Board assembly site may have different recommendations for stencil design.
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MECHANICAL DATA
0,27
0,50 0,08 M
0,17
48 25
6,20 8,30
6,00 7,90 0,15 NOM
Gage Plane
0,25
1 24
0°– 8°
A 0,75
0,50
Seating Plane
0,15
1,20 MAX 0,10
0,05
PINS **
48 56 64
DIM
4040078 / F 12/97
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