MCA Manual

MICROCONTROLLERS AND
APPLICATIONS
LABORATORY MANUAL
SEMESTER: VI
Department of Electronics and

Telecommunication Engineering
Ramrao Adik Institute of Technology,
Nerul, Navi Mumbai
INDEX
Sr. No. Contents Page No.
1. List of Experiments
2. Experiment Plan and Course Outcomes
3. Study and Evaluation Scheme
4. Experiment No. 1
5. Experiment No. 2
6. Experiment No. 3
7. Experiment No. 4
8. Experiment No. 5
9. Experiment No. 6
10. Experiment No. 7
14. Mini Project
15. Appendix I
16. Appendix II
17. Appendix III
18. Appendix IV
List of Experiments
Sr. No. Experiment Title
1 Architecture of 8051 microcontroller
2 To perform ALP in 8051 for-
a) Addition and Subtraction b) Multiplication and Division
3 To arrange n-numbers in ascending order using 8051
4 Generate a square wave using 8051
5 Interface 8051 with-
a) Light Emitting Diodes (LEDs) b) Seven Segment Display (SSD)
6 Data flow model of ARM7 microcontroller
7 To perform ALP in ARM7 for-
a) Addition and Subtraction b) Multiplication and Division
8 To find largest number from n-numbers using ARM7
9 Separate even and odd numbers from n-numbers using ARM7
10 Interface ARM7 with-
a) Light Emitting Diodes (LED) b) Buzzer
11 Mini Project
12 Appendix I
13 Appendix II
14 Appendix III
15 Appendix IV
Experiment Plan & Course Outcomes
Course Outcomes:
CO1 Demonstrate detail feature, data flow and software aspects of

microcontrollers
CO2 Apply and demonstrate the knowledge acquired from microcontroller by
performing the experiments in assembly language using IDE & KIT
CO3 Simulate &Implement the design of interface based programs for 8051
applications to analyze, interpret result &write appropriate conclusion
CO4 Develop the assembly language program to understand basic instruction
for ARM7 using simulator
CO5 Design &Implement ARM microcontrollers based system using
peripherals with embedded C programs for KIT
CO6 Enhance their report writing, oral, technical communication skills in MCA
laboratory course
Module Week Experiments Name ( / Aim) Course
No. Outcome
No.
1 W1 To study architecture of 8051 microcontroller CO1
2 W2 To perform ALP for- CO2
a) addition and subtraction of 8-bit numbers using

different addressing modes in 8051
b) multiplication and division of 8-bit numbers using

different addressing modes in 8051
3 W3 Write ALP to arrange n-numbers in ascending order CO2
stored at external memory location using 8051
4 W4 Write ALP to generate a square wave using timer and CO2
delay subroutine using 8051
5 W5 Interface 8051 with- CO3
a) LEDs to blink the LEDs
b) Seven Segments Display to display BCD values

6 W6 To study data flow model of ARM7 microcontroller CO1
7 W7 To perform ALP for- CO4
a) addition and subtraction in ARM7
b) multiplication and division in ARM7

8 W8 Write ALP to read data from memory and find largest CO4
number among them and store the result in memory
using ARM7
9 W9 Write ALP to read data from memory and separate even CO4
& odd numbers from them and store the result in
memory using ARM7
10 W10 Interface ARM7 with- CO5
a) LED to blink the LED
b) Buzzer to make a buzzing noise

11 W11 Mini Project CO6
Study and Evaluation Scheme
(From University of Mumbai)
Subject Subject Name Teaching Scheme Credits Assigned

Code
Theory Practical Tutorial Theory Practical Tutorial Total
Microcontrollers
ECL601 and Applications -- 02 -- -- 01 -- 01
Laboratory
Subject Subject Name Examination Scheme

Code Theory Marks Term Practical Oral Total
Internal assessment End Sem. Work and
Test Test Ave. Of Test Exam Oral
1 2 1 and Test 2
Microcontrollers
ECL601 and Applications -- -- -- -- 25 25 - 50
Laboratory
Term Work:
1. Term work assessment must be based on the overall performance of the student with
every experiment graded from time to time. The grades will be converted to marks as per
‘credit and grading’ System manual and should be added and averaged. Based on the
above scheme grading and term work assessment should be done
2. The final certification and acceptance of term work ensures satisfactory performance of
laboratory work and minimum passing marks in term work
Oral:
1. Practical and Oral exam will be based on the entire syllabus
Microcontrollers and Applications
Experiment No: 1
Architecture of 8051 Microcontroller

Experiment No. 1
1. Aim: To study architecture of 8051 Microcontroller
2. What you will learn by performing this experiment?
i) To learn the features of 8051

ii) To learn architecture of 8051
iii) To Learn pin diagram of 8051
3. Theory
Features:
• A Microcontroller is a complete computer system built on a single chip.

• It contains all components like Processor (CPU), RAM, ROM, Serial port, Parallel port,
Interrupt logic, Timer etc. on chip.
• A Microcontroller saves cost, saves power consumption and makes the circuit compact.
• 8051 is an 8-bit Microcontroller
• On-Chip ROM = 4 KB (Program Memory).
• On-Chip RAM = 128 Bytes (Data Memory).
• Four 8 bit bi-directional I/O ports.
• Serial Port.
• Two 16 bit Up-Counters (Timers).
• It supports interrupts with two-level priority.
• Power saving modes.
• It is used in appliances such as Washing Machines, Microwaves, Mobile Phones, and
MP3 Players etc.
8051 Architecture:
From the following diagram Fig 1.1, the system bus connects all the support devices to the
CPU. The system bus consists of an 8-bit data bus, a 16-bit address bus and bus control
signals. All other devices like program memory, ports, data memory, serial interface,
interrupt control, timers, and the CPU are all interfaced together through the system bus.
Fig 1.1: Architecture of 8051
The architecture consists of following components:
1. ALU
▪ 8-bit
▪ Performs all arithmetic and logical operations
▪ Updates status flags(PSW)
2. Memory
▪ Separate On-chip Data and Code memory
▪ Code Memory-Programs instructions (ROM-4KB)
▪ Data memory-various Data (RAM-128B)
▪ Few RAM locations used to program control
▪ various on-chip peripherals and features-SFRs
3. Peripherals
▪ 2, 16 bit Timers T0, T1
▪ SFRs- TCON, TMOD, T0, T1
▪ PINs-T0, T1
▪ 4, I/O ports P0, P1, P2, P3
▪ SFRs-P0, P1, P2, P3
▪ PINs-P0.0-P0.7, P1.0-P1.7, P2.0-P2.7, P3.0-P3.7
4. Serial Port
▪ SFRs-SCON, SBUF, PCON (1-bit)
▪ PINs-Rxd, Txd
5. Interrupts
▪ SFRs-IP, IE
▪ PINs-INT0, INT1 (H/W)
6. Timing and Control Unit
▪ Generate time and Control signal
▪ Necessary for Execution
▪ Synchronizes all activities with clock
7. Oscillator
▪ On-chip oscillator circuit – generates clock pulses.
▪ External resonant circuit connected (complete oscillator)
▪ Crystal Frequency=12Mhz
8051 Pin Diagram:
Fig 1.2: Pin diagram of 8051
Pin Description:
Port 0(p0.0 to p0.7): It is 8-bit bi-directional I/O port. It is bit/ byte addressable. During
external memory access, it functions as multiplexed data and low-order address bus AD0-
AD7.
Port 1 (p1.0 to p1.7): It is 8-bit bi-directional I/O port. It is bit/ byte addressable. When logic
'1' is written into port latch then it works as input mode. It functions as simply I/O port and it
does not have any alternative function.
Port 2 (p2.0 to p2.7): It is 8-bit bi-directional I/O port. It is bit/ byte addressable. During
external memory access it functions as higher order address bus (A8-A15).
Port 3(p3.0 to port 3.7): It is 8-bit I/O port. In an alternating function each pins can be used as
a special function I/O pin.
P3.0-RxD: It is an Input signal. Through this I/P signal microcontroller receives serial data of
serial communication circuit.
P3.1-TxD: It is O/P signal of serial port. Through this signal data is transmitted.
P3.2- (INT0): It is external hardware interrupt I/P signal. Through this user, programmer or
peripheral interrupts to microcontroller.
P3.3-(INT1): It is external hardware interrupt I/P signal. Through this user, programmer or
peripheral interrupts to microcontroller.
P3.4- T0: It is I/P signal to internal timer-0 circuit. External clock pulses can connect to
timer-0 through this I/P signal.
P3.5-T1: It is I/P signal to internal timer-1 circuit. External clock pulses can connect to timer-
1 through this I/P signal.
P3.6-WR#: It is active low write O/P control signal. During External RAM (Data memory)
access it is generated by microcontroller. When [WR (bar)] =0, then performs write
operation.
P3.7-RD#: It is active low read O/P control signal. During External RAM (Data memory)
access it is generated by microcontroller. When [RD (bar)] =0, then performs read operation
from external RAM.
XTAL1 and XTAL2: These are two I/P line for on-chip oscillator and clock generator circuit.
A resonant network as quartz crystal is connected between these two pin. 8051
microcontrollers also drive from external clock, then XTAL2 is used to drive 8051 from
external clock and XTAL1 should be grounded.
EA#/VPP: It is and active low I/P to 8051 microcontrollers. When (EA)= 0, then 8051
microcontroller access from external program memory (ROM) only. When (EA) = 1, then it
accesses internal and external program memories (ROMS).
PSEN#: It is active low O/P signal. It is used to enable external program memory (ROM).
When PSEN#= 0, then external program memory becomes enabled and microcontroller read
content of external memory location. Therefore, it is connected to (OE) of external ROM. It
is activated twice every external ROM memory cycle.
ALE: Address latch enable: It is active high O/P signal. When it goes high, external address
latch becomes enabling and lower address of external memory (RAM or ROM) latched into
it. Thus it separates A0-A7 address from AD0-AD7. It provides properly timed signal to
latch lower byte address. The ALE is activated twice in every machine cycle. If external
RAM & ROM is not accessed, then ALE is activated at constant rate of 1/6 oscillator
frequency, which can be used as a clock pulses for driving external devices.
RESET: It is active high I/P signal. It should be maintained high for at least two machine
cycle while oscillator is running then 8051 microcontroller resets.
NOTE: # stands for active low signal
4. Conclusion
Salient features, architecture and pin diagram of 8051 microcontrollers were studied in
detail
5. Quiz / Viva Questions:
a. Why 8051 is called 8-bit microcontroller?

b. What is the width of data bus?
c. List out the features of 8051 microcontrollers?
d. What are the various criteria to choose the microcontroller?
e. What is difference between microprocessor and microcontroller?
f. What are the various types of memories used in microcontroller?
g. Justify why crystal oscillator frequency in 8051 is chosen as 11.0592MHz?
h. List the Interrupt sources in 8051
i. What is the default priority of the interrupts in 8051?
j. What are the dedicated address pointers in 8051?
6. References:
a. M. A. Mazidi, J. G. Mazidi and R. D. Mckinlay, “The 8051 Microcontroller &

Embedded systems”, Pearson Publications, Second Edition 2006
b. C. Kenneth J. Ayala and D. V. Gadre, “The 8051 Microcontroller & Embedded
System using assembly & ‘C’”, Cengage Learning, Edition 2010
c. Satish Shah, “The 8051 Microcontrollers”, Oxford publication first edition 2010
d. Frank Vahid& tony Gavages “Embedded system design – A unified hardware /
Software introduction”, Wiley publication, Third edition 2002
e. 8051 Microcontroller-Internals, Instructions, Programming & Interfacing by Subrata
Ghoshal
Experiment No: 2 (A)
To perform addition and subtraction

using 8051
Experiment No. 2 (A)
1. Aim: To perform ALP for addition and subtraction of 8-bit numbers using different
addressing modes in 8051
i) To explore various instruction

ii) Learn how to access data using various Addressing modes i.e. Direct and Indirect
iii) How to write program in assembly language
iv) Learn how to implement programs on MumLab-51 Kit and MCU 8051 IDE
3. Apparatus Required
1. MumLab-51 Kit Intel 8051

2. Operating Frequency 12 MHz
4. Power Supply 5V
5. Pins 40
6 MCU 8051 IDE s/w Version 1.4.9
7. Keyboard
4. Theory
Instructions used to implement Addition and Subtraction program using Immediate, Direct
and Indirect addressing mode are:
i. MOV A,8-bit data: The MOV instruction moves data bytes between the two
specified operands. The byte specified by the second operand is copied to the
location specified by the first operand. The source data byte is not affected.
ii. MOV DPTR, 16-BIT ADDRESS: Move the 16-bit address of external memory
location to data pointer register. Data pointer registers can be initialized by
immediate data, thus 16-bit address to be used is loaded in DPTR.
iii. MOV A, @DPTR: Move content of memory location pointed by data pointer
having 16-bit direct address to A register.
iv. MOV @DPTR, A: Move content of A register to memory location pointed by data
pointer having 16-bit direct address.
v. ADD A, B: The ADD instruction adds a byte value to the accumulator and stores
the results back in the accumulator. The destination operand is always in register A
while the source operand can be a register, immediate data, or in memory. The
instruction could change any of the AF, CF, or P bits of flag register.
vi. SUBB A, B: In subtraction with borrow, the 8051 use the 2’s complement method.
There are two case for SUBB instruction; (1) with CY = 0, and (2) With CY = 1.
The SUBB instruction subtracts the specified byte variable and the carry flag from
the accumulator. The result is stored in the accumulator. This instruction sets the
carry flag if borrow is required for bit 7 of the result. If no borrow is required, the
carry flag is cleared.
vii. INC DPTR: The INC instruction increments the specified operand by 1. An original
value of FFh or FFFFh overflows to 00h or 0000h. No flags are affected by this
instruction. When this instruction is used to modify an output port, the value used as
the port data is read from the output data latch, not the input pins of the port.
viii. LJMP 16-BIT ADDRESS: LJMP is an unconditional long jump. It is 3-byte

instruction in which first byte is opcode, and the second and third bytes represent
the 16- bit address of the target location. The LJMP instruction transfers program
execution to the specified 16-bit address. The PC is loaded with the high-order and
low-order bytes of the address from the second and third bytes of this instruction
respectively. No flags are affected by this instruction. The program execution will
stop at this instruction
5. Algorithm
Immediate AM
Step1: Get first number in register A

Step2: Get second number in register B
Step3: Add/Subtract the two numbers
Step4: Check for carry
Step5: Result is stored in register A
Step6: Stop
Direct AM
Step1: Load register B and A with

contents from 30H and 31H
Step5: Move the result from A to the
memory location 32H
Step6: Stop
Indirect AM
Step1: Initialize DPTR with 9000H

Step2: Move the contents of location
pointed by DPTR into A register
Step3: Move the contents of A register
into B register
Step4: Increment the memory location
pointed by DPTR
Step5: Move the contents of location
pointed by DPTR into A register
Step9: Increment the memory location
pointed by DPTR
Step10: Move the result from A to the
location pointed by DPTR
Step10: Stop
6. Flow Chart
Start Start
Move First no. to A Take First no. from 30H to B
Move Second no. to B Take Second no. from 31H to A
M Add/Subtract content of A and B

Add/Subtract content of A and B
Store the result in A Store result in A & transfer to memory location 32H
Stop Stop
Fig 2.1: Flow chart for Immediate and Direct Addressing Mode
Start
Initialize DPTR to 9000H
Take First no. from 9000H to B and

Take Second no. from 9001H to A
Add/Subtract content of A and B
Store result in A & transfer to memory location 9002H
Stop
Fig 2.2: Flow chart for Indirect Addressing Mode

7. Procedure
Follow the procedure as given in Appendix I for MumLab-51 Kit and Appendix II for
MCU 8051 IDE
8. Observation Table
For Addition
Addition Register Address VALUE
INPUT B 9000H
Before execution
A 9001H
OUTPUT
After execution A 9002H
For Subtraction
Subtraction Register Address VALUE
INPUT B 9000H
Before execution
A 9001H
OUTPUT
After execution A 9002H
9. Result and Discussion

Addition and Subtraction of two 8-bit numbers was done using ADD and SUBB instruction
respectively and the result was stored in the register A and then shifted to memory location.
Following conclusion were made by adding and subtracting various numbers:
• if the results generate carry from addition or require borrow from subtraction it will
set carry flag
• if the result is out of range, OF will set to 1
• if result contains even no of 1s, PF sets to 1
10. Precautions
• Properly connect 8051 trainer kit with power supply terminals

• Do not keep the kit on for longer time
• Switch off the Kit after implementing the program
• Shut down MCU 8051 IDE properly
• Handle the trainer kit carefully
a. Are all the bits of flag register used in 8051?

b. Which bit of the flag register is set when output overflows to the sign bit?
c. Give example of bit address and byte address?
d. Internal RAM is located from address 0x00 to ___?
e. Tell the addresses which are bit addressable?
f. How Much on chip RAM is available?
12. References:
a. M. A. Mazidi, J. G. Mazidi and R. D. Mckinlay, “The 8051 Microcontroller

&Embedded systems”, Pearson Publications, Second Edition 2006.
System using assembly & ‘C’ ”, Cengage Learning, Edition 2010.
c. Satish Shah, “The 8051 Microcontrollers”, Oxford publication first edition 2010.
Software introduction”, Wiley publication, Third edition 2002.
e. Microcontroller-Internals, Instructions, Programming & Interfacing by Subrata
Ghoshal
Experiment No: 2 (B)
To perform multiplication and division

using 8051
Experiment No. 2 (B)
1. Aim: To perform ALP for multiplication and division of 8-bit numbers using different
addressing modes in 8051
i. To explore various instruction used for multiplication and division.

ii. Learn how to access data using various Addressing modes i.e. Direct and Indirect.
iii. How to write program in assembly language
iv. Learn how to implement programs on MumLab-51 Kit and MCU 8051 IDE

4. Power Supply 5V
5. Pins 40
7. Keyboard
4. Theory
Instructions used to implement Multiplication and Division program using Register, Direct
and Indirect addressing mode (repeated instructions in the previous Experiment are not
explained):
i. MUL AB: The MUL instruction multiplies the unsigned 8-bit integer in the
accumulator and the unsigned 8-bit integer in the B register producing a 16-bit
product. The low-order byte of the product is returned in the accumulator. The high-
order byte of the product is returned in the B register. The OV flag is set if the
product is greater than 255 (0FFh), otherwise it is cleared. The carry flag is always
cleared.
ii. DIV AB: The DIV instruction divides the unsigned 8-bit integer in the accumulator
by the unsigned 8-bit integer in register B. After the division, the quotient is stored in
the accumulator and the remainder is stored in the B register. The carry and OV flags
are cleared. If the B register begins with a value of 00h the division operation is
undefined, the values of the accumulator and B register are undefined after the
division, and the OV flag will be set indicating a division-by-zero error.
5. Algorithm
Immediate AM
Step1: Get first number in register A

Step2: Get second number in register B
Step3: Multiply/Divide the two numbers
Step4: Multiplication result lower 8 bits are stored in register A and higher 8 bits are
stored in register B/ Division result quotient in register A and remainder in register B
Step5: Stop
Direct AM
Step1: Load register B and A with contents from 30H and 31H
Step4: Move the result from A register to the memory location 32H and result from B
register to the memory location 33H
Step5: Stop
Indirect AM
Step1: Initialize DPTR with 9000H

Step2: Move the contents of location pointed by DPTR into A register
Step3: Move the contents of A register into B register
Step4: Increment the memory location pointed by DPTR
Step5: Move the contents of location pointed by DPTR into A register
Step8: Move the result from A register to the memory location 9002H and result from B
register to the memory location 9003H
Step9: Stop
6. Flow Chart
Start Start
Move Multiplicand to A / Dividend to A Move Multiplicand from 31H to A /

Dividend to A
Move multiplier to B/Divisor to B
Move multiplier from 30H to B/Divisor to B
Multiply A and B / Multiply A and B /

Divide A by B Divide A by B
Store the lower byte in A and upper byte in B Store the lower byte in A and upper byte in B
of the product /Quotient in A and Remainder of the product /Quotient in A and Remainder
in B to the destination in B to the destination
Move the content of A register to 32H and B

register to 33H
Stop Stop
Fig 2.3 :Multiplication/Division using Immediate AM and Direct AM

Start
Initialize DPTR to 9000H
Move Multiplicand from 9001H to A /

Dividend to A
Move multiplier from 9000H to B/Divisor

to B
Multiply A and B /
Divide A by B
Store the lower byte in A and upper byte in B

of the product /Quotient in A and Remainder
in B to the destination
Move the content of A register to 9002H and

B register to 9003H
Stop
Fig 2.4 :Multiplication/Division using Indirect Adressing Mode

7. Procedure
MCU 8051 IDE
For Multiplication
Multiplication Register Address VALUE
INPUT B 9000H
Before execution
A 9001H
OUTPUT A 9002H
After execution
B 9003H
For Division
Division Register Address VALUE
INPUT B 9000H
Before execution
A 9001H
OUTPUT A 9002H
After execution
B 9003H

Multiplication and Division of two 8-bit numbers was done using MUL and DIV
instruction respectively and the result was stored in the register A and B then shifted to
memory location. Following conclusion were made by multiplication and Division
various numbers:
• The multiplication of two 8-bit numbers will give 16-bit result, so the lower 8-bit are
stored in register A and higher 8-bit are stored in register B
• The division of two 8-bit numbers will give 16-bit result, so the lower 8-bit are stored
in register A and higher 8-bit are stored in register B
• if the results generate carry from multiplication/ division it will set carry flag
• if the result is out of range, OF will set to 1
• if result contains even no of 1s, PF sets to 1
10. Precautions

a. Are all the bits of flag register used in 8051?

b. Which bit of the flag register is set when output have even parity?
c. External RAM/ROM having 64Kb size is located from address 0000 to ___?
d. Internal ROM is located from address 000 to ___?
e. How much maximum external memory can be interfaced with 8051?
f. How Much on chip ROM is available?
12. References:

Ghoshal
Experiment No: 3
To arrange n-numbers in ascending order

using 8051
Experiment No. 3
1. Aim: Write ALP to arrange n-numbers in ascending order stored at external
memory location using 8051
i) To learn jump instructions of 8051 microcontrollers.

ii) Learn how to access data using various Addressing modes i.e. Direct and Indirect.

4. Power Supply 5V
5. Pins 40
7. Keyboard
4. Theory
Instructions used to arrange n-numbers in ascending order using different addressing modes
are:
i. LJMP: LJMP is an unconditional long jump. It is 3-byte instruction in which first
byte is opcode, and the second and third bytes represent the 16- bit address of the
target location. The LJMP instruction transfers program execution to the specified 16-
bit address. The PC is loaded with the high-order and low-order bytes of the address
from the second and third bytes of this instruction respectively. No flags are affected
by this instruction. The range of destination addresses is within whole memory
(64KB).
ii. AJMP: AJMP is an unconditional absolute jump. It is 2-byte instruction, the new
value for the Program Counter is calculated by replacing the least-significant-byte of
the Program Counter with the second byte of the AJMP instruction, and replacing bits
0-2 of the most-significant-byte of the Program Counter with 3 bits that indicate the
page of the byte following the AJMP instruction. Bits 3-7 of the most-significant-byte
of the Program Counter remain unchanged. Since only 11 bits of the Program Counter
are affected by AJMP, jumps may only be made to code located within the same 2k
block as the first byte that follows AJMP.
iii. SJMP: SJMP is an unconditional short jump. It is 2-byte instruction in which first
byte is opcode, and the second byte represent the 8- bit relative address. The address
is calculated by adding the signed relative offset in the second byte of the instruction
to the address of the following instruction. The range of destination addresses is from
128 before the next instruction to 127 bytes after the next instruction.
iv. CJNE: CJNE compares the value of operand1 and operand2 and branches to the
indicated relative address if operand1 and operand2 are not equal. If the two operands
are equal program flow continues with the instruction following the CJNE instruction.
v. JNC: JNC will branch to the address indicated by relative address if the Carry Bit is
not set. If the Carry Bit is set program execution continues with the instruction
following the JNC instruction. No flags are affected by this instruction
vi. JC: JC will branch to the address indicated by relative address if the Carry Bit is set.
If the Carry Bit is not set program execution continues with the instruction following
the JC instruction. No flags are affected by this instruction
vii. DJNZ: DJNZ decrements the value of register by 1. If the initial value of register is 0,
decrementing the value will cause it to reset to 255 (0xFF Hex). If the new value of
register is not 0 the program will branch to the address indicated by relative address.
If the new value of register is 0 program flow continues with the instruction following
the DJNZ instruction. When this instruction is used to modify an output port, the
value used as the port data is read from the output data latch, not the input pins of the
port.
5. Algorithm
Step 0: Initialize one counters for no. of iterations

Step1: Initialize Memory pointer and another counter for no. of values to be
Compared
Step2: Restore initial address of data pointer
Step3: Load data pointed by memory pointer and store two consecutive no’s in
Register A and B
Step4: compare A and B, if equal go to step 8 else step 5
Step5: if carry=0 go to step 8, else step 6
Step6: get back data pointer value stored in step 2
Step7: store A to initial address and B to next address
Step 8: Decrement Internal loop counter, if not equal to 0 go to step 2 else step
Step9: Decrement External loop counter, if not equal to 0 go to step 1 else step 10
Step10: Stop
6. Flowchart
START
Load count in two register R0(External Iteration), R1(Internal Iteration)
Initialize Data Pointer register
Get the LSB of pointer in one register
Copy contents from two consecutive locations from

data memory into A and B register
Y
Is
A =B?
N
N
Is
CY=1?
Get back LSB of data pointer, move ACC to pointed

address and B to next address
N
Is
R1=0?
R1=1? Y
N
Is
R0=0?
R0R0=
Y
1?
STOP
Fig 3.1 :Ascending order arrangement of n-numbers

7. Procedure
MCU 8051 IDE
Ascending order arrangement for 10-numbers
Data Address VALUE

INPUT 9000H
Before execution
9001H
9002H
9003H
9004H
9005H
9006H
9007H
9008H
9009H
INPUT 9000H
Before execution
9001H
9002H
9003H
9004H
9005H
9006H
9007H
9008H
9009H
Arrangement of ten random numbers in ascending order was done by using CJNE, JNC,
SJMP instructions and result is overwritten at the same location from where the input
data was taken.
• For ascending and descending order arrangement two counter are initialized.
• One counter is used for inner iterations and another is used for outer iterations.
• For ascending order arrangement JNC instruction will be used
• For descending order arrangement JC instruction will be used
10. Precautions

a. Explain JNC.
b. What is word length of 8086?
c. Which signal is used to separate address & data bus?
d. How many multiplexed lines are there in 8086?
e. What is maximum memory addressing capability of 8086?
f. What is maximum I/O addressing capability of 8086?
g. What are equivalent instructions to JZ & JNZ?
h. What is the jump range in 8051?
i. What are the different industrial applications of micro controllers?
12. References:

System using assembly & ‘C’”, Cengage Learning, Edition 2010.
Ghoshal
Experiment No: 4
Generate a square wave using 8051

Experiment No. 4
2. Aim: Write ALP to generate a square wave using timer and delay subroutine using 8051
i) To learn hardware delay using timer of 8051 microcontroller

ii) To learn software delay using timer of 8051 microcontroller

4. Power Supply 5V
5. Pins 40
6. DSO
7. MCU 8051 IDE s/w Version 1.4.9
8. Keyboard
4. Theory
8051 has two 16-bit programmable UP timers/counters. They can be configured to

operate either as timers or as event counters. The names of the two counters are T0 and
T1 respectively. The timer content is available in four 8-bit special function registers-
TL0, TH0, TL1 and TH1 respectively.
In the "timer" function mode, the counter is incremented in every machine cycle. Thus,
one can think of it as counting machine cycles. Hence the clock rate is (1/12) th of the
oscillator frequency. The operation of the timers/counters is controlled by two special
function registers, TMOD and TCON respectively.
Timer Mode Control Register (TMOD):

Various bits of TMOD are described as follows –
Gate: This is an OR Gate enabled bit which controls the effect of on START/STOP
of Timer. It is set to one ('1') by the program to enable the interrupt to start/stop the timer.
If TR1/0 in TCON is set and signal on pin is high then the timer starts counting
using either internal clock (timer mode) or external pulses (counter mode).
C/T: It is used for the selection of Counter/Timer mode.
M0, M1 (Mode Select Bits): M1 and M0 are mode select bits
Timer control Register (TCON):
The various bits of TCON are as follows-
TF1: Timer1 overflow flag. It is set when timer rolls from all 1s to 0s. It is cleared when
processor vectors to execute ISR located at address 001BH.
TR1: Timer1 run control bit. Set to1tostartthe timer / counter.
TF0: Timer0overflowflag. (SimilartoTF1)
TR0: Timer0 run control bit.
IE1: Interrupt1 edge flag. Set by hardware when an external interrupt edge is detected. It
is interrupt is processed
IE0: Interrupt0edgeflag.(SimilartoIE1)
IT1: Interrupt1 type control bit. Set/ cleared by software to specify falling edge / low
level triggered external interrupt.
IT0: Interrupt0 type control bit. (Similar to IT1)
We can generate by using-
(I) Hardware delay-using timer 0 / timer 1
(II) Software delay-using delay subroutine

Generate a square wave using S/W and H/W delay:
I. H/W delay generation:
Calculation for Count to be loaded:
Count to generate Delay = Delay / Timer clock
Where, Timer Clock = 1 / Timer clock Frequency
Timer Clock frequency = Crystal frequency/12
Example: Given Time delay t = 10ms => ton = 500µs, toff = 500µs
Assuming crystal frequency = 11.0592 MHz
Time Machine cycle = T = 1/ (f/12) = 12/f = 12/11.0592 = 1.085 µs
No of counts = ton = 500 / 1.085 = 461
Count to be loaded = Maximum count –desired count +1
= 65535 – 461 + 1
= (65075)10
Count to be loaded = (FE33)H
II. S/W delay generation:
S/W delay is generated using a single or a pair of register. For the delay to be
generated count is loaded in the register and decremented till it becomes zero. The
calculation of count depends on number of instructions in delay program. If count is
given delay generated can be calculated and if delay is given count required can be
calculated
Example: MOV R0, #20H-------1CYCLE
L1: MOV R1, #250-------1CYCLE
L2: DJNZ R1, L2----------2*250*20 CYCLES
DJNZ R0, L1----------2*20 CYCLES
Delay generated= 1+ 20 x ( ( 1 + ( 2 x 250 ) ) + 2 )= 10601 µs

5. Algorithm
I. H/W delay generation:
Step1: Set the TMOD register value according to the timer required and which
timer mode is to be used (Example: Set TMOD register value to 01H, Timer 0
Mode 1)
Step2: Move count lower byte to TL0 and Higher byte to THO
Step3: Start Timer by setting TR0 bit in TCON
Step4: Check TF flag for overflow
Step5: When the flag is raised stop the timer
Step6: Clear TR and TF bit
Step7: Complement the Port bit and call delay routine again
Step8: Loop back to step 2
II. S/W delay generation:

Step1: Set the particular pin from the port (Example: Set the port pin P0.1)
Step2: Using the ACALL instruction call the subroutine delay i.e. jump to step
number 6
Step3: Clear the particular pin from the port (Example: Clear the port pin P0.1)
Step4: Using the ACALL instruction call the subroutine delay again i.e. jump to
step number 6
Step5: Jump back to step no 1 and repeat following step
Step6: Initialize any register with count value (Example: R0 loads with (FF)H)
Step7: Keep decrementing content of register until it reaches 0
Step8: When value in register reaches zero the subroutine ends
6. Flowchart
Draw the flowchart for square wave generation using both hardware and software delay
generation (use algorithm to draw flowchart)
7. Procedure
MCU 8051 IDE

Generation of square wave was done by using two different methods. These methods
used for generating delay which is required for generating square wave. Using timer
SFRs (TMOD, TCON, TH0/TL0 or TH1/TL1) we can generate the delay which is a
hardware delay. Similarly, using the delay subroutine which is software delay used for
generating the square wave.
9. Precautions
• Properly connect 8051 trainer kit with power supply terminals and with DSO
• Do not keep the kit and DSO on for longer time
• Switch off the Kit and DSO after implementing the program
a. Explain TMOD in detail.

b. How many modes are there in timer?
c. Which are the different SFRs used in timer programming?
d. How to start and stop the timer?
e. What is the clock source for the timers?
f. What is the function of the TCON register?
g. What is the maximum delay that can be generated using delay subroutine with
. only one register?
11. References:

Ghoshal
Interface 8051 with LEDs

1. Aim: Interface 8051 with LEDs to blink the LEDs
i) To learn interfacing of LEDs with 8051

ii) To learn the common anode and common cathode configurations
iii) How to interface LEDs with common cathode configurations to 8051

4. Power Supply 5V
5. Pins 40
6. Breadboard
7. Connectors
8. LEDs
10. Keyboard
4. Theory
LED (Light Emitting Diode):
LED is a semiconductor device used in many electronic devices, mostly used for signal
transmission /power indication purposes. It is very cheaply and easily available in a
variety of shape, color, and size. The LEDs are also used for design message display
boards and traffic control signal lights etc.
It has two terminals positive and negative as shown in the figure.
Fig 5.1: LED Polarity

LED interfacing with 8051:
There are two ways which we can interface LED to the Microcontroller 8051. But the
connections and programming techniques will be different. Both methods are given in
figure.
Fig 5.2: Methods to interface LED with 8051
Observe carefully the interfacing with LED 2 (Right Side) is in forward biased because
the input voltage of 5V connected to the positive terminal of the LED, so here the
microcontroller pin should be at LOW level. And vice versa with the interfacing with
LED 1 (Left Side) connections.
The resistor is important in LED interfacing to limit the flowing current and avoid
damaging the LED and/or MCU.
Interface 1 will glow LED, only if the PIN value of the microcontroller is HIGH as
current flows towards the ground.
Interface 2 will glow LED, only if the PIN value of the microcontroller is LOW as
current flows towards PIN due to its lower potential.
Multiple LEDs interfacing with 8051:
There are two configurations which we can interface multiple LEDs to the
Microcontroller 8051. The configurations are- common cathode and common anode
configurations. All the LEDs are driven through resistors for limiting current. The
common cathode configurations for interfacing LEDs with 8051 is shown in following
figure.
Fig 5.3: Common cathode configurations to interface LED with 8051
In common cathode configurations, the anode terminal of LEDs is interfaced with 8051
with resistors and cathode terminal is grounded for all LEDs. For this configuration to
glow the LEDs from microcontroller pin should be at HIGH level.
In common anode configurations, the cathode terminal of LEDs is interfaced with 8051
and anode terminal is connected to 5V with resistors. For this configuration to glow the
LEDs from microcontroller pin should be at LOW level.
5. Algorithm
Step1: Select one port as output port

Step2: Initialize the accumulator with the value which will be transferred to port pins
Step3: Send the accumulator data to selected port
Step4: Stop
6. Flowchart
Draw the flowchart for LEDs interfacing with 8051 (use algorithm to draw flowchart)
7. Procedure
MCU 8051 IDE
Light Emitting Diodes or LEDs are the mostly commonly used output components in
many applications. They are made of semiconducting material. The LEDs are interfaced
with 8051 successfully to glow the desired pattern on LED and to get the output the port
programming is used.
9. Precautions

a. Which are the configurations used to interface LEDs with 8051?

b. What is the location of port 1 in RAM memory in 8051?
c. Explain the port structure of Port 1.
d. How to initialize the particular pin from the port as input pin?
e. How to initialize the particular port as output port?
f. Why there is a requirement to connect resistor between 8051 and LEDs?
g. Which logic is used to send data from 8051 to LEDs in common anode
configurations
11. References:

Ghoshal
Interface 8051 with SSD

1. Aim: Interface 8051 with seven segments display to display BCD values
i) To learn interfacing of SSD with 8051

ii) To learn the common anode and common cathode configurations
iii) How to interface SSD with common cathode configurations to 8051

4. Power Supply 5V
5. Pins 40
6. Breadboard
7. Connectors
8. SSD
10. Keyboard
4. Theory
SSD (Seven Segment Display):
A seven segment display module is an electronic device used to display digital numbers
and it is made up of seven LED segments. Because of the small size of the LEDs, it is
really easy for a number of them to be connected together to make a unit like seven
segment display. In the seven segment display module, seven LED s are arranged in a
rectangle. Sometimes, an additional LED is seen in a seven segment display unit which is
meant for displaying a decimal point.
Each LED segment has one of its pins brought out of the rectangular package. Other pins
are connected together to a common terminal. Seven segment displays can only display 0
to 9 numbers. These seven LEDs indicate seven segments of the numbers and a dot point.
Seven segment displays are seen associated with a great number of devices such as
clocks, digital home appliances, signal boards on roads etc.
Fig 5.4: Seven Segment Display
Types of seven segment displays:
Seven segment displays come up with two different configurations. They are the common
anode and a common cathode. One pin each from each segment is connected to a
common terminal. According to the pins which are connected to the common terminal,
the seven segment display is categorized as a common anode and common cathode.
Common Cathode 7-segment display
As the name indicates, its cathode is connected to a common terminal. Below is the
schematic diagram to indicate its common cathode structure. It should be connected to
the ground while operating the display. If a high voltage is given to the anode, then it will
turn on the corresponding segment.
Common Anode 7-segment display
In this type, the anode is common. It should be connected to a high voltage (to the supply
through a resistor to limit current). In order to turn on a particular segment, a ground level
voltage is given to the corresponding pin. Since logic circuits can sink more current than
they can source, common anode connection is used most widely.
Display codes:
Display codes are the voltages to be applied to the segments to display a number. It is in
the order of segments ABCDEFG(DP), total 8 bits. Below is a table with display codes of
all the digits with decimal point OFF.
If number 0 has to be displayed, then the segments A through F are turned on. In order to
turn on the segments, in common cathode mode, the anode terminals are subjected to a
high voltage while in common anode mode, the cathode terminals are given a low
voltage.
SSD interfacing with 8051:
There are two configurations which we can interface SSD to the Microcontroller 8051.
The configurations are- common cathode and common anode configurations. The
common cathode configurations for interfacing SSD with 8051 is shown in following
figure.
Fig 5.5: Common cathode configurations to interface SSD with 8051
In common cathode configurations to glow the SSD from microcontroller, pin should be
at HIGH level and in common anode configurations to glow the SSD from
microcontroller, pin should be at LOW level. The common terminals of SSD are
connected to 5V or GND according to the configurations.
5. Algorithm
Step1: Select one port as output port

Step2: Initialize the accumulator with the value which will be the hex value with
common cathode configuration of selected BCD number and transferred to port pins
Step3: Send the accumulator data to selected port
Step4: Stop
6. Flowchart
Draw the flowchart for SSD interfacing with 8051 (use algorithm to draw flowchart)
7. Procedure
MCU 8051 IDE
A seven segment display module is an electronic device used to display digital numbers
(BCD numbers) and it is made up of eight LED segments. The SSD is interfaced with
8051 successfully to display the BCD numbers continuously and to get the output the port
programming is used.
9. Precautions

a. Which are the configurations used to interface SSD with 8051?

b. What is the location of port 1 in RAM memory in 8051?
c. Explain the port structure of Port 1.
d. How to initialize the particular pin from the port as input pin?
e. How to initialize the particular port as output port?
f. Which value should be send on port to display “5” on SSD in common cathode
configurations
11. References:

Ghoshal
Experiment No: 6
Data Flow Model of ARM7

Microcontroller
Experiment No. 6
1. Aim: To study data flow model of ARM7 Microcontroller
i) To learn the features of ARM7

ii) To learn data flow model of ARM7
iii) To learn Block diagram and Register structure of ARM7
3. Theory
Features:
▪ 32-bit Processor
▪ 40Mhz-60Mhz
▪ Modified RISC (code density, reduce complexity, low consumption) technology
▪ Enhanced Power Saving Design
▪ Core surrounded by Caches, Memory and peripherals
▪ Pipelining
▪ Large Register set
▪ Simple Addressing modes
▪ auto increment and decrement addressing mode
▪ Load-Store Architecture /Register to register
▪ Incorporates some CISC ideas (variable cycle execution)
▪ Add Barrel Shifter (expand capability)
▪ Conditionally executing instruction
▪ Thumb Instruction –16 bit
▪ DSP Instruction
▪ OS Manages Application task
Nomenclature ARM7 Family:
ARM: Advance RISC Machine

7: Family of the ARMv4
T: Supports both ARM (32-bit) and Thumb (16-bit) instruction sets
D: Contains Advance Debug extensions
M: Enhanced (relative to earlier ARM cores) 32x8 Multiplier block
I: Embedded ICE macrocell, JTAG (Joint Test Action Group)
S: Synthesizable (that is, distributed as RTL rather than a hardened layout)
E: Enhanced DSP instruction set support
J: Java bytecode execution support
Data flow model of ARM7:
When an instruction is decoded inside the ARM core and how a particular instruction is
executed by interacting with the internal registers file and then send result out of the registers
Fig 6.1: Data Flow Model of ARM7
1. It is Von Neuman architecture, hence data coming through bus is either instruction or data
(same memory).
2. The Sign extend hardware converts signed 8-bit & 16-bit numbers to 32-bit values as they
are read from memory & placed in a register (for signed values), fill zeros if unsigned.
3. Source operands (Rn & Rm) are read from the register file using the internal buses A & B
respectively & result Rd is written back.
4. The PC value is in the address register which is fed in to the incremented, then the
incremented value is copied back in to r15.
5. It is also written in to address register to be used as the address for the next instruction
fetch.
6. ALU (The Arithmetic & logic Unit) or MAC (multiply & accumulate Unit) takes the
register values Rn & Rm from A & B buses & computers a result).
7. Data processing instructions write the result in Rd directly to the register file.
8. Load & Store instruction use the ALU to generate on Address to be to be held in the
address register & broadcast on the address bus.
9. Barrel shifter: One important feature of the is that register Rm alternatively can be
preprocessed in barrel in barrel shifter before it enters the ALU [left shift, right shift, rotated
etc.]. Depending on the instruction Barrel Shifter may be used or it could be short circuit.
10. Barrel shifter & ALU can calculate together a wide range of expression & address in the
same cycle.
Register set of ARM7:
The ARM register set contains 16 directly-accessible registers in user mode (non-privileged
mode), r0 to r15. An additional register, the Current Program Status Register (CPSR),
contains condition code flags, and the current mode bits. Registers r0 to r13 are general-
purpose registers used to hold either data or address values.
In privileged modes, another register, the Saved Program Status Register (SPSR), is
accessible. This contains the condition code flags, and the mode bits saved as a result of the
exception that caused entry to the current mode.
Fig 6.2 Register set of ARM7

1. In total 17(Visible)+20(Banked Registers) =37
2. The active registers available in the user mode are R0-R15 and CPSR
3. 16 Data registers & one status register are available in user mode
4. R0 to R13 are orthogonal general purpose register. Orthogonal means, any instruction that
you can apply to ro can equally be applied to any of the other register.
5. R13 (stack pointer) and stores the top of the stack in the current processor mode.
6. R14(LR) Link Register where the core puts the return address on executing a subroutine.
7. R15(PC) Program counter stores the address of next instruction to be executed.
8. In ARM state all ARM instruction are 32-bits wide.
9. In Thumb state all instructions are 16-bit wide.
10. In ARM state Instruction have to be four byte aligned in the memory.
Current Processor Status Register (CPSR):
ARM core uses CPSR to monitor & control internal operations. The unused part reserved for
future expansion. CPSR fields is divided in to four fields, each 8-bits wide: flags, status,
extension, and control.
N- Negative MSB=1; Indicates the result of operation is NEGATIVE
Z- Zero The result of operation is zero
C- Carry The result causes an unsigned carry(carry out of MSB)
V-Overflow The result causes a signed overflow
Q- Saturation The result causes an overflow or saturation
I- Interrupt request Disable If set interrupt request channel is disabled
F- Fast interrupt request Disable If set fast interrupt request channel is disabled
J- Jazelle instruction set If set processor will execute Jazelle instructions
T-Thumb instruction set If set processor will execute Thumb Instruction set
4. Conclusion
Salient features, data flow model and register set of ARM7 microcontrollers were studied
in detail
a. What are various modes of ARM7 microcontroller?

b. Explain Data sizes and instruction sets of ARM7 microcontroller?
c. What are the types of CORTEX-M series?
d. What is privileged mode and non-privileged mode in ARM7 microcontroller?
e. Tell about the Exception Handling in ARM7 microcontroller?
f. Explain CPSR in detail.
6. References:
a. M. A. Mazidi, J. G. Mazidi and R. D. Mckinlay, “The 8051 Microcontroller &

Embedded systems”, Pearson Publications, Second Edition 2006
System using assembly & ‘C’”, Cengage Learning, Edition 2010
c. Satish Shah, “The 8051 Microcontrollers”, Oxford publication first edition 2010
Software introduction”, Wiley publication, Third edition 2002
e. 8051 Microcontroller-Internals, Instructions, Programming & Interfacing by
Subrata Ghoshal
To perform addition and subtraction

using ARM7
1. Aim: To perform ALP for addition and subtraction of 32-bit numbers in ARM7
i) To explore load-store instruction

ii) Learn how to access data using load and store instructions
iv) Learn how to implement programs in Keil IDE
1. Keil IDE s/w Version 5

2. Keyboard
4. Theory
ARM architecture incorporate a number of features inherits from RISC design. It has
Load and Store Architecture. It has fixed length 32-bit instructions. Various Blocks are
used in the process of performing Arithmetic or logical operation.
i. MOV: This instruction is used to move the content from one address to another
E.g. MOV r0, r1 // which will load content of r1 to r0
ii. LDR: This instruction is used to load the content from memory to register
E.g. LDR r0, [ r1] // which will load content from r1 address to r0
iii. STR: This instruction is used to store the content from register to memory
E.g. STR r0, [r1] // which will store content of r0 to r1 address
iv. ADD: It adds the content of two operands and result will be stored in destination
register
E.g. ADD r1, r2, r3 // r1=r2+r3
v. ADDS: It adds the content of two operands and result will be stored in destination
register and status is updated
E.g. ADD r1, r2, r3 // r1=r2+r3, result status is updated in CPSR
vi. ADC: This instruction is asked to add contents of two registers with carry bit, in
order to add number greater than 32-bit
E.g. ADC r1, r2, r3 // it adds upper 32 bits and carry of LSB addition.
vii. SUB: It subtracts the content of two operands and result will be stored in
destination register
E.g. SUB r1, r2, r3 // r1=r2-r3
viii. SUBS: It subtracts the content of two operands and result will be stored in
destination register and status is updated
E.g. ADD r1, r2, r3 // r1=r2-r3, result status is updated in CPSR
ix. SBC: This instruction subtracts the two operands taking carry into account and save
result in destination register
E.g. SBC r1, r2, r3 // it subtracts r3 and 1 from r2 and store the result to r1
5. Algorithm
Addition
Step1: Load content from memory into

register R2
Step2: Load another content from
memory into register R3
Step3: Call addition function
Step5: Add contents of R2 and R3 and
store result in R1
Step6: Stop
Subtraction

register R2
Step3: Call subtraction function
Step5: Subtract contents of R3 from R2
and store result in R1
Step6: Stop
6. Flow Chart
Start
Start
Load data from memory

Load data from memory to Register R2 and R3
to Register R2 and R3 M
M
Sub R3 from R2 content
Add R2 and R3 contents
R1 R2 - R3; Store result at memory

R1 R2 + R3; Store result at memory
Stop
Stop
Fig 7.1: Flow chart for addition and subtraction operation in ARM7
7. Procedure
Follow the procedure as given in Appendix III Keil IDE
For Addition

INPUT R2 0x40000000
Before execution
R3 0x40000004
OUTPUT R1 0x40000008
After execution
For Subtraction

INPUT R2 0x40000000
Before execution
R3 0x40000004
After execution

Addition and Subtraction of two 32-bit numbers was done using ADD/ADDS/ADC and
SUB/SUBS/SBC instruction respectively and the result was stored in the register R1 and then
shifted to memory location. Following conclusion were made by adding and subtracting
various numbers:
• if the results generate carry from addition or require borrow from subtraction it will
set carry flag
• if ADC instruction is called then the result will add operand 2 and carry bit to operand
1, then store the result to destination register
• if SBC instruction is called then the result will subtract operand 2, carry bit and 1
from operand 1, then store the result to destination register
10. Precautions
• Shut down Keil IDE properly after executing the program

• Power off the PC
a. What is r13 often used to store?

b. What registers are used to store the program counter and link register?
c. Which mode, or modes has the fewest available number of registers available?
d. In user mode how many registers are available for user?
e. To update CPSR status, which modification should be done with instruction?
12. References:

Ghoshal
To perform multiplication and division

using ARM7
1. Aim: To perform ALP for multiplication and division of 32-bit numbers in ARM7
i) To explore load-store instruction

ii) Learn how to access data using load and store instructions
iv) Learn how to implement programs in Keil IDE

2. Keyboard
4. Theory
ARM architecture incorporate a number of features inherits from RISC design. It has
Load and Store Architecture. It has fixed length 32-bit instructions. Instructions used to
implement multiplication and division (repeated instructions in the previous Experiment
are not explained) are:
i. MUL: It multiply the content of two operands and result will be stored in
destination register
E.g. MUL r1, r2, r3 // r1=r2 x r3
ii. UMULL: It multiply the content of two operands and result will be stored in two
destination register, one register will store lower 32-bit result and another register is
will store higher 32-bit result
E.g. UMULL r0, r1, r2, r3 // r2 x r3 = r0 (lower 32-bit) & r1 (higher 32-bit)
iii. MLA: It multiply the content of two operands and result is added with the another
operand and places the least significant 32 bits of the result at destination register
E.g. MLA r0, r1, r2, r3 // r0 = (r1 x r2) + r3
iv. LSR: Logical Shift Right instruction is a preferred synonym for MOV instructions
with shifted register operands. It provides the unsigned value of a register divided
by a variable power of two, inserting zeros into the vacated bit positions. (As there
is no separate instruction for division operation in ARM7)
E.g. MOV r1, r0, LSR#2 // r1 = r0 / (2^2)
5. Algorithm
Multiplication

register R2
Step3: Call multiplication function
Step5: Multiply contents of R2 and R3
and store result in R0 and R1
Step6: Stop
Multiply and Accumulate

register R1
Step4: Call MLA function
Step6: Multiply contents of R1 and R2
and add the content of R3 in it and store
result in R0
Step7: Stop
Division

register R0
Step2: Logically shift bit towards right by
N to divide by 2N
Step3: Call LSR function
Step4: Register R0 divided by a N
variable power of two and store result in
R1
Step5: Stop
6. Flow Chart
Start Start
Load data from memory Load data from memory

to Register R2 and R3 to Register R1, R2 and R3
Long Multiply R2 and R3 Multiply R1, R2 and Add R3
R0,R1 R2xR3; Store result at memory R0 R1xR2+R3; Store result at memory
Stop Stop
Fig 7.1: Flow chart for Multiplication and Multiply and Accumulate operation in ARM7
Start
Load data from memory

to Register R0
Logically shift bit towards R
R1 R0/(2^N); N-bit shift to divide R0/2N
Stop
Fig 7.2: Flow chart for Division operation in ARM7

7. Procedure
For Multiplication

INPUT R2 0x40000000
Before execution
R3 0x40000004
After execution
R1 0x4000000C
For Multiply and Accumulate

INPUT R1 0x40000000
Before execution
R2 0x40000004
R3 0x40000008
OUTPUT R0 0x4000000C
After execution
For Division

INPUT R0 0x40000000
Before execution
( N= ___ )
After execution
Multiplication and Division of two 32-bit numbers was done using UMULL/MLA and LSR
instruction respectively and the result was stored in the destination register and then shifted
to memory location. Following conclusion were made by multiplying and dividing various
numbers:
• for long multiplication we have UMULL instruction i.e. unsigned long multiplication
and result is of 64-bits, if we multiply two 32-bit numbers then we get 64-bit result so
by using UMULL instruction we get lower 32-bit result in one register and higher 32-
bit result in other register
• for multiplication and addition, we have MLA instruction and it first multiplies the
values from the registers, adds the value from another register, and places the least
significant 32 bits of the result in destination register
• for division there is no separate instruction in ARM7 so we use logical shift right
instruction with shifted register operands. It provides the unsigned value of a register
divided by a variable power of two and result in destination register
10. Precautions

a. What is barrel shifter?

b. What are the operations provided by barrel shifter?
c. Which instruction is used to perform division operation in ARM7?
d. Relation between CPSR flags, S Suffix & Comparison Instructions?
e. Which are the status flags in CPSR?
12. References:

Ghoshal
Experiment No: 8
To find largest number from n-numbers

using ARM7
Experiment No. 8
1. Aim: Write ALP to read data from memory and find largest number among them and
store the result in memory using ARM7
i) To learn conditional branch instruction of ARM7 microcontrollers

ii) How to write program in assembly language
iii) Learn how to implement programs in Keil IDE

2. Keyboard
4. Theory
Instructions used to find the largest number from n-numbers from memory locations are:
i. CMP: Comparison instruction subtracts the value of Operand2 from the value in Rn.
This is the same as a SUBS instruction, except that the result is discarded, this
instruction update the N, Z, C and V flags according to the result
E.g. CMP r1, r2 // (r1 - r2) = only status flag updated
ii. B: Branch instruction cause the program counter to point to a new address which is
specified after B, thus the program continues at the instruction thus pointed to.
Branch instruction is equivalent to the JMP instruction and this instruction does not
change the flags
E.g. B loop1 // PC is loaded with address of loop1
iii. BHI: This is a conditional branch instruction. This instruction performs unsigned
comparison and gave higher number. If status of carry flag is set and zero flag is
clear, then the condition for branch satisfies and it causes PC to point to a new
address which is specified after BHI
E.g. BHI loop1 // PC is loaded with address of loop1 if C=1 and Z=0
iv. BNE: This is a conditional branch instruction. This instruction performs comparison
of two operands and result is not equal or non-zero result. If status of zero flag is
clear, then the condition for branch satisfies and it causes PC to point to a new
address which is specified after BNE
E.g. BNE loop1 // PC is loaded with address of loop1 if Z=0
5. Algorithm
Step1: Load the count value in register R5

Step2: Initialize R1 pointing the input data from memory location
Step3: Initialize R2 pointing the output to memory location
Step4: Get the data from memory location into register R3
Step5: Get another data from next memory location into register R4
Step6: Compare the data of register R3 and R4
Step7: If carry=1 go to step 9, else step 8
Step8: Move the content of register R4 into register R3
Step9: Check for the count value (R5) for the zero, if not zero go to step 5
Step10: Store the content of register R3 into memory location pointed by register R2
Step11: Stop
6. Flow Chart
START
Load count in one register R5
Initialize R1 pointing input data from memory and R2

pointing output to memory
Get data from memory into register R3
Get another data from next memory locations into

register R4
Compare the data of register R3 Yand register R4
Y
Is
CY=1?
Move the content of register R4 into register R3

(R3 will contain the largest number)
N
Is
R5=0?
R1=1? Y
N
Store the content of register R3 into memory location
pointed by register R2
STOP
Fig 8.1: Flow chart for finding largest number from n-numbers
7. Procedure
Finding largest number from 10-numbers
Data Address VALUE
INPUT 0x40000000
0x40000004
0x40000008
0x4000000C
0x4000000F
0x40000010
0x40000014
0x4000001C
0x4000001F
0x40000020
OUTPUT 0x40000030

Branch instruction is a conditional instruction in ARM7, this instruction is equivalent to the
JMP instruction of 8051 with additional fields of checking condition and if condition satisfy
then program counter points to a new address which is specified after B. For finding the
largest number from the given n-numbers BHI instruction gives the result similarly for
finding the lowest number BLO instruction gives the result without changing the code.
10. Precautions

a. How does the ARM branch instruction address work?

b. What is the difference between B and BL instruction?
c. Explain the conditional branch instruction in detail?
d. Which flag bits from CPSR are used for defining the conditional field?
e. What is Conditional Execution in ARM?
12. References:

Ghoshal
Experiment No: 9
Separate even and odd numbers from n-

numbers using ARM7
Experiment No. 9
1. Aim: Write ALP to read data from memory and separate even & odd numbers from them
and store the result in memory using ARM7
i) To learn conditional branch instruction of ARM7 microcontrollers

ii) How to write program in assembly language
iii) Learn how to implement programs in Keil IDE

2. Keyboard
4. Theory
Instructions used to separate even & odd numbers from n-numbers which are stored at
memory locations (repeated instructions in the previous Experiment are not explained) are:
i. ROR: It provides the value of the contents of a register rotated by a value. The bits
that are rotated off the right end are inserted into the vacated bit positions on the
left. ROR can only be used with a register-controlled shift.
E.g. MOV R1, R0, ROR #1 // Rotate R0 to right by 1 bit and store result at R1
ii. BCS: This conditional instruction performs comparison between two operands and
update the result of status flags in CPSR. If status of carry flag is set means
arithmetic operation gave carry out, then the condition for branch satisfies and it
causes PC to point to a new address which is specified after BCS
E.g. BCS loop1 // PC is loaded with address of loop1 if C=1
5. Algorithm
Step1: Load the count value in register R8

Step2: Initialize R5 pointing the input data from memory location
Step3: Initialize R6 pointing the odd numbers at memory location
Step4: Initialize R7 pointing the even numbers at memory location
Step5: Get the data from memory location into register R0 and increment pointer
Step6: Rotate the data of R0 to the right by 1 bit and store the result in R1
Step7: Compare the data of register R0 and R1
Step8: If carry=1 go to step 10, else step 9
Step9: Move the content of register R0 to memory pointed by register R7
Step10: Move the content of register R0 to memory pointed by register R6
Step11: Check for the count value (R8) for the zero, if not zero go to step 5
Step12: Stop
6. Flow Chart
START
Load count in one register R8
Initialize R5 pointing input data from memory and R6 pointing

odd numbers & R7 pointing even numbers at memory
Get data from memory into register R0 & increment the pointer
Rotate the data of R0 to the right by 1 bit and store the result in R1
Compare the data of register R0 and register R1
Y
Is
CY=1?
Move the content of register R0 to memory pointed by register R7

(R0 is an even number)
Move the content of register R0 to memory pointed by register R6

(R0 is an odd number)
Get another data from next memory locations until

register R8 becomes zero
Fig 9.1: Flow chart for separating even

and odd numbers from n-numbers STOP
7. Procedure
Seperating even and odd numbers from 10-numbers
Data ADDRESS VALUE Data ADDRESS VALUE
INPUT 0x40000000 OUTPUT 0x40000030

(ODD NO.)
0x40000004 0x40000034
0x40000008 0x40000038
0x4000000C 0x4000003C
0x4000000F 0x40000040
0x40000010
OUTPUT 0x40000050
0x40000014 (EVEN NO.)
0x40000054
0x4000001C
0x40000058
0x4000001F
0x4000005C
0x40000020
0x40000060

Branch instruction is a conditional instruction in ARM7, this instruction is equivalent to the
JMP instruction of 8051 with additional fields of checking condition and if condition satisfy
then program counter points to a new address which is specified after B. For sorting the even
and odd numbers from the given n-numbers BCS instruction gives the result.
10. Precautions

a. Which are the operations performed by barrel shifter?

b. Explain the ROR operation in detail.
c. Which flag bit is considered for BCS conditional instruction?
d. What is the difference between branch and branch with link instruction?
e. What is the size of offset address in branch instruction?
12. References:

Ghoshal
Interface ARM7 with LED

1. Aim: Interface ARM7 with LED to blink the LED
i) To learn interfacing of LED with LPC2148 Microcontroller

ii) How to write program in embedded C programming for ARM7 microcontrollers
iii) Learn how to program LPC2148 using Flash Magic
1. LPC2148 ARM Kit

3. Flash Magic Programming s/w Version 11.20
4. Keyboard
4. Theory
LPC2148:
LPC2148 is a 32-bit Microcontroller based on the ARM7TDMI-S Family. It is

manufactured by NXP Semiconductors (formerly Philips) and is one of the widely used
and highly successful ARM7 based Microcontroller.
GPIO Ports of LPC2148:
General Purpose Input Output (GPIO) pins of a microcontroller are the first thing we
need to learn before starting its embedded programming as input/output pins are the only
way to interface with the microcontroller. GPIO pins can be used for driving loads,
reading digital and analog signal, controlling external components, generating triggers for
external devices etc.
LPC2148 has two IO ports namely PORT0 (P0) and PORT1 (P1). These two IO ports are
of 32-bit wide and are provided by the 64 pins of the microcontroller. The naming
convention of the I/O pins on the LPC2148 Microcontroller is Pa.bc where ‘a’ is the
number of the port i.e. 0 or 1 (as LPC2148 has only two ports) and ‘bc’ is the number of
the pin in the port a. For example, P0.1 indicates pin number 1 of PORT0 and P1.10
indicates pin number 10 of PORT1.
(A) PORT0 is a 32-bit wide input/output port with dedicated direction control bits for
each physical pin. Out of the 32 pins, 28 pins can be used as general purpose bidirectional
I/O pins. Pin P0.31 is an output only pin. Pins P0.24, P0.26 and P0.27 of PORT0 are not
available.
(B) PORT1 is also a 32-bit wide input/output port. In PORT1, pins P1.0 to P1.15 are not
available and pins P1.16 to P1.31 are the available general purpose input/output pins.
Most of the pins in both the I/O ports of the LPC2148 have more than one function i.e.
they are multiplexed with different functions. The default function of all the Pins is
GPIO. At any point of operation, each pin can have a single function and the function can
be selected with the help of three Configuration Registers which control the multiplexers
to allow connection between the external pin and the on-chip peripheral.
The configuration register is called PINSEL and is classified in to three registers:

PINSEL0, PINSEL1 and PINSEL2. These configuration registers are of 32-bit wide. Any
pin on the LPC2148 can have a maximum of 4 functions. Hence in order to select one of
the four functions, two corresponding bits of the PINSEL register are needed. So, a 32-bit
PINSEL register can control 16 pins with 2-bits to control each pin. PINSEL0 controls
PORT0 pins P0.0 to P0.15, PINSEL1 controls PORT0 pins P0.16 to P0.31 and PINSEL2
controls PORT1 pins P1.16 to P1.31.
GPIO function is the most frequently used functionality of the microcontroller. The GPIO
function in both the Ports are controlled by a set of 4 registers: IOPIN, IODIR, IOSET
and IOCLR.
(A) IOPIN: It is a GPIO Port Pin Value register and can be used to read or write values
directly to the pin. The status of the Pins that are configured as GPIO can always be read
from this register irrespective of the direction set on the pin (Input or Output).
The syntax for this register is IOxPIN, where ‘x’ is the port number i.e. IO0PIN for
PORT0 and IO1PIN for PORT1.
(B) IODIR: It is a GPIO Port Direction Control register and is used to set the direction
i.e. either input or output of individual pins. When a bit in this register is set to ‘0’, the
corresponding pin in the microcontroller is configured as Input. Similarly, when a bit is
set as ‘1’, the corresponding pin is configured as Output.
The syntax for this register is IOxDIR, where ‘x’ is the port number i.e. IO0DIR for
PORT0 and IO1DIR for PORT1.
(C) IOSET: It is a GPIO Port Output Set Register and can be used to set the value of a
GPIO pin that is configured as output to High (Logic 1). When a bit in the IOSET register
is set to ‘1’, the corresponding pin is set to Logic 1. Setting a bit ‘0’ in this register has no
effect on the pin.
The syntax for this register is IOxSET, where ‘x’ is the port number i.e. IO0SET for
PORT0 and IO1SET for PORT1.
(D) IOCLR: It is a GPIO Port Output Clear Register and can be used to set the value of a
GPIO pin that is configured as output to Low (Logic 0). When a bit in the IOCLR register
is set to ‘1’, the corresponding pin in the respective Port is set to Logic 0 and at the same
time clears the corresponding bit in the IOSET register. Setting ‘0’ in the IOCLR has no
effect on the pin.
The syntax for this register is IOxCLR, where ‘x’ is the port number i.e. IO0CLR for
PORT0 and IO1CLR for PORT1.
LED (Light Emitting Diode):
LED is a semiconductor device used in many electronic devices, mostly used for signal
transmission /power indication purposes. It is very cheaply and easily available in a
variety of shape, color, and size. The LEDs are also used for design message display
boards and traffic control signal lights etc. It has two terminals positive and negative as
shown in the figure.
Fig 10.1: LED Polarity
LED interfacing with LPC2148:
Figure 10.2 shows the LED interfacing with LPC 2148. When P0.21 is at High (+5v)
status, then LED will glow and when P0.21 is at Low (0v) status, then LED will not
glow.
Fig 10.2: LED interfacing with LPC 2148

5. Algorithm
Step1: Include the library of LPC2148

Step2: Initialize the subroutine functions which are used in program
Step3: Initialize LPC2148 pins as GPIO pins
Step4: Define port pins as output pins
Step5: Set the value of a GPIO pin that is configured as output to High
Step6: Call delay subroutine function (step 10)
Step7: Set the value of a GPIO pin that is configured as output to Low
Step9: Go to step 5
Step10: Delay subroutine program
Step11: Return to main program
Step12: Stop
6. Flow Chart
Draw the flowchart for LED interfacing with LPC2148 (use algorithm to draw flowchart)
7. Procedure
Follow the procedure as given in Appendix IV for VSOFT LPC2148 Kit and Appendix
III for Keil IDE and Appendix V for Flash Magic
Light Emitting Diodes or LEDs are the mostly commonly used output components in
many applications. They are made of semiconducting material. The LEDs are interfaced
with LPC2148 successfully to blink LED and to get the output the GPIO programming is
used.
9. Precautions
• Properly connect LPC2148 trainer kit with power supply terminals

• Close Flash Magic Programming s/w after program the microcontroller IC
a. Explain the features of LPC2148

b. What is the function of GPIO pins in LPC2148?
c. How many GPIO ports are available in LPC2148?
d. How many GPIO port pins are available in LPC2148 to interface I/O devices?
e. Which configuration register is used for accessing GPIO pin P0.21?
11. References:

Ghoshal
Interface ARM7 with Buzzer

1. Aim: Interface ARM7 with Buzzer to make a buzzing noise
i) To learn interfacing of Buzzer with LPC2148 Microcontroller

ii) How to write program in embedded C programming for ARM7 microcontrollers
iii) Learn how to program LPC2148 using Flash Magic
1. LPC2148 ARM Kit

3. Flash Magic Programming s/w Version 11.20
4. Keyboard
4. Theory
Buzzer:
Buzzer is an electrical device, which is similar to a bell that makes a buzzing noise and is
used for signaling. Typical uses of buzzers and beepers include alarm devices, timers and
confirmation of user input such as a mouse click or keystroke. A piezoelectric element
may be driven by an oscillating electronic circuit or other audio signal source, driven
with a piezoelectric audio amplifier. Sounds commonly used to indicate that a button has
been pressed are a click, a ring or a beep.
Fig 10.3: Buzzer

Buzzer interfacing with LPC2148:
Figure 10.4 shows the Buzzer interfacing with LPC 2148. When P0.16 is at High (+5v)
status, then buzzer will make a buzzing noise and when P0.16 is at Low (0v) status, then
buzzer will not make a buzzing noise. When the input port pin from microcontroller is
changed, the sound wave is changed in Buzzer.
Fig 10.4: Buzzer interfacing with LPC 2148

5. Algorithm
Step1: Include the library of LPC2148

Step2: Initialize the subroutine functions which are used in program
Step3: Initialize LPC2148 pins as GPIO pins
Step4: Define port pins as output pins
Step5: Set the value of a GPIO pin that is configured as output to High
Step7: Set the value of a GPIO pin that is configured as output to Low
Step9: Go to step 5
Step10: Delay subroutine program
Step11: Return to main program
Step12: Stop
6. Flow Chart
Draw the flowchart for LED interfacing with LPC2148 (use algorithm to draw flowchart)
7. Procedure
Follow the procedure as given in Appendix IV for VSOFT LPC2148 Kit and Appendix
III for Keil IDE and Appendix V for Flash Magic
Buzzers are commonly used output components in signaling applications. Sounds

commonly used to indicate that a button has been pressed are a click, a ring or a beep.
The buzzers are interfaced with LPC2148 successfully to make a buzzing noise and to get
the output the GPIO programming is used.
9. Precautions
• Properly connect LPC2148 trainer kit with power supply terminals

• Close Flash Magic Programming s/w after program the microcontroller IC
a. What is the role of configuration registers in LPC2148?

b. Explain the functions of- IOPIN, IODIR, IOSET and IOCLR.
c. How to select high logic and low logic in LPC2148?
d. Tell the applications in which buzzer is used.
e. Compare embedded C language with assembly language
11. References:

Ghoshal
Appendix I
Procedure to work with MumLab 51 Kits
Commands:
1. A:
-Assemble? (Press enter key)
-Starting Address ------ (Enter starting address location and press enter key)
-Write down the assembly language program at starting address location
-After last line of program, press esc key to come out of editor
2. S:
-Substitute? (Press enter key)
-Internal RAM? / External RAM? (Press enter key to select the option / Press any key
except enter key to deselect the option)
-Enter Address ------ (Enter memory address location to store the data and press enter
key)
-Enter the data at memory address locations (Press upward arrow key)
-After last data stored, press esc key to come out of substitute
3. E:
-Execute? (Press enter key)
-Full swing? / Step by step? (Press enter key to select the option / Press any key except
enter key to deselect the option)
-Enter Address ------ (Enter starting address location of code and press enter key)
4. R:
-Register? (Press enter key)
-Bank0? / SFRs? (Press enter key to select the option / Press any key except enter key to
deselect the option)
-After choosing the option, read the contents of Bank0 / SFRs (Press enter key)
-After reading the contents of Bank0 / SFRs, press esc key to come out of register
5. S:
-Substitute? (Press enter key)
-Internal RAM? / External RAM? (Press enter key to select the option / Press any key
except enter key to deselect the option)
-Enter Address ------ (Enter memory address location to read the data and press enter
key)
-Read the data from memory locations (Press upward arrow key)
-After reading last data, press esc key to come out of substitute
6. D:
-Disassemble? (Press enter key)
-Enter Address ------ (Enter starting address location of code and press enter key)
-Getting machine code line by line (Press enter key)
-After getting all machine code, press esc key to come out of disassemble
Appendix II
Working with MCU 8051 IDE
1. Open IDE click “New project” in project menu

2. Name a project, set the path and enable External RAM memory, if wants to work with
external memory.
3. Write a program in assembly or C language and save the file with .asm or .c extension in
the folder created in the specified path.
4. Go to “TOOLS” and Compile the program
5. Check if any error and recompile if required…...this will create. hex file.
6. Select start/shutdown from “Simulator” menu ….it will take the pointer to start of
program, hereafter program can be executed by “step run” / “run” /” Animation” from
Simulator Menu
7. Simulation of each steps are visible below the screen in various registers.
8. To use memory location of External RAM click “Virtual MCU” menu and select “Show
data memory” …specified memory locations in program can be modified in external
RAM. Once data entered run the program, if result is stored in RAM open Memory as
explained above and check the locations.
9. For Interfacing of LEDs, LCD etc click Virtual
Appendix III
Working with Keil IDE
1. Open KEIL software by double clicking an Icon which appears on your desktop PC.
2. Now click on Project in menu bar and select new project.
3. Now choose the destination where you want to store the project. Create a new folder and
use this folder as a destination folder for your new project.
4. Double click on the folder and give the name for your project file as *.uv3 (extension it
will take by default.). Click on Save.
5. It asks for target device name.
6. Select Philips ->LPC2148. And click OK.
7. It asks that “copy standard start up code” click yes. It will show target folder on left.
8. Now click to file menu and new file, and type your code here in the Text window.
9. After writing your code save this source file with proper extension, i.e. if you are writing
the code in the “C “language then save file as “*.c” or if in assembly then save as “*. S”.
10. Now click on the flash in menu bar and options for configure flash tools
11. After clicking on this window, you will get many options, after that click on “output”
option.
12. After clicking on output option you will get window, here selects the option that “create
hex file” and click ok.
13. After that click on the “build” icon very near to compile icon. After that click on Rebuild
icon this is near to build icon.
14. Now your *.hex file is created in your project folder.
15. For downloading this file in the target board (VSOFT-ARM7) use the “Flash Magic
Software.
Appendix IV
Procedure to work with Vsoft LPC2148 Kits
1. Open a VSET-ARM7DK box and ensure that all above mentioned parts or default
settings are in place.
2. Connect power adapter to mains supply (230V AC, 50Hz) and other end of adapter to
ARM7 Demo Kit (VSET-ARM7DK) PS_CON connector.
3. Remove jumper J31.
4. Switch on Demo/Trainer kit using SW_PWR Switch and press reset key (SW_RST).
5. The following message appears on LCD display module “VSOFT Technology”
6. Press Reset Switch (SW_RST) in case message does not appear on LCD Display Module.
7. Connect VSET-ARM7DK Demo kit to PC using USB cable.
8. Open KEIL tool by double clicking a ‘KEIL uvision 5’ icon.
9. Create a new project.
10. Compile that file and create a hex file for it.
11. Download hex file into Target board using flash magic software
12. Remove jumper J31.
13. Press Reset switch (SW_RST) to start execution program.
14. LED will blink.
Appendix V
Working with Flash Magic
1. Right click on ‘My computer’ icon available on Desktop of your PC. Go to Manage-
Device Manager-Ports. Now check and note down the assigned Port to ProlificUSB-to-
SerialCOMPort (COMxx).
2. Now go to Start menu of your computer and launch Flash Magic software.
3. Configure Flash Magic Software tool as below:

➢ Select Device as LPC2148
➢ Select noted COMPort (COMxx).
➢ Select Baud rate as 9600
➢ Select Interface as None (ISP).
➢ Click on Browse and select generated hex file from folder.
➢ Press Reset key (SW1) from ARM7 Demo Kit (VSET-ARMDK).
➢ Flash Magic dumps a new hex file to ARM7 Flash memory.
➢ Now remove the J31 and press Reset button.
➢ ARM7 Microcontroller starts executing a new code.

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MICROCONTROLLERS AND

Department of Electronics and

1 Architecture of 8051 microcontroller

2 To perform ALP in 8051 for-

a) Addition and Subtraction b) Multiplication and Division

3 To arrange n-numbers in ascending order using 8051

4 Generate a square wave using 8051

5 Interface 8051 with-

a) Light Emitting Diodes (LEDs) b) Seven Segment Display (SSD)

6 Data flow model of ARM7 microcontroller

7 To perform ALP in ARM7 for-

a) Addition and Subtraction b) Multiplication and Division

8 To find largest number from n-numbers using ARM7

9 Separate even and odd numbers from n-numbers using ARM7

10 Interface ARM7 with-

a) Light Emitting Diodes (LED) b) Buzzer

CO1 Demonstrate detail feature, data flow and software aspects of

Module Week Experiments Name ( / Aim) Course

1 W1 To study architecture of 8051 microcontroller CO1

2 W2 To perform ALP for- CO2

a) addition and subtraction of 8-bit numbers using

b) multiplication and division of 8-bit numbers using

a) LEDs to blink the LEDs

b) Seven Segments Display to display BCD values

7 W7 To perform ALP for- CO4

a) addition and subtraction in ARM7

b) multiplication and division in ARM7

a) LED to blink the LED

b) Buzzer to make a buzzing noise

Subject Subject Name Teaching Scheme Credits Assigned

Subject Subject Name Examination Scheme

Architecture of 8051 Microcontroller

2. What you will learn by performing this experiment?

i) To learn the features of 8051

• A Microcontroller is a complete computer system built on a single chip.

The architecture consists of following components:

8051 Pin Diagram:

Fig 1.2: Pin diagram of 8051

5. Quiz / Viva Questions:

a. Why 8051 is called 8-bit microcontroller?

a. M. A. Mazidi, J. G. Mazidi and R. D. Mckinlay, “The 8051 Microcontroller &

Experiment No: 2 (A)

To perform addition and subtraction

2. What you will learn by performing this experiment?

i) To explore various instruction

1. MumLab-51 Kit Intel 8051

viii. LJMP 16-BIT ADDRESS: LJMP is an unconditional long jump. It is 3-byte

Step1: Get first number in register A

Step1: Load register B and A with

Step1: Initialize DPTR with 9000H

Move First no. to A Take First no. from 30H to B

Move Second no. to B Take Second no. from 31H to A

M Add/Subtract content of A and B

Initialize DPTR to 9000H

Take First no. from 9000H to B and

Add/Subtract content of A and B

Store result in A & transfer to memory location 9002H

Fig 2.2: Flow chart for Indirect Addressing Mode

Addition Register Address VALUE

Subtraction Register Address VALUE

9. Result and Discussion

• Properly connect 8051 trainer kit with power supply terminals

11. Quiz / Viva Questions:

a. Are all the bits of flag register used in 8051?

L2: DJNZ R1, L2----------225020 CYCLES