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To cite this article: Juan Ramón Rodríguez, Edgar Lenimirko Moreno-Goytia, Vicente Venegas Rebollar, Luis Eduardo Ugalde
& Nadia María Salgado-Herrera (2014) Step-up Transformerless Seven-level DC-AC Hybrid Topology for Interconnection
of Renewable-based DC Sources to Microgrids, Electric Power Components and Systems, 42:16, 1792-1801, DOI:
10.1080/15325008.2014.949910
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Electric Power Components and Systems, 42(16):1792–1801, 2014
Copyright C Taylor & Francis Group, LLC
CONTENTS
Abstract—This article introduces a new step-up transformerless
1. Introduction multi-level DC-AC hybrid topology for interconnecting renewable
2. Seven-Level DC-AC Topology Description DC sources to loads or microgrids. This enabling technology incor-
porates the best characteristics of three modified basic topologies—a
3. Mathematical Model of the Converter and its Control DC-DC multi-level boost converter, a DC-DC multi-level buck con-
4. FPGA-based Control verter, and an H-bridge—to obtain a seven-level step-up DC-AC
5. Experimental Results hybrid structure using only one DC input and nine power switches for
a single-phase output with field-programmable gate array based con-
6. Discussion
trol. The advantages of the step-up seven-level structure compared
7. Conclusions to other proposals are higher efficiency, a reduced number of power
References switches, and high power density associated with transformerless
characteristic. Furthermore, in contrast to conventional topologies,
the proposed design does not require voltage/current monitoring of
the capacitors or a capacitor-balancing control scheme, and only one
DC source input is used. Consequently, a high-performance configu-
ration is obtained. The laboratory results demonstrate the validity of
the design and the performance of the prototype.
1. INTRODUCTION
Multi-level converters have gained widespread acceptance for
applications in power grids of medium and high power voltage
[1, 2]. Some advantages of these converters are (i) low har-
monic distortion of the output voltage; (ii) low voltage stress
on devices; (iii) low switching frequency, which leads to bet-
ter efficiency; and (iv) operation without magnetic elements
[1–3]. Due to these advantages, multi-level converters are an
area of power electronics under intensive investigation and
development [4].
With today’s fossil energy crisis, environmental problems,
Keywords: DC-DC converter, DC-AC converter, multi-level boost
converter, multi-level buck converter, transformerless, microgrids, and nuclear prevention, photovoltaic (PV) and wind energy
field-programmable gate array (WE) power plants have emerged as viable solutions to pro-
Received 31 July 2013; accepted 22 June 2014
vide a significant fraction of societal energy demand, which
Address correspondence to Mr. Juan R. Rodrı́guez, Ingenieria Eléctrica,
Instituto Tecnológico de Morelia, Av. Tecnológico No. 1500, Col. Lomas de will continue to grow in the coming decades [3]. In recent
Santiaguito, Morelia, 58120, México. E-mail: jr 386@hotmail.com years, grid-connected PV systems have become popular [5, 6].
1792
Rodrı́guez et al.: Step-up Transformerless Seven-level DC-AC Hybrid Topology for Interconnection of Renewable-based DC 1793
Generally, power conditioner units (PCUs) interconnect PV AC hybrid converter that uses two cascaded H-bridges, one
arrays to the grid. PV-PCU systems convert the DC power pro- connected to a DC bus at Vdc and the other to a flying ca-
duced by the PV array into AC power compatible with grid pacitor continuously charged at 0.5Vdc. To maintain an output
standards. This structure can also track the maximum power voltage that is steady but well controlled by modulation, this
point (MPP) of the PV array and inject a sinusoidal current configuration requires constant capacitor voltage/current mon-
into the grid with total harmonic distortion (THD) levels that itoring.
meet relevant standards [7]; in relation to current proposals for A five-level voltage inverter was shown in [16].The topol-
multi-level converters, an analysis is developed. ogy of one leg is an interesting modification of a three-level
A relevant low-voltage application of multi-level convert- Buck converter with two DC sources in series with an H-
ers is a signal amplifier (including audio range) for testing bridge. The use of two DC sources with this topology may
purposes [8, 9]. The topology used includes two H-bridges be considered an advantage, as isolated DC sources are not
connected in cascade to build a nine-level DC-AC converter required as in converters with cascaded cells. Also relevant
using only eight power switches. In [10], a converter perfor- is that, in addition to the use of a DC source, the topology
mance based on cascaded cells was presented that generates a requires (i) extra DC-DC converters, (ii) voltage/current mon-
17-level voltage from 4 DC isolated sources. The DC sources itoring, and (iii) additional capacitor balance SPWM control.
are coupled to the structure, operate independently, and require Together, these requirements decrease reliability and increase
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individual regulation by means of additional DC-DC convert- the complexity and cost of the converter. If the DC sources
ers, which, in turn, increase the total number of components, are replaced with capacitors, the imbalance between DC levels
switches, and transformers. can increase the harmonic distortion at the output.
In [11], the author showed a complete rectifier inverter After analyzing some recent proposals related to multi-level
system for a motor driver; the system is based on a single- converters, it can be concluded that some of these proposals
phase H-bridge rectifier and three-phase inverter with three require extras transformers or capacitors. The use of trans-
levels of voltage on a clamped diode topology. formers reduces the power density, while capacitors require
Implementation of this technique demonstrates the need for voltage balancing strategies. Moreover, some of these propos-
balancing capacitors through additional circuitry or switches to als also require two or more DC voltage sources, making its
a multi-level converter. Similar to [11], the implementation of implementation difficult.
bidirectional switches was shown in [12] to five voltage levels This article introduces a novel transformerless multi-level
for a DC-AC converter, showing themselves as an alternative hybrid conversion topology that integrates three basic topolo-
to the traditional multi-level topologies, such as a clamped gies modified to obtain a step-up seven-level DC-AC structure
diode, cascaded cell, or flying capacitor. using a single DC input and nine power switches for a single-
On the other hand, a motor drive using a multi-level DC-AC phase output. Since the proposed structure does not require
hybrid three-phase converter was shown in [13]. This structure a transformer, its advantages include higher power density,
generates 81 levels using 4 H-bridges in cascade and contains higher efficiency, lower cost, and reduced harmonic distortion
DC-DC converters (each one using 4 switches and a high- at output.
frequency transformer) for supplying power to each H-bridge. The article is organized as follows. In Section 2, the pro-
Although the high number of levels helps to greatly decrease posed structure is detailed. Section 3 presents the mathemat-
the THD, the total number of switches and the need for mul- ical model of the seven-level DC-AC converter, and Section
tiple high-frequency transformers, a disadvantage in [13] due 4 presents the field-programmable gate array (FPGA) based
to the high number of elements, making it difficult to imple- implementation control. In Sections 5 and 6, the prototype and
ment for the interconnection of DC sources to the AC grid. laboratory results are shown and discussed, and conclusions
A nine-level DC-AC converter, based on four H-bridges con- are given in Section 7.
nected to a single DC bus, was presented in [14]. The voltage
outputs of each H-bridge are combined through transform-
ers to generate a multi-level voltage waveform. To construct
2. SEVEN-LEVEL DC-AC TOPOLOGY
a nine-level voltage signal, this structure requires the same
DESCRIPTION
number of cells per phase, as in [8], which is disadvantageous,
more so if the need for 50–60-Hz transformers is taken into Figure 1 shows the novel seven-level topology with a single
consideration. DC source. The structure incorporates three basic structures to
Another alternative multi-level inverter was presented in boost and condition the voltage to implement the seven-level
[15]; this topology is a seven-level structure built with a DC- signal.
1794 Electric Power Components and Systems, Vol. 42 (2014), No. 16
Vc 1
= . (1)
Vin is the input voltage, which can be the feed renewable V in 1− D
DC source, such as a PV cell arrangement or battery bank,
and it is connected to the input of a multi-level boost converter Equation (1) can be modified for the MBC to
(MBC) followed by a modified three-level Buck converter and DCBUS n
an H-bridge converter, which feeds an output load ZOUT . = , (2)
V in 1− D
Among the most important contributions of this proposal
where the relationship between Vc and the DC bus converter
are a factor of high-voltage elevation without an elevation
is
transformer, auto-balance of the capacitor voltages, continu-
ous input current, and DC-AC voltage conversion with seven nV c = DCBUS . (3)
voltage levels using only nine switches.
The increased steady-state current when S 1 = 1 can be defined
as
D·T
3. MATHEMATICAL MODEL OF THE 1
CONVERTER AND ITS CONTROL I Lon = V in · dt. (4)
L
0
3.1. MBC
Figure 2 shows the intrinsic topology of the MBC with the
The structure of the DC-DC MBC is a combination of boost main control voltage and current waveforms. For conventional
converter capabilities with a switched-capacitor network. The boost converters, IL can be initially expressed in terms of the
MBC voltage output is obtained from five capacitors in series, input current, input–output voltage, and duty cycle (D), being
each with the same voltage. This PWM-controlled converter obtained:
also has an auto-balancing voltage capability, which is a useful
characteristic when feeding converters with no voltage balanc- Pin = Vin I L = Pout = DCBUS IBUS . (5)
ing capability [17, 18]. Applying Eq. (4) to Eq. (5) gives
For N levels of DC output, only one driven switch, one in-
DCBUS nV c n 2 V c2
ductor, 2N – 1 diodes and 2N – 1 capacitors are needed. The Pout = DCBUS = nV c = , (6)
two main advantages of this topology are (i) a large input-to- R Load R Load R Load
output boost ratio with low duty cycle is achieved, and (ii) no 1 n 2 V c2 n2 V c
IL = = . (7)
transformer is required at the input of the MBC. The N levels Vin R Load (1 − D)R Load
of the voltage output can be incremented by stacking capaci- Equation (7) indicates that IL in the MBC can be controlled
tors and diodes (preserving the ladder-type structure shown in by D, which is a relevant capability on input voltage varia-
Figure 2), and thus the MBC can be built modularly, increasing tions. Moreover, using the stray resistance Rp of the inductor,
or decreasing voltage levels. The input-to-output relationship a transfer function that more closely describes the boost con-
of the voltage on the first capacitor (C 1 ) corresponds to the verter behavior can be obtained. On these grounds, starting
Rodrı́guez et al.: Step-up Transformerless Seven-level DC-AC Hybrid Topology for Interconnection of Renewable-based DC 1795
impedance is realized by extracting energy from C 1 , so the provides the same amount of energy to ZOUT . This leads to an
applied voltage level is Vout = VC through S 3 , S 5 , S 6 , and S 9 . energetic equilibrium between the input and output energy in
At this state, the C 3 and C 5 capacitors have a charge time, each capacitor, thus influencing the voltages balance.
while C 1 will experience a discharge time, as shown in Figure
5(b). Subsequently, the voltage level of series capacitors C 3 3.4. SPWM Multi-level Modulation
and C 5 is applied to the ZOUT impedance, causing Vout = 2Vc, To correctly generate the topological states necessary for op-
through S 2 , S 4 , S 6 , and S 9 . Now capacitor C 1 will experience eration, the converter requires a multi-level SPWM modu-
a charging time, while C 3 and C 5 will have a discharge time, lation system, which compares a sinusoidal reference signal
as shown in Figure 5(c). (Asin(ωt)) with six triangular waveforms: three for the positive
Finally, the highest voltage level corresponds to the series half-cycle (TwYP ) and three for the negative half-cycle (TwYN ),
connection of C 1 , C 2 , and C 3 , producing Vout = 3Vc through where Y ∈ {1, 2, 3}. Additionally, a signal zero crossing rela-
S 2 , S 5 , S 6 , and S 9 . Now these three capacitors will experience tive to the sinusoidal reference is required (Cz).
a discharge time, as shown in Figure 5(d). The results of these comparisons provide seven logic sig-
For the case when switches S 7 = S 8 = 1 (second semi- nals, PWMYP , PWMYN (where Y ∈ {1, 2, 3}), and Cz, as shown
cycle of line), the operation of the four-level DC-DC buck in Eqs. (10), (11), and (12):
converter is repeated again, but now the load impedance is
subject to negative voltage levels due to the polarity change of 1 if A sin(ωt) > T wY P
the H-bridge converter caused by the closing of switches S 7 PWM Y P = , (10)
0 if A sin(ωt) < T wY P
and S 8 .
Note that the MBC is able to maintain balanced voltages 1 if A sin(ωt) < T wY N
PWM Y N = , (11)
in all capacitors, including the case for converters that require 0 if A sin(ωt) > T wY N
different levels of energy in each capacitor, as shown in [19].
1 if A sin(ωt) > 0
From the topological states of Figure 5, discussed above, Cz = . (12)
0 if A sin(ωt) < 0
it follows that in the seven-level DC-AC hybrid topology, ca-
pacitors C 1 , C 2 , and C 3 always have the same levels and same After processing PWMYP , PWMYN , and Cz using the combi-
charging and discharging times, which ensures that each one natory relationships in Eqs. (13), (14), and (15), the activation
Rodrı́guez et al.: Step-up Transformerless Seven-level DC-AC Hybrid Topology for Interconnection of Renewable-based DC 1797
S1 S2 S3 S4 S5 S6 = S9 S7 = S8 Vab Vout The voltage levels (Vab) generated by the seven-level buck
converter are presented in Figure 6(c). As voltage Vab is a
X 1 0 0 1 1 0 3Vc 3Vc
X 1 0 1 0 1 0 2Vc 2Vc sinusoid-like single-polarity waveform, it can be represented
X 0 1 0 1 1 0 Vc Vc by a sine wave Asin(ωt) multiplied by output voltage DCBUS
X 0 1 1 0 1 0 0 0 of the MBC (see Eq. (9)):
X 0 1 1 0 0 1 0 0
X 0 1 0 1 0 1 Vc −V c V ab = DCBUS |A sin(ωt)| . (16)
X 1 0 1 0 0 1 2Vc −V c
X 1 0 0 1 0 1 3Vc −3Vc
The AC voltage output Vout of the seven-level converter is
shown in Figure 6(d).
TABLE 1. Switching states and respective voltage levels The AC waveform is obtained from Vab by means of the
H-bridge at the final converter stage. A mathematical repre-
pulses S2 , S4 and S9 for the converter, are obtained. sentation of Vout is
A sin(ωt).
+ PWM 1P • PWM 1N , (14) (1 − D)
S6 = S9 = S7 = S8 = C z. (15)
Table 1 summarizes the resulting switching states and re- 4. FPGA-BASED CONTROL
spective voltage levels at Vout, where S 1 is the switching fre- The FPGA-based control for the seven-level converter has
quency of the MBC, which is higher and independent of the four subsystems: (i) a triangular wave shape synthesizer, (ii) a
switching states of PWMYP and PWMYN . sinusoidal waveform generator, (iii) a comparator for the im-
Figure 6 shows the SPWM scheme and voltage output of the plementation of the SPWM, and (iv) pulse signal conditioning
multi-level converter. Figure 6(a) illustrates the comparison for all switches. The triangular waveform is synthesized using
process of signals TwYN , TwYP , and Asin(ωt). Furthermore, pulses of the main FPGA clock. The signal level rises to a max-
Figure 6(b) shows the gates pulses resulting from Eqs. (13), imum, T max , and then decreases to zero in a stair-like shape.
(14), and (15) corresponding to S 2 , S 4 , and S 6 , respectively. This sequence repeats until the overall process is stopped. Six
triangle waveform signals are required to accurately drive the
converter.
The control generates a unique “mother” triangle signal
and, from this, reproduces the other five, each of specific bias
to avoid overlapping. The SPWM internal pulses (PWMYP and
PWMYN ) are generated by comparing six triangular signals
(TwYN and TwYP ) against a modulating signal (Asin(ωt)), as ex-
plained for Figure 5. Triangular carriers are synthesized using
the master clock pulses of the FPGA, which runs at 50 MHz.
The sinusoidal signal is synthesized from a 500 data-point table
stored in ROM. Figure 7 shows the flowchart of the algorithm
for multi-level modulation implemented in the FPGA.
The synthesized sinusoidal signal is continuously compared
with each of the carrier signals, according to Eqs. (13)–(15).
This generates a train of pulses. If the reference is greater than
a carrier signal, then the pulse is active; if the reference is less
than one of the carrier signals, then the pulse is zero.
5. EXPERIMENTAL RESULTS
FIGURE 6. SPWM scheme and voltage output of multi-level A 100-W laboratory prototype has been built to experimen-
converter. tally verify the performance of the seven-level DC-AC hybrid
1798 Electric Power Components and Systems, Vol. 42 (2014), No. 16
Downloaded by [New York University] at 19:47 13 April 2015
L1 1 mH
Rp 0.08 ohms
Cx 4700 μF is that IL is not discontinuous. This characteristic makes the
Vin 36 V proposed converter well suited for PV applications or other
FPGA Spartan 3E DC power sources (e.g., batteries).
Insulated-gate bipolar transistor (IGBT) GPC40UD The voltage resulting from commutations of switch S 1 , VS1
Switching frequency (MBC) 10 kHz 50% duty cycle
≈ 65 V, is shown in Figure 8(b). The magnitude of VS1 corre-
Switching frequency (Tw) 3 kHz
sponds to the voltage level of VC1 . Mathematically, this voltage
can be defined as (1 – D) Vc. The maximum voltage output
TABLE 2. Parameter values and hardware for the implementation of the MBC is DCBUS = 200 V; this condition agrees with the
transfer function described in Eq. (2).
topology. The parameter values for the prototype implementa- The control pulses, with no SPWM, for multi-level modu-
tion are shown in Table 2. lation (obtained from Eqs. (13) and (14)) are shown in Figure
The SPWM-based multi-level prototype produces a 200-V 8(c). The same control pulses, using SPWM, are shown in
output at 60 Hz from a 36-V DC input. The main waveforms Figure 8(d).
resulting from the experiment (voltage and control signals) are The voltage output of the four-level DC-DC buck converter,
presented in Figure 8. Vab, is shown in Figure 8(e). This waveform is analyzed in Fig-
The current through the inductor L1 and the control signal ure 6(c). The voltage step is Vab(max)/3 = 200/3 = 66.66Vdc.
are shown in Figure 8(a). As shown, there is a charge increment This voltage level agrees with the values obtained with Eq.
when S 1 = 1 (IL increment) and a discharge when S 1 = 0 (IL (16). Figure 8(f) illustrates voltage output Vout of the pro-
decrement). A relevant characteristic of the proposed converter posed seven-level DC-AC hybrid converter. The H-bridge at
Rodrı́guez et al.: Step-up Transformerless Seven-level DC-AC Hybrid Topology for Interconnection of Renewable-based DC 1799
Auto-balancing
IGBTs Extra diodes Capacitors DC sources capacitor Voltage elevation
Proposed converter 9 0 5 1 Yes Yes
Clamped diode 8 6 4 1 No No
Flying capacitor 8 0 10 1 No No
Cascaded cells 8 0 0 2 — No
the output of the MBC changes the DC-like waveform of Vab a single power source, whereas cascaded cell topologies use a
to an AC waveform at 60 Hz. DC source for each H-bridge, as in [20, 21].
The multi-level voltage output of the proposed converter A general advantage of the proposed seven-level converter
additionally requires filtering to reduce THD and generate a over the other configurations is that its control algorithm is
signal approximate to an ideal sinusoidal waveform. As the fre- relatively simple and that it does not require monitoring of the
Downloaded by [New York University] at 19:47 13 April 2015
quency spectrum of the three- and five-level converter is wider capacitor voltage. The latter characteristic is due to the high
than that of the seven-level converter, the filtering requirement boost ratio achieved without the need of a transformer. These
of the latter is less demanding. enhanced features make the seven-level converter introduced
Figure 9 shows the scaled-down physical prototype of the in this article very suitable for microgrid applications.
DC-DC MBC with the FPGA-based control platform, auxil-
iary subsystems, and experimental setup.
7. CONCLUSIONS
6. DISCUSSION This work presents a new step-up seven-level topology that
Table 3 shows the number of elements required for seven-level combines a DC-DC MBC, a DC-DC multi-level buck con-
DC-AC converters of different topologies. Note that the seven- verter, and an H-bridge in a single structure. The important
level converter presented in this work requires fewer elements advantages of the seven-level topology are (i) a voltage step-
than the clamped diode and flying capacitor configurations. up factor of 1:6 without the need of a transformer, (ii) auto-
Compared to the topology of the cells in cascade, the novel balanced capacitor voltages, (iii) continuous input current IL ,
seven-level inverter is less complex in construction as it uses and (iv) use of only nine power switches.
The analysis and experiments carried out on the seven-level
structure, as well as its comparison against well-known con-
figurations, confirm that the converter is adequately designed
and performs very well. Based on the converter capabilities
described above, the application opportunities for the seven-
level converter are abundant in the context of smart grids
and small-scale renewable power sources. This topology is a
competitive option suitable for efficiently integrating and con-
trolling renewable power sources (such as PV, fuel cells, and
low-voltage wind) into low–medium-voltage power grids and
microgrids. For instance, a household application is the inter-
connection of PV modules, while in isolated microgrids, the
applications may be PV and fuel cells. In other contexts, an
ambitious goal is to explore the application possibilities related
to the integration of large PV fields.
This work is a step forward in the direction of reducing the
FIGURE 9. Transformerless step-up seven-level DC-AC con-
verter and experimental test bed: (a) battery bank (Vin), (b) number of elements in a converter structure while improving
four-level DC-DC buck converter (Vab) and H-bridge con- overall efficiency and enhancing performance relative to other
verter (Vout), (c) MBC, (d) FPGA-based control, (e) circuitry well-known converter configurations. The authors expect that
DC source, and (f) ZLOAD . the step-up multi-level converter introduced in this article will
1800 Electric Power Components and Systems, Vol. 42 (2014), No. 16
become a useful alternative for research and development in [10] Odeh, C. I., and Nnadi, D. B. N., “Single-phase, 17-level hy-
the area of DC-AC converters. bridized cascaded multi-level inverter” Elect. Power Compon.
The solutions and capabilities proposed can be enhanced Syst., Vol. 41, No. 2, pp. 182–196, January 2013.
[11] Lin, B.-R., “A novel control scheme for the multilevel recti-
further. Additional future advances from this work focus on
fier/inverter,” Int. J. Electron., Vol. 88, No. 2, pp. 225–247,
November 2010.
i) minimizing the voltage and current harmonic distortion
[12] Odeh, C. I., Nnadi, D. B. N., and Obe, E. S., “Three-phase,
by means of a suitable modulation scheme, five-level multi-level inverter topology,” Elect. Power Compon.
ii) obtaining a mathematical model of the dynamic behav- Syst., Vol. 40, No. 13, pp. 1522–1532, September 2012.
[13] Liu, Y., and Luo, F. L., “Trinary hybrid 81-level multilevel in-
ior of the seven-level converter and its interaction with
verter for motor drive with zero common-mode voltage,” IEEE
(a) a distribution grid and (b) a microgrid, Trans. Ind. Electron., Vol. 55, No. 3, pp. 1014–1021, March
iii) evaluating the benefits of using various types of LC 2008.
[14] Song, S. G., Kang, F. S., and Park, S.-J., “Cascaded multilevel
and LCL filter for the interconnection of the seven-
inverter employing three-phase transformers and single DC in-
level converter with the grid, put,” IEEE Trans. Ind. Electron., Vol. 56, No. 6, pp. 2005–2014,
iv) incorporating the converter to the smart grid concept, June 2009.
[15] Zhong, D., Tolbert, L. M., Ozpineci, B., and Chiasson, J. N.,
and
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the Department of Electric and Electronics Engineering at Luis Eduardo Ugalde received his B.Eng. and M.Sc. from
the Instituto Tecnológico de Morelia, Morelia, Michoacán, the Instituto Tecnológico de Morelia (ITM) and his Ph.D. from
México, in 1993 where he is now a reader. His fields of inter- Universidad Michoacana de San Nicolás de Hidalgo in México
est are VSC-based DC links, power electronics transformers (UMSNH). In 2003, he joined the Postgraduate Studies Pro-
for medium and high voltages, and multi-terminal HVDC sys- gram in Electrical Engineering at the ITM. His current research
tems. interests include control systems, power electronics, renewable
energy sources, and HVDC systems.
Vicente Venegas Rebollar obtained his B.Eng. and M.Sc.
in electrical engineering from the Instituto Tecnológico de Nadia Marı́a Salgado-Herrera received her B.Eng. and
Morelia in 1992 and 1996, respectively. He received his Ph.D. M.Sc. in electronics engineering and electrical engineering, re-
in electrical engineering from the ESIME-Zacatenco, IPN, spectively, from Instituto Tecnológico de Morelia, Michoacán,
México, in 2004. He joined the Postgraduate Studies Pro- México, in 2009 and 2011. She is currently pursuing her Ph.D.
gram in Electrical Engineering at the Instituto Tecnológico de in electrical engineering at the Universidad Michoacana de
Morelia, Morelia, Michoacán, México, in 1995. His areas of San Nicolás de Hidalgo. Her research interests include power
interest are electromagnetic transients and fields and power electronics and power quality.
electronics.
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