DI HIGH RISE Elevator Manual Trouble Shooting Rev.No:0 Date : 2002. 1. 10 Overseas Support Team DI HIGH RISE Trouble Shooting Authorization Date : Jan 10, 2002 Document Revision : 0 Rev No, Rev Date Part Revised by Checked by lApproved by] Remark ‘Jan, 10, 2002 [Trouble Shooting] LT Park S. Jeong Y.G LeeRev.No:0 DI HIGH RISE Elevator Manual Date : 2002. 1. 10 Trouble Shooting Overseas Support Team [CONTENTS] 41, TCD(Trouble Code) Design Standards 2, Glossary 3. TCD No. Division Standards 4, Error Operation Flag Bit Def 5. TCD ListDIE/L TCD LIST ‘Applicable Model: D! 60~420 | Date Prepared: 2002.1.10 Revision No. :0 Page: 41. TED.(Trouble Code) Design Standards 1) Trouble code stated inthe document is universally applicable to DI Elevator 60 ~ 420 mimin model. 2) TCD type is divided into No. 1 ~ 255 by function. 3) When a fault occurs, E/L run status is controlled by Error Operation Flag according to TCD No. 2. Glossary 1) Run CPU: 1960 Main CPU 2) Speed CPU: INV DSP CPU 3) Error Operation Flag : Control flag where E/L run status are determined according to TCD No.. 3. ICDNo, Division Standards eteono | owvision by runcion | EET oeserpion a Tieibie cede esoianaton| 4215 System Enor 16~29 Inverter Interface Error To Be ldentied By 20-09 Inverter / Converter Error Etror Operation Flag According 70-149 | Device Enor To The Each Individual TOD No. 150-199 | Control Enor 200~256 | Network EnorDIE/L TCD LIST ‘Applicable Model: Di 60-420 | Date Prepared: 2002.1.10 RevisionNo. 0 Page ‘o) ome [0 fete le Se oa Fi ae ee a for | oe os ba os eo + [ere FAULT, Run CPU Fault Eror ole . 2 [ere ALARM Unidentified Alarm Occurrence . ole . 3] ERR ADDR Run CPU Address Error . an . 4 leer wan Run CPU St HW WOT Ernor . . . 5_| ERR SW WOT Run CPU SMW WOT Error ’ ’ 6 [ERR MEM autoc | Memory allocation Faure a . . 7 JERR TASK CREATE | Task Production Failure ’ ote . ‘ alee sem CREATE | Semaphore Production Failure . ole . ’ 2 [ere wor create | moruswwortimerProsueton Fae | 0 oe . ’ 10 | ere wt Unidentified Vector interupt . ole . ‘ 11 Jere mann RETRY | Run CPU Retry Fault olele . ' 12 |eRR QUEUE CREATE | Message Queue Production allure . ole . ' 13 |ere sys conris | system Configuration Error . ole ’ ‘ 14 [ERR WT_CONNECT | Interupt Connection Faure . ote . ’ 15 | unuse 16 [ERR nv. Speed CPU HW WOT Ener . ’ ’ ’ 17_| RR INV RETRY ‘Speed CPU Retry Fault . ole a] . 18 | ERR INV SYNC ‘Speed CPU and Communication Sy ror |_@ wale ’ . 19 | ena mv sve com sum | Speed CPU SPEC Data Eror . ole ’ . 20_| en nv nom. com sunt | Speed CPU Communication Data Eror | ols ol . 21_[eRR Nv ppRAM Speed CPU DPRAMWRITE Area Error | 0 ote . . 22 [ERR MAIN syne Run CPU and Communication Syne Emor oltele ' ‘ 23 | ena mam spec com suw | Run CPU SPEC Data Enor otete ’ .DIE/L TCD LIST ‘Applicable Model: D1 60-420, dl Date Prepared: 2002.10 RevisionNo, 0 Page: Flag Defintion | GSTS Desermign EO 850 CUT Running is impossible E0_B50_CUT_COND Running is impossible when EI/L is on MAINTENANCE operation or stops at door opening EO Tio CUT Stating impossible €0_T10_CUT_COND Starting impossible when E/L Is over speed during rnormal-speed operation or speed deviation error occurs though E/L is mot on MAINTENANCE operation EO_FAST_RUN CUT Normal- speed run impossible EOS ORIVE MODE COND. Safety drive run possible EO_REST_COND Starting is impossible without Emergency Recall switch ON, Starting is impossible after BL arrives ata fre escape floor with Emergency Recall Switch ON, EO H CALL CUT_COND Hall Call Service impossible EO HOLD TYPE ‘Troubled status holding‘Applicable Model: 01 69-420 | Date Prepared: 200 DIEN TOD UST a el ee eo | ae Potion eee Je 2 6 rin fees |r oss eo rot tia | a7 |eRR cNv HoT (CONV Hall CT Exror ete le . 40 | eRe cv oc uv INV DC Link Low-Voltage Detection ‘ . . 49 | ERR CNV FREO ‘CONV input Power Frequency Exor avs |e . so [ere cnv sw ov | CONV Over Voltage Detestion’by S/W) elele . 5i_[eRR cNv pT CONV PTI Detection Eror ole . [so | INV Reverse Run Detection [so | INV Charge Error se INV Over Load 55 | LowSpeed RUN Def, | Over-Speed During INV Low. Speed Run 36 INV Run CPU Error 51 INVASIC enor 38 INV Motor abnormal Low-Speed Detection 59 INV. Does Not Operate For 24se¢ 60 INV Motor Stat Torque not enough at = | unuse oo 70 | ERR POWER 43 Power Eror . ole ’ ’ 71 [enn vas Power Failure Detection(by 48V) ’ . ' ' 72 eR HAUL POWER | Hall Power Eror . 72 [err Rom sum Run CPU ROM CHECK SUM Error . . ole 74 leRR SPEC VALUE | Run CPU SPEC Data Value Evor . ola . .DIE/L TCD LIST Applicable Model: 01 60-420 | Date Prepared; 2002.1.10 jo ome hn Go | ol eee oo [os |e | wn eas a 2 I eal eaieee 1 oem Cem Bra Talwar ; tf eit aero ee 39 | ERR_INV_W_STACK_TH | INV Overheating (W-phase) ’ , e ' | . Ewa et To exe aoe | rr oe cheb ; 3 43 [ERR.CNV.R SHORT | CONV R-phase IGBT Error oloetle ‘ ' 1 [ena co 0 spor [contd te Got me ote te ; i ial eran? erase SiR contra rononen wlete f iDI E/L TCD LIST ‘Applicable Model: Di 60-420 Page: Date Prepared: 2002.1.10 [reo] = Gettin " Desatipion Hee outa Peapeer eed es Joos Toa [oo 97 | err Gao, RZCD Fault . o2_|eRR p40 R2LD Faull . 99 | ERR OUP IN ‘Doubie input Signal Exo . ’ 100 | ERR_SDSID_ON SD1D ON Enor . 101 [ERR sps20 ON SD20 ON Enor . 102 | ERR_SOS30_ON ‘S090 ON Error _ 103 | ERR sOsé0_ON SDAD ON Esror . 104 | ERR SOSSO_ON SDSD ON Eror ‘ 105 | ERR sDS6D_ON 'SDED ON Enor . +106 | ERR_SDS7D_ON 'SD7D ON Ener . 107 | ERR SDS1U_ON SD1U ON Enor . 108 | ERR SOS2U ON S020 ON Exor . 109 | ERR SDS3U_ON 'S03U ON Exor ’ +10 | ERR sDSaU_ON SSDAU ON Enor ’ 111 | err spssu_oN 'SDSU ON Error . 112 | ERR sossu_oN S08U ON Exor ’ 113 [ERR sos7u on SOTU ON Enor . 114 [ERR Post POS! ON Fault (LOC) ' 115 | ERR 8 POS! OSI ON Fault 00%) ' 116 [ERR us OSI ON Faull COU) 117 | ERR os POSI ON Fault 00) tie Jere vu. POS! ON Fault Q0P)DIE/L TCD LIST ee Model: 01 60-420 | Date Prepared: 2002.1.10 as ee 7 vision No.0 Page TED|Detrmon | Deseripnion =| Detection | toin ae q oe ee ee dein | gee see ane] to 75 [err spec SUM EEPROM Check SUM Exor ‘ ele . ' 7e_| uNuse 77 [ERREEPROM READ [EEPROM Read enor . ote . ia] 78 | ERR_EEPROM_FHT_SU | EEPROM Floor Height Table SumEror | @ ’ ' u 72_| ERR NVRAM FHT SUM | NVRAM Floor Height Table Sum Eror | . ‘ 80 [ERR 10 BOARD 1 | input Pott Signal Ero@oR-200Pc8) | ole ‘ ’ 81 [erro BOARD 2 | Input Posse Signal EworOR-200PCE) | # ole ‘ . 22 [ERR IO BOARD 3 | Input Porta Signal EwonDOR-200PCB) | o ole ol . 22 [ERR 10 BOARD 4 | input Portas Signal EorOOR-200PC8) | 0 ote . . 24 | ERR B50 ON RSSC RELAY ON Fault . ole ‘ ‘ 05 _| ERR @50 OFF ESC RELAY OFF Fault ‘ ote ’ ‘ 26 [ERR 815 ON CBR CTT. ON Fault . ote le ‘ a7 [ERR 615 OFF CAR CTT. OFF Fault ' ole . ‘ ee [ERR T10 ON IST CTT, ON Fault, . ole . ‘ 29 [ERR T10 OFF (C1ST CTT, OFF Fault . an . ' 90 | ERR SUPPRESS ON | SUPPRESS ON Command enor . fe . ‘ ot [err suppress OFF | SUPPRESS OFF Command Error . an . ’ 22 [ERR ENcO RE Disconnection . ole ' ’ oa lenR ENcO READ | RE Pulse Counter Value Read Eiror . ols . ' 24 [ERR ENCO COUNTER | RE Pulse Counter Value Error . ole . . 95 | ERR MECHANICAL, SAF | RSSX RELAY OFF(Safely System Enon) | . ’ ' ev 96_| ERR UPNORMAL_MODE | Run Mode Input Error . . ‘ ‘‘Applicable Model: D1 60-420 | Date Prepared: 2002.1.10 DI E/L TCD LIST Revision to, 0 Pane 1 i one ee a Sa ee sat [enn are ioc hip ror ‘ waz | exe 9515 OW 1598 CTT, On Ener ‘ : . A vas [enn oars ofr | 1588 017 oFF eno . . ‘ ’ 144 | ERR_VS Power Failure Detection(by $V) 4 4 s + as | enn. ow In, Dor Conta Err . ole . . ‘ue | ERR_COOLER_FLAGT_ | Arcondtoner Fat SW Ener . sw sar | exr o88 a Taping Sts Baecan ‘ a : : us [wee va | uwse 130 | exe sosto os | ao10 over pend batucton : ole : 151 [enn sosz0 os | sp20 over sped Detection ’ ote . 152 [enn sos os | soa0 over sped Detesn . oe . 153 [enn sosio os | souo ove sped etenon : ole . 151 [ems sosso_os | soso over spa Detson . ol ’ iss | enn soss0_os | soe0 over spond Deen . ote . 1s8 | enn s0s70 08 | s070 over spt Deteaan . of . 157 [enn cost os | so1u over spas Dsacton . ote . [| isa | enr_sosas os | soau over syd Dutton . ots . 189 | ERR_SDS3U_OS SD3U Over Speed Detection s ’ 1e0 | enn sosau os | s04u over spent Deteton . ole ’ 121 [enn sossu os | spsu ovr sped Deaton . ole . 162 | ERR_SOS6U_OS SDBU Over Speed Detection s 4 ’ ’ te /"aR_sos7U os [9070 over Speed Deteion . ote .mremcoten ‘Applicable Model. 0160-420 | Date Prepared: 2002.1.10 [reD| = Definition : a Eo epee ees ae le ie oe ese oe ‘ao Perm us mar | 121 Pere ois ura 24 [ear poe cre aa ear ae [eee wie ri ‘ eee | ec Oe eet . 1 ler se Terao [sche Sov Tomsrn eon = i tn Ler 0008 THER | boar We Thema Operon os A Set ee ote te 190 [eam wor censor | pinerenia Tanstrse nou roe 121 | eam MOTOR FAN. 00 ale ‘32 | Emm OPEN Lock | baat Open tok Detaon 155 [eR OPEN LOCK 3 | OPEN LOCK Repottion Fat : : : 435_| ERR_CLOSE_LOCK_1M_| Door Close Lock Repetition Fautt_ {| 18 eRe ALP APE wl Hi : 1st [ex even eTS0 Ene ' ial ivtll ts . 150 | eRe NvRAM TRAM Ese : 130 [use ‘uo [ERR_NVRAN-BATIERY |NVRAM Boley Dice Below Raed]DIEJL TCD LIST ‘Applicable Model: D1 60~420 | Date Prepared: 2002,1.10 oo) eee ae ee oe 3 eee et Runes loon [ite | bs | be | be | bt Se ee ere oe epg Aa aDIEM TCD LIST ‘Applicable Model D! 60-420 | Date Prepared: 2002.1.10 Revision No, :0 a _ Poxe r03 7 em > Loose ee be oe 2 eae oe rm mene SupOacion | 4 . 165 | enn wacs 08 inh Spet Over Spend ' ole 105 | enr-ow os Lo Spo Over Spud . ols 18 | enn soe DEVATION | spn Dvision Ve Emr . ole 162 | enn speen es cewaton | Dawe Speed Eno . ole vo fenn omcenion | RaDsectn Err . ote 171 [eRe 0161 FL NORA | De Syconus Psion Er . ‘ vz [enn-oasrisost —|sosw syndvonou Poston cxar |» . 7a [enn ovo. et sosto | stp sinionousPosion Exar | 8 . 14 [ene o1or et cur | syaehonous Position Err . . 1 [eam over Ft ao | Advan oro . . 176 [ewr-o1arr.-sos [30s on Faun 1 : 15 [enn pave nEPEAT | requ Sse Ovo un : cal Eat ito [ene new Jerx | Jer Comping Enos ’ tel via| vas lt veo [eam-occ prorte | speed Reduction PROFLE Er ’ oe : vat [enn oven oury | run bury Ean ' 122 [ERR LEVELING JERK | MeroLevingJCCommateg Er —|_® ote te : 188 | [RR ROPE_SPEED_DEVI|SpoedDoviion Ear Ding Sack Rapa] 8 ATION Compension Opeatin a UNUSE 2o0 [enn ener sme eweTLow conmurcatin Ear : . ‘ :DI HIGH-SPEED E/L TROUBLE SHOOTING MANUAL Point of Detection [@ Run cPu | @ oi120-150 Application Le specs cru _ | APrteatl |e 0180-420 [Overview] This document is used to easily setle the troubles that can occui atthe time of instalation ‘and maintenance for DI high-speed El. Today, system has Black_Box and unique hardware system owing to distribution of data network control system. Since, troubles are not handled rapidly & properly at site and E/L down _time is elongated this status may make maintenance work delayed and give ‘customers inconvenience, ‘This document contains easy shooting methods for troubles to occur at instalation/maintenance stage. We expect this wil be used widely at site and Atrouble occurs ® [check taiure status ae @ [Trouble shooting @. ‘Record rouble stats, ‘causes, measures taken, Besar gaube tas anc ‘Analyze record sheet at site Report trouble shooting lo factory QA team, Figuret ;General Flow of Trouble Shooting {Trouble Shooting Methog) Di high-speed EAL with over 120m/min speed has trouble shooting function in ts MICOM software. So it can itself check hardware for the purpose of main relay and connector operation, ‘door openctose time, rotary encoder faults, et. When a trouble occurs, E/. operation is restricted forsake of ‘stabilly and fault information is memorized within MICOM, ‘This manual describes how to identity the fault reasons on the basis of the rouble information memorized within the MICOM to, take actions required a site. ‘Yet. in principal, this manual is based on normal rationality check program or input/output control program, [ General Flow of Trouble Shooting] Figure 1 shows entire trouble shooting low of DI high-speed EA. - °® Trouble Shooting” is carried out on the basis of Trouble Shooting ‘Main Flow Chart in igure 2. ‘Troubles shall be disposed according o following lows by type, 4. For MICOM down, follow figure 3, 2. For non-TCD error, follow figure 4, 3. For TCD errors, follow figure 5. “This manual describes TCD trouble shooting mainly, If faut causes are not identified from investigation according to this flow chart, contact factory.DIE/L TCD LIST |Apricable Mode: 0160-420 | Date Prepared: 2002.1.10 =] om | ee ae ns ec el we zz | HL HON au (6 as ' zat |e la eA | ova ae Eau : a eee a are 1 za ll eee = SO cee zzz [ems sou | ass sree : a eee? | earns : az [ems Hau | aliens : zu lems ow |rabrosenn ra ' zz [em s0e20 [sez 0 Fe ‘ zo [em soe a wo |v vao Fon ‘ zat [emnane «uo | oa wo Fea : 73s [ens sve svi | os vio Fam : zs emt soee uo |Nos vubeut : zat | ens ent cf ut ‘ aa =| use rri Point of | @ Run GPU fication) @ 01120~150 Main Flow Chart of Trouble Shooting Detection | @ Specacru _|APPIcation) @ Oto tp (RaonatyCheckand Treble code DI high-speed elevators analyze MICOM command and outer Record EM. and main input data to see if E/ts operate normally or nol. This function lay satus referred as te rationality check. 293793) “reas posting er Data detected by rationality check fs coded into a rouble code oan ICOM ‘and memorized on MICOM, Eis restrained ints operation according to the trouble [—capamrareae—] | Thus. fauts causes are easily analyzed by checking the trouble shooting code. eco th Rornaion abou Er} {Separate 089) | ag Tate upped by ANH] (Rett Anex2.Enor top Tale René Shed) = at eck by Annunciator ‘Check inpat hardware on ye ey A ln basis of creat agra Numbers or characters in [] indicates Annunciator Key input 1. TCD Display Mode Wetted Fie aug ee Unidentifes [A41E] : Mode selection, fist TCD display = fi Pe {0} ‘TCD search in sequence of occurrence from second TCD: y Pet Pe9e 4 | Ig) TCO searchin downward sequence of occurence from Take Shoatng Nan TO final TCO. by TCO (Fig Sin Page 5) Trouble Shooting (FFFF) : Made cancel ‘Unidentiied 2. Error Log Table Search Mode ore eee fase erry ee a fs = from 2nd up to 48th one {rom 48th up to 2nd one [FFF]: Mode cancel Fig. 2 ‘Trouble Shooting of Main Flow ChantTrouble Shooting for Down MICOM Point of | @ Run GPU ication) @ 01120-150 Detection | @ Speed cpu _{APPNCAHON! @ oi1e0-420 ci Rae Trouble Shooting aed em ioral PCB appearence, IP SW geting check (> ® tyTco___| (Fig. Sin Pages) > b [General PCB Appearance Check) Ciety check the foboning points. 1, Connector pin dsconnection, cleanness 2 Iftin copper face contacted to connector is clean of not. 3 irustor conductive matters are on 1G pins or other chips, 4 Iftesistance or condenser bridge fited straighty is sconnecte, 5 Resistance, condenser, ode damage. 6. Hardness changes of electrolyte condenser (especialy, in ot place. 7. PCB's thin copper face damage such as scratch, disconnection, > [000-200 PCB DIP S/W set Criteria] ow swasw? ons fas) ses] es) (GUUUURE 12345678 [DPC-120 PCB Jumper Setting} [DPC-300 PCB Jumper Setting] a 2 (Notet) Usually SAV shall be set as shown above. [Causes excepted for DOC and DPC board Down, {.Momory data destruction owing to power tale, inverter noise, thunderbolt 2, The ambient temperature frequenty exceeds 40 © 3 Electrolyte condenser hardness bull in SMPS varies. 4 Bad contact owing to fasting terminal looseness from machine room fine vibrationTrouble Shooting by TCD Point of | @ Run CPU | © onzeiso Detection | @ Speed CPU Applicatic L@ Di180~420 START (Check TCD with ANN ‘and efer to trouble details ‘though tis document L Take adtons by TOD con the basis ofthis document Unidentified Identifies ‘Contact factoy QC team or ‘moniter automaticaly by -ontacting MAINT diagnosis uni “Take corrective actions -_——_ TOD Table Clear Normal EA Tat Operation {Trouble Shooting by TCD} {How to clear TCD Tae} © Entor Log Table Clear : Enter (A43E] with Annunciator @Entor Table Clear: Power ON DOC-200 PCB SWS, No, 4 ‘and OFF and then ON again, Be sure to power OFF SWS No. after Errot Log Table is cleared, {How to prepare TCD} Em_Tablefo} En Log_Table to) [or be nsbeoatzo1 to]|—O > [Fast Faun Too 2 > Finer rau To 7 Bnd Fout TOD. | ‘ath Fault TOD | | (7 [or be bs ba 63 be bo] ©: Storing course when fist fault occurs. @ Storing course when final fault occurs. '& Storing course when third and following fauts occur. Final faults stored in the final fault TCD to the course @ and final fault TCD is stored to course @ on Log_Table in FIFO structure. Report actions taken Ina writen form Figure § : By TCD Trouble Shooting Flow Chart {Annex2} tor Log Table Record Sheet is containedin the end ofthis, ‘document. This sheets used for E/L ear hstery convo at rouble ‘temoval or period inspection [TCO ust) (Annex1] 01120-420 TCD lst is contained inthe ond ofthis document As TCD1 ~ TCD14ie lfcut o take actions at sta, ANN can not be ‘sed. Ths ime, immediately contact LG,Pointof T@ Run CPU | apprication @ 0120-150 Non-TCD Trouble Shooting Detection _ @ Speed CPU Le 1180-420 INon-TCD Trouble Shooting] Many enter causes are not recorded by TCO. For example, unstable Ccheck non-TCO data that ean ‘found, switch chattering, unstable power, unstable communication, be troutie-shooted, with ANN bad contact, unstable noise circuit etc. As these factors make E/L abnormal iniormittonty, takes long ime to analyze thei eauses and plan corrective measures For rouble shooting for these kind of eros, itis recommended to use @ heck the check poms ‘exclusive maintenance and diagnosis unt(Computen. Irom prion order For functions and using methods of maintenance and diagnosis unit for DI El, refer to separate user's manual a ae Following table shows reterences for non-TCO data rouble shooting, snties a orc Rateable! (Car door switch chattering) contact status, contact Wiper Tandon mre 2 Dam stapes J 3. MICOMinput crcut 4 tf door open commands active during runing 2 Emergency stop during run. Which floor? (Car door svitch chatteing) 2. In case of DAV, ‘DLMG cam stroke 3, MICOM input creut impossible iar the data monitors por tons taken ina written frm Figure 4: NON-TCD Trouble Shooting Flow ChartDetection [Meaning] TCD 2: When un identified codes are read by ALARM Interrupl(IR1 of 82C59A) 3 or more consecutive times. [When an alarm interrupt occurs without an address error] TCD 3: When unidentified address by address map of (00C-200 PCB access is detected 3 or more consecutive times. (Diagram) Fy [Symptoms| 1.Check ALARM LED(LED3) of DOC-200 PCB fickering status, © Normal~ OFF © Abnormal(Address ERROR) ~ ON Actions to take} 4. Check +5[V] voltage. Must be atleast +4.81V 1) 451M] : Connector MG/t, MG/6 2) GND : TP16(Located just above Connector MG) 2. As lo TCD 2, GAL(U30), 82659A(U28), or EPLO(UI1) of, DOC-200 PCB may be failed. Replace GAL fist. If TCD 2 error stil exists, replace EPLD. * Be careful not to damage socket during EPLD replacement (Be careful for electrostatics.) 3.As to TCD 3, DOC-200 PCB FLASH MEMORY(U12, U13) or Inside program of the FLASH MEMORY may be failed. Replace FLASH MEMORY. * Be careful not to damage or bend pins while replacing FLASH MEMORY (Be careful for electrostatics.) 4, IFTCD 2 oF 3 error exists even after above actions have been taken, replace DOC-200 PCB.Toot Operation CPU FAULT ERROR Point of Detection ‘@ Fun micom = Speed-MICOM | @ Di120-150 Application, @ ON20~ 150 [Meaning] when a critical error is detected 3 or mare times in CPU operation. (For estical error types and codes, refer to the followings) Actions to take) 1. For below faults, check the memory contents recorded, Have the Main/Sub code where the fault, ‘occurs init backup memory, instruction point, and task ID memorized q ‘Stop the task where te fault occurs z No.of eccurtance 2 37 ‘SW REBOOT vt [reccrdthe TCD in the ERROR LOG TABLE| naa z3 Report status of main reboot by speed CPU x “Tum the system down (Stop al tek operations but, the task for controling the ANN TASK) xO) conten wo Conn ae Ema 2 | OPERATION ERROR CONSTRAINT ERROR "ARITHMUATIC ERROR PROTECTIONERROR 4 [rtonns rowr enor [0 THE ERROR. soe = fcistd Fae estou 1 —| Tox Duhre amr | {Flow Char} Ghock the orror type and instruct ion point oa ———__—_ above table and refer to the designer or developer 2, Turn O1v0n power, and 4) Ifthe error disappears, the reason is probably has bad connection of Flash ROM(U12, U3) Socket 2) fhe error stil exists, the reason is probably Flash ROM failure. Thus, replace the ROM(U12, U19). 3, Check the socket connection status of individual parts in DOC-200 PCB. 1) FLASH MEMOTY(U12, U13 ; PA28F4008X-860) 2) EPLO(UI1 ; EPMT7128ELCB4-10) 3) GAL(U30 ; 16V8B-10LP) 4. Check the Setting status of dip switch 1 in DOC-200 PCB, SW soo J]: Allshoud be in OFF status D2) (or, all shouldbe set to FLASH ~O poston as shown fet.) + SWt positon: Upper iet FLASH EMULATOR 5. After above checking, power ON and check +5[V] voltage. Atleast +4.8[V] or above 4) +51V] : Connector MG/1, MGI6 2) GND : TP 16(positioned just above connector MG) 6.1fTCO 4 error stl exists even after the above corrective actions taken, the reason may be a fash ‘memory or ts inner program failure, This time, change the flash memory frst and, ifthe error stl exists replace DOC-200 PCB.Teos Point of | @ Run CPU ‘10s INTERRUPT HANOLER. Is there any TASK over-running its operation time? Y ‘Record the error occurrence time in Real Time Is the task overrun over \.N ‘twice consecutively? y| ‘Stop ll tasks except ‘SYSTEM DOWN handing ANN TASK ~——____] RETURN Fon] © DNZI-150 Bun CEUowe nouennon Detection | © Speea cPU_| *PPNEBHON prig0-420 (Meaning| Run Tasks are monitored in their working time at 10ms interval (Actions to take} ifeach ask overuns the spectied working time consecutively twice, this status is detected as an error, 1. Check the wave form of 82C54 TIMER CLOCK in DOC-200 Pca, {Explanation} ‘Measure TP7-IRO(TMO) Wave Form : Veifyf the Low pulse of Width 200ns occurs at Sms interval 2. Check DOC-200 PCB pattern 1) Verity i U24/12is connected to U26/18, 2) Measure 8259 INTERRUPT REQUEST wave form (TPS-INTR) ‘and Run CPU ACKNOWLEDGE wave form (TPE-INTA#) and ‘compare them with flowing figure. 3. error occurs 2~% times even after pawer has re- input, replace the ROM and refer to the designer, since the error is coming from the program error.Teo4 RUN CPU HiW WOT ERROR Point of | @ Run CPU Fe 0120-150 Detection | “Speed CPU Application Ora (Weaning) WWOT RESET signal is outputted by Run CPU at Sms interval. I this signal isnot outputted 4 or more consecutive times, this status is detected as an error, [Expianation| WOT RESET signal(WDI is outputted by Run CPU at Sms interval in the Sms ‘Task that is operated by iterrupl(IRO of 82C59A) produced from 8254 Timer at ‘5ms interval, If this signal is not outputted 4 or more consecutive times or is, ‘outputted from CPU but not normally inputted into MAX7S1, the Watchdog Timer inside the MAX791 outputs "LOW" as the WOT ERROR signal(WDPO#). This signal is latched(M-WDTE#) and reversed, and then sent to DPC-1XX or DPC-300 PCB which, Speed CPU detecls TCD 4 error. [Actions to take} 1. Check +5(V1 vattage ust be atleast +4 {V1 1) 00-200 PCB: +51V}=> Connecter MG/, MG ‘GND =» TPE (Located just above Connector MG) 2) DOR-230 PCB : +5I¥] = Connector SMPI1, SMI ‘GND => TP10}Located just above Connector OUT) 3) DPC-1X PCB : +5{V] => Connector VFI ‘GND => Connector VFI, VIS 2. Check WOT LED{LED2, red) of DOC-200 PCB fckering status 1) Noxmal = OFF 2) Run CPU HAV WOT ERROR ~ ON 3. WOT LED of DOC-200 PCB ison, turn OFF contol panel power ‘or PCE by aprlying power and then ting them ON again, n order to check CPU performing booting normally 4.1 WDT LED of 00C-200 PCE I sit ON 10 see afer power hes re- Input wth DPC PCB Speed CPU operating normaly, veity f Speed (CPU RETRY (at most 8 times) automaticaly resets Run CPU and formally booting again, 1) IfRun CPU has never been re-booted, there are possby errors in (OR: 23041) PCB, OPC-1XX PCB, of PCB connecting status. So, ‘check PCB connecting connector MA, VE} cables for connecting satus, 2) Try ceplacing DOR 2301) PCB, 23) Try replacing DPC-12X PCB. 5. WOT LED OFF in DOC-200 PCB has faled within 10 soe afer ‘power OFF-ON 2-3 consecutive times, 41) Try seplacng lash memory(U12, U13) in DOC-200 PCB, 2) fo correction occurs wih Flash Memory replacement, replace D0C-200 PCB.toD7 Task Production Failure Fe ees Seu | Application | $ O10 150 [Mteaning} When task production has failed during system initialization [Actions to take} Process after power input This problem may come from memory space 1. This error has nothing to do with outside connection. shortage or mechanically unstable memory. 2. This error has high possibilty of occurring when 1 program version is varied or some programs are ‘added or changed. (Explanation) 3.1 this error occurs rarely, 41) Check EPLD Socket (U11) of DOC-200 Produce memory pool 2) Check Flash Memory Socket (U12, U13) of DOC-200 for the use in system {for connection status. T 3) Check RAM for soldering status Start System Task and User Task production Cautions {Be sure to keep socket inside clean, ‘when manufacturing PCB. ‘Memory pool allocates memory for task, interrupt handler, Co program start-up Task production fais to be produced 3 or more times? Y 4.1 the error stil exists even after power has re-inpul, ‘change the program by referring to the designer. ‘Start next stage program END) RET Task Production Failure(TCD 7)Point of || @ Run CPU | @ DI120~150 ee Detection | Speed CPU Application @ O1120~-420 [Meaning] When necessary system memory space cannot be alocatedin starting _| (Actions to take] fun program. This problem may come from memory space shortage or 1. This error has nothing to do with outside connection. mmechanialy unstable memory 2. Tis eror has high possbily of cauring when the program {Explanation} Produce memory pool forthe use in system ‘Memory pool produce failure? N ‘Memory pool allocates memory for task, interrupt handler, ‘or program start-up ‘Memory fails to be allocated 3.or more ti aly, ‘Memory allocation error occurs Start next cos) stage program END RET version is varied or some programs are added or changed, 3.{f this error occurs rarely, 1) Check EPLD Socket (U1 1) of DOC-200 2) Check Flash Memory Socket (U12, U13) of DOC-200 for ‘connection staus. 3) Check RAM for soldering status. = Cautions ‘Bo sure fo keep socket inside clean, when manufacturing PCB. 4. Ifthe error stil exists even after power has re-input, ‘change the program by referring to the designer.Teo 16 Speed CPU HW WOT ERROR Point of Detection Te Run cpu Lo :Speed CPU (@ 01120-150 Application | @ 01120-150 (Weaning) wen he speed control CPU program in DPC-1XX PCB does not perform correcly [Actions to take] 4.Check LED's condition in DPC-1%X PCB, Leo Use aloe Status cru] eeocpenion | cemennon erica O(n {Explanation} < WOT Error Signal System Diagram > poy 4 poy i i i 1 i i i i i i 1 ! ut MA-03 VA-03 VA03 j, Doc-200 gMA9 _ MAPS DoR-230; DP C-AXX | i i i i i i i i i i i i FLAT CABLE ‘Sin heck in oa] Norma Flekerg Sent 256 in.atoperaion) ‘Aum | DPC-txX Err wea [ERROR 3H (Picker col Sal etton won Norma O(omm 2. I1LD2 LED is OFF or fickering, check SV power, ROM, or ROM socket for any errors. ‘3.When DPC-1XX PCB is normal, 1) Verify i 64-pin lat cable connector is property connected with DPC-1XX PCB and DOR-230 PCB/DOC-200 PCB. 2) Check the voltage of VA-03 and MA-03 terminal, as shown in the feR diagram, Each PCB and connecior is normal: DC OV Each PCB or connector is normal : OC OV 4. I same error occurs repeatedly even though power was ‘inputted again, replace DPC-1XXx PCB,Teo 10 Undefined VECTOR INTERRUPT Point of | @ Run CPU | @ Di120~150 Detection = Speed cpu_| Application [Meaning] wen an undefined vectorinterupt occurs more than specified times. (For verying the credibility of nterrupted circu) {Diagram} e§ myst eee 2 Hees {Figure} Diagram concerning DOC-200 PCB's Interrupt Controler(CS82C59A) @ D1180~420 [Actions to take] 1. When DOC-200 PCB's 82059A(L26) or EPLD(UI1) seems to fail, 4) First, change EPLO. 2) This time, specially be careful not to damage socket 2, When flash memory(U12, U13) in DOC-200 PCB or its inner program seems to fail, 1) First, change FLASH MEMORY. 2) This time, specially be careful not to damage or bend pin, 3, Measure the wave form of TPS(INTR) and TP&(INTAM) shown in the fet igure by using oscilloscope and verity ifthe wave forms are as same as the folowing form Tesente) J \ TPB(INTAR) LS a 4. Ifthe problem stil exists even atter above actions, replace ‘D0C-200 PCB7cD18 | . Speed CPU and Communication SYNC ERROR Point of | @ Run CPU Detection | Speed cpu | Application ‘When a discrepancy is found between Run CPU SYNC data and Speed (Meaning) CPU SYNC data for 5 or more consecutive times in the DRAM ‘communication of Speed CUP and Run CPU at 10ms interval (Run CPU Error Sel) START ‘Read Syne Data of Speed CPU from DPRAM Run CPU Sync Data ‘Speed CPU Sync Data? No. Iny_Sync.Etr_Detect = True ? / Yes lnv_Syne.€rt_Count >3 Yes ToD 18 Set (Explanation) Tue lActions to take} 4. Check +5[V] voltage. Must be at least +4.8{V] or more. 1) DOC-200 PCB: +5]V] => Connector MGI, MGIS GND=> TPt6(Located just above Connector MG) 2) DOR-220 PCB: +5{V] => Connector SMP/1, SMPIS GND=> TP10(Located just above Connector OUT) 3) DPC-1XX PCB: +5IV] => Connector VFI1 GND=> Connector VF/4, VFIS 2. Verily if DOR-230 PCBs are well connected to connectors. CCheck contact status for cables for PCB connecting cconnector(MA, VE). 3. Check switch setting status ater replacing DPC-1XX(or 200) PCB switch, 4. Try replacing DOR-230, DPC-1XX(or 300), and DOC-200 in sequence.[e017 Speed CPU RETRY Error Te Run cPU Speed CPU Point of Detection __ it20-150 lication Application | @ py1g0-420 [Meaning] ywhen Speed CPU WOT error in DPC-1XX PCB is not removed from all ‘Betimes of retry of Run Control CPU in DOC-200 PCB. {Explanation} < WOT Error and Retry Signal System Diagram > pore i acer porns | poc200 | i DOR-230! i DPC-1xx i i i ! 1 Speed CPU i Speed CPU | ! {WOT Error i worenor gMAO8__MA-03 vaos van, NO ea i input 4 , a Fence ere AOT MAT VAOT a See cay RETRY Output ge _wetry RETRY Input WZ FLAT CABLE [Actions to take] {Take corrective actions for TCD-16, Verily if 64-pin fat cable connector connecting DPC-1XX PCBIDOR-230 PCB,DOC-200 PCB is properly connected to MA-O7 and VA-O7, 3.if same error occurs repeatedly even though power was inputted again, ty replacing OPC-1XX(or 300), DOR-230, and DOC-200 PCB in sequenceint of | @ Run GPU (© 1120-150 7020 | Speed CPU Communication data ERROR Point fe sedcpu | APPlication @ eo to Meaning] pun CPU communicates with Speed CPU to get Normal data area through | Acton to ake} DPRAMIn case thatthe sum ofall the normal data dtfer from 4. Check +51VI NORMAL_SUM DATA continuously more than § times When Run CPU Read the Normal data wi (Explanation, NORMAL DATA AREA i sent from Speed CPU. 7iG_CurentV IG_Ovp tm Fie XCaA Rie XC98 fig_ R98 Ric ROS FRG En RICE RIG_Crv IC_Maln_Spee_Sum_ Et IG_Main_Nowl Sum. Er RIG_Main_Syne_ Er Fie_Main_ Er RIC_Main ye IC_W_ENCO OFF RiC_Noamel Com Sun ‘TCD 20 will displayed in case the sum of A is different from RIC_Normal_Com_Sum of B continuously 5 times should be more than +4.81V). 1) DOC-200 PCB : +5{V] => Connector MG/1, MGIS ‘GND => TPi6(above of MG Connector) Oe ee eee eee GND => TP10 above of OUT Connector) 3) DPC-1XX PCB : +5{V]=> Connector VF/1 GND => Connector VF/4, VF/S 2. Check the Joint condition of DOR-230 PCB CONNECTOR. Check the connection cable contact condition ‘amang PCBS(MA, VE) 3. Check the SW1, Sw2 position on DOR-230 PCB. 4. Try to replace the DOR-230, DPC-1XX(or 300), DOC-200 in sequence.is se {Explanation} nt from Speed CPU. ‘SPEC DATA Area iC_Lead_ Spee RIG_Molor Spee waite RIC_RE_Wype_ Spee Fic_Ropping_ Spee RIG Wight Spee RIC_Speed Spee © RIC_Ge2_Low Spee RIC_Ga2_ High Spee RIG lg Spec FIG_oLTun_ Spee RIG_OLType_Spee RIC_M_Contol Spee RIC_ALP_Spee RIC_Helgh_ Spec en ‘TCD 18 will displayed in case the Sum of A is different from RIC_Spec_Sum of B continuously 5 times Point of | @ RUN CPU P @ Dit20~150 co 19 | SPEC DATA Error in Speed CPU Point OF |e RU eo | Application § D1120~50 {Meaning] Run CPU communicates with Speed CPU to get SPEC data through DPRAM. | (Action to take} In case that the sum of al he SPEC data difer rom SPEC_SUM DATA an continuously more than 5 times When Run CPU Read the SPEC data which should be more than #+4.8{¥} 4) DOC-200 PCB : +5{V] => Connector MGT, MGIE ‘GND => TP16(above of MG Connector) 2) DOR-230 PCB : +5[V] => Connector SMP, SMPIS GND => TP10 above of OUT Connector) 3) DPC-1XX PCB : +5[V] => Connector VE/t ‘GND => Connector VE/4, VFIS 2. Check the Joint condition of DOR-230 PCB CONNECTOR. ‘Check the connection cable contact condition ‘amang PCBS(MA, VE) 3. Check the SW, Sw2 posiion on DOR-230 PCB, 4. Try to replace the DOR-230, DPC-1%X(or 300), DOC-200 in sequence.10021 | DPRAM READ AREA ERROR of RUN CPU dsecton = Spoca cou _| APAUestion 9 O80 9 (Meaning) Run GPU communicates wit Speed CPU To get Normal dala rea 000% | ron to ne (Meaning) PRAM, Bul in case that RUN GPU gel random dala from DPRAM {Action to take) continuously 5 times, 4. Check the Joint condition of DOR-230 PCB CONNECTOR. ‘Gheck the connection cable contact condition [Explanation] ‘among PCBs(MA, VE) 2, Check the SW1, SW2 position on DOR-230 PCB, 43. Ifthe TCD 21 occurs even though above action, replace the DOR-230,, DPRAM ead address and teadsize inccateior | = RUNGPU vod = Top 22_ | SYNC DATA Error of Run CPU and Speed CPU ce orn | @ Speed cru | APplcation $20 hon (Meaning) Run CPU acooss DPRAM every 1omsec and ad 1 to previous SYNC data, | tacin to take} ‘Speed CPU check the change of SYNC dala and access OPRAM, added 1 In will detect error If this SYNC data does not increase more than 200msec or [Explanation] imitless loop 20misec Routine Start Stat Tereads the SYNC data of Increase Syne_er_count RUN CPU in DPRAM ri + ‘Does the SYNC data increased 98 17 = Te DPRAM Reade OPRAM Read ite j Sye_ert_counteo 1. Check ifthe adjustment of VR1 for power check on the DPC-1XX,300 PCB is correct 2. Check the connection condition of DOR-230 PCB connector. 3. Try to replace ROM of DPC-110%;300 PCB, (Inverter ROM damage or bad qualiy) 4. Replace DPC-1XX, 300 PCB. (PCB communication buffer faut)Teo 2 Top 2aiea | TOO 2 jun GPU SPEC data sum error Run CPU communication data sum error [Meaning] 7¢023 : In case that sum value of SPEC data which is communicated to DPRAM is diferent 5 times continuously. “TOD24 : In case that sum value of normal data which is communicated to DPRAM is diferent 5 times continuously [Explanation] Neo C=) un coun onea (Does the SYNC data increased ae 1? (DPRAM Read ‘Sum Value Read v (Count Read data Sum Value ‘Does the Sum Value ‘match? Yer Counter Reset Increase Counter C023 024 eet Ves Ce} Point of Run GPU detection _@ Speed CPU ‘@ D1120-150 Application pplication @ oiig0~420 {Action to take} 41. Check ifthe adjustment of Vt for power check on the DPO-1XX,300 PCB is correct 2. Check the connection condition of DOR-230 PCB connector. 3. Try to replace ROM of DPC-14%,300 PCB. (averter ROM damage or bad quality) 4, Replace DPC-1XX, 300 PCB (PCB communication buffer faut)TcD25 | Speed CPU and Communication RAW control signal ERROR Point of || @ Run CPU detection |=) Speed CPU | @ Di120~150 Apptication’ @ pi1a0-420 (Meaning) in case that each kind of control signal does not set in regular time when RUN CPU performs data reading, SPEC reading and SPEC ‘writing through DPRAM [Explanation] CONTROL DATA AREA 'SIG_Spee_Chang ‘SIG_Spee te Re WRITE De | sic_spee_wite_cme 2 'SIG_Spee_ Read Reg ‘SIG_Data Read. Req RIG_Spee_ Change. Ack Le J ic. spec.wite Ack on READ || ic. spec. wite_Ok IG_Speo_ Read Ack RIG_Data, Read Ack ‘incase RIC_Spoc.Change_Ack doesnot sein SOmsec ater SIC_Spec_ Change. Req sting. 2 Incase RIC_Spec_ Wile Ack does not satin 480mse ater SIC_Spec_ Wit Req sang 3.lncase RIC_Spec. Wile_Ok does not set in. 4se° after SIC. Spec. Wte Cd seling 4. Incase RIC_Spoc_Flead_Ack does no sein 280msee ater SIC_Spoc_ Read Raq seting 5 Incase RIC_Data Road _Ack does not soln 480msoc ater SIC_ Data Read Req sting [Action o take} 4. The TCD 25 will occur due to wrong setting of SPEC White enable jump pin on DPC -120Cin case of SPEC writing on speed CPU by AS2E > Relry afler JUMP PIN Setting, 2. Check +51) should be more than +4.8(V}. 1) D0C-200 PCB: +5[V] => Connector MGI, MGIB GND => TP16(above of MG Connector) 2) DOR.230 PCB: +5{V] => Connector SMP/1, SMPIG ‘GND => TP10 above of OUT Connector) 3) DPC-1XX PCB: +8[V] => Connector VFI GND => Connector VF/4, VIS 3. Check the Joint condition of OOR-230 PCB CONNECTOR. ‘Check the connection cable contact condition among PCBS(MA, VE) 4. Check the SW1, SW2 position on DOR-230 PCB. 5. Try to replace the DOR-20, DPC-1XX(or 300), DOC-200 in sequence.cD 30 | INV Over Current(120-150m/min) Point of | — Run GPU ication | @ 0120-150, Detection | @ Speeaceu_| “PmNeaton | piia0-420 (Meaning) When the current of the motor exceeds limit (This time, switching is stopped to prevent ‘motor and IGBT damage), (Diagram) ama | mee iosecenee yee ° | OG \ DPC-AXX 2 ad (Actions to take] ‘check the VB connectar of DPC-1XK(INV) PCB. 2 Verity if HCT cables wl onnacted to U and V of HCT respectively 3, Verity if GU eable in DPP-200 PCB is well connected to FG PCB of U-phase IGBT, GV cable to FG PCB of V-phase IGBT, and GW catle to FG PCB of W-phase IGBT. 4. Check HCT drecton(Normally, HCT (= mark) is rected downward), 5, Check HCT connector power +15V and -15V. 6, Verty it JSH jumper of DPC-12X PCB is inserted to No.3, 4 7. Measure the OC leveling value in DPC-1XX PCB. (Normally, DPC-1XX PCB USHD Element No.10 pin is 8.95 + 005), 8, Replace HOT. 9. Replace DPC-1K PCRTcD30 | INV Over Current{ 180-420m/min) Point of | = fun ‘Application |: 01120-160 Getection | @ Speed Cr Le bi 120-420 (Meaning) When the current of the motor exceeds limit (This time, switching is stopped to prevent ‘motor and IGBT damage) (o1agra INV ULW.W stack Her we war BEC-300 when HOT ie facng ‘downmard O° ©) Actions to take} 4.Check the VEN connector of DPC-300(INV) PCB, 2 Verity HCT cables well connected to U, Vand Wol HCT respectvaly 3, Verity if Ut and U- optical cable are wall connected to U-phase DPP- 300 PCB, Ve and V- to DPP-300 PCB, and We and W- to DPP-300 PCB. Check HCT dtection(ormally, HOT (-> mark) is directed downward). 5. Check HCT connector power #15V and -15V. 6, Measure the OC leveling value in OPC-300 PCB, ( Normally, 0PC-300 PCB F16 Element No.3 pinis 43+ 0.05) 8, Replace HCT. 9, Replace DPC-300 PCB,Teo 31 | DC LINK Over Voltage(120-150m/min) "] Point of Detection = Run CPU ion | @ DI120-150 © Speed CPU Gecensom 1180-420 {Meaning] ‘When DC link voltage Is found to be 780V or more. (This time, switching is stopped to prevent condenser and IGBT damage.) Actions to take] 1. Check DPC-4XX{INV) PCB for VG connector status with power OFF. (Diagram) 2, Check VA and GP connector in DPP-XX PCB, 13, Measure the voltage between check point CHt and CHS in OPP-XXX Pp.xxx DPcaxx PCB (8VE 0.4, 4) fe 3g abnocma, rotate VR for adjusting 2)if adjustments impossible, measure the voltage between GXS ‘and 17 (Check AC28V and accept the vllage change rate) 4. Check the eving voltage level of regenerative IGBT. Measure the vottag between checkpoint CH2 and CH3 in OPP.200% PCB witha tester. And then adjust the voltage to be 7.58V by {otatng VR2. 5. Vetty if condensers well assembled in stack section, 6. Replace DPP2Xx PCB 7. Check the period to replace the condonser in stack sectionfabout ‘to year) and then replace itTOD st DC LINK Over Voltage( 180-420m/min) Point of | = fun GPU Veation | 91 120-180 Betaction | @ Speed cry “| 71°80) @ 0 180-420 (Meaning) When DC lik voltage is found to be 790V or more. (This time, switching is stopped to prevent condenser (Diagran [Actions to take} 1. Check DPC-300(INV) PCB for VS connector status with power OFF. 2. Check PD and PY connector in OPP-310 PCB, 3. Measure the vellage between check point P10 and DCN in DPP.310 Pca, (ifthe voltage i beyond 10Ve:0.A(tis abnormal), check the vokage ete: PV connector 3-4, and 3-1 and permite voltage change rate) 4, Measure the voltage between check point OV_LEVEL and DCN in DDPP.310 PCA (Normally, the voltage is within 7.62V £ 0.05. not so, rotate the VR2 to aust the voltage into normal range.) 5, Check the Metal Clad resistance, OC link connection status, and Connection status betvesn PD connectors in DPP-310 PCB, 6. Verity if condensers well assembled in stack section. 7. Replace DPP-310 PCB, '8. Check the period to replace the condenser in stack sectionjabout 10 yeat) and then replace itPoint or Detection Run CPU ‘Speed CPU Fe 0120-150, Top 32 INV U-phase IGBT Error(120-150mi Application | @ 0120-150 {Meaning} [Actions to take} for when IGBT driving | 1, Check the VG connecter status of OPC-1XX(INV) PCE with poner OFF, 2, Check the VA and GU connector of OPP-XX(GDC) PCB, oo 3, Velyf GU cabie I wel connected to FG PCB of U.phase IGBT. 4. Check the U-phase power(Vetfy i the voltage between XA and 13 in DPP-200 PCB, and GXI to 101s ACZBVIIE powers not conect, replace the transformer Yt, in permissible voltoge dropping range) 5, Very HCT cable fe well connected to HCTI Verity f U-phase cabl connectedto U-phase HCT and V-phase one to V.phase HC) 6. Check the HCT's drectoniNormaly, HCT is rected downwardto CP floor.) (Refer to F030) 7. Inspect GBT. 8, Replace DPP-»90(G0C) PCB, 9. Replace DPC-1XXIINV) PCB, [How to inspect G87] basal Be sure to open the tesistance of FG PCB attached to IGBT before When U-phase #1G8T and 4GBT are turned on simultaneously power has failed or INV output(U, V, Wis short inspection conan ial Tete vere [caer | = : a A end srot_[oy —|ozei| wa oriee -e2 * = sion _leaet ep [to ores [=—— When U-phase +IGBT and GBT are turned on simultaneous power has failed or INV output(U, V, Wis short. for when 1GBT driving ; Point of | Run GPU | 0120-150 Teo 32 INV U-phase IGBT Error( 180-420m/min) Detection | @erectepy | Application | @ Drtae-4s0 (Meaning) (Actions to take} 4. Check the VG connector status of OPC-300(INV) PCB with power OFF. 2 Verity that the optical cable is weil connected to stack secon such as {Diagram} Pc-300 focoes foxes fox caver [ea ‘a 2 Shoe a | e oe fe = ‘nd 10 srot_foaey ep [10a ores Us,U.Ve.VaWeMe, respectively 3, Check the VA, GX, GAY, and GCI connectors in OPP-200160C) PCB. 4. Verity GAI and GBI cable are well connected to FG PCB of Uphase GBT. 5. Check the U-phase power(Verty if the voltage is AC28V between LU-phase stack GXS to Sin DPP-300 PCB, and AC2BV between Gxt and 4 power isnot correct, feplace the transformer, Yet, in petmissibie voltage dropping range.) 8. Verity i HCT cable is well connected to HCT(Venty if U-phase cables connected to U-phase HCT and V-phase and W-phase inthe same way ) 7. Check the HCT's irecion( Normally, HCT is directed downward to CP oor) (Refer to TCD30) 8. Inspect GBT. 9. Replace DPP-300(INV) PCB, 10 Replace DPC-300(INV) PCB, {How toinepect G2} Be cure to open the resistance of FG PCB attached to IGBT before InspectionT0033 INV V-phase IGBT Error(120-150m/min) Point of Detection Run CPU © Speed CPU lication | @ 0120-150 feces Di120-420 {Meaning} When V.phase #IGBT and IGBT are turned on simultaneously, or when IGBT driving power hast INV output(U, V, Wi) is short (Diagram) aici a tea Actions to take] 1. Check the VG connector status of DPC-1XX(INV) PCB ith power OFF 2 Check the VA and GU connector of DPP-XXX(GOC) PCB, 2, Vesity i GU cable is well connected to FG PCB af V-phase GBT. 4, Check the V-phase power(Very ithe velage between V-phase stack GX3 and Sin DPP-XXX PCB, and GX to 4s AC2OV (ipower is not corectseplace the transformer. Yet, in permissible voltage dropping range) 5, Vey HCT cable ie well conmacted to HCT(Valy V-phace cate is connected to Viphase HCT and V-phase one te Viphase HCT) 6 Check the HCT's drection(Notmaly, HCT is drected downward to CP floor) Refer to TCD30) 7. inspect GT. 8. Replace DPP.0XX(G00) PCB. 49. Replace OPC-IXXIINV) PCB. (How to inspect IGT} ELT =eWhen V.phase +IG8T and 4GBT are turned on simultaneously, or when IGBT driving power has failed or INV output(U, V, W) is short. [Diagram orpsoo fas] Run : Teo 4 INV W-phase IGBT Error(120-150m/min) Detection | @ tty | Application | © 01120150 (@eaning| Actions to take] When W-phase +IGBT and {GBT ate turned on simultaneously, or when IGBT driving 4 (Cheok the VG connector status of DPC-XX(INV) PCB with power OFF, power has failed or INV output(U, V, Wi) ls short. 2, Check the VA and GV connector of DPP-xXx(GOC) PCB, oo 3, Veli GW cable Well connected to FG PCB of W-phace IGT. 4. Check the W.phase power(Vety if the voltage between G23 and Sin DPPH10K PCB, and GZ: to is ACZOVII power ie nat correct, replace the wansformer. Vet, in permissible vllage dropping range.) '. Vey HCT catle le well connected to HCT(Vetty # W-phace cable ie connected to W.phase HCT and U-phase ene to U-phase HCT) 6. Check the HCTs dvection(Nocmally, HCT fs dected downward 12 CP toor) (Refer to TCO30.) Inspect GBT, 8 Replace DPP-KXX(GOC) PCB. 2. Replace DPC-1XXIINV) PCB, (How toinspect GBT} Be sure lo open the resistance of FG PCB attached to IGAT betore inspection fest =| ates tener [ovata Tesi jexcaes Lozes fe = shen zei| = s cove | = |ower has falled or INV output(U, V, W) is short. Top 34 INV W-phase IGBT Error(180-420m/min) ie iy | en | aaptication | g R120. 180 (meaning, {Actions to take} When Wephase 4IGBT and AGBT are turned on simultaneously, of when IGBT driving (Diagraa\ pp200 | sxe wm) | Lye J ae) 41. Check the VG connector status of DPC-300(INV) PCE with power OFF, 2 Vet ifthe optical cable is well connected to stack section euch as, URL, Vee WE WE, respectively, 3. Check the VA, GX, GAl, and GC! connectors In OPP-300(G0C) PCB 4, Verity GAL and GBI cable are well connected to FG PCB of ‘Wephase 1G8T. 5. Check the Wphase power(Vetiy ifthe voltages ACZSV between \ephase stack GXS fo 5 in DPP-200 PCB, and ACZSV between GXt and A(t power is nol correct, replace the wansformer. Yet, in| permissible vtage dropping range.) 6. Verity HCT cable is well connected to HCTIVetty i W-phase cables connected to W-phase HCT and U.phase and V-phase inthe same way). 7. Check the HCT's Grection( Normally, HCT is directed downward to CP foot) (Refer to T6030.) 8 inspect iGBT. 9. Replace DPP.300(INV) PCB. 10, Replace DPC-300(INV) PCB. [Mow toinspoct G87} ‘Be sure to open the resistance of FG PCB attached to ISBT before inspection.ToD 35 Regenerative IGBT Error(120-150m/min) Point of Run GPU Detection | @ Speed CPU ication | © 01120-150 Application | piis0-420 [Meaning] When regenerative IGBT that uses regenerative power as resistance falls or IGBT driving power is inferior. (Diagram) [Actions to take] 41, Check VA, GX, and GP connector in OPP-XXX(GDC} PCB wth power OFF 2. Vey GP cate ie well connected o FG PCB of reganeratve IGET. 2. Verty ithe vottage between GX9 to 17 ln DPP-XXX PCB is AC2V, (ttpower isnot erect, replace the transformer, Yet. in permissible voltage dropring range.) 4. Check for egeneraive resistance status Power OFF and measute the resistance at both ends of ‘regenerate resistance connected serially, Normally itis 7,5 ohm at S0kw and 10 ohm at 22K. 6. inspect iar. 7. Replace OPP-XXXIGDC) PCB, [How to inspect GBT} Be sure to open the resistance of FG PCB attached to IGBT belore Inspection fee: [er lease PereyPoint of | — Run CPU (© 1120-180 TCD 36 INV_HCT Error(120-150m/min) Detection | @ Speea cpu _| APPleation | © 1430-420 [Meaning] {Actions to take} ‘When HCT and HCT eable of HCT cable and DPC-1XX PCB are badly connected. (Diagram) HCT see SEM petacx DPC-KK BaP HERE moral [Sitorwensreamn wer] 41. Check the VB connector status in OPC-1XX(INV) PCB with power OFF. 2. Verity No.9 and 10 of VB jack are connected wel, 3.Check HCT and ts connector when error accurs bring run 4.Check the voltage of HCT eable(No.1 +15V, No2-15V, No.@ GNO) Sif there's no error in connector, replace HCT. 6 Replace DPC-1Xx PCB,—— - Point of | Run CPU 1120-150 ToD 36 INV HCT Error( 180-420m/min) Detection .@ Speed cpu _| WP!/22400 | @ Dy190-420 {deaning\ Uctions 10 take] Whea HCT and HET cable of HCT cable and DPC-300 PCB are badly connected. 1.Check the VBN connor as in DPC-300(NV) PCB wit power OFF 2. Verify if No.1 and M of VBN jack are connected wt (iagran\ _ Chock HET an ite connector when ene occur dating |4.Cheek the wot {ICT eabatNo| ASV. No. -ISV. Nod GND) PC-300 ‘5 teres no torn connssor, replace CT, {Replace DPC-300 PCB, InvsTack DPC-300 DSP THSSZOCST homes _sieng OPEN‘When thermal switch on heating plate operates to prevent IGBT damage by overheating Point of | ~ Run GPU ‘© 1120-150 Top 37 INV Overheating(120-150mimin) Detection __@ Speeacru_| “Peleation | © oiig0-420 {Meaning} (Actions to take} 1. Check STACK to see if FAN operates of ot (Diagram) 2. Check FAN chiving power and RELAY. 3. Check VG connector status in DPC-IXX{INV) PCB with power OFF. 4. tf ambient temperature of machine room exceeds 401, soe if ait condones is operating or nat 5, Check the voltage between GX9 to GX17 in DPP-XXX PCBIAC20V), 6, Cheek the contact of Thermal Guard, 41) Check a short occurs between GP? to GPS in DPP-XXXPCB ‘when the heating pate i sufficiently cooled ater power OFF (About 10min later)(This ime, short status is notmal 2) opened, reptace Thermal Guard. 7. lng error is found trom above tem 5, but an enor stil occurs wien ElLisre-operated after sufcient coating, 1) feplace DPP-29X PCB, 2) replace DPC-1XX PCB,Too Point of | Run CPU Detection | @ Speed CPU {deaningl ‘When thermal mitch on heating pte aperates to prevent IGBT damage by overheating, (fagram AAR tere ans Uctions to take) | Chek Uephase STACK to sce iT FAN operas ont 2. Chesk FAN driving pover and RELAY. 3.190 DPP-30(GDC} PCB LGBT ate pale 240 min, check GOL an GBI of Usps STACK beceane shot and ifGHE-2 and GC-6 cat short Cheek VG coanecor statu in DPC-{INV) PCB and VA sonnet aus in DPP-300 PCR with pose OFF 5. 1ambient temperature oF maine wom exsceds Ws il conor Faoperting or wt 6. Ate heating pl ‘comet VG connestr to DP J slfcont soled Aout Usinalter MECH OFF) D PCB andancasue No.3 volioge of VE. ihe vollageie high 1) Replace Thermal Gul, 2) Replace DPP-500 PCB.5 : Point of |) = Run CPU T= pit20-180 ‘TCD 38 INV Overheating(V-phase)( 180-420m/min) Detection | @ Speeacpu | APPHcation i139. 470 {Meaning} [Actions to take} When thermal switch on heating plate operates to prevent IGBT damage by overheating. 4. Check phase STACK to see if FAN operates or nt. [piagrain} 2. Check FAN diving power and RELAY. 2. 1ftwo DPP-300{GDC) PCB IGBT are paraiel(240 mmin, check if GB 2 and GBI-6 of V:phase STACK become short andif GBC-2 and GBC- became short 4. Check VG connector status in OPC-300(INV) PCB and VA connector in DPP.200 PCB wit power OFF. 5, tf ambient temperature of mactine room exceeds 401, seo air conadtioner is operating or not 8. After heating plate is sufficient cooled About 10min after MCCB OFF), ‘connect VG connector to DPC-200 PCB and measure No.3 voltage of VG. the voltage is tigh, 1) Replace Thermal Guard, 2) Replace DPP-300 Pca,: : Point of | > Run T Teo 39 INV Overheating(W-phase)( 180-420m/min) Detection _@ Speed cpu | APBlication | g pee [Meaning] [Actions to take) ‘When thermal switch on heating plate operates to prevent IGBT damage by overheating. 41. Check W-phase STACK to see i FAN operates or nat ea 2. Check FAN ativing power and RELAY. 3. tftwo DPP-200(GDC) PCB IGBT are paralel(240 min, checkit GBI and GALS of W.phase STACK become short andi GBC-2 and GBC Gee 6 became shor UR Stack : 4. Check VG connectr status in DPC-30M(INV) PCB and VA connector in OPP.300 PCB with power OFF. 5. ambient temperature of machine room exceeds 401°, see far ‘conedtoner is operating or not 6. Alter heating pate fe sufficient cooleckAbout 10min after MCCB OFF, connect VG connector to DPC-300 PCB and measure No.3 vattage of VG. Ifthe vatage is high 1) Replace Thermal Guard 2) Replace OPP-300 PCB.Pointof | = Run CPU ication | © 01120150 Te 40 INV sw Oc Detection | @Speeacru | *PPHEation | @ Hi180.420 [Weaning] Actions to take} Winen the value that is obtained by converting the current detected by INV into A/D exceeds {120.450mnny paren 1. Vaily HT cables connected toHCT. (eae) Her inv stack, se -TwS3z0631 ‘aaa eae can aa Lv te shove cosn pre] beara 0PC-300 Caution: There’ no Wephase HCT for 120-190 min. For 120-180 mimi, VBN connectors VB. 2. Verity ICT cable is corretly connected according to each phaso(U, V-phase). 3. Verity HCT cable is connected to VB of OPC-1XX PCB, 4, Check motor and HCT SPEC, [180-240rn/min} 1. Verity i HCT cable is connected to HCT 2, Verity HCT cable is correcty connected according to each phase(U, V, Wphase) 3. Verify tHHCT eable is connected to VEN af OPC-300 PCR, 4, Check motor and HCT SPEC. [Her SPEC} * 120 180mimin : HC-U1SOVAB15 ( 1508V4V) 10- 240mvimin: NNC-20CA( 200N4V)Tena INV Current Control Error Point of Detection Run CPU Speed CPU (@ 1120-150) i1a0-420, Application [Meaning] ‘of invert eutrent not owing wal When the extor between current command and detected valu is not consistent because (Diagram) nv stack bsp -TMS3z0¢34 ‘Ler Vali isabove cada potion IY Error DPC-300 Catton: There's no Whase HCT for 120-150 min For 120.150 min, VBN connectors V8, [Actions to take] [120-150 m/min} 4. Vet i HCT cable is comecty connected ‘according to each phase(U, V-phase) 3. Verity HCT eable is connected to VB of DPC-1XX PCB, 2. Check metor and HCT SPEC. (180-240rnmin 1. Very i HCT eabte is covtecty connected ‘cording fo each phaselU, V, Wephase), 2. Verity if HCT catia is connected to VEN of DPC-300 FCB, 13 Check motor and HCT SPEC. (Her spec} +120 150m/min: HC-U1S0v4816 ( 1508/4V) 480- 240mnin: NNC-20CA( 20044)TeD42 | CNV Over Current 180-420m/min) Point of | = Run CPU 2 1120-150 Detection | @ Speed cpu | APPlication | @ 01180-4290 [Meaning] IGBT damage. ‘When the current of the motor exceeds limit. Switching Is stopped to prevent motor and (Diagram) (Aetions take} 1. Venty it power voltage RS, and Tare connected to PT. 1) For 300V, Rphase power PTI-3, Siphace~ PTT, Tphase- PTI-11 2) For 400, R-phase power» PTI-4, Sphasa~ PTI, Tphase- PTI-12, 53) For 348V,Rphase power ~ PT12, S.phase PTI, Tphase- PTI-10 2, Ven second side af PT fcannected to DPP-S10 PCS (PTV-2- Pe, PTH22- PP4,PTH-23- PPS) 2. Verily opical cable of C300 PCB RHR, S4S.Te:T- are well connected to RS,T stack and DPP-300 PCS & IGBT FG PCB ao we connected to each oer (Refeo TCD43, 46, 45), 4. Vet HT eable is wll connected to VBC In OPC-30,VenyiUphase cables comectedto Uphase HCT and Viphass lo Viphase HET), 5. Check HCT power #1SV and-18V, 5. Check DPC-300 PCB OC level votage( Normal FS ElemeniiLM293) No Svotage is 902V$ 0.05), 7. Check he HCT drecton(ormaty, HCT is dreted dowd (>) 8. check cer, ‘9, Replace DPP.200 PC8. 10, Replace OPC-300 PCB, [How to inepect 1687] fe ee to pan the restancaofFG PCB allached te IGBT before inspection,TeD43_} CNV R-phase IGBT Error( 180-420m/min) = Run CPU. © Speed CPU Point of Application |< 01120-150 Detection Le o1180-420 {Meaning} When R-phase +IGBT and {GBT ate turned ON simultaneously or GBT driving power has failed, (Diagram) Check below dotted tine opp-a00 fess t-em for connection status! \ Pc-200 4,2, and3 should be connected to PTA MIC. ‘2ccording to power voltage size as shown below. seov PTI 3, 7, 11 aoa PTH 4, 812 atey PTI 2, 6, 10 (Actions to take] 1. Verity if power voltage R.S, and T are connected to PTY 1) For 280, Rephase power » PT13, S-phase- PTH-T, Tphase> PTI-11 2) For 400V, R-phase power Tephase- PTI-12 3) For 346V, R-phase power = PT1-2, S-phase- PT1-6 Tephase> PTI-10 2. Veiiyf second side of PT! is connected to DPP-310 PCA, (PT1-21+ PPI, PTEZ2+ PP4,PT1-23- PPS) 43. Vey te optical cable of DPC-300 PCE Re R..S*,S.,T+T ae well ‘connectedto RST stack 4, Check the VG connector status of DPC-3001INV) PCE with power OFF. 5. Veillyif GAC and GCC cable of DPP-300(60C) R-phase PCB ‘10 well connected to FG PCB of R-phase IGBT. 6, Check the R-phase power(Veriy ithe votage Is AC2BV between Rephose PCB GY to din DPP.300 PCB, and ACZQV between cysts, 7. Verily if HT cable is well connected to R and S of HCT £8. Notmally, HT should be directed downward towards CP oot 9. Inspect IGBT (Refer to TCD42), 10. Replace DPP-300(600) PCB. 41 Replace DPC-300{INV) PCB, PTI, S-phase PTH,[ Too 44 CNV S-phase IGBT Error( 180-420m/min) Pomor | 2 RuncPo onan | BB0 89 Detection | @ Speed CPU ee | @ DI180-420 {Weaning} failed, \When S-phase IGBT and GBT are turned ON simultaneously or GBT driving power is [Diagram Check below dotted line for connection status! | according o power vatage size as shawn below. 3B0y PTI 3, 7, 11 4oov PTI 4, 8, 12 BBV PTI 2, 6, 10 {Actions to take} 1. Verity itpower voltage RS, and Tare connected to PT 1) For 380V, R-phase power > PT1-3, S-phase> PTT-7, Tiphase- PTI-11 2) For 400V, R-phase power * PT1-4, S-phase PTI, Tephase- PTI-12 3) For 346V, R-phase power ~ PT1.2, S.phase- PTS, Tephase: PTI-10 2, Verily second side of PT! is connected to OPP-310 PCB. (PTL21~ PPI, PTL22* PPS, PTI-23+ PP3) 3. Verity ithe optical cable of DPC.300 PCB R,R..S+.S..T+,T- are well connected to R.S,T stack 4, Check the VG connector status of DPC-300{1NV) PCB wth power OFF. 5. Veriy if GAC and GCC cable of DPP.300(G00) S-phase PCS ‘are well connected to FG PCB of S-phase IGBT 6. Check the S-phase power(Veriy if the voltage is ACZSV betwoen S-phase PCB GY' to din OPP-300 PCB, and ACZSV between vats, 7. Verity CT cable is wel connectedto R and S of HCT. 8, Noualy, HCT should be directed downward towards CP flor. 9, Inspedt IGT (Refer to F042), 10, Replace DPP.300(60¢) PCB, 11. Replace DPC-300(INV) PCB,Too 45 CNV T-phase IGBT Error( 180-420m/min) Pointor | Run PU ieation |, 01120-150 Detection © Seeeacru | APPMAHON | @ ni150.420 {Meaning} ‘When T-phase +1GBT and JGBT are turned ON simultaneously or IGBT driving power has failed (Diagram) Check below dotted tine for connection status! ae eT Eee TEE) pPc-a00 41,2, and3 should be connected to PTY MIC according to power voltage size 2s shown below. a80v PTH. 3, 7, 11 400V PTI. 4, 8, 12 346V PTI. 2, 6, 10 (Actions to take] 1. Very power voltage R,S, and are connected to PT 1) For 380V, R-phase power » PT1-3, S.phase- PT? phase> PTI-11 2) For 400V, R-phase powor + PTI-4, S-phase> PTI-8, T. phases PT112 3) For 348V, R-phase power » PT.2, S-phase PT1-6, T- phase- PT1-10 2 Vaiity second side of PT1 is connected to DPP-310 PCB. (PTH-21+ PP, PTH-22+ PPA, PT1-23- PP) 3, Veit if the optical cables are propely connected to R+.R, et 4. Check the VG connector satus of DPC-300{INV) PCB with power OFF. t 5. Verily if GAC and GCC cable of DPP-300(60C) T-phase PCB are wall connected to FG PCB of T.phase IGBT. 6. Check the T-phase powerVerly if the voltage is ACZBV between T.phase PCB GY1 to in DPP-300 PCB, and ACZSV between GY3t05 7. Verity HOT cable is well connected to R and of HCT. 8, Normaly, HCT shoul be dected downward towards CP foo, 9.-Inspect IGBT (Refer to TCDA2), 10, Replace DPP-300(600) Pcs, 11. Replace DPC-300(NV) PCB,Teo 46 Phase Sequence Fault ( 180-420m/min) Point of | 2 Run CPU ‘ation | 01120-150 Detection | @ Speed cpu -| APNEA" | @ oita0.420 [Meaning} ‘When the phase sequence is R-T-S, not RS-T. {Diagram} CONV R- S-T stack Sia OPP-310 Actions to take] 41. Power R, S, and T are connected accord to R, S, and T of MCB. 2. Vey if power voltage R,S, and T are connected to PT. 1) For 380, R-phase power PT1.3, S-phase- PT17, T- hase- PTt-11 2) For 40V, R-phase power - PT1-4, S-phase- PTS, T- phase- PTI-12 3) For 346V, R-phase power - PTI-2, Siphaee- PT1-8, T- phase- PTI-10 2. Verily if second side of PT! is connected to DPP-210 PCB. (PT1-21- PPS, PT1-22- PPA, PT1.23- PP3) 4. Veiifyif ROR resistance ie connected accord to power vatageR, S and,e047 CNV HCT Error{ 180-420mimin) Point of | Run CPU lication |. DI20-150 Detection | @ Speed ceu_| APPIEAHON | g Dixa0.420 (meaning) ‘When HCT connector is separated from CNV. (Diagram) nase | vec — 9PC-300 ‘ony STACK = DPC-300 sp -Tmssz0c31 (aemerere. aaa rs [Actions to take} 4. Chack the VBC connector status in DPC-200{INV) with power OFF, 2. Venty No and 10 VBC connector are well connected, 3, Check the connection status between HCT and HCT cable (Refer te T02) 4, Check the HCT cable poweri* SV, -15V)Teo 48 k Low Voltage ( 120-150m/min) Point of Run CPU Te 01120-1850 Detection | @ Speed CPU Application eae a20 (Meaning) When running is impossible because of OC link charge shortage. (Diagram) ies Der. ne coco cn fs PPK DPO-14 (Check ine and eonation of RRR, RCRS, RCRT {etions to fake} 1. Check GP connector in DPP-AXX PCB and VG connector in OPC-1xx PCB. 2. Measure the vote between GX9 and GX17 in DPP-XXx PCBINormally, it should be AC28V, Yet, votage variation rate permitted) 3.i8 an etor ocews during EA. tuning, 1) Check regeneration ination voltage Venti voltage betwoen CHR and CH3 in DPPXxx PCB i 758). 2) Check DC link condense its time to replace, replace 5, Measure power votage(E/L wil operat with 240V oF more power votage inputted into CP), 6, Vey if regenerative IGBT isin good status. 7, Replace DPP.20X PCB.‘When running is impossible because of DC link charge shortage. (Diagram, PPs10 ‘Check ne and condiion of IRCRR, RORS, RORT ; Pointof Tun CPU | ppotication |. 0120-150 TCD 48 DC Link Low Voltage ( 180-420m/min) Detection | @ Speed cpu _| 4PPI © 1180-420 (Weaning) tetions to take} 1. Check ppv, connecter in OPP-310 PCB and VG connecter in 0po-s00 Pc. 2. Measure the voltage between P10 and OCNin (0PP.310 PCBINormalt should be 10V+ 0.150, ety Hf the vltge of PV connector between 1-4, 3-4, 3-1 willbe AC 12V. Yer, voltage variation rate is permitted) Note Be caret during measuring, whichis to made between CN and P10 3.-Detecton point checking 28, Connection status of metal clad resistance and OC lnk bb Connection wiring status of meta! cad resistance end PO connector fn 0PP-310 PCE 4 tf an error oceurs during EA. running, Check DC ink condenser (itis time to replace, replace i. 5. Measure power votage(EAL will perate with 294V or move power voltage inputted into CF 66 Replace DPP-300 FC, 7. Replace DPP-310 PCB., Point of | > Run GPU 1120-160 Top 49 Power Frequency Error( 180-420m/min) Detection | @ Speeacru_| APPNAHON » oi180-420 seaning) [Actions to take} When input power frequency fluctuates by 3Hz or more from the rating(50 of 6012). [Diagram \When power voltage frequency is higher than rated frequency by 3Hz(eg. over 63HHz for oz) cortower by 3H2(e.9. below S7Hz for 60H2) DPC-300 l y+ : a —— Measure v PT) Jose-Tmass20¢31) Taare wen | AO, ' tect rer Nee: Use pote a 1. Check the frequency by measuring power voltage with an osaloscope “Caution: Be caret of power voltage of over 300, 2 If power voltage is normal, measure PT! output vellage (Measure the frequency between PP. to 4 of DPP-210 PCB andi any enor is found, replace PT1) 3. Replace DPP.310 PCR 4 Replace DPC-300 Pcs.Point of |. Run GPU When the value obtained by converting DC link voltage into AID is 780V,Though OC tink teoso | CNV SWOV( 180-420mImin) Fe | eet, | Apptication | 5 0120-150 (mteaning} (Actions took ‘gurtent is shut by hardware and OV is double-handied) {diagram} {With Ei in unoperave status and power inputted, measure the voltage between OPP-310 PCB check point DCP & OCN and between VOC & GND. Then compare these two voltages to see i they are same of not Caution: They havea specific GNO respectively. 2. Many error is foundin item 1, turn VR of OPP-210 PCB te adjust he voltage between VOC and GND to be same as DCP and DCN, 2. Mitte normal inter 4, 1) Measure DC lnk voltage and vei ithe voltage rat of check point DCP and DCN in DPP-310 PCE is around 1001 2)\K voltages do not become identical by adjusting, enlace oPP-310 PCe. * Caution : Be careful not to get shocked by DC link voltage of 700V. * Proper point for OC link voltage measurementis by bus bar st back of CP ora point beWween GP-1 and GCI in OPP.200 PCB 4 If any err is foundin tem 3, 4),Check he connection states between Metal Clad resistance ‘and DC tok, 2) Check the connection status between Metal Clad resistance and DPP-310 Pca, '5, Check the period to replace the condenser in tack secton(About 10, years) and, if required, replace it po: Point of | Run CPU 7 01120180 too st PT Error( 180-420m/min) Detection _@ Speeacpu _| APPHAHON | g oi1a0-420 (Meaning) ‘When the line of phase detecting PT is disconnected or phase detector is failed [Actions to take} ‘Check any disconnection along the phase detecting rot. conv 2. Check VC & VS connector in DPC-300 PCB and PP & PC connector in DPP-310 PCB, FTAN[ | 2-cheskine paver votage SPEC, onthe bass ofthe SPEC, and vty i Iustside of PT1(ransformer) is connected well Refer to TCO_48, tem 2) 4, Very second side of PT is connected ta PP in OPP-310 PCS. (Refer to TOO_46, tam 3) t+} 5. Replace OPP-310 PCB. 68. Replace OPC-300 PCB, DPC-300 i— wasic|Ton s4 Over current error in motor Point of detection Run CPU © Speed CPU (© 01120-150) Application @ Di120-180 {Meaning} '0 case that high current that over 1.3 times than motor standard current is detected aver 40seconds under inspection oF normal operation. {Explanation} 20msec Routine le tover 13 mes than motor standard ‘curcent? Counter reset Tnerease Counter ¥ TCO oceure vee (Action to take] 1, Check ifthe motor code of address 0001 by ASTE is match to motor model name plate on motor. 22kWEMV-30HUIS, 30HUt 30KWEMV-40HUIS, 40HUt ASKWEMV-60HUIG, A3kW.EMV-60HUT, (LG GL motor) SOKW.TGLV-HMILEORY SOMER Motor). Motor Code $22 ‘TSKWEMH-101HU1,2,3 Motor Code $23 2. Check the TRIM code of address 0002 by ASZE is match to real applied motor. Motor Code $15 Motor Code $16 Motor Code $17 Motor Code $2 3, Check ifthe CT tum code of address 000A by ASIE is match to real applied turn number. 4, Checkifthe CT code of address 0008 by ASTE is match to feal Hall CT type. Code Capacity sor 10044 soz 150M 503 200A4V $04 40044 5. Check load thal car real load and added 50% load of car capacity s balanced with Counter weight. {6. Motor connection of each phase (U-V-W, UWV) check A.B phase of RE 7. Try to replace DPC-1X,300 PCBCD62 | Detection of INV 48V power failure Point of Swcrceu | APplation @ Ot ion [Meanin tion to Meaning) Wy case that ABV power fale is detected in inverter PCB eT) ‘Lin case only TCD 62 occurs except TCD 71, check the "125% Routine Explanation} ‘connecting condition between DPC-1XX,300 and DOR-230 PCB, ‘Stat 2. Try to replace DPC-1XX,300 PCB. Teas power falue signal form VO Port ‘se i TCDS2 occurs with TCO7t, possibly of ‘ hard ware faultis exist. Take action same a5 TCD71 Ne i av power faire? | Counter reset Le Ne TCD oscus ves EndTooes ~ Poitor | RUNGPU | aii aig, @ DiIz0~150 Detection of INV SMW over-current detection __@ Speea cru _| APPlication 9 Di 9 420 (Weaning! in case that inverter currents higher than motor standard value {Beton ote] 41. Check the SPEC part in TCD 54 “Action to take" 2. Try to replace rotary encoder (itmay happen if encoder pulse was out) [Explanation] 12548 Routine 3, Check the reversed connection in motor or encoder 6 Tyree OPC-1xK200 4 Is hover standara value? Counter reset Increase Counter Ls No TCD occurs ves EndDitference between Run CPU and Speed CUP SPEC Data TED 65/66 | _pierence between Run CPU and Speed CPU characterise SPEC data Point of | Run GPU lication | @ 0120-150 Detection | @ Speed cpu_| APPUeat fe pi180.420 meaning) 700 65; When the SPEC DATA shared by Run CPU and Speed CPU are diferent each other. TCD 66 ; One of he SPEC DATA shared by Run CPU and Speed CPU ‘exceeds the rated value, 47C065/66 can be checked in Speed CPU (Diagram) Jom ge. 2), (Actions to take} 1. Convert SPEC DATA into Run CPU SPEC READ ‘MODE(A32E) wih Annunicator for checking prom ge m2.) (Giny_err | (env_err << 16), th Iny_cny_en&iNV_SPEC_DIFF 4 setanernnw.srec orn] | Iny_ony_err8INV_SPEC_VALUE Jn wenn nv sree vane] ora | Nn wy onus | onc 2. TODAS is sure to occur when changing the above SPEC DATA and willbe automatically cleared by converting into Speed CPU SPEC WRITE MODE(AS2E) with Annunciator.(¢.g. TCDS occurs when changing the max, velocity during high-speed trial running ) 3. Example of TCD88 Rated RPMs computed with motor code, machine code, and roping rate SPEC of the above SPEC DATA. This time, if any one is wrong, the result will exceed the rated RPM.TeD70 48V Power Error Point of Detection T= Run cpu © Speed CPU Application | @ 0120-150 © 01180-4209 [Meaning] wen +48{V] power falls dawn to +39.6(V] for 10 oF more times in 10 seconds, [Figure] +48{V] Power Error Detecting Circul in DOR-230 PCB Inthe folowing, let shows DC+48{V] when powers nonnal ae ight shows the wave form when one phase of input powers missing, eo so ANI Volkage: DC-+48qyt 10% [Wiave Ferm and Voltage When Normal Vollage: DC «32VIE 10% [Wave Ferm and Votage When a Phases ssing| Note) Abova voage isthe OC vale measuied by DIGITAL VOLT METER [Actions to take} 4. Check +48) power LELED!) in DOR230 PCB, and 1) MLED(LED i OFF, (1) Check any eres in cu tse of Power Source and fSsconecte replace wi raed se = Check PAB side SIG Fuse(F3, Fo power source fx shot. (2)tfno errs found Fuse tum OFF the contol panel power and measur he esse vaies at both ends of DOR 230 PCB and POLY-SW1, => the esstance values obtained by Mega-Ofm uni, ‘hock +48) and GNDis shortn DOR-230 PCB since Ply Switch has eperaedborause ol ve caenk *00R-230 PCB +84V|=> Connector PAS; GND => TPO 2)MLEDLEDI)is ON, {1) Check the contacting status of connector) eae cornacting DOR 230(¢1) PCB an 006-200 FCB. (2) Check ie OC +48] put vatage in DOR 230 PCB, Normally, tis win 0S 481VIt 10%: Butt one of3 phases is ‘issn, OC 22 10% volagsis detected as shown ine ogra ‘is time, LED is ON nits Som bight Node, (8) Very TP 12{V_SET votage n DOR 230 PCBis OC +6 63M fren stthe vai resistance VR to DC +863 by rlating aust tp andchock aganif TCD 70 occurs aga, (4) Reed he vale of ates 0:52 in F7DOR 20 PCB. all rg vans ae 0300, vty i 48V and 24V power ae shart or rt & 48 power and 24V power cae in DOR 230 PCB ae not exchangedby each or (Wo rpeienced tists athe bal eperaonin PUSAN Otice Bulking) 2. Check #1] an 151 vloge = Mustbe at leat AV, + 15M 10% 1)000-230 PCB: +51] => Connector MGI, MGB; GND = TP16 2) 008.230 PCB : +51M1=> Connector SMPN, SMPE “81M = Comecior SMP? 3. Check he POB apple votoges (+46, “IV. 1M) ar turing OFF-ON te contr panel pone. = 1TCO 7 sil cers even tough al volges ae norma ry repecng PCB in sequence of DOR-220H) PCB an DOC 200 PCB.Teo 71 Power Failure Detection (By 5V Power) Point of Detection (@ Fun CPU fon | @ DI120-150, Application Speed cpu _| APPNCAHON |g O1150.420 [MeaningPower failure is detected when DC +48[V} power is applied to DOR-230(#1) PCB from power source and falls down to +39.6[¥] or below. [Diagram] [Figure] +48[V] Power Failure Detecting Circuit in 00R-230 PCB ‘When DC +48{V] power applied from power source to DOR-230(#1) PCB falls down to +38.6[V] or below, P48-F signal shown in above figure is diverted info “High” and sends to DOC-200 PCB to produce 48V power failure interrupt Actions to take) 1.M both TCD 71 and TCD 144{Power Failure Detection by +54) occurs and DOC-200 PCB's in Down sats, bis etatsis detected as anormal power fare, 2. Check +481] power LEDILED!) in DOR-230 PCB, nd 1) HLEDILEDI) i OFF, (1) Chock any rar in culput usa of Power Source ae disconect, replace with rated use. (2) fro eros foun Fu, tun OFF the cont panel power and measure the resistance values at both ends of DOR. 230 PCB and POLY.SW. = Ith resistance values caine by Maga- Ohm unit check if +48) and GND is shortin DOR-230 PCB since Poly Sitch has eperated because of over cuent * DOR290 PCB +48Iv| => Connector PWS.2: GNO=> TRIO 2)NLEDLED') is ON in DOR. 220 PCB, (1) Check the contacting status of connector MA) cable connecting ‘00R 230(#1] PCB and 000-700 PCB, (2) Check the OC +45{V input vllage in DOR. 290 Po, ‘> Normal, tis wihin DC-+48V}t_ 10% Butif ono of phases is rissing, DC +22Vft 10% voltage is detected a sou inlet agra, ‘This ime, LED! is ONinits Semi-bighess Modo. (9) Vesty if TP12(¥_SEN) voltage in DOR 230 PCB is OC +6 63), 1 ferent, sel he variable resistance VR to OC +6 621 by rotating adjust ap and check again #TCD 70 occurs again, (4) Re te valuoof aes 0352 in FTDOR.230 PCB, fal inpul values are 0x00, vet if 48 and 24V power are str or nol & 48 power ‘and 24V power catl in DOR-230 PCB are rot exchanged by aach ober (We experienced tis status a the al opraion in PUSAN Cree Bung) 3. Check +5] and +15] volage in 000-200 PB and DOR. 23041) PCB respectively. ‘> Mustbe atleast +48], + ISIV}L 10% rospectvay 4. Chock the PCB appiid vlages (+480, +51}, +15) afer tuning OFF-ON the contol panel power => 1FTCD 71 ll occurs eventhough all vollages are normal, ry replacing PCBin sequence of DOR. 20(¢1) PCB and DOC-200 PCB,: | HALL POWER ERROR (@ Run GPU Point of |) Speed CPU Detection Te 1120-150 Application | a @ 1180-420 [Meaning] When common 0C22V power supplied to HALL LON and IND has failed. (When DC22V power falls dawn to specified voltage.) [Explanation} [Actions to take}in Run CPU with Sum value memorized in ROM, and ifthere are any discrepancies found, increase the error counter and perform re-booting {Diagram ae are Loe “tines | RM (Stace | - [fermen] PEE] (ge Pointof | @ Run GPU ron |@ 01120450, ToD 73 RUN CPU ROM CHECK SUM ERROR Detection | = Speeacpu_| APPIAHON @ oris0-420 tateaning| {ROM SUM errors detected tines or more at booting, se the ROM [Actions to take} ‘SUM error and fcker WOT LED at 200msec. Usually, at 10sec interval, compare the Sum value obtained by computation fom ROM 0~ FFFFG 1. Check the OIP switch(SW7) status in DOC-200 PCB, Normally, the switch is set to Wiite Protect Character. Ifitis seto Flash Write Character, ROM data may have been destroyed al power ON or OFF. This time, ‘check the below item 2 and replace ROM, 2. Try powering ON. 1) ITTCD 73 does not occur, Chiefly, ROM(U12, U13) Socket has contact errr, So, inspect if there are foreign substances inside the socket. Check ROM(U12, U13) pin for any errors (bend, damage), 2) NTC 73 stil exists, ROM(U12, U13) Sum value may be recorded wrong. Try replacing ROM(U12, U13). In replacing ROM, be Careful not to bend or damage the pin. 3. TCD 73 error stil exists afer all check stated above, Replace DOC-200 PCB, RAM in 000-200 PCB may be defected. 4, How to perform ROM Write Program itinlo Hex file specified in the design Enter the Sum value to ROM as shown below. ‘MSB : Upper Check Sum Data at Hex file load LSB: Lower Check Sum Data at Hex fle oad [Rom Address | Input Data 000F FFD | _MSB. oxooor FFFE| LSBPoint of, @ Run CPU lication |@ 1120-150 Top 74 RUN CPU SPEC DATA VALUE INPUT ERROR(1/2) Detection |" Speed cpu | APPHeation SB ta0 409 {Meaning} When a non-acceptable SPEC Data is inputted into EEPROM. Meee cere [Explanation] ‘The table shows SPEC DATA Variable List thal should be checked when ‘SPEC DATA Value Input Error found, ul. SPEC DATA Vatiabie | (DORE: { Min Pre Dec_D ‘Weight Sensor [Leveling Compen_Dist | ‘Hall_Gall Doo. Lime! 9x0470~0x0471| [cage Call Doo. time | 1 Default Door tine ET 03004000 _ Max Floor Of Building | 46 0x008000 ‘Max Floor Of MyCari} T ‘7103010000 | Disnny Char Ouset —_| ial ——osn2o00 19} Ox040000__} Up_Rope Compen leve} | 2a erael S| — 2t{—astnona—[eratiez 17 1. Check Spec Edition again 2.Check *Upnormal_Spec_Value(ADORESS:0x15EC~OxISEF (byte) values with ANN and verity if they are not beyond the acceptable data values, referring the SPEC DATA Input Errar Conditions stated inthe lef table. ews ey cone ive. 2a¢z 08 ene.Teo 74 RUN CPU SPEC DATA VALUE INPUT ERROR(2/2) Point of Detection (@ 1120-150 1180-420 Te Run cpu LE Speed cu __| Application (Meaning! When a non-acceptable SPEC Dala is npuited into EEPROM. (Diagram) ‘Below LADDER DIAGRAM shows transferring conditions for SPEC DATA value input | esmmssnn_ Actions to take} 1, Check Spec Edition again 2.Check *Upnormal_Spec. Value(ADDRESS:0x15EC~Ox15EF (Abyte)) values with ANN and verity if they are not beyond the acceptable dala values, refering the SPEC DATA Input Error Conditions stated in the left table.EEPROM CHECK SUM ERROR ‘@ Run cPU » Speed CPU Point of Detection | (@ 0120-150 Application |@ 0120-150 TeD-75 (Meaning) When the Sum value of EEPROM 0x0 ~ Ox7FFB Data is diferent from which ‘memorized in EEPROM. (Floor height table data in EEPROM is excluded at Sum computation) [Diagram) EEPROM(AT28C256) PLEX SPEC “EEPROM CHER ['— ‘Suapataventa | ae [semis noma [Seettom_| (Actions to take) 4. Check the DIP switch (No.2 of SW) status in DOC-200 PCB (Switch should be set to Write Protect side.) {itis set to Flash Wile, ROM data may have been destroyed when powering ON or OFF. (This time, replace EEPROM(U22) ) sf GI] | russe ows 2 eeprom Protect Wie 2. EEPROM Check Sum is 4) Included in SPEC FILE(“bin) is produced when working al EEPROM with Spec Editor. 2) Automatically writen by the program when moditying ‘Spec Data al site with ANN, ITD 75 occurs during the above works or use, tty replacing EEPROM as ithas a high possibilly of being defected, 3.1 TCD 7S Error still exists even after above check, replace DOC-200 PCB,Teo77 EEPROM READ ERROR Point of Run CPU Fe 1120-150 : Application | @ 1120-150 Detection |" Speed CPU (Diagram) [Meaning] when the EEPROM DATA read on powering ON or after modifying EEPROM SPEC DATA are not consistent for 4 or more consecutive times Sa [eae at EEPROM READ 1 et Tape Re (Mesa ] os [ernounewox Actions to take] 41. Check the DIP switch(No.2 of SW) status in DOC-200 PCB. ‘Switch should be set to Protect side. Set No.2 of Switch SW4 to Write when modifying EEPROM SPEC DATA. (Be sure to set lo Protect after writing) 2, Verily if EEPROM|(U22) is correcly inserted to Socket, {Be careful not to insert wrong pin, 4, EEPROM(U22) in DOC-200PCB may be inferior. ‘Try teplacing EEPROM. Be careful not to bend or damage pin when replacing EEPROM(Be careful of electrostalcs). 5.IfTCD 77 Error still exists even aller above check, replace DOC-200 PCB,Teo 78 EEPROM FLOOR HEIGHT TABLE SUM ERROR Point of Detection (@ Run GPU "Speed CPU 120-180 Applicato spptication | @ 1180-420 Wieaningl ‘Wien the value obtained by computing floor table sum value in EEPROM al one second interval not identical with the SUM value memorized in EEPROM, EEPROM(ATZSC256) = pee MY aor Height I or Hig 1 Udenied area” | NPLEX SPEC {Floor Height Tale Sum iS EEPROM creck |_ sum DATABYTE) . | reo 7ecteaR| [Actions to take) 41. TCD 78 may occur at the fst of powering ON at site ‘because floor height table is all cleared when going out from the factory. Be sure to perform floor height measuring operation before high-speed operation, 2, Check the DIP switch(No.2 of S¥M4) status in DOC-200 PCB, (Switch should be set to Wiite Protect side ) {Titis sotto Flash White, ROM data may have been destroyed when powering ON or OFF. (This ime, measure the floor height again) 3. Verily if EEPROM(L22) Socket is property inserted, Pay altention to pin No. when inserting pin, Be careful of pin bend or electrostatics, 4. Measure the floor height again, For switch(No.2 of SW) selting, follow the floor height measuring sequence specified in installation and maintenance manual. 5. After foor height measurement is completed, oor height table surn value will be automatically computed by the program and recorded in EEPROM, MTD 78 error stl exists even after floor height is ‘completely measured, error may be coming from EEPROM(LU22) error. So, replace EEPROM and measure the floor height again, 6. Ifthe problem exists even after above checks, ty replacing DOC-200 PCB,Point of | @ Run CPU a ii20-160 Teo 78 EEPROM FLOOR HEIGHT TABLE SUM ERROR Detection | speea cpu _| “PPM | @ pi180-420 [Meaning] — vimen te value obtained by computing foor table sum value wn aa EEPROM atone second inlerval snot identical with the SUM value “one ie st ot — morized in EEPR ‘may occur atthe fist of powering ON at site memorized in EEPROM. because floor height tabo is al cleared when going out {Diagram fom the factory. Be sure to perform for height a measuring operation before high-speed operation ay eaiegtT7 E | 2 checktne DI switche 2 of SW) staus 000-200 PCB a {(Gwitch should be set to Write Protect side) | Iftis set to Flash Write, ROM data may have been | cornantnd “i, destroyed when powering ON of OFF ° opt (Tis time, measure the faa height again) | Unused ea | | 5. Verily if EEPROM(U22) Socket is properly inserted fun te um |» 216°.| | Pay tenon pr No wen inserting pin see )- { Rootes rai Sum I ovo —eeprOW cHEcK "| i aaa | Unsenutea “ef ] +l. SUM DATA@BYTEL_| ¢ - —oxi700, | eco | [assets | Too 7a ser _™ Be careful of pin bend or electrostatics, 4, Measure the floor height again. For switch(No.2 of SW4) setting, follow the Noor height measuring sequence specitied in installation ‘and maintenance marwal. 5. After floor height measurement is completed, floor height table sum value will be automaticaly computed by the program and recorded in EEPROM, TOD 78 error stil exists even after floor height is completely measured, error may be coming trom EEPROM(U22) error. So, replace EEPROM and measure the floor height again. 6. Ifthe problem exists even after above checks, try ‘replacing DOC-200 PCB,ToD 80-83, DOR-230 PCB #1~4 Signal Input Error Point of Detection (@ Fun CPU Speed CPU (@ 01120-1580 © 0180-420 Application (Meaning) ‘When input port values read at 10ms interval in DOR-230 PCB(#I~#4) are not identical for 5 or more consecutive times and lasts for Soms. Diagram] TEDNOL_PCBNo. [PCB Selection Sv] InpulPor_[ “ADDRESS | 80,__| DOR.220¢@ ‘om._._PORT4 | 6x5000 0000 sna""[port 3 | 0x5000 0800 31. [DoR-2e0¢e ca PORT 1 | 0xS000 2000 (a) spore —[osot0 ate {a__] se ATS 900 2600 82. | DOR-2300] a PORT1 | _6x5000-4000 | a4 PORT2 | ~0x5000 4400 | (5) se | “ports | oxso00 4300 83 | DOR 230084 wn [_PORT1 | 0x5000.6000 Ca) PORTZ | 0350006400 (6) sve" [sors | 6x5000 6800 (Actions to take] 41. Check connector contacting status by DOR-230 PCB, PORT 1: INA. PORT 2: INB PORT 3: INC 2. Check the PCB selection switch status by DOR-230 PCB No. (Gelling should be as same as shown in the fet diagram) 3, Check the connection status of PCB Connector(MA) cable since there could be an error in PCB connection status and DOR-230 PCB, 00C-200 PCB, or other PCBs, 4, Visually check defects for input port HIC(MIA-E2) in DOR-230, PCB where the error occurs 5. Check the DC +43{V] voltage supplied to extemal devices(e.g relay, etc.) which is connected to input port in DOR-230 where the error occurs 6. Check the DC +5{VI, +15{V}, +24{V] voltage for PCE. 41) Check the vottage applied to DOR-230 PCB. (1) DC +5]V) : Connector SMIP/1, SMPIE (2) DC +15(M1 Connector SMPI2 (@) DC +24IM1: Connector PSII (4) GND: TP 10(Location : Between Connector INC and OUT) 2) Check the voltage applied to DOC-230 PCB PCB, (1) #51] => Connector MG/M, MG/S (2) GND => TP16(Location : Just above Connector MG) T.ICTCO 80 ~ 83 error exists even after above checks, 41) Try replacing the DOR-230 PCB where the error occurs. 2) Ifthe error has nothing to do with DOR-230 PCB, tty replacing DOC-200 PCB,ha 24/05 RSSC RELAY ON/OFF DEFECT t Point of | @ Run CPU Detection _| > Speed CPU 1120-150 Application | @ pi1a0-420 M2000) +0 94 : when the relay does not tum ON within S00ms ater RSSC ON ‘command is outputted from Run CPU. TCD 85 : When the relay does not tum OOFF within S00ms after RESC OFF command is outputted from Run CPU. (ojagranh Refer to 3x02218, CTL CIS) a 7 Som) a ROR. TEET remggenet age aggre g | wae oa | } “iP SP Hey oo. jee eres orR201 Ouro, rr Sora 095300 Refer to 302227, UO CI] ne coe stR209 icon otte 4 or.zia ce! Ce) Detecting LADDER ‘spss 08, Fasc : [Actions to take} First, Check the followings. ‘Check 48V power status. ‘Check the connection and contacting status for RSSC driving circuit. ‘Check the connection and contacting status for RSSC auxiliary contact input circuit Check the contacting status of MA connector between DOC-200 and DOR-230 PCB. 1. Check TCD 84. 41) Check RSSC Virtual /O Spec data 2) Check RSSC output butter. Check the data status al address 05300 after powering (ON. ifdata cannat be set, chack the vital UO Spec dala again, If RSSC does not tum ON with data set, replace DOR-230 PCB or check RSSC Relay operstion status, 3) Check the operation status of RSSC Relay. Tum ON RSSC. by force with RSSC driving circuit and check the ‘operation status of Coll and auxiliary contacts. Focus check on coil(No.13). 4) Check RSSC input buffer. With RSSC ON by force, check the data of address 0x5000. i there's no changes. found, ry replacing DOR-230 PCB, 2, Check TOD 85. Perform check by the opposite way of above item 1.‘command fs outputted from Run CPU. command is outputted from Run CPU. 4 TCD 86 : When C1BR does not tum ON within 500ms afler C1BR ON 4 TOD 87 : When C1BR does not tum OOFF within 500ms after C1BR OFF Co ° fp sen se | cremstpon.oeTct gies AS.CILIESYg roney Rear ASLCIBTEST g (Diagram) Refer to 302223, CTL CIB], ea cryoy” . ona Lassg, _STRLO7_o9a-230 ong RECS a gp Titty 168) corres erroe leon aecs, d Refer to 302227, 10 Cl] Pe oes crap, __ OAS oR230 Some at ° wae OSUIE Detecting LADDER oH} | Pointof | @ Run CPU fon | @ 01120-150, Tep ase? C1BR CTT ON/OFF DEFECT Detection. Spee ceu_| APPH8HOM | @ py 420.420 (Meaning) [Actions to take 1. Check the power status of C110 and P48, 2, Check C1BR coll and auxiliary contact for screw ‘connection statu. ‘Check the connection status of RC connected to CIBR coil body. 3. Check the connection and contact status of C18R ‘operation crcui(Drawing3x02223), 4, Check the connection and contact status of C18R ‘aunciary circuit(Orawing3x02227) 5, Check TCD8e, 1) Tur ON CABR by force and check the input butfer(0xS01E) data. If there's no changes found, try replacing DOR-230 PCB. 2)IF input signal is normal, DOR-230 PCB output buffer ‘may be inferior. 2)If the problem exists even alter replacing PCB, it may be coming from C1BR self defect 6. Check Toos7. Perform check by the opposite way of above item 5. 4) TCDS occurs even though C1BR OFF operation is normal, {ty increasing OFF DELAY TIMER value above S00ms 'TCDB7 does not occurs by this action, C1BR OFF's characteristic inferior.Poin of | @ Run GPO Te onzoiso co eee C1ST CTT ON/OFF DEFECT Detection | - Speed cpu_| APPIcation | @ Oy439.420 ann , : # TCO 88 [Actions to take} When C1ST doesnot tun ON win S0ms ater C1ST ON command i ouput rom Run CPU, 4. Chock he power status of C110 and P48 wtep a7 When C1ST does not tum OOFF within $00ms after C1ST OFF command | 2. Check C1ST ool and auxiary contact for screw is ouput rom Run CPU. connection tats, Check te conection stats of RC connected to C1ST call body, (Diagram) Refer to 302223, CTL Cla] cug Tate Loorz10 pce SSC RAL 5TRI.08 DORZIO oe cistyc Refer to 3102227, 10 CUt] cKO 00R-200 is cag walhe Twas OsS01E 3. Check the connection and contact status of C1ST ‘operation cicuil(Orawing3x02223) 4, Check the connection and contact status of C1ST auxiliary circut(Drawing3x02227) 5. Check TCD8s. 1)Tum ON C1ST by force and check the input butfer(0x501F) data. Ifthere’s no changes found, try replacing DOR-230 PCB, 2) input signal is normal, DOR-230 PCB output butter may be inferior. 23)IF the problem exists even alter replacing PCB, it may bbe coming from CAST self defect, 6. Check Te089, Porfoim check by the opposite way of above iter 5, i TCD89 occurs even though C1ST OFF operation is norm, tty increasing OFF DELAY TIMER value above 500ms, IfTCD89 does not occurs by this action, C1ST OFF's characteristic inferior.ToD 80191 ‘SUPPRESS ON/OFF COMMAND ERROR Point of Detection | (@ Run CPU Te 01120-150 Speed cpu_| Application Le 1180-420 Tieaningly to 60 \Whien Run CPU does not receive ON Feedback signal from Speed CPU within 200ms after it sends SUPPRESS ON command, eTcp91 ‘When Run CPU does nat receive OFF Feedback signal from Speed CPU within 200ms after it sends SUPPRESS OFF command, [Diagram] (Actions to take} 4. Verity f no error code has been detected from Speed CPU, Verity it DPC-12(oF 300) PCB is normal 2. This error could occur frequently when Run or Speed. CPU program has been changed. Check DPRAM sendireceive butler map again 3. Check the insertion status of connector connecting PCBs. 1) MA: DOC-200-DOR-230 PCB 2) VE: DOR-230~ DPC-14X(or 300) PCB 4. 1fthe error stil exists though there's no error found from above items, replace PCB by following sequence. 1)D0R-230 PCB. 2)0C-200 PCB 3) OPC-1XX(0r 300)Tops2_| ROTARY ENCODER DISCONNECTION (Motor Side) Point of | @ Run CPU Detection |) Speeicpu | APP {Meaning} when pulse counter value does not vary for 160msec while speed command value exceeds 15mimia afer Run CPU has sent cun command, or when brake ‘opens at high-speed running and pulse counter valve (for 640msec) does not vary in door zone & at stop areas except for leveling area, Weary THneoetuc! (Wet. Smd> 1880) ENCOOERLERROR DETECT ed Jeast_Runcommana —_Ai8_encO_MOTORCHECK { | sneer (Actions to take] 41. Check Rotary Encoder wiring ‘YTerminal 40T1/16 ~ 22 (Re*er to axort (Disconnection, fastening, Shield ine) Shield tine should be contacted to 2)RE connecting cable shoul be dines ‘control Termal(Never mix okner catiet s)Gheck DOR-230 PCB's RE ga of" status. 2 pane 2. Check DC 15V Voltage i Check the voltage between ‘Terminal nina) = 40T1/18(~ Terminal) 3. Refer to TCD 93/94, item 4 4. Check A and B-phase output votayur! MRE slomly with hand when pom On fh Acphase : 4071/22(+Termjnay = afm) Bephase :40T1/20(+ Terminal) = 4g! nal) Normal, o ‘Output votage i about aboye 7 sy uf my slowly sh 2)IF RE Output voltage is 0%. 45y whi! iis normal 5. theres no errors ound thom abovelf RE counlercreut EPMTO ga oun) be filed. This ime, ty reRjacing Poe! EPM7064LC44-15(U19).. "2230 may “ Je This enor may als occur when Brad penToo 93's | ROTARY ENCODER PULSE COUNTER VALUE ERROR Point of Detection Te Run cru Speed CPU Te o1120-150 Application a Le 01180-4290 [Meaning]y tcp 93 :ROTARY ENCODER PULSE READ ERROR ‘When R.E output pulse counter value read at 10ms interval is to be consistenlly for 3. or more consecutive times. @ TCO 94 :ROTARY ENCODER PULSE COUNTER VALUE ERROR ‘When RE output pulse counter value read at 10ms interval {is maintained 4 times more than the rated speed for 30ms. (Diagram Bi toves _ | [ive aun es y i \ —4__ minteeti “H [sy Teves (deta) > (DELTALT “Contact Speed" 4° PULSE_PER_METER 1690) ee - 1. Abs(delta): Absolute value of delta Actions to take] 4. Check Rotary Encoder witing 4)Terminal 4071/16 ~ 22 (Refer to 3302217) (isconnecton, fastening, Shield line) Shield line should be conlacted to GND within control panel, 2)RE connecing cable should be directly wired to control “Termal(tever mix other cables). 3)Check DOR-230 PCB RE and MA Connector insertion status. 2. Check DC 18V Voltage Check the voltage between Terminal 407 1/17( + Terminal) =" 40T4/18(— Terminal 3. Check pulse counter circu of OOR-230 PCB. 41) Check socket insertion status of EPM7084L.C44-15(U19), 2) Try replacing EPMTO64LC44-15(U19) 4. Measure the data change status up to ADDRESS (0x2508~012508 while rotating RE by force, with RE. separated trom motor axis, 5. There's very high possibilly of R.E characteristic interior, Try replacing RE, {ihe error sill exists after replacing RE. 1) Measure the difference between A and 8-phase with oscilloscope. 2) Check ifthe value is within 1/48 1/8,(Allowed value)a = Point of | @ Run GPU ‘1120-150 ae Safety Circuit Motion DETECTION Detection | =-Speed cpu | APPHeation | Oi160-420 detected by inputted RSSX RELAY OFF signal (Diagram) Refer to 3x02218, CTL CIS) poR.210 ec8 [Meaning] Wen an mechanical error occurs in safety system. This error is re oes crs crs vee? ges vio mara [7 errs ss) a5 8s OED Wags fines orzw Lessons [Actions to take} 41. Check Paav. 2. Check the connection status in RSSX driving circu. For detail circuit, refer to 3302218. 3. Check input buter Input DC 48V voltage inlo STR1-01(or INA-O1) terminal by force and check signal change of input buter(0x5001). 4. If there's no signal change, replace DOR.230 PCB since input buffers inferior.ToD 96 Run Mode Input Error 1120-150 Point of Run CPU Application ‘| pplication | @ 1180-420 Detection ___- Speed CPU {Meaning} when there's an error found in input of Run Mode Selection Switch ‘on Run controt panel and in upper ofthe car. (Possible cases are shown Actions to take] le 1. Chock he power status for P48 in contol panel, eto) Age and P26 onthe upper ofthe ca NO[ HIGH TIN_CAGE[ON_cace] 2. Check the Run operation board switch and OCL-240 PCB T[0 | One Ofine Two | (Remarks) connection ert z x 7 | °, :Safich inpet Esists (For detail circuit, refer to 3x02229, VO C[3}) zt x 2 {| x: Site input does not Eas 3. Very tO SPEC of DCL-240 PCB is normal 7D 7 a “eter to Table 1» 4, Check put buller status [Diagram] 1) Apply P48 into ONC-02 by force and check 0x5050 input signal eter to 302228, VO CPI 2) Apply Pa nto ONC-02 by force and check xSO4D inpat signal 7 raze 2) Apply Ba8 lo ONC-08 by force and check OxS04F a oe b input signal, 2 Sa OFF) oncoe tor maybe coming fromthe input butler =e \ Hfis-oa Sor replace DCL 240 PCB. NORMAL on ae facncm _|_appress | pata enoe La enor sq_ptionma. am Sryvau mart a carne | Lote 2 ow ante oxiBit Ox4e oat ee IS_C43 0x1B14 o lec oe 20 ox1B15 0x50 1s_p43 oxi816 ° Ox1B17_) 0x54 Table 1»Tc 97/98 | Car Door/Landing Door Switch Motion Error Pointof | @ Run CPU Detection |) Speed CPU 1120-150 Application oe [Meaning] When R2CD or R2LD is stil ON after one second after Door Open command has been outputted. TCD 97: When R2CD input is ON{continuousHy). # TCO 98 : When R2LO input is ON(continuously). (iagram) (Diagram) DOR-210 PCB Ree io 30200, GF rit) {CAR Door Locking [EHH cosas PS RCBIS LOS. ys L0S-03 “E STRIOS. i og ex Reerio 57,1 cc coms | wax strato pee is RAD Lets Cod OmDI8 aowai Pee reer iooaaie OLGA pa (pour cous steesd FOZ) vaso ens vase oon co STR 7 TiB.08 axsor OORT CB [Actions to take] H.check the gate door and landing door switch status ‘Check the DC22V voltage of P SOURCE DC48V and DOR-230 PCB. = PWS/1(DC22V)~ PWS/4(GND) J2. Check gate door switch(R2CD) 1) Check circuit wiring status. (For detait circuit, see 302219) 2) Check the 0x5018 signal varying status while turning ONIOFF the gate door COS switch by force. 23) input signal is aways ON, DOR-230 PCB input butfer is inferior.(This time PCB should be replaced.) 3. Check the landing door switch status(R2L0). 4) Check the circuit wiring status, (or detail circuit, refer to 3x02220, 302227.) 2) Check the contact status between R2LD Relay Coil, of ausiliary contact. 3) While turning R2LD relay ON/OFF by force, check the signal change status of 0x5019, 4) Iinput signal is always ON, DOR-230 PCB input butter is inferior.(Ths time, PCB should be replaced)Tones Double fi input Signal Error Point of | @ Run CPU (@ Dii20-150 lication Detection «1 Speed cpu_| APPMCAHON g oi180.420 {Weaning|Wwhen double input signa data from Run CPU and Speed CPU is maintained for 200m in diferent status. This eror detection functions to prevent mis-operation caused by double input data detect (Diagram) impat_] DOR-ZIO] Ran CPU Speed PY Rated Sienat | Conn, No| input ADD] gut ADD] Ciel Dagan SCIST [NAS — [oxsovF e227 [OCH iS_CiBR [INAS [OxS0TE | ssc | iNCIT [Ox5000 7 NAT |03S005—| [INci2|oxs0is [SS (INET [oxs022 psx02228_ [VO Cia iNBr2 [035026 Were [05076 sroamid [CTC [Actions to take] 1. Check connector insertion status between PCBS 41) MA: DOC_200~ DOR-230 PCB 2) VE: DOR230~ DPC-1XX(or DPC-300) PCB 3) INA, INB, and INC connector in DOR-230 PCB insertion ‘talus 2.Compare double input signal status. ‘Compare and check the input signal status of Run and ‘Speed CPU shown in the len table 3.Check input butler status ‘Operate, by farce, the devices that consist the diagrams listed in the lef table to check input signal variation, Ino signal changes have been founded replace OOR-230 PCB as the OPRAM elements between input buller or Run and Speed CPU are possibly been defectedPoint of | @ Run CPU ‘@ 01120-1501 Application ¢ Oh a0 as0 Detection | ~’ Speed CPU TcD 100/106 | $D1D~7D ON Error [Meaning] SD1D~S070 does not operate at the bottom floor. {Actions to take) '* To prevent any possibie clash acxidents caused by ferced reduction funeion act working at botiom floor on account of ary ON eirrs such 1. Check wiring network for LIMIT SAW D7 hon, |. check fer bad connection of MIC and signal voltage ae ‘<< SAW SKELETON >> 2. Check the operation of input bufer ne peer enns 1) Verity if vltage changes from 48V to OV at the operation ef SO1D . eae a “7D, an : UE 2) Check the addiess value from NVRAM READ MODE of Ann (Refer to HW SKELETON) oe o (Normally, OFF shoud be changed into x00 atthe operation of| 5 |S_SDID{ADDR.0«5007)) 3) For 180 or more minin, reer to HAW SKELETON chasing (3X02228 a wos soe suomi) ew.FR| ioe {srs oma} Y} 2. Chackany bend UMUT SPW CAM o a eestgiaala om ft oma} tegen Cet _Peer=t Ea. mers‘Tepto713 | SD1U~7U ON Error Paint of Detection Te Run cpu » Speed CPU Dir20~150, Application | @ Olt20~180 [Meaning] SD1U~7U does not operate atthe bottom floor. " To prevent any possible clash accidents caused by forced reduction Tuncion not werking at bottom floor en account of any ON errors such (Diagram) << SWSKELETON >> lene cero MT StAERA RANT SM En Da FAS Ri CORO at HE +H 9 ery pron np_Tes0R= DesDSR {corer} a -¢< HW SKELETON >> 22S0'U-7U deposition ete [Actions to take] 4. Check wing network for LIMAT SA (Check tor bad connection of MIC and signal voltage 2, Check the operation of input buffer 1) Venty if vottage changes from &8 to OV atthe operation of SDIU -70 2) Check the addess valve from NVRAM READ MODE of Ann (Refer te HW SKELETON) (Normally, O:$F should be changed into x00 atthe operation of 1S_SDIUADOR.0x500F)) 3) For 180 or moe minin fefet to HY SKELETON drawing (2202228 woo.) 3. Check any bend of LIMIT SAW CAR 1) Visual check LMT SAV CAM for any bend 2) Vey it rler does not deviate trom the CAN when cage it tuctuated right andleft vat ear,Te0 114/118 | POS! ON Error Point of + Run CPU (© 1120-150) Detection | “Speed cru_| APPHCAtION | @ Di1g0~420 [Meaning] When location detector operation is unreasonable while car stops oF is ‘unning(Operates at the stop position or stops at the operation postion) @ TCD 114:LDC ON Error @ TCD 115:LDCX ON Error @ TCD 116:LDU ON Error @ TCD 117:LDD ON Error @ TCO 118: LOP ON Error [Actions to take} 41. Check PasV power. 2. Check circuit wiring and connector contact status. Refer to diagrams, 302219 and 3x02228, (Detailed Circuit Diagram) (O/agram) 3. Check signal changes of input buffer while applying P48V power to connectors listed below. ino signal ee changes are found, replace DOR-230 PCB. = cu Device [DOR 230]. Inpat_ [ADDRESS], Cheut Dagima 7 Name ~|‘Gonn No, {~~ Signal sypasta seta y29_1p0 year poR2I =] toc | waves [is toc | oxsoat_[ oats Tem ca] oo} ws Ubex | wa/o1 [1S LOCK | 045022 Vo cp | Pace N27 [oss U50 [NBA 1S 100 | os024 1O-CBL eS Lou__[ mers [iS tpy | oxsozs | si02228 | v0-cLa | ac ops Lop [eos [1S LOP | ox6c25_| 302728 | vo CIz] ve ora = (eae) i : 4. Check POS! operation status ae 7 Goce charge of soected np be wt forcing shield of the POS vues ona ; 5. Check the distance between POSI and shield plate. 3 | ‘This time, place the shield plate end at the red- eas oa ‘marked point of each POS! va Donte 1 See} mat wow pis LOS v0 onan 4 [say(@ D1120-150 7 Point of || @ Run CPU Too 14 SOS Error 1180-420 Detection | Speed cpu _| plication [Weaning] hen S08 input signal is unreasonable while car stops or is Uctions t0 take} running( then no signal is input ted at operation position oF signal_is inputted at stop position) feo eae a aoe 2. Check circuit wiring and connector contact status. (viagras\ (Roter to detailed circuit diagram 332228) 3, Check input buffer status, a vrei ere ae aE Check signal changes of input buffer while applying Feet 88min 08 80H 08m/m wakes LESSEE e tea ES | comme | (CaP a HS SOU SEF mn bes SSD) oso) 160 Pas ee ee a) ee eee eet oe ag insiio ls step _[asica a0 L art ae as) Is som lnsins 70) ee [| __ sw wegoe_ntican coms am (+ oyete 1) $04-6U(0) is connector No. of GOR-230(2) P08, ia no ee If there is no signal difference input butter say be 15 7 failed (Peptace C3) 00 wn wage con Scere ae 5 - Check signal input status while operating SO1~6U(0) 50 reget azo sot ealaites alter wesTep 120 UL Error Point of Detection | (@ Run cPU " Speed CPU (@ 01120-7150 Application | @ pii80-420 [Meaning] Detecting ON / OFF errors of UL Swit. {Explanation} 1. While EJLis running up, UL does not operate even though the EM. has run up sufficiently ater SDIU started 2. UL continues operating even though E/L as run down sufficiently to turn (OFF SD1U as well as LDC and LDCX. 3. UL continues operating though E/L has run down about 1m after UL. started 4 Input butfer and operation voltage check Check input butfer signal and operation voliage while operating the switch compulsorily Deve [pa BUTE ‘Speration Volage Check Name _| Address Operation Status _ Non-operation Status __| a UL_|_0x5005_ ‘Vt Bot USWA and Ground DCOV_| Wo. Bet_LSUIDA and Ground: D4 SDI UxS00 —[ water an Ge ocr | Wx not GeO [SbiD—[oxs007 — [won nasa crane or | va 8 eh a Oa (Actions to take} Bees Er un Gown below seer zone 1 Check wiring such as MIC connection fallre, ete (Vol. Check} $Eea al pvcalesieerpoamana SENS itn gure tteTeo 121 DL Error Point of | @ Run CPU Application | Detection |“ Speed CPU 1120-150 @ Di180~420 [Meaning] Detecting ON/ OFF errors of OL Switch Actions to take) [Explanation] 4. While E/Lis running up, DL does not operate even though the E/L has run ‘down sufficiently after SD1D started, 2. DL.continues operating even though E/L has run up sufficiently to turn ‘OFF SD1D as well as LOG and LOCX. 3. DL continues operating though EM. has run up about 1m after DL ‘started 4 Input buffer and operation voltage check Check input bufer signal and operation voltage while operating the ‘switch compulsorily Device |Input Butter ‘Operation Vollage Check Name | Address [Operation Status ‘Not-operation Status DL__[ 016006 | Var te ws0otandGrond_060/ | val ba Sb04and Gowns. oa UL [05005 | ‘var. ba sunt anti Dcoy | vot at .5U0¢and Gin Cea ‘SO1U_|_OxS00F [vo ot mons anecrune Ocov | vo. Bi UE and Gru SCAB SOD | Ox5007 | Vou ser neo and croonDoa | ol. a OS and Gru BOB _ 5G0R zat (Gs dawn over SO) Bees Eitan ‘pel door zone over a0 wpovee LON Ere (ox orem] Geena} 1 Check wing auch aa IC connection aire, wie (VOR Cheek) 2.Cheek MIT SW CAM and roller Bracks aie, 3 neck DL sich epteon tree reposTCO 124 PDL Error Point of | @ Run CPU = DIN20~150 Detection |“ Speeacru_| APPHEaHON | @ pi180-420 Meaning} Detecting any errors of POL unit that uses floor infornation calculated by car slide at power falure as synchronous floor ‘compensation at power recovery (Explanation) ‘Variables in which PDL failure causes as below "Address of PDL_Sis_Erris Oxt5F6 [Actions to take} “Check DOR-230 PCB. ‘)Venity if BAT.CCN1,CCN2,and PWS CONNECT are normally Connected to BATTERY and POL MIC respectively, 2)Venty if a terminal resistance is set up in DIP SW (1D SW-2), 3)Check PWOT LED status. + Flickering at 500s interval: Normal communication. Flickering at 2s interval : Normal MICOM, ‘Abnormal communication Verity No.7 SMV of DOC-200 PCB SWS is Off ‘And then check the below ltem. 2. “POLS Err amr 2 ilthe Bis show toe set Ten ke ‘When Toor eight coun valves beyond he specieaon, | wa Selon indicated a below. _ Wher increase of for neigh counts over‘ bt a saonslotoe [Linen POs! inputis abnormal. —_—_—SSSSS*d ‘When there is a discrepancy between car running directior bo.bt, h patats_| Sheek each connector for connection status b2_| Veily CONT ad CON? cofnectr for connection be | Read the spec ($0018) of EEPROM and check the status of set or reset by | f)oheckP SOURCE for LON side 22V FUSEIFIF2). ‘and count value increase or decrease. a When there is a discrepancy between foorheight value | py thal is counted by Run CPU and that by POL unit “Though synchronous locations compensated into bottom] pg top floor, the floor location count of POL units not same. When POL unit does not exist or was not enabled by spec] yg ‘communication is not norma When PDL back-up memory is damaged o7, 2)Dismantle battery and check votageOver 10V normal 3. Alter checking above item 1 and 2 take actions by, ‘moving the car tothe bottom or top loor and. Clearing the address Ox15F6, 052515 in NVRAM area {through DOA-100 PCB.owe Top 125 BRAKE OFF Defect Pointof | @ Run CPU Detection | -’ Speed CPU ‘@ 0120-150 Application 2 se [Meaning] Detecting defection of brake nat opening, [Explanation] ‘Though C1BR CONTACTOR is ON, 1) High speed operation, ad is notin micro-leveling time; Car's below &nvmin speed for 15 or more seconds. high speed operation or in slack rope compensation, ‘These slates are detected as brake OFF defect < Related HW SKELETON > | (Reterto 3x02222, CTL CIT] al 2) Below &mimin speed for 15 or more seconds while car isnot in [Actions to take} 4.Check power source to see if MG.BR side FUSE(F6) is disconnected or not. 2.Measure the voltage of MGB-01 terminal CBR ON: DC48V~ DCsOV (C1BR OFF: DCOV 3.Check C1BR for ON/OFF operation inthe LCD screen of ‘DOA-100 PCB. CIBR ON : “17s displayed on ine 10 and row 3 of LOD screen, C1BR OFF: 07s displayed on tine 10 and row 3 of LOD screen 4.check C1BR and C1ST contactor for operation and contacting status 5.Separate BR MIC and measure the resistance. Between BR-O1 and BR-02; About 20: Between 8R-02 and BR-03; About 3302.Too 129 Motor Overheating Point of | @ Run CPU Detection | “ Speed CPU Te oit20-150 Application |S Oe So (Meaning) when a motor thermal inputs received by motor overheating, {Explanation} (Actions to take} 41. Tum OFF power and check if there is any ‘overheating in motor. motors actualty overheated, wait unt motor is cooled and then input power again. 2. Check wing for MIC connection error, et.teo130 | Poter meter(Differential Transformer) Input Error T@ Run cpu Speed CPU Point of Detection | ‘@ Di120-150 Application | @ pii80~420 (Meaning] Poteniometer(Citferential transformers) load value is abnorral {Explanation| 4L.Without NO LOAD POINT and FULL LOAD POINT values set, data from differential transformer read is OOH / FFH and is repeated S.or more times, 2.ith NO LOAD POINT and FULL LOAD POINT value set, detected load is blow -25% or over 135%.(This time load should be 110%.) ‘These status are detected as differentia transformer input errors {Actions to take} “ln case of Ditlerental Transformer 4.Check power source to see if HLTCVT side FUSE(F1) is disconnected or not 2Measure the voltage between CVT-O4 and CVT-02,(AC 110V) Measure the voltage between CVT-05 and CVT-06 (AC 24V) Replace CVT if nol AC 24V produced. 4.Read the oulput value of diferential transformer through DOA-100 PCB (ABBE) This time, 2 diferential transformers wil all be isplayed on the LCD screen, check the quantity of differential transformers, both CHT and CH2 value are OOH or FFH, check the MIC(OFTR) of differential lwansformer for connection status, ‘Nery if differential transformer is correctly ‘sel(Red line). 6 Re-set NO LOAD POINT and FULL LOAD POINT. ‘This time, set NO LOAD POINT at NO LOAD status, and then Set FULL LOAD POINT al FULL LOAD status. ‘In case of Puteniometer Refer to dpage of Test & commissioningTeo 132 DOOR OPEN LOCK Point of Detection | fe Run cru Speed CPU Application @ D1120-150 © DI180-420 [Meaning] [Diagram] He SWWD_Je_Slop SWO_IVILOOLS) ‘When door does not open for 10 seconds, after door open command has been sent from high-speed operation mode. (Please, check SM SEQUENCE) SH0-Cenen ENS STATE] aH He (OPEN LOCK DETECT. TIMER FINISH STATE] (AUTO_D0OR’ Clos ‘ACD_D20r_Code ‘S80 _General S ‘2c0_eo00_0C OPEN LOCK OETECT. TIMER {8W.65.0PEN.ZON 18 sa [Actions to take} 1. Check Landing Door Status (LDS) (Check all aspects of Landing Door openiclose status, (Gill gap, landing door bend) 2. Check Car Door Status (COS) 41) Check openvelose status of Car Door. 2) Check OLS SET values, 3. Check openielose status of Car and Landing Door ite. 4. Verify DMC CUT of machine box is setto NORMAL position. 5. Verity i OPEN command is sent. Row? and line13 of DOA-100 LCD is 1 means that ‘open command is being made, and DMV-16 vollage toe FL np fh OPEN_LOCK_DETECT_TIMER oPEN_Lo¥ 10 see 10K DETECT _TIMERIFISH_ STATE] aT Tee] ee When DOLS signal isnot inputed, 10 seconds after OPEN command. is0.7V2 0.1V means that current TR turns on and open command is being normally outputted. 6. Check DOLS wiring and input buffer operation (0x5026) 1) When door fully opens and strikes DOLS, row3 and. line5 of DOA-100 LCD becomes 1. When R2LD RELAY LED becomes OFF, DOLS input is normal. 2) Ifno changes are found, check voltage of wiring course up to DOLS input butter. (For deta circuit, refer to 3x02228 VO C{2)) 3) In door open, OV of input buffer INB-02 voltage is normal 7. Check COS(Car Door Switch input butfer (0x5018) For detail circuit, refer to 3302219 CTL C4] 8, Check LDS(Landing Door Switch) input buter(0x5019). For detal circuit, refer to 3302220 CTL Cis] and 3902227 VO CII}.Teo 133 DOOR OPEN LOCK REPETITION DEFECT Point of T @ Run cru Detection (@ 1120-150 Speed cpu_| APptication @ 1180-420 {Meaning| Wnen door doesn't open 3 consecutive times at stop, wononn eae ‘SW Je_siopS¥0-1M_DOLS] [cdl ‘TMC Check(OPEN_LOCK DETECT. TIMER FINSH STATE) TMG _checx(CLOSE LOCK DETECT TIMER FINISH_STATE) ‘Sw _Genecal S| oo eens SHORE zon yp tutte bore OPEN ONE na Ht fee t - : (OPEN_LOCK_DETECT_TIMER) 1c creaworen Lock, : mereStnrnion Stare) ESE a — tt iF ranean Ca [Actions to take} 1. Check Landing Door Stalus (LOS) Check all aspects of Landing Door openiclose status (Gill gap, landing door bend) 2. Check Car Door Status (COS) 41) Check openiclose slatus of Car Door 2) Check OLS SET values. 3. Check openiciose status of Car and Landing Door fited 4. Verity DMC CUT of machine boxis set to NORMAL positon 5. Verily that OPEN command is sent Row? and line13 of DOA-100 LCD is 1 means that ‘open command is being made, and OMV-16 voltage 1S 0.7V+ 0,1V means that current TR tums on and open command is being normally outputted, 6, Check DOLS wiring and input butter operation 0x5026) 1) When door fully opens and strikes DOLS, row’ and line18 of DOA-100 LCD becomes 1, Whien R2LD RELAY LED becomes OFF, DOLS input is normal 2) If no changes are found, check voltage of witing course up to OLS input butter, (For detal circuit, refer to 3x02228 VO Cf2)) 3) In door open, OV of input butfer INB-02 voltage is normal 7. Check CDS(Car Door Switeh) input butter (0x5018) For detal cicult, refer to x02219 CTL Clé}, 8. Check LDS(Landing Door Switch input bulfer(0x5019), For detail circuit, refer to 3302220 CTL C{5] and 3402227 VO C{t}Teo 194 DOOR CLOSE LOCK DEFECT Point of Detection T @ Run cpu Te 01120-1509 = Speed CPU Application | @ pi180~420 ueaningl wen door does not close for 15 seconds after door close command has been sent from high-speed operation mode, (Please, check SMV SEQUENCE) (Diagram) oo %60-Deor OCO_Door ‘ACD_Door_Code sues sop 1€.860] foe AUOKING] ABUTS FOUR. cLose je pe suo cere 7 fa a Mc checkout into eee oes ee ee DereST Ten ion sTare) TMECMeCLOSE LOCK v0 5, SO cereals (M_0OLS] [sw _Gs_OPEN_ZONE|| tec ot j Tc a 3 {CLOSE_LOCK_DETECT_TIMER) re _checnctOse Lock pereer amen eh Are) Teo ie, cecktose, took —__— See Tyee SE) Toes Ha [Actions to take} 1. Check Landing Door Status (LOS) Check all aspects of Landing Door open/close status. (Sill gap, landing door bend) 2. Check Car Door Status (CDS) 1) Check opentciose status of Car Door. 2) Check OLS SET values. 3. Check openvelase status of Car and Landing Door fitted 4. Verify DMC CUT of machine boxis set to NORMAL postion. 5. Verity if CLOSE command is sent. Row2 and line14 of DOA-100 LCD is 1 means that ‘lose command is being made, and DMV-16 voltage is 0.7V2 0.1V means that current TR tums on and open command is being normally oulputed. 6. Check DOLS wiring and input butfer operation (0xS026) 41) Normally, row3 and line12(LDS) and row3 and line13 (CDS) of DOA-100 LCD is 1, aler DOOR CLOSE command 2) Ifno changes are found, check vollage of wiring course up to, CLS input butler. 3) In door close, OV of input butferINB-13 voltage is normal 7. Check CDS(Car Door Switch) input buffer (0x5018) For detail circuit, reer to 3402219 CTL CfA] 8. Check LDS(Landing Door Switch) input butfer(0x5019) For detail circul, refer to 3402220 CTL Of] and 3x02227 VO Ct].T0135, DOOR CLOSE LOCK REPETITION DEFECT Point of Detection @ Fun CPU Speed CPU Dit20~150 @ 1180-420 Application {Meaning} When door close error lasts over + minute ‘Tc_check(CLOse_LOCk._ OETECT. NER FINISH. STATE) (0iagram 0. S09 entre Boor ctosey {yp yp pO eoren wh aon suo _cerea.0 iereteag —— 1 a ‘TMC_Check(CLOSE_LOCK_ S0SEC_TMER FINISH. STATE) ‘wo! Ng SND_General § MDOLS} _[SW.G8_oPrH ZONE} “waa At “econ check out = t= {CLOSE LOCK DETECT NIMERY TMC_check(CLOsE LOCK DETECT. TmMER FINISH STATE) ‘c_cheek{CLOSE LOCK S0SEC_TWER FINGH_STATE) 00 135 Aine (Actions to take} 41. Check Landing Door Status (LDS) Check all aspects of Landing Door openiclose status, {Gill gap, landing door bend) 2, Check Car Door Status (COS) 1) Check openiciose status of Car Door. 2) Check OLS SET values. 3. Check openvelose status of Car and Landing Door fits, 4, Verity OMC CUT of machine box setto NORMAL postion. 5. Verity if CLOSE command is sent. Row2 and ine14 of DOA-100 LCD is 1 means that close command is being made, and DMV-16 voltage Is 0.7V 4 0.1V means that current TR tums on and open ‘command is being normally outputted, 6. Check DOLS wiring and input butter operation (0x8026) 4) Normally, ow3 and line12(LDS) and row3 and linet3 (CDS) of DOA-100 LCD is 1 after DOOR CLOSE command, 2) Ifno changes are found, check voltage of wiring course up to DCLS input butler. '3) In door close, OV of input buffer INB-13 voltage is normal 7. Check CDS(Car Door Switch) input butter (0x5018) For detail circuit, refer to 3x02218 CTL Ci]. 8. Check LDS(Landing Door Switch) input butfer(0x5019) For detalctcuit, refer to 3402220 CTL CIS] and 13302227 0 Ct}Point of | @ Run CPU ication | @ 1120-150 iirc | canatsoemmatan Detection |: Speea cpu _| APPMEaHON | @ Dii30~420 {Meaning} in case that Run CPU does not receive ALP control signal(XC9A, xCaB, _ | [Actions to take) X95) from Speed . But Speed CPU does not make ALP break down signal. | 4 check te communication line ALP to CP. 2, Replace DOR-230 PCB = Speed CPU cannot send signal to Run CPU due to bad DPRAM of DOR-230 PCB. ‘3. Check the communication cable among DOC-200, DOR-230 and OPC PCB. ‘4. Check if ALP is under break-down [Explanation]Top 138, NVRAM Error Point of | @ Run CPU Detection |» Speed CPU Application | § 1120-150 1180-420 (Meaning) When there are error in NVRAM of DOC-200 PCB, [Explanation] NVRAM errors are detected when 1. values in a specific area of NVRAM are not consistent during power input 2. floor height table SLM error occurs(Refer to TCD 78). [Actions to take) 1. With power OFF, visually check NVRAM(U18,UU19,U20,U21) in. 006-200 PCB for soldering status. 2. Replace DOC-200 PCB if same error occurs repeatedly ‘even though power was inputted again,Teo 140 NVRAM BATTERY DISCHARGE BELOW RATED VOLTAGE, Pointof | @ Run CPU eo Detection | Speed cpu _| Application [Meaning] When the voltage of NVRAM battery in DOC-200 PCB is below 2V, {Explanation} @ D1120-420 [Actions to take} 1. With power OFF, separate battery connect to 000-200 PCB and measure the voltage with voltmeter, Inthe voltage is below DC 2V, replace the battery which is over-discharged 2. After replacing battery(his time, correctly position poles), input power again and check any terror occurrence. * How to check bate votaoe ‘ith bate sti ted to connecter, contact Lead Pinole equipment (©. Dum) on GNO Test PinTP16) aed Batery Hows ea wie pins) (Or with 5] power applies, separate balay Hom connector and enec he vollage wih eat equipment such as DMM, ee 1) Norma: #26221] 2 Battery Houshgs red wre back wie =""(6ND) Mow change ay Wot vtogtson 210) delete ay shou be ele th 90m ts ‘ne vtage mtbr, at back nln dei ae [FM a RTC Cap. = Tics ack dal ba Woke en 5 peer OF. 2 vender 3.6 1204 van, tay sepa tom cone. a SV poet OFF bck lava a olen.[reo | Clock Element Error Point or | @ Run CPU Detection | Speed CPU i120~150 Application | @ pii8d~420 [Meaning] When there is any clock element error in DOC-200 PCB. {Explanation} [Actions to take} 1.Tine setting AS3€) 2.Tum OFF power and visually check the clack element in DOC-200 PCB(UZ3,RTC72429A) for soldering status, et, 3. Replace DOC-200 PCB if same error occurs repeatedly ‘even though power is inputted againTeo 142/143 C1BS CONTACTOR ON/OFF DEFECT Point of Detection Run CPU Speed CPU. | @ Di120~150 Application | @ pi1a0~420 Meaning} Detects ON/OFF errs of C1BS CONTACTOR. (Explanation) 4. ACIBS CONTACTOR ON defect is detected when C1BS input is not performed within S00ms after Run CPU operates C1BS CONTACTOR with power ON : TCD 142 2. AC1BS CONTACTOR OFF defect is detected when C1BS input continues, ‘over 500ms after Run CPU stops(or does not start) C1BS CONTACTOR. :TeD 143, < Related HW SKELETON > Refer to 3X02223, CTL Ci8} i _ pool ? Sarl f 7 7 igs mye nig mee wn 6 Ps ota Refer to $X02227, 10 CUl] CIBS}YC MCFS16 RCAGT ROASO? NAZIS _DOR230 EGET Tit oe ox020 Weis [Actions to take} 4, Check 6110 and P48 power condition. 2, Check C1BS cols and auxiliary contact screws for fastening status. Be sure to check the connection status of RC connected to C1BS coil end 3, Check C1BS driving circu for connection and contact status Diagram: 302222). 4. Check C1BS auxiliary contact circuit for connection and Contact status(Diagram: 3x02227). 5, Checking TCD142, 41) Check input butfer(0xS20F) data with C1BS forcefully ON. I there is no input signal, try replacing DOR-230 PCB. 2) Ifinput signal is normal, OOR-230 PCB output butter may be failed. 3) If same problem exists even after PCB replacement, CABS itself may be interior. 6. Checking ToD143. Carry out check with opposite condition to tem 5, fa TCD143 detect is detected though C1BS OFF ‘operation is normal, try increasing Off Delay Timer value over 500ms. i no TCD 143 errors found this lime, the detect comes from C1BS OFF characteristics, interior,r Teo 144 Power Failure Detection (By 5V Power) Point of | @ Run CPU Detection __ Speed CPU Te pirz0~150 Application | @ O'120~150 [Meaning] Power failure is detected when OC +5{V], power is applied {rom SMPS to DOC-200 PCB, falls down to +4.8[V| or below. [Explanation] tt jit ae {Figure} 000-200 PCB's +5V Power Fallure Detecting Circuit When DC +51 powerQ4G, AGE) PS applied om SMS to DOC-200 PCB falls coun to +4.8{V}0r below, +5{V] Down detocing sina LL (LOW LINE is evertod into"Low ty U2(MAX7S) elmer in 00-200 PCB. And then this Low signal deveeps Power Fal Inerupl(PF-INT} in U1(80960KB) CPU Then, CPU caries out Power Fala interapt Hand). [Actions to take) 1.11'006-200 PB is in Down and 4 Vols voltage is apo, ‘ol +5M, TOD 144i judged to result rom normal power fale 2. Check the vltge apptied to DOC. 200 Pa, {ATCO 144 ocears even when tho voltage is normal 4 840.05 ¢ mae), (TCD 144 does not cccur even when the volaga x abnormal + ENVLO 051 or less, etrisusgod to resi em a DOC-200 PCB er (Check te #6 valiage of 000-200 PCB again ater powaing OFF andthen (ON the contd pancltoseeiTTCD 144 does oceu a net 4) WTCD 144 exists ren thaugh he vltago is xa, ‘ny replacing DOC 200 PCE, 2 Also iFTCD 14 doesnot occur though th vag is abnormal ty replacing 000-200 PCB 3. Check the wltage of +5] uit erminl of MPS! SIV}. 154 {osoeifitis witin (VIE 0.1) or nt while the contl panes spied by ox power. 4) fhe votage measuredis too low, sel th vollage tobe w(t 0.1V by _austng the varibl resistance ol SMPS, 2) he voltage of SMPS' +5 opt terminal snot agustable or TCO 144 coaurs 2-3 oansncave times, replace SMPS.Teo 145, INV DOOR Control Error Point of | @ RunCPU ication | @ 1120-150 Detection | Speed cbu_-| “pple Meaning] Error is detected when INV DOOR contra section checks and sends an error occurred in INV DOOR to Run CPU. [Explanation] Various errors oceurring in INV DOOR and corresponding DCD-20X PCB LED status are as shown below. LeD DESCRIPTION DISPLAY tot | _ cPUFAULTDISPLAY 102 | OPEN/CLOSE COMMAND SYNCHRONOUSLY _| FLICKERING 3 | OVER-SPEEDIMIS-INSERTION OF ‘J6" LOWIOVER VOLTAGE, MIS-INSERTION OF ‘J2" L04 | _ MOTOR OVERHEATING a tos | IPMFAULT DISPLAY on When INV door control error occurs, door operation wil stop. (Actions to take} 41. Check DCD-20x PCB status. 2. Re-check the door machine test drive according to the Trial Operation Procedures of Door Machine {rom Installation and Maintenance Manual.Too 146 | FLOAT SWITCH ON DEFECT Run CPU. T Point of Seeadceu | Application Detection Di120~150 Le 01180-420 [Meaning] when FLOAT SWITCH which notifies the time for drainage of ai-condtioner mounted in CAR fails. (Explanation) Float Switch ON error is detected when Float Switch input lasts, ‘over 10 minutes in CAR AIRCON. drainage tank. << Related HI SKELETON > Reefer to 3X02228, 10 C[2) = aac FLOAT sw a 048 [saRancP ‘OxS055 Actions to take] 1.Check wiring for MIC connection inferior, ete (2-11 terminal voltage check) FLOAT SWON : DC4sv ~ OCs0V FLOAT SWOFF: DCOV 2, Read $5033 address in NVRAM area by means of DOA-100, PCB and verity if selected Bits are set 3. Check FLOAT SWITCH operation and replace itTep 147 Detection of Car restriction status Point of | @ Run CPU Detection | - Speed CPU Te pi20-150 Application | @ o1180~420 (Weaning) In case that the error whichis related to POS! break down are ‘occurred more than 3 times at the same time, [Actions to take} 1. Refer o each POS! TCD Trouble shooting manual on TOD 114 ~ 118, 250 ~ 252