Robust Transmission of H.
264 Coded Video Using Three-Stage Iterative
Joint Source and Channel Decoding
Nasruminallah, M. El-Hajjar and L. Hanzo
School of ECS, University of Southampton, SO17 1BJ, UK.
http://www-mobile.ecs.soton.ac.uk,
Email: {lh}@ecs.soton.ac.uk
Abstract— In this paper we considered jointly optimised source
and channel decoding, while employing serially concatenated and
iteratively decoded Short Block Codes (SBC) combined with a
Unity Rate Code (URC) and multi-dimensional Sphere Packing
(SP) modulation. The resultant coded signal is transmitted
over non-coherently detected Multiple-Input Multiple-Output
(MIMO) Differential Space-Time Spreading (DSTS) designed for
near capacity joint source-channel decoding (JSCD). The perfor-
mance of the system was evaluated by considering interactive
video telephony using the H.264/AVC source codec. The source
coded parameters generated by the state-of-the-art H.264/AVC
video codec typically contain limited natural residual redundancy.
Therefore, to improve the error robustness of iterative source-
channel decoding (ISCD), SBCs are incorporated to impose
artificial redundancy on the source coded parameters. The
natural residual redundancy after source coding and the artificial
redundancy due to SBC coding is iteratively exploited in a
turbo process to improve the overall Bit Error Ratio (BER) and
objective video quality performance quantified in terms of the
Peak Signal to Noise Ratio (PSNR). The convergence behaviour
of the advocated MIMO transceiver is investigated with the aid
of Extrinsic Information Transfer (EXIT) charts. The proposed
system exhibits an Eb /N0 gain of about 22 dB at the PSNR
degradation point of 2 dB in comparison to the benchmarker
scheme carrying out DSTS aided SP-demodulation as well as
iterative source and channel decoding, when using Isystem = 5
system iterations, while communicating over correlated narrow-
band Rayleigh fading channels.
I. M OTIVATION AND BACKGROUND
The design of digital transmission systems is generally
based on two main objectives, namely coding efficiency and
error resilience. Maintaining coding efficiency requires us to
transmit the minimum amount of information while main-
taining a certain quality criterion. Error resilience is typically
achieved by employing channel coding techniques at the cost
of decreasing the coding efficiency. However, bandwidth is a
valuable commodity and therefore the information has to be
transmitted over the communication channel as efficiently as
possible. However, the higher the coding efficiency, the more
grave the effects of transmission errors on the video signal [1].
Therefore, in order to protect the source coded stream from
the effects of channel errors, channel coding is applied, which
introduces artificial redundancy in the source coded stream and
is used to eliminate the channel induced errors. Therefore, the
The financial support of the Higher Education Commission, Pakistan, of
EPSRC and of the EU under the auspices of the Optimix project is gratefully
acknowledged.
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error resilience is increased at the cost of a compromise in
terms of coding efficiency.
The discovery of turbo codes made communications close to
the Shannon limit feasible. The turbo principle of exchanging
extrinsic information has been effectively utilised in various
combinations of codes to improve the error resilience. Itera-
tive Source-Channel Decoding (ISCD) was also inspired by
the turbo principle used in iterative decoding [2, 3]. More
explicitly, ISCD is motivated by the fact that the classic
Shannonian source and channel coding separation theorem [4]
has limited applicability in case of practical transmission
systems requiring limited-complexity and finite-delay imple-
mentations. Normally, ISCD employs a serial combination of
Soft-bit Source Decoding (SBSD) and Soft-Input/Soft-Output
(SISO) channel decoding. The SBSD exploits the redundancy
within the input stream for the source coded parameter re-
construction, while the channel decoder exploits the input
data along with the a priori information from the SBSD to
correct the channel induced bit errors. The benefits of ISCD
have been demonstrated in various multimedia communication
applications such speech, audio and video. In [5–7] ISCD
has been advocated for the performance improvement of the
video transmission. However, the employment of state-of-
the-art H.264/AVC compression results in limited residual
redundancy, which limits the performance gain of ISCD.
Therefore, various methods have been proposed in the litera-
ture to introduce artificial redundancy into the source coded
bit stream. In [8] Clevorn et al. presented a new design and
provided optimisation guidelines for ISCD using the concept
of redundant index assignment employing specific generator
matrices. Similarly, an optimised bit rate allocation scheme
using a rate r = 1 inner channel encoder along with 3 to 6-
bit source mapping was proposed in [9], and its performance
was evaluated relative to conventional ISCD using a rate
r = 12 recursive non-systematic convolutional (RNSC) inner
code. Likewise, a joint source and channel coding schemes
employing a rate r = 45 linear block code for mapping the
quantised source symbols to a binary representation were
combined with an inner irregular channel encoder in [10]. An
iterative joint source-channel decoding procedure inspired by
the concept of serial concatenated codes was presented in [11].
A symbol-based soft-input a posteriori probability (APP)
decoder was presented in [12], where the residual redundancy
was exploited for improved error protection. The performance
characteristics of different video transceivers assisted by deci-
 sion feedback equaliser-aided wide-band burst-by-burst adap-
tive trellis-coded modulation, turbo trellis-coded modulation
(TTCM) and bit-interleaved-coded modulation designed for
H.263 assisted video telephony were presented in [13].
In this system design study we use a low complexity
Multiple-Input Multiple-Output (MIMO) Differential Space-
Time Spreading (DSTS) scheme [14] dispensing with Chan-
nel Impulse Response (CIR) estimation. This low-complexity
technique is suitable for the video telephone considered as
a benefit of its low complexity and transmission power.
Naturally, this results in 3 dB performance loss relative to the
more complex coherent receivers. Additionally, an artificial
redundancy is introduced in the source signal with aid of
powerful yet low-complexity SBCs [15], in order to improve
the convergence behaviour of iterative joint source-channel
decoding. Furthermore, the practically achievable interactive
video performance trends are quantified when using state-
of-the-art H.264/AVC video coding techniques. Explicitly, an
Eb /N0 gain of 22 dB is attained using three-stage iterative
detection, when employing rate- 13 SBC having a minimum
Hamming distance of dH,min = 3 in comparison to a realistic
identical-rate benchmarker employing an arbitrary rate- 13 SBC
having dH,min = 1, as given in Table I.
The rest of the paper is organised as follows. An overview
of our system model is provided in Section II. The input video
source stream is described in Section III. Section IV portrays
the SBSD procedure, followed by the details of our SBC based
three-stage ISCD scheme in Section V. The performance of the
proposed system is characterised with the aid of EXIT chart
analysis in Section VI, while the overall performance results
are presented in Section VII. Finally, we offer our conclusions
in Section VIII.
II. S YSTEM OVERVIEW
The schematic of the proposed system is shown in Figure 1,
where we employ rate- 31 SBC coding, provided by partitioning
the k th video frame into N source codec symbols, where
each symbol vn,k consists of M source coded bits vn,k (m),
m = 1, · · · M although this is not shown in Figure 1. In our
case M = 2-bit input symbols are encoded by the rate- 13 SBCs
of Figure 1, resulting M  = 6 SBC coded symbols. The SBC
encoded bits s are then interleaved by a random bit interleaver
Πout and then the interleaved bits s are encoded by the Unity
Rate Coder (URC). The URC-encoded bits r are interleaved
by the second random bit interleaver Πin of Figure 1 into
r and passed to the Sphere Packing (SP) modulator. The
benefit of the SP modulator is that it allows us to jointly
consider the space-time symbols of the DSTS scheme’s two
antennas, while maximising the Euclidean distance of the
resultant symbols. The SP modulator maps B number of
coded bits b = b0 , ...bB−1 ∈ 0, 1 to a SP symbol v ∈ V ,
so that we have v = mapsp (b), where B = log2 (L), and
L represents the set of legitimate SP constellation points, as
detailed in [16]. More explicitly, we used B = log2 (16) = 4
channel coded bits per SP symbol. The resultant set of SP
symbols are transmitted with the aid of DSTS within two
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time slots using two transmit antennas. In this study, we
consider transmission over a temporally correlated narrowband
Rayleigh fading channel, associated with a normalised Doppler
frequency of fD = fd Ts = 0.011 , where fd is Doppler
frequency and Ts is the symbol duration.
III. V IDEO S OURCE
The video source signal provided as input to our proposed
system seen in Figure 1 is generated by the H.264/AVC video
source codec. The Akiyo video test sequence of 45 frames in
the Quarter Common Intermediate Format (QCIF) consisting
of (176 × 144) pixel resolution was encoded at 15 frames-per-
second (fps) at a target bitrate of 64 kbps. In order to exploit
frame slicing based partitioning, each frame was partitioned
into 11-Macro-Block (MB) slices, resulting in 9 slices per
QCIF frame. Two consecutive intra coded ’I’ frames followed
each other after 44 predicted or ’P’ frames, which curtailed
error propagation beyond the 45-frame boundary, i.e. beyond 3
seconds. Additional source codec parameters include the use
quarter-pixel motion estimation, intra-frame MB update and
the use of Universal Variable Length Coding (UVLC) type
entropy coding. Furthermore, error resilience features such as
Data Partitioned (DP) and intra-frame coded MB update of
three randomly distributed MBs per QCIF frame were also
incorporated. The insertion of bi-directionally predicted ’B’
pictures results in unacceptable loss of lip-synchronisation
owing to its delay and hence was avoided. Furthermore, the
motion search was restricted to the immediately preceding
QCIF frame in order to reduce the computational complexity
of the video decoder. Similarly, the employment of Flexible
Macro-block Ordering (FMO) was turned off, because de-
spite its substantial increase in computational complexity it
typically resulted in modest video performance improvements
in low-motion video-telephony, using the ”Akiyo” video test
sequence, in order to keep the encoder complexity realistic for
real-time implementation. The remaining system parameters of
our experimental setup are listed in Table II.
IV. E XTRINSIC INFORMATION GENERATED FROM THE
PARAMETERS UNEQUAL PROBABILITY DISTRIBUTION
The residual redundancy in the source coded bit-stream is
exploited by the SBSD as a priori information for computing
the extrinsic Logarithmic Likelihood Ratios (LLRs) [17]. The
details of extrinsic LLR computation can be found in [3, 18],
and is briefly reviewed as follows.
The SBSD of the source encoder partitions the bitstream
into short time frames, which are labeled with the video
frame index k. From each of the video frames a parameter
set vk consisting of N scalar source codec parameter patterns
vn,k n = 1, 2 · · · , N is generated. The extrinsic information
generated by the SBSD is the information gleaned for each
data bit vn,k (m), m = 1, 2 · · · , M , from all other data bits of
the parameter pattern. In a scenario where all bits of the bit
1 The specific choice of f
D = 0.01 represents a relatively slowly fading,
which is commonly used in literature to characterise the performance of
multimedia transmission systems.
 Data Partitions
xa 1 2 3
A Tx1

Concatenate
DeMUX
H.264
xk xb URC r r Sphere DSTS
c SBC s s m
Video B A B C Πout Πin Packing
Encoder xc Encoder Encoder Encoder Tx2
C Mapper

L1e (s) = L1p (s) − L1a (s)

L2a (s )
+
+ Πout
−
Iter
1 Decoding 2 3
Out
ĉ Lp (c) SBSD URC L3e (r ) = L3p (r ) − L3a (r ) Sphere La (m) DSTS
A B C SBC − +
Decoder Π−1
out
+
L2a (r) Packing Rx1
Decoder L1a (s) Decoder Decoder
Π−1 + DeMapper
x̂a L2e (s ) = L2p (s ) − L2a (s )
in
Deconcatenate

A Iter
H.264 Combined Outer SISO Module
x̂k x̂b
MUX

Decoding
Video B In
Decoder x̂c L3a (r )
C + Πin
L2e (r) = L2p (r) − L2a (r)

Fig. 1. The Proposed three-stage Iterative Source-Channel Decoding System Model.

pattern vn,k (m) except for vn,k (λ) is perfectly known at the based benchmarker having a minimum Hamming distance of
receiver, the extrinsic LLR can be expressed as: dH,min = 3 and 1 respectively, as given in Table I. We refer

M to these two schemes as the DSTS-SP-URC-SBC and DSTS-
P [vn,k (m)|vn,k (λ) = +1] SP-URC-SBC arrangements.
TABLE I
m=1,m=λ
L1e (vn,k (λ)) = log . (1) SBC S WITH CORRESPONDING SYMBOLS AND dH,min

M
P [vn,k (m)|vn,k (λ) = −1] SBC Type Symbols in Decimal dH,min
m=1,m=λ Arbitrary Rate- 13 SBC
[2, 6] {0,16,32,48} 1

Normally, the bits providing the extrinsic LLR-values of the Optimised Rate- 13 SBC[2, 6] {0,22,41,63} 3

bit considered are not known perfectly. In such a situation the TABLE II
reliabilities of all the possible realizations of the contributing S YSTEMS PARAMETERS
bits has to be determined based on the a priori LLR-values System Parameters Value System Parameters Value
L1a [vn,k (λ)] provided at the input of the SBSD, as shown in Source Coding H.264/AVC No of MB’s/Slice 11
Figure 1, which is given as: Bit Rate (Kbps) 64 Intra-frame MB 3
Frame Rate (fps) 15 update/frame

M
vn,k (λ) 1
No of Slices/frame 9
R[vn,k (λ)] = exp .(La [vn,k (λ)]). (2) Intermediate code URC Over-all Code Rate 1/3
2 Modulation Scheme SP Channel Correlated
m=1,m=λ Number of 2 Rayleigh
Transmitters, Nt Fading
Observe in (1) that the bit under consideration is excluded Number of 1 Normalised
from the present bit pattern. After calculating (2) for all Receivers, Nr Doppler 0.01
Interleaver Length ≈ (64000/15) Frequency
possible realization of the (M − 1) contributing bits, the
equation (1) can be extended to: V. I TERATIVE D ECODING
L1e (vn,k (λ)) = At the receiver, the A Posteriori Probability Soft-In Soft-
Out (APP SISO) decoder of the URC-decoder and the SBSD

M decoder iteratively exchange extrinsic information represented
P [vn,k (m)|vn,k (λ) = +1].R[vn,k (λ)] in the form of LLRs, to assist each other in approaching the
m=1,m=λ point of perfect convergence at (1,1) of the EXIT-chart, as
log . (3)

M shown in Figure 1. The variable L(.) represents the respective
P [vn,k (m)|vn,k (λ) = −1].R[vn,k (λ)] bit-LLRs, where the LLRs of the corresponding decoder in our
m=1,m=λ three-stage system design are differentiated by the subscript
The schemes considered in this paper differ in the choice 1, indicating the outer SBC decoder. By contrast, subscript 2
of the outer SBC codec. Specifically, we considered EXIT- is used to represent our intermediate URC decoder, while 3
chart optimised SBCs2 and an equivalent-rate arbitrary SBC corresponds to the inner SP decoder. Additionally, the specific
type of the LLRs is indicated by the subscript a, p and
2 The concept of EXIT-chart optimised SBCs (ECO-SBC) was introduced
e, corresponding to a priori, a posteriori and extrinsic
in [19], which were designed by minimising the area of the EXIT-chart
between the inner and outer code’s EXIT curve. information, respectively.

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 A. Inner Iterations:
The received complex-valued symbols corresponding to
each B = 4 number of URC-coded bits per DSTS-SP
symbol are demapped to their LLR [20] representations. The
extrinsic LLR values L3e (r) are generated by subtracting the
a priori information L3a (r) provided by the URC decoder
from the a posteriori LLR values L3p (r) at the output of
the SP-demapper, as shown in Figure 1. The LLRs L3p (r)
are deinterleaved by the softbit interleaver Πin of Figure 1
and are passed to the URC-decoder in order to produce the
a posteriori LLR values L2p (r) using the MAP algorithm [21]
for the URC-encoded bits. The extrinsic LLR values L2e (r)
of the URC-encoded bits r are obtained by subtracting the
a priori LLRs L2a (r) input to the URC-encoder from the URC
generated a posteriori LLRs L2p (r). Following interleaving
the resultant extrinsic LLRs L3e (r) are fed back to the SP-
demapper as the a priori information L3a (r). This a priori
information is exploited by the SP demapper for the sake of
providing improved extrinsic information for the URC decoder
in the successive iterations.
B. Outer Iterations:
The outer iterations are comprised of exchanging extrinsic
information between the SBSD and URC decoder of Figure 1.
First, the extrinsic LLRs L2e (s) produced by subtracting the
a priori information L2a (s) from the a posteriori LLRs L2p (s)
generated by the URC decoder are deinterleaved using the soft-
bit interleaver Πout of Figure 1 and passed to the SBSD. The
SBSD computes the a posteriori LLRs L1p (s) and subtracts
the input a priori LLRs L1a (s) from it in order to produce the
extrinsic LLRs L1e (s). These extrinsic LLRs are interleaved
and fed back as a priori information to the URC decoder
for the sake of generating improved extrinsic LLRs in the
subsequent iterations.
In our proposed system design we define, a system iteration,
Isystem as that composed of one inner iteration followed by
two outer iterations.
VI. EXIT C HART A NALYSIS
EXIT charts [22] are used widely for the analysis of
iterative systems by providing an insight into the convergence
behaviour of the system based on the exchange of mutual
information amongst the constituent receiver components.
As portrayed in Figure 1, the URC decoder receives its input
from and provides output to both the SP and the SBSD. More
explicitely, for the symbol x having the a priori LLR value
L.a (x), the mutual information (MI) is denoted by I.,A (x),
while the MI between the extrinsic LLR L.e (x) and the corre-
sponding symbol x is denoted by I.,E (x). The MI associated
with one of the three constituent decoders is differentiated by
replacing the subscript (.) with the corresponding subscript
1, 2 and 3 for the SBC, URC and SP-mapper, respectively, as
shown in Figure 1. Thus the URC decoder is provided with two
a priori inputs. The first a priori input L2a (r) corresponding
to the coded bits r is provided by the SP demapper. The
second a priori input L2a (s ) corresponding to the data bits
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s is provided by the SBSD and fed back to the URC-
decoder. Similarly, the URC decoder generates two extrinsic
outputs L2e (r) and L2e (s ), representing the data bits r and s ,
respectively, where the corresponding EXIT functions of the
URC decoder are Fr [L2a (r), L2a (s )] and Fs [L2a (r), L2a (s )],
respectively. However, the SBSD and the SP demapper only
receives input from and provides output for the URC decoder.
Therefore, their corresponding EXIT functions are Fs [L1a (s)]
and Fr [L3a (r ), Eb /N0 ], respectively.
According to the EXIT chart analysis of iterative decoding,
an infinitesimally low BER can only be achieved by an
iterative receiver, if there exists an open EXIT tunnel between
the two constituent decoders, so that during the process of
iterative decoding, the outer decoder results in the highest
possible extrinsic information IE (outer) = 1, for a given
input a priori information as shown in Figure 3.
For the EXIT chart analysis of our proposed system the
intermediate URC decoder and the SBSD are viewed as a
single combined outer Soft Input Soft Output (SISO) module.
The EXIT chart of the proposed benchmarker DSTS-SP-URC-
SBC scheme is shown in Figure 2 along with the EXIT
curves of the SP demapper recorded for the Eb /N0 values
of 8 to 13 dB. As seen from Figure 2, the EXIT cure of
the combined outer SISO module constituted by the DSTS-
SP-URC-SBC scheme cannot reach the (1,1) point of perfect
convergence in the EXIT chart, since it intersects with the
EXIT curve of the inner SP demapper, which implies that an
infinitesimally low BER cannot be achieved. Additionally, the
outer EXIT curve of the combined SISO module recorded for
the DSTS-SP-URC-SBC scheme is shown in Figure 3 along
with the EXIT curves of the SP demapper for various Eb /N0
values. Figure 3 shows that the joint EXIT curve of the SBSD
and URC decoder in the DSTS-SP-URC-SBC arrangement
reaches the (1,1) point of the EXIT chart. Figure 2 and 3 also
provide the Monte-carlo simulation based decoding trajectories
of the proposed system at the Eb /N0 values considered. These
trajectories were recorded by acquiring the mutual information
at the input and output of both the inner SP demapper and the
joint outer SISO module during the bit-by-bit Monte-Carlo
simulation of the iterative decoding algorithm. Observe from
the decoding trajectories of Figure 3 that for Eb /N0 values
higher than 8 dB the DSTS-SP-URC-SBC scheme becomes
capable of achieve the highest possible extrinsic information of
IE (outer) = 1 during the iterative decoding process. However
the DSTS-SP-URC-SBC is unable to achieve this goal due
to the intersection of the inner and outer EXIT curves.
VII. S YSTEM P ERFORMANCE R ESULTS
In this section we present our overall performance results
for the proposed system. We consider the SP modulation
scheme [16] associated with L = 16 sphere-packing modu-
lated symbols, while employing Anti-Gray Mapping (AGM)3
for source bits-to-SP symbol mapping. Our system design
3 Any bit-to-symbol mapping, which is different from the gray-mapping is
referred to as an anti-gray mapping (AGM). The best AGM has to be found
also by EXIT-chart optimisation.
 performance, when compared to Isystem = 4 and 3 for the
1.0 same error protection scheme. Additionally, it can be seen
EXIT outer curve of the that the the DSTS-SP-URC-SBC scheme results in the worst
0.9 Outer SISO module employing BER performance due to its inability to reach the (1,1) point
0.8
Unoptimized SBC[2, 6] of perfect convergence.
Furthermore, the P SN R versus Eb /N0 curve of the pro-
IE(inner)/IA(outer)

0.7
posed error protection scheme is portrayed in Figure 5. It may
0.6 be observed in Figure 5 that the DSTS-SP-URC-SBC scheme
employing rate- 13 SBCs having dH,min = 3 and Isystem=5
0.5
system iterations results in the best PSNR performance across
0.4 the entire Eb /N0 region considered. It is also observed in
Figure 5 that when performing iterative decoding, while em-
0.3
ploying an arbitrary rate- 31 SBC results in the worst P SN R
DSTS-SP inner curves
0.2 performance at the same overall code rate of 13 , as given in
along with correspondig
0.1 Trajectories at Table III. Quantitatively, when using the DSTS-SP-URC-SBC
Eb/N0=8 to 13 dB. scheme of Table III, an Eb /N0 gain of upto 22 dB may be
0.0
0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
achieved relative to the DSTS-SP-URC-SBC scheme at the
IA(inner)/IE(outer) PSNR degradation point of 2 dB, as shown in Figure 5.
Finally, the subjective video quality of the error protection
schemes employed is presented in Figure 6. The video frames
Fig. 2. The EXIT chart and simulated decoding trajectories of the DSTS- presented in Figure 6 were obtained by repeated retransmis-
SP-SBC scheme at Eb /N0 = 8 to 13 dB. sion of the received video sequence using the same system
with Isystem = 5 system iterations 30 times, in order to
1.0 have a pertinent subjective video quality comparison. Observe
from Figure 6 that an unimpaired video quality is attained
0.9 by the DSTS-SP-URC-SBC scheme at an Eb /N0 value of
0.8 10 dB. However, video impairment persist for the DSTS-
SP-URC-SBC scheme even at the high Eb /N0 values of
IE(inner)/IA(outer)

0.7
28.5 dB, 29 dB, 29.5 dB and 30 dB, as shown in Figure 6.
0.6

0.5 TABLE III

C ODE RATES FOR DIFFERENT E RROR P ROTECTION SCHEMES
0.4
DSTS-SP inner curves along with Error Protection Scheme
Code Rate
0.3
correspondig Trajectories at SBC type Intermediate code Overall
Eb/N0=8 to 13 dB.
0.2 DSTS-SP-URC-SBC Rate- 13 SBC
[2, 6] Rate-1 Precoder 1/3
EXIT outer curve of the
DSTS-SP-URC-SBC Rate- 13 SBC[2, 6] Rate-1 Precoder 1/3
0.1 Outer SISO module employing
EXIT optimized SBC[2, 6]
0.0
0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
IA(inner)/IE(outer)
*
DSTS-SP-URC-SBC Isystem=5
-1 DSTS-SP-URC-SBC Isystem=3
10
DSTS-SP-URC-SBC Isystem=4
Fig. 3. The EXIT chart and simulated decoding trajectories of the DSTS- DSTS-SP-URC-SBC Isystem=5
SP-SBC scheme at Eb /N0 = 8 to 13 dB. -2
10

consisted a two-antenna-aided DSTS and a single receiver

BER

-3
10
antenna arrangement. The performance of the system was eval-
uated, while considering various combinations of the system -4
10
iterations Isystem and of the iterations within the outer joint
SBSD-URC system module Iout . For the sake of increasing -5
10
the confidence in our results, we repeated each 45-frame
experiment 160 times and averaged the generated results. BER vs Eb/N0[dB]
-6
10
The BER performance of the error protection scheme 0 5 10 15 20 25
Eb/N0[dB]
employed is shown in Figure 4. It can be observed from
Figure 4 as expected, that the DSTS-SP-URC-SBC scheme Fig. 4. BER vs Eb /N0 performance of the various error protection schemes
using Isystem = 5 system iterations results in the best BER summarised in Table III.

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 [2] N. Gortz, “Iterative source-channel decoding using soft-in/soft-out de-
42 coders,” in Information Theory, 2000. Proceedings. IEEE International
Symposium on, (Sorrento, Italy), 2000.
40
[3] M. Adrat, P. Vary, and J. Spittka, “Iterative source-channel decoder
38 *
using extrinsic information from softbit-source decoding,” in IEEE
DSTS-SP-URC-SBC Isystem=5 International Conference on Acoustics, Speech, and Signal Processing,
DSTS-SP-URC-SBC Isystem=3 vol. 4, (Salt Lake City, UT, USA), pp. 2653–2656, 2001.
36
DSTS-SP-URC-SBC Isystem=4
[4] C. E. Shannon, “A mathematical theory of communication,” The Bell
PSNR-Y

DSTS-SP-URC-SBC Isystem=5
34
32
30
28
26
PSNR-Y vs Eb/N0 dB
24
10 15 20 25
Eb/N0[dB]
Fig. 5. PSNR-Y vs Eb /N0 performance of various error protection schemes
summarised in Table III.
Fig. 6. Subjective video quality of the 45th ”Akiyo” video se-
quence frame using (from top) DSTS-SP-RSC-SBC and DSTS-SP-RSC-
SBC schemes summarised in Table III at Eb /N0 values of (from
left) 8.5 dB, 9 dB, 9.5 dB and 10 dB for DSTS-SP-RSC-SBC and
28.5 dB, 29 dB, 29.5 dB and 30 dB for DSTS-SP-RSC-SBC .
VIII. C ONCLUSIONS
In this contribution we presented a three-stage system
design constituted by serially concatenated and iteratively
decoded Short Block Codes (SBCs) and a precoded Differ-
ential Space-Time Spreading (DSTS) aided multi-dimensional
Sphere Packing (SP) modulation scheme designed for near-
capacity joint source and channel coding. The employment of
EXIT optimised SBCs, which deliberately imposed artificial
redundancy on the source coded bit stream provided significant
improvements in terms of the P SN R versus Eb /N0 perfor-
mance, when compared to the benchmarker scheme employing
equivalent-rate SBCs, which were not optimised for achieving
the best possible iterative convergence behaviour. Addition-
ally, the convergence behaviour of the proposed system was
analysed with the aid of EXIT charts. The H.264/ SBC/
URC/DSTS-SP based three-stage design example using SBCs
having dH,min = 3 exhibited an Eb /N0 gain of 22 dB at
the PSNR degradation point of 2 dB relative to the identical-
rate benchmarker employing equivalent rate SBCs having
dH,min = 1.
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This full text paper was peer reviewed at the direction of IEEE Communications Society subject matter experts for publication in the IEEE "GLOBECOM" 2009 proceedings.