Chapter 2

Data Level Parallelism

Book 1 – Computer Architecture: A Quantitative Approach, Henessy and Patterson,
5th Edition, Morgan Kaufmann, 2012
Chapter 4 - Data-Level Parallelism in Vector, SIMD, and GPU Architectures
 VMIPS Basic Structure
Main Memory
The VMIPS
Vector
Instructions
 The VMIPS
Vector
Instructions
MM

R1 A
B
C
D
E
F
G
H
I
J
K
L
 The VMIPS Vector Instructions
MM
R1 A
B R2 2
C
D V2
E 0
F 1
G 5
H 6
I 8
J 11
K 12
L 16
M 19
N 27
O
P
The VMIPS Vector Instructions
MM

F0 9

V1 V2 VM
2 0 1
4 1 1
9 5 0
0 6 1
23 8 1
9 11 0
14 12 1
25 16 1
36 19 1
7 27 1

SNEVS.D V1, F0
SUBVV.D V1,V1,V2