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    Sil154_datasheet

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    Sil154

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    Sil154_datasheet

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    © All Rights Reserved
    Download as PDF or read online from Scribd
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    31 views18 pages

    Sil 154

    Uploaded by

    Quite
    Sil154_datasheet

    Copyright:

    © All Rights Reserved
    Download as PDF or read online from Scribd
    Flag for inappropriate content
    of 18
    Sil154 Preliminary Data Sheet & wT Silicon Image General Description The Sil154 transmitter uses PanelLink® Digital ‘technology to support displays ranging from VGA to SXGA resolutions (25-112MPps) in a single link interlace. The Sil154 transmitter has a highly flexible interface with 12-bit (Yepixel) or 24-bit 1. pixelclock input for true color (16.7 milion) support. In 24-bit mode, the data may be latched on the positive or negative edge of the clock. In 12-bit mode, multiple clocking options exist: with a single ciock, data will be clocked on the faling and the rising edge: with dual clocks data can be clocked on either the falling edge of the rising edge of both clocks. PanelLink Digital technology simplifies PC design by resolving many of the system level issues associated with high-speed digital design, providing the system designer with a digital interface solution that is quicker to market and lower in cost. Features + Scaleable Bandwidth: 25-112 Mega-pixels/sec (VGA to SXGA) + Flexible Panel Interface: 12-bit (pixel) or 24-bit 1 pixel/clock inputs FC Slave Programming Interface Low Voltage Interiace: 1.0 to 1.8V capable Receiver Detection: Supports Hot Plug Detection through PxDetect feature De-skewing Option: varies clock to data timing High Inter-Pair Skew Tolerance: 1 ull input clock cyclo (9 ns at 108MHz) + Low Power: 3.3V core operation and power down mode + Cable Distance Support: over Sm with twisted pair, iber-opties ready + Standards Compliant with DVI 1.0 (OVI is backwards compliant with VESA® P&D™ and DFP) Sil 154 Pin Diagram Sgabeehaabaebede SERZERERREZEESEEE D000000000000000 PR RRR AREER ARE 5 vec sh ‘sD oxo sasonven [31 1sQ asmuscr, oxen Ds v4 sens oe Ds 3Q ssuast px Ds 2D) vee pai C38 uf) msen po 39 oD Po pis Gao Sil 154 oC eponacre.a pis Ost copie ToRP sOeniaixt ov Oe 7Qenzaaexs vis C43 sO crewawons os Os sCvsise bis Des sCusyse oe Oss sO veer oe D7 2E}pe wOe gaa za eR RRS opoe oOo00000000000 oo QEES2 5 By ge aE 29 Figure 1. SiI154 Pin Diagram (zz) Pa Silicon Image, Inc. SiNs4 SINDS-0010-8 Functional Block Diagram i | PanelLink Digital (fons core Registers & Configuration Logic Block Data Capture Logic Block fener agg it ef gEGE3 Be 22 a8 Electrical Specifications Absolute Maximum Conditions ‘Parameter ‘Supply Voltage 3 3V -0.3 Input Voltage: 0.3 Voor 03 ‘Output Votage 20.3 Voor 03 “Ambiont Temperature (with power applied) 25 105 ‘Storage Temperature 40 125 Package Power Dissipal 1 zlslalelel

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