Signal Integrity Analysis of Serpentine Traces in IC

Packages
Ashwini Datta Narahari Datta1, Tapobrata Bandyopadhyay2, and Snehamay Sinha2
University of Texas at Dallas1
Embedded Processing, Texas Instruments2
Dallas, Texas, USA.
E-mail: axn152630@utdallas.edu

Abstract— Skew matching in high speed interfaces is achieved are extracted using a full-wave EM field solver till 40 GHz.
through the use of serpentine structures both in the board and in
the package substrate. The basic assumption is that length 3D full-wave EM modeling and time delay simulation
matching through the use of the serpentine structures will enable analysis were used to perform comprehensive parametric
delay skew matching. In this paper, we have studied serpentine analysis of serpentine lines. The paper discusses the effect of
structures in strip-lines to check the validity of this assumption. length of the feed lines, the use of split bends instead of
Some of the critical parameters considered while designing the continuous bends and their comparison.
serpentine structure includes the serpentine line length, line
width, spacing, number of bends, types of bends. Asymmetric
feed lines and split bends are also studied. This paper provides an
analysis of the insertion loss, return loss, coupling and time delay II. DESIGN AND ANALYSIS
of strip-line structures using 3D FEM tool and circuit solvers, the Fig 1 and Fig 2 shows the cross-sectional and top-view of
time delay calculation has been investigated. The results indicate the serpentine strip-line structure which was used for the
that signal delay in a serpentine trace is a function of serpentine analysis. The total physical length of the strip-line used for
line length, line width, spacing between serpentine segments, analysis was 10mm, the trace height and width was 15μm.
number of bends and the angle of the bends The traces were designed with a target characteristic
Keywords— Serpentine line length, trace spacing, asymmetric impedance of 50Ω. The dielectric thickness of the substrate (εr
feed lines, split bends, cross-talk, time delay. = 3.6) was 68μm and the ground planes 10μm in thickness
each. The dimensions used are typical of a signal trace in an
I. INTRODUCTION organic substrate.
Skew matching of signal nets is a critical aspect of
designing high speed memory interfaces. Serpentine traces are
used in IC packages and Printed Circuit Boards (PCBs) to
match the signal delay and reduce skew in a signal group. The
serpentine structures are designed to add delay to the digital
systems both in the package and the PCB. The popularity of
serpentine traces is driven by two main factors – (a) higher
speed interfaces cannot afford to lose any timing margin due Fig 1: Cross-sectional view Strip-line
to flight time delay mismatch within a byte lane and (b)
smaller system size means that serpentine traces are the The serpentine structures are excited with wave ports in a
simplest method of creating skew matched traces. Typically
3D full-wave EM solver. The parameters varied in the design
skew matching is assumed to be achieved when trace lengths
are matched. However, this is not always the case. While of serpentine line structure include line length, spacing, type
designing a serpentine structure, the line length, spacing, type of bends, number of bends, and joint line length. The
of bends, and number of bends has a major influence on the influence of each of these parameters on a strip line is
electrical parameters. In serpentine traces, the trace segments analyzed below.
along the serpentine structure are in close proximity with each
other and hence there is some cross-talk effect induced, due to
which there is deterioration in the time delay. In this paper, a
comparison of different line spacing, number of bends, types
of bends, split bends, asymmetric joint lines analysis has been
illustrated. Earlier research [1-3] was focused on the micro-
strip line structures.
This paper presents analysis for strip-lines. Strip-lines
were analyzed as they have less delay sensitivity to Fig 2: Schematic of serpentine structure
temperature fluctuations and can achieve more routing density
for a given trace impedance. Electromagnetic (EM) models

978-1-5090-2757-6/16/$31.00 ©2016
A. Types of Bends
Parametric analysis on the right–angled bend and 45o bend
was analyzed and compared. The serpentine structures were
designed with 45o bends and right angled bends, having a total
length of serpentine bend as 490μm, the segment length was
200μm and spacing between the segment was 30μm
Fig 5: Insertion loss of serpentine designs with different segment spacing.
Fig 3 shows the effect of type of bends on the return loss
and insertion loss, respectively. The insertion loss of a 45o
bend, at 10GHz is 0.55dB and that of right angled bend is 0.7 The insertion and return loss decreases with reduction in
dB. Designing serpentine structures using 45o bend is the serpentine segment spacing. This is due to the capacitive
recommended. The insertion loss with a 45o bend has higher effect between the segments, as the spacing decreases the
value of capacitance at the corner, and the characteristic capacitive effect increases and thereby increasing the insertion
impedance at this point is lower. By mitering the bend, there is loss. It is always preferred to use a line-to-line spacing of at
a decrease in the reflection co-efficient values and the extra least 3 times the line width. As the spacing increases to
parasitic capacitive effect is removed. Thus, it is preferred to 45umthe insertion loss is less than 0.8 dB and return loss of 24
have a 45o bend structure and all the analysis in the paper was dB at 20 GHz.
based on 45o bend structure.
Table I shows the delay estimation for different segment
RED – STRIP-LINE 45 spacing. The serpentine line was modeled with 8 bends. The
DEGREE BEND
GREEN– STRIP-LINE
strip-line with 0 bends has highest delay compared to 8 bends
90 DEGREE BEND .The serpentine structure has smaller delay than the straight
RED – STRIP-LINE 45 line. As the electrical current flows through the shortest path,
DEGREE BEND
GREEN– STRIP-LINE due to the coupling effect between traces, the coupled path is
90 DEGREE BEND stronger than the normal current path due to which the current
flows in the coupled path, here the distance is shorter than the
normal path, hence the time delay decreases with the lesser
Fig 3: (a) Return Loss, (b) Insertion Loss for different type of bends in segment spacing.
serpentine line design.
A comprehensive study was done by varying the rise time
of the signal and the variation of the time delay was observed.
B. Effect of segment spacing
The line spacing in the serpentine structure has a major TABLE I. TIME DELAY FOR DIFFERENT SEGMENT SPACING
influence on the electrical parameters. In this study, the
Segment Spacing
segment length was 200μm and the spacing between the Rise Time
segment lines was varied (15 μm, 30 um, 45 μm and 85 μm). 15um 30um 45um Straight Line
The serpentine line was modeled with 8 bends. Fig 4 and Fig 5 25ps 67ps 70ps 72ps 77ps
shows the return loss and insertion loss variation of the
50ps 74ps 78ps 79ps 84ps
serpentine line structures, respectively. The total serpentine
line length for 15μm spacing was 3.68mm, for 30μm spacing 100ps 84ps 87ps 88ps 94ps
the length was 3.92μm and for 45μm spacing the length was
200ps 101ps 108ps 108ps 113ps
4.16 mm.

From Table I it can be stated that the straight line has more
delay compared to serpentine segments designed with the
same conductor length. The primary reason being cross-talk
coupling between the segments. In case, of straight line
structures the electric fields are terminated to the ground, on
BLUE – STRIP-LINE WITH
45UM SPACING
the contrary in serpentine segments, due to cross-talk effect
GREEN– STRIP-LINE electric fields get coupled to the adjacent segment causing the
WITH 30UM SPACING
RED – STRIP-LINE WITH
reduction in delay.The width of the pulse is generally
15UM SPACING understood to be twice the propagation time through the
Fig 4: Return loss of serpentine designs with different segment spacing coupled region[4].
 bends increases the coupling between the segments increases
which, in turn, leads to increase in insertion loss.
Table II shows the time delay variation when the number
of bends in the serpentine structure is 0, 4, and 8. From the
table it can be observed that the straight line (0 bends) has
maximum time delay and as the number of bend increases the
delay decreases. The percentage difference in delay with 4
bends with straight line at 25ps is about 3.3% and that at
200ps is about 4 %.

TABLE II. TIME DELAY FOR DIFFERENT NUMBER OF BENDS

Rise Number of Bends

Fig 6: Delay v/s rise time Time 4Bends 8Bends Straight Line
25ps 74ps 71ps 78ps
It is also seen that the delay variation is smaller for faster
rise time. The delay variation changes from 10% for trise of 50ps 81ps 78ps 84ps
25ps to 13% when trise is 200ps. Fig 6 shows the voltage input
100ps 90ps 87ps 94ps
and output waveforms for 8 bend serpentine strip-line designs
with a segment spacing of 30 μm. As seen in Table I, the 200ps 110ps 108ps 113ps
signal with shorter rise time has less delay compared to the
signal with longer rise time. The former has wider energy D. Effect of split bends:
spectrum and significant energy at high frequencies compared This section describes the effect of separating the
to the latter. As the frequency response of the package trace is serpentine design in multiple smaller serpentine segments. As
not uniform, the IL gets worse with increasing frequencies. shown in Fig 9, the 8 bend serpentine line structure was split
Therefore, the faster signal gets more distorted than the slower into 4 and 4 bends. The total physical length of the conductor
signal. In the faster case, the output signal quickly rises to was 10mm, the length of the serpentine structure was 2.08mm
50%+ levels and then slows down. In the slow rise time case, (0.53λ) each, joint line length was 2mm (0.51λ) and the joint
length in between the segments was 1.84 mm. This structure
the output signal has a more uniform rising edge. Thus, the
was compared to a 8 bend structure with feed line length
delay increases with increasing signal rise time. 3.06mm(0.77λ) each and 3.88 mm(0.98λ) serpentine line
C. Effect of number of bends length at 40 GHz
In this section the serpentine strip-lines are designed with
30μm segment spacing and segment length of 200μm with
varied number of serpentine bends. The total conductor length
was kept constant at 10mm. Fig 7 and Fig 8 shows the
influence of number of bends in the strip-line structure on
insertion and return loss.
2mm 1.84 mm 2mm

10 mm

Fig 9: Strip-line with split bends (4+4 bends)

BLUE – STRIP-LINE WITH 0 BENDS
RED – STRIP-LINE WITH 4 BENDS
GREEN– STRIP-LINE WITH 8 BENDS Fig 10 and Fig 11 shows the comparison of return loss and
insertion loss of the serpentine structure with 8 bends
Fig 7: Return loss of serpentine designs with different number of bends. (continuously) and 8 bends split into two 4-bend sections.
RED – STRIP-LINE WITH
BLUE – STRIP-LINE WITH 0 BENDS SPLIT BENDS
RED – STRIP-LINE WITH 4 BENDS GREEN– STRIP-LINE WITH
GREEN– STRIP-LINE WITH 8 BENDS CONTINUOUS BENDS

Fig 10: Return loss of split bends on serpentine line.

Fig 8: Insertion loss of serpentine designs with different number of bends.

From the above plots we can see that as the number of


RED – STRIP-LINE WITH SPLIT BENDS
GREEN– STRIP-LINE WITH CONTINUOUS
BENDS
Fig 11: Insertion loss of split bends on serpentine line.
The return loss of split bends is better at lower frequency.
At higher frequency, the one with continuous 8 bends
performs better. There is a shift in the resonance frequency
because of difference in the joint line length. The insertion
loss of the split bends and the 8 bends show some variation
due to this reason. The split bends and continuous bends have
the same time delay. Therefore, split bends can be used
instead of 8 bends in cases where area is a constraint
E. Effect of asymmetric joint lines
This section studies the effect of variation in the position
of the serpentine section in the trace. Fig 12 shows a design
structure where the joint length at port 1 is 4.84mm (1.23λ)
and at port 2 is 1mm (0.25λ). The length of the serpentine line
structure is 4.16mm (1.05λ) at 40GHz.
PORT1
4.84mm
Fig 12: Schematic of asymmetric serpentine line design.
Fig 13 and Fig 14 is a comparison plot of return loss and
insertion loss of the symmetric and asymmetric joint line
structures.
RED – STRIP-LINE WITH 8 BENDS
(ASYMMETRIC JOINTS)
GREEN– STRIP-LINE WITH 8 BENDS
(SYMMETRIC JOINTS)
Fig 13 : Return loss of asymmetrical serpentine line design.
Fig 14: Insertion loss of asymmetrical serpentine line design.
From the above plots it can be observed that the influence
of the joint lines has minimal effect on the return loss, the
insertion loss in both the symmetric and asymmetric feed lines
is almost the same.
III. CONCLUSION
In this paper we have carried out a comprehensive
parametric analysis for designing serpentine structures using
strip-lines structure and its influence on return loss, insertion
loss, time delay, and crosstalk. It can be concluded that
straight strip-lines provide more delay compared to a
serpentine line structure.
The research work established several design guidelines –
in any packaging design of serpentine structure it is good to
keep the segment length about 100-200um, use 45o bends
instead of right angled bends, having a segment spacing at
least greater than 3 times the line width, and minimal number
of bends. The use of asymmetric feed lines in the design does
not show significant impact on the electrical performance and
 hence can be incorporated according to the need of the
package. Using split bends instead of continuous bends shows
almost similar results and can be used alternatively based on
the routing constraints in a package.
As a future work, the serpentine structures will be
fabricated, measured and the results compared with the
simulated results.
IV. REFERENCES
PORT 2
[1] W. S. Soh, K. Y. See, W. Y. Chang, Richard, M. Oswal and L. B. Wang,
"Comprehensive analysis of serpentine line design," 2009 Asia Pacific
1mm Microwave Conference, Singapore, 2009, pp. 1285-1288.
[2] J. Shin and T. Michalka, "Comprehensive, scalable design guidance for
serpentine time delay variation in digital system," 2012 IEEE 62nd
Electronic Components and Technology Conference, San Diego, CA,
2012, pp. 1826-1832.
[3] Mu-Shui Zhang, Hong-Zhou Tan,, " Accurate Delay Extraction of
Serpentine Lines for Next-Generation High-Density DRAMs", IEEE
transactions on components, packaging and manufacturing technology,
vol. 5, no. 12, december 2015
[4] Brooks, Douglas; Adjusting Signal Timing (Part I1),Cross-talk effect in
serpentine line traces, January 2004