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D
SH01 - TITLE PAGE D
SH02 - VAYU MCASP SH46 - VAYU CORE POWER
SH03 - MCASP/VIN6A MUX SH47 - VAYU GROUND PINS
SH04 - VAYU SERIAL I/O SH48 - DDR3 EMIF1 TESTPOINTS
SH05 - SERIAL I/O MUX SH49 - DDR3 BANK 1
SH06 - CAN CONNECTORS SH50 - DDR3 EMIF1 CAPS
SH07 - SPI FLASH SH51 - DDR3 BANK1 TERMINATION
SH08 - I2C EEPROM/TEMP SENSOR SH52 - TESTPOINTS DDR3 EMIF 2
SH09 - NAND FLASH SH53 - DDR3 MEMORY BANK 2
SH10 - HPC TOOL SH54 - DDR3 MEMORY CAPS BANK 2
SH11 - NOR FLASH SH55 - DDR TERMNATION BANK 2
SH12 - eMMC MEMORY SH56 - USB VBUS
SH13 - I2C EXPANDER SH57 - USB CONNECTORS
SH14 - VAYU SD/MMC IF SH58 - FTDI UART
SH15 - SD CARD SH59 - COM8 LEVEL TRANSLATOR
SH16 - VAYU MLB SH60 - COM8 CONNECTOR
SH17 - VAYU ETHERNET SH61 - COM8 POWER
SH18 - ENET0/VIN4 MUX SH62 - AIC3106
SH19 - VAYU USB SH63 - ETHERNET PORT0
C SH20 - VAYU GPMC SH64 - ETHERNET PORT1 C
SH21 - GPMC DATA MUX VIDEO SH65 - ETHERNET CONN PORT0 & 1
SH22 - GPMC ADD MUX VIDEO SH66 - ETHERNET LEDS
SH23 - GPMC ADD MUX MMC SH67 - APPLICATION IF CONN1
SH24 - BOOTSWITCHES SH68 - APPLICATION IF CONN2
SH25 - VAYU DDR EMIF1 INTERFACE SH69 - APPLICATION IF CONN3
SH26 - VAYU DDR EMIF2 INTERFACE SH70 - PMIC CONTROL
SH27 - VAYU HDMI SH71 - PMIC2
SH28 - VAYU VOUT1 PORT LCD SH72 - PMIC3
SH29 - VAYU VIDEO PORTS IN SH73 - PMIC 4
SH30 - VIN1 MUX SH74 - POWER TPS443351DAP
SH31 - VIN2 MUX SH75 - TPS22965
SH32 - LCD CONNECTOR SH76 - ETHERNET 2V5
SH33 - HDMI OUTPUT CONNECTOR SH77 - TPS51200
REVISION STATUS OF SHEETS
SH34 - FPD LINK SH78 - TPS57112 -- 1V5 DDR
SH35 - CAMERA IF SH79 - CORE POWER ROUTER
REV
SH36 - SERDES CLOCK SH80 - POWER ROUTER DDR
SH SH37 - VAYU SATA/PCIe INTERFACE SH81 - POWER ROUTER 1V8
B SH38 - PCIe CONNECTORS SH82 - POWER ROUTER 1V8A B
REV G4 G4 A H H D1 H G4 H SH39 - VAYU JTAG SH83 - POWER ROUTER RTC
SH 81 82 83 84 85 86 87 88 89 SH40 - VAYU CLOCKS SH84 - POWER ROUTER 3V3
SH41 - VAYU INTERNAL LDOS SH85 - POWER ROUTER EVM
REV H D D H A H G A H H SH42 - VAYU IO POWER SH86 - RESET
SH43 - VAYU POWER 1V8 SH87 - POWER INPUT
SH 71 72 73 74 75 76 77 78 79 80
SH44 - VAYU DDR POWER SH88 - POWER MONITORING ADDRESSES/ETHERNET STRAPPING
REV D F H H A A A A A G3 SH45 - VAYU 1V8A SH89 - CHANGES REV H
SH 61 62 63 64 65 66 67 68 69 70
REV A A H A H C F D A A
SH 51 52 53 54 55 56 57 58 59 60
REV A F A A A A A A H A
SH 41 42 43 44 45 46 47 48 49 50
REV C A H E G A F A H G2
DWN DATE
SH 31 32 33 34 35 36 37 38 39 40 R.R.P. 12/10/2012
A CHK DATE TEXAS INSTRUMENTS INCORPORATED A
REV A E D2 B A A A C A A T.W.K. 12/10/2012
ENGR DATE
SH 21 22 23 24 25 26 27 28 29 30 R.R.P. 12/10/2012 Title: VAYU EVM
ENGR-MGR DATE
REV A H G A H A A A A D2 R.R.P. 12/10/2012 Page Contents: Title Page
QA DATE
SH 11 12 13 14 15 16 17 18 19 20 C.M.D. 12/10/2012 Revision:
MFG DATE Size: B DWG NO 516582-0001 H
REV H C A D E A D2 B A A NEXT ASSY USED ON R.R.P. 12/10/2012
RLSE DATE Date: Tuesday, January 12, 2016 Sheet 1 of 89
SH 1 2 3 4 5 6 7 8 9 10 APPLICATION R.R.P. 12/10/2012
5 4 3 2 1
5 4 3 2 1
U52-7
B14 GP5[0] GP5[0] 68
MCASP1_ACLKR
C14 RC_MCA1_ACLKX R602 0 C_MCA1_ACLKX C_MCA1_ACLKX 3
MCASP1_ACLKX
J14 GP5[1] GP5[1] 68
MCASP1_FSR
D14 RC_MCA1_AFSX R609 0 C_MCA1_AFSX C_MCA1_AFSX 3
MCASP1_FSX mcasp1_axr[8] mcasp6_axr[0] vin6a_d[15]
G12 C_MCA1_AXR0 mcasp1_axr[9] mcasp6_axr[1] vin6a_d[14]
MCASP1_AXR0 C_MCA1_AXR0 3 mcasp1_axr[10] mcasp6_aclkx vin6a_d[13]
F12 C_MCA1_AXR1 C_MCA1_AXR1 3
D MCASP1_AXR1 G13 GP5[4]
mcasp1_axr[11] mcasp6_fsx vin6a_d[12] D
MCASP1_AXR2 GP5[4] 59 mcasp1_axr[12] mcasp7_axr[0] vin6a_d[11]
J11 GP5[5] GP5[5] 59 mcasp1_axr[13] mcasp7_axr[1] vin6a_d[10]
gpio5_4 mcasp1_axr[2] MCASP1_AXR3 E12 GP5[6]
MCASP1_AXR4 GP5[6] 59 mcasp1_axr[14] mcasp7_aclkx vin6a_d[9]
gpio5_5 mcasp1_axr[3] F13 GP5[7] mcasp1_axr[15] mcasp7_fsx vin6a_d[8]
gpio5_6 mcasp1_axr[4] MCASP1_AXR5 GP5[7] 59
C12 GP5[8] GP5[8] 59
gpio5_7 mcasp1_axr[5] MCASP1_AXR6 D12 GP5[9]
gpio5_8 mcasp1_axr[6] MCASP1_AXR7 GP5[9] 16
gpio5_9 mcasp1_axr[7]
gpio5_10 mcasp1_axr[8] B12 C_MCA6_AXR0 C_MCA6_AXR0 3
MCASP1_AXR8 A11 C_MCA6_AXR1
gpio5_11 mcasp1_axr[9] C_MCA6_AXR1 3
gpio5_12 mcasp1_axr[10] MCASP1_AXR9 B13 RC_MCA6_CLKX R225 0 C_MCA6_CLKX
MCASP1_AXR10 C_MCA6_CLKX 3
gpio4_17 mcasp1_axr[11] A12 RC_MCA6_FSX R221 0 C_MCA6_FSX
gpio4_18 mcasp1_axr[12] MCASP1_AXR11 C_MCA6_FSX 3
E14 C_MCA7_AXR0 C_MCA7_AXR0 3
mcasp1_axr[12] mcasp7_axr[0] vin6a_d[11]
gpio6_4 mcasp1_axr[13] MCASP1_AXR12 A13 C_MCA7_AXR1 mcasp1_axr[13] mcasp7_axr[1] vin6a_d[10]
gpio6_5 mcasp1_axr[14] MCASP1_AXR13 C_MCA7_AXR1 3 mcasp1_axr[14] mcasp7_aclkx vin6a_d[9]
gpio6_6 mcasp1_axr[15] G14 RC_MCA7_CLKX R613 0 C_MCA7_CLKX C_MCA7_CLKX 3
MCASP1_AXR14 F14 RC_MCA7_FSX R231 0 C_MCA7_FSX mcasp1_axr[15] mcasp7_fsx vin6a_d[8]
MCASP1_AXR15 C_MCA7_FSX 3 SEL_HDMI_I2C2 5
E15 1 TP53
MCASP2_ACLKR
A19 RC_MCA2_ACLKX R242 0 C_MCA2_ACLKX C_MCA2_ACLKX 3 R764 NO-POP
USB2_VBUS 56,57
MCASP2_ACLKX mcasp2_aclkx vin6a_d[7]
A20 1 TP56 mcasp2_fsx vin6a_d[6]
MCASP2_FSR mcasp2_aclkr
A18 R236 0 mcasp2_fsr
C
RC_MCA2_AFSX C_MCA2_AFSX C_MCA2_AFSX 3 mcasp2_axr[0] C
MCASP2_FSX
mcasp2_axr[1]
B15 C_MCA2_AXR0 C_MCA2_AXR0 3 mcasp2_axr[2] vin6a_d[5]
MCASP2_AXR0 A15 C_MCA2_AXR1 C_MCA2_AXR1 3 mcasp2_axr[3] vin6a_d[4]
MCASP2_AXR1 C15 C_MCA2_AXR2 mcasp2_axr[4]
MCASP2_AXR2 C_MCA2_AXR2 3
A16 C_MCA2_AXR3 mcasp2_axr[5]
MCASP2_AXR3 C_MCA2_AXR3 3 mcasp2_axr[6]
D15 C_MCA2_AXR4 C_MCA2_AXR4 3
MCASP2_AXR4 B16 C_MCA2_AXR5 mcasp2_axr[7]
MCASP2_AXR5 C_MCA2_AXR5 3
B17 C_MCA2_AXR6 C_MCA2_AXR6 3
MCASP2_AXR6 A17 C_MCA2_AXR7
MCASP2_AXR7 C_MCA2_AXR7 3
5 4 3 2 1
5 4 3 2 1
EVM_3V3
FUNCTION TABLE
C488
R622 .1uF INPUTS INPUTS/OUTPUTS FUNCTION
10K
U106
S2 S1 S0 A1 A2
L L L Z Z Disconnect
5
EVM_3V3
VIN6_SEL_S0 2 4
L L H B1 Z A1 port = B1 port
D 13 VIN6_SEL_S0 1 L H L B2 Z A1 port = B2 port D
RU99
SN74LVC1G04DCK C383 L H H Z B1 A2 port = B1 port
3
1
56 S0 VCC.1
17 0.1uF H L L Z B2 A2 port = B2 port
mcasp3_aclkx vin6a_d[3] 55 S1 H L H Z Z Disconnect
mcasp3_fsx vin6a_d[2] S2
mcasp3_axr[0] vin6a_d[1] C_MCA3_ACLKX 2 54 VIN[6]A_D[3]
H H L B1 B2 A1 port = B1 port
2 C_MCA3_ACLKX VIN[6]A_D[3] 68
mcasp3_axr[1] vin6a_d[0]
2 C_MCA3_AFSX C_MCA3_AFSX 4 1A1
2A1
1B1
2B1
52 VIN[6]A_D[2] VIN[6]A_D[2] 68 A2 port = B2 port
C_MCA3_AXR0 6 50 VIN[6]A_D[1]
2 C_MCA3_AXR0
C_MCA3_AXR1 9 3A1 3B1 47 VIN[6]A_D[0]
VIN[6]A_D[1]H H H
68 B2 B1 A1 port = B2 port
2 C_MCA3_AXR1 4A1 4B1 VIN[6]A_D[0] 68
2 C_MCA2_ACLKX C_MCA2_ACLKX 11
5A1 5B1
45 VIN[6]A_D[7] VIN[6]A_D[7] 68 A2 port = B1 port
2 C_MCA7_FSX C_MCA7_FSX 13 43 VIN[6]A_D[8] VIN[6]A_D[8] 68
C_MCA7_CLKX 15 6A1 6B1 41 VIN[6]A_D[9]
2 C_MCA7_CLKX 7A1 7B1 VIN[6]A_D[9] 68
2 C_MCA7_AXR1 C_MCA7_AXR1 18 39 VIN[6]A_D[10] VIN[6]A_D[10] 68
C_MCA7_AXR0 21 8A1 8B1 36 VIN[6]A_D[11]
2 C_MCA7_AXR0 9A1 9B1 VIN[6]A_D[11] 68
2 C_MCA1_AXR0 C_MCA1_AXR0 23 34 VIN[6]A_VSYNC VIN[6]A_VSYNC 68
mcasp2_aclkx vin6a_d[7] C_MCA1_AXR1 25 10A1 10B1 32 VIN[6]A_HSYNC
mcasp2_fsx vin6a_d[6] 2 C_MCA1_AXR1 11A1 11B1 VIN[6]A_HSYNC 68
27 30
mcasp2_aclkr 12A1 12B1
mcasp2_fsr
mcasp2_axr[0]
mcasp2_axr[1] 3 53 AIC_MCA3_ACLKX AIC_MCA3_ACLKX 62
5 1A2 1B2 51 AIC_MCA3_AFSX
mcasp2_axr[2] vin6a_d[5] 2A2 2B2 AIC_MCA3_AFSX 62
mcasp2_axr[3] vin6a_d[4] 7 48 AIC_MCA3_AXR0 AIC_MCA3_AXR0 62
C 3A2 3B2 C
mcasp2_axr[4] 10 46 AIC_MCA3_AXR1 AIC_MCA3_AXR1 62
mcasp2_axr[5] 12 4A2 4B2 44 MCA2_ACLKX
mcasp2_axr[6] 5A2 5B2 MCA2_ACLKX 68
14 42 MCA7_FSX MCA7_FSX 59
mcasp2_axr[7] 16 6A2 6B2 40 MCA7_CLKX
7A2 7B2 MCA7_CLKX 59
20 37 MCA7_AXR1 MCA7_AXR1 59
22 8A2 8B2 35 MCA7_AXR0
9A2 9B2 MCA7_AXR0 59
24 33 MCA1_AXR0 MCA1_AXR0 59
26 10A2 10B2 31 MCA1_AXR1
11A2 11B2 MCA1_AXR1 59
28 29
12A2 12B2
SN74CBTLV16212GR C315
.1uF
5
mcasp1_aclkx vin6a_fld0
mcasp1_fsx vin6a_de0 RU103
mcasp1_aclkr C_MCA2_AXR0 2 18 MCA2_AXR0 C_XREF_CLK1 2 4 MCA6_AHCLKX
mcasp1_fsr 2 C_MCA2_AXR0 A1 B1 MCA2_AXR0 68 2 C_XREF_CLK1 MCA6_AHCLKX 68
B 2 C_MCA2_AXR1 C_MCA2_AXR1 3 17 MCA2_AXR1 MCA2_AXR1 68 B
mcasp1_axr[0] vin6a_vsync0 A2 B2
mcasp1_axr[1] vin6a_hsync0 2 C_MCA2_AXR2 C_MCA2_AXR2 4 16 MCA2_AXR2 MCA2_AXR2 68 RU29
C_MCA2_AXR3 5 A3 B3 15 MCA2_AXR3 74CBTLV1G125CRG4
2 C_MCA2_AXR3 MCA2_AXR3 68
1
3
C_MCA2_AXR4 6 A4 B4 14 MCA2_AXR4
2 C_MCA2_AXR4 A5 B5 MCA2_AXR4 68
2 C_MCA2_AXR5 C_MCA2_AXR5 7 13 MCA2_AXR5 MCA2_AXR5 68
C_MCA2_AXR6 8 A6 B6 12 MCA2_AXR6
2 C_MCA2_AXR6 A7 B7 MCA2_AXR6 68
2 C_MCA2_AXR7 C_MCA2_AXR7 9 11 MCA2_AXR7 MCA2_AXR7 68
A8 B8
19 20 EVM_3V3
mcasp1_axr[8] mcasp6_axr[0] vin6a_d[15] 1 OE VCC
mcasp1_axr[9] mcasp6_axr[1] vin6a_d[14] NC 10
mcasp1_axr[10] mcasp6_aclkx vin6a_d[13] GND C428
mcasp1_axr[11] mcasp6_fsx vin6a_d[12] 0.1uF
mcasp1_axr[12]
mcasp1_axr[13]
mcasp7_axr[0]
mcasp7_axr[1]
vin6a_d[11]
vin6a_d[10] SN74CBTLV3245DBQ MCA6_AHCLKX
mcasp1_axr[14] mcasp7_aclkx vin6a_d[9]
mcasp1_axr[15] mcasp7_fsx vin6a_d[8] RU49
2 C_MCA6_FSX C_MCA6_FSX 2 18 MCA6_AFSX MCA6_AFSX 68
C_MCA6_CLKX 3 A1 B1 17 MCA6_ACLKX
2 C_MCA6_CLKX A2 B2 MCA6_ACLKX 68
2 C_MCA6_AXR0 C_MCA6_AXR0 4 16 MCA6_AXR0 MCA6_AXR0 68
C_MCA6_AXR1 5 A3 B3 15 MCA6_AXR1
2 C_MCA6_AXR1 A4 B4 MCA6_AXR1 68
2 C_MCA1_ACLKX C_MCA1_ACLKX 6 14 MCA1_ACLKX MCA1_ACLKX 59
C_MCA1_AFSX 7 A5 B5 13 MCA1_AFSX
2 C_MCA1_AFSX A6 B6 MCA1_AFSX 59
2 C_MCA2_AFSX C_MCA2_AFSX 8 12 MCA2_AFSX MCA2_AFSX 68
9 A7 B7 11
A A8 B8 TEXAS INSTRUMENTS INCORPORATED A
19 20 EVM_3V3
1 OE VCC
NC 10 Title: VAYU EVM
xref_clk1 mcasp6_ahclkx vin6a_clk0 GND C98
EVM_3V3 0.1uF Page Contents: MCASP MUX
SN74CBTLV3245DBQ
Revision:
EVM_3V3 4,5,6,7,8,9,11,12,13,15,16,18,20,21,22,23,24,30,31,32,33,34,35,36,38,39,40,56,57,58,59,60,63,64,65,67,68,85,86 Size: B DWG NO 516582-0001 A
5 4 3 2 1
5 4 3 2 1
EVM_3V3
R824 0
86 POWERHOLD_CLK EVM_3V3
R232 0 WAKE_UP_CAN
WAKE_UP_CAN 40 C692
U52-14 R755
ER14 DCAN1_RX
G19 R611 NO-POP
DCAN1_RX 6
10K
G20
DCAN1_TX DCAN1_TX 6
5
AC5 VIN[5]A_CLK0 0.1uF
GPIO6_10 VIN[5]A_CLK0 67
AB4 2 4 R658 22 CAM_SPI[1]_SCLK 35
GPIO6_11 PCF8575_INT 13
E21
D GPIO6_14 C_GPIO6_14 5 D
F20 U120
GPIO6_15 C_GPIO6_15 5
F21 74LV1G126CRG4
1
3
GPIO6_16 ENET_INTSn 63
A25
SPI1_SCLK R248 0 CAM_SPI[1]_CS[0]n 35 EVM_3V3
A24 R641 0 SPI[1]_CS[0]n 69
SPI1_CS0 A22
SPI1_CS1 SPI[1]_CS[1]n 69,77
B21 C_SPI1_CS2n C_SPI1_CS2n 33
SPI1_CS2
5
B20 C_SPI1_CS3n C_SPI1_CS3n 33
SPI1_CS3 R259 0 CAM_SPI[1]_MOSI 35
B25 R657 0 SPI[1]_MOSI 69 2 4 R258 22 SPI[1]_SCLK 69
SPI1_D0 F16 R614 0
SPI1_D1 SPI[1]_MISO 69
R235 0 CAM_SPI[1]_MISO 35 U121
74LV1G126CRG4
1
3
A26 R261 0 C_SPI2_SCLK C_SPI2_SCLK 5
SPI2_SCLK
B24 C_SPI2_CS0n C_SPI2_CS0n 5
SPI2_CS0
G17 C_SPI2_MOSI C_SPI2_MOSI 5
SPI2_D0 B22 C_SPI2_MISO gpio6_14 dcan2_tx
SPI2_D1 C_SPI2_MISO 5 gpio6_15 dcan2_rx
C26 UART1_TXD
C UART1_TXD UART1_TXD 58 C
B27 UART1_RXD
UART1_RXD UART1_RXD 58 spi2_sclk uart3_rxd
E25 R651 0
UART1_CTSN MMC4_CLK 59 spi2_d[1] uart3_txd
C27
UART1_RTSN MMC4_CMD 59 spi2_d[0] uart3_ctsn
D26 spi1_cs[2] mmc3_sdcd hdmi1_hpd spi2_cs[0] uart3_rtsn
UART2_TXD MMC4_DAT1 59 spi1_cs[3] mmc3_sdwp hdmi1_cec
D28
UART2_RXD MMC4_DAT0 59
D27 REV D
UART2_CTSN MMC4_DAT2 59
C28
UART2_RTSN MMC4_DAT3 59
R776 NO-POP UART3_RXD_BOOT 58
R777 NO-POP UART3_TXD_BOOT 58
Y1 uart1_ctsn mmc4_clk
UART3_TXD C_UART3_TXD 18 uart1_rtsn mmc4_cmd
V2
UART3_RXD C_UART3_RXD 18
uart2_rxd mmc4_dat[0]
50 OHMS FOR R776 AND R777 WHEN POPULATED uart2_txd mmc4_dat[1]
F17 BASED ON SIMULATION uart2_ctsn mmc4_dat[2]
I2C2_SCL uart2_rtsn mmc4_dat[3]
C25
I2C2_SDA EVM_3V3
C20
I2C1_SCL
B C21 B
I2C1_SDA REV D
X5777BXGABC R633 R652 i2c2_sda hdmi1_ddc_scl
NO-POP NO-POP i2c2_scl hdmi1_ddc_sda
EVM_3V3
C_I2C2_SCL C_I2C2_SCL 5
C_I2C2_SDA C_I2C2_SDA 5
R618 R624
2.2K 2.2K
5 4 3 2 1
5 4 3 2 1
i2c2_sda hdmi1_ddc_scl
i2c2_scl hdmi1_ddc_sda
EVM_3V3
EVM_3V3
I2C2_SCL 13,34,35,69
I2C2_SDA 13,34,35,69
C122
0.1uF RU108
HDMI_DSDA 33
16
VCC HDMI_DSCL 33
2
4 1B1 3 REV E
4 C_I2C2_SCL 1A 1B2 5
7 2B1 6
4 C_I2C2_SDA 2A 2B2 11
9 3B1 10
3A 3B2 14
4B1 4,33 C_SPI1_CS2n HDMI_HPD 4,33
12 13 4,33 C_SPI1_CS3n
4A 4B2 HDMI_CEC_A 4,33
EVM_3V3 1 REV E
8 S 15 EVM_3V3
GND OE
C C
SN74CBTLV3257PW
R229
NO-POP
R268 R270
2.2K 2.2K
2 SEL_HDMI_I2C2
R230 EVM_3V3
10K I2C3_SDA 67
EVM_3V3
I2C3_SCL 67
UART3_RXD 59
UART3_TXD 59 C135
UART3_CTS 59
C129 UART3_RTS 59 0.1uF RU113
16
0.1uF RU111 VCC 2
16 4 1B1 3
VCC 4 C_GPIO6_14 1A 1B2 DCAN2_TX 6
2 5
4 1B1 3 7 2B1 6
4 C_SPI2_SCLK 1A 1B2 SPI[2]_SCLK 69 4 C_GPIO6_15 2A 2B2 DCAN2_RX 6
5 11
7 2B1 6 9 3B1 10
4 C_SPI2_MISO 2A 2B2 SPI[2]_MISO 69 3A 3B2
11 14
9 3B1 10 12 4B1 13
B 4 C_SPI2_MOSI SPI[2]_MOSI 69 B
3A 3B2 14 4A 4B2
12 4B1 13 1
4 C_SPI2_CS0n 4A 4B2 SPI[2]_CS[0]n 69 EVM_3V3 S
8 15
1 GND OE
8 S 15 SN74CBTLV3257PW
EVM_3V3 GND OE
SN74CBTLV3257PW R264
NO-POP
R246
10K 13 SEL_I2C3_CAN2
R247
NO-POP
spi2_sclk uart3_rxd
spi2_d[1] uart3_txd
spi2_d[0] uart3_ctsn
spi2_cs[0] uart3_rtsn
A TEXAS INSTRUMENTS INCORPORATED A
EVM_3V3
Title: VAYU EVM
Revision:
Size: B DWG NO 516582-0001 E
5 4 3 2 1
5 4 3 2 1
DCAN2_RX
5 DCAN2_RX
DCAN2_TX
5 DCAN2_TX
EVM_3V3 VDDSHV5
JP3
D 1 D
2 R645 R646
NO-POP 0
HEADER 2 EVM_5V0
CAN_PHY_3V3 CAN_PHY_3V3
C531 C540
.1uF .1uF
R238
U54 62
JP2 3 JP1
VCC 5
VIO/NC
1 DCAN1_TX 1 7 1
2 TXD CANH 2
DCAN1_RX 4 6 C525 3
RXD CANL R255 4700pF
62
C C
HEADER 2 8 2
STB GND NO-POP(HEADER 3)
SN65HVDA541
4 DCAN1_RX HVDA541QDRQ1
4 DCAN1_TX
R617
NO-POP
CAN_PHY_3V3
EVM_5V0
C527 R628
.1uF NO-POP
U110
5
B B
40,70 PMIC_OFF 2 4
1
SN74LVC1G04DCK R615
3
10K
VDDSHV5
VDDSHV5 40,83,86
EVM_3V3
EVM_3V3 3,4,5,7,8,9,11,12,13,15,16,18,20,21,22,23,24,30,31,32,33,34,35,36,38,39,40,56,57,58,59,60,63,64,65,67,68,85,86
Revision:
Size: B DWG NO 516582-0001 A
5 4 3 2 1
5 4 3 2 1
R727 10
20 AQSPI1_RTCLK
R728 10
20 AQSPI1_SCLK
R468 R_QSPI1_SCLK
23 B_QSPI1_SCLK
R465 10 NO-POP
23 QSPI1_RTCLK
EVM_3V3
C C
R726 0 R128
20 AQSPI1_D[3]
R130 R_QSPI1_D[3] 10K
23 QSPI1_D[3]
NO-POP
EVM_3V3
C67 R729/R444
U18
11,12,16,35,36,40,58,62,70 RSTOUTn
0.1uF 1 16
HOLD/IO3 SCLK 0 R729
AQSPI1_D[0] 20
2 15 R_QSPI1_D[0] R444
VCC SI/IO0 QSPI1_D[0] 23
EVM_3V3 NO-POP
3 14
RESET/RFU VIO/RFU
4 13
DNU.4 NC.13 EVM_3V3
R131 5 12
DNU.5 DNU.12
10K
6 11
R731 0 RFU.6 DNU.11 C293
20 AQSPI1_CS[0]
B R732 R_QSPI1_CS[0] 7 10 B
23 QSPI1_CS[0] CS VSS
NO-POP 0.1uF
8 9
SO/IO1 WP/IO2
0 R730
20 AQSPI1_D[1]
R132 R_QSPI1_D[1] S25FL256SAGMFV001
23 QSPI1_D[1]
NO-POP
R730/R132 R733 0
AQSPI1_D[2] 20
R_QSPI1_D[2] R443
QSPI1_D[2] 23
NO-POP
R442
10K
EVM_3V3
SWAP ON REV D
5 4 3 2 1
5 4 3 2 1
D D
EVM_3V3
EVM_3V3
U105
8 1
I2C_EEPROM_WP 7 VCC A0 2
24 I2C_EEPROM_WP WP A1
4,13,16,32,60,62,68 I2C1_SCL I2C1_SCL 6 3
I2C1_SDA 5 SCL NC 4
4,13,16,32,60,62,68 I2C1_SDA SDA VSS
24WC256 R574 R576 R578
NO-POP 0 0
C C
U117
5 3 TMP102_ALERT 13
V+ ALERT
1
6 SCL 4
SDA ADD0
2
GND
TMP102AIDRLT
EVM_3V3 EVM_3V3
C523
.1uF
U109 R629
5 3 NO-POP
V+ ALERT
B B
I2C1_SCL 1
I2C1_SDA 6 SCL 4
SDA ADD0
2
GND
TMP102AIDRLT
NO-POP R625
0
5 4 3 2 1
5 4 3 2 1
EVM_3V3
D D
R38
10K
EVM_3V3
EVM_3V3
C29 C35
EVM_3V3 0.01uF 0.01uF
C30
0.01uF
C U6 C
1 48
EVM_3V3 R56 2 NC-1 GND4 47 GPMC_D15
NC-2 I/O15 GPMC_D15 11,21,24
10K 3 46 GPMC_D14
NC-3 I/O14 GPMC_D14 11,21,24
4 45 GPMC_D13
NC-4 I/O13 GPMC_D13 11,21,24
C24 5 44 GPMC_D07
NC-5 I/O7 GPMC_D07 11,21,24
.1uF 6 43 GPMC_D06
NC-6 I/O6 GPMC_D06 11,21,24
5
7 42 GPMC_D05
R/B I/O5 GPMC_D05 11,21,24
GPMC_OEN_REN 8 41 GPMC_D04
11,20 GPMC_OEN_REN RE I/O4 GPMC_D04 11,21,24
GPMC_nCS0 2 4 9 40 GPMC_D12
11,20 GPMC_nCS0 CE I/O12 GPMC_D12 11,21,24
10 39
RU4 11 NC-7 VCC4 38
74CBTLV1G125CRG4 12 NC-8 23-NC 37
1
3
13 VCC VCC3 36
14 GND1 GND3 35
15 NC-9 22-NC 34
GPMC_BE0n_CLE 16 NC-10 VCC2 33 GPMC_D11
20 GPMC_BE0n_CLE CLE I/O11 GPMC_D11 11,21,24
GPMC_ADVn_ALE 17 32 GPMC_D03
20 GPMC_ADVn_ALE ALE I/O3 GPMC_D03 11,21,24
GPMC_WEN 18 31 GPMC_D02
11,20 GPMC_WEn WE I/O2 GPMC_D02 11,21,24
19 30 GPMC_D01
WP I/O1 GPMC_D01 11,21,24
NAND_BOOTn 20 29 GPMC_D00
13,24 NAND_BOOTn NC-11 I/O0 GPMC_D00 11,21,24
21 28 GPMC_D10
NC-12 I/O10 GPMC_D10 11,21,24
22 27 GPMC_D09
NC-13 I/O9 GPMC_D09 11,21,24
B 23 26 GPMC_D08 B
NC-14 I/O8 GPMC_D08 11,21,24
24 25
NC-15 GND2
MT29F2G16AADWP:D
GPMC_WPN
24 GPMC_WPN
5 4 3 2 1
5 4 3 2 1
D D
C C
BLANK REMOVED
B B
Revision:
Size: B DWG NO 516582-0001 A
5 4 3 2 1
5 4 3 2 1
R394 R396 R397 R400 R395 R370 R375 R390 R388 R381 R403 R402 R401 R398
10K 10K 10K 10K 10K 10K 10K 10K 10K 10K 10K 10K 10K 10K
U83
GPMC_A1 31 35 GPMC_D00
21 GPMC_A1 A0 DQ0 GPMC_D00 9,21,24
GPMC_A2 26 37 GPMC_D01
D 21 GPMC_A2 A1 DQ1 GPMC_D01 9,21,24 D
GPMC_A3 25 39 GPMC_D02
21 GPMC_A3 A2 DQ2 GPMC_D02 9,21,24
GPMC_A4 24 41 GPMC_D03
21 GPMC_A4 A3 DQ3 GPMC_D03 9,21,24
GPMC_A5 23 44 GPMC_D04
21 GPMC_A5 A4 DQ4 GPMC_D04 9,21,24
GPMC_A6 22 46 GPMC_D05
21 GPMC_A6 A5 DQ5 GPMC_D05 9,21,24
GPMC_A7 21 48 GPMC_D06
21 GPMC_A7 A6 DQ6 GPMC_D06 9,21,24
GPMC_A8 20 50 GPMC_D07
22 GPMC_A8 A7 DQ7 GPMC_D07 9,21,24
GPMC_A9 10 36 GPMC_D08
22 GPMC_A9 A8 DQ8 GPMC_D08 9,21,24
GPMC_A10 9 38 GPMC_D09
22 GPMC_A10 A9 DQ9 GPMC_D09 9,21,24
GPMC_A11 8 40 GPMC_D10
22 GPMC_A11 A10 DQ10 GPMC_D10 9,21,24
GPMC_A12 7 42 GPMC_D11
22 GPMC_A12 A11 DQ11 GPMC_D11 9,21,24
GPMC_A13 6 45 GPMC_D12
23 GPMC_A13 A12 DQ12 GPMC_D12 9,21,24
GPMC_A14 5 47 GPMC_D13
23 GPMC_A14 A13 DQ13 GPMC_D13 9,21,24
GPMC_A15 4 49 GPMC_D14
23 GPMC_A15 A14 DQ14 GPMC_D14 9,21,24
GPMC_A16 3 51 GPMC_D15
23 GPMC_A16 A15 DQ15/A-1 GPMC_D15 9,21,24
GPMC_A17 54
23 GPMC_A17 A16
GPMC_A18 19 17
23 GPMC_A18 A17 RY/BY EVM_3V3
GPMC_A19 18
23 GPMC_A19 A18 EVM_3V3
GPMC_A20 11
23 GPMC_A20 A19
GPMC_A21 12 43
23 GPMC_A21 A20 VCC
GPMC_A22 15 29
23 GPMC_A22 A21 VIO EVM_3V3
GPMC_A23 2 R376
23 GPMC_A23 A22
GPMC_A24 1 52 C251 10K
23 GPMC_A24 A23 VSS2 .1uF
GPMC_A25 56 33
23 GPMC_A25 A24 VSS1
GPMC_A26 55
C 23 GPMC_A26 A25/NC4 C
27
NC1 28
32 NC2 30 C23
34 CE NC3 .1uF
EVM_3V3 EVM_3V3 13 OE
WE
C241 14
.1uF R364 RESET
5
10K 53
BYTE
GPMC_nCS0 2 4 NOR_CEn 16
9,20 GPMC_nCS0 WP/ACC
RU82
74CBTLV1G125CRG4
1
3
S29GL512S10TFI010
EVM_3V3
NOR_BOOTn
13,24 NOR_BOOTn
B B
FLASH_BYTE
R46 R385
10K 10K R392
NO-POP
RSTOUTn R379
7,12,16,35,36,40,58,62,70 RSTOUTn
10K
FLASH_WP
Revision:
EVM_3V3 3,4,5,6,7,8,9,12,13,15,16,18,20,21,22,23,24,30,31,32,33,34,35,36,38,39,40,56,57,58,59,60,63,64,65,67,68,85,86 Size: B DWG NO 516582-0001 A
5 4 3 2 1
5 4 3 2 1
MMC2_VCCQ
EVM_1V8
R433
R410
R404
R422
R426
R406
R414
ER23
R405
R423
R428
R407 0
ER40
D D
47K
47K
47K
47K
47K
47K
NO-POP
C10
C11
C12
C13
C14
D12
D13
D14
A10
A11
A12
A13
A14
B10
B11
B12
B13
B14
EVM_3V3
47K
47K
47K
C1
C3
C5
C7
C8
C9
D1
D2
D3
D4
A1
A2
A6
A7
A8
A9
B1
B7
B8
B9
MMC2_VCCQ
NC.A1
NC.A2
NC.A6
NC.A7
NC.A8
NC.A9
NC.A10
NC.A11
NC.A12
NC.A13
NC.A14
NC.B1
NC.B7
NC.B8
NC.B9
NC.B10
NC.B11
NC.B12
NC.B13
NC.B14
NC.C1
NC.C3
NC.C5
NC.C7
NC.C8
NC.C9
NC.C10
NC.C11
NC.C12
NC.C13
NC.C14
NC.D1
NC.D2
NC.D3
NC.D4
NC.D12
NC.D13
NC.D14
R427 0 M6 C6 R798 NP
23 MMC2_CLK CLK VDD.1 M4
M5 VDD.2 N4
23 MMC2_CMD CMD VDD.3 P3 C274
A3 VDD.4 P5 C280
23 MMC2_DAT0 DAT0 VDD.5 0.22uF
2.2uF
A4
23 MMC2_DAT1 DAT1 E6
A5 VFF.1 F5 MMC2_VFF EVM_3V3
23 MMC2_DAT2 DAT2 VFF.2 J10
B2 VFF.3 K9 R429 0
23 MMC2_DAT3 DAT3 VFF.4
B3
23 MMC2_DAT4 DAT4
B4 C4 C273 C290
23 MMC2_DAT5 DAT5 VSS.1 E7 4.7uF
B5 VSS.2 G5 0.22uF
23 MMC2_DAT6 DAT6 VSS.3 H10
B6 VSS.4 K8
23 MMC2_DAT7 DAT7 VSS.5 P4
C VSS.8
VSS.7
N5 ER21 C
K5 N2
RSTN VSS.6 P6
MMC2_VCCQ VSS.9
EVM_3V3 MMC2_VDDI
EVM_1V8
C703
C2
R417 VDDI.1
15,32,59,60,63,64,68,81 EVM_1V8
47K MD1 MAE1
NC.MD1 NC.MAE1
5
MB2 MAG2
REV G .1uF C698 C269 MA4 NC.MB2
NC.MA4
NC.MAG2
NC.MAH4
MAH4
2 4 2.2uF MA6 169 WFBGA EXTENDED MOUNTING PADS MAH6
0.1uF MA9 NC.MA6 NC.MAH6 MAH9
U143 MA11 NC.MA9 NC.MAH9 MAH11
SN74LVC1G125DCKR MB13 NC.MA11 DUAL FOOTPRINT 153/169 USES 153 PIN NC.MAH11 MAG13
1
3
NC.K10
NC.K12
NC.K13
NC.K14
NC.L12
NC.L13
NC.L14
NC.J12
NC.J13
NC.J14
NC.M1
NC.M2
NC.M3
NC.M7
NC.M8
NC.M9
NC.K1 NC.H12
NC.K2
NC.K3
NC.K6
NC.K7
NC.L1
NC.L2
NC.L3
NC.J1
NC.J2
NC.J3
NC.J5
H13
A NC.H13 H14 TEXAS INSTRUMENTS INCORPORATED A
NC.H14
M1
M2
M3
M7
M8
M9
M10
M11
M12
M13
M14
L1
L2
L3
L12
L13
L14
K1
K2
K3
K6
K7
K10
K12
K13
K14
J1
J2
J3
J5
J12
J13
J14
Title: VAYU EVM
Revision:
EVM_3V3 3,4,5,6,7,8,9,11,13,15,16,18,20,21,22,23,24,30,31,32,33,34,35,36,38,39,40,56,57,58,59,60,63,64,65,67,68,85,86 Size: B DWG NO 516582-0001 H
5 4 3 2 1
5 4 3 2 1
EVM_3V3
EVM_3V3 EVM_3V3
C543
.1uF
R647 R665 R639 R662
REV E U58 NO-POP NO-POP NO-POP
10K
24
VDD
PCF8575_INT R638 0 1 21 EVM_3V3
4 PCF8575_INT INT A0 2
D A1 3 D
23 A2
4,8,13,16,32,60,62,68 I2C1_SDA SDA
4,8,13,16,32,60,62,68 I2C1_SCL 22
SCL 4 TS_LCD_GPIO1 R660 R648 R655
P0 TS_LCD_GPIO1 32
8 TMP102_ALERT 20 5 TS_LCD_GPIO2 10K 10K 10K
P17 P1 TS_LCD_GPIO2 32
19 6 TS_LCD_GPIO3 R674 R676 R677 R682
P16 P2 TS_LCD_GPIO3 32 330 330 330 330
32 CON_LCD_PWR_DN 18 7 TS_LCD_GPIO4
P15 P3 TS_LCD_GPIO4 32
17 8 USER_LED1
38 PCI_SW_RESETn P14 P4
56 USB2_VBUS_OCN 16 9 USER_LED2
15 P13 P5 10 USER_LED3 DS1 DS2 DS3 DS4
56 USB1_VBUS_OCN P12 P6
14 11 USER_LED4 LED_GRN LED_GRN LED_GRN LED_GRN
64 EXP_ETH1_RSTn P11 P7
13 12
63 EXP_ETH0_RSTn P10 GND
PCF8575
USER_LED1
USER_LED2
USER_LED3
EVM_3V3 USER_LED4
EVM_3V3
C C
C544
.1uF EVM_3V3
R666 R640 R663
U57 10K NO-POP NO-POP
REV E 24 EVM_3V3 3,4,5,6,7,8,9,11,12,15,16,18,20,21,22,23,24,30,31,32,33,34,35,36,38,39,40,56,57,58,59,60,63,64,65,67,68,85,86
VDD
PCF8575_INT R786 0 1 21
INT A0 2 EVM_3V3
A1 3
23 A2
4,8,13,16,32,60,62,68 I2C1_SDA SDA
4,8,13,16,32,60,62,68 I2C1_SCL 22
SCL 4 R661 R649 R656
20 P0 5 NO-POP 10K 10K R790 R789 C697
5
24 FORCE_EMU
SEL_UART3_SPI2 19 P17
P16
P1
P2
6
USB1_ID
USB2_ID
57
57 10K 10K .1uF REV G
24,59 MCASP1_ENn 18 7
17 P15 P3 8
24,58 UART_SEL1_3 P14 P4
5
23,24 QSPI_BOOT 16 9
P13 P5 R793
13,23,24,42 MMC2_BOOTn 15 10
14 P12 P6 11 NOR_BOOTn_OVR 2 4
11,13,24 NOR_BOOTn P11 P7 NOR_BOOTn 11,13,24
9,24 NAND_BOOTn 13 12
P10 GND U139
PCF8575 SN74LVC1G125DCKR 100
1
3
B SEL_GPMC_AD_VID_S0 21,22 NOR_BOOTn_OVR_OEN B
SEL_I2C3_CAN2 5 EVM_3V3
SEL_ENET_MUX_S0 18
MMC_PWR_ON 15
EVM_3V3
EVM_3V3
REVC-DR1 R792 R791
10K 10K
C691 R754 R750 R753
U119
5
REV E .1uF NO-POP 10K 10K REV D
R794
24
VDD MMC2_BOOT_OVR 2 4 MMC2_BOOTn 13,23,24,42
PCF8575_INT R785 NOPOP 1 21
INT A0 2 U140
A1 3 SN74LVC1G125DCKR 100
1
3
23 A2
5,34,35,69 I2C2_SDA SDA
5,34,35,69 I2C2_SCL 22 MMC2_BOOT_OVR_OEN
SCL 4 R752 R751 R749
NOR_BOOTn_OVR 20 P0 5 10K NO-POP NO-POP
NOR_BOOTn_OVR_OEN 19 P17 P1 6
MMC2_BOOT_OVR 18 P16 P2 7
A MMC2_BOOT_OVR_OEN 17 P15 P3 8 TEXAS INSTRUMENTS INCORPORATED A
16 P14 P4 9
15 P13 P5 10
REVC-DR1 14 P12
P11
P6
P7
11 Title: VAYU EVM
13 12 VIN6_SEL_S0 3
P10 GND Page Contents: I2C EXPANDER
VIN2_S0 31
PCF8575 CAM_FPD_MUX_S0 30
Revision:
HDMI_CT_HPD 33
Size: B DWG NO 516582-0001 G
HDMI_LS_OE 33
Date: Tuesday, January 12, 2016 Sheet 13 of 89
5 4 3 2 1
5 4 3 2 1
D D
U52-15
AA6 MMC1_DAT0
MMC1_DAT0 MMC1_DAT0 15
Y4 MMC1_DAT1
MMC1_DAT1 MMC1_DAT1 15
AA5 MMC1_DAT2
MMC1_DAT2 MMC1_DAT2 15
Y3 MMC1_DAT3
MMC1_DAT3 MMC1_DAT3 15
Y5 1 TP37
MMC1_BIAS TP_0
W7 MMC1_SD_CD
MMC1_SDCD MMC1_SD_CD 15
Y9
MMC1_SDWP GP6_[28] 16
C C
X5777BXGABC
B B
Revision:
Size: B DWG NO 516582-0001 A
5 4 3 2 1
5 4 3 2 1
MMC1_3V3 EVM_3V3_SD
C233 C12
R19 R18 R17 R16 R15 R14 10uF
ER41 0.1uF P14
14
13
12
47K 47K 10K 47K 47K 47K
D D
14
13
12
15
15
MMC1_DAT2 R340 33 CON_MMC1_DAT2 1 9
14 MMC1_DAT2 DAT2 INSERT
MMC1_DAT3 R345 33 CON_MMC1_DAT3 2
14 MMC1_DAT3 DAT3
MMC1_CMD R344 33 CON_MMC1_CMD 3
14 MMC1_CMD CMD
4
MMC1_CLK R343 33 CON_MMC1_CLK 5 VDD 10
14 MMC1_CLK CLK INSERT_COM
6
MMC1_DAT0 R342 33 CON_MMC1_DAT0 7 VSS
14 MMC1_DAT0 DAT0
MMC1_DAT1 R341 33 CON_MMC1_DAT1 8
14 MMC1_DAT1 DAT1 R304
11
1K
11
MicroSD_CARD
EVM_3V3_SD
EVM_3V3_SD
EVM_3V3_SD
C16 C15
0.1uF 0.1uF C14
C C
0.1uF EVM_3V3_SD
DR31
R823 NP
1
U77 U78 U79
VCC
VCC
VCC
C693
3 5 3 5 3 5 0.1uF
IO1 IO2 IO1 IO2 IO1 IO2
2 2 2
NC.2 NC.2 NC.2
1
U122
GND
GND
GND
VCC
3 5
IO1 IO2 EVM_1V8
4
4
TPD2E001DRL-Q1 TPD2E001DRL-Q1 TPD2E001DRL-Q1 2
MMC1_3V3 NC.2
GND
R787
R327 NO-POP
4
MMC1_3V3 10K TPD2E001DRL-Q1
B MMC1_3V3 85 B
REV E
14 MMC1_SD_CD
EVM_3V3
EVM_3V3_SD
U123
1 8
R772 VIN.1 VOUT.1
10K C694
10uF 2 7 EVM_1V8
VIN.2 VOUT.2
~97 micro second ramp EVM_1V8 EVM_1V8 12,32,59,60,63,64,68,81
13 MMC_PWR_ON 3 6
ON CT
PS_EVM_5V0
4 5 VDDS18V
R774 0 VBIAS GND C695
PWR_PAD NO-POP VDDS18V VDDS18V 16,42,43,73,81
TPS22965DSG
EVM_3V3 Page Contents: SD CARD
Revision:
EVM_3V3 3,4,5,6,7,8,9,11,12,13,16,18,20,21,22,23,24,30,31,32,33,34,35,36,38,39,40,56,57,58,59,60,63,64,65,67,68,85,86 Size: B DWG NO 516582-0001 H
5 4 3 2 1
5 4 3 2 1
PLACE 100 OHM RESISTORS AT CPU
U52-20
VDDS18V
AA7 AB1 MLBP_CLK_P 100 ohm diff pairs
Y7 VDDS_MLBP.1 MLBP_CLK_P AB2 MLBP_CLK_N
VDDS_MLBP.2 MLBP_CLK_N R184
100
C470
0.1uF
AA1 MLBP_DAT_P
MLBP_DAT_P AA2 MLBP_DAT_N
D MLBP_DAT_N R183 D
100
AC1 MLBP_SIG_P
MLBP_SIG_P AC2 MLBP_SIG_N
MLBP_SIG_N R182
100
X5777BXGABC
1 J12
2
MLBP_SIG_N NO-POP(HD2-2MM)
MLBP_SIG_P
R148 R139
C C
NO-POP NO-POP
1
2 J10
MLBP_DAT_N NO-POP(HD2-2MM)
MLBP_DAT_P P8
SH_GND.3
SH_GND.4
SH_GND.2
SH_GND.1
EVM_3V3 EVM_3V3
EVM_12V
EVM_12V
EVM_12V 38,68,74,87
A 44 TEXAS INSTRUMENTS INCORPORATED A
43
42
41
QSH-020-01-L-D-DP-A
Revision:
EVM_3V3 3,4,5,6,7,8,9,11,12,13,15,18,20,21,22,23,24,30,31,32,33,34,35,36,38,39,40,56,57,58,59,60,63,64,65,67,68,85,86 Size: B DWG NO 516582-0001 A
5 4 3 2 1
5 4 3 2 1
U52-3
U5 C_EMAC[0]_RXC_CPU
D RGMII0_RXC C_EMAC[0]_RXC 18 D
V5 C_EMAC[0]_RXCTL
RGMII0_RXCTL C_EMAC[0]_RXCTL 18
W2 C_EMAC[0]_RXD0
RGMII0_RXD0 C_EMAC[0]_RXD0 18
Y2 C_EMAC[0]_RXD1
RGMII0_RXD1 C_EMAC[0]_RXD1 18
V3 C_EMAC[0]_RXD2
RGMII0_RXD2 C_EMAC[0]_RXD2 18
V4 C_EMAC[0]_RXD3
RGMII0_RXD3 C_EMAC[0]_RXD3 18
V1 C_MDIO_MDCLK C_MDIO_MDCLK 18
C MDIO_MCLK C
U4 C_MDIO_MDIO
MDIO_D C_MDIO_MDIO 18
mdio_mclk vin4b_clk1
mdio_d vin4b_d[0] X5777BXGABC
RMII_MHZ_50_CLK
uart3_rxd vin4b_d[1]
uart3_txd vin4b_d[2]
rgmii0_txc vin4b_d[3]
rgmii0_txctl vin4b_d[4]
rgmii0_txd[3] vin4b_de1
rgmii0_txd[2] vin4b_hsync1
rgmii0_txd[1] vin4b_vsync1
rgmii0_txd[0]
rgmii0_rxc vin4b_d[5]
rgmii0_rxctl vin4b_d[6]
rgmii0_rxd[3] vin4b_d[7]
rgmii0_rxd[2]
rgmii0_rxd[1]
rgmii0_rxd[0] vin4b_fld1
B B
Revision:
Size: B DWG NO 516582-0001 A
5 4 3 2 1
5 4 3 2 1
EVM_3V3
C311
R469 .1uF FUNCTION TABLE
10K U28
INPUTS INPUTS/OUTPUTS FUNCTION
5
2 4 SEL_ENET_MUX_S1
S2 S1 S0 A1 A2
13 SEL_ENET_MUX_S0
1 L L L Z Z Disconnect
D SN74LVC1G04DCK L L H B1 Z A1 port = B1 port D
3
EVM_3V3
L H L B2 Z A1 port = B2 port
SEL_ENET_MUX_S0
RU95
L H H Z B1 A2 port = B1 port
C323 H L L Z B2 A2 port = B2 port
1 17 .1uF
56 S0
S1
VCC.1 H L H Z Z Disconnect
55
S2 H H L B1 B2 A1 port = B1 port
17 C_EMAC[0]_RXC
2
4 1A1 1B1
54
52
EMAC[0]_RXC
EMAC[0]_RXCTL
EMAC[0]_RXC
EMAC[0]_RXCTL
63
63
A2 port = B2 port
17 C_EMAC[0]_RXCTL 2A1 2B1
17 C_EMAC[0]_RXD0
6
9 3A1 3B1
50
47
EMAC[0]_RXD0
EMAC[0]_RXD1
EMAC[0]_RXD0 63 H H H B2 B1 A1 port = B2 port
17 C_EMAC[0]_RXD1 4A1 4B1 EMAC[0]_RXD1 63
17 C_EMAC[0]_RXD2
11
13 5A1 5B1
45
43
EMAC[0]_RXD2
EMAC[0]_RXD3
EMAC[0]_RXD2 63 A2 port = B1 port
17 C_EMAC[0]_RXD3 6A1 6B1 EMAC[0]_RXD3 63
17 C_EMAC[0]_TXD0 15 41 EMAC[0]_TXD0 EMAC[0]_TXD0 63
18 7A1 7B1 39 EMAC[0]_TXD1
17 C_EMAC[0]_TXD1 8A1 8B1 EMAC[0]_TXD1 63
17 C_EMAC[0]_TXD2 21 36 EMAC[0]_TXD2 EMAC[0]_TXD2 63
23 9A1 9B1 34 EMAC[0]_TXD3
17 C_EMAC[0]_TXD3 10A1 10B1 EMAC[0]_TXD3 63
17 C_EMAC[0]_TXCTL 25 32 EMAC[0]_TXCTL EMAC[0]_TXCTL 63
27 11A1 11B1 30 EMAC[0]_TXC
17 C_EMAC[0]_TXC 12A1 12B1 EMAC[0]_TXC 63
C C
3 53 VIN[4]B_D[5] VIN[4]B_D[5] 67
5 1A2 1B2 51 VIN[4]B_D[6]
2A2 2B2 VIN[4]B_D[6] 67
7 48 GP5[31] GP5[31] 67
10 3A2 3B2 46 GP5[30]
4A2 4B2 GP5[30] 67
12 44 GP5[29] GP5[29] 67
mdio_mclk vin4b_clk1 gpio5_15 14 5A2 5B2 42 VIN[4]B_D[7]
mdio_d vin4b_d[0] gpio5_16 6A2 6B2 VIN[4]B_D[7] 67
16 40 GP5[25] GP5[25] 67
RMII_MHZ_50_CLK gpio5_17 20 7A2 7B2 37 VIN[4]B_VSYNC1
uart3_rxd vin4b_d[1] gpio5_18 8A2 8B2 VIN[4]B_VSYNC1 67
uart3_txd vin4b_d[2] gpio5_19
22 35 VIN[4]B_HSYNC1 VIN[4]B_HSYNC1 67
24 9A2 9B2 33 GP5[22]
rgmii0_txc vin4b_d[3] gpio5_20 10A2 10B2 GP5[22] 67
rgmii0_txctl vin4b_d[4] gpio5_21 26 31 VIN[4]B_D[4] VIN[4]B_D[4] 67
28 11A2 11B2 29 VIN[4]B_D[3]
rgmii0_txd[3] vin4b_de1 gpio5_22 VIN[4]B_D[3] 67
rgmii0_txd[2] vin4b_hsync1 gpio5_23 12A2 12B2
rgmii0_txd[1] vin4b_vsync1 gpio5_24
rgmii0_txd[0] gpio5_25 R723 8
rgmii0_rxc vin4b_d[5] gpio5_26 GND.1 19
rgmii0_rxctl vin4b_d[6] gpio5_27 0 GND.2
rgmii0_rxd[3] vin4b_d[7] gpio5_28 38
GND.3 49
rgmii0_rxd[2] gpio5_29 GND.4
rgmii0_rxd[1] gpio5_30
rgmii0_rxd[0] vin4b_fld1 gpio5_31
SN74CBTLV16212GR
B B
EVM_3V3
C296
0.1uF RU89
16
VCC 2 MDIO_MDCLK
1B1 MDIO_MDCLK 63,64
17 C_MDIO_MDCLK 4 3 VIN[4]B_CLK1 VIN[4]B_CLK1 67
1A 1B2 5 MDIO_MDIO
2B1 MDIO_MDIO 63,64
7 6 VIN[4]B_D[0] VIN[4]B_D[0] 67
17 C_MDIO_MDIO 2A 2B2 11
9 3B1 10 VIN[4]B_D[2]
4 C_UART3_TXD 3A 3B2 VIN[4]B_D[2] 67
14
12 4B1 13 VIN[4]B_D[1]
4 C_UART3_RXD 4A 4B2 VIN[4]B_D[1] 67
1
8 S 15
GND OE
A SN74CBTLV3257PW TEXAS INSTRUMENTS INCORPORATED A
5 4 3 2 1
5 4 3 2 1
DIFFERENTIAL PAIR
90 OHM DIFFERENTIAL
IMPEDANCE
SHORT AND STRAIGHT AS
D
VUSB_3V3 3.3 VOLT POSSIBLE, D
MINIMUM NUMBER OF VIAS
C489 C451 C439 C440
0.1uF 0.01uF 0.001uF 10uF
U52-12
AA12
Y12 VDDA33V_USB1
VDDA33V_USB2 AE12
VDDA_1V8_PHY USB_RXP0 USB_RXP0 57
AF12 USB_RXN0 57
USB_RXN0
1.8 VOLT
AA13 AD11 USB_TXP0 57
VDDA_USB1 USB_TXP0 AC11
USB_TXN0 USB_TXN0 57
C486 C510 C511
0.1uF 0.01uF 0.001uF AB12
VDDA_USB2
X5777BXGABC
B B
VUSB_3V3
VUSB_3V3 VUSB_3V3 84
Revision:
Size: B DWG NO 516582-0001 A
5 4 3 2 1
5 4 3 2 1
EVM_3V3
R163
10K U52-4
D D
R6 RC_GPMC_A0 R160 0 C_GPMC_A0
GPMC_A0 C_GPMC_A0 21
9 GPMC_WAIT N2 T9 RC_GPMC_A1 R507 0 C_GPMC_A1
GPMC_WAIT0 GPMC_A1 C_GPMC_A1 21
T6 RC_GPMC_A2 R504 0 C_GPMC_A2
GPMC_A2 C_GPMC_A2 21
T7 RC_GPMC_A3 R505 0 C_GPMC_A3
GPMC_A3 C_GPMC_A3 21
M7 C_GPMC_A20
GPMC_A20 C_GPMC_A20 23
J5 C_GPMC_A21
GPMC_A21 C_GPMC_A21 23
K6 C_GPMC_A22
GPMC_A22 C_GPMC_A22 23
J7 RC_GPMC_A23 R495 0 C_GPMC_A23
GPMC_A23 C_GPMC_A23 23
J4 C_GPMC_A24
GPMC_A24 C_GPMC_A24 23
J6 C_GPMC_A25
GPMC_A25 C_GPMC_A25 23
H4 C_GPMC_A26
GPMC_A26 C_GPMC_A26 23
H5 C_GPMC_A27
GPMC_A27 C_GPMC_A27 23
N1 GPMC_ADVn_ALE
gpmc_ad[0] vout3_d[0] gpmc_a[19] mmc2_dat[4] gpmc_a[13] QSPI1 qspi1_rtclk GPMC_ADVN_ALE GPMC_ADVn_ALE 9
gpmc_ad[1] vout3_d[1] gpmc_a[20] mmc2_dat[5] gpmc_a[14] QSPI1 qspi1_d[3] N6 GPMC_BE0n_CLE
gpmc_ad[2] vout3_d[2] gpmc_a[21] mmc2_dat[6] gpmc_a[15] QSPI1 qspi1_d[2] GPMC_BEN0 GPMC_BE0n_CLE 9
gpmc_ad[3] vout3_d[3] gpmc_a[22] mmc2_dat[7] gpmc_a[16] QSPI1 qspi1_d[0] M4 GP2[27]
gpmc_ad[4] vout3_d[4] gpmc_a[23] mmc2_clk gpmc_a[17] QSPI1 qspi1_d[1] GPMC_BEN1 GP2[27] 68
B gpmc_ad[5] vout3_d[5] gpmc_a[24] mmc2_dat[0] gpmc_a[18] QSPI1 qspi1_sclk B
gpmc_ad[6] vout3_d[6] gpmc_a[25] mmc2_dat[1] M5 RC_GPMC_OEN_REn R489 0 GPMC_OEN_REn
GPMC_OEN_REN GPMC_OEN_REn 9,11
gpmc_ad[7] vout3_d[7] gpmc_a[26] mmc2_dat[2]
gpmc_ad[8] vout3_d[8] gpmc_a[27] mmc2_dat[3] M3 RC_GPMC_WEn R490 0 GPMC_WEn
gpmc_ad[9] vout3_d[9] gpmc_cs[1] mmc2_cmd GPMC_WEN GPMC_WEn 9,11
gpmc_ad[10] vout3_d[10]
gpmc_ad[11] vout3_d[11] R735 0
gpmc_ad[12] vout3_d[12] 7 AQSPI1_RTCLK
gpmc_ad[13] vout3_d[13] R736 NO-POP RC_GPMC_A13 T1 RC_GPMC_nCS0 R158 0 GPMC_nCS0
23 C_GPMC_A13 GPMC_CS0 GPMC_nCS0 9,11
gpmc_ad[14] vout3_d[14] R737 0
7 AQSPI1_D[3]
gpmc_ad[15] vout3_d[15] R738 NO-POP RC_GPMC_A14 H6 RC_C_GPMC_nCS1 R494 0 C_GPMC_nCS1
23 C_GPMC_A14 GPMC_CS1 C_GPMC_nCS1 23
gpmc_a[0] vout3_d[16] R739 0
7 AQSPI1_D[2]
gpmc_a[1] vout3_d[17] R740 NO-POP RC_GPMC_A15 P2 RC_GPMC_nCS2
gpmc_a[2] vout3_d[18] 23 C_GPMC_A15 GPMC_CS2
R741 0
gpmc_a[3] vout3_d[19] 7 AQSPI1_D[0]
R742 NO-POP RC_GPMC_A16 P1 RC_GPMC_nCS3 R161 0 C_GPMC_nCS3
gpmc_a[4] vout3_d[20] 23 C_GPMC_A16 GPMC_CS3 C_GPMC_nCS3 22
R743 0
gpmc_a[5] vout3_d[21] 7 AQSPI1_D[1]
gpmc_a[6] vout3_d[22] R744 NO-POP RC_GPMC_A17 P7 1 TP38
23 C_GPMC_A17 GPMC_CLK
gpmc_a[7] vout3_d[23] R745 0
7 AQSPI1_SCLK
gpmc_a[8] vout3_hsync R746 NO-POP RC_GPMC_A18
23 C_GPMC_A18
gpmc_a[9] vout3_vsync R747 0 X5777BXGABC
7 AQSPI1_CS[0]
gpmc_a[10] vout3_de R748 NO-POP RC_GPMC_nCS2
gpmc_a[11] vout3_fld 23 C_GPMC_nCS2
5 4 3 2 1
5 4 3 2 1
FUNCTION TABLE
INPUTS INPUTS/OUTPUTS FUNCTION
S2 S1 S0 A1 A2
DEFAULTS TO GPMC FOR BOOTING L L L Z Z Disconnect
EVM_3V3 L L H B1 Z A1 port = B1 port
D L H L B2 Z A1 port = B2 port D
L H H Z B1 A2 port = B1 port
C297
.1uF
H L L Z B2 A2 port = B2 port
R458
10K H L H Z Z Disconnect
U22 H H L B1 B2 A1 port = B1 port
5
A2 port = B2 port
2 4 SEL_GPMC_AD_VID_S1
13,22 SEL_GPMC_AD_VID_S0
1
SEL_GPMC_AD_VID_S1 22 H H H B2 B1 A1 port = B2 port
A2 port = B1 port
SN74LVC1G04DCK
3
SEL_GPMC_AD_VID_S0 EVM_3V3 SEL_GPMC_AD_VID_S0 EVM_3V3
SEL_GPMC_AD_VID_S1
RU88 RU94
C308 C85
1 17 0.1uF 1 17 0.1uF
C S0 VCC.1 S0 VCC.1 C
56 56
55 S1 55 S1
S2 S2
20 C_GPMC_D15 2 54 GPMC_D15 20 C_GPMC_D03 2 54 GPMC_D03
1A1 1B1 GPMC_D15 9,11,24 1A1 1B1 GPMC_D03 9,11,24
20 C_GPMC_D14 4 52 GPMC_D14 20 C_GPMC_D02 4 52 GPMC_D02
2A1 2B1 GPMC_D14 9,11,24 2A1 2B1 GPMC_D02 9,11,24
20 C_GPMC_D13 6 50 GPMC_D13 20 C_GPMC_D01 6 50 GPMC_D01
3A1 3B1 GPMC_D13 9,11,24 3A1 3B1 GPMC_D01 9,11,24
20 C_GPMC_D12 9 47 GPMC_D12 20 C_GPMC_D00 9 47 GPMC_D00
4A1 4B1 GPMC_D12 9,11,24 4A1 4B1 GPMC_D00 9,11,24
20 C_GPMC_D11 11 45 GPMC_D11 11 45
5A1 5B1 GPMC_D11 9,11,24 20 C_GPMC_A0 5A1 5B1
20 C_GPMC_D10 13 43 GPMC_D10 13 43 GPMC_A1 GPMC_A1 11
6A1 6B1 GPMC_D10 9,11,24 20 C_GPMC_A1 6A1 6B1
20 C_GPMC_D09 15 41 GPMC_D09 15 41 GPMC_A2 GPMC_A2 11
7A1 7B1 GPMC_D09 9,11,24 20 C_GPMC_A2 7A1 7B1
20 C_GPMC_D08 18 39 GPMC_D08 18 39 GPMC_A3 GPMC_A3 11
8A1 8B1 GPMC_D08 9,11,24 20 C_GPMC_A3 8A1 8B1
20 C_GPMC_D07 21 36 GPMC_D07 21 36 GPMC_A4 GPMC_A4 11
9A1 9B1 GPMC_D07 9,11,24 20 C_GPMC_A4 9A1 9B1
20 C_GPMC_D06 23 34 GPMC_D06 23 34 GPMC_A5 GPMC_A5 11
10A1 10B1 GPMC_D06 9,11,24 20 C_GPMC_A5 10A1 10B1
20 C_GPMC_D05 25 32 GPMC_D05 25 32 GPMC_A6 GPMC_A6 11
11A1 11B1 GPMC_D05 9,11,24 20 C_GPMC_A6 11A1 11B1
20 C_GPMC_D04 27 30 GPMC_D04 27 30 GPMC_A7 GPMC_A7 11
12A1 12B1 GPMC_D04 9,11,24 20 C_GPMC_A7 12A1 12B1
EVM_3V3
A TEXAS INSTRUMENTS INCORPORATED A
Revision:
Size: B DWG NO 516582-0001 A
gpmc_cs[3] vout3_clk
Date: Tuesday, January 12, 2016 Sheet 21 of 89
5 4 3 2 1
5 4 3 2 1
D D
RU33
C322
1 17 0.1uF
56 S0 VCC.1
55 S1
S2
2 54 GPMC_A8 11
20 C_GPMC_A8 1A1 1B1
4 52 GPMC_A9 11
20 C_GPMC_A9 2A1 2B1
6 50 GPMC_A10 11
C 20 C_GPMC_A10 3A1 3B1 C
9 47 GPMC_A11 11
20 C_GPMC_A11 4A1 4B1
11 45 GPMC_A12 11
20 C_GPMC_A12 5A1 5B1
13 43
15 6A1 6B1 41
18 7A1 7B1 39
21 8A1 8B1 36
23 9A1 9B1 34
25 10A1 10B1 32
C_GPMC_nCS3 27 11A1 11B1 30
20 C_GPMC_nCS3 12A1 12B1
3 53 VOUT3B_HSYNC VOUT3B_HSYNC 34
5 1A2 1B2 51 VOUT3B_VSYNC
2A2 2B2 VOUT3B_VSYNC 34
7 48 VOUT3B_DE VOUT3B_DE 34
10 3A2 3B2 46 VOUT3B_INTB
4A2 4B2 VOUT3B_INTB 34
12 44
14 5A2 5B2 42 REV E
16 6A2 6B2 40
gpmc_ad[0] vout3_d[0] 20 7A2 7B2 37
gpmc_ad[1] vout3_d[1] 22 8A2 8B2 35
gpmc_ad[2] vout3_d[2] 24 9A2 9B2 33
gpmc_ad[3] vout3_d[3] 26 10A2 10B2 31
gpmc_ad[4] vout3_d[4] 11A2 11B2
gpmc_ad[5] vout3_d[5] 28 29 VOUT3B_CLK VOUT3B_CLK 34
12A2 12B2
B gpmc_ad[6] vout3_d[6] B
gpmc_ad[7] vout3_d[7]
gpmc_ad[8] vout3_d[8] R718 8
gpmc_ad[9] vout3_d[9] GND.1 19
0 GND.2
gpmc_ad[10] vout3_d[10] 38
gpmc_ad[11] vout3_d[11] GND.3 49
gpmc_ad[12] vout3_d[12] GND.4
gpmc_ad[13] vout3_d[13]
gpmc_ad[14] vout3_d[14]
gpmc_ad[15] vout3_d[15] SN74CBTLV16212GR
gpmc_a[0] vout3_d[16]
gpmc_a[1] vout3_d[17]
gpmc_a[2] vout3_d[18]
gpmc_a[3] vout3_d[19]
gpmc_a[4] vout3_d[20]
gpmc_a[5] vout3_d[21]
gpmc_a[6] vout3_d[22]
gpmc_a[7] vout3_d[23]
gpmc_a[8] vout3_hsync
gpmc_a[9] vout3_vsync EVM_3V3
gpmc_a[10] vout3_de
gpmc_a[11] vout3_fld
EVM_3V3 3,4,5,6,7,8,9,11,12,13,15,16,18,20,21,23,24,30,31,32,33,34,35,36,38,39,40,56,57,58,59,60,63,64,65,67,68,85,86
A TEXAS INSTRUMENTS INCORPORATED A
Revision:
Size: B DWG NO 516582-0001 E
5 4 3 2 1
5 4 3 2 1
EVM_3V3
EVM_3V3
C298
.1uF RU21
C69
U20 1 17 0.1uF
S0 VCC.1
5
56
55 S1
D 2 4 S2 gpmc_a[19] mmc2_dat[4] D
13,24,42 MMC2_BOOTn gpmc_a[20] mmc2_dat[5]
1 C_GPMC_A19 2 54
20 C_GPMC_A19 1A1 1B1 GPMC_A19 11 gpmc_a[21] mmc2_dat[6]
C_GPMC_A20 4 52
20 C_GPMC_A20 2A1 2B1 GPMC_A20 11 gpmc_a[22] mmc2_dat[7]
SN74LVC1G04DCK C_GPMC_A21 6 50
20 C_GPMC_A21 GPMC_A21 11 gpmc_a[23] mmc2_clk
3
C_GPMC_A22 9 3A1 3B1 47
20 C_GPMC_A22 4A1 4B1 GPMC_A22 11 gpmc_a[24] mmc2_dat[0]
C_GPMC_A23 11 45 gpmc_a[25] mmc2_dat[1]
20 C_GPMC_A23 5A1 5B1 GPMC_A23 11
C_GPMC_A24 13 43 gpmc_a[26] mmc2_dat[2]
20 C_GPMC_A24 6A1 6B1 GPMC_A24 11
C_GPMC_A25 15 41 gpmc_a[27] mmc2_dat[3]
20 C_GPMC_A25 7A1 7B1 GPMC_A25 11 gpmc_cs[1] mmc2_cmd
DEFAULTS TO GPMC FOR BOOTING C_GPMC_A26 18 39
20 C_GPMC_A26 8A1 8B1 GPMC_A26 11
C_GPMC_A27 21 36
20 C_GPMC_A27 9A1 9B1
USE MMC2 BOOT SWITCH TO OVER RIDE C_GPMC_nCS1 23 34
20 C_GPMC_nCS1 10A1 10B1
25 32
27 11A1 11B1 30
12A1 12B1
3 53
1A2 1B2 MMC2_DAT4 12
5 51
2A2 2B2 MMC2_DAT5 12
7 48
3A2 3B2 MMC2_DAT6 12
10 46
4A2 4B2 MMC2_DAT7 12
12 44
5A2 5B2 MMC2_CLK 12
14 42
6A2 6B2 MMC2_DAT0 12
16 40
7A2 7B2 MMC2_DAT1 12
20 37
8A2 8B2 MMC2_DAT2 12
22 35
C 9A2 9B2 MMC2_DAT3 12 C
24 33
10A2 10B2 MMC2_CMD 12
26 31
28 11A2 11B2 29
12A2 12B2
EVM_3V3
R717 8
GND.1 19
0 GND.2
C312 38
.1uF GND.3 49
GND.4
U27 SN74CBTLV16212GR
5
EVM_3V3
2 4
13,24 QSPI_BOOT
1
SN74LVC1G04DCK RU32
3
C84
1 17 0.1uF
56 S0 VCC.1
55 S1
S2
DEFAULTS TO GPMC FOR BOOTING
B C_GPMC_A13 2 54 B
20 C_GPMC_A13 1A1 1B1 GPMC_A13 11
USE QSPI BOOT SWITCH TO OVER RIDE C_GPMC_A14 4 52
20 C_GPMC_A14 2A1 2B1 GPMC_A14 11
C_GPMC_A15 6 50
20 C_GPMC_A15 3A1 3B1 GPMC_A15 11
C_GPMC_A16 9 47
20 C_GPMC_A16 4A1 4B1 GPMC_A16 11
C_GPMC_A17 11 45
20 C_GPMC_A17 5A1 5B1 GPMC_A17 11
C_GPMC_A18 13 43
20 C_GPMC_A18 6A1 6B1 GPMC_A18 11
C_GPMC_nCS2 15 41
20 C_GPMC_nCS2 7A1 7B1
18 39
21 8A1 8B1 36
23 9A1 9B1 34
25 10A1 10B1 32
27 11A1 11B1 30
12A1 12B1
5 4 3 2 1
5 4 3 2 1
EVM_3V3
SW2
TDA08H0SB1R
R114
R113
R112
R111
R110
R117
R116
R115
10K
10K
10K
10K
10K
10K
10K
10K
MMC2 BOOT PULL UP ON PAGE 23 SET TO LOGIC 0 TO
ENABLE MMC2 MUX FOR BOOTING SET TO 1 FOR GPMC
BOOTING
C C
EVM_3V3
QSPI BOOT PULL UP ON PAGE 23 SET TO LOGIC 0 TO
ENABLE QSPI MUX FOR BOOTING SET TO 1 FOR GPMC
SW3 BOOTING
9,11,21 GPMC_D08 1 16 1K R88
9,11,21 GPMC_D09 2 15 1K R89
9,11,21 GPMC_D10 3 14 1K R90
9,11,21 GPMC_D11 4 13 1K R91
9,11,21 GPMC_D12 5 12 1K R92 UART SEL1_3 PULL UP ON PAGE 58 SELECTS UART3
6 11 1K R93
9,11,21 GPMC_D13
7 10 1K R94
MUX INPUT TO BE USART PORT AT MINI_USB A(J1)
9,11,21 GPMC_D14 DURING BOOTING.
9,11,21 GPMC_D15 8 9 1K R95
MCASP1_ENn MUST BE SET TO LOGIC 1 TO DISABLE
TDA08H0SB1R COM8. ALSO OTHER MUX NEEDS TO BE IN DEFAULT
CONFIGURATION
R125
R124
R123
R122
R121
R120
R119
R118
10K
10K
10K
10K
10K
10K
10K
10K
B B
EVM_3V3
R757 R756 R201 R215 R766 R383 R470 R459 R234 R239
10K 10K 10K 10K 10K 10K 10K 10K 10K 10K
SW5
9,13 NAND_BOOTn 20 1
1 1K R619
11,13 NOR_BOOTn 19 2
2 1K R612
13,23,42 MMC2_BOOTn 18 3 1K R610
3
17 4 1K R604
13,23 QSPI_BOOT 4
13,58 UART_SEL1_3 16 5
5 1K R601
13,59 MCASP1_ENn 15 6
6 1K R599
13 FORCE_EMU 14 7
7 1K R594
PCI_RESET_SEL 13 8 1K R585
38 PCI_RESET_SEL 8
GPMC_WPN 12 9 1K R579
9 GPMC_WPN 9
A
8 I2C_EEPROM_WP 11 10
10 1K R569 TEXAS INSTRUMENTS INCORPORATED A
DIP_SWITCH-10
Title: VAYU EVM
5 4 3 2 1
5 4 3 2 1
EACH DATA GROUP IS MATCHED WITHIN THE GROUP differential pairs 100 ohm
6 places U52-5
R812 1K 1%
CPU_VDD_DDR 26,44,80
R813 1K 1%
49 DDR1_DQM_ECC DDR1_DQM_ECC V26 C514
DDR1_DQM_ECC 0.1uF
49 DDR1_DQS_ECC DDR1_DQS_ECC V27
DDR1_DQSN_ECC V28 DDR1_DQS_ECC
49 DDR1_DQSN_ECC DDR1_DQSN_ECC
DDR_VREFSTL1 Revision:
Size: B DWG NO 516582-0001 A
DDR_VREFSTL1
DDR_VREFSTL1 49,77 Date: Tuesday, January 12, 2016 Sheet 25 of 89
5 4 3 2 1
5 4 3 2 1
EACH DATA GROUP IS MATCHED WITHIN THE GROUP differential pairs 100 ohm
5 places
U52-6
DDR2_DQM0 F28
53 DDR2_DQM0 DDR2_DQM0 U23 DDR2_BA0 DDR2_BA0 52,53,55
D DDR2_DQS0 G28 DDR2_BA0 U27 DDR2_BA1 D
Data Group 2-0 53 DDR2_DQS0 DDR2_DQS0 DDR2_BA1 DDR2_BA1 52,53,55
53 DDR2_DQSN0 DDR2_DQSN0 G27 U26 DDR2_BA2 DDR2_BA2 52,53,55
DDR2_DQSn0 DDR2_BA2
USE 4X SPACING TRACE
DDR2_D0 E26 R25 DDR2_A0
TO TRACE EQUAL LENGTH 53 DDR2_D0
DDR2_D1 G25 DDR2_D0 DDR2_A0 R26 DDR2_A1
DDR2_A0 52,53,55
+/-5 MIL 53 DDR2_D1 DDR2_D1 DDR2_A1 DDR2_A1 52,53,55
DDR2_D2 F25 R28 DDR2_A2 DDR2_A2 52,53,55
53 DDR2_D2 DDR2_D2 DDR2_A2
DDR2_D3 F24 R27 DDR2_A3 DDR2_A3 52,53,55
53 DDR2_D3 DDR2_D3 DDR2_A3
DDR2_D4 F26
53 DDR2_D4 DDR2_D4
DDR2_D5 F27
53 DDR2_D5 DDR2_D5
DDR2_D6 E27 P23 DDR2_A4 DDR2_A4 52,53,55
53 DDR2_D6 DDR2_D6 DDR2_A4
DDR2_D7 E28 P22 DDR2_A5 DDR2_A5 52,53,55
53 DDR2_D7 DDR2_D7 DDR2_A5 P25 DDR2_A6 DDR2_A6 52,53,55
DDR2_A6 N20 DDR2_A7
DDR2_A7 DDR2_A7 52,53,55
DDR2_DQM1 G24
53 DDR2_DQM1 DDR2_DQM1
CONTROL GROUP 2
53 DDR2_DQS1 DDR2_DQS1 H27 P27 DDR2_A8 DDR2_A8 52,53,55
DDR2_DQSN1 H28 DDR2_DQS1 DDR2_A8 N27 DDR2_A9
Data Group 2-1 53 DDR2_DQSN1 DDR2_DQSN1 DDR2_A9 DDR2_A9 52,53,55
N23 DDR2_A10 DDR2_A10 52,53,55 USE 4X SPACING TRACE
DDR2_A10 P26 DDR2_A11
DDR2_D8 H23 DDR2_A11 DDR2_A11 52,53,55 TO TRACE EQUAL LENGTH
USE 4X SPACING TRACE 53 DDR2_D8 DDR2_D8 +/-5 MIL
DDR2_D9 H25
TO TRACE EQUAL LENGTH 53 DDR2_D9
DDR2_D10 H24 DDR2_D9 N28 DDR2_A12
+/-5 MIL 53 DDR2_D10 DDR2_D10 DDR2_A12 DDR2_A12 52,53,55
DDR2_D11 H26 T22 DDR2_A13 DDR2_A13 52,53,55
C 53 DDR2_D11 DDR2_D11 DDR2_A13 C
DDR2_D12 G26 R22 DDR2_A14 DDR2_A14 52,53,55
53 DDR2_D12 DDR2_D12 DDR2_A14
DDR2_D13 J25 U22 DDR2_A15 DDR2_A15 52,53,55
53 DDR2_D13 DDR2_D13 DDR2_A15
DDR2_D14 J26
53 DDR2_D14 DDR2_D14
DDR2_D15 J24
53 DDR2_D15 DDR2_D15 T23 DDR2_RASN DDR2_RASN 52,53,55
DDR2_RASN
DDR2_DQM2 K23
53 DDR2_DQM2 DDR2_DQM2 U28 DDR2_CASN DDR2_CASN 52,53,55
DDR2_DQS2 K27 DDR2_CASN
53 DDR2_DQS2 DDR2_DQS2
53 DDR2_DQSN2 DDR2_DQSN2 K28
DDR2_DQSN2 U25 DDR2_WEN
DDR2_WEN DDR2_WEN 52,53,55
Data Group 2-2
DDR2_D16 L22
53 DDR2_D16 DDR2_D16
USE 4X SPACING TRACE DDR2_D17 K20 R23 DDR2_ODT0 DDR2_ODT0 52,53,55
53 DDR2_D17 DDR2_D17 DDR2_ODT0
DDR2_D18 K21
TO TRACE EQUAL LENGTH 53 DDR2_D18
DDR2_D19 L23 DDR2_D18
+/-5 MIL 53 DDR2_D19 DDR2_D19
DDR2_D20 L24 U24 DDR2_CKE DDR2_CKE 52,53,55
53 DDR2_D20 DDR2_D20 DDR2_CKE
DDR2_D21 J23
53 DDR2_D21 DDR2_D21
DDR2_D22 K22
53 DDR2_D22 DDR2_D22
DDR2_D23 J20 P24 DDR2_CSN0 DDR2_CSN0 52,53,55
53 DDR2_D23 DDR2_D23 DDR2_CSN0
DDR2_DQM3 M22
53 DDR2_DQM3 DDR2_DQM3
B B
53 DDR2_DQS3 DDR2_DQS3 M28
DDR2_DQSN3 M27 DDR2_DQS3 T28 DDR2_CLK0
Data Group 2-3 53 DDR2_DQSN3 DDR2_DQSN3 DDR2_CK DDR2_CLK0 52,53,55
T27 DDR2_CLK0N DDR2_CLK0N 52,53,55 CLOCK GROUP 2
DDR2_D24 L27 DDR2_NCK
53 DDR2_D24 DDR2_D24
DDR2_D25 L26
53 DDR2_D25 DDR2_D25
USE 4X SPACING TRACE DDR2_D26 L25
53 DDR2_D26 DDR2_D26
DDR2_D27 L28 R24 R817 NP
TO TRACE EQUAL LENGTH 53 DDR2_D27
DDR2_D28 M23 DDR2_D27 DDR2_RST DDR2_RST 53,78 DDR_VREFSTL2
+/-5 MIL 53 DDR2_D28 DDR2_D28
DDR2_D29 M24
53 DDR2_D29
DDR2_D30 M25 DDR2_D29 N22 DDR2_VREF0 R814 NP
ER18
53 DDR2_D30 DDR2_D30 DDR2_VREF0
DDR2_D31 M26
53 DDR2_D31 DDR2_D31 CPU_VDD_DDR
R815 1K 1%
CPU_VDD_DDR 25,44,80
X5777BXGABC R816 1K 1%
WARNING [DRC0006] Net has fewer than two connections N23667068: VAYU_EVM, SH26 - VAYU DDR EMIF2 INTERFACE (3.20, 4.00) C147 DDR2_RST is not part of group
WARNING [DRC0006] Net has fewer than two connections N23667055: VAYU_EVM, SH26 - VAYU DDR EMIF2 INTERFACE (3.20, 2.40) 0.1uF
WARNING [DRC0006] Net has fewer than two connections N25725225: VAYU_EVM, SH25 - VAYU DDR EMIF1 INTERFACE (3.10, 3.50)
WARNING [DRC0006] Net has fewer than two connections N25725223: VAYU_EVM, SH25 - VAYU DDR EMIF1 INTERFACE (3.10, 2.20) DDR_VREFSSTL is not part of group
DDR_VREFSTL2
DDR_VREFSTL2
A
DDR_VREFSTL2 53,77 TEXAS INSTRUMENTS INCORPORATED A
Revision:
Size: B DWG NO 516582-0001 A
5 4 3 2 1
5 4 3 2 1
D D
1.8 VOLT
VDDA_1V8_PHY E9 U52-17
NFM21PC474R1C3D
3 1 VDDA_HDMI Y17 AG17 CPU_HDMI_TX0-
VDDA_HDMI HDMI1_DATA0X AH17 CPU_HDMI_TX0+ CPU_HDMI_TX0- 33
HDMI1_DATA0Y CPU_HDMI_TX0+ 33
C539 C538
2
AG19 CPU_HDMI_TX2-
HDMI1_DATA2X AH19 CPU_HDMI_TX2+ CPU_HDMI_TX2- 33
C HDMI1_DATA2Y CPU_HDMI_TX2+ 33 C
AG16 CPU_HDMI_TXC-
HDMI1_CLOCKX AH16 CPU_HDMI_TXC+ CPU_HDMI_TXC- 33
HDMI1_CLOCKY CPU_HDMI_TXC+ 33
AD19
AE19 VSSA_HDMI.2
VSSA_HDMI.1
X5777BXGABC
B B
VDDA_1V8_PHY
Title: VAYU EVM
Revision:
Size: B DWG NO 516582-0001 A
5 4 3 2 1
5 4 3 2 1
E8 22 R544 LCD_G0 32
VOUT1_D8 D9 22 R563
VOUT1_D9 LCD_G1 32
D7 22 R551 LCD_G2 32,39
VOUT1_D10 D8 22 R545
VOUT1_D11 LCD_G3 32,39
A5 22 R188 LCD_G4 32,39
VOUT1_D12 C6 22 R552
VOUT1_D13 LCD_G5 32,39
C8 22 R550 LCD_G6 32,39
VOUT1_D14 C7 22 R557
VOUT1_D15 LCD_G7 32,39
B7 22 R189 LCD_R0 32
VOUT1_D16 B8 22 R199
VOUT1_D17 LCD_R1 32
A7 22 R197 LCD_R2 32,39
VOUT1_D18 A8 22 R198
VOUT1_D19 LCD_R3 32,39
C9 22 R571 LCD_R4 32,39
VOUT1_D20 A9 22 R203
C VOUT1_D21 LCD_R5 32,39 C
B9 22 R202 LCD_R6 32,39
VOUT1_D22 A10 22 R220
VOUT1_D23 LCD_R7 32,39
B11 1 TP50
VOUT1_FLD
X5777BXGABC
B B
Revision:
Size: B DWG NO 516582-0001 C
5 4 3 2 1
5 4 3 2 1
U52-8
F2 C_VIN[2]A_D[0] C_VIN[2]A_D[0] 31
VIN2A_D0 F3 C_VIN[2]A_D[1]
VIN2A_D1 C_VIN[2]A_D[1] 31
D1 C_VIN[2]A_D[2] vin2a_d[12] rgmii1_txc
VIN2A_D2 C_VIN[2]A_D[2] 31 vin2a_d[13] rgmii1_txctl
E2 C_VIN[2]A_D[3] C_VIN[2]A_D[3] 31
VIN2A_D3 D2 C_VIN[2]A_D[4] vin2a_d[14] rgmii1_txd[3]
VIN2A_D4 C_VIN[2]A_D[4] 31 vin2a_d[15] rgmii1_txd[2]
F4 C_VIN[2]A_D[5] C_VIN[2]A_D[5] 31
VIN2A_D5 vin2a_d[16] rgmii1_txd[1]
C1 C_VIN[2]A_D[6] C_VIN[2]A_D[6] 31 vin2a_d[17] rgmii1_txd[0]
VIN2A_D6 E4 C_VIN[2]A_D[7]
VIN2A_D7 C_VIN[2]A_D[7] 31 vin2a_d[18] rgmii1_rxc
vin2a_d[19] rgmii1_rxctl
B vin2a_d[20] rgmii1_rxd[3] B
F5 C_VIN[2]A_D[8] vin2a_d[21] rgmii1_rxd[2]
VIN2A_D8 C_VIN[2]A_D[8] 31 vin2a_d[22] rgmii1_rxd[1]
E6 C_VIN[2]A_D[9] C_VIN[2]A_D[9] 31
VIN2A_D9 D3 C_VIN[2]A_D[10] vin2a_d[23] rgmii1_rxd[0]
VIN2A_D10 C_VIN[2]A_D[10] 31
F6 C_VIN[2]A_D[11] C_VIN[2]A_D[11] 31
VIN2A_D11 D5 RC_VIN[2]A_D[12] 0 R547 C_VIN[2]A_D[12]
VIN2A_D12 C_VIN[2]A_D[12] 31
C2 RC_VIN[2]A_D[13] 0 R174 C_VIN[2]A_D[13] C_VIN[2]A_D[13] 31
VIN2A_D13 C3 RC_VIN[2]A_D[14] 0 R176 C_VIN[2]A_D[14]
VIN2A_D14 C_VIN[2]A_D[14] 31
C4 RC_VIN[2]A_D[15] 0 R543 C_VIN[2]A_D[15] C_VIN[2]A_D[15] 31
VIN2A_D15
5 4 3 2 1
5 4 3 2 1
EVM_3V3
5
RU96
13 CAM_FPD_MUX_S0 2 4 C324
1 1 17 0.1uF
D 56 S0 VCC.1 D
SN74LVC1G04DCK 55 S1
3
S2
29 C_VIN[1]A_D[0] 2 54 VIN[1]A_D[0] VIN[1]A_D[0] 68
4 1A1 1B1 52 VIN[1]A_D[1]
29 C_VIN[1]A_D[1] 2A1 2B1 VIN[1]A_D[1] 68
29 C_VIN[1]A_D[2] 6 50 VIN[1]A_D[2] VIN[1]A_D[2] 68
9 3A1 3B1 47 VIN[1]A_D[3]
29 C_VIN[1]A_D[3] 4A1 4B1 VIN[1]A_D[3] 68
29 C_VIN[1]A_D[4] 11 45 VIN[1]A_D[4] VIN[1]A_D[4] 68
This will allow testing of the ACTVID style of 13 5A1 5B1 43 VIN[1]A_D[5]
capture with the sensor. Add 0 Ohm series 29 C_VIN[1]A_D[5] 6A1 6B1 VIN[1]A_D[5] 68
29 C_VIN[1]A_D[6] 15 41 VIN[1]A_D[6] VIN[1]A_D[6] 68
resistor between U24 pin 6 and CAMERA_HSYNC 18 7A1 7B1 39 VIN[1]A_D[7]
signal. 29 C_VIN[1]A_D[7] 8A1 8B1 VIN[1]A_D[7] 68
29 C_VIN[1]A_D[8] 21 36 VIN[1]A_D[8] VIN[1]A_D[8] 68
Add no-pop resistor between CAMERA_HSYNC 9A1 9B1
signal and U24 pin 3 ( enables routing 29 C_VIN[1]A_D[9] 23 34 VIN[1]A_D[9] VIN[1]A_D[9] 68
25 10A1 10B1 32 VIN[1]A_D[10]
CAMERA_HSYNC to VIN[1]A_DE0)." 29 C_VIN[1]A_D[10] 11A1 11B1 VIN[1]A_D[10] 68
EVM_3V3 29 C_VIN[1]A_D[11] 27 30 VIN[1]A_D[11] VIN[1]A_D[11] 68
12A1 12B1
C66
3 53 CAMERA_D0 CAMERA_D0 35
0.1uF RU24 5 1A2 1B2 51 CAMERA_D1
VIN[1]A_DE0 68 2A2 2B2 CAMERA_D1 35
16 7 48 CAMERA_D2 CAMERA_D2 35
VCC 2 VIN[1]A_DE0 10 3A2 3B2 46 CAMERA_D3
1B1 4A2 4B2 CAMERA_D3 35
29 C_VIN[1]A_DE0 4 3 CAM_DE0 R29 NO-POP 12 44 CAMERA_D4 CAMERA_D4 35
1A 1B2 5 VIN[1]A_HSYNC0 14 5A2 5B2 42 CAMERA_D5
2B1 VIN[1]A_HSYNC0 68 6A2 6B2 CAMERA_D5 35
29 C_VIN[1]A_HSYNC0 7 6 R_CAMERA_HSYNC R27 0 CAMERA_HSYNC CAMERA_HSYNC 35 16 40 CAMERA_D6 CAMERA_D6 35
C 2A 2B2 7A2 7B2 C
11 VIN[1]A_VSYNC0 VIN[1]A_VSYNC0 68 20 37 CAMERA_D7 CAMERA_D7 35
9 3B1 10 CAMERA_VSYNC 22 8A2 8B2 35 CAMERA_D8
29 C_VIN[1]A_VSYNC0 3A 3B2 CAMERA_VSYNC 35 9A2 9B2 CAMERA_D8 35
14 VIN[1]A_CLK VIN[1]A_CLK 68 24 33 CAMERA_D9 CAMERA_D9 35
12 4B1 13 CAMERA_CLK 26 10A2 10B2 31 CAMERA_D10
29 C_VIN[1]A_CLK 4A 4B2 CAMERA_CLK 35 11A2 11B2 CAMERA_D10 35
R721 0 28 29 CAMERA_D11 CAMERA_D11 35
1 12A2 12B2
8 S 15
GND OE 8
SN74CBTLV3257PW GND.1 19
GND.2 38
GND.3 49
GND.4
CAM_FPD_MUX_S0 EVM_3V3
CAM_FPD_MUX_S1 SN74CBTLV16212GR
CAM_FPD_MUX_S1
RU31
C83
EVM_3V3 1 17 0.1uF
56 S0 VCC.1
55 S1
C337 S2
.1uF 29 C_VIN[1]A_D[12] 2 54 VIN[1]A_D[12] VIN[1]A_D[12] 68
4 1A1 1B1 52 VIN[1]A_D[13]
B 29 C_VIN[1]A_D[13] VIN[1]A_D[13] 68 B
2A1 2B1
5
3 53 CAMERA_D12 CAMERA_D12 35
5 1A2 1B2 51 CAMERA_D13
2A2 2B2 CAMERA_D13 35
C336 7 48
RU40 .1uF 10 3A2 3B2 46
4A2 4B2
5
12 44
14 5A2 5B2 42
2 4 VIN[1]A_FLD0 16 6A2 6B2 40
29 C_VIN[1]A_FLD0 VIN[1]A_FLD0 68 7A2 7B2
20 37
22 8A2 8B2 35
74CBTLV1G125CRG4 24 9A2 9B2 33
1
3
26 10A2 10B2 31
A R722 0 28 11A2 11B2 29 TEXAS INSTRUMENTS INCORPORATED A
12A2 12B2
5 4 3 2 1
5 4 3 2 1
EVM_3V3
EVM_3V3
C310
R467 .1uF
10K U25
RU30
5
C82 FUNCTION TABLE
2 4 VIN2_S1 1 17 0.1uF
13 VIN2_S0
1 56 S0 VCC.1 INPUTS INPUTS/OUTPUTS FUNCTION
S1
D R466 SN74LVC1G04DCK
55
S2 S2 S1 S0 A1 A2 D
L L L Z Z Disconnect
3
NO-POP 29 C_VIN[2]A_D[0] 2 54
4 1A1 1B1 52
VIN2_S0
29 C_VIN[2]A_D[1]
6 2A1 2B1 50
L L H B1 Z A1 port = B1 port
29 C_VIN[2]A_D[2] 3A1 3B1
29 C_VIN[2]A_D[3] 9
4A1 4B1
47 L H L B2 Z A1 port = B2 port
11 45
29
29
C_VIN[2]A_D[4]
C_VIN[2]A_D[5] 13 5A1 5B1 43 L H H Z B1 A2 port = B1 port
6A1 6B1
29 C_VIN[2]A_D[6] 15
18 7A1 7B1
41
39
H L L Z B2 A2 port = B2 port
29 C_VIN[2]A_D[7] 8A1 8B1 H L H Z Z Disconnect
29 C_VIN[2]A_D[8] 21 36
23 9A1 9B1 34
29 C_VIN[2]A_D[9]
25 10A1 10B1 32
H H L B1 B2 A1 port = B1 port
29 C_VIN[2]A_D[10]
EVM_3V3 29 C_VIN[2]A_D[11] 27 11A1
12A1
11B1
12B1
30 A2 port = B2 port
C294 H H H B2 B1 A1 port = B2 port
3
1A2 1B2
53 VIN[2]A_D[0] VIN[2]A_D[0] 68 A2 port = B1 port
0.1uF RU19 5 51 VIN[2]A_D[1] VIN[2]A_D[1] 68
16 7 2A2 2B2 48 VIN[2]A_D[2]
VCC 3A2 3B2 VIN[2]A_D[2] 68
2 VIN[2]A_CLK VIN[2]A_CLK 68 10 46 VIN[2]A_D[3] VIN[2]A_D[3] 68
4 1B1 3 12 4A2 4B2 44 VIN[2]A_D[4]
29 C_VIN[2]A_CLK 1A 1B2 5A2 5B2 VIN[2]A_D[4] 68
5 VIN[2]A_DE0 VIN[2]A_DE0 68 14 42 VIN[2]A_D[5] VIN[2]A_D[5] 68
7 2B1 6 16 6A2 6B2 40 VIN[2]A_D[6]
29 C_VIN[2]A_DE0 2A 2B2 7A2 7B2 VIN[2]A_D[6] 68
11 VIN[2]A_HSYNC VIN[2]A_HSYNC 68 20 37 VIN[2]A_D[7] VIN[2]A_D[7] 68
9 3B1 10 22 8A2 8B2 35 VIN[2]A_D[8]
C 29 C_VIN[2]A_HSYNC0 3A 3B2 9A2 9B2 VIN[2]A_D[8] 68 C
14 VIN[2]A_VSYNC VIN[2]A_VSYNC 68 24 33 VIN[2]A_D[9] VIN[2]A_D[9] 68
12 4B1 13 26 10A2 10B2 31 VIN[2]A_D[10]
29 C_VIN[2]A_VSYNC0 4A 4B2 11A2 11B2 VIN[2]A_D[10] 68
28 29 VIN[2]A_D[11] VIN[2]A_D[11] 68
1 12A2 12B2
8 S 15
GND OE R716 8
SN74CBTLV3257PW GND.1 19
0 GND.2 38
GND.3 49 FUNCTION TABLE
GND.4
INPUTS INPUTS/OUTPUTS FUNCTION
SN74CBTLV16212GR S2 S1 S0 A
VIN2_S0
PWR_CBT L L L Z Disconnect
VIN2_S1
L L H B1 A port = B1 port
RU93
C321
L H L B2 A port = B2 port
1
S0 VCC.1
17 0.1uF L H H Z Disconnect
56
55 S1
S2
H L L Z Disconnect
B 29 C_VIN[2]A_D[12] 2
1A 1B1
54 EMAC[1]_TXC H L HEMAC[1]_TXC 64 B3 A port = B3 port B
4 52 EMAC[1]_TXCTL
29
29
C_VIN[2]A_D[13]
C_VIN[2]A_D[14] 6 2A 2B1 50 EMAC[1]_TXD3 H H LEMAC[1]_TXCTL
EMAC[1]_TXD3
64
64
B1 A port = B1 port
3A 3B1
29
29
C_VIN[2]A_D[15]
C_VIN[2]A_D[16]
9
11 4A 4B1
47
45
EMAC[1]_TXD2
EMAC[1]_TXD1
H H HEMAC[1]_TXD2
EMAC[1]_TXD1
64
64
B2 A port = B2 port
13 5A 5B1 43 EMAC[1]_TXD0
29 C_VIN[2]A_D[17] 6A 6B1 EMAC[1]_TXD0 64
29 C_VIN[2]A_D[18] 15 41 EMAC[1]_RXC
7A 7B1 EMAC[1]_RXC 64
29 C_VIN[2]A_D[19] 18 39 EMAC[1]_RXCTL
8A 8B1 EMAC[1]_RXCTL 64
29 C_VIN[2]A_D[20] 21 36 EMAC[1]_RXD3
9A 9B1 EMAC[1]_RXD3 64
29 C_VIN[2]A_D[21] 23 34 EMAC[1]_RXD2
vin2a_d[12] rgmii1_txc 10A 10B1 EMAC[1]_RXD2 64
29 C_VIN[2]A_D[22] 25 32 EMAC[1]_RXD1
vin2a_d[13] rgmii1_txctl 11A 11B1 EMAC[1]_RXD1 64
29 C_VIN[2]A_D[23] 27 30 EMAC[1]_RXD0
vin2a_d[14] rgmii1_txd[3] 12A 12B1 EMAC[1]_RXD0 64
vin2a_d[15] rgmii1_txd[2]
vin2a_d[16] rgmii1_txd[1]
vin2a_d[17] rgmii1_txd[0] 3 53 VIN[2]A_D[12] VIN[2]A_D[12] 68
5 1B3 1B2 51 VIN[2]A_D[13]
vin2a_d[18] rgmii1_rxc 2B3 2B2 VIN[2]A_D[13] 68
vin2a_d[19] rgmii1_rxctl 7 48 VIN[2]A_D[14] VIN[2]A_D[14] 68
vin2a_d[20] rgmii1_rxd[3] 10 3B3 3B2 46 VIN[2]A_D[15]
4B3 4B2 VIN[2]A_D[15] 68
vin2a_d[21] rgmii1_rxd[2] 12 44 VIN[2]A_D[16]
vin2a_d[22] rgmii1_rxd[1] 5B3 5B2 VIN[2]A_D[16] 68
14 42 VIN[2]A_D[17] VIN[2]A_D[17] 68
vin2a_d[23] rgmii1_rxd[0] 16 6B3 6B2 40 VIN[2]A_D[18]
7B3 7B2 VIN[2]A_D[18] 68
20 37 VIN[2]A_D[19] VIN[2]A_D[19] 68
22 8B3 8B2 35 VIN[2]A_D[20]
9B3 9B2 VIN[2]A_D[20] 68
24 33 VIN[2]A_D[21] VIN[2]A_D[21] 68
A 26 10B3 10B2 31 VIN[2]A_D[22] TEXAS INSTRUMENTS INCORPORATED A
11B3 11B2 VIN[2]A_D[22] 68
PWR_CBT 28 29 VIN[2]A_D[23] VIN[2]A_D[23] 68
12B3 12B2
Title: VAYU EVM
PWR_CBT 85 8
GND.1 19 Page Contents: ETHERNET 1 / VIN2 MUX
EVM_3V3 GND.2 38
GND.3 49 Revision:
GND.4 Size: B DWG NO 516582-0001 C
EVM_3V3 3,4,5,6,7,8,9,11,12,13,15,16,18,20,21,22,23,24,30,32,33,34,35,36,38,39,40,56,57,58,59,60,63,64,65,67,68,85,86 SN74CBT16214DGGR
Date: Tuesday, January 12, 2016 Sheet 31 of 89
5 4 3 2 1
5 4 3 2 1
EVM_3V3
R678
10K
D 13 CON_LCD_PWR_DN D
R683
NO-POP EVM_1V8 EVM_3V3 EVM_5V0 J15
1
2
3
4
5
6
40,67 GP1[2] R679 0 7
8
9
13 TS_LCD_GPIO1
10
13 TS_LCD_GPIO2
11
13 TS_LCD_GPIO3
12
13 TS_LCD_GPIO4
13
14
CON_LCD_GP0[31] 15
4,8,13,16,60,62,68 I2C1_SDA R680 0 CON_LCD_I2C_SDA 16
4,8,13,16,60,62,68 I2C1_SCL R681 0 CON_LCD_I2C_SCL 17
18
28 LCD_R0 19
C C
28 LCD_R1 20
28,39 LCD_R2 21
28,39 LCD_R3 22
28,39 LCD_R4 23
28,39 LCD_R5 24
28,39 LCD_R6 25
28,39 LCD_R7 26
27
28 LCD_G0 28
28 LCD_G1 29
28,39 LCD_G2 30
28,39 LCD_G3 31
28,39 LCD_G4 32
28,39 LCD_G5 33
28,39 LCD_G6 34
28,39 LCD_G7 35
36
28 LCD_B0 37
28 LCD_B1 38
28,39 LCD_B2 39
28,39 LCD_B3 40
28,39 LCD_B4 41
28,39 LCD_B5 42
B 28,39 LCD_B6 43 B
28,39 LCD_B7 44
45
28 LCD_DE 46
28 LCD_HS 47
28 LCD_VS 48
28 LCD_PCLK 49
50
HEADER 50
EVM_1V8
EVM_1V8 12,15,59,60,63,64,68,81
EVM_3V3
EVM_3V3 3,4,5,6,7,8,9,11,12,13,15,16,18,20,21,22,23,24,30,31,33,34,35,36,38,39,40,56,57,58,59,60,63,64,65,67,68,85,86
Revision:
Size: B DWG NO 516582-0001 A
5 4 3 2 1
5 4 3 2 1
DIFFERENTIAL PAIR
100 OHM DIFFERENTIAL DIFFERENTIAL PAIR
IMPEDANCE 100 OHM DIFFERENTIAL
SHORT AND STRAIGHT AS IMPEDANCE
POSSIBLE, SHORT AND STRAIGHT AS
MINIMUM NUMBER OF VIAS POSSIBLE,
ER13 MINIMUM NUMBER OF VIAS
D D
1 2 REV G
FL5 DLW21SN900HQ2
27 CPU_HDMI_TX2+
27 CPU_HDMI_TX2- 4 3
2
tpd1e05u06
tpd1e05u06
tpd1e05u06
tpd1e05u06
tpd1e05u06
tpd1e05u06
tpd1e05u06
tpd1e05u06
1 2
GND
GND
GND
GND
GND
GND
GND
GND
FL6 DLW21SN900HQ2
27 CPU_HDMI_TX1+
IO
IO
IO
IO
IO
IO
IO
IO
27 CPU_HDMI_TX1- 4 3 U128 U129 U130 U131 U132 U133 U134 U135
1
1 2
27 CPU_HDMI_TX0+ FL7 DLW21SN900HQ2
27 CPU_HDMI_TX0- P4
4 3 HDMI_TX2+ 1
2 D2+
1 2 HDMI_TX2- 3 D2 SHIELD
HDMI_TX1+ 4 D2-
27 CPU_HDMI_TXC+ FL8 DLW21SN900HQ2 5 D1+
27 CPU_HDMI_TXC- HDMI_TX1- 6 D1 SHIELD
4 3 HDMI_TX0+ 7 D1-
C D0+ C
8
EVM_5V0 HDMI_TX0- 9 D0 SHIELD
HDMI_TXC+ 10 D0-
11 CK+
HDMI_TXC- 12 CK SHIELD
EVM_5V0 6,32,35,38,56,61,68,85 CK-
13
14 CE REMOTE
EVM_3V3 15 NC.14
16 DDC CLK
EVM_5V0 17 DDC DATA
18 GND
EVM_3V3 3,4,5,6,7,8,9,11,12,13,15,16,18,20,21,22,23,24,30,31,32,34,35,36,38,39,40,56,57,58,59,60,63,64,65,67,68,85,86 +5V
19
HP DET
23
10
12
0.1uF
HDMI_HPD_B
5V_OUT
VCCA
VCC5V
B B
22 R713
21 D2+ NO-POP
EVM_3V3 D2- R305
20 NO-POP
19 D1+
D1-
17
R6 R7 16 D0+
D0-
NO-POP NO-POP
15
14 CLK+
CLK-
HDMI_CEC_A 24 6 HDMI_CEC_B
THE HDMI I2C SIGNALS ARE 4 HDMI_CEC_A CEC_A CEC_B
CROSSED IN VAYU AND NEED TO BE REVE HDMI_SCL_A 1 7 HDMI_SCL_B
UNCROSSED AT THE BOARD LEVEL. 5 HDMI_DSCL SCL_A SCL_B
HDMI_SDA_A 2 8 HDMI_SDA_B
THIS UNCROSS IS MOVED TO RU108 5 HDMI_DSDA SDA_A SDA_B
ON SHEET 5, REVE.
HDMI_HPD_A 3 9
EVM_3V3 4 HDMI_HPD HPD_A HPD_B
TPD12S016RKTR
Revision:
Size: B DWG NO 516582-0001 H
5 4 3 2 1
5 4 3 2 1
EVM_3V3
EVM_3V3
U3 DS90UB925QSQE
SH3
SH4
21 VOUT3B_D17 R1/IO1
VOUT3B_D16 25 17 C216
21 VOUT3B_D16 R0/IO0 CAPHS12
0.1uF
C7 D4S20D-40ML5
SH3
SH4
VOUT3B_D15 42 4.7uF 4
21 VOUT3B_D15 G7 4
VOUT3B_D14 41 3
21 VOUT3B_D14 G6 3
VOUT3B_D13 40 20 C5 0.1uF FPD_DOUT+ 2
21 VOUT3B_D13 G5 DOUT+ 2
VOUT3B_D12 39 19 C6 0.1uF FPD_DOUT- 1
C 21 VOUT3B_D12 C
SH1
SH2
VOUT3B_D11 38 G4 DOUT- 1
21 VOUT3B_D11 G3
VOUT3B_D10 37
21 VOUT3B_D10 G2 P1
VOUT3B_D9 36 23
21 VOUT3B_D9
SH1
SH2
VOUT3B_D8 35 G1/IO3 CMF EVM_3V3 C215
21 VOUT3B_D8 G0/IO2 C232 0.1uF
0.1uF
VOUT3B_D7 2
21 VOUT3B_D7 B7
VOUT3B_D6 1 24 R332 R20
21 VOUT3B_D6 B6 MODE_SEL
VOUT3B_D5 48 10K 10K
21 VOUT3B_D5 B5
VOUT3B_D4 47
21 VOUT3B_D4 B4
21 VOUT3B_D3 VOUT3B_D3 46
VOUT3B_D2 45 B3
21 VOUT3B_D2 B2
21 VOUT3B_D1 VOUT3B_D1 44
VOUT3B_D0 43 B1/I2S_DB/O5 6
21 VOUT3B_D0 B0/O4 IDX
31
INTB 18
EVM_3V3 RES1
21
PDB 15
R22 EVM_3V3 RES0
10K 13
REV E 12 I2S_CLK/O8 49
R8 11 I2S_WC/O7 DAP(PWRPAD)
10K I2S_DA/O6
22 VOUT3B_INTB
R11 R9 R10
10K 10K 10K
C228
4.7uF
5,13,35,69 I2C2_SDA
A TEXAS INSTRUMENTS INCORPORATED A
5,13,35,69 I2C2_SCL
Title: VAYU EVM
EVM_3V3
Page Contents: FPD LINK
5 4 3 2 1
5 4 3 2 1
EVM_5V0 EVM_3V3
J5
1
THESE TERMINATIONS ON CAMERA MAY NOT BE 2
NEEDED. THE CAMERA SCHEMATIC APPEARS TO 3
D HAVE SOURCE TERMS ON BOARD. 4 D
5
TP5
6
1 7
8
30 CAMERA_CLK R58 22 9
10
30 CAMERA_VSYNC R59 22 11
30 CAMERA_HSYNC R353 22 12
30 CAMERA_D13 RN10 8 1 RPACK4-22 13
30 CAMERA_D12 7 2 14
30 CAMERA_D11 6 3 15
30 CAMERA_D10 5 4 16
30 CAMERA_D9 RN9 8 1 RPACK4-22 17
30 CAMERA_D8 7 2 18
30 CAMERA_D7 6 3 19
30 CAMERA_D6 5 4 20
30 CAMERA_D5 RN8 8 1 RPACK4-22 21
30 CAMERA_D4 7 2 22
30 CAMERA_D3 6 3 23
30 CAMERA_D2 5 4 24
25 MHC1
26
30 CAMERA_D1 R60 22 27
C C
30 CAMERA_D0 R356 22 28 MHC1
29
5,13,34,69 I2C2_SCL
30
5,13,34,69 I2C2_SDA MHC2
4 CAM_SPI[1]_MISO 31
4 CAM_SPI[1]_SCLK 32
33
34 MHC2
35
4 CAM_SPI[1]_MOSI 36
EVM_3V3
MOLEX 052559-3679 ( mirror )
R365
10K
4 CAM_SPI[1]_CS[0]n
B B
EVM_3V3
EVM_3V3
C704
R828
10K
5
REV G .1uF
2 4
U144
SN74LVC1G125DCKR
1
3
7,11,16,35,36,40,58,62,70 RSTOUTn
5 4 3 2 1
5 4 3 2 1
3V3_VDDA
10K
10K
D D
EVM_3V3
3V3_VDDA
R63
R64
L4 DIFFERENTIAL PAIR
Ferrite Chip
100 OHM DIFFERENTIAL
C31 C257 C254 C256 IMPEDANCE
LVDS OUTPUT SHORT AND STRAIGHT AS
10.0uF 0.01uF 0.001uF 0.1uF POSSIBLE,
OSCOUT PIN = OFF
MINIMUM NUMBER OF VIAS
0
no-pop
VDD_CDCM9102
R62
R65
4
VDD1_OUT0 1
VDD2_OUT1
10 3 SERDES_IN_REFP
11 OS1 OUT1P 2 SERDES_IN_REFN SERDES_IN_REFP 37
OS0 OUT1N SERDES_IN_REFN 37
R70
6 PCI_CONN_REFP
OUT0P 5 PCI_CONN_REFN PCI_CONN_REFP 38
7 OUT0N PCI_CONN_REFN 38
0E
NO-POP
12
RSTn 21
XIN
CE = '1' = ON
1
2
R71
17 Y2
22 REG_CAP2 19
GND.2 REG_CAP1 25.0000MHz
14 C39 C36 C42
33 GND.1
TP6 NO-POP
PWR_PAD 23 1 10.0uF 10.0uF
B B
OSCOUT
NC.13
NC.15
NC.24
NC.25
NC.26
NC.27
NC.28
NC.29
NC.30
NC.31
NC.32
NC.8
3
4
TP
7,11,12,16,35,40,58,62,70 RSTOUTn
CDCM9102RHBR
8
13
15
24
25
26
27
28
29
30
31
32
R75
0
OUTCLOCK = 100mHZ
VDD_CDCM9102
VDD_CDCM9102 VDD_CDCM9102 84
Title: VAYU EVM
5 4 3 2 1
5 4 3 2 1
1.8 VOLT
VDDA_1V8_PHY E2
NFM21PC474R1C3D
3 1 VDDA_SATA_1P8
C416 C423
2
0.1uF 0.001uF
D D
2
AC COUPLING CAP U52-1
PLACE BY CONNECTOR V13 W14
J11 VDDA_SATA VDDA_PCIE AA17
VDDA_PCIE0 AA16
Pin # Function 8 1 VDDA_PCIE1
1 Ground MH1 1 2 CON.SATA_TXP0 C75 10nF C64 .1uF CON.PCIE_TXP0
2 A+ (Transmit) 2 CON.PCIE_TXP0 38
3 SATA_TXP0 AH10 AH14 PCIE_TXP0
3 A- (Transmit) 3 SATA1_TXP0 PCIE_TXP0
4 Ground 4 CON.SATA_TXN0 C73 10nF SATA_TXN0 AG10 AG14 PCIE_TXN0 C65 .1uF CON.PCIE_TXN0 CON.PCIE_TXN0 38
4 5 SATA1_TXN0 PCIE_TXN0
5 B- (Receive) 5
6 B+ (Receive) 6 CON.SATA_RXN0 C70 10nF SATA_RXN0 AH9 AG13 PCIE_RXN0 R78 0 CON.PCIE_RXN0 CON.PCIE_RXN0 38
7 Ground 9 6 7 AG9 SATA1_RXN0 PCIE_RXN0 AH13 PCIE_RXP0 R77 0 CON.PCIE_RXP0
MH9 7 SATA1_RXP0 PCIE_RXP0 CON.PCIE_RXP0 38
- coding notch CON.SATA_RXP0 C68 10nF SATA_RXP0
SATA HEADER 7 AH12 REV D
C A 7-pin Serial ATA data cable PCIE_TXP1 C
AG12
AE10 PCIE_TXN1
VSSA_SATA AG11
PCIE_RXN1 AH11
PCIE_RXP1
R223 AD13
C125 .1uF SERDES_CLKN VSSA_PCIE.1 AE13
100 VSSA_PCIE.2
AH15
LJCB_CLKN
36 SERDES_IN_REFN
36 SERDES_IN_REFP C120 .1uF SERDES_CLKP AG15
LJCB_CLKP
REV E
R806
R807
AC COUPLING CAP
PLACE BY CONNECTOR
DIFFERENTIAL PAIR
100 OHM DIFFERENTIAL
IMPEDANCE
NO-POP
ER25
NO-POP
SHORT AND STRAIGHT AS X5777BXGABC
POSSIBLE,
MINIMUM NUMBER OF VIAS DIFFERENTIAL PAIR
B XXXX OHM DIFFERENTIAL B
IMPEDANCE
SHORT AND STRAIGHT AS
POSSIBLE,
MINIMUM NUMBER OF VIAS
Revision:
Size: B DWG NO 516582-0001 F
5 4 3 2 1
5 4 3 2 1
5
0.1uF 10K U17
R99 10K 5 6 1
SENSE1 VDD 13 PCI_SW_RESETn
4 2 4
R98 4 1 2
CT RESET RU13
1K 1%
D C279 3 2 SN74LVC1G08DCKRG4 D
1
3
MR GND 74CBTLV1G125CRG4
0.1uF TPS3808G09DBVRG4
EVM_5V0
C C
EVM_3V3
EVM_3V3
EVM_3V3 R76
10K
EVM_12V C272
5
P7 EVM_12V 0.1uF
R421 2 4 PCI_PORz 40
B1 A1 10K
B2 +12V.1 PRSNT1 A2 R416 R415 U11
B3 +12V.2 +12V.4 A3 10K 10K 74LV1G126CRG4
1
3
PS_EVM_3V3 B4 +12V.3 +12V.5 A4
B5 GND.1 GND.12 A5
B6 SMCLK TCK A6
B7 SMDAT TDI A7
B8 GND.2 TDO A8
B9 +3.3V.1 TMS A9
B10 TRSTn +3.3V.2 A10 PS_EVM_3V3
R448 B11 3.3VAUX +3.3V.3 A11
B B
10K WAKEn PERSTn R79 .1uF C259 PCI_CONN_REFP
KEY PCI_CONN_REFP 36
100
B12 A12 .1uF C262 PCI_CONN_REFN
B13 RSVD.1 GND.13 A13 REFCLKp PCI_CONN_REFN 36
CON.PCIE_TXP0 B14 GND.3 REFCLK+ A14 REFCLKn
37 CON.PCIE_TXP0 PETp0 REFCLK-
CON.PCIE_TXN0 B15 A15
37 CON.PCIE_TXN0 PETn0 GND.14
B16 A16 CON.PCIE_RXP0
GND.4 PERp0 CON.PCIE_RXP0 37
R439 NO-POP B17 A17 CON.PCIE_RXN0
PRSNT2 PERn0 CON.PCIE_RXN0 37
B18 A18
GND.5 GND.15
PCI Conn36
PS_EVM_3V3
EVM_5V0
EVM_12V TEXAS INSTRUMENTS INCORPORATED
A
Connector must be less than 2.25 inches A
Revision:
EVM_3V3 3,4,5,6,7,8,9,11,12,13,15,16,18,20,21,22,23,24,30,31,32,33,34,35,36,39,40,56,57,58,59,60,63,64,65,67,68,85,86 Size: B DWG NO 516582-0001 A
5 4 3 2 1
5 4 3 2 1
EVM_3V3
D D
EVM_3V3
R703
4.7K R704 R698
4.7K 4.7K U52-16
TMS F18
TMS
EMU0 EMU1 TRSTn D20
EMU_RSTn TRSTPD TRSTN
40 EMU_RSTn
TDO R634 22 F19
TDO
TDI D23
R700 TDI
4.7K
TCK E20
TCLK
RTCK R635 22 E18
ER52 RTCK
X5777BXGABC
EVM_3V3
R758
100
ER42 R829
4.7K
EVM_3V3
J17 nTRST
28,32 LCD_B2 EMU2
28,32 LCD_B3 EMU5 R759 1 2 TMS
EMU6 4.7K TCK 3 VREF_DBG TMS 4 TDO R760 NO-POP
28,32 LCD_B4 TCK TDO
28,32 LCD_B5 EMU7 TDI 5 6 EMU_RSTn
EMU8 RTCK 7 TDI nRESET 8 TRSTPD R761 0 TRSTn
28,32 LCD_B6 RTCK TRSTPD
28,32 LCD_B7 EMU9 nTRST 9 10
11 nTRST EXTE 12
EMU2 13 EXTF VREF_TR 14 TRSTn == MIPI TRSTPD PULL DOWN VERSION
R762 0 15 TR_CLK0 TR_CLK1 16 TRSTn == MIPI nTRST MIPI PULLUP VERSION
EMU3 17 TGT_DETECT Gnd16 18 FOR CJTAG REMOVE R761 AND POPULATE R760,
EMU3 EMU0 19 TRD0.0 TRD1.0 20 AS CTJAG NEEDS THE PULLUP VERSION.
B 28,32 LCD_G2 B
EMU10 EMU1 21 TRD0.1 TRD1.1 22
28,32 LCD_G3 TRD0.2 TRD1.2
28,32 LCD_G4 EMU11 EMU4 23 24
EMU12 EMU5 25 TRD0.3 TRD1.3 26
28,32 LCD_G5 TRD0.4 TRD1.4
28,32 LCD_G6 EMU13 EMUx SIGNALS NEED TO ROUTE FROM U52 EMU6 27 28
EMU14 THROUGH J17/J14 THEN TO LCD. THE TRACE EMU7 29 TRD0.5 TRD1.5 30
28,32 LCD_G7 LENGTH RULES FOR THE LCD SIGNALS NEEDS TRD0.6 TRD1.6
EMU8 31 32
TO BE MAINTAINED. EMU9 33 TRD0.7 TRD1.7 34
EMU10 35 TRD0.8 TRD1.8 36
EMU11 37 TRD0.9 TRD1.9 38
EMU4 EMU12 39 TRD3.0 TRD2.0 40
28,32 LCD_R2 TRD3.1 TRD2.1
28,32 LCD_R3 EMU15 EMU13 41 42
EMU16 EMU14 43 TRD3.2 TRD2.2 44
28,32 LCD_R4 TRD3.3 TRD2.3
28,32 LCD_R5 EMU17 EMU15 45 46
EMU18 EMU16 47 TRD3.4 TRD2.4 48
28,32 LCD_R6 TRD3.5 TRD2.5
28,32 LCD_R7 EMU19 EMU17 49 50
EMU18 51 TRD3.6 TRD2.6 52
EMU19 53 TRD3.7 TRD2.7 54
55 TRD3.8 TRD2.8 56
57 TRD3.9 TRD2.9 58
59 Gnd57 Gnd58 60
TR_CLK3 TR_CLK2
61 62
63 GndCt1 GndCt2 64
A GndCt3 GndCt4 TEXAS INSTRUMENTS INCORPORATED A
EVM_3V3
MIPI-QSH-030
Title: VAYU EVM
Revision:
Size: B DWG NO 516582-0001 H
5 4 3 2 1
5 4 3 2 1
BCK2_3V3 BCK2_3V3
EVM_3V3
5
U62 R796 NO-POP R650
5
70 PMIC_RESET_OUT 1 U61 NO-POP
4 1
86 CPU_POR_RESETn 2 4 PORz TP60 TP58 RSTOUTn 7,11,12,16,35,36,58,62,70
2 TESTPOINT TESTPOINT
D 74LVC1G08DCK D
3
74LVC1G08DCK C550 C551 C552 R256
3
1000pF .01uF .1uF NO-POP
REV G2
38 PCI_PORz VDDA_1V8_PLL
U52-13
RESETn TP59
TESTPOINT F23
F22 RSTOUTN
BCK2_3V3 PORZ
C553 C554 C555 AE16
1000pF .01uF .1uF E23 VDDA_OSC.2 AD16
C145 RESETN VDDA_OSC.1 C522 C521
5
3
EVM_3V3 C124
AB16 4 2 Y5 18 pF
WAKEUP2 22.5792MHz
ON_OFF = 1 COMMANDS ALL NON-RTC DOMAINS TO BE ACTIVE
R632 ON_OFF = 0 COMMANDS ALL NON-RTC DOMAINS TO BE IN-ACTIVE AC16
1
10K WAKEUP3 C123
Note: WAKEUP[3:0], including the AC15 18 pF
XI_OSC1
GP1[x] functions, are
CPU_NMIn AC14
input-only. VSSA_OSC1
AB17
R245 TP54 RTC_PORZ
NO-POP TESTPOINT
VDDSHV5
4 WAKE_UP_CAN
V12
VDDSHV5 VDDSHV5 C113 33pF
C485 AE14
RTC_OSC_XI_CLKIN32
4
0.1uF
B VDDSHV5 R605 3 32.768KHz B
10K 2 Y3
VDD_RTC AB15
VDD_RTC
32,67 GP1[2]
1
R637 AD14 C106 33pF
NO-POP C117 RTC_OSC_XO
70 PMIC_INT
TP52 0.1uF
TESTPOINT TP57 AF14
TESTPOINT AB13 RTC_ISO
ER14 VDDA_RTC
67 GP1[3] VDDA_RTC
X5777BXGABC
R636 REV D. OPEN DRAIN FROM PMIC VIA FET ON RTC POWER DOMAIN
10K TP55 C110
TESTPOINT 0.1uF
R620
10K
PORz R269 0
BCK2_3V3 VDDSHV5
BCK2_3V3 BCK2_3V3 84 ON RTC POWER DOMAIN
VDDA_1V8_PLL VDDSHV5 6,83,86
86 RTC_PORZ
A TEXAS INSTRUMENTS INCORPORATED A
VDD_RTC
VDDA_1V8_PLL VDDA_1V8_PLL 45,82
VDD_RTC 83,86 Title: VAYU EVM
5 4 3 2 1
5 4 3 2 1
U52-19
D D
R20 Y15
C519 CAP_VBBLDO_IVA CAP_VDDRAM_CORE3 C506
1uF 1uF
Y14 J19
C501 CAP_VBBLDO_GPU CAP_VDDRAM_CORE2 C517
1uF 1uF
J16 P19
C509 CAP_VBBLDO_MPU CAP_VDDRAM_CORE4 C516
1uF 1uF
Y16
J10 CAP_VDDRAM_CORE5 C512
C481 CAP_VDDRAM_DSPEVE1 1uF
1uF
T20 K9
C529 CAP_VDDRAM_IVA CAP_VBBLDO_DSPEVE C477
C C
1uF 1uF
Y13 J9
C480 CAP_VDDRAM_GPU CAP_VDDRAM_DSPEVE2 C462
1uF 1uF
K16 K19
C504 CAP_VDDRAM_MPU1 CAP_VDDRAM_MPU2 C520
1uF 1uF
L9
CAP_VDDRAM_CORE1 C468
1uF
X5777BXGABC
B B
Revision:
Size: B DWG NO 516582-0001 A
5 4 3 2 1
5 4 3 2 1
VDDSHV
U52-18 VDDSHV
VDDSHV E3 AB6
G4 VDDSHV1.1 VDDSHV7.1 AB7
G5 VDDSHV1.2 VDDSHV7.2
C436 C450 C455 C437 C444 E5 VDDSHV1.3 C449
10uF 0.1uF 0.1uF 0.1uF 0.1uF H8 VDDSHV1.4 0.1uF
D c201-6p6spc
c201-6p6spc
c201-6p6spc
c201-6p6spc H9 VDDSHV1.5 D
VDDSHV1.6
VDDSHV8
VDDSHV Y8
VDDSHV8.1 W8
VDDSHV B6 VDDSHV8.2
H10 VDDSHV2.1 C467
H11 VDDSHV2.2 0.1uF
C104 C484 C438 C482 E10 VDDSHV2.3
10uF 0.1uF 0.1uF 0.1uF D10 VDDSHV2.4
VDDSHV2.5 VDDSHV
W4
VDDSHV9.1 W5
VDDSHV9.2 U10
VDDSHV VDDSHV9.3 C443
0.1uF
VDDSHV H15
G15 VDDSHV3.1
E16 VDDSHV3.2
C493 C526 C502 C500 C494 C496 D16 VDDSHV3.3
10uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF H18 VDDSHV3.4 VDDSHV
H16 VDDSHV3.5
C VDDSHV3.6 C
E22 T4 VDDSHV
D22 VDDSHV3.7 VDDSHV10.1 N4
B23 VDDSHV3.8 VDDSHV10.2 T5
H19 VDDSHV3.9 VDDSHV10.3 N5 C442 C445 C457 C545 C355
VDDSHV3.10 VDDSHV10.4 R7 0.1uF 0.1uF 0.1uF 0.1uF 10uF
VDDSHV10.5 P10
VDDSHV10.6 R10
VDDSHV10.7
VDDSHV
VDDSHV C24
VDDSHV4.1
C542 VDDSHV VDDS18V
0.1uF
c201-6p6spc
VDDSHV VDDSHV11
R800
VDDSHV AF5
VDDSHV6.1 VDDSHV11.1
K8 R799 NP 0
ER23
AD5 J8
AE7 VDDSHV6.2 VDDSHV11.2
C464 C454 AD7 VDDSHV6.3 C458 U136
0.1uF 0.1uF VDDSHV6.4 0.1uF 8 1
c201-6p6spc IN1 STAT
B 7 2 B
X5777BXGABC OUT D0
IN2_VDDS18V 6 3
IN2 D1
PAD
5 4
C700 C699 GND ILIM
0.1uF 0.1uF tps2115a
PAD
R801
1.5K
VDDSHV8
13,23,24 MMC2_BOOTn
VDDSHV8
VDDSHV8 85 VDDS18V D1=1, IN1 NOR BOOT
D1=0,IN2 eMMC BOOT
BOOT SWITCHES DEFAULT AS PULLUPS. SWITCH
CLOSED IS PULL DOWN TO SELECT FUNCTION.
VDDSHV 16,43,73,81 VDDS18V
VDDSHV
VDDSHV 84
A TEXAS INSTRUMENTS INCORPORATED A
Revision:
Size: B DWG NO 516582-0001 F
5 4 3 2 1
5 4 3 2 1
D D
VDDS18V VDDS18V
U52-22
VDDS18V W18 AA18 VDDS18V
T8 VDDS18V.1 VDDS18V_DDR1.1 AA19
C471 C371 C401 R8 VDDS18V.2 VDDS18V_DDR1.2 Y21 C530
C382 0.1uF C400 0.1uF C399 0.1uF C518 N8 VDDS18V.3 VDDS18V_DDR1.3 W21 C461 0.1uF C357
10uF 0.1uF 0.1uF 0.1uF P8 VDDS18V.4 VDDS18V_DDR1.4 0.1uF 10uF
c201-6p6spc c201-6p6spc c201-6p6spc V22 VDDS18V.5 c201-6p6spc
M9 VDDS18V.6
G18 VDDS18V.7
M8 VDDS18V.8 P21
W17 VDDS18V.9 VDDS18V_DDR2.1 N21
H17 VDDS18V.10 VDDS18V_DDR2.2 J21
V21 VDDS18V.11 VDDS18V_DDR2.3 J22 VDDS18V
VDDS18V.12 VDDS18V_DDR2.4 P20 VDDS18V
VDDS18V_DDR2.5
C524
C402 0.1uF C406
0.1uF 10uF
X5777BXGABC
C C
U52-21
B B
B28
VSENSE
A27
IFORCE
Y10
ATESTV
TP51 1 K14
VPP
X5777BXGABC
Revision:
Size: B DWG NO 516582-0001 A
5 4 3 2 1
5 4 3 2 1
D D
CPU_VDD_DDR
C CPU_VDD_DDR C
U52-23
H20 W16
M21 VDDS_DDR2.1 VDDS_DDR1.1 AA22
L21 VDDS_DDR2.2 VDDS_DDR1.2 AB21
H22 VDDS_DDR2.3 VDDS_DDR1.3 AA21
C656 C655 C136 C556 C557 C548 C528 C541 C549 C537 G22 VDDS_DDR2.4 VDDS_DDR1.4 AG28
1uF 1uF 0.22uF 0.22uF 0.22uF 0.22uF 0.1uF 0.1uF 0.1uF 0.1uF G23 VDDS_DDR2.5 VDDS_DDR1.5 AC22 C508 C563 C574 C559 C564 C561 C571 C560 C569 C576
T24 VDDS_DDR2.6 VDDS_DDR1.6 AB22 0.1uF 0.1uF 0.1uF 0.1uF 0.22uF 0.22uF 0.22uF 0.22uF 1uF 1uF
L20 VDDS_DDR2.7 VDDS_DDR1.7 W27
E24 VDDS_DDR2.8 VDDS_DDR1.8 AG20
T25 VDDS_DDR2.9 VDDS_DDR1.9 AB24
H21 VDDS_DDR2.10 VDDS_DDR1.10 AB25
J27 VDDS_DDR2.11 VDDS_DDR1.11 AD26
C584 C139 C137 C138 M20 VDDS_DDR2.12 VDDS_DDR1.12 AH27 C143 C148 C578 C570
0.1uF 0.1uF 0.1uF 0.1uF VDDS_DDR2.13 VDDS_DDR1.13 0.1uF 0.1uF 0.1uF 0.1uF
X5777BXGABC
CPU_VDD_DDR
CPU_VDD_DDR
CPU_VDD_DDR 25,26,80
A TEXAS INSTRUMENTS INCORPORATED A
Revision:
Size: B DWG NO 516582-0001 A
5 4 3 2 1
5 4 3 2 1
D D
VDDA_1V8_PLL
1.8 VOLT VDDA_1V8_PLL
E3 E6
NFM21PC474R1C3D U52-11 NFM21PC474R1C3D
3 1 VAYU_VDDA_IVA1.8 R17 P14 VAYU_VDDA_VIDEO1.8 1 3
VDDA_IVA VDDA_VIDEO
2
0.001uF 1uF 0.01uF 0.1uF 0.1uF 0.01uF 1uF 0.001uF
c201-6p6spc R14 c201-6p6spc
VDDA_GPU P15
VDDA_GMAC_CORE
C C
VDDA_1V8_PLL E4
NFM21PC474R1C3D P16
3 1 VAYU_VDDA_DEBUG1.8 N11 VDDA_DDR
VDDA_DEBUG
2
0.1uF 0.01uF 1uF 0.001uF
M14 c201-6p6spc
VDDA_ABE_PER
X5777BXGABC
B B
5 4 3 2 1
5 4 3 2 1
VDD_MPU
VDD_MPU
Revision:
Size: B DWG NO 516582-0001 A
5 4 3 2 1
5 4 3 2 1
U52-10
A1 N25
D A14 VSS.9 VSS.74 P28 D
A2 VSS.41 VSS.77 R1
A23 VSS.11 VSS.5 R12
A28 VSS.68 VSS.29 R15
A6 VSS.79 VSS.43 R21
AA20 VSS.15 VSS.64 T10
AA8 VSS.61 VSS.21 T11
AA9 VSS.17 VSS.26 T15
AB14 VSS.19 VSS.42 T17
AB20 VSS.40 VSS.47 U20
AD1 VSS.60 VSS.62 U21
AD24 VSS.3 VSS.63 W1
AG1 VSS.70 VSS.4 W24
AH1 VSS.2 VSS.71 W25
AH2 VSS.1 VSS.73 W28
AH28 VSS.10 VSS.76 AA10
B1 VSS.75 VSS.14 AA14
D13 VSS.8 VSS.48 AA15
D19 VSS.39 VSS.51 AH20
E13 VSS.59 VSS.52 AH8
E19 VSS.38 VSS.53 F7
F1 VSS.58 VSS.54 G7
H12 VSS.7 VSS.57 G8
J12 VSS.33 VSS.65 G9
C VSS.32 VSS.66 C
J15 L14
J28 VSS.XX VSS.46 M19
K1 VSS.78 VSS.69 N15
K24 VSS.6 VSS.16 N19
K25 VSS.55 VSS.18 T12
K4 VSS.56 VSS.23 T18
K5 VSS.12 VSS.24 T21
L13 VSS.13 VSS.27 V15
N24 VSS.37 VSS.30 W15
K15 VSS.72 VSS.36 N14
V17 VSS.28 VSS.X5 R13
U17 VSS.X10 VSS.X6 T14
U15 VSS.X9 VSS.X7
VSS.X8
U14
VSSA_VIDEO
B B
X5777BXGABC
Revision:
Size: B DWG NO 516582-0001 A
5 4 3 2 1
5 4 3 2 1
Revision:
Size: B DWG NO 516582-0001 A
5 4 3 2 1
5 4 3 2 1
U65 U66
DDR1_A15 M7 DDR1_A15 M7 U67
25,48,51 DDR1_A15 NC.M7/A15 NC.M7/A15
25,48,51 DDR1_A14 DDR1_A14 T7 A3 DDR1_D14 DDR1_A14 T7 A3 DDR1_D27 DDR1_A0 K3 B3 DDR1_ECC_D7 DDR1_ECC_D7 25
A14 DQ15 DDR1_D14 25 A14 DQ15 DDR1_D27 25 A0 DQ0
25,48,51 DDR1_A13 DDR1_A13 T3 B8 DDR1_D9 DDR1_A13 T3 B8 DDR1_D26 DDR1_A1 L7 C7 DDR1_ECC_D4 DDR1_ECC_D4 25
A13 DQ14 DDR1_D9 25 A13 DQ14 DDR1_D26 25 A1 DQ1
25,48,51 DDR1_A12 DDR1_A12 N7 A2 DDR1_D8 DDR1_A12 N7 A2 DDR1_D30 DDR1_A2 L3 C2 DDR1_ECC_D6 DDR1_ECC_D6 25
A12 DQ13 DDR1_D8 25 A12 DQ13 DDR1_D30 25 A2 DQ2
25,48,51 DDR1_A11 DDR1_A11 R7 A7 DDR1_D10 DDR1_A11 R7 A7 DDR1_D25 DDR1_A3 K2 C8 DDR1_ECC_D1 DDR1_ECC_D1 25
A11 DQ12 DDR1_D10 25 A11 DQ12 DDR1_D25 25 A3 DQ3
25,48,51 DDR1_A10 DDR1_A10 L7 DDR1_A10 L7 DDR1_A4 L8 E3 DDR1_ECC_D2 DDR1_ECC_D2 25
DDR1_A9 R3 A10 C2 DDR1_D15 DDR1_A9 R3 A10 C2 DDR1_D29 DDR1_A5 L2 A4 DQ4 E8 DDR1_ECC_D0
25,48,51
D DDR1_A9 A9 DQ11 DDR1_D15 25 A9 DQ11 DDR1_D29 25 A5 DQ5 DDR1_ECC_D0 25 D
25,48,51 DDR1_A8 DDR1_A8 T8 C8 DDR1_D11 DDR1_A8 T8 C8 DDR1_D28 DDR1_A6 M8 D2 DDR1_ECC_D3 DDR1_ECC_D3 25
A8 DQ10 DDR1_D11 25 A8 DQ10 DDR1_D28 25 A6 DQ6
25,48,51 DDR1_A7 DDR1_A7 R2 C3 DDR1_D12 DDR1_A7 R2 C3 DDR1_D24 DDR1_A7 M2 E7 DDR1_ECC_D5 DDR1_ECC_D5 25
A7 DQ9 DDR1_D12 25 A7 DQ9 DDR1_D24 25 A7 DQ7
25,48,51 DDR1_A6 DDR1_A6 R8 D7 DDR1_D13 DDR1_A6 R8 D7 DDR1_D31 DDR1_A8 N8 B7 DDR1_DQM_ECC DDR1_DQM_ECC 25
A6 DQ8 DDR1_D13 25 A6 DQ8 DDR1_D31 25 A8 DM/TDQS
DDR1_A9 M3 A7
DDR1_A5 P2 H7 DDR1_D0 DDR1_A5 P2 H7 DDR1_D22 DDR1_A10 H7 A9 TDQS C3 DDR1_DQS_ECC
25,48,51 DDR1_A5 A5 DQ7 DDR1_D0 25 A5 DQ7 DDR1_D22 25 A10/AP DQS DDR1_DQS_ECC 25
25,48,51 DDR1_A4 DDR1_A4 P8 G2 DDR1_D7 DDR1_A4 P8 G2 DDR1_D21 DDR1_A11 M7 D3 DDR1_DQSN_ECC DDR1_DQSN_ECC 25
A4 DQ6 DDR1_D7 25 A4 DQ6 DDR1_D21 25 A11 DQS
25,48,51 DDR1_A3 DDR1_A3 N2 H8 DDR1_D3 DDR1_A3 N2 H8 DDR1_D17 DDR1_A12 K7
A3 DQ5 DDR1_D3 25 A3 DQ5 DDR1_D17 25 A12/BC
25,48,51 DDR1_A2 DDR1_A2 P3 H3 DDR1_D5 DDR1_A2 P3 H3 DDR1_D23 DDR1_A13 N3
A2 DQ4 DDR1_D5 25 A2 DQ4 DDR1_D23 25 A13
25,48,51 DDR1_A1 DDR1_A1 P7 DDR1_A1 P7 DDR1_A14 N7 A3
DDR1_A0 N3 A1 F8 DDR1_D1 DDR1_A0 N3 A1 F8 DDR1_D16 DDR1_A15 J7 A14/NC NC.1 F1
25,48,51 DDR1_A0 A0 DQ3 DDR1_D1 25 A0 DQ3 DDR1_D16 25 A15/NC NC.2
F2 DDR1_D6 F2 DDR1_D19 F9
DQ2 DDR1_D6 25 DQ2 DDR1_D19 25 NC.3
25,48,51 DDR1_BA2 DDR1_BA2 M3 F7 DDR1_D2 DDR1_BA2 M3 F7 DDR1_D18 H1
BA2 DQ1 DDR1_D2 25 BA2 DQ1 DDR1_D18 25 NC.4
25,48,51 DDR1_BA1 DDR1_BA1 N8 E3 DDR1_D4 DDR1_BA1 N8 E3 DDR1_D20 DDR1_BA0 J2 H9
BA1 DQ0 DDR1_D4 25 BA1 DQ0 DDR1_D20 25 BA0 NC.5
25,48,51 DDR1_BA0 DDR1_BA0 M2 DDR1_BA0 M2 DDR1_BA1 K8
BA0 BA0 DDR1_BA2 J3 BA1
DDR1_RASN J3 F3 DDR1_DQS0 DDR1_RASN J3 F3 DDR1_DQS2 BA2
5,48,51 DDR1_RASN RAS# LDQS DDR1_DQS0 25 RAS# LDQS DDR1_DQS2 25
5,48,51 DDR1_CASN DDR1_CASN K3 G3 DDR1_DQSN0 DDR1_DQSN0 25 DDR1_CASN K3 G3 DDR1_DQSN2 DDR1_DQSN2 25 DDR1_RASN F3
DDR1_WEN L3 CAS# LDQS# E7 DDR1_DQM0 DDR1_WEN L3 CAS# LDQS# E7 DDR1_DQM2 DDR1_CASN G3 RAS
5,48,51 DDR1_WEN WE# LDM DDR1_DQM0 25 WE# LDM DDR1_DQM2 25 CAS
DDR1_WEN H3
DDR1_CSN0 L2 DDR1_CSN0 L2 DDR1_ODT0 G1 WE DDR_VREFSTL1
5,48,51 DDR1_CSN0 CS# CS# ODT
C7 DDR1_DQS1 DDR1_DQS1 25 C7 DDR1_DQS3 DDR1_DQS3 25 DDR1_CKE G9
DDR1_CKE K9 UDQS B7 DDR1_DQSN1 DDR1_CKE K9 UDQS B7 DDR1_DQSN3 DDR1_CSN0 H2 CKE E1 DDR_VREFSTL1
8,49,51 DDR1_CKE CKE UDQS# DDR1_DQSN1 25 CKE UDQS# DDR1_DQSN3 25 CS VREFDQ
D3 DDR1_DQM1 D3 DDR1_DQM3 J8
UDM DDR1_DQM1 25 UDM DDR1_DQM3 25 VREFCA
5,48,51 DDR1_ODT0 DDR1_ODT0 K1 DDR1_ODT0 K1 DDR1_CLK0 F7
C ODT ODT CK VDD_DDR C
DDR1_CLK0N G7
DDR1_CLK0 J7 L8 R692 1 2 240 DDR1_CLK0 J7 L8 R691 1 2 240 CK C205 C617
5,48,51 DDR1_CLK0 CK ZQ CK ZQ
DDR1_CLK0N K7 DDR1_CLK0N K7 DDR1_RST N2 0.22uF 0.22uF
48,51 DDR1_CLK0N CK# CK# RESET
DDR_VREFSTL1 DDR_VREFSTL1
25,78 DDR1_RST DDR1_RST T2 DDR1_RST T2
RSTn M8 DDR_VREFSTL1 RSTn M8 DDR_VREFSTL1 A1 VDD_DDR
VREFCA H1 VREFCA H1 A8 VSS.1
L9 VREFDQ L9 VREFDQ B1 VSS.2 A2
L1 NC.L9 A9 L1 NC.L9 A9 D8 VSS.3 VDD.1 A9
J9 NC.L1 VSS.1 B3 J9 NC.L1 VSS.1 B3 F2 VSS.4 VDD.2 D7
J1 NC.J9 VSS.2 E1 J1 NC.J9 VSS.2 E1 F8 VSS.5 VDD.3 G2
VDD_DDR B2 NC.J1 VSS.3 G8 VDD_DDR B2 NC.J1 VSS.3 G8 J1 VSS.6 VDD.4 G8
D9 VDD.1 VSS.4 J8 D9 VDD.1 VSS.4 J8 J9 VSS.7 VDD.5 K1
G7 VDD.2 VSS.5 M1 C203 G7 VDD.2 VSS.5 M1 L1 VSS.8 VDD.6 K9
K8 VDD.3 VSS.6 M9 0.22uF C619 K8 VDD.3 VSS.6 M9 C204 C618 L9 VSS.9 VDD.7 M1
N1 VDD.4 VSS.7 P1 0.22uF N1 VDD.4 VSS.7 P1 0.22uF 0.22uF N1 VSS.10 VDD.8 M9
N9 VDD.5 VSS.8 P9 VDD_DDR N9 VDD.5 VSS.8 P9 N9 VSS.11 VDD.9
R1 VDD.6 VSS.9 T1 R1 VDD.6 VSS.9 T1 VDD_DDR VSS.12
R9 VDD.7 VSS.10 T9 R9 VDD.7 VSS.10 T9 ZQ_DBYTE4_1 H8
A1 VDD.8 VSS.11 B1 A1 VDD.8 VSS.11 B1 ZQ
A8 VDDQ.1 VSSQ.1 B9 A8 VDDQ.1 VSSQ.1 B9 B2 B9
C1 VDDQ.2 VSSQ.2 D1 C1 VDDQ.2 VSSQ.2 D1 R693 B8 VSSQ VDDQ.1 C1
C9 VDDQ.3 VSSQ.3 D8 C9 VDDQ.3 VSSQ.3 D8 240 C9 VSSQ VDDQ.2 E2
B B
D2 VDDQ.4 VSSQ.4 E2 D2 VDDQ.4 VSSQ.4 E2 D1 VSSQ VDDQ.3 E9
E9 VDDQ.5 VSSQ.5 E8 E9 VDDQ.5 VSSQ.5 E8 D9 VSSQ VDDQ.4
F1 VDDQ.6 VSSQ.6 F9 F1 VDDQ.6 VSSQ.6 F9 VSSQ
H2 VDDQ.7 VSSQ.7 G1 H2 VDDQ.7 VSSQ.7 G1
H9 VDDQ.8 VSSQ.8 G9 H9 VDDQ.8 VSSQ.8 G9 MT41K512M8RH-125-AAT:E (IT)
VDDQ.9 VSSQ.9 VDDQ.9 VSSQ.9
K2 J2 K2 J2
VDDL VSSDL VDDL VSSDL ER37
MT41K512M16HA-125 AIT:A (IT) MT41K512M16HA-125 AIT:A (IT)
ER37 ER37
25,48,49,51 DDR1_CKE
R804
4.7K
ER18
5 4 3 2 1
5 4 3 2 1
VDD_DDR
VDD_DDR
VDD_DDR
VDD_DDR
VDD_DDR
VDD_DDR
B B
VDD_DDR
Revision:
Size: B DWG NO 516582-0001 A
5 4 3 2 1
5 4 3 2 1
VTT VDD_DDR
RN2 R-PACK4-47
25,48,49 DDR1_ODT0 DDR1_ODT0 1 8 C654 0.22uF
25,48,49 DDR1_CASN DDR1_CASn 2 7
25,48,49 DDR1_CSN0 DDR1_CSN0 3 6
25,48,49 DDR1_BA0 DDR1_BA0 4 5 C663 0.22uF
D D
RN4 R-PACK4-47
25,48,49 DDR1_A0 DDR1_A0 1 8 C635 0.22uF
25,48,49 DDR1_A1 DDR1_A1 2 7
25,48,49 DDR1_A4 DDR1_A4 3 6
25,48,49 DDR1_A5 DDR1_A5 4 5 C207 0.22uF
RN6 R-PACK4-47
25,48,49 DDR1_A9 DDR1_A9 1 8 C165 0.22uF
25,48,49 DDR1_A7 DDR1_A7 2 7
25,48,49 DDR1_A13 DDR1_A13 3 6
25,48,49 DDR1_A2 DDR1_A2 4 5 C164 0.22uF
RN13 R-PACK4-47
25,48,49 DDR1_RASN DDR1_RASn 4 5 C175 0.22uF
25,48,49 DDR1_A10 DDR1_A10 3 6
25,48,49 DDR1_WEN DDR1_WEn 2 7
25,48,49 DDR1_A15 DDR1_A15 1 8 C180 0.22uF
RN15 R-PACK4-47
25,48,49 DDR1_A3 DDR1_A3 4 5 C206 0.22uF
C C
25,48,49 DDR1_BA1 DDR1_BA1 3 6
25,48,49 DDR1_BA2 DDR1_BA2 2 7
25,48,49 DDR1_A12 DDR1_A12 1 8 C627 0.22uF
RN17 R-PACK4-47
25,48,49 DDR1_A11 DDR1_A11 4 5 C643 0.22uF
25,48,49 DDR1_A6 DDR1_A6 3 6
25,48,49 DDR1_A14 DDR1_A14 2 7
25,48,49 DDR1_A8 DDR1_A8 1 8 C662 0.22uF
VDD_DDR
B B
VDD_DDR
VDD_DDR
VDD_DDR 49,50,53,54,55,80
VTT
VTT
VTT 55,77
Revision:
Size: B DWG NO 516582-0001 A
5 4 3 2 1
5 4 3 2 1
MEMORY 3
MEMORY 1 MEMORY 4
MEMORY 2
D
This section is an outline of vias labeled as Testpoints D
in the schematic. This allows us to determine pwb line
lengths for memory to memory and CPU to memory it is
purely a visibility tool no actual "component" is used
26,53,55 DDR2_A0 DDR2_A0 1 TP2MA15 1 TP2MB15 the vias are just replaced with a via that is labeled a
DDR2_A1 1 TP2MA19 1 TP2MB19 test point
26,53,55 DDR2_A1
Revision:
Size: B DWG NO 516582-0001 A
5 4 3 2 1
5 4 3 2 1
5 4 3 2 1
5 4 3 2 1
D D
VDD_DDR
VDD_DDR
C592 C649 C585 C630 C581 C636 C644 C615 C595 C667 C666 C664 C665
0.22uF 0.22uF 0.22uF 0.22uF 0.22uF 0.22uF 0.22uF 0.22uF 0.22uF 0.22uF 0.22uF 0.22uF 10uF
VDD_DDR
VDD_DDR
C C
C163 C196 C185 C170 C172 C161 C159 C190 C200 C668 C669 C671 C670
0.22uF 0.22uF 0.22uF 0.22uF 0.22uF 0.22uF 0.22uF 0.22uF 0.22uF 0.22uF 0.22uF 0.22uF 10uF
VDD_DDR
VDD_DDR
C593 C582 C650 C637 C586 C616 C631 C645 C596 C675 C674 C672 C673
0.22uF 0.22uF 0.22uF 0.22uF 0.22uF 0.22uF 0.22uF 0.22uF 0.22uF 0.22uF 0.22uF 0.22uF 10uF
B
VDD_DDR B
VDD_DDR
C162 C171 C184 C169 C160 C199 C189 C158 C195 C676 C677 C679 C678
0.22uF 0.22uF 0.22uF 0.22uF 0.22uF 0.22uF 0.22uF 0.22uF 0.22uF 0.22uF 0.22uF 0.22uF 10uF
Revision:
Size: B DWG NO 516582-0001 A
5 4 3 2 1
5 4 3 2 1
VDD_DDR
VDD_DDR
VDD_DDR 49,50,51,53,54,80
D D
VTT
VTT VDD_DDR
VTT RN7 R-PACK4-47
VTT 51,77
26,52,53 DDR2_A9 DDR2_A9 1 8 C208 0.22uF
26,52,53 DDR2_A11 DDR2_A11 2 7
26,52,53 DDR2_A6 DDR2_A6 3 6
26,52,53 DDR2_A14 DDR2_A14 4 5 C166 0.22uF
RN3 R-PACK4-47
26,52,53 DDR2_A10 DDR2_A10 1 8 C167 0.22uF
26,52,53 DDR2_ODT0 DDR2_ODT0 2 7
26,52,53 DDR2_A15 DDR2_A15 3 6
26,52,53 DDR2_WEN DDR2_WEn 4 5 C660 0.22uF
RN5 R-PACK4-47
26,52,53 DDR2_A3 DDR2_A3 1 8 C176 0.22uF
26,52,53 DDR2_A5 DDR2_A5 2 7
26,52,53 DDR2_A2 DDR2_A2 3 6
C C
26,52,53 DDR2_A4 DDR2_A4 4 5 C642 0.22uF
RN12 R-PACK4-47
4 5 C209 0.22uF
26,52,53 DDR2_BA0 DDR2_BA0 3 6
26,52,53 DDR2_CASN DDR2_CASn 2 7
26,52,53 DDR2_CSN0 DDR2_CSN0 1 8 C661 0.22uF
RN14 R-PACK4-47
26,52,53 DDR2_BA2 DDR2_BA2 4 5 C181 0.22uF
26,52,53 DDR2_A12 DDR2_A12 3 6
26,52,53 DDR2_BA1 DDR2_BA1 2 7
26,52,53 DDR2_A0 DDR2_A0 1 8 C653 0.22uF
RN16 R-PACK4-47
26,52,53 DDR2_A1 DDR2_A1 4 5 C634 0.22uF
26,52,53 DDR2_A7 DDR2_A7 3 6
26,52,53 DDR2_A13 DDR2_A13 2 7
26,52,53 DDR2_A8 DDR2_A8 1 8 C626 0.22uF
B B
Revision:
Size: B DWG NO 516582-0001 H
5 4 3 2 1
5 4 3 2 1
D D
EVM_5V0
U36 L8
2 8 USB1_VBUS 57
3 IN1 OUT1 7
IN2 OUT2 6 BLM21PG221SN1
1 OUT3
R154
OCn
C325 GND
EN
100K
10uF
TPS2065D
5
C80
.1uF
19 USB1_DRV_VBUS USB1_DRV_VBUS C79
10uF
TP27 1
R481
C EVM_3V3 C
10K R771
USB1_VBUS_OCN 13
10K
EVM_5V0
U43 L12
2 8 USB2_VBUS 2,57
3 IN1 OUT1 7
IN2 OUT2 6 BLM21PG221SN1
1 OUT3
R179
OCn
C340 GND
EN
100K
10uF
TPS2065D
5
C87
.1uF
19 USB2_DRV_VBUS USB2_DRV_VBUS C86
10uF
TP39 1
B B
R532 EVM_3V3
R770
10K
USB2_VBUS_OCN 13
10K
EVM_5V0
A
EVM_5V0 6,32,33,35,38,61,68,85 TEXAS INSTRUMENTS INCORPORATED A
Revision:
EVM_3V3 3,4,5,6,7,8,9,11,12,13,15,16,18,20,21,22,23,24,30,31,32,33,34,35,36,38,39,40,57,58,59,60,63,64,65,67,68,85,86 Size: B DWG NO 516582-0001 C
5 4 3 2 1
5 4 3 2 1
U72
R302 R307 TP1 1 1 10
2 VBUS_OUT.1 VBUS.1 9
10K 10K VBUS_OUT.2 VBUS.2
3 6
ENn D-
PWR_PAD
7
4 D+ FILTERS
D ACKn 5 USB2 / USB3: DLW21SN670HQ2 or DLW21SN121HQ2 D
8 ID
R303 R306 GND ESD
NO-POP NO-POP USB2: TPD4S012DRY replace with TPD4S014 (TPD4S014-Q1)
11
TPD4S014DSQ
C217
0.1uF P3
1
USB2_DM 4 3 CONN_USB2_DM USBVDD
19 USB2_DM 2 6
FL4 DLW21SN121HQ2 3 D- SHIELD1 7
19 USB2_DP D+ SHIELD2
USB2_ID 4 8
USB2_DP 1 2 CONN_USB2_DP ID SHIELD3 9
5 SHIELD4
USBVSS
USBMINI_AB
PWR_PAD
7
4 D+ 1 4
ACKn 5 2 3
8 ID
R308 R300 GND
NO-POP NO-POP TPD4S014DSQ SW DIP-2
11
USB1_ID 13
4 3
19 USB1_DM USB1_DM CONN_USB1_DM
19 USB1_DP USB1_DP CONN_USB1_DP
FL1 DLW21SN121HQ2 P2
1 2 1
USBVDD
2 11
3 D- SHIELD1 12
USB1_ID 4 D+ SHIELD2 13
ID SHIELD3 14
B B
C682 0.1uF USB_AC_TXN0 4 3 5 SHIELD4 15
USB_TXN0 USBVSS SHIELD5 16
19 USB_TXN0 LW21SN900HQ2 SHIELD6
19 USB_TXP0 USB_TXP0 CONN_USB_TXN0 6
FL2 CONN_USB_TXP0 7 CON6
C681 0.1uF USB_AC_TXP0 1 2 8 CON7
CONN_USB_RXN0 9 CON8
4 3 CONN_USB_RXP0 10 CON9
USB_RXN0 CON10
19 USB_RXN0
19 USB_RXP0 USB_RXP0
1
1
FL3 LW21SN900HQ2
AU-Y1009_3-AB-R
1 2 IO U124 U125 U126 U127
IO
IO
IO
tpd1e05u06
tpd1e05u06
tpd1e05u06
tpd1e05u06
GND
GND
GND
GND
2
2
FILTERS ER17
USB2 / USB3: DLW21SN670HQ2 or DLW21SN121HQ2
A TEXAS INSTRUMENTS INCORPORATED A
ESD
EVM_3V3 Title: VAYU EVM
USB2: TPD4S012DRY replace with TPD4S014 (TPD4S014-Q1)
Page Contents: USB CONNECTORS
USB3: TPD4EUSB30 replace with two TPD2EUSB30 (TPD2EUSB30-Q1) in drt package
EVM_3V3 3,4,5,6,7,8,9,11,12,13,15,16,18,20,21,22,23,24,30,31,32,33,34,35,36,38,39,40,56,58,59,60,63,64,65,67,68,85,86
Revision:
Size: B DWG NO 516582-0001 F
5 4 3 2 1
5 4 3 2 1
EVM_3V3
R2
0
R3 L1 BLM18AG221SN1D
C2
D C10 C11 NO-POP C9 C4 D
4.7uF .1uF .1uF
.1uF .1uF
U2
16
1
3V3OUT
VCCIO.1
R4
10K 22 19
21 CBUS0 VCC J1
EVM_3V3 10 CBUS1 1
11 CBUS2 USBVDD
9 CBUS3 15 CONN_USB_D- 2 6
CBUS4 USBDM 14 CONN_USB_D+ 3 D- SHIELD1 7
C252 USBDP 4 D+ SHIELD2 8
ID SHIELD3 9
REV D RU5 0.1uF 5 SHIELD4
16 FTDI_UARTIN 2 USBVSS
2 VCC RXD 18 R5 NO-POP
4 UART1_TXD 1B1 RESET#
4 UART3_TXD_BOOT 3 4 8 USBMINI_AB
5 1B2 1A CTS#
4 UART1_RXD 2B1
4 UART3_RXD_BOOT 6 7 6 INPUTS 27
11 2B2 2A DSRn OSCI
C 3B1 C
10 9 7
14 3B2 3A DCDn
13 4B1 12 3
4B2 4A RIn
1
15 S 8 FTDI_UARTOUT 30 28
OE GND TXD OSCO
SN74CBTLV3257PW 32
RTS# 5
OUTPUTS NC.5
31 12
DTR# NC.12 13
NC.13 23
26 NC.23 25
PWRPAD
13,24 UART_SEL1_3 TEST NC.25 29
GND.3
GND.2
GND.1
NC.29
AGND
R384
NO-POP
FT232RQ
24
20
17
4
33
B B
7,11,12,16,35,36,40,62,70 RSTOUTn
EVM_3V3
EVM_3V3 3,4,5,6,7,8,9,11,12,13,15,16,18,20,21,22,23,24,30,31,32,33,34,35,36,38,39,40,56,57,59,60,63,64,65,67,68,85,86
EVM_5V0
A TEXAS INSTRUMENTS INCORPORATED A
EVM_5V0 6,32,33,35,38,56,61,68,85
Title: VAYU EVM
Revision:
Size: B DWG NO 516582-0001 D
5 4 3 2 1
5 4 3 2 1
EVM_3V3 EVM_3V3
LVL_SHIFT_V LVL_SHIFT_V R536 NO-POP
13,24,59 MCASP1_ENn EVM_3V3 LVL_SHIFT_V
EVM_1V8
C404 SN74AVC8T245RHL C411 C405 R548 0 DIR=H : A to B
0.1uF U46 0.1uF 0.1uF C472
1
VCCA VCCB
24 R587 DIR=L : B to A 0.1uF
2 23 NO-POP C479
R539 NO-POP 22 DIR VCCB 0.1uF U104
OEn 6 1 LVL_SHIFT_V
3 21 VCCB VCCA 5
4 A1 B1 20 BT_EN 4 DIR 3
D 2 GP5[4] A2 B2 BT_EN 60 4 MMC4_CLK B A COMQ_MMC0_CLK 60D
2 GP5[8] 5 19 WL_EN 2
A3 B3 WL_EN 60 GND
2 GP5[6] 6 18 GPS_TIME_STAMP
A4 B4 GPS_TIME_STAMP 60
7 17 SN74LVC1T45
R714 0 8 A5 B5 16
9 A6 B6 15 BT_UART_CTS
5 UART3_RTS A7 B7 BT_UART_CTS 60 EVM_3V3 LVL_SHIFT_V
5 UART3_TXD 10 14 BT_UART_RX
A8 B8 BT_UART_RX 60
11
12 GND 13
L = B TO A GND GND C351 C448
PP
H = A TO B 0.1uF 0.1uF
U100
25
10K
10K
10K
10K
10K
19 2 LVL_SHIFT_V
VCCB VCCA
20K
20K
20K
20K
20K
13,24,59 MCASP1_ENn
20 1
LVL_SHIFT_V B1 A1
R520
R521
R522
R523
R524
R559
R560
R561
R562
R558
18 3
EVM_3V3 17 B2 A2 4
LVL_SHIFT_V 16 B3 A3 5
4 MMC4_CMD B4 A4 COMQ_MMC0_CMD 60
15 6
4 MMC4_DAT0 B5 A5 COMQ_MMC0_DAT0 60
14 7
4 MMC4_DAT1 B6 A6 COMQ_MMC0_DAT1 60
C331 C335 C332 13 8
0.1uF 0.1uF 0.1uF 4 MMC4_DAT2 B7 A7 COMQ_MMC0_DAT2 60
U35 SN74AVC8T245RHL 12 9
C 4 MMC4_DAT3 B8 A8 COMQ_MMC0_DAT3 60 C
1 24
2 VCCA VCCB 23
R479 NO-POP 22 DIR VCCB 10 LVL_SHIFT_V
OEn OE
3 21 WLAN_IRQ EVM_3V3 11
2 GP5[7] A1 B1 WLAN_IRQ 60 GND1
4 20
5 A2 B2 19 GPS_PPS_OUT
2 GP5[5] A3 B3 GPS_PPS_OUT 60
3 MCA1_AXR0 6 18 FM_I2S_DO R584 TXS0108EPW
A4 B4 FM_I2S_DO 60
5 UART3_RXD 7 17 BT_UART_TX 10K
A5 B5 BT_UART_TX 60
5 UART3_CTS 8 16 BT_UART_RTS
A6 B6 BT_UART_RTS 60 LVL_SHIFT_V
3 MCA7_AXR0 9 15 PCM_DOUT
A7 B7 PCM_DOUT 60 EVM_3V3
10 14 R715 0
A8 B8 LVL_SHIFT_V
11
L = B TO A 12 GND 13 R200
H = A TO B GND GND NO-POP C446 C447
PP
0.1uF 0.1uF
EVM_3V3
25
16
1
13,24,59 MCASP1_ENn U48
VCCA
VCCB
R528
NP 2
R568 NO-POP 15 1DIR
B B
LVL_SHIFT_V 1OE
DR26 EVM_3V3
3 MCA1_ACLKX 4
1A1 1B1
13 FM_I2S_CLK
FM_I2S_CLK 60
LVL_SHIFT_V 3 MCA1_AFSX 5 12 FM_I2S_FSYNC
1A2 1B2 FM_I2S_FSYNC 60
R178 3
10K C344 C345 14 2DIR
16
2OE
1
VCCB
GND.1
GND.2
GND.3
2 2A2 2B2
R515 0 15 1DIR
1OE EVM_3V3
3 MCA7_CLKX 4 13 PCM_CLK SN74AVC4T245RGYR_0
PCM_CLK 60
8
9
17
5 1A1 1B1 12 PCM_FSYNC
3 MCA7_FSX 1A2 1B2 PCM_FSYNC 60
R581
3 10K
EVM_3V3 14 2DIR
2OE
3 MCA7_AXR1 6 11 PCM_DIN
2A1 2B1 PCM_DIN 60
7 10
GND.1
GND.2
GND.3
EVM_1V8
R157 Title: VAYU EVM
NO-POP EVM_1V8 12,15,32,60,63,64,68,81
Page Contents: COM8 LEVEL TRANSLATOR
EVM_3V3
Revision:
Size: B DWG NO 516582-0001 A
EVM_3V3 3,4,5,6,7,8,9,11,12,13,15,16,18,20,21,22,23,24,30,31,32,33,34,35,36,38,39,40,56,57,58,60,63,64,65,67,68,85,86
Date: Tuesday, January 12, 2016 Sheet 59 of 89
5 4 3 2 1
5 4 3 2 1
EVM_3V6 EVM_1V8
P9
D R222 0 SLEEP_CLK 1 2 D
70 PMIC_32K_CLKOUT
3 4 WL_EN
WL_EN 59
5 6
7 8 TP49
TP48 9 10 TESTPOINT
TESTPOINT 11 12 TP46
TP47 13 14 TESTPOINT
TESTPOINT 15 16 TP44
TP45 17 18 TESTPOINT
TESTPOINT 19 20
COMQ_MMC0_CLK 59
21 22
23 24
COMQ_MMC0_CMD 59
25 26
COMQ_MMC0_DAT0 59
27 28
COMQ_MMC0_DAT1 59
29 30 J16
COMQ_MMC0_DAT2 59
1V8_I2C1_SCL 31 32
COMQ_MMC0_DAT3 59
1V8_I2C1_SDA 33 34 WLAN_IRQ
WLAN_IRQ 59
35 36 1
37 38 2
39 40 3
41 42
43 44
45 46
47 48 GPS_TIME_STAMP HEADER 3
C GPS_TIME_STAMP 59 C
FM_I2S_CLK 49 50 GPS_PPS_OUT
59 FM_I2S_CLK GPS_PPS_OUT 59
FM_I2S_DO 51 52 PCM_CLK
59 FM_I2S_DO
FM_I2S_DI 53 54 PCM_FSYNC
PCM_CLK 59 Antenna
59 FM_I2S_DI PCM_FSYNC 59
FM_I2S_FSYNC 55 56 PCM_DIN
59 FM_I2S_FSYNC PCM_DIN 59
57 58 PCM_DOUT
PCM_DOUT 59
59 60 J2
61 62
63 64
65 66 BT_UART_TX 1
BT_UART_TX 59
67 68 BT_UART_RX 2
BT_UART_RX 59
69 70 BT_UART_CTS 3
BT_UART_CTS 59
71 72 BT_UART_RTS
BT_UART_RTS 59
TP23 73 74
TESTPOINT 75 76 TP22
77 78 TESTPOINT HEADER 3
79 80
81 82
83 84
85 86
87 88
BT_EN 89 90
59 BT_EN
91 92
93 94
B 95 96 B
97 98
99 100
MEC6-150-02-S-D-RA1
EVM_1V8 EVM_1V8
EVM_1V8 12,15,32,59,63,64,68,81
R600 EVM_3V6
0
EVM_3V3 EVM_3V6 61
R603
4.7k EVM_3V3
R593 R597
U50
EVM_3V3 3,4,5,6,7,8,9,11,12,13,15,16,18,20,21,22,23,24,30,31,32,33,34,35,36,38,39,40,56,57,58,59,63,64,65,67,68,85,86
7 2 2K 2K
VREF2 VREF1
8
A EN TEXAS INSTRUMENTS INCORPORATED A
PCA9306/PCA9306-Q1 Revision:
Size: B DWG NO 516582-0001 A
5 4 3 2 1
5 4 3 2 1
D D
REV D
TPS74801
EVM_5V0 U56 EVM_3V6
1 10
2 IN1 VOUT2 9
IN2 VOUT1 R244
C546 4 3 17.4K C515 C503
2.2uF BIAS PG 5.6pF 10uF
C C
7 8
SS FB
5 6 R241
C532 EN GND 4.99K
PP1
0.001uF
11
VOUT = 0.8 * ( 1+(RTOP/RBOTTOM) )
4.5 = ( 1+(RTOP/RBOTTOM ))
3.5 = ((RTOP/RBOTTOM ))
B B
EVM_3V6
EVM_3V6 60
EVM_5V0
EVM_5V0 6,32,33,35,38,56,68,85
A TEXAS INSTRUMENTS INCORPORATED A
Revision:
Size: B DWG NO 516582-0001 D
5 4 3 2 1
5 4 3 2 1
VDAC_3V3
L19 VDAC_3V3
U55 VDAC_3V3
BLM21PG221SN1D AIC_DRVDD3.3
+ 1 5 L22 BLM21PG221SN1D
C131 C132 C130 IN OUT C566 C151 +
.1uF .1uF 10uF 2 C134 .1uF .1uF C567 C565 C152
C536 GND C133 .1uF .1uF 10uF
1uF 3 4.7uF .1uF
ENn 4
NC/FB
5
6
Line In VDAC_3V3
D 3 TPS77018DBVT D
AIC_AVDD_DAC3.3
4 L21 BLM21PG221SN1D
2 +
1 C142 C144 C141 C153
AIC_DVDD3.3 .1uF 10uF .1uF
P11 .1uF
U59 TLV320AIC3106
5
6
Mic In 16
3 DRVDD.1 17
36 DRVDD.2 24
4 DVDD.1 DRVDD.3
2 42 20 P13 Headphone Out
1 DVSS DRVSS.1 21 1
AIC_IOVDD3.3 44 DRVSS.2 C620 33uF,6.3V 2
+
IOVDD 4
P10
C173 .1uF 25
3 AVDD_DAC C646 33uF,6.3V 3
+
LINE1L+ 26
R673 4 AVSS_DAC 15
6
5
330 C558 C648 .1uF LINE1L- AVSS_ADC R696 R701
.1uF 5 20K 20K
LINE1R+
R675 6 18
C LINE1R- HPLOUT C
C575 NO-POP 19
NO-POP C568 R671 7 HPLCOM
.1uF R672 0 LINE2L+
2.2K 8 23
LINE2L- HPROUT 22
9 HPRCOM
LINE2R+
10 27
LINE2R- MONO_LO+ 28
MONO_LO-
14 P12
MIC3R 29 1
11 LEFT_LO+ R281 100 C168 2.2uF 2
MIC3L 30 4
12 LEFT_LO-
MICDET 31 R697 100 C647 2.2uF 3
13 RIGHT_LO+
MICBIAS 32 Line Out
6
5
RIGHT_LO- R287
7,11,12,16,35,36,40,58,70 RSTOUTn 33 35 R702 20K
RESET GPIO1 34 20K
R253 10 AIC_BCLK 38 GPIO2
3 AIC_MCA3_ACLKX BCLK
3 AIC_MCA3_AFSX R252 10 AIC_WCLK 39 45
R251 10 AIC_DIN 40 WCLK MFP0 46
B 3 AIC_MCA3_AXR0 B
R250 10 AIC_DOUT 41 DIN MFP1 47
3 AIC_MCA3_AXR1 DOUT MFP2 48 VDAC_3V3
2 MFP3
4,8,13,16,32,60,68 I2C1_SDA SDA
4,8,13,16,32,60,68 I2C1_SCL 1
SCL
TPAD
43 37 R668 R664 R659 R654
VDAC_3V3 SELECT MCLK NO-POP NO-POP NO-POP NO-POP
49
R249 R642 R643 AIC3106_I2C_0x19 70
NO-POP 20K 20K
ER24
R266 R262 R260 R257 CENTER TO CENTER SPACING CAN BE
R644 NO-POP NO-POP 2K 2K 0.425 INCHES FOR CABLES
2K R254 22
2 AIC3106_MCLK
5 4 3 2 1
5 4 3 2 1
ER47
C54 C55 C56 C46 C41 C32 C255 C17 C20 C26 C58 C57 C44 C28 C48 C40 C34 C27 C53
10uF .1uF .01uF .1uF .01uF .1uF .01uF 10uF .1uF .01uF .01uF .1uF .01uF .1uF .01uF .1uF .01uF .1uF 10uF
EVM_3V3 R26 10
D C21 D
22uF
101
103
105
111
117
123
100
15
21
29
37
42
53
58
69
77
83
90
96
11
19
25
35
48
63
73
92
98
4
R73 R72 U7 R32 18
1.5K 10K
IO_VDD
IO_VDD
IO_VDD
IO_VDD
IO_VDD
IO_VDD
IO_VDD
IO_VDD
IO_VDD
IO_VDD
IO_VDD
IO_VDD
CORE_VDD
CORE_VDD
CORE_VDD
CORE_VDD
CORE_VDD
CORE_VDD
CORE_VDD
CORE_VDD
2V5AVDD1
2V5_AVDD2
1V8_AVDD1
1V8_AVDD1
1V8_AVDD1
1V8_AVDD1
1V8_AVDD1
1V8_AVDD3
1V8_AVDD2
C22 C25
22uF .01uF
80
18,64 MDIO_MDIO MDIO
81
18,64 MDIO_MDCLK MDC
RN1 RPACK4-22 PHY0_2V5
EMAC[0]_RXD0 8 1 R_EMAC[0]_RXD0 56 108 EVM_2V5
18 EMAC[0]_RXD0 RXD0 / RGMII_RX0 MDIA_P P0_TRD[0]P 65
18 EMAC[0]_RXD1 EMAC[0]_RXD1 7 2 R_EMAC[0]_RXD1 55 109
RXD1 / RGMII_RX1 MDIA_N P0_TRD[0]N 65
18 EMAC[0]_RXD2 EMAC[0]_RXD2 6 3 R_EMAC[0]_RXD2 52 R21 0 EVM_2V5 EVM_2V5 64,76
EMAC[0]_RXD3 5 4 R_EMAC[0]_RXD3 51 RXD2 / RGMII_RX2
18 EMAC[0]_RXD3 RXD3 / RGMII_RX3 114
MDIB_P P0_TRD[1]P 65
18 EMAC[0]_RXCTL EMAC[0]_RXCTL R102 22 R_EMAC[0]_RXCTL 41 115
RX_ER / RGMII_RXDV_ER MDIB_N P0_TRD[1]N 65
68 R67 R61 R49 R43 R54 R34 R31 R97 R42 R53 R48 R40
C43 67 TXD4 2K NO-POP 2K NO-POP NO-POP NO-POP 2K 0 NO-POP 2K 2K NO-POP
TXD5
5
U10 0.1uF 66
40,64
ER8
ENET_PORz 1 65 TXD6
TXD7
4 61
2 TX_ER
13 EXP_ETH0_RSTn
74LVC1G08DCK
3
7 P0_LED_ACT
EVM_3V3 33 ACT_LED / SPEED0_STRAP 9 P0_LED_LINK10_100
RESET_N LINK100_LED / DUPLEX_STRAP 10 P0_LED_LINK1000
B B
EVM_3V3 LINK1000_LED / AN_EN_STRAP
R36 85
C59 2K CLK_TO_MAC 8
.1uF LINK10_LED / RLED / SPEED1_STRAP 34
3 VDD_SEL_STRAP 1
4 ENET_INTSn INTERRUPT_N NON_IEEE_STRAP
5
U15 6
1 TX_TCLK / MAN_MDIX_STRAP 88
R765 220 4 MAC_CLK_EN_STRAP 94
2 TX_TRIGGER / MULTI_EN_STRAP 89
MDIX_EN_STRAP
74LVC1G08DCK 13
3
DUPLEX_LED / PHYAD0_STRAP 14
39 PHYAD1_STRAP 17
EVM_3V3 40 COL / CLK_MAC_FREQ PHYAD2_STRAP 18
60 CRS / RGMII_SEL0 PHYAD3_STRAP 95
64 ENET_INT_P2 TX_CLK / RGMII_SEL1 PHYAD4_STRAP R68 R66 R50 R44 R55 R33 R30 R96 R41 R52 R47 R39
CLOCK_OUT
NO-POP 2K NO-POP 2K 2K 2K NO-POP NO-POP 2K NO-POP NO-POP 2K
CLOCK_IN
TRST_N
NO-POP 2K 2K
NC.2
TMS
TDO
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
TCK
TDI
2
23
84
5
12
16
20
22
26
30
36
38
43
49
54
59
64
70
74
78
82
91
93
97
99
104
106
107
110
112
113
116
118
119
122
124
125
128
87
86
C38 18 pF
R74 2K Title: VAYU EVM
R107 R108 R109 R69 Y1
2K NO-POP NO-POP NO-POP Page Contents: ETHERNET PORT0
25MHz
EVM_3V3 C33 18 pF Revision:
Size: B DWG NO 516582-0001 H
EVM_3V3 3,4,5,6,7,8,9,11,12,13,15,16,18,20,21,22,23,24,30,31,32,33,34,35,36,38,39,40,56,57,58,59,60,64,65,67,68,85,86
Date: Tuesday, January 12, 2016 Sheet 63 of 89
5 4 3 2 1
5 4 3 2 1
ER47
C282 C249 C37 C270 C284 C263 C285 C237 C246 C240 C267 C271 C289 C248 C260 C247 C283 C253 C281
10uF .1uF .01uF .1uF .01uF .1uF .01uF 10uF .1uF .01uF .01uF .1uF .01uF .1uF .01uF .1uF .01uF .1uF 10uF
R347 10
D C242 D
22uF
101
103
105
111
117
123
100
15
21
29
37
42
53
58
69
77
83
90
96
11
19
25
35
48
63
73
92
98
4
U84 R352 18
IO_VDD
IO_VDD
IO_VDD
IO_VDD
IO_VDD
IO_VDD
IO_VDD
IO_VDD
IO_VDD
IO_VDD
IO_VDD
IO_VDD
CORE_VDD
CORE_VDD
CORE_VDD
CORE_VDD
CORE_VDD
CORE_VDD
CORE_VDD
CORE_VDD
2V5AVDD1
2V5_AVDD2
1V8_AVDD1
1V8_AVDD1
1V8_AVDD1
1V8_AVDD1
1V8_AVDD1
1V8_AVDD3
1V8_AVDD2
C243 C245
22uF .01uF
80
18,63 MDIO_MDIO MDIO
81
18,63 MDIO_MDCLK MDC
RN11 RPACK4-22
31 EMAC[1]_RXD0 EMAC[1]_RXD0 8 1 R_EMAC[1]_RXD0 56 108
RXD0 / RGMII_RX0 MDIA_P P1_TRD[0]P 65
31 EMAC[1]_RXD1 EMAC[1]_RXD1 7 2 R_EMAC[1]_RXD1 55 109
RXD1 / RGMII_RX1 MDIA_N P1_TRD[0]N 65
31 EMAC[1]_RXD2 EMAC[1]_RXD2 6 3 R_EMAC[1]_RXD2 52
EMAC[1]_RXD3 5 4 R_EMAC[1]_RXD3 51 RXD2 / RGMII_RX2
31 EMAC[1]_RXD3 RXD3 / RGMII_RX3 114
MDIB_P P1_TRD[1]P 65 PHY1_2V5
31 EMAC[1]_RXCTL EMAC[1]_RXCTL R437 22 R_EMAC[1]_RXCTL 41 115
RX_ER / RGMII_RXDV_ER MDIB_N P1_TRD[1]N 65 EVM_2V5
31 EMAC[1]_RXC EMAC[1]_RXC R438 22 R_EMAC[1]_RXC 44 DP83865DVH
RX_DV / RGMII_RCK 120 R339 0 EVM_2V5
MDIC_P P1_TRD[2]P 65 EVM_2V5 63,76
50 121
RXD4 MDIC_N P1_TRD[2]N 65
47
46 RXD5
45 RXD6 126 P1_LED_LINK10_100
C RXD7 MDID_P P1_TRD[3]P 65 P1_LED_LINK10_100 65 C
57 127
RX_CLK MDID_N P1_TRD[3]N 65
P1_LED_LINK1000
P1_LED_LINK1000 65
31 EMAC[1]_TXD0 EMAC[1]_TXD0 76
EMAC[1]_TXD1 75 TXD0 / RGMII_TX0 102 R348 9.76K 1% P1_LED_ACT
31 EMAC[1]_TXD1 TXD1 / RGMII_TX1 BG_REF P1_LED_ACT 65
31 EMAC[1]_TXD2 EMAC[1]_TXD2 72
EMAC[1]_TXD3 71 TXD2 / RGMII_TX2
31 EMAC[1]_TXD3 TXD3 / RGMII_TX3
31 EMAC[1]_TXCTL EMAC[1]_TXCTL 62
TX_EN / RGMII_TXEN_ER EVM_3V3
EMAC[1]_TXC 79 PHY ADDR 0x03
31 EMAC[1]_TXC GTX_CLK / RGMII_TCK
68 R382 R378 R368 R362 R373 R355 R350 R409 R361 R372 R367 R359
67 TXD4 2K 2K 2K NO-POP NO-POP NO-POP 2K 0 NO-POP 2K 2K NO-POP
EVM_3V3 66 TXD5
65 TXD6
61 TXD7
TX_ER
C265
5
U85 0.1uF
40,63
ER8
ENET_PORz 1
ACT_LED / SPEED0_STRAP
7 P1_LED_ACT
4 33 9 P1_LED_LINK10_100
2 RESET_N LINK100_LED / DUPLEX_STRAP 10 P1_LED_LINK1000
B 13 EXP_ETH1_RSTn B
74LVC1G08DCK LINK1000_LED / AN_EN_STRAP
3
EVM_3V3 85
CLK_TO_MAC 8
LINK10_LED / RLED / SPEED1_STRAP 34
3 VDD_SEL_STRAP 1
R357 INTERRUPT_N NON_IEEE_STRAP 6
2K TX_TCLK / MAN_MDIX_STRAP 88
MAC_CLK_EN_STRAP 94
TX_TRIGGER / MULTI_EN_STRAP 89
MDIX_EN_STRAP
63 ENET_INT_P2 13
EVM_3V3 DUPLEX_LED / PHYAD0_STRAP 14
39 PHYAD1_STRAP 17
40 COL / CLK_MAC_FREQ PHYAD2_STRAP 18
60 CRS / RGMII_SEL0 PHYAD3_STRAP 95
TX_CLK / RGMII_SEL1 PHYAD4_STRAP R386 R380 R369 R363 R374 R354 R349 R408 R360 R371 R366 R358
CLOCK_OUT
R435 R436 R432 NO-POP NO-POP NO-POP 2K 2K 2K NO-POP NO-POP 2K NO-POP NO-POP 2K
CLOCK_IN
NO-POP 2K 2K
TRST_N
NC.23
NC.84
NC.2
TMS
TDO
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
TCK
TDI
2
23
84
5
12
16
20
22
26
30
36
38
43
49
54
59
64
70
74
78
82
91
93
97
99
104
106
107
110
112
113
116
118
119
122
124
125
128
87
86
R446 R447 R441 C258 18 pF
2K NO-POP NO-POP R399 2K Title: VAYU EVM
R387 Y7
NO-POP 25MHz Page Contents: ETHERNET PORT1
C250 18 pF Revision:
Size: B DWG NO 516582-0001 H
EVM_3V3
EVM_3V3 3,4,5,6,7,8,9,11,12,13,15,16,18,20,21,22,23,24,30,31,32,33,34,35,36,38,39,40,56,57,58,59,60,63,65,67,68,85,86 Date: Tuesday, January 12, 2016 Sheet 64 of 89
5 4 3 2 1
5 4 3 2 1
PHY0_2V5 PHY0_2V5
R331 R329 C227 R319 R320 C223 R317 R318 C222 R315 R316 C221 C225
49.9 49.9 .01uF 49.9 49.9 .01uF 49.9 49.9 .01uF 49.9 49.9 .01uF .01uF P5
2
VCC
P0_TRD[0]P 9
D 63 P0_TRD[0]P T0+ 1 D
P0_TRD[0]N 10 2
63 P0_TRD[0]N T0-
P0_TRD[1]P 7 3
63 P0_TRD[1]P T1+
P0_TRD[1]N 8
63 P0_TRD[1]N T1- 6
P0_TRD[2]P 5
63 P0_TRD[2]P T2+ 4
P0_TRD[2]N 6 5
63 P0_TRD[2]N T2-
P0_TRD[3]P 3 7
63 P0_TRD[3]P T3+
P0_TRD[3]N 4
63 P0_TRD[3]N T3- 8
EVM_3V3 D1
D2 LED1-A
DIFFERENTIAL PAIR LED1-K 75 75 75 75
100 OHM DIFFERENTIAL D3
IMPEDANCE R295 220 CON_P0_LINK D4 LED2-AK
SHLD1
SHLD2
C 63 P0_LED_LINK10_100 LED2-KA C
SHORT AND STRAIGHT AS
POSSIBLE, R298 220 1
63 P0_LED_LINK1000 GND
MINIMUM NUMBER OF VIAS
6605814-6
11
12
R299 220 CON_P0_ACTIVITY
63 P0_LED_ACT
PHY1_2V5 PHY1_2V5
R330 R328 C226 R313 R314 C220 R311 R312 C219 R309 R310 C218 C224
49.9 49.9 .01uF 49.9 49.9 .01uF 49.9 49.9 .01uF 49.9 49.9 .01uF .01uF P6
2
VCC
P1_TRD[0]P 9
64 P1_TRD[0]P T0+ 1
P1_TRD[0]N 10 2
64 P1_TRD[0]N T0-
P1_TRD[1]P 7 3
64 P1_TRD[1]P T1+
B B
P1_TRD[1]N 8
64 P1_TRD[1]N T1- 6
P1_TRD[2]P 5
64 P1_TRD[2]P T2+ 4
P1_TRD[2]N 6 5
64 P1_TRD[2]N T2-
P1_TRD[3]P 3 7
64 P1_TRD[3]P T3+
P1_TRD[3]N 4
64 P1_TRD[3]N T3- 8
EVM_3V3 D1
D2 LED1-A
LED1-K 75 75 75 75
D3
R294 220 CON_P1_LINK1 D4 LED2-AK
SHLD1
SHLD2
64 P1_LED_LINK10_100 LED2-KA
R296 220 1
64 P1_LED_LINK1000 GND
R297 220 CON_P1_ACTIVITY 6605814-6
64 P1_LED_ACT
11
12
A TEXAS INSTRUMENTS INCORPORATED A
EVM_3V3
Title: VAYU EVM
EVM_3V3 3,4,5,6,7,8,9,11,12,13,15,16,18,20,21,22,23,24,30,31,32,33,34,35,36,38,39,40,56,57,58,59,60,63,64,67,68,85,86
Page Contents: ETHERNET - OUTPUT CONNECTOR PORT
Revision:
Size: B DWG NO 516582-0001 A
5 4 3 2 1
5 4 3 2 1
D D
C C
BLANK
B B
Revision:
Size: B DWG NO 516582-0001 A
5 4 3 2 1
5 4 3 2 1
D D
EVM_3V3
EXP_P1 R480
10K
5 I2C3_SCL 1 2
3 1 2 4
5 I2C3_SDA 3 4
2 VIN[5]A_D[8] 5 6 VIN[5]A_D[9] 2
7 5 6 8
2 VIN[5]A_D[10] 7 8 VIN[5]A_D[11] 2
2 VIN[5]A_D[12] 9 10
11 9 10 12
2 VIN[5]A_D[14] 11 12 VIN[5]A_D[15] 2
32,40 GP1[2] 13 14 GP1[3] 40
15 13 14 16 OLD_GPMC_nCS0
2 GP6[17] 15 16
4 VIN[5]A_CLK0 17 18 VIN[5]A_D[13] 2
19 17 18 20
21 19 20 22
18 VIN[4]B_D[6] 21 22 VIN[4]B_D[7] 18
18 VIN[4]B_D[4] 23 24 VIN[4]B_D[5] 18
25 23 24 26
C 18 VIN[4]B_D[2] 25 26 VIN[4]B_D[3] 18 C
18 VIN[4]B_D[0] 27 28 VIN[4]B_D[1] 18
29 27 28 30
31 29 30 32
18 VIN[4]B_HSYNC1 31 32 VIN[4]B_VSYNC1 18
18 GP5[22] 33 34 GP5[29] 18
35 33 34 36
18 GP5[25] 35 36 GP5[30] 18
18 VIN[4]B_CLK1 37 38 GP5[31] 18
39 37 38 40
39 40
41 43
42 G1 G3 44
G2 G4
QSE-020-01-L-D-A-K
B B
ZJ2
1
Revision:
Size: B DWG NO 516582-0001 A
5 4 3 2 1
5 4 3 2 1
EXP_P2
30 VIN[1]A_HSYNC0 1 2 VIN[1]A_VSYNC0 30
3 1 2 4
30 VIN[1]A_D[16] 3 4 VIN[1]A_D[17] 30
30 VIN[1]A_D[18] 5 6 VIN[1]A_D[19] 30
7 5 6 8
30 VIN[1]A_D[20] 7 8 VIN[1]A_D[21] 30
30 VIN[1]A_D[22] 9 10 VIN[1]A_D[23] 30
D 11 9 10 12 D
3 VIN[6]A_HSYNC 11 12 VIN[6]A_VSYNC 3
3 VIN[6]A_D[0] 13 14 VIN[6]A_D[1] 3
15 13 14 16
3 VIN[6]A_D[2] 15 16 VIN[6]A_D[3] 3
3 VIN[6]A_D[7] 17 18 VIN[6]A_D[8] 3
19 17 18 20
3 VIN[6]A_D[9] 19 20 VIN[6]A_D[10] 3
3 VIN[6]A_D[11] 21 22 MCA2_AXR6 3
23 21 22 24
3 MCA2_AXR4 23 24 MCA2_AXR5 3
30 VIN[1]A_DE0 25 26
27 25 26 28 I2C1_SDA
27 28 I2C1_SDA 4,8,13,16,32,60,62
3 MCA2_ACLKX 29 30 I2C1_SCL I2C1_SCL 4,8,13,16,32,60,62
31 29 30 32
3 MCA2_AFSX 31 32 GP5[17] 17
3 MCA2_AXR1 33 34 GP5[0] 2
35 33 34 36
3 MCA2_AXR3 35 36 GP5[1] 2
3 MCA2_AXR0 37 38 MCA2_AXR7 3
39 37 38 40
3 MCA2_AXR2 39 40 VIN[1]A_D[0] 30
30 VIN[1]A_D[1] 41 42 VIN[1]A_D[2] 30
43 41 42 44
EVM_12V 30 VIN[1]A_D[3] 43 44 VIN[1]A_D[4] 30 EVM_12V
30 VIN[1]A_D[5] 45 46 VIN[1]A_D[6] 30
47 45 46 48
30 VIN[1]A_D[7] 47 48 VIN[1]A_CLK 30
49 50
EVM_1V8 51 49 50 52
53 51 52 54 EVM_1V8
EVM_3V3 55 53 54 56 EVM_3V3
57 55 56 58
C 57 58 C
59 60
59 60
EVM_5V0
31 VIN[2]A_CLK 61 62 VIN[2]A_HSYNC 31
EVM_5V0 63 61 62 64
31 VIN[2]A_DE0 63 64 VIN[2]A_VSYNC 31
65 66
67 65 66 68
30 VIN[1]A_D[9] 67 68 VIN[1]A_D[8] 30
30 VIN[1]A_D[11] 69 70 VIN[1]A_D[10] 30
71 69 70 72
30 VIN[1]A_D[13] 71 72 VIN[1]A_D[12] 30
30 VIN[1]A_D[15] 73 74 VIN[1]A_D[14] 30
75 73 74 76
30 VIN[1]B_CLK1 75 76 APP_BD_PORz 40
77 78
79 77 78 80
31 VIN[2]A_D[0] 79 80 VIN[2]A_D[1] 31
31 VIN[2]A_D[2] 81 82 VIN[2]A_D[3] 31
83 81 82 84
31 VIN[2]A_D[4] 83 84 VIN[2]A_D[5] 31
30 VIN[1]A_FLD0 85 86 1 TP12
87 85 86 88
31 VIN[2]A_D[6] 87 88 VIN[2]A_D[7] 31
31 VIN[2]A_D[8] 89 90 VIN[2]A_D[9] 31
91 89 90 92
31 VIN[2]A_D[10] 91 92 VIN[2]A_D[11] 31
31 VIN[2]A_D[12] 93 94 VIN[2]A_D[13] 31
95 93 94 96
31 VIN[2]A_D[14] 95 96 VIN[2]A_D[15] 31
31 VIN[2]A_D[16] 97 98 VIN[2]A_D[17] 31
TP7 1 99 97 98 100 1 TP14
TP10 1 101 99 100 102
B MCA6_AFSX 3 B
103 101 102 104
3 MCA6_AXR0 103 104 MCA6_ACLKX 3
3 MCA6_AXR1 105 106 MCA6_AHCLKX 3
TP8 1 107 105 106 108
107 108 GP2[27] 20
31 VIN[2]A_D[18] 109 110 VIN[2]A_D[19] 31
111 109 110 112
31 VIN[2]A_D[20] 111 112 VIN[2]A_D[21] 31
31 VIN[2]A_D[22] 113 114 VIN[2]A_D[23] 31
115 113 114 116
TP11 1 117 115 116 118 1 TP13
TP9 1 119 117 118 120 1 TP15
119 120
121 122
123 G1 G2 124
125 G3 G4 126
127 G5 G6 128
129 G7 G8 130
131 G9 G10 132
EVM_12V G11 G12
A
EVM_5V0 6,32,33,35,38,56,61,85 TEXAS INSTRUMENTS INCORPORATED A
EVM_1V8
Title: VAYU EVM
EVM_1V8 EVM_1V8 12,15,32,59,60,63,64,81
Page Contents: INTERFACE CONN2
EVM_3V3
Revision:
EVM_3V3 EVM_3V3 3,4,5,6,7,8,9,11,12,13,15,16,18,20,21,22,23,24,30,31,32,33,34,35,36,38,39,40,56,57,58,59,60,63,64,65,67,85,86 Size: B DWG NO 516582-0001 A
5 4 3 2 1
5 4 3 2 1
D D
EXP_P3
5 SPI[2]_SCLK 1 2 SPI[2]_CS[0]n 5
3 1 2 4
5 SPI[2]_MISO 3 4 SPI[2]_MOSI 5
TP35 1 5 6 1 TP36
TP33 1 7 5 6 8 1 TP34
TP28 TP_0 1 9 7 8 10 1 TP29
TP_0
TP25 TP_0 1 11 9 10 12 1 TP26
TP_0
13 11 12 14 1 TP66
C TP_0 2 GP6[20] TP_0 C
TP20 TP_0 1 15 13 14 16 1 TP21
TP_0
TP18 1 17 15 16 18 1 TP19
TP_0
19 17 18 20
TP_0 TP_0
21 19 20 22
TP_0 5,13,34,35 I2C2_SDA I2C2_SCL 5,13,34,35 TP_0
TP16 1 23 21 22 24 1 TP17
25 23 24 26
14 MMC3_CLK 25 26 MMC3_CMD 14
TP_0 27 28 TP_0
14 MMC3_DAT2 27 28 MMC3_DAT0 14
29 30
14 MMC3_DAT3 29 30 MMC3_DAT1 14
31 32
14 MMC3_DAT6 31 32 MMC3_DAT4 14
33 34
14 MMC3_DAT7 33 34 MMC3_DAT5 14
4 SPI[1]_SCLK 35 36 SPI[1]_CS[0]n 4
37 35 36 38
4 SPI[1]_MISO 37 38 SPI[1]_MOSI 4
4,77 SPI[1]_CS[1]n 39 40 APP_BD_PRESENT_DETECTn
39 40
41 43
42 G1 G3 44
G2 G4
QSE-020-01-L-D-A-K
B B
Revision:
Size: B DWG NO 516582-0001 A
5 4 3 2 1
5 4 3 2 1
C115
U45B
12pF/0402/50V
3
1
PMIC HAS DUAL FOOTPRINT
Y4
FOR 32678 HERTZ AND 16.384
MHZ CRYSTAL Crystal_CM519_CTS407
TPS659039
C116
6
2
D xtal1 A3 D
12pF/0402/50V OSC16MIN
PMIC_VIO IS 1.8 VOLTS M11 PMIC_32K_CLKOUT 60
CLK32KGO
NOT THIS MEANS TRANSLATORS FOR I2C AND OTHERS xtal2 A2
REV G3 OSC16MOUT
CLOCK REV D
60 1V8_I2C1_SDA
60 1V8_I2C1_SCL
C1
R211 1.74K OSC16MCAP PMIC_REGEN1 R784 NO-POP
6,40 PMIC_OFF
R588 PMIC_GPIO_2 R783 NO-POP
PMIC_VIO 2K B7
VBG
REFERENCE C403
R782 0
PMIC_RESET_OUT 40
ER20 C100
2.2uF/0402/6.3V
100nF/0402/10V
7,11,12,16,35,36,40,58,62 RSTOUTn R797 1.74K R210 LT_PMIC_RESET_OUT
NP
G9
SW DIP-2 PMIC_GPIO_6 GPIO_7/POWERHOLD
78,80 PMIC_REGEN_DDR
R809
A11
VRTC_OUT PS_EVM_3V3 VCC_SENSE B3 VCC_SENSE2
ER15 ER15 VCC_SENSE
REFGND1
R788
GND_DIG
GNDANA
AGND.1
AGND.2
NO-POP D8
VDAC_3V3 R513 E7 VBUS
10K R567 VAC/ACOK
NO-POP R549 R207
R209 0 0 PO9039A387IZWSRQ1
A7
F5
M13
A4
M12
R710 NO-POP
A 0 TEXAS INSTRUMENTS INCORPORATED A
5 4 3 2 1
5 4 3 2 1
LDOUSB_OUT
LDOUSB_OUT LDOUSB_OUT 84
C433
2.2uF/0402/6.3V VRTC_OUT
LDO2_OUT LDO2_OUT 83
C101
A10 2.2uF/0402/6.3V The TPS65903x PMIC LDO3 output has a
C99 A9 LDO7USB_IN1 B9 current limit of 300 mA.
2.2uF/0402/6.3V LDOUSB_IN2 100mA VUSB LDOUSB_OUT If all PHYs are used concurrently (not
A8 LDO3_OUT expected in most systems)
VRTC LDOVRTC_OUT then the current requirement for the
PHYs can exceed this limit.
PS_EVM_5V0 C8 LDO3_OUT
VANA LDOVANA_OUT LDO3_OUT 82 The System use case should be analyzed
to verify that the power
A6 C6 C352 is less than 300 mA if LDO3 is used to
LDO12_IN 300mA LDO1 LDO1_OUT
2.2uF/0402/6.3V power the PHYs. If
B6 greater than 300 mA is required,
PS_EVM_3V3 300mA LDO2 LDO2_OUT contact your TI Representative
C
L12
LDO34_IN 200mA LDO3 LDO3_OUT
K11 ER39 to identify an alternate
implementation.
C
LDO4_OUT
L13 K12 LDO4_OUT LDO4_OUT 73
PS_EVM_3V3 LDO34_IN_1 NC1
M4 K4 C347
NC6 NC2
NO POP
N3 L4
PS_EVM_3V3 NC7 NC3
C9
NC4
N4 K5
PS_EVM_3V3 NC8 NC5
C4 A5
LDO9_IN 50mA LDO9 LDO9_OUT
C5 B5
C407 C459 C346 C343 C339 C408 LDOLN_IN 50mA LDOLNLDOLN_OUT
10uF/6.3V NO POP NO POP 2.2uF/0402/6.3V
PO9039A387IZWSRQ1
ER38
B B
LDO9_OUT
LDO9_OUT LDO9_OUT 83
C102
2.2uF/0402/6.3V
PS_EVM_3V3 LDOLN_OUT
LDOLN_OUT LDOLN_OUT 82
C381 C103
2.2uF/0402/6.3V 2.2uF/0402/6.3V
5 4 3 2 1
5 4 3 2 1
VDD_MPU VDD_MPU
REMOTE SENSING
VDD_MPU
VDD_MPU 46,79,86
PS_EVM_3V3
REMOTE SENSING
D U45C D
B13
D11 SMPS12_FBK C12
D12 SMPS1_IN_1 SMPS12_FBK_GND
D13 SMPS1_IN_2 SMPS1 NOTE INDUCTORS HAVE AUTOMOTIVE AND
SMPS1_IN_3 3000mA E11 SW1 L17 1uH
SMPS1_SW_1 COMMERICAL PART NUMBERS ONE APPLIED AT
C379 E12 THIS TIME
4.7uF 10V SMPS1_SW_2 E13 IHLP-1616ABER1R0M11
SMPS1_SW_3 REV D
D10 C410
SMPS1_GND_1 E9 47uF/10V
SMPS1_GND_2 E10
SMPS1_GND_3
FOR REPACKAGED TWL PART USE 22uF
FOR PRODUCTION PART USE 47uF CAPS
ON ALL SMPS OUTPUTS C1210
FOOTPRINT
F11 SW2 L15 1uH
G11 SMPS2_SW_1 F12 IHLP-1616ABER1R0M11
G12 SMPS2_IN_1 SMPS2 SMPS2_SW_2 F13
G13 SMPS2_IN_2 3000mA SMPS2_SW_3
C376 SMPS2_IN_3 C378 REV D
4.7uF 10V F9 47uF/10V
SMPS2_GND_1 F10
SMPS2_GND_2 G10
SMPS2_GND_3
C SMPS_1_2_3 C
PO9039A387IZWSRQ1
VDD_DSPEVE REMOTE SENSING VDD_DSPEVE
VDD_DSPEVE
VDD_DSPEVE 46,79
U45D
K2
SMPS45_FDBK K3
B B
SMPS45_FDBK_GND
REMOTE SENSING
F1 G1 SW4 L16 1uH
F2 SMPS4_IN_1 SMPS4 SMPS4_SW_1 G2 IHLP-1616ABER1R0M11
F3 SMPS4_IN_2 2000mA SMPS4_SW_2 G3
C375 SMPS4_IN_3 SMPS4_SW_3 C377 REV D
4.7uF 10V 47uF/10V
F4
SMPS4_GND_1 G4
SMPS4_GND_2 G5
SMPS4_GND_3 SMPS_4_5
5 4 3 2 1
5 4 3 2 1
M8
SMPS9 J8 SMPS_9 VDDS18V
N8 SMPS9_IN 1400mA SMPS9_FBK
SMPS9_IN_1 M7 SW9 L10 1uH SMPS9 VDDS18V
SMPS9_SW VDDS18V 16,42,43,81
N7 IHLP-1616ABER1R0M11 REV D
C341 SMPS9_SW_1 C327
4.7uF 10V L7 47uF/10V
SMPS9_GND L8
SMPS9_GND_1
PO9039A387IZWSRQ1
PS_EVM_3V3
U45F
B B
R193 0
B8 1 TP42
SYNC_TO_EXCLOCK TP_0
C432
4.7uF 10V R591
SMPS_9 0
PMIC_VIO
C7
VCC1
R192 0 PMIC_VIO D9
VIO_IN
LDO4_OUT REV D
C434
LDO4_OUT R566 NO-POP 100nF/0402/10V
SUB_GND_N13
SUB_GND_A13
SUB_GND_B10
SUB_GND_B11
SUB_GND_M1
SUB_GND_M2
SUB_GND_G7
SUB_GND_D6
SUB_GND_D7
SUB_GND_H6
SUB_GND_H7
SUB_GND_N1
SUB_GND_A1
SUB_GND_E8
SUB_GND_F6
SUB_GND_F7
SUB_GND_J6
VIO_GND
PMIC_VIO
PMIC_VIO 70
PO9039A387IZWSRQ1
A1
A13
B10
B11
D6
D7
E8
F6
F7
G7
H6
H7
J6
M1
M2
N1
N2
N13
A LDO4_OUT TEXAS INSTRUMENTS INCORPORATED A
PS_EVM_3V3
LDO4_OUT LDO4_OUT 71
PS_EVM_3V3 PS_EVM_3V3 38,70,71,72,74,75,76,78,79,80,81,82,84,86 Title: VAYU EVM
5 4 3 2 1
5 4 3 2 1
Q1 EVM_12V
5 POSSIBLE HIGHER VOLTAGE RANGE ON C62, CHANGE FOOTPRINT TO 1210.
R143
Q3
2.2uH ( 7443330220)
.005 OHM C683 C71 C74
5 49.9
100uF 10V 100uF 10V 100uF 10V
TPS43351QDAPRQ1 R126
U23 C300 .22uF,50V 10
5
4 CBA
GC2 4 1 REV D
6 GA1 R451 0 2 10TPB100ML R144
38 GA1 3 C60 10 Volts
VIN 49.9K 1%
330pF Less than ESR 35m-ohm
7 PHA
PHA
R453 1.5K 1 CSD18501Q5A
VBAT 8 GA2 R457 0
GA2
R472
37 10 C76 16K 1%
EXTSUP SA1 C302 100pF
.01uF
R454 11
35 SA2
C NO-POP VREG C
12
FBA
Q2 EVM_12V
C295 13
COMPA 5 POSSIBLE HIGHER VOLTAGE RANGE ON C63
4.7uF/25V
R455 15 C307
20 PGA PS_EVM_3V3 2700pF C63
0 SYNC 22uF,25V, x5R
R464 C309
R140 15K 56pf 4 1
Fsw = 400KHZ NP 2
22 3 10 Volts PS_EVM_5V0
RT
CSD18501Q5A Less than ESR 35m-ohm
R135
R463 L7
0
C305 14
EVM_12V SSA Q4
.01uF 8.2uH(744771008 ) R147
5 0.015 C77 C72 C684 49.9
R127 47UF 16V 47UF 16V NO-POP
R141 NO-POP 16 C299 .22uF,50V 10
ENA 34
CBB
4 1 REV D GRM32ER61A476KE20L (1210-10V)
B R142 NO-POP 17 33 GB1 R450 0 2 T525D476M016ATE035 (7343-16V) R146 B
ENB GB1 3 C61 84.5K 1%
R12 0 330pF
32 PHB 100uF total
R13 0 25 PHB
SSB CSD18501Q5A
31 GB2 R456 0
GB2
21 R145
DLYAB 29 C78
SB1 16K 1%
C301 100pF
.01uF
28
SB2
27
FBB
87 PB_ON 26
COMPB PS_EVM_3V3
C306 C314 24 C303
PGB PS_EVM_5V0 2000pF PS_EVM_3V3
.01uF 1000pF PS_EVM_3V3 38,70,71,72,73,75,76,78,79,80,81,82,84,86
PWR PAD
AGND.1
AGND.2
R461 C304
PGNDA
PGNDB
NC.18
NC.36
NP
A TEXAS INSTRUMENTS INCORPORATED A
2
3
18
36
19
23
39
9
30
VIN_CONN
Title: VAYU EVM
VIN_CONN VIN_CONN 87
ER27
PGD_3V3_5V0 86 Page Contents: POWER TPS43351DAP
EVM_12V Revision:
PS_EVM_5V0 Size: B DWG NO 516582-0001 H
EVM_12V EVM_12V 16,38,68,87
PS_EVM_5V0 PS_EVM_5V0 15,71,75,80,85 Date: Tuesday, January 12, 2016 Sheet 74 of 89
5 4 3 2 1
5 4 3 2 1
D D
EVM_3V3_SW
PS_EVM_3V3 PS_EVM_3V3
U92
R474 1 8
VIN.1 VOUT.1
C NO-POP C
2 7 C319
VIN.2 VOUT.2 NO-POP
70 PMIC_REGEN_3V3 3 6
ON CT
1.2 volt input
4 5
VBIAS GND C318
PMIC TRI-STATES GPIO ON R473 220pF 50V
STARTUP SO KEEP THE 10K
SUPPLY DISABLED UNTIL PS_EVM_5V0
PWR_PAD
DRIVEN.
R35 0
TPS22965DSG
9
B B
PS_EVM_5V0
EVM_3V3_SW
EVM_3V3_SW 77,84,85
A TEXAS INSTRUMENTS INCORPORATED A
5 4 3 2 1
5 4 3 2 1
REV D
TPS74801
PS_EVM_3V3 PS_EVM_5V0 U80
EVM_2V5
D 1 10 D
2 IN1 VOUT2 9
C18 IN2 VOUT1 R346
2.2uF 4 3 10.7K C239 C238
BIAS PG 5.6pF 10uF
7 8
C705 SS FB
2.2uF 5 6 R24
C19 EN GND 4.99K
PP1
NP
11
VOUT = 0.8 * ( 1+(RTOP/RBOTTOM) )
ENET_1V8
PS_EVM_5V0 EVM_1V8 ER47
U145
1 8
VIN.1 VOUT.1
2 7 C708
PS_EVM_3V3 EVM_3V3 VIN.2 VOUT.2 NO-POP
RJ2
1 2 3 6
3 ON CT
B 4.7K 4 5 B
VBIAS GND C709
R833 220pF 50V
10.7K
PWR_PAD
EVM_1V8
EVM_1V8 12,15,32,59,60,64,68,81
TPS22965DSG
9
EVM_3V3
EVM_3V3 3,4,5,6,7,8,9,11,12,13,15,16,18,20,21,22,23,24,30,31,32,33,34,35,36,38,39,40,56,57,58,59,60,63,64,65,67,68,86
EVM_2V5
5 4 3 2 1
5 4 3 2 1
D D
1V35_DDR
PS_EVM_3V3 R292
10.0K C187
REV G 0.001uF
EVM_3V3 C174
10uF
R291
R282 10.0K C186 C659 C201 C191
U64
100K 1000pF 0.1uF 10uF 10uF
R283 TPS51200
C 10K C
10 1 VTT
VIN REFIN EVM_DDR_VTT
9 2
PGOOD VLDOIN
ER18 8 3 R293 0.025
GND VO
R808 0 7 4
PWRPAD
4,69 SPI[1]_CS[1]n EN PGND C188 C192 C202 C658
1
6 5 R290 10uF 10uF 10uF 0.1uF
R803 REFOUT VOSNS
10
NP TP64 TP65
11
C607 TEST POINT TEST POINT
0.1uF
C179
10pF
R826 0
REV G D
PS_EVM_3V3
Q7
B 10K G AO3404A(or BSS138) B
R827
S AO3404A -RDSON ~ 35mOHM
DDR_VREFSTL1 DDR_VREFSTL2
3
D
R285 0 TURN ON ~1.2v Q6
1 G NTA4153N
R284 0 S
2
PS_EVM_3V3
DDR_VREFSTL2
PS_EVM_3V3 PS_EVM_3V3 38,70,71,72,73,74,75,76,79,80,81,82,84,86
DDR_VREFSTL2
DDR_VREFSTL2 26,53
VTT
DDR_VREFSTL1
5 4 3 2 1
5 4 3 2 1
PS_EVM_3V3
1.5V at 2 AMP
ENABLE VOLTAGE 1.2 VOLTS
R271
ER18 10K 1V35_DDR
D D
ER18
R819 0 DDR1_RST 25,49
PS_EVM_3V3 R820 0 DDR2_RST 26,53
TP61
TP-30RD13-NO-POP
C149 0.1uF
C156
16
15
14
13
10uF
BOOT
EN
PWRGD
VIN.1
1 12
C VIN.2 PH.3 1V35_DDR C
L20
1.2uH (SD12-1R2-R)
2 11
VIN.3 PH.2
U63 C154
3 TPS57112QRTERQ1 10 C150 47uF
GND.1 PH.1 R279
NO-POP
11.0K 1%
4 9
GND.2 SS/TR R276
NO-POP
C155
RT/CLK
COMP
AGND
VSNS
4700pF R278
17 16.0K 1%
PwrPad
8
R277
B 86.6K 1% B
R280
12k
C157
12pF
C579
3300pf
PS_EVM_3V3
5 4 3 2 1
5 4 3 2 1
SMPS_1_2_3
VDD_MPU
R181
SMPS_6 VDD_GPU
C88
6 AMPS
D 0.1uF U39 C316 U90 2.3 AMPS D
6 0.1uF 6
VS 10 VS 10
PM_I2C_SCL 5 VIN+ PM_I2C_SCL 5 VIN+
PM_I2C_SDA 4 SCL PM_I2C_SDA 4 SCL
SDA SDA
3 9 3 9
2 ALERT/NC.3 VIN- 2 ALERT/NC.3 VIN-
1 A0 1 A0
A1 A1
7 8 7 8
GND VBUS GND VBUS
INA226AIDGSR INA226AIDGSR
100-0001 (0x41) 100-0100 (0x44)
SMPS_4_5 VDD_DSPEVE
R155
10mOHM
CORE_VDD
C 3.5 AMPS SMPS_7 C
10mOHM R187
PS_EVM_3V3 PS_EVM_3V3
PS_EVM_3V3
SMPS_8 VDD_IVA
C81 U34 C97 U47 2.0 AMPS C333 U98
0.1uF 6 0.1uF 6 0.1uF 6
VS 10 VS 10 VS 10 R482 10mOHM
PM_I2C_SCL 5 VIN+ PM_I2C_SCL 5 VIN+ PM_I2C_SCL 5 VIN+
PM_I2C_SDA 4 SCL PM_I2C_SDA 4 SCL PM_I2C_SDA 4 SCL
SDA SDA SDA
3 9 3 9 3 9
2 ALERT/NC.3 VIN- 2 ALERT/NC.3 VIN- 2 ALERT/NC.3 VIN-
1 A0 1 A0 1 A0
A1 A1 A1
7 8 7 8 7 8
GND VBUS GND VBUS GND VBUS
INA226AIDGSR INA226AIDGSR INA226AIDGSR
100-0000 (0x40) 100-1000 (0x48) 100-1001 (0x49)
B B
PS_EVM_3V3
R449 R440
J8 4.7K 4.7K
1 PM_I2C_SCL
PM_I2C_SCL 80,81,82,84
2 PM_I2C_SDA
PM_I2C_SDA 80,81,82,84
3
4
5
HEADER 5
PS_EVM_3V3 ER48
PS_EVM_3V3 PS_EVM_3V3 38,70,71,72,73,74,75,76,78,80,81,82,84,86
A SMPS_1_2_3 SMPS_4_5 TEXAS INSTRUMENTS INCORPORATED A
SMPS_6 SMPS_7 SMPS_8
SMPS_1_2_3 SMPS_1_2_3 72 SMPS_4_5 SMPS_4_5 72 SMPS_6 SMPS_6 73 SMPS_7 SMPS_7 73 SMPS_8 SMPS_8 73 Title: VAYU EVM
5 4 3 2 1
5 4 3 2 1
NP R822
1V35_DDR CPU_VDD_DDR_IN
PS_EVM_3V3 ER18
DDR3 1V5 EMIF CPU_VDD_DDR
U138
R669 10mOhm 1 8
D C547 VIN.1 VOUT.1 D
0.1uF
2 7
U112 1 AMP VIN.2 VOUT.2
6
VS 10 1.2 volt input 3 6
PM_I2C_SCL 5 VIN+ PS_EVM_5V0 ON CT
79,81,82,84 PM_I2C_SCL SCL
PM_I2C_SDA 4
79,81,82,84 PM_I2C_SDA SDA 4 5
3 9 VBIAS GND C702
2 ALERT/NC.3 VIN- R802 0 220pF 50V
1 A0
A1
PWR_PAD
7 8
GND VBUS
INA226AIDGSR 70,78 PMIC_REGEN_DDR
100-0010 (0x42) PMIC TRI-STATES GPIO ON TPS22965DSG
9
STARTUP SO KEEP THE DDR3 R273
SUPPLY DISABLED UNTIL
DRIVEN. 10K
C C
1V35_DDR VDD_DDR
R690 10mOhm
PS_EVM_3V3
1 AMP
C604 U114
0.1uF 6
VS 10
PM_I2C_SCL 5 VIN+
PM_I2C_SDA 4 SCL
SDA
3 9
2 ALERT/NC.3 VIN-
1 A0
A1
7 8
GND VBUS
INA226AIDGSR
100-1010 (0x4A)
B B
PS_EVM_5V0
PS_EVM_3V3
1V35_DDR
1V35_DDR 77,78 ER48
VDD_DDR
A TEXAS INSTRUMENTS INCORPORATED A
VDD_DDR
VDD_DDR 49,50,51,53,54,55
Title: VAYU EVM
5 4 3 2 1
5 4 3 2 1
SMPS_9
EVM_1V8
D D
R149 0.01
VDDS18V
R476 0.01
PS_EVM_3V3
C317 U91
0.1uF 6
VS 10
C VIN+ C
PM_I2C_SCL 5
79,80,82,84 PM_I2C_SCL SCL
PM_I2C_SDA 4
79,80,82,84 PM_I2C_SDA SDA
3 9
2 ALERT/NC.3 VIN-
1 A0
A1
7 8
GND VBUS
INA226AIDGSR
100-0110 (0x46)
B B
EVM_1V8
SMPS_9
VDDS18V Title: VAYU EVM
SMPS_9 SMPS_9 73
VDDS18V VDDS18V 16,42,43,73 Page Contents: POWER ROUTER 1V8
PS_EVM_3V3 Revision:
Size: B DWG NO 516582-0001 G4
PS_EVM_3V3 PS_EVM_3V3 38,70,71,72,73,74,75,76,78,79,80,82,84,86
Date: Tuesday, January 12, 2016 Sheet 81 of 89
5 4 3 2 1
5 4 3 2 1
LDOLN_OUT VDDA_1V8_PLL
D D
PS_EVM_3V3 0.01 R214
C114
0.1uF
INA226AIDGSR U51
6
VS 10
PM_I2C_SCL 5 VIN+
79,80,81,84 PM_I2C_SCL SCL
PM_I2C_SDA 4
79,80,81,84 PM_I2C_SDA SDA
3 9
2 ALERT/NC.3 VIN-
1 A0
A1
7 8
GND VBUS
100-0011 (0x43)
C C
LDO3_OUT VDDA_1V8_PHY
PS_EVM_3V3
0.01 R477
C320 U97
0.1uF 6
VS 10
PM_I2C_SCL 5 VIN+
PM_I2C_SDA 4 SCL
SDA
3 9
2 ALERT/NC.3 VIN-
1 A0
A1
7 8
LDO3_OUT GND VBUS
B INA226AIDGSR B
VDDA_1V8_PHY
VDDA_1V8_PLL
LDOLN_OUT
5 4 3 2 1
5 4 3 2 1
D D
LDO9_OUT VDD_RTC
R606 0.01
LDO2_OUT
VDDSHV5
C C
0.01 R607
VRTC_OUT
VDDA_RTC
VRTC_OUT
0.01 R227
VRTC_OUT 70,71
VDDA_RTC
VDDA_RTC 40
B B
VDDSHV5
VDDSHV5 6,40,86
VDD_RTC
VDD_RTC 40,86
LDO2_OUT
LDO2_OUT LDO2_OUT 71
Revision:
Size: B DWG NO 516582-0001 A
5 4 3 2 1
5 4 3 2 1
ER48
D D
LDOUSB_OUT VUSB_3V3 EVM_3V3_SW VDDSHV
R180
0.01 R219
10mOHM
PS_EVM_3V3 PS_EVM_3V3
C INA226AIDGSR INA226AIDGSR C
VDAC_3V3
EVM_3V3_SW E8
NFM21PC474R1C3D
0.01 R226 1 3 VDAC_3V3 VDAC_3V3 62,70
2
VDD_CDCM9102
E7
NFM21PC474R1C3D
1 3 VDD_CDCM9102 VDD_CDCM9102 36
B B
PS_EVM_3V3 BCK2_3V3
0 R275
BCK2_3V3
BCK2_3V3 BCK2_3V3 40
VUSB_3V3
A VDDSHV TEXAS INSTRUMENTS INCORPORATED A
VUSB_3V3 VUSB_3V3 19
VDDSHV
VDDSHV 42
Title: VAYU EVM
LDOUSB_OUT
EVM_3V3_SW Page Contents: POWER ROUTER 3V3
PS_EVM_3V3
LDOUSB_OUT LDOUSB_OUT 71 Revision:
PS_EVM_3V3 PS_EVM_3V3 38,70,71,72,73,74,75,76,78,79,80,81,82,86 EVM_3V3_SW 75,77,85 Size: B DWG NO 516582-0001 H
5 4 3 2 1
5 4 3 2 1
10mOHM
LDO1_OUT
MMC1_3V3
D D
0.01 R608
VDDSHV8
0.01 R228
PS_EVM_5V0
EVM_5V0
C C
PWR_CBT
PWR_CBT 31
B B
EVM_5V0
EVM_5V0 6,32,33,35,38,56,61,68
PS_EVM_5V0
PS_EVM_5V0 LDO1_OUT
PS_EVM_5V0 15,71,74,75,80
LDO1_OUT LDO1_OUT 71
MMC1_3V3
EVM_3V3_SW
MMC1_3V3 15
EVM_3V3_SW 75,77,84 VDDSHV8
Revision:
Size: B DWG NO 516582-0001 H
5 4 3 2 1
5 4 3 2 1
PS_EVM_3V3 PS_EVM_3V3
VDD_MPU C441
R596
U102 0.1uF 10K
R554 0 5 6
SENSE1 VDD
D PS_EVM_3V3 R555 4 1 D
CT RESET CPU_POR_RESETn 40
NO-P0P
C421 3 2
MR GND
R583 220pF TPS3808G09DBVRG4
10K
REV D1
SW4
1 3
2 4
PB_SW ER27
PS_EVM_3V3 PS_EVM_3V3
74 PGD_3V3_5V0 R821 0
C499
ER27 U107
R623
0.1uF 10K
PS_EVM_3V3 5 6
REV D1 SENSE1 VDD PS_EVM_3V3
4
CT RESET
1 CPU_RESETn 40
ER14
R616 C476 3 2
C MR GND C
10K
220pF TPS3808G09DBVRG4 C533
.1uF R825
SW6 10K
1 3
2 4
R631 U141
PB_SW
1K 5 6
SENSE1 VDD
PS_EVM_3V3 4 1
CT RESET
SW7 3 2
PS_EVM_3V3 1 3 MR GND
2 4 TPS3808G09DBVR
C330 PB_SW
0.1uF
PS_EVM_3V3 R153
10K U142
U37 1 8
4 POWERHOLD_CLK CLK VCC
R151 0 5 6 2 7
SENSE1 VDD 3 D PRE 6
4 1 4 QN CLR 5
CT RESET PMIC_RESET_IN 70 GND Q POWERHOLD 70
B R152 3 2 SN74LVC2G74DCT B
10K C329 MR GND R630
NO-POP TPS3808G09DBVR 1K
PS_EVM_3V3
VDD_MPU
VDDSHV5 REV D
5 4 3 2 1
5 4 3 2 1
C706
1 D1 R775
2 SMCJ30A-13-F C707 C50 C49 C45 C47 C52 1K
3
2
1
5
0.22uF 1uF 0.1uF 0.1uF 1uF 4.7uF
PJ-063BH Q5
MTG1
MTG2
CSD18501Q5A
DS5
LED_GRN
C SMCJ14A-13-F C
D2
for pushbutton
4
J4
1
2 ER27
1K SW9
R810 1 3 HEADER 2
2 4 PB_ON 74
TP831 1
ER46 TP_0
TPS43351_GC2 87 PB_SW
1
1
1
EVM_12V J7
1
2 OPTIONAL FAN CONNECTOR
TP823 TP824 TP825 TP826
SMT-TP SMT-TP SMT-TP SMT-TP
PS_EVM_3V3
1
HEADER 2
PS_EVM_3V3 PS_EVM_3V3 38,70,71,72,73,74,75,76,78,79,80,81,82,84,86
1
TP4
TESTPOINT
DISTRIBUTE ON BOARD, ONE GND TESTPOINT BY MLB CONNECTOR
EVM_12V TP62
TESTPOINT
A EVM_12V EVM_12V 16,38,68,74 TEXAS INSTRUMENTS INCORPORATED A
TP63
TESTPOINT
VIN_CONN Title: VAYU EVM
TP3
VIN_CONN VIN_CONN 74 TESTPOINT Page Contents: POWER INPUT
Revision:
Size: B DWG NO 516582-0001 H
5 4 3 2 1
5 4 3 2 1
SMPS_4_5 SMPS_4_5 72
Vdiff, P 25 26 1V35_DDR
1V35_DDR 77,78
Vdiff, P
B B
Vdiff, N 27 28 Vdiff, N VDD_DSPEVE VDD_DDR
VDD_DSPEVE
VDD_DSPEVE 46,72
29 30 VDD_DDR
VDD_DDR 49,50,51,53,54,55
Vdiff, P Vdiff, P
SMPS_6 VDDSHV
Vdiff, N 31 32 Vdiff, N
VDD_DDR 1V35_DDR SMPS_6 VDDSHV
SMPS_6 73 VDDSHV 42
33 34
Vdiff, P GPIO VDD_GPU EVM_3V3_SW
R690
Vdiff, N 35 36
CPU_VDD_DDR_IN 1V35_DDR GPIO VDD_GPU
VDD_GPU 46,73 EVM_3V3_SW 75,77,85
37 38 SMPS_7
Vdiff, P GND
R669 SMPS_7 SMPS_7 73
Vdiff, N 39 40 GND
43 44 CORE_VDD
Revision:
Size: B DWG NO 516582-0001 H
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A A
Revision:
Size: E DWG NO 516582-0001 G4
5 4 3 2 1
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