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US 201803298558 UT cu») United States 2) Patent Application Publication co) Pub. No.: US 2018/0329855 Al Das Sharma (43) Pub. Date: Nov. 15, 2018 oy NEGOTIATION IN (52) US. C1 INTERCONNECT cre GOOF 13/4265 (2013.01); GO6N 5022 (201301); Go6F 1320 2013.01): Host 6924 Santa Clara, CA (201301) oy (72) Inventor: Debendra Das Sharma, Saratoga, CA ws (21) Appl. Now 187721,487 on ABSTRACT A port of computing device is to communicate with (22) Filed: Sep. 29, 2017 Another deviee over a lnk, the port including physical layer loge ofa frst peotoco, link layer logic of eaeh ofa plurality of different protocols, and protocol negotiation logic 10 (G0) Provisional application No. 62/508,612, filed on May determine which of the plurality of differeat protocols to 12,2017 ‘apply on the link. The protocol negotiation loge is to send ‘nx receive ordered sels in a configuration state of a link lated U pplication Data Publication Classification training state machine of the first protocol, where the oh me. ‘Siocon ier sf oer ons te tar ivez——gonsor Phun) die prec Th fra noeaion fou. 2906 Gooey Po i drm oe ort a fate ak gee ia Poses 132. Controller wa 8 Hu 116 *s 7 aps Aa 0 /( Cama « °) Sy oy \ it i Wo Device 125 Patent Application Publication Nov. 15,2018 Sheet 1 of 19 US 2018/0329855 Al 19 Processor 106 106 132 ‘Controller 7 131 et 118 me ‘6 [dl |i Graphics Accelerator 130 | 119 a1 7) ‘System memory 122 a "23 125 10 Deviee 126 FIG, 1 Patent Application Publication Nov. 15,2018 Sheet 2 of 19 US 2018/0329855 Al Layered Protocol Stack 200 To Processing Core Packet Header’ Transection Layer 205, Payload 206 Link Layer 210 t ¥ Physical Layer 220 Logical Sub Block 224 rT 223] 211 mo | 212 [aa Electrical Sub-Block 222 | To Extemal Device FIG. 2 Patent Application Publication Nov. 15,2018 Sheet 3 of 19 US 2018/0329855 Al GlobalID 302 Attribute Bits 304 0 es ee c x ~ {oval | Source | Prorty | Reserved | Ordering | No-Snoop gg | 10310 | 32 | am | ate | ae ee FIG. 3 400 FIG. 4 Patent Application Publication Nov. 15, 2018 Sheet 4 of 19 ss Grd pl 88 \ US 2018/0329855 AI 5 se card BG 88 Patent Application Publication Nov. 15,2018 Sheet 5 of 19 US 2018/0329855 Al Lot Cj a rected by Data Link Layer FIG. 6 Patent Application Publication Nov. 15,2018 Sheet 6 of 19 US 2018/0329855 Al Configuration Entry 705 i Exitto _ Configuration. Linkwi . Exit to Deckey J+) Configuration. Linkwith. Start (seabed ) _A Configuration. Linkwidth Accept | i - 0 700 FIG. 7 Patent Application Publication Nov. 15,2018 Sheet 7 of 19 US 2018/0329855 AI De: Symbol No Ordered Set (Format 1) COM Link Number Lane Number N_FTS Data Rate Identifier Training Control Bit O~ Hot Reset Bit 1 - Disable Link Bit 2— Loopback Bit 3 ~ Disable Scrambling Bit 4 ~ Compliance Receive Bits 5:6 ~ Reserved Bit 7 - Alternate Protocol Support: ‘Lb indicates support for alternate protocols; Ob indicates no support 6 10.2 for Standard TS1 @]=|@|s)-Je — Rx preset Hint Tx Preset 10 1 12 13 14 15 FIG. 8A Patent Application Publication Nov. 15,2018 Sheet 8 of 19 US 2018/0329855 AI Data Rate Identifier Training Control Bit 0 - Hot Reset Bit 1 ~Disable Link Bit 2 ~ Loopback Bit 3 ~ Disable Scrambling, Bit 4 Compliance Receive Bits 5:6~ Reserved Bit 7 = ab 10.2 for Standard TS1 EQ Ist: Bit 2:0 ~ Rx preset Hint Bit 6:3 ~Tx Preset Bit 7~Set to 1b Bit 1:0 - Usage 0b: Alternate Protocols 1b, 10b: Reserved 1b: Vendor Defined usage Bit 15:2 ~ Alternate Protocol details if Usage = 00b Else Reserved Vendor ID/Protocol ID : 16 bits Bit 31:0 Proprietary allocation based on “Usage” field in Symbol 7 Bit 710 = Even Parity per Symbol for Symbols 714 FIG, 8B Patent Application Publication Nov. 15,2018 Sheet 9 of 19 US 2 905-2} Begin ink training 910°} Enter training state A i 018/0329855 Al 915 — aan Ne

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