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The circuit shown in tliE fi g. belolY

i
1.

D1

Ai
Di At
R,
Ri

(Ai & K are ideal op-amps)

(a) Logarithmic Multiplier (b) Logarithmic A•.rsrer
(c) Antilog

2. Determine the chonge in collector current, Am due to change in base emitter voltage Vus
from 25°C to 100°C for a Silicon Transistor in Fixed Bias Configuration having ,Q = 100.
(Consider following variation in Silicon transistor parameters with tem
perature- At T= 25°C, VBE = 0.61a V and At T = 1o0•C. Voc = 0.5 V)
V» = 10V

R B* R,=
250 1

(a) 60 pA (b) 30 pA
(fi) is rue (d) 120 pA
/‹ p yiI 2018

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