TESTBENCH

Yogesh Tiwari
Assistant Professor
CSPIT, CHARUSAT
  MANUAL SIMULATION
 FORCE INPUTS
 LARGE INPUT
 CANT VERIFY ALL THE POSSIBILITIES ON INPUT IN ONE
SIMULATION
TestBench  CHANCES OF MANUAL ERROR (Design gets False
Functional Verification Pass)

 TestBench – Code for simulation

  Procedural block that runs or executes only once,
 Procedural block can be of 2 types;
 always procedural block (repeatedly – ex clock)
TestBench  initial procedural block (run only once)

 Not used for synthesis (for only Functional Verification)

TestBench
 1. DUMMY VERILOG MODULE (no Ports)
2. Instantiate the Design (DUT) (Named association)
Steps for
3. Declare Inputs as REG and Outputs as WIRE
Writing 4. STIMULUS Generation
TESTBENCH 5. Monitor Output
TestBench
(Example)
  starts with a dollar symbol ($)
1. $display
2. $ monitor
TESTBENCH 3. $ dumpfile
simulator 4. $ dumpvars
directives 5. $ dumpon
6. $ dumpoff
7. $ finish
  similar to the print f command
TESTBENCH
 display directive dollar display within bracket within
simulator double quotes you first specify the format string, then
you specify the variables or the expressions that you
directives want to print or display

$display  $display (“%b %b”,sum,carry);

 whenever these executed used to print the immediate
values
TESTBENCH  monitor directive dollar display within bracket within
simulator double quotes you first specify the format string, then
you specify the variables or the expressions that you
directives want to print or display

 $monitor (“%d %b %b”,$time,sum,carry);

$monitor
 monitor will not print the values, immediately, it will
print the values whenever the value of at least one of
the variables change
TESTBENCH
simulator  So, here you are actually specifying that where to dump
the values of all the variables which you can view later.
directives
 extension .VCD
 file contains information about all changes that take
$dumpfile place in the variables that you have specified

 $dumpfile (dlatch.vcd,d_latch);
TESTBENCH
simulator
 $dumpvars (0,module name);
directives
 $dumpvars(1, a,b,c,sum,carry)
$dumpvars
TESTBENCH
simulator
directives
 #50 $ dumpoff;
$dumpoff
TESTBENCH
simulator
directives
 #75 $ dumpon;
$dumpon
TESTBENCH
simulator
directives  #100 $ finish;
 whenever the current simulation time which is held in
the variable dollar time this equals to 100 or is
$finish exceeding 100 or it is greater then stopped simulation
TESTBENCH
D LATCH
TESTBENCH
D LATCH