UNIT - 3 Data Acquisition ‘Syllabus jeroduction to Signal Communication & Types-Synchr S ronous, Asynchronous, Serial, Parallel: Bit width, Sampling sma le and hold circuit, Sampling frequency: Interfacing of Sensors / Actuators to Data Acquisition spatem: 4 bit Successive Approximation type ADC: 4 bit R-2R type DAC. Curremt and Voltage Amplifier Contents 6.1 Introduction to Signal Communication. 62 Introduction to Data Transmission . . 6.3 Types of Data Transmission £4 Comparison between Serial and Parallel Transmission . 6.5 Comparison between Asynchronous and Synchronous . . 6.6 it Width... 6.7 Concept of Sampting . 6.8 Sample and Hold Circuits . 6.9 Sampling Frequency - 6.10 Data Acquisition System. . . 6.11 Interfacing of Sensor/ Actuators to DAQ System 6.12 Digital Signals 6.13 Analag-to-digital Conversion. 6.14 Digital-to-analog Conversion... .. .- 6.15 Analog to Digital Converter (ADC)... ---- 6.16 «bit Successive Approximation Type ADC . 6.17 Digital to Analog Converters (DAC). 6.18 &-bit R-2R Ladder Type DAC 6.19 Voltage and Current Amplifier. - 6.20 University Questions with Answers. .-- Scanned with CamScanneri 1m L1 introduction to Signal Communi ion +The word Signal” 6 derived from the Latin, word ain pre-arranged ged system or code in cases sshere “direct_verbal or written statement is either Kessary, undesirable, or impractical ication is the method or means of cpa "¢ from one person or * The means of co communication is the medium by which @ message is conveyed from one person or place to agency gf communicat embraces the facility which personnel and equipment necessary to Provide signal communication by any particular means or combination thereof 6.2 | Introduction to Data Transmission + When we enter data into the computer via keyboard, each keyed element is encoded by the electronics within the keyboard into an equivalent binary coded pattern, using one of the standard coding schemes that are used for the interchange of information. «To represent all characters of the keyboard, @ unique pattern of 7 or 8 bits in size is used. «= The use of 7 bits means that 128 different elements can be represented, while 8 bits can represent 256 elements +A similar procedure is followed at the receiver that decodes every received binary pattern into the corresponding character. «The most widely used codes that have been adopted for this function, arg the Extended Binary Coded Decimal, Bera the American Standard Code for Information Interchange |codes (ASCI). « Both coding schemes cater to all the normal alphabetic, numeric, and punctuation characters, collectively referred to as printable characters and a range of additional control_chat known as non-printable characters. + Definition © refers to the movement ital devices Data Transmission : Data transmission tof data in form of bits between two or more d ¥ wrions™- An wo tot takes place via media ( transmission Mm optics ete) Types of Data Transmission Come) Paral Serial ah Synchronous Rerena| Fig. 63.1 6.3.1 | Parallel Transmission ‘Definition : Within a computing or communicstig device, the distances between different subunits are i short. Thus, it is normal practice to transfer dig between subunits using a separate wire to carry xs bit of data. There are multiple wires connecting eas sub-unit and data is exchanged using a parle ra mode. This mode of operation results in minima delays in transferring each word, = In parallel transmission, all the bits of data oe transmitted simultaneously on separate communi lines, ‘In order to transmit m bits, wires or lines are wel ‘Thus each bit has its own line. “+ All n bits of one group are transmitted with each cot pulse from one device to another ie. multiple bis * sent with each clock pulse. ‘Parallel transmission is used for communication. +/As shown in the Fig. 632, eight separate wits ‘used to transmit § bit data from sender to receiv®" Fig. 6.3.2 Parallel transmission css man poTOCo" df Scanned with CamScanner> yori 6 -tnterne le inc * whe formation swat nak Appi ton of Synchronous wansmiaion on aNsMission iy yan * Synchronous transmission is used for high speed anode’ ety ‘communication between computer — ] Transmissi | 32] Synchronous ission 6332 Wana | £4 } Comparison between Serial and Parallel saytoron tnamiosion doe ot ute sa and sap | Lenin tis “ln ombined into longer fares thal may contain multiple bytes, es Number of ne bit n bits bits shar 610 BAP Between the various bytes in the day [ite sommes aia 8 me o | RS sec sin he absence of start & stop bits, bit synchronization é is etublished between sender & receiver by." e the transmission of each bit = «since the various bytes are placed on the link without any ga, it the responsibilty of receiver to separate the bit stream into bytes so as to reconstruct the conginal information, «tn order to receive the data error free, the receiver and sender operates at the same clock frequency. Advantage of Synchronous transmis |. This method is faster as compared to asynchronous as there are no extra bits (start bit & stop bit) and also there is no gap between the individual data 6.5 | Comparison between Asynchronous and tytn: ‘Synchronous Disadvantages of Synchronous transmission 1. is costly as compared to asynchronous method. It requires local buffer storage at the two ends of line to assemble blocks and it also requires accurately synchronized clocks at both ends. This lead to increase in the cost. 2 The sender and receiver have to operate at the same clock frequency. This requires proper synchronization which makes the _ system ‘complicated. Direction of flow Fig, 6.3.6 Synchronous Transmission PHOTOCOPY PF resucas pun scarions™ Anup at inoeton =" or Scanned with CamScanneron oy aa E 0 wer Wanamiaaic Simple and cheap [ee] Bit Width ignal is converted to digital, it is "y which represents the signal value in a nd in the digit hn form by a series of bi * Definition : The number of binary digits or bits in each word is known as the bit width * As in the case with al | numbers, the more bits, the more precisely the binary numbers can represent the signal 7 * So, the bit width determines the noise floor for the digital signal + In computing, the Least Significant Bit (LSB) is the bit Position in a binary integer giving the unit value; that ls determining whether the number is even or odd. + In computing, the Most Significant Bit (MSB) is the bit position in a binary number having the greatest value. Concept of Sampling 6.7.4 | Sampling + The data is acquired by an ADC using a process called sampling, To = Sampling a analog signal involves taking a sample of the signal at discrete times. athe rate at which the signal Is sampteg , sampling frequency. «The process of sampling generates value fal as shown in Big. 67.1 tim the sampling frequency determines the guy I that is converted og. signal Higher frequency achieves better conversion of yy, signals. . 6.7.2 | Nyquist Rate + Nyquist Rate: The minimum sampling jeg, required to represent the signal should at leas, jy , the maximum frequency of the analog signal under, (this is called the Nyquist rate). ~ «In the Fig. 672 an example of sampling is shown, 6.7.3 | Aliasing + Aliasing + If the sampling frequency is equal or jg than twice the frequency of the input signal, a spa: of lower frequency is generated from such a proces (this is called aliasing) 6.7.4 | Sampling Theorem smpling Theorem : Sampling theorem states that if te highest frequency content in the input signal is {, #, then input signal can be recovered without = distortion if the sampling rate is at least 2f, sample per second. This sampling rate is known as Ny rate, Refer Fig. 67.2 on next page. Scanned with CamScannerON Data Acquistion | Want wR tom pst," AOUNay sare bs Fla 072 ettecte of sa [3] samo and Hold Circuits Most of the control systems have Controlled processes whi inherently contain analog devices like ac and to analog form, While generating analog. signal, al peprene _pmrernied, daring. sampling: operation tut be removed. Hence ja general, sample and hold devices are used. So data reconstruct fe ULAR soy hy fey fin th ontimous data signal fy,120 is to be reconstructed ftom the information contained in the signal. This process of high frequency reconstruction is called as ‘xtrpolation, In extrapolation process continuous data “tal is to be constructed based on information mp 8nd sliasog due to undersampling Waveform as seen fom labview 4 ‘du0 to undersampling ) available from past sampling instants. For this in Practice Hold circuits are used. *'The function of the hold circuit is to reconstruct the analog signal, by filling in the spaces between the sampling periods and this rou original signal. The hold ci ©ttrapolate output between according to prescribed manner. sampling. * Fig: 68.1 (&) shows the schematic of a sample-and-hold Circuit, which consists of an analog and a voltage follower amplifier. *To take a sample, switch, a capacitor, the analog switch is closed for a Period of time long enough forthe capacitor to charge ‘upto Vin; then the switch is opened, Fig. 6.8.4 (a) Sample and hold circuit Vt aaa ivmaw meme @LESS THAN PHOTOCOPY PRICE Scanned with CamScannerMechatronics Fig : ds Signal voltage is trapped on the capacitor ‘cause(theoretically) it can't discharge through either the op-amp or analog switch. * The voltage can be read anytime via the output of the voltage follower 6.8.1 | Zero Order Hold (ZOH) * The simple way to reconstruct is to use the Zero Order Hold Circuit ie. ZOH * This uses the fact that by use of this the preceded value hold till next sampling instant + This means slope of the output between the sampling instants is zero. ‘* Fig. 6.8.2 shows sampler with ZOH. —— Continous signal ‘Sampled signal Rough estimation of orginal signal Fig. 6.8.2 Sampler with ZOH + ZOH holds input signal for a period of T. «For a short duration input pulse it produces output pulse of duration T. « The operation of ZOH will be clear by considering a general waveform of f(t). This is shown in the Fig 683 + Output of ZOH is a staicase type waveform. This is very simple to realise in practice and hence very commonly used in practical circuits [2a2] o1ner Hots circuit «= There are more sophisticated hold circuits available but these are very complicated and costly. 1) Fig. 6.8.3 Waveform of ZOH ‘In first order hold circuit, it uses the information « the previous sample and present sample to predict te next sample value. + Its output is shown as below. Output of 1 ‘order hold Scanned with CamScannera My yt Mk) 14h) Tey “lek fie - = ne ma {1 NG. 6.8.5 er Fel 4 COMPION eteultry ang hence | ths iy Jone 1 called sample and hold aa yl ot IN construction, | she ee r els 0 Higher cat true amplifier yews ZOM W Henerally Preferred ov hold circu * M6: 6.86 shows sample and hold circuit {{a3] tant Function of zon | previous value of aamy noi reals van Ta tnwant: $0 fF Unit impuiye “B) elucor 4 Hep OF UNL Magnitude fop ee “g UAH) = 1 a hn = Ut)=Ut a al Is Sample and hold vollage uuu) = Fig. 6.86 Samptng Frequency WUT) = f fners*ar * Definition : Sampling rate or sampling frequency f defines the number of samples per second (or per . UT) = Loree other unit) taken from a continuous signal to make a ; 7 discrete or digital signal, Dine * For time-domain signals like the waveforms for sound tte, “sT" -sr (and other audio-visual content ty ») frequencies are Ty} et nl e af pes), frequi tas foo]vew ales] ra ere nore cs +A sampling rate of 2000 1 spongy Ma) = LAG cary 9 as 2000 Herts frequency. Data Acquisition Systom 6.10.1 Introduction Semple Introduction + In order to control any process, the process controller ‘must have information about What is occuring to "2k Poem the mesgured vaste to cured. hah some response occurs, om © have true outpat. i iiieesh pecs ttn Gham (45) calicn ed aapiae Input signal during conversion, that information. ‘See @ LESS THAN PHOTOCOPY price Scanned with CamScannerMecham ‘ + ty simple words DAS can be analog or cligital meter oF exunter Data Acquisition + Data acquisition includes the following 1 Acquiring raw data from the process being 2 Converting it into usable units 3 Putting it into a form that can be displayed. 6.10.21] Raw Data Acquistion and Conversion ‘= The process data, such as temperature, pressure, flow rate ete which is needed to acquire is analog. in nature + Sometimes digital status of signal is required with the exception of analog meters, recorders and analog oscilloscopes the data is handled digitally A DAC or ADC is required to bring the data in suitable form also conversion and scaling is needed. + Accuracy and precision of A/D converter dependent on sampling interval as well as accuracy of system. ‘Also the step size or number of bits used are ‘important ‘Data collection and acquisition is either time-based or event-driven Time-based system : In time based system all the data is gathered at predetermined times. For simplicity there is usually a single fixed interval when all signals are acquired and recorded. This simplifies the circuitry, costs and analysis of data, Event-based system : Event based system collect data values based on some event other than time. ‘+ The presentation of data can take several forms. Data must be collected in a format which facilitates further analysis, ‘*Only the required data is to be collected. Based on collection frequency and the amount of data, the data is best organized to facilitate the analysis method. If the data are to be analyzed by a person, numerical print out or graphical presentation is most effective. When the data is to be analyzed by computer, then ‘numerical of encoded values are best suited. [102.2] Transformation of Data buaned from 2 process ATE Not in ge Transformation | types of units The parameters of this equation may be dering through a process called ‘calibr ation Data Display ‘Once the data is acquired, there are variety of ways can be handled. | e-the data values can be inspected, stored, sent back ip | process or can be displayed in variety of formats «+ The display representation can include a simple digit | readout, coded values or analog representation. © A common analog representation of data acquisition is the face plate «This is a bar_graph where the height of the bar corresponds to value being measured. ‘© Video displays provide most useful information in continuous form, Elements of Data Acquisition System/ Multichannel DAS: ‘*Data acquisition system consists of components. 1. Transducers 2 Signal conditioning equipment 3. Multiplexer 4. Calibrating equipment 5. Integrating equipment 6. Display/Recording equipment 4. Transducers ‘* Input to DAS is a physical quantity. ‘Transducers convert the physical quantity into 2 electrical signal. ‘This signal acts as the input signal to the DAS. 2, Signal conditioning equipment Celgral wcavitnont Bet ipa transforming the output of transducer to desired magnitude and shape needed by the ne stage of DAS. 6.10.3 following Of eee PumvcaTons”. A010 wre tr tonic (@ LESS THAN PHOTOCOPY PRICE Scanned with CamScannerconditioning circuit integrator, attenuator, nerer iS the Process of sharing a ltl ene) with more than one output plexer accepts multiple analog inputs and 4 alti . sequentially to any one connects output line means of using the common plexing a li sion channel for transmitting more th, quantity an luplsing {8 necessary in measurement systems se he distance between transducer and display device is large «gy sultiplexing cost of transmission channel, and aintenance is reduced, «two types of multiplexing can be used - TDM (Time Division Multiplexing) FDM (Frequency Division Multiplexing) ‘.caibating equipment «all the input circuits are to be calibrated before and after measurement. This is called as recalibration and post calibration respectively. Sinerating equipment sTine integration of quantity is to be done for inderstanding its overall behaviour. Digital tediniques are used normally for integrating Purpose ‘ DisplayRecording equipment *Visul display devices are required for continuous onitoring of the input signals e.g. panel meters, Alphanumeric displays, CROs. * Analog recorders such as - strip chart recorders, XY recorder to used magnetic recorders are record the d * The typic DAS is block diagram of n-channe shown in Fig, 6.10.1 It can be also called as multichannel DAS. (See Fig. 6.10.1 on next page.) , 8.10.4 | Configuration of DAS * + Various significant factors are.to be considered while selecting or configuring a data acquisition system. Some of the important factors that decide the configuration and feature of DAS are as follows 1. Accuracy and resolution 2 Number of (single/multi-channel) channels. to. monitor Sampling rate per channel Signal conditioning for each channel Cost of the sub systems Analog or digital signals Cost 6.10.5 | Single Channel DAS ‘Block diagram of a typical single channel DAS is shown in Fig. 6.10.2. #Transduer : It converts any physical quantity into its equivalent electrical signal ‘Signal conditioner : The output of the transducer is electrical signal, it modifies the output of the transducer as per requirement of subsequent circuits. © AID converter : The output of signal conditioner is analog in form so it is converted into digital form by AID converter. Vos mascara ‘An up tat fr howe Fig, 6.10.2 Single channel DAS @ LESS THAN PHOTOCOPY PRICE dl Scanned with CamScanner‘mputy of Tamaduoar 2 | | 6.10.6 | Multi Channel DAS oral] Analog — ap = fase — aon To dtl — > recordin ‘nd 9 — Di, Fig. 6.10.1 n-channel DAS / Multichannel DAS * A conventional multichannel DAS is shown in Fig. 6.10.3, signal 2 From transducer ‘Analog signal 3 Scanned with CamScannerEZ jividual analog. sign. ‘cs are applied to signal conditioning Jered. Sample and Hold (5/11) is used to store circuit, These signals are then multi the previous data, TNs signal ' then digitized sven conversion is complete the status line from avert causes the S/H to to sample mode and acquites the signal of the next channel tion, ‘e0n completion of acqui upon command, the S/H is switched to hold mode a conversion begins again and the multiplexer switch anakes on to the subsequent channel, Objectives of DAS ‘Following are the objectives of DAS. To acquire necessary data at correct speed and correct time. 2. To use all the received data efficiently 3. To monitor complete plant operation. 4. To collect, summarize and store data for diagnosis and record, 5. To be expandable for future requirements. 6.10.8 | Significance of DAS +Real_time data acquisition at specified sampling alltime boa frequency, + Acquire data in the background while processing in the foreground, + Seamless Streaming of data between peripherals. [6.10.9 | Appiications of DAS ins of DAS are listed here 1 callecting information (average mportant applica 1 DAS is used 2 DAS is used to convert the data into eg, calculation of efficiency of motor speed, torque and power input developed 3. DAS is used for performing repeated calculations 1 separate. signals 4. Ibis used to generate information for display. rol system: 5. DAS find application in aircraft co 6, DAS is used in electrical power generation 7. DAS is used in industrial process sy’ Interfacing of Sensor! Actuators to DAQ Systom # Sensors are devices which respond directly to any physical phenomenon such as force, temperature, heat, light ete # Transducers are devices which convert one form of ‘energy into other form. ‘+ Transducer is physical element and is an essential part 6.11 of sensor. 6.11.1 | Temperature Control Using DAG System + The above block diagram shows the processes that are to be carried out in order to control the temperature. +The temperature sensor first senses the temperature around it and gives out a corresponding voltage, which was amplified by the amplifier Fig. 6.11.1 Block diagram for temperature contro! TeCHWecAL PUBLICATIONS”. AM upto LESS THAN PHOTOCOPY Prick Scanned with CamScanneres, + The ampaes Be AQ. ne OT gem 0 he gut termina ABVIW) ang MME OY DAG sattware marpulaon are ane | MMR ant other are ake so ex SSL m9 as to provide the contral + The cept terminal of the Dy Were able to powerup a Powerup the fan pump moter AQ are given to 3 relays [E32] eat sionats * The output from scot sensors tends to aa, be in analogase SNeane 0 miegevcmyy nme pe i Seessurement of control system the analogue output from the sensor has to be converted into a digital from, Netego AR cant. ienantads.eneani tapatesciin: | microprocesor * Likewise, most actuators operate with analogue inputs and so the digital output from a microprocessor has to be converted into an analogue form before it can be used as an input by the actuator. + The binary system is based on just the two symbols or states 0 and 1 = « These are termed binary digits or bits. + When number is represented by this system, the digit position in the number indicates the weight attached to each digit the weight increasing by a factor of 2 as, wwe proceed from right to left: 2 2 2 2 bits bt2——bit it <———, 1 v = For example. the decimal number 15 is 26+ 26 + 26+ 3g= 1111 in the binary system. «In binary number the bit 0 is termed the least significant bit (LSB) and the highest bit the most significant bit (MSB). «The combination of bits to represent a number is termed a word. ‘e Thus 1111 is a four - bit word. The term byte is used for a group of S Pi ™ 13 ] Analog-to-digital Conversion ‘ Analog-tostigital conversion involves analog signals into binary words ey Fig. 6.13.4 +The procedure used is that a clock supplieg time signal pulses to the andlog-to-digital ca {ADO and every time i receives a pulse tsp analog signal + Fig. 6192 shows this analog-to-digital conversion showing the types of signals involved at the yaye, stages. Analog signal | (a) Analog Clock eg elnleiells|= (b) Clock signal Time (c) Sampled Time (4) Sampled and hold Fig. 6.13.2 (a) Signal + Fig, 6.13.2(a) shows the analogue signal and Fig. 6.13.2 (b) the clock signal which supplies signals at which the sampling occurs. © The result of the sampling is a series of narro™ (Fig. 6.132(a), the tio pe = an up tt for Krome (@ uss THAN PHOTO” ~ _ Scanned with CamScannere ne amp “ry becomes th +h Keg to-digital ONVETTEE requleen 4 4 ‘be " nite amount of wae ermed the conversation times og signal into a digital ong mumethe wy reantionship between the samp _pe relationship led and held inpuy yd a kee an sraloptodigial eavrenen| gusraed bY The STAPH shown in igure Gina ay dag! output WHICH 15 TeStricted to thyy aig with three bits the 8 pow Nutput level since the output of the Thus. P he ADC to Fepresent the Jog input can be only Of these eigh anal eight possible jevels is termed the quantization interval, «thus forthe ADC, the quantization interval ig 1 y secause of the step-like nature of the relationship, the digital output is not always proportional to the analogue input and thus there Will be error, this being termed the quantization error. «When the input is center over the interval the quantization error is zero, the maximum error being equal to one-half of the interval or 4% bit «The word length possible determines the resolution of the element, Le, the smallest change in input which will esult in a change in the digital output +The smallest change in digital output is one bit in the least significant bit position in the word, ie, the far right bit, ‘Thus with a word length of n bits the full-scale analog input VFS is divided into 2* pieces and so the | P ; r 6 Analog output 5 Sy arts, : ‘ a \ Digital input # The inp jerter (DAC) is a Input too digital-to-analog. converter binary the an analogue signal that epresents the weighted sum of the non-zero bit represented by the word. * Thus, for example, an input of 0010 must give an analog output which is twice that given by an input 0001 ‘* Consider the situation where a microprocessor give 8 bit digital-to-a This is fed through log, converter to a control valu +The control valve requi 6.0 V to be fully open IF the fully open state is indicated by 11111111 what Will be the output to the valve for a change of 1 bit? + The full-s output voltage of 6.0 V will be divided into 2° intervals, © A change of 1 bit is thus a change in the output voltage of 6,0/2° = 0.028 V 6.15 | Analog to Digital Converter (ADC) ‘+ An Analog to Digital Converter (ADC or A/D or A to D) is a device that converts a continuous physical quantity to a digital number that represents the quantity’s amplitude. 1 Quantisation 28 48 68 ‘Analog input as fan ofl seal input Fig, 6.14.1 input-output for a DAC "Tecnica: puncicanons™ Ane tation Scanned with CamScannerMaser ea iss Fie 655: mcs schemas of AD COVE am analog signal to dig tee tone ont tes to be dintded oss - oT weervals + This process is knows as "OQ © The ieput to ADC is the analog signal and output is in deptal form 6.15.1 | types of * Various types of ADCs are ‘+ Succrssive approximation is one of the most widely and popularly used ADC technique. ° Fig. 6161 shows the bk a approximation DAC. et ae +A voltage is generated by 2 dock = mics mine Seale mag ome © This voltage rises in steps and is anak analog input voltage from the sensor. + When the dock generated voltage pases the input analog voltage the pulses from the dock are stopped from being counted by a gate being | pes Comparator awe OF " veering te count at tthe Fe sipmiican 4, te tun the arakcy valoe, thee adking fear ts for which the tal does not QS analog valet . For exmple we might start the compar wa 0B ths is too age we try 0100. . a W this is too sanall we then try C110 1 this is too large we try O10 Wah an eit word i only takes m StS t mah ¢ compariee. o Thus f Ge dock has a frequency £ the Sime beng. poles is 1 ~ Scanned with CamScannertake to time rate thy ne Ye word, o te. the eon ne, is nv of SAR ADC eal noi ’ pers be wes is high compare! 10 Counter type ADC tor resolution, speed to power sod ratio of * Canpast design compared to Flash Type and it ig ipexpensive oo) pisadvantages of SAR ADC pas one comparator throughout the entire enversation PFOCESS 4 cost is high becat x compl e of SAR levity in design. ues] ‘Applications of SAR ADC ve SAR ADC will used widely data acquisition scaniques at the sampling rates higher than 10 kz numericals on ADC Sint Detrae he. wllage cation yan He om ie 12-51 AID comet with « 0 to 12 V “Serine the ut lee if he input ve 65 V. ee Fa orresening. aaer, eh vag Me fle dg outpet ales 0 Sol: Given : n= 12, range = 0 to 12 V. tage resolution = af 6$KLE elite Vitgeresoktion of ADC = itage resolution of ADC 22 ye Jamu = 29296 mV ~Ans. ‘Ts the digitization accuracy of the conversion is 214648 mv, ae ee ee ee 6162 For w 4 bit ADC with a Vg = 10 volts, find the ‘Spit equivalent of Viq = 6 volts. Perr tana SOL: For MSB i.e. bit 3 V = Vpg(2= 10/25 “Compare V with Vin ‘Vg, i greater than V, tum MSB on ie. = 1 SUV, is ess than V, turn MSB off ie. = 0 "Ya" 6 volts and V = 5 "88 Va, > V, MB is tuned on ie: * 1 Troeeca, puavcarions”Anun tnat tr woe For MSB 1 i.e, bit 2 * Compare Vj, = 6 V to V 5.75 V ‘+ Since 6 > 5.75 V, MSB is turned on Le = 1 For MSB 2 i.e. bit 1 © Compare Vig, with (Vegs/2+ Veet /8) = 6.25 * Since 6 < 625, MSB 2 is turned off ie. = 0 For MSB 3 ice. bit 0 # Compare Vin with V (Vso /2+ Vret/16) = 5.625 «# Since 6% 5.625, MSB is turned on ie. = 1 Digital equivalent of Vin = 6 V is 1101 + Digital to analog converter is used to convert digital quantity into analog, quantity * DAC converter ‘produces an output current of voltage proportional to digital quantity (binary word) applied to its input. «Today microcomputers are widely used for industrial control « The gutput of the microcomputer is a digital quantity in many applications the digital_output of the microcomputer has to be converted into analog quantity which is used for the control of relay, small ‘motor, actuator ete z « in communication system digital transmission is faster and convenient but the digital signals have to be converted back to analog signals at the receiving terminal. e DAC converters are also used as a part of the circuitry of several ADC converters. «The input to a ADC is an n-bit binary signal available in parallel form (by ,ba-bs ~- bn) @ LESS THAN PHOTOCOPY PRICE Scanned with CamScannerMechatrony iy Orona J to, =) a = Analog opt ise “= Reteronce oon Fig. 6.17.1 Block schematic of DAC + Thi Output can be either voltage or current * Fig. 6.17.1 shows inputs and outputs of DAC Output voltage of DAC is given as Yo Ky Viog (1b) 2-1 #2 ns by 28) where Vi - Reference volage ee fa 0 oF depending on logic level of conepending Input v, fo - The result of multi Signal by the digital input. * Full scale range, Vis is given by - Ves = Ky Veet Mis 2 Vig . mn MSB contribution to V, LSB contribution to V, = ‘The LSB contribution is called as resolution of DAC. 6.17.1 | Basic Elements of DAC Following are the basic elements of a DAC. 1. Reference voltage source (Vier) 2. Binary weight resistors Peas 4. Switches 3. Summing amplifier 6.17.2 | Types of DACs There are two main types of DACs 1. Weighted resistor type DAC 2. R-2K ladder type DAC. 6.17.3 | Specification of DAC 1, Resolution 2. Speed A Tecra PUBLICATIONS Hw tien plying the analog reference 5, Settling time 4. Linearity 5, Reference voltage 4, Resolution + Resslution of a DAC isthe change in cup for a change in the least significant bie gy“ digital input c i. Resolution is specified in "bits ii, Most DACs have a resolution of 8 to 16 bits Vee Resolution = Vise = it Where N = number of bits Example : A DAC with 10 bits has a resolution of «aa, Resolution = Toad Veet 10 Higher resolution (more bits) = smoother output 2. Specification + Also called the conversion rate or sampling rate + Its the rate at which the register value is updated +The rate of conversion of a single digital input to is analog equivalent depends on i. clock speed of input signal ii, settling time of converter ‘+ When the input changes rapidly, the DAC conversion speed must be high. 3. Setting Time ©The time required for the input ‘signal voltage to settle to the expected output voltage (within +/- % of VLSB) *Wdeally, an instantaneous change in analog volugt would occur when a new binary word enters int DAC. Scanned with CamScannerLinearity | Dentro J Din Perfect alignment input Fig ters reduce slew time ipso but usually result in ‘eng 8 vet pe dlerence Between the desined “pe actual_cutput over the values: a suey, 4 DAC should produce 4 linear relationship peweon a digital input and the analog output this 6 rt always the case. ‘Reference Voltage + Aspesfed voltage used to determine how each digital input wll be assigned to each voltage division, type: \ Nonsmultiplier DAC : Vygy is fixed (specified by the manufacturer) analog output and full_range of expected ii Multiplier DAC : Vioy is provided via an external source N 8h +) ee ql f “LI 73 * Full Scale Voltage defined as the output when digital {input is all 1's, Vo Si Yat va et | 6.18 4-bit R-2R Ladder Type DAC +The 4-bit R-2R ladder type DAC is the most popular Dac Tt uses a ladder network containing, combinations of values R and 2R. + Itis easily scalable to any desired number of bits ‘Its uses only two val of resistors which make for ‘easy and accurate fabrication and integration. + Output impedance is equal to R, regardless of the ‘number of bits, simplifying filtering and further an. log signal processing circuit design. Fig, 6.18.1 4 bit R-2R Ladder Type DAC Vronc nmcancnd ap te @ LESS THAN PHOTOCOPY PRICE Scanned with CamScannerMechatronics + Each bit corresponds to LL the connected to the inverting input of the switeh bit is high, the corresponding switch I HIF the bit is low, the corresponding switeh connected to ground and + Requires only two precision resistance value (R 2R) 6.18.1 | Advantages of R-2R Ladder Type DAC two resistor values, L Only Does not need as precision resistors as Binary weighted DACs 3. ¢ eap & Easy to manufacture 4 Fast response time 6.18.2 | Disadvantages of R-2R Ladder Type DAC 1. Slower conversion rate 2. More confusing analysis on DAC. EX6181 For 8 bil DAC with ladder network, find the resolution im volts and resolution in percent if the full sale output voltage is + 5 V. Sol. : Numeric n=8 Va > +5V Migr Resolution in volts = VE = 35 = 0.019 volts % Resolution = + x100=15 100 = 04 % ee Calculate LSB, MSB and full scale output for 8 bit Ex6.182 DAC for the 0 to 10 V range. Sol. : n=8 Vg = 109 isp = Ye =5 volts Vy _10_ 10 3 osp = Vi =10 = 10 299.06 10° volts gn 28 256 x63 A #bit DAC has 4 Vy of 0-10 V. The binary input is 1110. Find the analog output voltage, Sol. : Binary input = 1110 Analog voltage output = 14% ron Data AH ae eG : A 6 bit DAC? ss ee ie binary number applied to, Me D2 os : 40 is the oulf ‘oimnage Waal te out anges 10 1120003 : oven value put voltage if the binary "™ my ny My binary number ta 4, cng 101010, = 410 ne the resolution by dividing the step 2: Determi P tput voltage by 42. original analog OU! 22142 = 0.052 (resolution) step 3: Convert the new binary input number to ity equivalent decimal value 111000, = 56,9 cade inthe xP e0x2 +0%2! + 0x2 step 4 : Multiply the resolution times 56 0052 56 = 2.912 V “Ans of @ DAC with « refer e685 Find the resolution oltage of 30 volts and 4 inputs. Sol + Given data : Reference voltage, Rye = 30 vols ‘Number of inputs, n = 4 Raise 2° = 16 Vee. Resolution of DAC = 2-1 Substract 1 from 16 = 15 Divide 30 volts/15 = 2 volts Resolution = 2 volts ae pelts ee eee Ex6186 A 3 bit DIA converter is set for 0 to 10 V ou! range. Map all of the possible digital input values 10 Me corresponding analog output values. Sol ‘#3 bit D/A converter has 2° possible digital values 7 decimal or 000 to 111 binary). + The voltage resolution is 10/2° = 1.25 V. ow ayashe1k?s0x Petes ||” eth commpendiip laaieeaeesigien eS aa possible digital input values are shown here. vy = 8759 Ans. uss Tan pwOTOCO apt recroncn. ‘PUBLICATIONS Aa up tnt or knowbedge _ Scanned with CamScanner— ata Acquisition Ex6.189 A S.bit DAC has a step size of 5 mV. Determine the full scale output voltage and the percentage resolution yp 10V- the maximum output analog value is only {ev due tothe coarseness ofits resolution. Ifthe bit vution was 10 instead of 3, then the maximum Shoe cuptut vollage would be 9990 V or to eon \yumum output = Range ~ Resolution = 10 ~ 19/2!” Maximum output = 9,990 V Ans. ——— ee pain? For the DAC, if k= 2 V, find Vy? sa: Vout = Kx Binary input Vou = 2 Vx Binary input sane binary input = 1000, = 8) Vow = 2VX8=16V Ans. AIMS A 5.bit DAC produces Vjyy = 0.3 volt fora digital ‘7 f 0002. Find the value of Voy for am input 11111 Sol: The weight of LSB = 0.3 V Tie weight of other bits are : xtxo3 = 48V 12x03 = 24V lx?x03 = 12 12x03 = 06V Ve2x03 = 03 Vou = 48424412406 403-93 V Sol. Step size = 5 mV | The number of step with 5 bits = 2° - 1 = 37 | Full scale output = 5 mV x 31 = 0.155 V | resolution = SHEP Size = Full scale 5mV re = SmV 100 =32% . O155V Tad ad ‘The percentage resolution can also be calculated by using, that while this D/A converter's nominal range is % Resolution = 1 oe alta eH fatal number of steps But the number of bits, n = % resolution = —'—x100 Ba = 32% wwAns, Ex6.1810 An 8 bit DAC produces an output voltage of 2 volts for an input code of 01100100 what will be the value of Voy fr an input code of 10120011 ?. Sal.: The binary 01100100, is equal to decimal 100 Vout = 2 Vout Binary input ~ The binary 10110011 is equal to decimal 179, 257 002 1 sa ‘out > Kx Binary input = 002% 179 = 3.58V Ex61811 A 4 bit DAC has @ reference voltage of 10 V. The binary input is 1011. Find the analog output voltage, Sol: Binary input = 1011 = 1x29 +0x2?+1x2!+1x29= 11 ‘Analog voltage output = 1110/24 oe ‘= 6.875 V owAns. Scanned with CamScannerwre pe! 4 8 converter, the full scale output fs when AN 4 OR are high Le. when input to the DAC is HIL Therefore, Full scale output + v ret ¥0.9375 = 256 x 0.9375 = 24 volts Theref fore, Full scale output = 24 volts 158 = Ye 255 a6 ote that i converting « voliage len into 4 somple byte of 6 bits, determine the putmalent decimal For « DAC Table 6184 ‘Ans. : 8) Convert (010000), to decimal = OxB) +0224) 5 02) + (0427) +(0x2)4 02 (010000). = 16 2 Analog vitage ouput = 16212 ‘Ans. = 3 volts 9) Convert (111110) to decimal + 0x2) + (1424) 6 4x29) + 0x2) 4026 (0029 -2 62x12 ‘Analog output voltage = 2712 - 11605 voty 6.19 | Voltage and Current Amplifier, «An amplifier 1s used to increase the Pita Other 9 * 4 Par, of the waveform such as frequency or yy... signal waveform, without changing «They are one of the most commonly yyy electronics and perform a variety great many electronic systems, ot fanei +The general symbol for an amplifier \, ~~ Fig 6.191 Fig 6.9.4 Amplifier general symipg + Whatever thos atl heme e500. edge 4 amplifier that relate to the properties of thei, 1. Voltage amplifiers, “re | 2. Current amplifiers. 4. Voltage amplifiers ‘+ An amplifier that amplifies given volt voltage output. tis characterized by a high input impedance and in ‘output im, MORE for a large * An electronic citeuit whose function is to ace x Input voltage and produce a magnified, acum replica ofthis voltage as an output voltage *The purpose of a voltage amplifier is to make t amplitude of the output voltage wavelorm gue than that ofthe input voltage waveform (although te amplitude of the output current may be geste « smaller than that of the input current, this change * tess important for the amplifer’s designed purpose " ~ spt q Mo Scanned with CamScannerV,. = Output voltage (mV, = Input voltage Ky = voltage gain gz shows voltage amplifier 1 amplifiers ones tat a8 02 by & current at the input rvver a current to the Output are ve! MPU are called current ool AF gat move oF & CUTENE AMPLE showe in + 93.0) nav’ ps about a curTent controll SOURCE. having, zero “at uvaent MHONEE and infin ite se purpose of curTENE amplifier is to make th sqptude of the Output CUFFENL Waveform greater than fot of the input cUFFENt waveform (although the plitude of the output voltage may be greater of couler than that of the input voltage, this output change is iss inportant for the amplifier's designed purpose) Load Fig. 6.19.4 Current amplifier Fig. Virose meucanou me mon oom 9.3 a) Symbol of an Ideal current amplifier 'b) Symbol of # real current amplifier Where \ ~ \ K Hg, 6.194 shows cure snplifier | Review Questions 1 What Dita Transmission? What ave different typer of Data Trunsinis 2 What are the diferent types of Date Transmission | 3 Explain in deat aout te seria at 1 4 Write « short note om parglel Data Transmission | 5 Diferentinie between serial Data Trunsmiasion and Parallel Data Transmission Explain Trane | 7 Write a Transmission etait about the synchronous Data rt note on Anynehronows Data Diet ite rae an Anycrooe Date Poni | 9. We nar no on Ando Dil Canon. heres | | 11 Explain ne the Data Acysition sytem. | | 2 Explain significance of sampling theorem. 13, How Sample and Hold circuit is uf for Analog to | 14 Explain the detailed. functioning. of Pat Acquisition System with the help of «detailed block diagram | 15, Explain vole of voltage in signal conditioning | 16, Using a suitable cineult diagram explain the working of | 4 wllage amplifier. | 17. Using wale cel gram expan the working of | ‘current amplifier 18, Using a suitable example, discuss how are discrete signal diferent from analog sig USS THAN PHOTOCOPY PRICE, Scanned with CamScanner