1828 IEEE TRANSACTIONS ON COMPONENTS, PACKAGING AND MANUFACTURING TECHNOLOGY, VOL. 4, NO.
11, NOVEMBER 2014
New Wilkinson Power Dividers and Their
Integration Applications to Four-Way
and Filtering Dividers
Pu-Hua Deng, Member, IEEE, and Yu-Ta Chen
Abstract— This paper involved developing two (Type I and
Type II) equal-split Wilkinson power dividers (WPDs). The
Type I divider can use two short uniform-impedance transmission
lines, one resistor, one capacitor, and two quarter-wavelength
(λ/4) transformers in its circuit. Compared with the conventional
equal-split WPD, the proposed Type I divider can relax the
two λ/4 transformers and the output ports layout restrictions of
the conventional WPD. To eliminate the number of impedance
transformers, the proposed Type II divider requires only one
impedance transformer attaining the optimal matching design
and a compact size. A compact four-way equal-split WPD
based on the proposed Type I and Type II dividers was also
developed, facilitating a simple layout, and reducing the circuit
size. Regarding the divider, to obtain favorable selectivity and
isolation performance levels, two Butterworth filter transformers
were integrated in the proposed Type I divider to perform filter
response and power split functions. Finally, a single Butterworth
filter transformer was integrated in the proposed Type II divider
to demonstrate a compact filtering WPD.
Index Terms— Coupled-line, filtering divider, isolation,
selectively, Wilkinson power divider (WPD).
I. I NTRODUCTION
P OWER dividers [1]–[28] are usually used in many
microwave circuits for power splitting. In general, high
isolation and low insertion levels, which can be easily achieved
using conventional Wilkinson power divider (WPD) [1], are
key design indicators in wireless multichannel communication
systems. Several WPDs [2]–[26] have been developed for var-
ious applications; specifically, [2]–[8] discussed size reduction
and harmonic suppression dividers. In [9]–[14], the dividers
were designed for use in multiband systems.
To reduce unwanted parasitic effect of the coupling between
the two quarter-wavelength (λ/4) transformers in conventional
WPDs, [15] proposed a modified structure. The distance
between the two output ports of a conventional microstrip two-
way WPD is usually limited by the resistor size. Therefore,
Manuscript received November 13, 2013; revised May 30, 2014; accepted
August 11, 2014. Date of publication September 3, 2014; date of current
version October 31, 2014. This work was supported by the National Science
Council of Taiwan under Grant NSC-100-2221-E-390-027, Grant NSC-101-
2221-E-390-013, and Grant NSC 102-2221-E-390-003. Recommended for
publication by Associate Editor L.-T. Hwang upon evaluation of reviewers’
comments.
The authors are with the Department of Electrical Engineering,
National University of Kaohsiung, Kaohsiung 811, Taiwan (e-mail:
phdeng@nuk.edu.tw; daladodo1985@gmail.com).
Color versions of one or more of the figures in this paper are available
online at http://ieeexplore.ieee.org.
Digital Object Identifier 10.1109/TCPMT.2014.2348571
2156-3950 © 2014 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission.
See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.
when the two output ports are connected by external circuits on
the same side, these circuits may generate unwanted interfer-
ence. A simple potential method for addressing this problem
is adding additional 50- (system impedance) transmission
lines at the divider output ports to increase layout flexibility.
However, interference between the two output ports may
be reduced by adding additional long lines, increasing the
distance between the two external circuits. Thus, a Type I
divider was proposed and compared with the conventional
WPD to address the unwanted coupling between the two λ/4
transformers and unwanted interference between two external
circuits on the same side; each output port of the proposed
Type I divider was increased by a freedom length of λ/4 line
to ensure an appropriate port location, which can overcome
the two issues. To reduce the number of λ/4 transformers
in the proposed Type I divider, a Type II divider was also
developed, comprising a single λ/4 transformer; the design
process involved redesigning relevant Type I divider design
parameters.
N-way (N is a positive integer) power dividers [1] and
[16]–[18] are critical in multichannel applications. In [1], the
divider was difficult to implement in planar form for N  3
because the resistors must connect at the same point. A sim-
ple solution is using several two-way WPDs to achieve an
N-way WPD. For example, [18, Fig. 7.15] shows three
two-way WPDs, which were used to generate a four-way
microstrip WPD. However, when the output ports are on the
same side in the same phase, long additional lines must be
added between the near-input two-way WPD and near-output
two-way WPDs to facilitate an efficient layout; a large circuit
size is caused because of the six required λ/4 transformers and
the long additional lines. Section V details the proposed design
for a simple compact planar four-way divider, integrating
Type I and Type II dividers. Compared with the divider shown
in [18, Fig. 7.15], the proposed four-way divider requires no
additional lines to connect the near-input and near-output two-
way dividers. In addition, the layout size of proposed four-way
divider requires only two λ/4 transformers and some short
lines.
Several studies [19]–[26] have recently focused on filtering
power dividers. In [20], [23], [25], and [26], a coupled-
resonator filter was used to replace each λ/4 transformer in a
conventional WPD to obtain favorable selectivity. The circuit
layouts of dividers integrating coupled-resonator filters can
be typically arranged to facilitate a compact size; however,
DENG AND CHEN: NEW WPDs AND THEIR INTEGRATION APPLICATIONS 1829

Fig. 1. Conventional two-way equal-split WPD.

a precise ideal circuit model cannot be easily predicted.

Fig. 2. Conventional WPD, comprising additional lines to enhance layout
Therefore, dividers in which a coupled-resonator filter is used flexibility of output ports.
to replace the λ/4 transformer may fail to attain the precise
ideal circuit model which rapidly predicts approaching layout
divider performance level and facilitates an efficient design.
Regarding the coupled-line filter [18, Ch. 8], the synthesis
theory has been thoroughly established and the ideal circuit
model can easily approach the circuit layout. In other words,
the divider [22] that used coupled-line filter transformers [21]
could rapidly predicted its layout performance levels by ideal
circuit model of the divider. However, in [22], the isolation was
not efficiently managed leaving passband part. Filtering equal-
split WPDs are typically unable to perform remarkable stop- Fig. 3. Proposed modified WPD.
band isolations demonstrated in [22], [23], and [26]. In [18]
and [25], stopband isolations achieved effective performance
levels. No previous studies have discussed the mechanism
that affects the isolation performance levels of the stopband;
however, this mechanism may have potential applications
in future filtering dividers. To explain the mechanism, this
paper gives three examples (a previous filtering divider [22],
Type I filtering divider, and Type II filtering divider) for
the discussion in Sections VI–VIII. Specifically, a simple
Type I filtering divider design with precise ideal microstrip Fig. 4. Proposed Type I WPD.
model predicting results that attained satisfactory passband
and stopband isolation levels was proposed and discussed
(Section VII). Z 02 and Z 03 , respectively; a resistor (R resistance); a capac-
itor (C capacitance); and port load impedances of Z L1 ,
II. C OMPARING THE C ONVENTIONAL T WO -WAY Z L2 , and Z L3 . To ensure output impedance match of the
E QUAL -S PLIT WPD AND THE P ROPOSED divider (Fig. 3), two λ/4 transformers V2 and V3 were designed
T YPE I D IVIDER at its output ports to complete the proposed Type I divider
(Fig. 4). Specifically, the two transmission lines V2 and V3
Fig. 1 shows a √ conventional two-way equal-split WPD [1]
can comprise short electrical lengths (θ2 and θ3 ) to meet
composed of two 2Z 0 (Z 0 is the system impedance) quarter-
required responses at approximately center frequency. In other
wavelength (λ/4) transmission lines (X 2 and X 3 ), and a resistor
words, the proposed divider (Fig. 4) can be designed using a
(R resistance). In general, the distance between the two output
similar circuit size as conventional divider (Fig. 1), but the
ports (Ports 2 and 3) is determined by the size of the resistor;
two λ/4 transformers (V2 and V3 ) can be placed between the
that is, the two output ports are close when the resistor
output ports and resistor in the proposed design to substan-
size is small. Therefore, assuming that two external circuits
tially increase the layout space and reduce unwanted coupling
demonstrate the same side input ports, the same termination
between the two external circuits, assuming that the two
impedance (Z 0 ), and input ports are required to connect to
external circuits have the same side input ports, which are
the output ports of a conventional divider (Fig. 1), two long
connected to the output ports of the proposed divider (Fig. 4).
additional Z 0 transmission lines (X 2 and X 3 ) may be required
between the external circuit input ports and the divider output
ports (Fig. 2) to increase the layout flexibility and reduce III. D ESIGN OF THE P ROPOSED T YPE I D IVIDER
unwanted coupling between the two external circuits. The proposed equal-split power divider (Fig. 3) can use
A modified WPD (Fig. 3) was proposed, comprising trans- even-mode and odd-mode circuits to simplify analyses. If the
mission lines V2 and V3 with characteristic impedances divider is symmetric, the even-mode and odd-mode upper-half
1830 IEEE TRANSACTIONS ON COMPONENTS, PACKAGING AND MANUFACTURING TECHNOLOGY, VOL. 4, NO. 11, NOVEMBER 2014

Fig. 5. Even- and odd-mode analysis for the proposed modified WPD (Fig. 3).
(a) Even-mode equivalent circuit. (b) Odd-mode equivalent circuit.

circuits are shown in Fig. 5(a) and (b), respectively. To meet

matching requirement during even-mode excitation, Fig. 5(a)
shows that the left-side input impedance Z ineL is equal to the
right-side input impedance Z ineR , where
Z 02 = 2Z L1 (1)
thus, a simple solution can be obtained as follows:
Z L2 = 2Z L1 . (2)
Regarding the odd-mode analysis, the left-side input
impedance Z inoL is equal to the right-side input impedance
Z inoR in Fig. 5(b) when the Port 2 is impedance matched.
Therefore, the equation can be written as follows:
1
Z L2 = (3) Fig. 6. (a) Relation between electrical lengths and capacitances for a
1
j Z 02 tan θ2 + j 2ωC + 2
R Type I divider. (b) Relation between the S-parameter fractional bandwidths
and capacitances of a Type I divider. ( f 0 = 1.5 GHz, Z 0 = 50 , and
where ω is the radian frequency. Separating the real and R = 200 ).
imaginary parts in (3) and using the results of (1) and (2),
two equations can be obtained as follows:
R = 2Z 02 (4)
1
C = . (5)
2Z 02 ω tan θ2
Assuming that Fig. 3 is symmetric, the related parameters can
be described as Z 02 = Z 03 = 2Z L1 , Z L2 = Z L3 = 2Z L1, and
θ2 = θ3 = θ  . If Z L1 = Z 0 (Z 0 is the system impedance), (1),
(2), (4), and (5) can be rewritten as follows:
Z 02 = Z 03 = Z L2 = Z L3 = 2Z 0 (6)
R = 4Z 0 (7)
Fig. 7. (a) Layout and (b) photograph of the proposed Type I divider.
1
C = . (8)
4Z 0 ω tan θ 
Equations (6)–(8) can be used to determine the design para- of S11 , S22 , or S32 related with electrical length θ  (Fig. 4),
meters shown in Fig. 3. If the termination impedance of each wherein f H , f L , f 0 , and Si j represent the −15-dB upper
port equals Z 0 , a λ/4 transformer can be added to each output frequency bound, −15-dB lower frequency bound, center
port (Port 2 or Port 3) to achieve an impedance match and frequency, and S-parameter, respectively.
complete the proposed Type I divider design (Fig. 4). Fig. 6(a) A 1.524-mm-thick substrate, a dielectric constant of 3.55,
shows solutions for a capacitance of C and an electrical and a loss tangent of 0.006 was used to fabricate the proposed
length of θ  ; R and C can be easily attained when θ  > 3°. all circuits. Note that the parasitic effect caused by soldering
In other words, the proposed Type I divider (Fig. 4) requires the parallel 0603 chip resistor and capacitor in all presented
only two additional short transmission lines (V2 and V3 ) dividers cannot be avoided. Based on our experience, a par-
and one capacitor to achieve a similar size compared with asitic capacitance of 0.7 pF which shunts to each parallel
that of conventional WPD (Fig. 1); however, in the proposed 0603 chip resistor and capacitor of each proposed divider
design, the two λ/4 impedance transformers (V2 and V3 ) are needs to be considered and including the parasitic effect in
arranged between the output ports and the resistor, increas- each presented design can easily approach the required perfor-
ing the output layout flexibility when the divider output mance. Fig. 7 shows the layout and photograph of the proposed
ports must connect to external circuits. Fig. 6(b) shows Type I equal-split power divider that uses the same termination
a −15-dB fractional bandwidth, comprising ( f H − f L )/ f 0 , resistor at each port; the ideal circuit design (Fig. 4) parameters
DENG AND CHEN: NEW WPDs AND THEIR INTEGRATION APPLICATIONS 1831

Fig. 9. Proposed Type II WPD.

Fig. 8. Measured and full-wave simulated results of the proposed Type I

divider. (a) S21 and S32 . (b) S11 and S22 .

at 1.5 GHz were Z 02 = Z 03 = 100 , Z T 2 = Z T 3 =

70.7  (characteristic impedances of V2 and V3 ), Z L1 =
Z L2 = Z L3 = 50 , R = 200 , C = 3.3 pF, and
θ  = 9.12°. Fig. 8 shows the full-wave simulated and measured
results of the proposed Type I divider. The measured minimal
insertion loss (−20log|S21| or −20log|S31|) was ∼3.1 dB.
The measured −15-dB bandwidths of |S11 |, |S22 |, and |S32 |
ranged from 0.982 to 2.041 GHz, 1.435 to 1.573 GHz, and
1.426 to 1.566 GHz, respectively. The measured center fre-
quency was ∼1.5 GHz. In Fig. 8, the simulated and measured
results of |S11 |, |S22 |, and |S32 | are not coherent well. For |S11 |,
the maximal difference level is ∼3.1 dB around 1.5 GHz.
However, the reference level is below than −26.69 dB.
Therefore, the magnitude difference of |S11 | between simula-
tion and measurement is small and reasonable. For |S22 |, and
|S32 |, the difference between simulation and measurement may
be mainly caused by soldering location variation of the chip
resistor and capacitor. If application can accept close distance
between two output ports of the divider such as a conventional
divider (Fig. 1), a new modified equal-split WPD with only
one λ/4 transformer is proposed in Section IV.
IV. D ESIGN OF THE P ROPOSED T YPE II D IVIDER
As mentioned in Section III, the impedances (Z 02 and Z 03 )
shown in Fig. 3 were set as 2Z 0 , to generate a simple solution
(Z L2 = Z L3 = 2Z L1 = 2Z 0 ). To achieve an impedance
match, two λ/4 transformers can be added at each output port
(Fig. 3) to generate the proposed Type I divider (Fig. 4). After
redesigning its parameters (Fig. 3), the divider requires only an
additional impedance transformer at its input port to achieve
an impedance match; this new design is the proposed Type II
(Fig. 9). Fig. 3 shows Z 2 and Z 03 reset as Z 0 . The related
Fig. 10. (a) Relation between the electrical lengths and capacitances of a
Type II divider. (b) Relation between the S-parameter fractional bandwidths
and capacitances of a Type II divider. ( f 0 = 1.5 GHz, Z 0 = 50 , and
R = 100 ).
design parameters can be derived using the following:
 1
Z L1 = Z0 (9)
2
Z 02 = Z 03 = Z L2 = Z L3 = Z 0 (10)
R = 2Z 0 (11)
1
C = . (12)
2Z 0 ω tan θ 
Based on (9) and (10), only Port 1 requires an addi-
tional impedance transformer when each port must match
to Z 0 . Fig. 9 shows the proposed Type II divider, which
was designed using one λ/4 impedance transformer T1
near its input port (Fig. 3). Fig. 10 lists capacitance C
values and −15-dB fractional bandwidths of S-parameter
bandwidths versus θ  (Fig. 9). Based on the graph shown
in Fig. 10(a), the design parameters can be easily attained
when θ  > 6°; however, this may cause a tradeoff between
the required S-parameter bandwidths and the length of θ 
1832 IEEE TRANSACTIONS ON COMPONENTS, PACKAGING AND MANUFACTURING TECHNOLOGY, VOL. 4, NO. 11, NOVEMBER 2014
Fig. 11. (a) Layout and (b) photograph of the proposed Type II divider.
Fig. 12. Measured and full-wave simulated results of the proposed Type II
divider. (a) S21 and S32 . (b) S11 and S22 .
(circuit size). Compared with the Type I divider (Fig. 4),
the Type II divider (Fig. 9) eliminates one λ/4 impedance
transformer; that is, the proposed Type II divider can be
designed to facilitate a compact circuit size because λ/4
impedance transformer in the proposed Type I or Type II
divider occupies large circuit area.
Fig. 11 shows the layout of the proposed Type II
equal-split power divider, in which the same termination
resistor is designed at each port and the ideal circuit design
parameters (Fig. 9) for 1.5 GHz are Z T 1 = 35.36 
(characteristic impedance of T1 ), Z 02 = Z 03 = 50 , Z L1
(Port 1 load impedance) = Z L2 = Z L3 = 50 , R = 100 ,
C = 6.8 pF, and θ  = 8.93°. Fig. 12 shows the full-wave
simulated and measured results of the proposed
Type II divider. The measured minimal insertion loss
(−20log|S21| or −20log|S31|) was ∼3.1 dB. The measured
−15-dB bandwidths of |S11 |, |S22 |, and |S32 | ranged from
1.058 to 1.829 GHz, 1.443 to 1.555 GHz, and 1.443 to
1.544 GHz, respectively. The measured center frequency was
∼1.5 GHz. The proposed Type II divider attained similar
results as the conventional WPD (Fig. 1) regarding near
center frequency, but the total circuit was similar to that of
a λ/4 impedance transformer. The proposed Type II divider
Fig. 13. Three conventional two-way WPDs with two additional lines for
four-way power split.
Fig. 14. Proposed four-way WPD.
also ameliorates unwanted coupling between the two λ/4
impedance transformers used in the conventional WPD
(Fig. 1).
V. P ROPOSED C OMPACT F OUR -WAY P OWER D IVIDER
U SING THE P ROPOSED T YPE I AND T YPE II D IVIDERS
A four-way equal-split power divider that has the same side
output ports can be designed by combining three conventional
WPDs (WPD1, WPD2, and WPD3) as shown in Fig. 13
[18, Fig. 7.15]; X 1 and X 2 were used to reduce unwanted
coupling and provide sufficient space between the two dividers
WPD2 and WPD3. Six λ/4 impedance transformers and the
two lines (X 1 and X 2 ) were used, resulting in a large circuit
size. Therefore, a four-way WPD (Fig. 14) was proposed
to obtain a compact size and use the two λ/4 impedance
transformers (X T 1 and X T 2 ) to arrange the distance between
the two cascading dividers (WPDB and WPDC) near the
output ports. Fig. 14 shows that the WPDA and WPDB/WPDC
designs are similar to those of the proposed Type I and Type II
dividers, respectively. The WPDA and WPDB both share
λ/4 impedance transformer X T 1 and the WPDA and WPDC
both share λ/4 impedance transformer X T 2 . The characteristic
impedances of the two transformers (X T 1 and X T 2 ) shown
DENG AND CHEN: NEW WPDs AND THEIR INTEGRATION APPLICATIONS 1833

Fig. 15. (a) Layout and (b) photograph of the proposed four-way divider.

in Fig. 14 can be described as follows:



Z TX1 = Z OL2 Z IL1 (13)

 
Z TX2 = Z OL3 Z IL1 (14) Fig. 16. Measured and full-wave simulated results of the proposed four-way
divider. (a) S21 , S22 , and S32 . (b) S11 and S43 .
where Z OL2 , Z OL3 , Z IL1 , and Z IL1  are input impedances.

Z OL2 = Z OL3 is set as Z L2 for the Type I divider and the
remaining WPDA design parameters can be determined using
(6)–(8). Z IL1 = Z IL1  is set as Z L1 for the Type II divider
and the remaining WPDB or WPDC design parameters can
be determined using (9)–(12).
Fig. 15 shows the layout and photograph of the proposed
compact four-way power divider, in which the same termina-
tion resistor is used at each port; the ideal design parameters
(Fig. 14) for 1.5 GHz are Z 0L2 = Z 0L3 = 100 , Z IL1 =

Z IL1 = 25 , Z TX1  
= Z TX2 = 50 , Z 02 = Z 03 = 100 ,
   
Z 02 = Z 03 = Z 02 = Z 03 = 50 , Z L1 = Z L2 = Z L3 = Fig. 17. Photographic comparison of the four-way dividers in Figs. 13 and 14.
Z L4 = Z L5 = 50 , R1 = 200 , R2 = R3 = 100 ,
C1 = 3.3 pF, C2 = C3 = 4.7 pF, θ2 = θ3 = θ  = 9.12°, dividers (Figs. 13 and 14); both lines X 1 and X 2 in the
and θ2 = θ3 = θ2 = θ3 = θ  = 12.73°. Fig. 16 conventional divider (Fig. 13) were 90° to reduce unwanted
displays the full-wave simulated and measured results of the coupling and enhance layout flexibility between WPD2 and
proposed four-way divider. The measured minimal insertion WPD3. Obviously, the circuit area of the proposed four-way
loss (−20log|S21|, −20log|S31|, −20log|S41|, or −20log|S51|) divider is more compact compared with that of a conventional
bandwidth was ∼6.29 dB. The measured −15-dB bandwidths divider, reducing the size by 75.9%.
of |S11 |, |S22 |, |S32 |, and |S43 | ranged from 1.306 to 1.731 GHz,
1.161 to 1.654 GHz, 1.477 to 1.559 GHz, and 1.284 to VI. D ISCUSSION OF P REVIOUS F ILTERING
1.77 GHz, respectively. The measured center frequency was P OWER D IVIDERS
∼1.5 GHz. The proposed four-way divider (Fig. 14) only
Reference [22] used coupled-line filter transformers, as
occupies a small size, using two λ/4 impedance transformers
suggested by [21], to replace the λ/4 impedance transformers
(X T 1 and X T 2 ) and six short lines (V2 , V3 , V2 , V3 , V2 ,
in a conventional equal-split WPD (Fig. 1). However, in [22],
and V3 ), attaining a total length of 249.16°. Compared with
the isolation (−20log|S32|) between two output ports was
the proposed divider (Fig. 14), the conventional four-way
inefficient when the signal operated out of the passband.
divider (Fig. 13) has six 90° impedance transformers and two
To explain this inefficient isolation, this paper involved using
additional transmission lines (X 1 and X 2 ) to reduce unwanted
the divider developed in [22] with integrating second-order
coupling and provide sufficient space between WPD1 and
coupled-line filter transformers, as shown in Fig. 18. S32 can
WPD2; thus, the proposed four-way divider (Fig. 14) can more
be written as follows:
easily achieve a small circuit size compared with conventional
divider (Fig. 13). Fig. 17 shows a photographic comparison V − 
S32 = 3+ V + =0 (15)
of implementing the proposed and conventional four-way V2 3
1834 IEEE TRANSACTIONS ON COMPONENTS, PACKAGING AND MANUFACTURING TECHNOLOGY, VOL. 4, NO. 11, NOVEMBER 2014
Fig. 18. Previous filtering divider [22], using second-order coupled-line filter
transformers (θ : electrical length of each coupled-line section).
Fig. 19. Approaching equivalent circuit of Fig. 18 when the signal leaves
the operating band.
Fig. 20. Even- and odd-mode analysis of Fig. 19. (a) Even-mode equivalent
circuit. (b) Odd-mode equivalent circuit.
where V2+ and V3+ represent the incident voltage wave at
Ports 2 and 3, respectively, and V3− represents the reflected
voltage wave at Port 3. When the resonators do not operate
around resonant frequency (center frequency) in Fig. 18, the
equivalent circuit from Port 2 and Port 3 looking into Port 1
can approach to that of Fig. 19. The divider (Fig. 18) can be
simplified similarly to that in Fig. 19 because the coupling
between resonator R2 and feed line F2 or between resonator
R2 and feed line F3 approaches zero; that is, the signals do not
pass from output ports (Ports 2 and 3) to the input port (Port 1)
after feed lines F2 and F3 . To obtain the value of S32 leaving
the operating band, the even- and odd-mode methods were
employed. The even- and odd-modes of the circuits shown
in Fig. 19 are displayed in Fig. 20. Therefore, S32 can be
rewritten as follows:
V − + V3o−
S32 = 3e + + (16)
V2e + V2o
+ + − −
where V2e /V2o and V3e /V3o represent
the even-/odd-mode
incident voltage wave at Port 2 and the even-/odd-mode
reflected voltage wave at Port 3, respectively. Because
the even- and odd-mode equivalent circuits (Fig. 20)
Fig. 21. Proposed Type I filtering divider.
− −
are different, |V3e | is unequal to |V3o | in (16); therefore, S32 = 0
In other words, the isolation is not ideal when the signals are
not operated around the passband, potentially explaining why
the leaving operating band displays unsatisfactory isolation
in [22]. To improve the isolation response of the filtering
divider in [22], a new divider that demonstrated favorable
selectivity and isolation was proposed.
VII. I NTEGRATING BANDPASS F ILTER AND THE
P ROPOSED T YPE I D IVIDER
In addition to enhancing the layout flexibility of output
ports, a filter can also be integrated into the proposed Type I
divider (Fig. 4) to obtain favorable selectivity and isolation
levels. Fig. 21 shows the proposed Type I filtering power
divider. The divider was designed to use two second-order
Butterworth-type filter transformers (BPF A and BPF B), as
suggested by [21], replacing the two λ/4 impedance trans-
formers of the proposed Type I divider. The related design
equations used for each filter transformer can be written as
follows:

π
Z f J1 = (17a)
2g1
π
Z f J2 = √ (17b)
2 g1 g2

π
Z f J3 = (17c)
2g2 g3
Z 0ei = Z f [1 + Z f Ji + (Z f Ji )2 ]
Z 0oi = Z f [1 − Z f Ji + (Z f Ji )2 ], i = 1, 2, 3 (17d)
where Z f equals the characteristic impedance of the
λ/4 impedance transformer (Z T 2 or Z T 3 ) in the proposed
Type I divider, , Ji , gi , and Z 0ei /Z 0oi are the system
impedance of the filter, 3-dB fractional bandwidth of the
coupled-line filter, value of admittance inverter ( J inverter),
the lumped circuit element value of the low-pass prototype
filter, and the even-mode/odd-mode characteristic impedance,
respectively. The electrical length of each coupled-line section
DENG AND CHEN: NEW WPDs AND THEIR INTEGRATION APPLICATIONS
Fig. 22. (a) Layout and (b) photograph of the proposed Type I filtering
divider.
(θ ) shown in Fig. 21 is ∼90°. The remnant parts of the
divider (Fig. 21) have the same design as the proposed Type I
divider (Fig. 4). Because BPF A or BPF B approaches λ/4
impedance transformer around the operating band, favorable
WPD isolation can be achieved in the passband. In addition,
|S32 | is canceled by BPF A and BPF B when the signal is
leaving the operating band; therefore, a favorable isolation
can also be obtained in the stopband. From another point
of view, the favorable isolation in the stopband can also be
explained by (16). Because even- and odd-mode equivalent
circuits from Port 2 and Port 3 looking into Port 1 are equal
− −
when the signal leaves the passband, |V3e | equals |V3o | but
− −
phase difference of V3e and V3o is 180°, which leads to
S32 = 0 (favorable isolation in the stopband). Therefore,
a two-way equal-split filtering power divider may attain
favorable stopband isolation when its even- and odd-mode
equivalent circuits from Port 2 and Port 3 looking into Port 1
are equal. Compared with [20], which attained unsatisfactory
isolation in the stopband, the proposed filtering WPD (Fig. 21)
simultaneously achieves strong isolation in the operating band
and stopband, additionally requiring only two short transmis-
sion lines and one capacitor.
Fig. 22 shows the layout and photograph of the proposed
Type I filtering WPD, for which the ideal circuit (Fig. 19)
design parameters were Z L1 = Z L2 = Z L3 = 50 ,
Z 02 = Z 03 = 100 , Z f 2 = Z f 3 = Z f = 70.7 ,
R = 200 , C = 3.3 pF, and θ2 = θ3 = θ  = 9.12°.
Each of the filter transformers was designed using
a center frequency of 1.5 GHz and a 3-dB fractional bandwidth
of 5.5%. Because each filter transformer was designed as a
second-order Butterworth-type response, the lumped circuit
element values of the low-pass prototype filter were
1835
Fig. 23. Measured, full-wave simulated, and ideal microstrip-line sim-
ulated results of the proposed Type I filtering divider. (a) S11 and S21 .
(b) S22 and S32 .
g1 = 1.4142, g2 = 1.4142, and g3 = 1. Fig. 23 shows
a comparison of the measured, full-wave simulated, and
ideal microstrip-line simulated results of the proposed Type I
filtering divider. As stated in Section I, the precise ideal
circuit model for the proposed Type I filtering divider involves
coupled-line filter transformers that readily predict full-wave
simulated results. The measured minimal insertion loss, center
frequency, and 3-dB fractional bandwidth of each transmission
path were ∼4.5 dB, 1.5 GHz, and 5%, respectively. The
minimal measured isolation was 22.4 dB near the operating
band. The simulations and measurement of |S32 | were not
correlated well around the center frequency, especially a
comparison between the ideal microstrip-line simulation and
measurement/full-wave simulation, because coupling between
the two filter transformers is not considered in ideal microstrip-
line model. Therefore, the ideal microstrip-line simulation
level of |S32 | has the smallest level. Compared with the
isolation of the integrating second-order filtering divider [22],
the proposed divider (Fig. 22) demonstrates substantial
improvement in the stopband and adequate results in the pass-
band. To reduce the number of filter transformers, a divider
that comprised a single integrating filter was proposed.
VIII. I NTEGRATING BANDPASS F ILTER AND THE
P ROPOSED T YPE II D IVIDER
As mentioned in Section IV, the proposed Type II divider
facilitates impedance matching at an input port (Port 1) by
using one λ/4 impedance transformer. To increase the selec-
tivity of each transmission path, the proposed Type II filtering
divider (Fig. 24) employs a coupled-line filter transformer [21]
to replace the λ/4 impedance transformer shown in Fig. 9.
The filter transformer shown in Fig. 24 was designed as
1836 IEEE TRANSACTIONS ON COMPONENTS, PACKAGING AND MANUFACTURING TECHNOLOGY, VOL. 4, NO. 11, NOVEMBER 2014
Fig. 24. Proposed Type II filtering divider.
Fig. 25. (a) Layout and (b) photograph of the proposed Type II filtering
divider.
a second-order Butterworth-type filter response and its design
parameters were calculated using (17a)–(17d). The remnant
parts of the divider (Fig. 24) have the same design as the
proposed Type II divider (Fig. 9). Because the two lines
V2 and V3 of the proposed filtering divider (Fig. 24) can use
short lengths to meet the required design requirements, the
total circuit size is similar to that of a single second-order
Butterworth-type filter. In other words, using approximately
one filter size can yield two functions of equal-split power
division and second-order filter response for each transmission
path.
Fig. 25 shows the layout and photograph of the pro-
posed Type II filtering WPD, for which the ideal circuit
(Fig. 24) design parameters of 1.5 GHz were Z L1 = Z L2 =
Z L3 = 50 , Z 02 = Z 03 = 50 , Z f 1 = Z f = 35.36 ,
R = 100 , C = 6.8 pF, and θ2 = θ3 = θ  = 8.93°. The
filter transformer was designed using a center frequency of
1.5 GHz and a 3-dB fractional bandwidth of 5.5%. Because the
filter transformer was designed as a second-order Butterworth-
type response, the lumped circuit element values of the
low-pass prototype filter were g1 = 1.4142, g2 = 1.4142,
and g3 = 1. Fig. 26 shows a comparison of the measured,
full-wave simulated, and ideal microstrip-line simulated results
of the proposed Type I filtering divider. The measured minimal
insertion loss, center frequency, and 3-dB fractional bandwidth
Fig. 26. Measured, full-wave simulated, and ideal microstrip-line sim-
ulated results of the proposed Type II filtering divider. (a) S11 and S21 .
(b) S22 and S32 .
of each transmission path were ∼4.4 dB, 1.5 GHz, and 5.7%,
respectively. The maximal measured isolation was 22.4 dB
near the operating band. Compared with the proposed Type I
filtering divider (Fig. 22), the Type II filtering divider (Fig. 25)
demonstrated substantial size improvement, but sacrificed the
isolation performance levels of the stopband. Isolation is not
excellent in the stopband, which has described the similar
concept in Section VI, because the even- and odd-mode
equivalent circuits from Port 2 and Port 3 looking into Port 1
are not equal when the signal leaves the passband. Therefore,
based on the appropriate tradeoff (size or isolation consid-
eration), the proposed Type I or II filtering dividers can be
chosen.
IX. C ONCLUSION
This paper involved examining five proposed WPDs:
a Type I WPD, Type II WPD, mixed Type I-Type II
four-way WPD, Type I filtering WPD, and Type II filter-
ing WPD. The Type I divider can improve unwanted coupling
between the two λ/4 transformers resolving layout problems
between the two external output circuits used in conventional
WPD. Compared with the Type I divider, the Type II divider
eliminates one λ/4 transformer, effectively conserving space.
Based on the Type I and II dividers, a compact four-way
divider was developed to enhance the layout flexibility of
output ports. To improve the selectivity of conventional WPDs,
Type I and II filtering dividers were proposed in Sections VII
and VIII, respectively. The Type I filtering divider attained
favorable isolation in the passband and stopband; the Type II
filtering divider used a single filter transformer to achieve
satisfactory isolation level near the passband and adequate
filter response in each transmission path.
DENG AND CHEN: NEW WPDs AND THEIR INTEGRATION APPLICATIONS
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Pu-Hua Deng (M’10) was born in Kaohsiung,
Taiwan, in 1978. He received the B.S. degree in
electrical engineering from National Sun Yat-sen
University, Kaohsiung, in 2002, and the M.S. and
Ph.D. degrees in communication engineering from
National Taiwan University, Taipei, Taiwan, in 2004
and 2006, respectively.
He joined the faculty of the Department of Elec-
trical Engineering with the National University of
Kaohsiung, Kaohsiung, in 2009, where he is cur-
rently an Associate Professor. His current research
interests include the design and analysis of microwave planar circuits.
Yu-Ta Chen was born in Tainan, Taiwan, in 1985.
He received the B.S. degree in electrical engineering
from I-Shou University, Kaohsiung, Taiwan, in 2008,
and the M.S. degree in electrical engineering from
the National University of Kaohsiung, Kaohsiung, in
2013.
His current research interests include microwave
filters and dividers.