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DISCRETE SEMICONDUCTORS

DATA SHEET

C106D
Thyristors logic level
Product specification July 2001
Philips Semiconductors Product specification

Thyristors logic level C106D

GENERAL DESCRIPTION QUICK REFERENCE DATA


Passivated, sensitive gate thyristor in a SYMBOL PARAMETER MAX. UNIT
plastic envelope, intended for use in general
purpose switching and phase control
applications. This device is intended to be VDRM Repetitive peak off-state 400 V
interfaced directly to microcontrollers, logic VRRM voltages
integrated circuits and other low power gate IT(AV) Average on-state current 2.5 A
trigger circuits. IT(RMS) RMS on-state current 4 A
ITSM Non-repetitive peak on-state 38 A
current

PINNING - SOT32 PIN CONFIGURATION SYMBOL


PIN DESCRIPTION
1 cathode a k
2 anode

3 gate
Top view 1 2 3
MBC077 - 1
g

LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134).
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
1
VDRM, VRRM Repetitive peak off-state - 400 V
voltages
IT(AV) Average on-state current half sine wave; Tmb ≤ 113 ˚C - 2.5 A
IT(RMS) RMS on-state current all conduction angles - 4 A
ITSM Non-repetitive peak half sine wave; Tj = 25 ˚C prior to
on-state current surge
t = 10 ms - 35 A
t = 8.3 ms - 38 A
I2t I2t for fusing t = 10 ms - 6.1 A2s
dIT/dt Repetitive rate of rise of ITM = 10 A; IG = 50 mA; - 50 A/µs
on-state current after dIG/dt = 50 mA/µs
triggering
IGM Peak gate current - 2 A
VGM Peak gate voltage - 5 V
VRGM Peak reverse gate voltage - 5 V
PGM Peak gate power - 5 W
PG(AV) Average gate power over any 20 ms period - 0.5 W
Tstg Storage temperature -40 150 ˚C
Tj Operating junction - 1252 ˚C
temperature

1 Although not recommended, off-state voltages up to 800V may be applied without damage, but the thyristor may
switch to the on-state. The rate of rise of current should not exceed 15 A/µs.
2 Note: Operation above 110˚C may require the use of a gate to cathode resistor of 1kΩ or less.

July 2001 2 Rev 1.000


Philips Semiconductors Product specification

Thyristors logic level C106D

THERMAL RESISTANCES
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
Rth j-mb Thermal resistance - - 2.5 K/W
junction to mounting base
Rth j-a Thermal resistance in free air - - 95 K/W
junction to ambient

STATIC CHARACTERISTICS
Tj = 25 ˚C unless otherwise stated
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
IGT Gate trigger current VD = 12 V; IT = 0.1 A - 15 200 µA
IL Latching current VD = 12 V; IGT = 0.1 A - 0.17 10 mA
IH Holding current VD = 12 V; IGT = 0.1 A - 0.10 6 mA
VT On-state voltage IT = 5 A - 1.23 1.8 V
VGT Gate trigger voltage VD = 12 V; IT = 0.1 A - 0.4 1.5 V
VD = VDRM(max); IT = 0.1 A; Tj = 110 ˚C 0.1 0.2 - V
ID, IR Off-state leakage current VD = VDRM(max); VR = VRRM(max); Tj = 125 ˚C - 0.1 0.5 mA

DYNAMIC CHARACTERISTICS
Tj = 25 ˚C unless otherwise stated
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
dVD/dt Critical rate of rise of VDM = 67% VDRM(max); Tj = 125 ˚C; - 50 - V/µs
off-state voltage exponential waveform; RGK = 100 Ω
tgt Gate controlled turn-on ITM = 10 A; VD = VDRM(max); IG = 5 mA; - 2 - µs
time dIG/dt = 0.2 A/µs
tq Circuit commutated VD = 67% VDRM(max); Tj = 125 ˚C; ITM = 8 A; - 100 - µs
turn-off time VR = 10 V; dITM/dt = 10 A/µs;
dVD/dt = 2 V/µs; RGK = 1 kΩ

July 2001 3 Rev 1.000


Philips Semiconductors Product specification

Thyristors logic level C106D

Ptot / W Tmb(max) / C ITSM / A


6 110
conduction form
40
angle factor
degrees a
5 30 4
112.5 IT I TSM
60 2.8 1.9 a = 1.57
90 2.2 2.2 30 T time
4 120 1.9 115 Tj initial = 25 C max
180 1.57 2.8

3 117.5
4 20

2 120
10
1 122.5

0 125 0
0 0.5 1 1.5 2 2.5 3 1 10 100 1000
IF(AV) / A Number of half cycles at 50Hz

Fig.1. Maximum on-state dissipation, Ptot, versus Fig.4. Maximum permissible non-repetitive peak
average on-state current, IT(AV), where on-state current ITSM, versus number of cycles, for
a = form factor = IT(RMS)/ IT(AV). sinusoidal currents, f = 50 Hz.

1000 ITSM / A 12
IT(RMS) / A

10

8
dIT /dt limit
100 6

IT ITSM 4

T time 2
Tj initial = 25 C max
10 0
10us 100us 1ms 10ms 0.01 0.1 1 10
T/s surge duration / s

Fig.2. Maximum permissible non-repetitive peak Fig.5. Maximum permissible repetitive rms on-state
on-state current ITSM, versus pulse width tp, for current IT(RMS), versus surge duration, for sinusoidal
sinusoidal currents, tp ≤ 10ms. currents, f = 50 Hz; Tmb ≤ 113˚C.

IT(RMS) / A BT148 VGT(Tj)


5 VGT(25 C)
1.6

113 C
4 1.4

1.2
3

1
2
0.8
1
0.6

0 0.4
-50 0 50 100 150 -50 0 50 100 150
Tmb / C Tj / C
Fig.3. Maximum permissible rms current IT(RMS) , Fig.6. Normalised gate trigger voltage
versus mounting base temperature Tmb. VGT(Tj)/ VGT(25˚C), versus junction temperature Tj.

July 2001 4 Rev 1.000


Philips Semiconductors Product specification

Thyristors logic level C106D

IGT(Tj) IT / A
12
IGT(25 C) Tj = 125 C
3
Tj = 25 C
10
2.5 Vo = 1.26 V typ max
Rs = 0.099 ohms
8
2

6
1.5

4
1

0.5 2

0 0
-50 0 50 100 150 0 0.5 1 1.5 2 2.5 3
Tj / C VT / V

Fig.7. Normalised gate trigger current Fig.10. Typical and maximum on-state characteristic.
IGT(Tj)/ IGT(25˚C), versus junction temperature Tj.

IL(Tj) Zth j-mb (K/W)


10
IL(25 C)
3

2.5
1
2

1.5

0.1 P tp
D
1

t
0.5

0.01
0 10us 0.1ms 1ms 10ms 0.1s 1s 10s
-50 0 50 100 150
Tj / C tp / s

Fig.8. Normalised latching current IL(Tj)/ IL(25˚C), Fig.11. Transient thermal impedance Zth j-mb, versus
versus junction temperature Tj. pulse width tp.

IH(Tj) dVD/dt (V/us)


1000
IH(25 C)
3

2.5
RGK = 100 ohms
100
2

1.5

1 10

0.5

0 1
-50 0 50 100 150 0 50 100 150
Tj / C Tj / C

Fig.9. Normalised holding current IH(Tj)/ IH(25˚C), Fig.12. Typical, critical rate of rise of off-state voltage,
versus junction temperature Tj. dVD/dt versus junction temperature Tj.

July 2001 5 Rev 1.000


Philips Semiconductors Product specification

Thyristors logic level C106D

MECHANICAL DATA

Dimensions in mm
Net Mass: 0.8 g

Plastic single-ended leaded (through hole) package; mountable to heatsink, 1 mounting hole; 3 leads SOT32

E A

P1

P D

L1

1 2 3

bp w M c e1

Q e

0 2.5 5 mm

scale

DIMENSIONS (mm are the original dimensions)


L1(1)
UNIT A bp c D E e e1 L Q P P1 w
max
2.7 0.88 0.60 11.1 7.8 16.5 1.5 3.2 3.9
mm 4.58 2.29 2.54 0.254
2.3 0.65 0.45 10.5 7.2 15.3 0.9 3.0 3.6

Note
1. Terminal dimensions within this zone are uncontrolled to allow for flow of plastic and terminal irregularities.

OUTLINE REFERENCES EUROPEAN


ISSUE DATE
VERSION IEC JEDEC EIAJ PROJECTION

SOT32 TO-126 97-03-04

Fig.13. SOT32.

Notes
1. Refer to mounting instructions for SOT32 envelopes.
2. Epoxy meets UL94 V0 at 1/8".

July 2001 6 Rev 1.000


Philips Semiconductors Product specification

Thyristors logic level C106D

DEFINITIONS
DATA SHEET STATUS
DATA SHEET PRODUCT DEFINITIONS
STATUS3 STATUS4
Objective data Development This data sheet contains data from the objective specification for
product development. Philips Semiconductors reserves the right to
change the specification in any manner without notice

Preliminary data Qualification This data sheet contains data from the preliminary specification.
Supplementary data will be published at a later date. Philips
Semiconductors reserves the right to change the specification without
notice, in ordere to improve the design and supply the best possible
product
Product data Production This data sheet contains data from the product specification. Philips
Semiconductors reserves the right to make changes at any time in
order to improve the design, manufacturing and supply. Changes will
be communicated according to the Customer Product/Process
Change Notification (CPCN) procedure SNW-SQ-650A
Limiting values
Limiting values are given in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and
operation of the device at these or at any other conditions above those given in the Characteristics sections of
this specification is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
 Philips Electronics N.V. 2001
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the
copyright owner.
The information presented in this document does not form part of any quotation or contract, it is believed to be
accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any
consequence of its use. Publication thereof does not convey nor imply any license under patent or other
industrial or intellectual property rights.

LIFE SUPPORT APPLICATIONS


These products are not designed for use in life support appliances, devices or systems where malfunction of these
products can be reasonably expected to result in personal injury. Philips customers using or selling these products
for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting
from such improper use or sale.

3 Please consult the most recently issued datasheet before initiating or completing a design.
4 The product status of the device(s) described in this datasheet may have changed since this datasheet was
published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com.

July 2001 7 Rev 1.000


Philips Semiconductors – a worldwide company

Contact information

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© Koninklijke Philips Electronics N.V. 2001 SCA73


All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.

Printed in The Netherlands XXXXXX/700/01/pp8 Date of release: July 2001 Document order number: 9397 750 09036
This datasheet has been download from:

www.datasheetcatalog.com

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