Wistron Bolsena-E - Rev Ab2

5 4 3 2 1
See 'TEXT' in 0MEMO or 1MEMO property in component
Dummy when use '10/100'

Dummy when use 'GIGA'
Bolsena-E(AB2) Block Diagram Project Code: 91.4G401.001
REVISION: 05236-SA
200-PIN DDR SODIMM
Dummy when use 'UMA' CLK GEN
Dummy when use 'DIS'
AMD CPU DDR 333/400
IDT CV1373 DDR x2
D 35W/25W PCB Layer Stackup D
Dummy when use 'SATA' 8,9,10
L1: Signal 1
Dummy when use 'IDE' LEDs 16
4,5,6,7 L2:VCC
RTC BAT. 17
BUTTONs 33 L3: Signal 2
PWR SW L4: Signal 3
HyperTransport
CP2211 tv
PCMCIA 26
ENE 6.4GB/S 16b/8b 16 L5: GND
SLOT CB1410 L6: Signal 4
PCMCIA I/F
Support LVDS
TypeII
1* Slot Cardbus ATI LCD 16
26 Power Block Diag -> Page 40
RS482M
AGTL+ CPU I/F + UMA
25 PCI Express x16 ATI
11,12,13,14 RGB CRT
M52P CRT 15
MS/MS Pro/xD/ 49,50,51,52,53
C
MMC/SD 5 in 1 28
RICOH PCI-Express C
R5C832 x2 VRAM x4
1394 1394 54,55
28 CardReader
CONN 27,28
ATI BlueTooth
SB450 miniUSB
Mini-PCI PCI Bus / 33MHz 23
ACPI 2.0 6xUSB 2.0
USB x 4
802.11a/b/g PCI 24
29 CODEC Line In 3
AZALIA ALC883 MIC In
32
AZALIA
RJ45 TXFM 1000Mb PCI LAN Line Out33
31 31
MODEM RJ11
Realtek OP AMP
MDC Card CONN
RTL8110SBL 31 G1421
23 33
1000/100/10 Int. SPKR33
TXFM 10/100Mb
B
RTL8100C B
31 100/10 30 LPC Bus / 33MHz
LPC I/F
ATA 133 17,18,19,20,21
NS SIO
Thermal
PIDE
SIDE
PC87381 KBC XBUS

& Fan
37 KB3910
DVD/ G792 23 34
SATA HDD
CD-RW
24 24 24
Touch Int.
FIR ISA ROM
Pad KB
TFDU6102 35 35 36
37
A <Variant Name> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
BLOCK DIAGRAM
Size Document Number Rev
A3 SA
Bolsena-E
Date: Thursday, October 13, 2005 Sheet 1 of 58
5 4 3 2 1
5 4 3 2 1
PCI Routing
IDSEL IRQ REQ/GNT
MiniPCI 21 F 0
LAN 23 H 2
D D
7411 22 E (CardBus) 1
7411 17 G (1394) 3
7411 17 E (FlashMedia) 3
C C
B B
Ref. function schematic BOM
-------------------------
U81 cpu socket 62.10055.121 (DON'T CHANGE) (3mm high)
U80 north bridge 71.RS482.M03 71.RS482.M03 (ver A12)
U43 south bridge 71.SB400.B0U 71.SB400.D0U (ver A13)
U32 clock gen. 71.00137.C0W 71.00137.C0W
---
U70 VGA M52 71.0M52P.A0U
U64 VRAM FOR M52
U65 VRAM FOR M52
U69 VRAM FOR M52
U71 VRAM FOR M52
---
U66 BIOS SOCKET 72.39040.G03 62.10002.032 (NO NEED WHEN PD)
A U66 BIOS IC 72.39040.G03 72.39040.H03 (DIP STAGE IN LAB, SMT IN PD) <Variant Name> A
---
U75 GIGA LAN 71.08110.00G 71.08110.A0G
U75 10/100 LAN 71.08110.00G 71.08100.C0G
Wistron Corporation
Title
HISTORY
A3 SA
Bolsena-E
5 4 3 2 1
A B C D E
3D3V_S0
3D3V_S0 3D3V_CLK_VDD 3D3V_CLK_VDDA
1 L13 2 1 L15 2
0R0603-PAD 0R0603-PAD
1
C490 C476 C443 C445 C444 C487 C496
SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SC10U10V5ZY-1GP SCD1U16V2ZY-2GP SC10U10V5ZY-1GP
2
RN53
2 3 SRN33J-5-GP-U SBLINK_CLK# 13
3D3V_CLK_VDDA 1 4 SBLINK_CLK 13
1
1
4 1 4 RN47 SBSRC_CLK# 17 4
C485 C486 C489 C488 3D3V_S0 3D3V_CLK_VDD 2 3 SBSRC_CLK 17
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP U23 SRN33J-5-GP-U
2
2
1 L14 2 3D3VDD48_S0 3 33 SRC_CLK0#
0R0603-PAD VDD_48 SRCC0 SRC_CLK0
39 VDDA SRCT0 34
1
32 25 SRC_CLK3#
C446 VDD_SRC SRCC3 SRC_CLK3
SRCT3 24
SC2D2U16V5ZY-GP 21 23
2
VDD_SRC SRCC4
14 VDD_SRC SRCT4 22
35 VDD_SRC SRCC5 19
SRCT5 18
56 VDD_REF SRCC6 17
51 VDD_PC1 SRCT6 16
1 2 C459 XI_CLK 43 13
SC33P50V2JN-3GP VDD_CPU SRCC7
48 VDD_HTT SRCT7 12
1
2
R223 40
X2 DUMMY-R3 CPUC1
1 XIN CPUT1 41
X-14D318MHZ-18GP 2 44 CPUCLKJ_CY 1 R247 2 15R2J-L1-GP CPUCLK# 6
XOUT CPUC0 CPUCLK_CY R248 2 15R2J-L1-GP
45 1 CPUCLK 6
1
USB_48M CPUT0
4
2
XO_CLK SMBC_CLK USB_48
1 2 C472 7 SCL
RN52
SC33P50V2JN-3GP SMBD_CLK 8 29 ATI_CLK0# 2 3 NBSRC_CLK# 13
SDA SRCC1 ATI_CLK0
SRCT1 30 1 4 NBSRC_CLK 13
1 R218 2 22R2J-2-GP 10 28 ATI_CLK1#
20 CLK48_USB CLKREQ0# SRCC2 ATI_CLK1
11 27 SRN33J-5-GP-U
CLKREQ1# SRCT2
8,20 SMBD_SB 2 3
1 4 RN46
3 8,20 SMBC_SB RN48 SRN33J-5-GP-U FS2 3
9 SEL24/24_48# VSS_SRC 36 1 4 GFX_CLK# 49
2 3 FS1 53 20 2 3 GFX_CLK 49
13 CLK14_NB FS0 REF1 VSS_SRC
20 SB_OSC_CLK 1 4 54 REF0 RESET# 15
RN54 SRN33J-5-GP-U 26 SRN33J-5-GP-U
R242 2 33R2J-2-GP TURBO1
37 CLK14_SIO 1 52 REF2
13 HTREF_CLK CLK_HTT66 47 VSS_CPU 42 Dummy when use UMA
1 2 HTT66 VSS_PCI 49
R241 75R2F-2-GP 50 46 RN58 SRN49D9F-GP
PCI0 VSS_HTT SBLINK_CLK
VSS_SRC 31 2 3
IREF_CLKGEN 37 38 SBLINK_CLK# 1 4
IREF VSSA
1 VSS_48 5
1
6 NC#6 VSS_REF 55
R249 R240 RN38 SRN49D9F-GP
100R2F-L1-GP-U 475R2F-L1-GP SBSRC_CLK# 2 3
IDTCV137PAG-2-GP SBSRC_CLK 1 4
71.00137.C0W
2
2
RN37 SRN49D9F-GP
GFX_CLK# 1 4
GFX_CLK 2 3
Dummy when use UMA
2 2
RN57 SRN49D9F-GP
NBSRC_CLK# 2 3
NBSRC_CLK 1 4
3D3V_CLK_VDD
DY
1 R245 2 FS0
2K2R2J-2-GP
1 2
DUMMY-R2
R246
1 R243 2 DY FS1
2K2R2J-2-GP
1 2
DUMMY-R2
R244
1 <Variant Name> 1
1 R216 2 DY FS2
2K2R2J-2-GP
1 2 Wistron Corporation
DUMMY-R2 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
R217 Taipei Hsien 221, Taiwan, R.O.C.
for ICS
Title
CLKGEN_IDTCV137
A3 SA
Bolsena-E
A B C D E
A B C D E
4 4
HTT for CPU sideA HTT for CPU sideB

Transmit power Receive power
and NB sideA Receive and NB sideA
power Transmit power
1D2V_S0 U62A 1D2V_HT0B_S0
D29 VLDT0_A VLDT0_B AH29 LAYOUT: Place bypass cap on topside of board near
D27 AH27
VLDT0_A VLDT0_B HTT power pins that are not connected directly to
1
1
D25 VLDT0_A VLDT0_B AG28
3 C289 C268 C273 C269 C28 AG26 C267 downstream HTT device, but connected internally to 3
SCD22U16V3ZY-GP SCD22U16V3ZY-GP SCD22U16V3ZY-GP SCD22U16V3ZY-GP VLDT0_A VLDT0_B SC4D7U10V5ZY-3GP
C26 AF29
other HTT power pins.
2
2
VLDT0_A VLDT0_B
B29 VLDT0_A VLDT0_B AE28
B27 VLDT0_A VLDT0_B AF25
NB0CADOUT15 T25 N26 CPUCADOUT15 CPUCADOUT[15..0] 11

11 NB0CADOUT[15..0] NB0CADOUTJ15 L0_CADIN_H15 L0_CADOUT_H15 CPUCADOUTJ15
11 NB0CADOUTJ[15..0] R25 L0_CADIN_L15 L0_CADOUT_L15 N27 CPUCADOUTJ[15..0] 11
NB0CADOUT14 U27 L25 CPUCADOUT14
NB0CADOUTJ14 L0_CADIN_H14 L0_CADOUT_H14 CPUCADOUTJ14
U26 L0_CADIN_L14 L0_CADOUT_L14 M25
Used SideB Power Plane NB0CADOUT13 V25 L26 CPUCADOUT13 Used SideA Power Plane
U25 L0_CADIN_L13 L0_CADOUT_L13 L27
NB0CADOUT12 W27 J25 CPUCADOUT12
W26 L0_CADIN_L12 L0_CADOUT_L12 K25
NB0CADOUT11 AA27 G25 CPUCADOUT11
AA26 L0_CADIN_L11 L0_CADOUT_L11 H25
NB0CADOUT10 AB25 G26 CPUCADOUT10
AA25 L0_CADIN_L10 L0_CADOUT_L10 G27
NB0CADOUT9 AC27 E25 CPUCADOUT9
AC26 L0_CADIN_L9 L0_CADOUT_L9 F25
NB0CADOUT8 AD25 E26 CPUCADOUT8
AC25 L0_CADIN_L8 L0_CADOUT_L8 E27
NB0CADOUT7 T27 N29 CPUCADOUT7
T28 L0_CADIN_L7 L0_CADOUT_L7 P29
NB0CADOUT6 V29 M28 CPUCADOUT6
U29 L0_CADIN_L6 L0_CADOUT_L6 M27
NB0CADOUT5 V27 L29 CPUCADOUT5
V28 L0_CADIN_L5 L0_CADOUT_L5 M29
NB0CADOUT4 Y29 K28 CPUCADOUT4
W29 L0_CADIN_L4 L0_CADOUT_L4 K27
2 NB0CADOUT3 CPUCADOUT3 2
AB29 L0_CADIN_H3 L0_CADOUT_H3 H28
NB0CADOUTJ3 AA29 H27 CPUCADOUTJ3
NB0CADOUT2 L0_CADIN_L3 L0_CADOUT_L3 CPUCADOUT2
AB27 L0_CADIN_H2 L0_CADOUT_H2 G29
NB0CADOUTJ2 AB28 H29 CPUCADOUTJ2
AD29 L0_CADIN_H1 L0_CADOUT_H1 F28
NB0CADOUTJ1 AC29 F27 CPUCADOUTJ1
AD27 L0_CADIN_H0 L0_CADOUT_H0 E29
NB0CADOUTJ0 AD28 F29 CPUCADOUTJ0
L0_CADIN_L0 L0_CADOUT_L0
NB0HTTCLKOUT1 Y25 J26 CPUHTTCLKOUT1 CPUHTTCLKOUT1 11
11 NB0HTTCLKOUT1 NB0HTTCLKOUTJ1 L0_CLKIN_H1 L0_CLKOUT_H1 CPUHTTCLKOUTJ1
11 NB0HTTCLKOUTJ1 W25 L0_CLKIN_L1 L0_CLKOUT_L1 J27 CPUHTTCLKOUTJ1 11
NB0HTTCLKOUT0 Y27 J29 CPUHTTCLKOUT0 CPUHTTCLKOUT0 11
1D2V_HT0B_S0 11 NB0HTTCLKOUT0 NB0HTTCLKOUTJ0 L0_CLKIN_H0 L0_CLKOUT_H0 CPUHTTCLKOUTJ0
11 NB0HTTCLKOUTJ0 Y28 L0_CLKIN_L0 L0_CLKOUT_L0 K29 CPUHTTCLKOUTJ0 11
1 R141 2 49D9R2F-GPCPUHTTCTLIN1 R27 N25
R140 2 49D9R2F-GPCPUHTTCTLINJ1 L0_CTLIN_H1 L0_CTLOUT_H1
1 R26 L0_CTLIN_L1 L0_CTLOUT_L1 P25
NB0HTTCTLOUT T29 P28 CPUHTTCTLOUT0 CPUHTTCTLOUT0 11
11 NB0HTTCTLOUT NB0HTTCTLOUTJ L0_CTLIN_H0 L0_CTLOUT_H0 CPUHTTCTLOUTJ0
11 NB0HTTCTLOUTJ R29 L0_CTLIN_L0 L0_CTLOUT_L0 P27 CPUHTTCTLOUTJ0 11
62.10055.121
ME : 62.10055.121
2nd:62.10055.101
1 <Variant Name> 1
Wistron Corporation
Title
CPU(1/4)_HyperTransport I/F
A3 SA
Bolsena-E
A B C D E
A B C D E
VREF_DDR_MEM
NOTE: Test with passive probes only. 1D25V_S3
2D5V_S3
NOTE: Install to bypass op-amp TPAD30 TP44 U62B
DDRVTT_SENSE AE13 D17

VTT_SENSE VTT_A
4
VTT_A A18 4
1
VREF_DDR_CLAW B17
2D5V_S3 VTT_A C320 C309
AG12 MEMVREF1 VTT_A C17
1
AF16 SCD1U25V3ZY-3GP
SC1000P50V2JN-N1
2
R222 C470 MEMZN VTT_B
1 R169 2 34D8R2F-N1-GP D14 MEMZN VTT_B AG16
100R2F-L1-GP-USCD1U25V3ZY-3GP 1 R163 2 34D8R2F-N1-GP MEMZP C14 AH16
2
VREF_DDR_MEM MEMZP VTT_B

VTT_B AJ17
For REGISTED DIMM Only
2
AG10 MEMRESET#
MEMRESET_L UNBUFFER DIMM NC
AE8 M_CKE#0 M_CKE#0 8,9
1 MEMCKEA
1
AE7 M_CKE#1 M_CKE#1 8,9
9 M_DATA[63..0] MEMCKEB
1
C474 C473 M_DATA63 A16

R229 SCD1U25V3ZY-3GP
SC1000P50V2JN-N1 M_DATA62 MEMDATA63 M_CLK7
B15 D10 M_CLK7 8
2
2
100R2F-L1-GP-U M_DATA61 MEMDATA62 MEMCLK_H7 M_CLK#7
A12 MEMDATA61 MEMCLK_L7 C10 M_CLK#7 8
M_DATA60 B11 E12 M_CLK6 M_CLK6 8
M_DATA59 MEMDATA60 MEMCLK_H6 M_CLK#6
A17 E11 M_CLK#6 8
2
M_DATA58 MEMDATA59 MEMCLK_L6 M_CLK5

A15 MEMDATA58 MEMCLK_H5 AF8 M_CLK5 8
LAYOUT: Locate close to DIMMs.
M_DATA57 C13 AG8 M_CLK#5 M_CLK#5 8
M_DATA56 MEMDATA57 MEMCLK_L5 M_CLK4 2D5V_S3
A11 MEMDATA56 MEMCLK_H4 AF10 M_CLK4 8
M_DATA55 A10 AE10 M_CLK#4 M_CLK#4 8
M_DATA54 MEMDATA55 MEMCLK_L4
B9 V3 RN29
C7 MEMDATA53 MEMCLK_L3 V4 8 1
M_DATA52 A6 K5 M_CLK#0 7 2
NOTE: Remove to bypass op-amp M_DATA51
M_DATA50
C11
A9
MEMDATA52
MEMDATA51
MEMCLK_H2
MEMCLK_L2 K4
R5 M_CLK1
M_CLK1
M_CLK0
6
5
3
4
A5 MEMDATA49 MEMCLK_L1 P5
M_DATA48 B5 P3 M_CLK0 SRN10KJ-6-GP
C5 P4
VREF_DDR_CLAW
3 M_DATA46 MEMDATA47 MEMCLK_L0 3
A4 MEMDATA46
M_DATA45 E2 D8 M_CS#7
M_DATA44 MEMDATA45 MEMCS_L7 M_CS#6
E1 MEMDATA44 MEMCS_L6 C8
M_DATA43 A3 E8 M_CS#5
B3 MEMDATA42 MEMCS_L4 E7
2D5V_S3 M_DATA41 E3 D6 M_CS#3
MEMDATA41 MEMCS_L3 M_CS#3 8,9
M_DATA40 F1 E6 M_CS#2 M_CS#2 8,9
G2 MEMDATA39 MEMCS_L1 C4 M_CS#1 8,9
M_DATA38 G1 E5 M_CS#0 M_CS#0 8,9
M_DATA37 MEMDATA38 MEMCS_L0
L3 MEMDATA37
1
M_DATA36 L1 H5 M_ARAS# M_ARAS# 8,9

R166 C348 M_DATA35 MEMDATA36 MEMRASA_L M_ACAS#
G3 MEMDATA35 MEMCASA_L D4 M_ACAS# 8,9
100R2F-L1-GP-USCD1U25V3ZY-3GP VREF_DDR_CLAW M_DATA34 J2 G5 M_AWE# M_AWE# 8,9
2
M_DATA33 MEMDATA34 MEMWEA_L

L2 MEMDATA33
M_DATA32 M1 K3 M_ABS#1 M_ABS#1 8,9
2
M_DATA31 MEMDATA32 MEMBANKA1 M_ABS#0

W1 MEMDATA31 MEMBANKA0 H3 M_ABS#0 8,9
M_DATA30 W3 MEMDATA30
1
M_DATA29 AC1 E13 RSVD_M_AA15

C338 C349 M_DATA28 MEMDATA29 NC_E13 RSVD_M_AA14
AC3 MEMDATA28 NC_C12 C12 M_AA[13..0] 8,9
1
SCD1U25V3ZY-3GP
SC1000P50V2JN-N1 M_DATA27 W2 E10 M_AA13
2
R162 M_DATA26 MEMDATA27 MEMADDA13 M_AA12

Y1 MEMDATA26 MEMADDA12 AE6
100R2F-L1-GP-U M_DATA25 AC2 AF3 M_AA11 AMD suggested M_AA13
M_DATA24 MEMDATA25 MEMADDA11 M_AA10
AD1 M5
MEMDATA24 MEMADDA10 connect to DIMM pin123
LAYOUT: Locate close to CPU.
M_DATA23 AE1 AE5 M_AA9
2

AE3 MEMDATA22 MEMADDA8 AB5
M_DATA21 AG3 AD3 M_AA7
AJ4 MEMDATA20 MEMADDA6 Y5
M_DATA19 AE2 AB4 M_AA5 M_DQS8
MEMDATA19 MEMADDA5 TP113TPAD30
M_DATA18 AF1 Y3 M_AA4 M_ADM8
2 MEMDATA18 MEMADDA4 TP114TPAD30 2
M_DATA17 AH3 V5 M_AA3
AJ3 MEMDATA16 MEMADDA2 T5
M_DATA15 AJ5 T3 M_AA1
AJ6 MEMDATA14 MEMADDA0 N5
M_DATA13 AJ7
M_DATA12 MEMDATA13 M_BRAS#
AH9 MEMDATA12 MEMRASB_L H4 M_BRAS# 8,9
M_DATA11 AG5 F5 M_BCAS# M_BCAS# 8,9 MEMRESET#
MEMDATA11 MEMCASB_L TP50 TPAD30
Place it near CPU M_DATA10 AH5 F4 M_BWE# M_BWE# 8,9 M_CS#7
MEMDATA10 MEMWEB_L TP53 TPAD30
M_DATA9 AJ9 M_CS#6
MEMDATA9 TP56 TPAD30
M_DATA8 AJ10 L5 M_BBS#1 M_BBS#1 8,9 M_CS#5
MEMDATA8 MEMBANKB1 TP54 TPAD30
M_DATA7 AH11 J5 M_BBS#0 M_BBS#0 8,9 M_CS#4
MEMDATA7 MEMBANKB0 TP55 TPAD30
M_DATA6 AJ11 RSVD_M_AA15
MEMDATA6 TP46 TPAD30
M_DATA5 AH15 E14 RSVD_M_BA15 RSVD_M_AA14
R173 MEMDATA5 NC_E14 TP48 TPAD30
1 2 M_CLK7 M_DATA4 AJ15 D12 RSVD_M_BA14 M_BA[13..0] 8,9 RSVD_M_BA15
121R2F-GP MEMDATA4 NC_D12 TP41 TPAD30
M_CLK#7 M_DATA3 AG11 E9 M_BA13 RSVD_M_BA14
MEMDATA3 MEMADDB13 TP47 TPAD30
M_DATA2 AJ12 AF6 M_BA12
M_DATA1 MEMDATA2 MEMADDB12 M_BA11
AJ14 MEMDATA1 MEMADDB11 AF4 AMD suggested M_BA13
1 R168 2 M_CLK6 M_DATA0 AJ16 M4 M_BA10
121R2F-GP M_CLK#6 MEMDATA0 MEMADDB10
AD5 M_BA9 connect to DIMM pin123
M_ADM8 MEMADDB9 M_BA8
9 M_ADM[7..0] R1 MEMDQS17 MEMADDB8 AC5
M_ADM7 A13 AD4 M_BA7
M_ADM6 MEMDQS16 MEMADDB7 M_BA6
A7 MEMDQS15 MEMADDB6 AA5
1 R172 2 M_CLK5 M_ADM5 C2 AB3 M_BA5
121R2F-GP M_CLK#5 M_ADM4 MEMDQS14 MEMADDB5 M_BA4
H1 Y4
M_ADM3
M_ADM2
AA1
MEMDQS13
MEMDQS12
MEMADDB4
MEMADDB3 W5 M_BA3
M_BA2
NOT SUPPORT ECC CHECK
AG1 MEMDQS11 MEMADDB2 U5
1 R167 2
121R2F-GP
M_CLK4
M_CLK#4
M_ADM1
M_ADM0
AH7
AH13
MEMDQS10 MEMADDB1 T4
M3
M_BA1
M_BA0
AMD suggested remove
M_DQS8 MEMDQS9 MEMADDB0
1 9 M_DQS[7..0] M_DQS7
T1
A14
MEMDQS8
MEMDQS7 MEMCHECK7 N3 CB7 PULL-HI
<Variant Name> resistor. 1
M_DQS6 A8 N1 CB6 TP58 TPAD30

M_DQS5 MEMDQS6 MEMCHECK6 CB5 TP117TPAD30
M_DQS4
D1
J1
MEMDQS5
MEMDQS4
MEMCHECK5
MEMCHECK4
U3
V1 CB4 TP57 TPAD30 Wistron Corporation
M_DQS3 AB1 N2 CB3 TP110TPAD30 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
M_DQS2 MEMDQS3 MEMCHECK3 CB2 TP116TPAD30 Taipei Hsien 221, Taiwan, R.O.C.
AJ2 MEMDQS2 MEMCHECK2 P1
M_DQS1 AJ8 U1 CB1 TP115TPAD30
M_DQS0 MEMDQS1 MEMCHECK1 CB0 TP111TPAD30 Title
AJ13 MEMDQS0 MEMCHECK0 U2
TP112TPAD30
CPU(2/4)_DDR
A3 SA
Bolsena-E
A B C D E
A B C D E
2D5V_CPUA_S0
2D5V_VDDA_S0
1
DY
1
3D3V_S0 R509
Iomax=120mA C767
R1
20KR2F-L-GP
SC22P50V2JN-4GP
Vout = 1.25*(1+ R1/R2)
U57
2
1 5 2D5V_VDDA_VREF
SHDN# SET
2 GND DY
1
2D5V_S0 AMD SUGGEST TO USE 100 ~ 300UH 3 4
IN OUT R129
4 20KR2F-L-GP
R2 4
1
G913CF-GP DY
1 R139 2 C242 C768
2
0R0603-PAD SC1U10V3KX-3GP SC1U10V3KX-3GP
2
DY
1
2D5V_CPUR_S0
C262
SC10U10V5ZY-1GP DY DY
2
2D5V_VDDA_S0 LAYOUT: Route trace 50 mils wide and LAYOUT: Route VDDA trace approx.
500 to 750 mils long between these 50 mils wide (use 2x25 mil traces to
2D5V_CPUA_S0 U62C
caps. exit ball field) and 500 mils long.
1 R136 2 1 R143 2 AH25 A20 THERMTRIP#
0R3J-3-GP 0R0805-PAD VDDA1 THERMTRIP_L
AJ25 VDDA2
1
1
THERMDA A26 THERMDP 22
DY TC8 C286 C288 C287 AF20 A27 THERMDN 22
ST100U4VBM-U SC4D7U10V5ZY-3GP 17 LDT_RST#
SC3300P50V2KX-1GPSCD22U16V3ZY-GP RESET_L THERMDC
AE18 VID[4..0] 41
2
2
1D2V_HT0B_S0 17 SB_CPUPWRGD PWROK VID4
13,17 LDT_STP# AJ27 LDTSTOP_L VID4 AG13
AF14 VID3
L0_REF1 VID3 VID2
1 R133 2 44D2R2F-L1-GP AF27 L0_REF1 VID2 AG14
1 R134 2 44D2R2F-L1-GP L0_REF0 VID1
AMD SUGGEST TO USE 2D5V_CPUA_S0 AE26 L0_REF0 VID1 AF15
AE15 VID0
VID0
1
41 COREFB COREFB A23
C256 C257 COREFB# COREFB_H NC_AG18 TP40 TPAD30
41 COREFB# A24 COREFB_L NC_AG18 AG18
KEMET,NT:5.7, B2 size SC1000P50V2JN-N1 SC1000P50V2JN-N1 CORE_SENSE B23 AH18 NC_AH18 TP39 TPAD30
2
CORE_SENSE NC_AH18 NC_AG17
AG17
ST100U4VBM-1 (80.10716.321) VDDIOFB AE12
NC_AG17
AJ18 NC_AJ18
VDDIOFBJ VDDIOFB_H NC_AJ18
Iripple=1.1A,ESR=70mohm AF12 VDDIOFB_L
AMD suggest voltege VDDIOSENSE
3 SANYO, NT$:6.1
AE11 VDDIO_SENSE LAYOUT: Route FBCLKOUT_H/L 3
from 2D5V_S0 to 2D5V_S3 2 C803 CLKIN
Iripple=1.1A,ESR=70mohm 3 CPUCLK 1 AJ21 CLKIN_H differentially impedance 80
1
SC3900P50V3KX-GP FBCLKOUT
3.5/2.8/2.0
differentially impedance 100 R519
AH21 CLKIN_L
1
169R2F-GP
77.21071.031 2D5V_S3 AJ23 AH19 R520
CLKIN# NC_AJ23 FBCLKOUT_H 80D6R2F-L-GP
3 CPUCLK# 1 2 C796 AH23 AJ19
2
SC3900P50V3KX-GP NC_AJ23 NC_AH23 FBCLKOUT_L
1 R518 2 820R3-GP
1 R514 2 820R3-GP NC_AH23
2
NC_AE24 AE24 FBCLKOUTJ
1D25V_S3 NC_AF24 NC_AE24
AF24 NC_AF24
C16 VTT_A
2D5V_S0 AG15 R155
VTT_B DBREQJ
DBREQ_L AE19 1 2
LDT_RST# R154 1 2 680R3F-GP DBRDY AH17 DUMMY-R3
SB_CPUPWRGD R158 DBRDY NC_D20
1 2 680R3F-GP NC_D20 D20
LDT_STP# R512 1 2 680R3F-GP NC_C15 C15 C21 NC_C21
NC_C15 NC_C21 NC_D18
NC_D18 D18
TMS E20 C19 NC_C19
TCK TMS NC_C19 NC_B19
E17 TCK NC_B19 B19
TRST_L B21
2D5V_S0 TDI TRST_L TDO
A21 TDI TDO A22
1 R159 2 NC_C18 C18

2D5V_S0 680R3F-GP NC_C18
1 R156 2 NC_A19 A19 AF18
680R3F-GP NC_A19 NC_AF18 2D5V_S3
A28 KEY1 Connect to VDDIO for AMD suggest.
8
7
6
5
2 RN21 2
AJ28 KEY0
1
NC_D22 D22
DY C234 DY R120 R119 NC_AE23 AE23 C22
SCD1U25V3ZY-3GP 680R3F-GP 680R3F-GP NC_AF23 NC_AE23 NC_C22
AF23 THERMTRIP#Level shift to SB400
2
SRN680J-GP DY DY NC_AF22 NC_AF23 2D5V_S0

AF22 NC_AF22
NC_AF21 AF21
1
2
3
4
DBREQJ NC_AF21
8
7
6
5
1
DBRDY RN22
TCK C1 R152
TMS NC_C1 680R3F-GP
J3 NC_J3 NC_B13 B13
TDI R3 B7
TRST_L NC_R3 NC_B7 Q7
AA2 C3
2
TDO NC_AA2 NC_C3 THERMTRIP#
DY D3 K1 E C CPU_THERMTRIP# 22
1
2
3
4 NC_D3 NC_K1
SRN680J-GP AG2 R2
NC_AG2 NC_R2
2D5V_S3 1 R164 2 B18 NC_B18 NC_AA3 AA3 MMBT3904-2-GP
680R3F-GP AH1 F3
B
DY NC_AH1 NC_F3
AE21 NC_AE21 NC_C23 C23
C20 NC_C20 NC_AG7 AG7
CHANGE FROM 1KR3 TO 680R2 FOR AMD AG4 AE22 NS3 1 R157 2
NC_AG4 NC_AE22 SB_CPUPWRGD 17
C6 C24 1KR2J-1-GP
Validation Test Points

CHECK LIST AG6
NC_C6 NC_C24
A25
NC_AG6 NC_A25
1
RN23 SRN680J-GP AE9 C9
NC_AE9 NC_C9 C304
1 8 AG9 NC_AG9
NC_AG17 SCD1U16V2ZY-2GP
2 7 LAYOUT: Place close to the CPU.
2
NC_AJ18 3 6
NC_D18 4 5 LDT_RST#
CLKIN TP37 TPAD30
CLKIN# TP35 TPAD30
NC_B19 1 8 CORE_SENSE TP36 TPAD30
1 <Variant Name> 1
NC_C19 2 7 NC_C15 VDDIOFB TP34 TPAD30
NC_D20 3 6 NC_AE23 TP42 TPAD30 VDDIOFBJ TP45 TPAD30
NC_C21 NC_AF23 TP33 TPAD30 VDDIOSENSE TP43 TPAD30
4 5
NC_AF22 TP31 TPAD30 NC_AE24 TP51 TPAD30 Wistron Corporation
RN25 SRN680J-GP NC_AF21 TP32 TPAD30 NC_AF24 TP30 TPAD30 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
TP38 TPAD30 TP29 TPAD30 Taipei Hsien 221, Taiwan, R.O.C.
Title
CPU(3/4)_Control & Debug
A3 SA
Bolsena-E
A B C D E
A B C D E
U62E
N20 VCC_CORE_S0 2D5V_S3
VSS U62D
Y17 VSS VSS L20
K17 VSS VSS J20
H17 VSS VSS AF19 L7 VDD VDDIO E4
F17 VSS VSS AD19 AC15 VDD VDDIO G4
E18 VSS VSS AB19 H18 VDD VDDIO J4
AJ26 VSS VSS Y19 B20 VDD VDDIO L4
AE29 VSS VSS K19 E21 VDD VDDIO N4
AC16 VSS VSS H19 H22 VDD VDDIO U4
AA16 VSS VSS F19 J23 VDD VDDIO W4
J16 VSS VSS D19 H24 VDD VDDIO AA4
G16 VSS VSS AC18 F26 VDD VDDIO AC4
E16 VSS VSS AA18 N7 VDD VDDIO AE4
4 AH14 VSS VSS G18 L9 VDD VDDIO D5 LAYOUT: Place in uPGA socket cavity. 4
AD15 B16 V10 AF5 VCC_CORE_S0
VSS VSS VDD VDDIO
AB15 VSS VSS AD17 G13 VDD VDDIO F6 0.22u x 6 10u x 4
K15 VSS VSS AB17 K14 VDD VDDIO H6
E15 VSS VSS H15 Y14 VDD VDDIO K6
1
D16 VSS VSS F15 AB14 VDD VDDIO M6
AE14 G28 G15 P6 C295 C294 C813 C360 C362 C821 C339 C323 C828 C809
VSS VSS VDD VDDIO
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
SCD22U16V3ZY-GP
SCD22U16V3ZY-GP
SCD22U16V3ZY-GP
SCD22U16V3ZY-GP
SCD22U16V3ZY-GP
SCD22U16V3ZY-GP
AC14 D28 J15 T6
2
VSS VSS VDD VDDIO
AA14 VSS VSS B28 AA15 VDD VDDIO V6
J14 VSS VSS C27 H16 VDD VDDIO Y6
G14 VSS VSS AH26 K16 VDD VDDIO AB6
AF17 VSS VSS AF26 Y16 VDD VDDIO AD6
AD13 VSS VSS AD26 AB16 VDD VDDIO D7
AB13 VSS VSS Y26 G17 VDD VDDIO G7
Y13 VSS VSS T26 J17 VDD VDDIO J7 LAYOUT: Place on backside of processor.
K13 VSS VSS M26 AA17 VDD VDDIO AA7
H13 H26 AC17 AC7 VCC_CORE_S0
VSS VSS VDD VDDIO
F13 VSS VSS D26 AE17 VDD VDDIO AF7
AH12 VSS VSS B26 F18 VDD VDDIO F8
AC12 VSS VSS C25 K18 VDD VDDIO H8
1
AA12 VSS VSS B25 Y18 VDD VDDIO AB8
G12 AJ24 AB18 AD8 C820 C818 C814 C819 C827 C808
VSS VSS VDD VDDIO
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
SCD22U16V3ZY-GP
SCD22U16V3ZY-GP
SCD22U16V3ZY-GP
SCD22U16V3ZY-GP
B12 AG24 AD18 D9
2
VSS VSS VDD VDDIO
AD11 VSS VSS AC24 AG19 VDD VDDIO G9
AB11 VSS VSS AA24 E19 VDD VDDIO AC9
Y11 VSS VSS W24 G19 VDD VDDIO AF9
K11 VSS VSS U24 AC19 VDD VDDIO F10
H11 VSS VSS R24 AA19 VDD VDDIO AD10 DY
3
F11 VSS VSS N24 J19 VDD VDDIO D11 0.22u x 4 10u x 2 3
AH10 VSS VSS J24 F20 VDD VDDIO AF11
AC10 VSS VSS G24 H20 VDD VDDIO F12
W10 E24 K20 AD12 DY DY
VSS VSS VDD VDDIO 2D5V_S3 DY
U10 VSS VSS AG23 M20 VDD VDDIO D13
R10 AD23 P20 AF13 2D5V_S3
VSS VSS VDD VDDIO
N10 VSS VSS AB23 T20 VDD VDDIO F14
L10 VSS VSS Y23 V20 VDD VDDIO AD14
1
J10 VSS VSS V23 Y20 VDD VDDIO F16
1
G10 T23 AB20 AD16 C321 C368 C367 C324 C363 C369
VSS VSS VDD VDDIO
SCD22U16V3ZY-GP
SCD22U16V3ZY-GP
SCD22U16V3ZY-GP
SCD22U16V3ZY-GP
SCD22U16V3ZY-GP
SCD22U16V3ZY-GP
B10 P23 AD20 D15 C351 C350 C359 C395 C361 C398 C396
2
VSS VSS VDD VDDIO
SC10U10V5ZY-1GP
SC4D7U10V5ZY-3GP
SC4D7U10V5ZY-3GP
SC4D7U10V5ZY-3GP
SC4D7U10V5ZY-3GP
SC4D7U10V5ZY-3GP
SC4D7U10V5ZY-3GP
AD9 K23 G21 R4 VCC_CORE_S0
2
VSS VSS VDD VDDIO
Y9 VSS VSS H23 J21 VDD
V9 VSS VSS F23 L21 VDD VDD N28
T9 VSS VSS D23 N21 VDD VDD U28
P9 VSS VSS AJ22 R21 VDD VDD AA28
M9 VSS VSS AH22 U21 VDD VDD AE27 10u x 1 4.7u x 6
K9 VSS VSS AG22 W21 VDD VDD R7
H9 VSS VSS AC22 AA21 VDD VDD U7
F9 AA22 AC21 W7 1D25V_S3 1D25V_S3
VSS VSS VDD VDD
AH8 VSS VSS AG29 F22 VDD VDD K8
AC8 VSS VSS U22 K22 VDD VDD M8
W8 VSS VSS R22 M22 VDD VDD P8
1
U8 VSS VSS N22 P22 VDD VDD T8
R8 L22 T22 V8 C325 C326 C310 C319
VSS VSS VDD VDD
SC4D7U10V5ZY-3GP
SC4D7U10V5ZY-3GP
SCD22U16V3ZY-GP
SCD22U16V3ZY-GP
N8 J22 V22 Y8
2
2
VSS VSS VDD VDD
L8 VSS VSS G22 Y22 VDD VDD J9
J8 VSS VSS E22 AB22 VDD VDD N9
G8 VSS VSS B22 AD22 VDD VDD R9
B8 VSS VSS AG21 E23 VDD VDD U9
2 2
AD7 VSS VSS AD21 G23 VDD VDD W9
AB7 VSS VSS Y21 L23 VDD VDD AA9 0.22u x 2 4.7u x 2
V7 VSS VSS V21 N23 VDD VDD H10
T7 VSS VSS T21 R23 VDD VDD K10
P7 VSS VSS P21 U23 VDD VDD M10
M7 VSS VSS M21 W23 VDD VDD P10
K7 VSS VSS K21 AA23 VDD VDD T10
H7 VSS VSS H21 AC23 VDD VDD Y10
F7 VSS VSS F21 B24 VDD VDD AB10
AH6 VSS VSS D21 D24 VDD VDD G11
AC6 VSS VSS AJ20 F24 VDD VDD J11
AA6 VSS VSS AG20 K24 VDD VDD AA11
U6 VSS VSS AE20 M24 VDD VDD AC11
R6 VSS VSS AC20 P24 VDD VDD H12
N6 VSS VSS AA20 T24 VDD VDD K12
L6 VSS VSS W20 V24 VDD VDD Y12
J6 VSS VSS U20 Y24 VDD VDD AB12
G6 VSS VSS R20 AB24 VDD VDD J13
B6 VSS VSS G20 AD24 VDD VDD AA13
AH4 VSS VSS J18 AH24 VDD VDD AC13
B4 VSS VSS AE16 AE25 VDD VDD H14
AH2 VSS VSS Y15 K26 VDD VDD AB26
AD2 VSS VSS B14 P26 VDD VDD E28
AB2 VSS VSS J12 V26 VDD VDD J28
Y2 VSS VSS AA10
V2 VSS VSS AB9
T2 VSS VSS AA8
P2 VSS VSS Y7
1 M2 VSS VSS W6 <Variant Name> 1
K2 VSS VSS AF2
H2 VSS VSS D2
F2
C29
VSS
VSS
VSS
VSS
AG27
AG25 Wistron Corporation
AH28 L24 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
VSS VSS Taipei Hsien 221, Taiwan, R.O.C.
AF28 VSS VSS M23
AC28 VSS VSS W22
W28 AB21 Title
VSS VSS
R28
L28
VSS VSS AH20
B2
CPU(4/4)_Power
VSS VSS Size Document Number Rev
A3 SA
Bolsena-E
A B C D E
A B C D E
DDR1 DDR2
M_AA0 112 121 M_CS#0 5,9 M_BA0 112 121 M_CS#2 5,9
M_AA1 A0 /CS0 M_BA1 A0 /CS0
111 A1 /CS1 122 M_CS#1 5,9 111 A1 /CS1 122 M_CS#3 5,9
M_AA2 110 M_BA2 110
M_AA3 A2 M_CKE#0 M_BA3 A2
109 A3 CKE0 96 M_CKE#0 5,9 109 A3 CKE0 96 M_CKE#1 5,9
M_AA4 108 95 M_BA4 108 95
M_AA5 A4 CKE1 M_BA5 A4 CKE1
107 A5 107 A5
M_AA6 106 11 M_DQS_R0 M_BA6 106 11 M_DQS_R0 ! NOT THIS LIBRARY
M_AA7 A6 DQS0 M_DQS_R1 M_BA7 A6 DQS0 M_DQS_R1
105 A7 DQS1 25 105 A7 DQS1 25
M_AA8 102 47 M_DQS_R2 M_BA8 102 47 M_DQS_R2
M_AA9 A8 DQS2 M_DQS_R3 M_BA9 A8 DQS2 M_DQS_R3
101 A9 DQS3 61 101 A9 DQS3 61
M_AA10 115 133 M_DQS_R4 M_BA10 115 133 M_DQS_R4
M_AA11 A10 / AP DQS4 M_DQS_R5 M_BA11 A10 / AP DQS4 M_DQS_R5
100 A11 DQS5 147 100 A11 DQS5 147
4 M_AA12 99 169 M_DQS_R6 M_BA12 99 169 M_DQS_R6 4
A12 DQS6 M_DQS_R7 A12 DQS6 M_DQS_R7
DQS7 183 DQS7 183
M_ABS#0 117 77 M_BBS#0 117 77
BA0 DQS8 BA0 DQS8 M_ADM_R[7..0] 9
M_ABS#1 116 M_BBS#1 116
BA1 M_ADM_R0 BA1 M_ADM_R0
DM0 12 M_ADM#0 DM0 12 M_ADM#0 M_DATA_R_[63..0] 9
M_DATA_R_0 5 26 M_ADM_R1 M_ADM#1 M_DATA_R_0 5 26 M_ADM_R1 M_ADM#1
M_DATA_R_1 DQ0 DM1 M_ADM_R2 M_DATA_R_1 DQ0 DM1 M_ADM_R2
7 DQ1 DM2 48 M_ADM#2 7 DQ1 DM2 48 M_ADM#2 M_DQS_R[7..0] 9
17 DQ3 DM4 134 M_ADM#4 17 DQ3 DM4 134 M_ADM#4 M_AA[13..0] 5,9
8 DQ5 DM6 170 M_ADM#6 8 DQ5 DM6 170 M_ADM#6 M_ABS#[1..0] 5,9
M_DATA_R_7 DQ6 DM7 M_DATA_R_7 DQ6 DM7
18 DQ7 DM8 78 18 DQ7 DM8 78 M_BA[13..0] 5,9
M_DATA_R_8 19 M_DATA_R_8 19
M_DATA_R_9 DQ8 M_DATA_R_9 DQ8
23 DQ9 CK0 35 M_CLK5 5 23 DQ9 CK0 35 M_CLK4 5 M_BBS#[1..0] 5,9
M_DATA_R_10 29 37 M_CLK#5 5 M_DATA_R_10 29 37 M_CLK#4 5
M_DATA_R_11 DQ10 /CK0 M_DATA_R_11 DQ10 /CK0
31 DQ11 CK1 160 M_CLK7 5 31 DQ11 CK1 160 M_CLK6 5
M_DATA_R_12 20 158 M_CLK#7 5 M_DATA_R_12 20 158 M_CLK#6 5
M_DATA_R_13 DQ12 /CK1 DDR_CLK0 M_DATA_R_13 DQ12 /CK1 DDR_CLK1
24 DQ13 CK2 89 24 DQ13 CK2 89
M_DATA_R_14 30 91 DDR_CLK#0 M_DATA_R_14 30 91 DDR_CLK#1
M_DATA_R_15 DQ14 /CK2 M_DATA_R_15 DQ14 /CK2
32 DQ15 32 DQ15
M_DATA_R_16 41 195 SMBC_SB M_DATA_R_16 41 195 SMBC_SB 3,20
M_DATA_R_17 DQ16 SCL SMBD_SB M_DATA_R_17 DQ16 SCL
43 DQ17 SDA 193 43 DQ17 SDA 193 SMBD_SB 3,20
M_DATA_R_19 DQ18 M_DATA_R_19 DQ18 DM_SA0 R255
53 DQ19 SA0 194 53 DQ19 SA0 194 1 2 3D3V_S0
M_DATA_R_20 42 196 M_DATA_R_20 42 196 4K7R2J-2-GP
M_DATA_R_21 DQ20 SA1 M_DATA_R_21 DQ20 SA1
44 DQ21 SA2 198 44 DQ21 SA2 198
M_DATA_R_23 DQ22 M_DATA_R_23 DQ22 2D5V_S3
54 DQ23 VDD 9 54 DQ23 VDD 9
3 M_DATA_R_24 55 10 M_DATA_R_24 55 10 3
M_DATA_R_25 DQ24 VDD M_DATA_R_25 DQ24 VDD
59 21 59 21 RN62
M_DATA_R_26 DQ25 VDD M_DATA_R_26 DQ25 VDD DDR_CLK#1
65 DQ26 VDD 22 65 DQ26 VDD 22 8 1
M_DATA_R_27 67 33 M_DATA_R_27 67 33 DDR_CLK#0 7 2
M_DATA_R_28 DQ27 VDD M_DATA_R_28 DQ27 VDD DDR_CLK1
56 DQ28 VDD 34 56 DQ28 VDD 34 6 3
M_DATA_R_29 60 36 M_DATA_R_29 60 36 DDR_CLK0 5 4
66 DQ30 VDD 45 66 DQ30 VDD 45
M_DATA_R_31 68 46 M_DATA_R_31 68 46 SRN10KJ-6-GP
127 DQ32 VDD 57 127 DQ32 VDD 57
M_DATA_R_33 129 58 M_DATA_R_33 129 58
135 DQ34 VDD 69 135 DQ34 VDD 69
M_DATA_R_35 139 70 M_DATA_R_35 139 70
128 DQ36 VDD 81 128 DQ36 VDD 81
M_DATA_R_37 130 82 M_DATA_R_37 130 82
136 DQ38 VDD 92 136 DQ38 VDD 92
M_DATA_R_39 140 93 M_DATA_R_39 140 93
141 94 141 94
M_DATA_R_41
M_DATA_R_42
M_DATA_R_43
145
151
DQ40
DQ41
DQ42
VDD
VDD
VDD
113
114
M_DATA_R_41
M_DATA_R_42
M_DATA_R_43
145
151
DQ40
DQ41
DQ42
VDD
VDD
VDD
113
114
AMD CPU
153 DQ43 VDD 131 153 DQ43 VDD 131
M_DATA_R_44 142 132 M_DATA_R_44 142 132
146 DQ45 VDD 143 146 DQ45 VDD 143
M_DATA_R_46 152 144 M_DATA_R_46 152 144
154 DQ47 VDD 155 154 DQ47 VDD 155
M_DATA_R_48 163 156 M_DATA_R_48 163 156
165 DQ49 VDD 157 165 DQ49 VDD 157
M_DATA_R_50 171 167 M_DATA_R_50 171 167
175 DQ51 VDD 168 175 DQ51 VDD 168
M_DATA_R_52 164 179 M_DATA_R_52 164 179
2 M_DATA_R_53 DQ52 VDD M_DATA_R_53 DQ52 VDD 2
166 DQ53 VDD 180 166 DQ53 VDD 180
M_DATA_R_54 172 191 M_DATA_R_54 172 191 MD63 SMA10
176 DQ55 VDD 192 2D5V_S3 176 DQ55 VDD 192 2D5V_S3
SMA11 SMA0 SMA14
M_DATA_R_56 177 M_DATA_R_56 177 SMA12 MD0
M_DATA_R_57 DQ56 M_DATA_R_57 DQ56
181 DQ57 VSS 3 NOT SUPPORT ECC CHECK 181 DQ57 VSS 3
M_DATA_R_58 187 4 M_DATA_R_58 187 4
M_DATA_R_59 189
DQ58 VSS
15 AMD suggested pull-low M_DATA_R_59 189
DQ58 VSS
15
M_DATA_R_60 DQ59 VSS M_DATA_R_60 DQ59 VSS
178 DQ60 VSS 16 178 DQ60 VSS 16
M_DATA_R_61 182 27 M_DATA_R_61 182 27
M_DATA_R_62 DQ61 VSS M_DATA_R_62 DQ61 VSS
188 DQ62 VSS 28 188 DQ62 VSS 28
M_DATA_R_63 190 38 M_DATA_R_63 190 38
DQ63 VSS DQ63 VSS
VSS 39 VSS 39
71 CB0 VSS 40 71 CB0 VSS 40 Pin 199 Pin 1
73 51 73 51
79
CB1
CB2
VSS
VSS 52 79
CB1
CB2
VSS
VSS 52 DDR1(Reverse 5.2mm)
83 CB3 VSS 63 83 CB3 VSS 63 Pin 200 Pin 2
72 CB4 VSS 64 72 CB4 VSS 64
74 75 1ST 62.10017.701 - 2ND 62.10017.201 74 75
CB5 VSS CB5 VSS
80 CB6 VSS 76 80 CB6 VSS 76
84 CB7 VSS 87 84 CB7 VSS 87
VSS 88 VSS 88
85 NC#85 VSS 90 85 NC#85 VSS 90
86 NC#86/(RESET#) VSS 103 86 NC#86/(RESET#) VSS 103 Pin 199 Pin 1
97 104 97 104
M_AA13
98
NC#97/A13
NC#98/BA2
VSS
VSS 125
M_BA13
98
NC#97/A13
NC#98/BA2
VSS
VSS 125 DDR2(Reverse 9.2mm)
123 NC#123 VSS 126 Part Number = 62.10017.701 123 NC#123 VSS 126 Pin 200 Pin 2
124 NC#124 VSS 137 124 NC#124 VSS 137
SKT-SODIMM200-24GP
200 NC#200 VSS 138
149
200 NC#200 VSS 138
149
(Bottom view)
1 VSS VSS <Variant Name> 1
5,9 M_ARAS# 118 /RAS VSS 150 ME : 62.10017.701 5,9 M_BRAS# 118 /RAS VSS 150
120 159 120 159
5,9 M_ACAS#
119
/CAS VSS
161 2nd :62.10017.691 5,9 M_BCAS#
119
/CAS VSS
161
5,9 M_AWE# /WE VSS
VSS 162
5,9 M_BWE# /WE VSS
VSS 162 62.10017.391 Wistron Corporation
VREF_DDR_MEM 1 173 VREF_DDR_MEM 1 173 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
VREF VSS VREF VSS Taipei Hsien 221, Taiwan, R.O.C.
2 VREF VSS 174 2 VREF VSS 174 ME : 62.10017.391
Layout trace 20 mil 3D3V_S0 197 VDDSPD VSS 185 Layout trace 20 mil 3D3V_S0 197 VDDSPD VSS 185
1
199 186 199 186 Title

C493 TP59 TPAD30 VDDID VSS C515 C516 TP60 TPAD30 VDDID VSS
SCD1U25V3ZY-3GP C492 201 202 SCD1U25V3ZY-3GP SCD1U25V3ZY-3GP 201 202
DDR SO-DIMM SKT
2
SCD1U25V3ZY-3GP GND GND GND GND Size Document Number Rev

A3 SA
Bolsena-E
SKT-SODIMM2006U1GP Date: Thursday, October 13, 2005 Sheet 8 of 58
A B C D E
A B C D E
SERIES DAMPING PARALLEL TERMINATION

PLACE RNs CLOSE TO FIRST DIMM, < 0.75" PULL HIGH STUBS < 0.8", PLACE RPs CLOSE TO SECOND DM ( DM2 )
STRICT EQUAL LENGTH LIMITATION WITH DQS, NO EQUAL LENGTH LIMITATION
CB PINS RN43 SRN10J-5-GP 1D25V_S3 1D25V_S3
SRN10J-3 M_DATA37 SRN68J-4-GP
4 5 M_DATA_R_37
M_DATA4 8 9 M_DATA_R_4 M_DATA36 3 6 M_DATA_R_36 M_ADM_R1 8 9 4 5 M_DATA_R_32
SRN47J-7-GP M_ADM_R[7..0] 8
M_DATA5 7 10 M_DATA_R_5 M_ADM4 2 7 M_ADM_R4 M_DATA_R_13 7 10 3 6 M_DATA_R_33
M_ADM0 6 11 M_ADM_R0 M_DATA39 1 8 M_DATA_R_39 M_DATA_R_12 6 11 2 7 M_DQS_R4 M_CKE#0 1 4 M_ADM[7..0] 5
M_DATA6 5 12 M_DATA_R_6 M_DATA_R_7 5 12 1 8 M_DATA_R_35 M_AA12 2 3
M_DATA7 4 13 M_DATA_R_7 M_DATA_R_6 4 13
RN56 SRN68J-3-GP RN50 M_DATA[63..0] 5
M_DATA13 3 14 M_DATA_R_13 M_DATA32 4 5 M_DATA_R_32 M_ADM_R0 3 14
M_DATA12 M_DATA_R_12 M_DATA33 M_DATA_R_33 M_DATA_R_5 SRN47J-7-GP
4 2 15 3 6 2 15 M_DATA_R_[63..0] 8 4
M_ADM1 1 16 M_ADM_R1 M_DQS4 2 7 M_DQS_R4 M_DATA_R_4 1 16 4 5 M_DATA_R_36 M_BA12 1 4
M_DATA34 1 8 M_DATA_R_34 3 6 M_DATA_R_37 M_BA5 2 3
RN40 RN113 M_DQS[7..0] 5
2 7 M_ADM_R4
RN34 SRN10J-5-GP M_DATA_R_38 RN55
1 8 M_DQS_R[7..0] 8
SRN10J-3 SRN10J-3
M_DATA1 M_DATA_R_1 M_DATA35 M_DATA_R_35 RN110SRN68J-3-GP SRN47J-6-GP
8 9 8 9 M_AA[13..0] 5,8
M_DATA0 7 10 M_DATA_R_0 M_DATA41 7 10 M_DATA_R_41 M_AA11 8 9
M_DQS0 6 11 M_DQS_R0 M_DATA40 6 11 M_DATA_R_40 M_AA9 7 10 M_ABS#[1..0] 5,8
M_DATA2 5 12 M_DATA_R_2 M_DQS5 5 12 M_DQS_R5 M_AA7 6 11
M_DATA3 4 13 M_DATA_R_3 M_DATA42 4 13 M_DATA_R_42 M_AA5 5 12 M_BA[13..0] 5,8
M_DATA8 3 14 M_DATA_R_8 M_DATA43 3 14 M_DATA_R_43 M_AA4 4 13
M_DATA9 2 15 M_DATA_R_9 M_DATA49 2 15 M_DATA_R_49 M_AA8 3 14 M_BBS#[1..0] 5,8
M_DQS1 M_DQS_R1 M_DATA48 M_DATA_R_48 SRN68J-4-GP SRN68J-4-GP M_AA6
1 16 1 16 2 15
M_DATA_R_1 8 9 8 9 M_DATA_R_48 M_AA3 1 16
RN31 RN35 M_DATA_R_0 M_DATA_R_49
7 10 7 10 M_AWE# 5,8
M_DQS_R0 M_DATA_R_43 RN63SRN47J-4-GP
6 11 6 11 M_ACAS# 5,8
SRN10J-3 SRN10J-3 M_DATA_R_2 M_DATA_R_42 M_CS#3
5 12 5 12 4 5 M_ARAS# 5,8
M_DATA14 8 9 M_DATA_R_14 M_DATA38 8 9 M_DATA_R_38 M_DATA_R_3 4 13 4 13 M_DQS_R5 M_BCAS# 3 6
M_DATA15 7 10 M_DATA_R_15 M_DATA45 7 10 M_DATA_R_45 M_DATA_R_8 3 14 3 14 M_DATA_R_41 M_BRAS# 2 7 M_BWE# 5,8
M_DATA21 6 11 M_DATA_R_21 M_DATA44 6 11 M_DATA_R_44 M_DATA_R_9 2 15 2 15 M_DATA_R_40 M_BBS#1 1 8 M_BCAS# 5,8
M_DATA20 5 12 M_DATA_R_20 M_ADM5 5 12 M_ADM_R5 M_DQS_R1 1 16 1 16 M_DATA_R_34 M_BRAS# 5,8
M_ADM2 M_ADM_R2 M_DATA47 M_DATA_R_47 RN109
4 13 4 13
M_DATA23 M_DATA_R_23 M_DATA46 M_DATA_R_46 RN59 RN66
3 14 3 14
M_DATA22 M_DATA_R_22 M_DATA53 M_DATA_R_53 SRN68J-4-GP SRN68J-4-GP
2 15 2 15 M_CS#0 5,8
M_DATA28 1 16 M_DATA_R_28 M_DATA52 1 16 M_DATA_R_52 M_DATA_R_28 8 9 8 9 M_DATA_R_39 RN65 SRN47J-7-GP M_CS#1 5,8
M_DATA_R_23 7 10 7 10 M_DATA_R_44 M_AWE# 1 4 M_CS#2 5,8
RN41 RN44 M_DATA_R_22 M_DATA_R_45 M_ABS#0
6 11 6 11 2 3 M_CS#3 5,8
M_ADM_R2 5 12 5 12 M_ADM_R5
3 SRN10J-3 SRN10J-3 M_DATA_R_21 M_DATA_R_46 RN68 3
4 13 4 13
M_DATA11 8 9 M_DATA_R_11 M_DQS6 8 9 M_DQS_R6 M_DATA_R_20 3 14 3 14 M_DATA_R_47 SRN47J-7-GP
M_DATA10 7 10 M_DATA_R_10 M_DATA50 7 10 M_DATA_R_50 M_DATA_R_15 2 15 2 15 M_DATA_R_52 M_BA3 1 4 5,8 M_CKE#0 M_CKE#0
M_DATA17 6 11 M_DATA_R_17 M_DATA51 6 11 M_DATA_R_51 M_DATA_R_14 1 16 1 16 M_DATA_R_53 M_BA7 2 3
M_DATA16 M_DATA_R_16 M_DATA56 M_DATA_R_56 SRN47J-6-GP M_CKE#1
5 12 5 12 5,8 M_CKE#1
M_DQS2 M_DQS_R2 M_DATA57 M_DATA_R_57 RN114 RN111 M_AA1
4 13 4 13 8 9
M_DATA19 M_DATA_R_19 M_DQS7 M_DQS_R7 SRN68J-4-GP SRN68J-4-GP M_AA10
3 14 3 14 7 10
M_DATA18 2 15 M_DATA_R_18 M_DATA58 2 15 M_DATA_R_58 M_DATA_R_11 8 9 8 9 M_DATA_R_59 M_AA2 6 11
M_DATA25 1 16 M_DATA_R_25 M_DATA59 1 16 M_DATA_R_59 M_DATA_R_10 7 10 7 10 M_DATA_R_58 M_AA0 5 12
M_DATA_R_16 6 11 6 11 M_DQS_R7 M_ABS#1 4 13
RN32 RN36 M_DATA_R_17 M_DATA_R_57 M_ARAS#
5 12 5 12 3 14
M_DQS_R2 4 13 4 13 M_DATA_R_56 M_CS#2 2 15
RN42 SRN10J-5-GP SRN10J-3 M_DATA_R_19 M_DATA_R_51 M_BA13
3 14 3 14 1 16
M_DATA29 4 5 M_DATA_R_29 M_ADM6 8 9 M_ADM_R6 M_DATA_R_18 2 15 2 15 M_DATA_R_50
M_ADM3 RN64
3 6 M_ADM_R3 M_DATA54 7 10 M_DATA_R_54 M_DATA_R_24 1 16 1 16 M_DQS_R6
M_DATA31 SRN47J-6-GP
2 7 M_DATA_R_31 M_DATA55 6 11 M_DATA_R_55
M_DATA30 RN60 RN67
1 8 M_DATA_R_30 M_DATA61 5 12 M_DATA_R_61 M_BA9 8 9
M_DATA60 M_DATA_R_60 RN61 SRN68J-3-GP SRN68J-4-GP M_BA6
4 13 7 10
M_DATA24 4 5 M_DATA_R_24 M_ADM7 3 14 M_ADM_R7 M_DATA_R_27 1 8 8 9 M_ADM_R6 M_BA10 6 11
M_DQS3 3 6 M_DQS_R3 M_DATA62 2 15 M_DATA_R_62 M_DATA_R_26 2 7 7 10 M_DATA_R_54 M_BA1 5 12
M_DATA26 2 7 M_DATA_R_26 M_DATA63 1 16 M_DATA_R_63 M_DQS_R3 3 6 6 11 M_DATA_R_55 M_BA2 4 13
M_DATA27 1 8 M_DATA_R_27 M_DATA_R_25 4 5 5 12 M_DATA_R_60 M_BA0 3 14
RN45 M_DATA_R_61 M_BBS#0
4 13 2 15
RN33 SRN10J-5-GP 3 14 M_ADM_R7 M_BWE# 1 16
M_DATA_R_31 4 5 2 15 M_DATA_R_62
M_DATA_R_30 3 M_DATA_R_63 RN69
6 1 16
M_ADM_R3 SRN47J-4-GP
2 7
M_DATA_R_29 1 RN112 M_BA4
8 4 5
M_BA8 3 6
2 RN115SRN68J-3-GP M_BA11 2
2 7
M_CKE#1 1 8
RN108
SRN47J-4-GP
M_AA13 4 5
M_CS#0 3 6
M_CS#1 2 7
M_ACAS# 1 8
RN51
1 <Variant Name> 1
Wistron Corporation
Title
05/10
Remove the damping resistor for AMD suggest.
DDR DAMPING & TERMINATION
A3 SA
Bolsena-E
A B C D E
A B C D E
4 4
LAYOUT:Place altemating caps to GND and 2D5_S3
2D5V_S3
1D25V_S3
1
1
C866 C868 C870 C860 C862 C864 C394 C417 C430 C437 C457 C469 C383 C491 C425 C358 C498
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
2
2
DY DY DY DY DY DY
1
1
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
2
2
DY DY DY DY DY DY
3 3
2D5V_S3
1D25V_S3
1D25V_S3
1
1
1
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
2
2
C501 C500 C494 C503 C499 C520 C357
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
2
DY DY DY DY DY DY
DY DY DY
1
1
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
2
2
DY DY DY DY DY DY
2 2
LAYOUT:Place close to Power Pin of DDR socket.
LAYOUT:Place at end of the DIMMs 2D5V_S3 2D5V_S3
1D25V_S3
1 2 C466 1 2 C504
SCD22U16V3ZY-GP SCD22U16V3ZY-GP
1
1 2 C465 1 2 C519
TC15 TC26 C889 C886 C888 C887 SCD22U16V3ZY-GP SCD22U16V3ZY-GP
ST100U4VBM-U SE100U10VM-4GP SC10U10V5ZY-1GP SC10U10V5ZY-1GP SC10U10V5ZY-1GP SC10U10V5ZY-1GP DY
2
1 2 C484 DY 1 2 C518
79.10111.40L
DY DY DY
1 2 C483 1 2 C502
1 2 C482 1 2 C517
0.22u x 10
1 <Variant Name> 1
Wistron Corporation
Title
DDR DECOUPLING
A3 SA
Bolsena-E
A B C D E
A B C D E
4 4
CLAW HAMMER TO NB NB TO CLAW HAMMER

4 CPUCADOUT[15..0] U61A
4 CPUCADOUTJ[15..0]
NB0CADOUT[15..0] 4
CPUCADOUT15 T26 R24 NB0CADOUT15 NB0CADOUTJ[15..0] 4
CPUCADOUTJ15 HT_RXCAD15P HT_TXCAD15P NB0CADOUTJ15
CPUCADOUT14
R26 HT_RXCAD15N PART 1OF6 HT_TXCAD15N R25
NB0CADOUT14
U25 HT_RXCAD14P HT_TXCAD14P N26
CPUCADOUTJ14 U24 P26 NB0CADOUTJ14
CPUCADOUT13 HT_RXCAD14N HT_TXCAD14N NB0CADOUT13
V26 HT_RXCAD13P HT_TXCAD13P N24
CPUCADOUTJ13 U26 N25 NB0CADOUTJ13
W25 HT_RXCAD12P HT_TXCAD12P L26
CPUCADOUTJ12 W24 M26 NB0CADOUTJ12
AA25 HT_RXCAD11P HT_TXCAD11P J26
HYPER TRANSPORT CPU I/F

CPUCADOUTJ11 AA24 K26 NB0CADOUTJ11
AB26 HT_RXCAD10P HT_TXCAD10P J24
CPUCADOUTJ10 AA26 J25 NB0CADOUTJ10
3 CPUCADOUT9 HT_RXCAD10N HT_TXCAD10N NB0CADOUT9 3
AC25 HT_RXCAD9P HT_TXCAD9P G26
CPUCADOUTJ9 AC24 H26 NB0CADOUTJ9
AD26 HT_RXCAD8P HT_TXCAD8P G24
CPUCADOUTJ8 AC26 G25 NB0CADOUTJ8
HT_RXCAD8N HT_TXCAD8N
CPUCADOUT7 R29 L30 NB0CADOUT7
R28 HT_RXCAD7N HT_TXCAD7N M30
CPUCADOUT6 T30 L28 NB0CADOUT6
R30 HT_RXCAD6N HT_TXCAD6N L29
CPUCADOUT5 T28 J29 NB0CADOUT5
T29 HT_RXCAD5N HT_TXCAD5N K29
CPUCADOUT4 V29 H30 NB0CADOUT4
U29 HT_RXCAD4N HT_TXCAD4N H29
CPUCADOUT3 Y30 E29 NB0CADOUT3
W30 HT_RXCAD3N HT_TXCAD3N E28
1D2V_S0 CPUCADOUT2 Y28 D30 NB0CADOUT2
Y29 HT_RXCAD2N HT_TXCAD2N E30
CPUCADOUT1 AB29 D28 NB0CADOUT1
AA29 HT_RXCAD1N HT_TXCAD1N D29
CPUCADOUT0 AC29 B29 NB0CADOUT0
HT_RXCAD0P HT_TXCAD0P
1
CPUCADOUTJ0 AC28 C29 NB0CADOUTJ0

C254 C248 HT_RXCAD0N HT_TXCAD0N
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP CPUHTTCLKOUT1 Y26 L24 NB0HTTCLKOUT1 NB0HTTCLKOUT1 4
2
4 CPUHTTCLKOUT1 CPUHTTCLKOUTJ1 HT_RXCLK1P HT_TXCLK1P NB0HTTCLKOUTJ1

4 CPUHTTCLKOUTJ1 W26 HT_RXCLK1N HT_TXCLK1N L25 NB0HTTCLKOUTJ1 4
CPUHTTCLKOUT0 W29 F29 NB0HTTCLKOUT0 NB0HTTCLKOUT0 4
4 CPUHTTCLKOUT0 CPUHTTCLKOUTJ0 HT_RXCLK0P HT_TXCLK0P NB0HTTCLKOUTJ0
4 CPUHTTCLKOUTJ0 W28 HT_RXCLK0N HT_TXCLK0N G29 NB0HTTCLKOUTJ0 4
DY CPUHTTCTLOUT0 P29 M29 NB0HTTCTLOUT NB0HTTCTLOUT 4
2 4 CPUHTTCTLOUT0 CPUHTTCTLOUTJ0 HT_RXCTLP HT_TXCTLP NB0HTTCTLOUTJ 2
4 CPUHTTCTLOUTJ0 N29 HT_RXCTLN HT_TXCTLN M28 NB0HTTCTLOUTJ 4
AROUND NB 1D2V_S0 1 R124 HT_RXCALN
2 49D9R2F-GP D27 HT_RXCALN HT_TXCALP B28 HT_TXCALP 1 R498 2
100R2F-L1-GP-U
1 R123 HT_RXCALP
2 49D9R2F-GP E27 A28 HT_TXCALN
HT_RXCALP HT_TXCALN
1 <Variant Name> 1
Wistron Corporation
Title
ATI-RS482M (1 of 4) HT
A3 SA
Bolsena-E
A B C D E
A B C D E
49 PEG_TXP[15..0]
49 PEG_TXN[15..0]
49 PEG_RXP[15..0]
49 PEG_RXN[15..0]
4 U61B 4
U61C
AF17 AF28
PART 2 OF 6
NC#AF17 NC#AF28 PEG_TXP15 PEG_RXP15_NB C752 PEG_RXP15
AK17 NC#AK17 PART 3 OF 6 NC#AF27 AF27
PEG_TXN15
D8 GFX_RX0P GFX_TX0P A7
PEG_RXN15_NB C753
1 2
SCD1U16V2ZY-2GP PEG_RXN15
AH16 NC#AH16 NC#AG28 AG28 D7 GFX_RX0N GFX_TX0N B7 1 2
AF16 AF26 PEG_TXP14 D5 B6 PEG_RXP14_NB C754 1 2 SCD1U16V2ZY-2GP PEG_RXP14
NC#AF16 NC#AF26 PEG_TXN14 GFX_RX1P GFX_TX1P PEG_RXN14_NB C755 SCD1U16V2ZY-2GP PEG_RXN14
AJ22 NC#AJ22 NC#AE25 AE25 D4 GFX_RX1N GFX_TX1N B5 1 2
AJ21 AE24 PEG_TXP13 E4 A5 PEG_RXP13_NB C756 1 2 SCD1U16V2ZY-2GP PEG_RXP13
NC#AJ21 NC#AE24 PEG_TXN13 GFX_RX2P GFX_TX2P PEG_RXN13_NB C757 SCD1U16V2ZY-2GP PEG_RXN13
AH20 NC#AH20 NC#AF24 AF24 F4 GFX_RX2N GFX_TX2N A4 1 2
AH21 AG23 PEG_TXP12 G5 B3 PEG_RXP12_NB C758 1 2 SCD1U16V2ZY-2GP PEG_RXP12
NC#AH21 NC#AG23 PEG_TXN12 GFX_RX3P GFX_TX3P PEG_RXN12_NB C759 SCD1U16V2ZY-2GP PEG_RXN12
AK19 NC#AK19 NC#AE29 AE29 G4 GFX_RX3N GFX_TX3N B2 1 2
AH19 AF29 PEG_TXP11 H4 C1 PEG_RXP11_NB C771 1 2 SCD1U16V2ZY-2GP PEG_RXP11
NC#AH19 NC#AF29 GFX_RX4P GFX_TX4P
LANE REVERSE
AJ17 AG30 PEG_TXN11 J4 D1 PEG_RXN11_NB C770 1 2 SCD1U16V2ZY-2GP PEG_RXN11
NC#AJ17 NC#AG30 PEG_TXP10 GFX_RX4N GFX_TX4N PEG_RXP10_NB C775 SCD1U16V2ZY-2GP PEG_RXP10
AG16 NC#AG16 NC#AG29 AG29 H5 GFX_RX5P GFX_TX5P D2 1 2
LANE REVERSE
AG17 AH28 PEG_TXN10 H6 E2 PEG_RXN10_NB C774 1 2 SCD1U16V2ZY-2GP PEG_RXN10
NC#AG17 NC#AH28 GFX_RX5N GFX_TX5N
PCIE I/F TO VIDEO

AH17 AJ28 PEG_TXP9 G1 F2 PEG_RXP9_NB C776 1 2 SCD1U16V2ZY-2GP PEG_RXP9
NC#AH17 NC#AJ28 PEG_TXN9 GFX_RX6P GFX_TX6P PEG_RXN9_NB C784 SCD1U16V2ZY-2GP PEG_RXN9
AJ18 NC#AJ18 NC#AH27 AH27 G2 GFX_RX6N GFX_TX6N F1 1 2
AJ27 PEG_TXP8 K5 H2 PEG_RXP8_NB C783 1 2 SCD1U16V2ZY-2GP PEG_RXP8
NC#AJ27 PEG_TXN8 GFX_RX7P GFX_TX7P PEG_RXN8_NB C789 SCD1U16V2ZY-2GP PEG_RXN8
AG26 NC#AG26 NC#AE23 AE23 K4 GFX_RX7N GFX_TX7N J2 1 2
AJ29 AG22 PEG_TXP7 L4 J1 PEG_RXP7_NB C792 1 2 SCD1U16V2ZY-2GP PEG_RXP7
NC#AJ29 NC#AG22 PEG_TXN7 GFX_RX8P GFX_TX8P PEG_RXN7_NB C791 SCD1U16V2ZY-2GP PEG_RXN7
AE21 NC#AE21 NC#AF23 AF23 M4 GFX_RX8N GFX_TX8N K1 1 2
AH24 AF22 PEG_TXP6 N5 K2 PEG_RXP6_NB C790 1 2 SCD1U16V2ZY-2GP PEG_RXP6
NC#AH24 NC#AF22 PEG_TXN6 GFX_RX9P GFX_TX9P PEG_RXN6_NB C794 SCD1U16V2ZY-2GP PEG_RXN6
AH12 NC#AH12 NC#AE20 AE20 N4 GFX_RX9N GFX_TX9N L2 1 2
AG13 AG19 PEG_TXP5 P4 M2 PEG_RXP5_NB C795 1 2 SCD1U16V2ZY-2GP PEG_RXP5
NC#AG13 NC#AG19 PEG_TXN5 GFX_RX10P GFX_TX10P PEG_RXN5_NB C801 SCD1U16V2ZY-2GP PEG_RXN5
AH8 NC#AH18 NC#AF20 AF20 R4 GFX_RX10N GFX_TX10N M1 1 2
AE8 AF19 PEG_TXP4 P5 N1 PEG_RXP4_NB C799 1 2 SCD1U16V2ZY-2GP PEG_RXP4
NC#AE8 NC#AF19 PEG_TXN4 GFX_RX11P GFX_TX11P PEG_RXN4_NB C798 SCD1U16V2ZY-2GP PEG_RXN4
NC#AH26 AH26 P6 GFX_RX11N GFX_TX11N N2 1 2
AF25 AJ26 PEG_TXP3 P2 R1 PEG_RXP3_NB C800 1 2 SCD1U16V2ZY-2GP PEG_RXP3
NC#AF25 NC#AJ26 PEG_TXN3 GFX_RX12P GFX_TX12P PEG_RXN3_NB C805 SCD1U16V2ZY-2GP PEG_RXN3
AH30 NC#AH30 NC#AK26 AK26 R2 GFX_RX12N GFX_TX12N T1 1 2
3 AG20 AH25 PEG_TXP2 T5 T2 PEG_RXP2_NB C804 1 2 SCD1U16V2ZY-2GP PEG_RXP2 3
NC#AG20 NC#AH25 PEG_TXN2 GFX_RX13P GFX_TX13P PEG_RXN2_NB C810 SCD1U16V2ZY-2GP PEG_RXN2
AJ25 NC#AJ25 NC#AJ24 AJ24 T4 GFX_RX13N GFX_TX13N U2 1 2
AH13 AH23 PEG_TXP1 U4 V2 PEG_RXP1_NB C811 1 2 SCD1U16V2ZY-2GP PEG_RXP1
DVO_IDCKP NC#AH23 PEG_TXN1 GFX_RX14P GFX_TX14P PEG_RXN1_NB C812 SCD1U16V2ZY-2GP PEG_RXN1
AF14 NC#AF14 NC#AJ23 AJ23 V4 GFX_RX14N GFX_TX14N V1 1 2
AJ7 AH22 PEG_TXP0 W1 Y2 PEG_RXP0_NB C816 1 2 SCD1U16V2ZY-2GP PEG_RXP0
NC#AJ7 NC#AH22 PEG_TXN0 GFX_RX15P GFX_TX15P PEG_RXN0_NB C817 SCD1U16V2ZY-2GP PEG_RXN0
AG8 NC#AG8 NC#AK14 AK14 W2 GFX_RX15N GFX_TX15N AA2 1 2
DVO_D11 AH14 SCD1U16V2ZY-2GP
Dummy when use UMA
MEM_A I/F
AG25 NC#AG25 DVO_D10 AK13

AH29 NC#AH29 DVO_D9 AJ13 AE1 GPP_RX0P/SB_RX2P GPP_TX0P/SB_TX2P AD2
AF21 NC#AF21 DVO_D8 AJ11 AE2 GPP_RX0N/SB_RX2N GPP_TX0N/SB_TX2N AD1
AK25 NC#AK25 DVO_D7 AH11
AJ12 DVO_IDCKN DVO_D6 AJ10 AB2 GPP_RX1P/SB_RX3P GPP_TX1P/SB_TX3P AA1
AF13 NC#AF13 DVO_D4 AH10 AC2 GPP_RX1N/SB_RX3N GPP_TX1N/SB_TX3N AB1
AK7 NC#AK7 NC#AE15 AE15
AF9 NC#AF9 NC#AF15 AF15 AB5 GPP_RX2P PCIE I/F TO SLOT GPP_TX2P Y5
NC#AG14 AG14 AB4 GPP_RX2N GPP_TX2N Y6
AE17 NC#AE17 NC#AE14 AE14
AH18 NC#AH18 NC#AE12 AE12 Y4 GPP_RX3P GPP_TX3P W5
AE18 NC#AE18 NC#AF12 AF12 AA4 GPP_RX3N GPP_TX3N W4
AJ19 NC#AJ19 NC#AG11 AG11
AF18 NC#AF18 NC#AE11 AE11
AJ9 AG1 AF2 SB_TX0P C824 1 2 PCIE_TX0P_SB 17
DVO_D5 17 PCIE_RX0P_SB SB_RX0P SB_TX0P
AK16 NC#AK16 DVO_D1 AH9 17 PCIE_RX0N_SB AH1 SB_RX0N SB_TX0N AG2 SB_TX0N C825 1 2 SCD1U16V2ZY-2GP PCIE_TX0N_SB 17
Dummy when 'USE DVO' AJ16 NC#AJ16 DVO_D2 AJ8 PCIE I/F TO SB SB_TX1P C826 1
SCD1U16V2ZY-2GP
DVO_D3 AK8 17 PCIE_RX1P_SB AC5 SB_RX1P SB_TX1P AC4 2 PCIE_TX1P_SB 17
DVO_D0 AH7 17 PCIE_RX1N_SB AC6 SB_RX1N SB_TX1N AD4 SB_TX1N C830 1 2 SCD1U16V2ZY-2GP PCIE_TX1N_SB 17
AJ6 SCD1U16V2ZY-2GP
C829 SCD47U10V3ZY-GP DVO_DE PCE_ISETAH3 PCE_PCAL
DVO_HSYNC AH6 1 R531 2 10KR2J-2-GP PCE_ISET PCE_PCAL AH2 1 R528 2 150R2F-1-GP
1 2MEM_CAP1 AE28 NC#AE28 DVO_VSYNC AJ5 1 2 PCE_TXISETAJ3
PCE_TXISET PCE_NCAL AJ2 PCE_NCAL 1 R529 2 100R2F-L1-GP-U
1D2V_S0
2 R532 8K25R3F-2-GP 2
1 2MEM_CAP2 AJ4 NC#AJ4 NC#AG10 AG10
NC#AF11 AF11
C837 SCD47U10V3ZY-GP AF10
NC#AF10
NC#AE9 AE9
RS480_MEM_VMODE AJ20 AG7
NC#AJ20 NC#AG7
NC#AF8 AF8
NC#AF7 AF7
MEM_VREF AK20 AE7
NC#AK20 NC#AE7
1D8V_S0 1 R178 2 MPVDD_PLL AJ15 AH5

0R0603-PAD VDD_18 NC#AH5
AJ14 VSS NC#AD30 AD30
1
C366
SC1U10V3KX-3GP
2
1D8V_S0
1
RS480_MEM_VMODE
R174
1KR2F-3-GP
2
2
MEM_VREF R170
1KR2J-1-GP
1
1
1 <Variant Name> 1
R175
1KR2F-3-GP Dummy when 'USE DVO'
NO DVO: WITH DVO: Wistron Corporation
2
MEM_COMPP = NC MEM_COMPP = 61.9 OHM TO GND 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
MEM_COMPN = NC MEM_COMPN = 61.9 OHM TO VDD_MEM Taipei Hsien 221, Taiwan, R.O.C.
MEM_CAP1 = 470nF MEM_CAP1 = NC Title
MEM_CAP2 = 470nF MEM_CAP2 = NC ATI-RS482M (2 of 4) PCIE
MEM_VMODE = GND (IF VDD_MEM = 2.5V) MEM_VMODE = 1.8V(IF VDD_MEM = 1.8V) Size Document Number Rev
MEM_VREF = VDD_MEM / 2 MEM_VREF = VDD_MEM / 2 A3
Bolsena-E SA
A B C D E
A B C D E
3D3V_S0 AVDD TXACLK+ 5 4

1D8V_S0 AVDDQ TXACLK- LCD_TXACLK+ 16,57
6 3 LCD_TXACLK- 16,57
TXAOUT2+ 7 2
TXAOUT2- LCD_TXAOUT2+ 16,57
1 R490 2 8 1 LCD_TXAOUT2- 16,57
1 R511 2 0R0603-PAD
0R0603-PAD RN80 SRN0J-4-GP
1
1
C782 C781 TXAOUT1+ 5 4
C751 TXAOUT1- LCD_TXAOUT1+ 16,57
6 3 LCD_TXAOUT1- 16,57
SC2D2U16V5ZY-GP
SC10U10V5ZY-1GP
SCD1U16V2ZY-2GP
1D8V_S0 TXAOUT0+ 7 2
2
2
TXAOUT0- LCD_TXAOUT0+ 16,57
8 1 LCD_TXAOUT0- 16,57
RN78 SRN0J-4-GP
4 1 R126 2 1D8VAVDDD1_S0 TXBOUT1+ 5 4 4
0R0603-PAD TXBOUT1- LCD_TXBOUT1+ 16,57
6 3 LCD_TXBOUT1- 16,57
DY TXBOUT0+ 7 2 LCD_TXBOUT0+ 16,57
1
TXBOUT0- 8 1
C247 LCD_TXBOUT0- 16,57
SC2D2U16V5ZY-GP RN84 SRN0J-4-GP
2
U61D TXBCLK+ 5 4 LCD_TXBCLK+ 16,57
150R2F-1-GP R495
150R2F-1-GP R494
150R2F-1-GP R496
B27 PART 4 OF 6 TXBCLK- 6 3
AVDD1 LCD_TXBCLK- 16,57
2
2
2
2
2
2
C27 D18 TXBOUT0+ TXBOUT2+ 7 2
AVDD2 TXOUT_U0P LCD_TXBOUT2+ 16,57
R491 150R2F-1-GP
R492 150R2F-1-GP
R493 150R2F-1-GP
AVDDQ D26 C18 TXBOUT0- TXBOUT2- 8 1
AVSSN1 TXOUT_U0N TXBOUT1+ LCD_TXBOUT2- 16,57
D25 AVSSN2 TXOUT_U1P B19
TXBOUT1- RN86 SRN0J-4-GP
C24 AVDDDI TXOUT_U1N A19
1
B24 D19 TXBOUT2+
1
1
1
1
1
1
C263 AVSSDI TXOUT_U2P TXBOUT2- LCDVDD_ON
TXOUT_U2N C19 2 R137 1 LCD_VDD_ON 16,57
SC1U10V3ZY-6GP E24 D20 TXBOUT3+ 0R2J-GP
2
AVDDQ TXOUT_U3P
D24 AVSSQ TXOUT_U3N C20 TXBOUT3-
Dummy when use Discrete
Dummy when use Discrete TXAOUT0+ TP23
57 UMA_CRMA B25 C TXOUT_L0P B16
A25 A16 TXAOUT0- TP20
57 UMA_LUMA Y TXOUT_L0N
CRT/TVOUT
57 UMA_COMP A24 D16 TXAOUT1+
COMP TXOUT_L1P TXAOUT1-
TXOUT_L1N C16
57 UMA_R C25 B17 TXAOUT2+ 1D8V_S0
RED TXOUT_L2P TXAOUT2-
57 UMA_G A26 GREEN TXOUT_L2N A17
57 UMA_B B26 E17 TXAOUT3+
BLUE TXOUT_L3P
1D8V_S0 D17 TXAOUT3-
LVDS
PLVDD 15 UMA_VS TXOUT_L3N
15 UMA_HS A11 R486
DAC_VSYNC TXBCLK+ TP28
1 R125 2 B11 DAC_HSYNC TXCLK_UP B20 1 2
R487 715R2F-GP IRSET_NB C26 A20 TXBCLK- TP27 BLM11A121S-GP
RSET TXCLK_UN
1
1 2 E11 B18 TXACLK+
15 UMA_CRT_DDC_C DAC_SCL TXCLK_LP
3 BLM11A121S-GP F11 C17 TXACLK- C746 C251 3
15 UMA_CRT_DDC_D DAC_SDA TXCLK_LN
1
SC1U10V3ZY-6GP SC1U10V3ZY-6GP
SC2D2U16V5ZY-GP
C747 C748 C741
2
E18 1D8VLPVDD_S0
LPVDD
SC10U10V5ZY-1GP
SC2D2U16V5ZY-GP
SCD1U16V2ZY-2GP
F17
2
LPVSS R485
A14 PLLVDD LVDDR18D E19
1D8V_S0 B14 G20 LVDDR18D_S0 1 2
HTPVDD PLLVSS LVDDR18A_1 BLM11A121S-GP
H20
PLL PWR
LVDDR18A_2
1
M23 HTPVDD
L23 G19 LVDDR18A_S0 C745 C250
HTPVSS LVSSR1
SCD1U16V2ZY-2GP
1 2 E20
2
R515 LVSSR2
LVSSR3 F20
1
150R5F C793 C788 C787 H18 R484

RS480_RST# LVSSR4
D14 SYSRESET# LVSSR5 G18 1 2
BLM11A121S-GP
SC10U10V5ZY-1GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
39,52 NB_PWRGD B15 F19

2
POWERGOOD LVSSR6
1
B12 H19
PM
6,17 LDT_STP# LDTSTOP# LVSSR7 C744 C249
17 ALLOW_LDTSTOP C12 ALLOW_LDTSTOP LVSSR8 F18
SC1U10V3ZY-6GP
SCD1U16V2ZY-2GP
NB_SUS_STAT# AH4
2
NC LCDVDD_ON
LVDS_DIGON E14
1D8V_S0 3D3V_S0 F14 LVDS_BLON
LVDS_BLON LVDS_BLEN_NB TP24 TPAD30
H13 VDDR3_1 LVDS_BLEN F13
1 R151 2 3D3VDDR_S0 H12
0R0603-PAD VDDR3_2
GFX_CLKP B8 NBSRC_CLK 3
1
3 CLK14_NB A13 OSCIN GFX_CLKN A8 NBSRC_CLK# 3

1
C280 NB_OSC_OUT B13

SC1U10V3ZY-6GP OSCOUT
R535 TPAD30 TP97 P23 HTTST_CLK 1 R153 2
CLOCKs
2
4K7R2J-2-GP HTTSTCLK 10KR2J-2-GP

HTREFCLK N23 HTREF_CLK 3
10KR2J-2-GP E8 SBLINK_CLK 3
2
NB_SUS_STAT# R497 2 SB_CLKP

1 B9 TVCLKIN SB_CLKN E7 SBLINK_CLK# 3
2 2
DO NOT SUPPORT SIDEPORT MEMORY
DO NOT SUPPORT SERIAL STRAP ROM TPAD30 TP25 DFT_GPIO0 F12 C13 DFT_GPIO3 TP98 TPAD30
TPAD30 TP22 DFT_GPIO1 DFT_GPIO0 DFT_GPIO3 DFT_GPIO4 TP96 TPAD30
DUMMY IT E13 DFT_GPIO1 DFT_GPIO4 C14
TPAD30 TP21 DFT_GPIO2 D13 C15 DFT_GPIO5 TP95 TPAD30
DFT_GPIO2 DFT_GPIO5
3D3V_S0 A10
TMDS_HPD TP99 TPAD28
RN104 17 BMREQ# F10
RS480_CLK BMREQ#
4 1 C10 I2C_CLK STRP_DATA E10
3 2 RS480_DAT C11 TP26 TPAD28
RN105 SRN10KJ-5-GP AF4
I2C_DATA
THERMALDIODE_P
MIS. DDC_DATA B10 DDC_DATA
16,50 EDID_CLK 3 SRN0J-6-GP
2 AE4 THERMALDIODE_N
TP100 TPAD28
16,50 EDID_DAT 4 1 TESTMODE E12 TESTMODE_NB
VCC_CORE_S0
1
R147
DUMMY-R2
1 2
R142
4K7R2J-2-GP
<Variant Name>
1 1
2
Wistron Corporation
17,34,37,49 LPC_RST# 1 R118 2 RS480_RST# 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
33R2J-2-GP LVDS_BLON 1 R475 2 Taipei Hsien 221, Taiwan, R.O.C.
BL_ON 34,52
1
0R2J-GP
2
C235 R474 Title
DUMMY-C3 1KR2J-1-GP R305
ATI-RS482M (3 of 4) LVDS CRT
Dummy when use Discrete 10KR2J-2-GP
2
A3 SA
Bolsena-E
2
1
A B C D E
1
2
3
4
2 1 2 1 2 1 2 1
DY
3D3V_S0
SCD1U16V2ZY-2GP SC10U10V5ZY-1GP SCD1U16V2ZY-2GP SC10U10V5ZY-1GP
C354
C822
C311
C297
U13
3
2 1 2 1 2 1 2 1
DY
1D8V_S0
2
SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP
BAV99PT-GP-U
C334
C823
C312
C291
2 1 2 1 2 1 2 1
DY
DY
1
L12
DY
DY
A
A
C343
C330
C313
C276
U14
3
2
2 1 2 1 2 1 2 1
R177
2
0R2J-GP
2 1 SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP
BAV99PT-GP-U
C341
C344
C329
C278
BLM11A121S-GP
2 1 2 1 2 1 2 1 2 1
DY
DY
R176
2 1 SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP
C345
C331
C328
C277
0R2J-GP
2 1 2 1 2 1 2 1
DY
SCD1U16V2ZY-2GP
C373
2 1
C371
C340
C296
C258
U61F
SCD1U16V2ZY-2GP
2 1 2 1 2 1 2 1 2 1
VSS112 G28
F27
1D8VDD_S0
SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP VSS111
C279 C333
VSS110 F24
C342
C355
C327
C259
2 1 VSS109 AD28
2 1 2 1 VSS108 R27
VSS107 T27
SC1U10V3KX-3GP
C332
1D8V_S0
C356
C372
VSS106 AE27
VSS105 AE26
1D2V_S0
VSS104 W19
VSS103 AK29
VSS102 AK22
1D2V_S0
AD21
VDDHT31
VDDHT30
VSS101
VSS100 AC13
AK10
B
B
VSS99
VSS98 AK5
VSS97 AC21
AJ30
W23
G21
E21
F22
F21
C22
B22
A22
C21
B21
AC15
AC17
H15
AH15
AC22
AD22
AC12
AD18
AC10
AD20
AD15
AD14
AD10
AC20
AC18
AD12
AC14
AE30
AK4
AK11
AK28
AK23
AC30
A29
A23
B23
C23
F23
D23
AA23
U23
H23
J23
K23
E23
G23
V23
AB23
AB27
P24
K27
J27
AA27
P27
AB24
K24
H27
V24
G27
V27
U27
N27
VSS96
VSS95 AD7
VSS94 AC11
AG27
U61E
VSS93
VSS92 AC19
VSS91 AG9
VDD_HT9
VDD_HT8
VDD_HT7
VDD_HT6
VDD_HT5
VDD_HT4
VDD_HT3
VDD_HT2
VDD_HT1
VDD_18_3
VDD_18_2
VDD_18_1
VDD_HT31
VDD_HT30
VDD_HT29
VDD_HT28
VDD_HT27
VDD_HT26
VDD_HT25
VDD_HT24
VDD_HT23
VDD_HT22
VDD_HT21
VDD_HT20
VDD_HT19
VDD_HT18
VDD_HT17
VDD_HT16
VDD_HT15
VDD_HT14
VDD_HT13
VDD_HT12
VDD_HT11
VDD_HT10
VSS90 AG24
VDD_DVO_9
VDD_DVO_8
VDD_DVO_7
VDD_DVO_6
VDD_DVO_5
VDD_DVO_4
VDD_DVO_3
VDD_DVO_2
VDD_DVO_1
AF30 VSS89
VDD_DVO_19
VDD_DVO_18
VDD_DVO_17
VDD_DVO_16
VDD_DVO_15
VDD_DVO_14
VDD_DVO_13
VDD_DVO_12
VDD_DVO_11
VDD_DVO_10
VDD_CORE39
VDD_CORE40
VDD_CORE41
VDD_CORE42
VDD_CORE43
VDD_CORE44
VDD_CORE45
VDD_CORE46
VDD_CORE47
VSS89
R23 VSS132 VSS88 AG12
V28 VSS131 VSS87 AG15
V25 VSS130 VSS86 AD17
POWER U28 VSS129 VSS85 AG21
K25 VSS128 VSS84 AG6
E26 VSS127 VSS83 AG5
P28 VSS126 VSS82 AD23
P25 VSS125 VSS81 AD19
N28 VSS124 VSS80 AD16
H24 VSS123 VSS79 AD13
VDDA_18_9 M27 AD11
VDDA_18_8
VDDA_18_7
VDDA_18_6
VDD_CORE38
VDD_CORE37
VDD_CORE36
VDD_CORE35
VDD_CORE34
VDD_CORE33
VDD_CORE32
VDD_CORE31
VDD_CORE30
VDD_CORE29
VDD_CORE28
VDD_CORE27
VDD_CORE26
VDD_CORE25
VDD_CORE24
VDD_CORE23
VDD_CORE22
VDD_CORE21
VDD_CORE20
VDD_CORE19
VDD_CORE18
VDD_CORE17
VDD_CORE16
VDD_CORE15
VDD_CORE14
VDD_CORE13
VDD_CORE12
VDD_CORE11
VDD_CORE10
VDD_CORE9
VDD_CORE8
VDD_CORE7
VDD_CORE6
VDD_CORE5
VDD_CORE4
VDD_CORE3
VDD_CORE2
VDD_CORE1
VDDA_18_10
VDDA_18PLL_3
VDDA_18PLL_2
VDDA_18_5
VDDA_18_4
VDDA_18_3
VDDA_18_2
VDDA_18PLL_1
VDDA_18_1
VDDA_12_13
VDDA_12_12
VDDA_12_11
VDDA_12_10
VDDA_12_9
VDDA_12_8
VDDA_12_7
VDDA_12_6
VDDA_12_5
VDDA_12_4
VDDA_12_3
VDDA_12_2
VDDA_12_1
PART 5 OF 6 VDDA_12_14
VSS122 VSS78
VSS77 AD8
L27 VSS120 VSS76 AC23
J7
J8
L7
L8
F9
B1
R7
R8
U7
N8
N7
U8
H9
G7
G8
G9
W7
W8
T23 AG18
T15
T17
T13
T19
V17
V15
P17
V13
E22
V19
P13
P15
P19
D21
H21
H22
D22
R16
U18
U14
U12
U16
R18
R14
R12
N14
N12
N18
N16
AF5
AF6
G22
AK2
AE6
AA8
AA7
M19
M17
M15
M13
AC7
AC8
AG4
W14
W12
W18
W16
VSS119 VSS75
K28 VSS118 VSS74 AC16
N19 VSS117 VSS73 U19
J28 VSS116
M24 VSS115
H28 VSS114 VSS72 P16
F28 VSS113 VSS71 M16
VDDA18_13
VDDA12_13
VSS70 M12
VSS69 M14
C
C
VSS68 T18
2 1 2 1 VSS67 V16
T8 VSSA68 VSS66 W15
L5 VSSA67 VSS65 N17
SC1U10V3KX-3GP SC1U10V3KX-3GP E5 U13
VSSA66 VSS64
1D8V_VDDA
C352
C281
2 1 2 1 U6 M18
1D2V_S0
VSSA65 VSS63
2 1 2 1 U5 VSSA64 VSS62 V18
E6 VSSA63 VSS61 P18
SC10U10V5ZY-1GP SC10U10V5ZY-1GP F6 W17
SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP VSSA62 VSS60
C316
C298
GROUND
V7 VSSA61 VSS59 W13

C318
C282
2 1 2 1 M7 R13
DY
VSSA59 VSSA60 VSS58
2 1 2 1 AJ1 VSSA59 VSS57 T12
L6 VSSA58 VSS56 P12
SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP AG3 R17
C315
C299
C2 VSSA56 VSS54 T16

C302
C303
2 1 2 1 H8 VSSA55 VSS53 U17

2 1 2 1 V6 VSSA54 VSS52 P14
M3 VSSA53 VSS51 N13
SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP H7 V12
C314
C300
K7 VSSA51 VSS49 N15

C293
C306
2 1 2 1 AD6 T14
DY
VSSA50 VSS48
2 1 2 1 Y7 VSSA49 VSS47 R15
T7 VSSA48 VSS46 V14
SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP AB8 U15
C305
C270
K3 VSSA46
C336
C335
2 1 2 1 C4
DY
VSSA45
D6 VSSA44 VSS44 F15
2 1 AD5 VSSA43 VSS43 E15
SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP J3 D10
VSSA42 VSS42
C317
C292
R6 VSSA41 VSS41 E16

2 1 SC10U10V5ZY-1GP J5 H14
DY
VSSA40 VSS40
C307
C7 VSSA39 VSS39 H16

C9 VSSA38 VSS38 H10
D
D
2 1 AA5 H17
1D2V_VDDA_RS480_S0
VSSA37 VSS37
TC10
P7 VSSA36 VSS36 AD25

B4 H11
1
SCD1U16V2ZY-2GP VSSA35 VSS35

G3 VSSA34 VSS34 D11
C301
2 1 AB7 W27
DY
VSSA33 VSS33
M5 VSSA32 VSS32 F26
AF3 VSSA31 VSS31 T24
AE3 B30 VSS30
1
TC9
VSSA30 VSS30
ST100U6D3VDM-6GP
F3 F25
L11 2
VSSA29 VSS29
V8 VSSA28 VSS28 G16
AD3 VSSA27 VSS27 C28
C8 VSSA26 VSS26 Y27
1D8V_S0
J6 VSSA25 VSS25 R19

Title
Size
A3
P8 AC9
L10 2
SB 0127
VSSA24 VSS24
MLB-201209-21-GP
AB3 VSSA23 VSS23 Y23

ST100U6D3VDM-6GP
VSSA22 A2 G17
VSSA22 VSS22
1D2V_S0
AA3 VSSA21 VSS21 AA28

C6 AD24
<Variant Name>
VSSA20 VSS20
D3 VSSA19 VSS19 D12
MLB-201209-21-GP
K8 VSSA18 VSS18 AB25

W3 VSSA17 VSS17 AB28
C3 VSSA16 VSS16 G30
V3 F16
Document Number
VSSA15 VSS15
Y8 VSSA14 VSS14 G11
M8 VSSA13 VSS13 AD9
F8 D9
Date: Thursday, October 13, 2005
VSSA12 VSS12
C5 VSSA11 VSS11 D15
M6 VSSA10 VSS10 E9
T3 VSSA9 VSS9 G13
AA6 VSSA8 VSS8 Y24
R3 VSSA7 VSS7 G14
F5 VSSA6 VSS6 G15
F7 AC27
E
E
VSSA5 VSS5
N3 AD27
Sheet
VSSA4 VSS4
VSS89
VSS30
Bolsena-E
V5 VSSA3 VSS3 AD29

VSSA59
VSSA22
AE5 G12
VDDHT31
VDDHT30
VSSA2 PAR 6 OF 6 VSS2

14
R5 G10
VDDA18_13
VDDA12_13
VSSA1 VSS1
2 1 2 1 2 1 2 1
of
C815
C769
C353
C264
ATI-RS482M (4 of 4) PWR, GND

58
Rev
Wistron Corporation
SA
SC4D7U10V5ZY-3GP
SC4D7U10V5ZY-3GP
SC4D7U10V5ZY-3GP
SC4D7U10V5ZY-3GP
1
2
3
4
A B C D E
3D3V_S0
CRT CONN
200mA Rating/Spec 500mA
5V_CRT_S0
8
7
6
5
U2
5V_S0 4 3 2N7002DW-7F-GP
5 2
SRN10KJ-6-GP
1
2
3
4
4 6 1 RN1 4
U3A RN3
14
1
3 2 CRT_DDC_D_1 SYS_CRT_DDC_D5
13 UMA_CRT_DDC_D
RN4 13 UMA_CRT_DDC_C 4 1 CRT_DDC_C_1 SYS_CRT_DDC_C5
UMA_HS 3 2 HSYNC_5_1 2 3 SYS_HS SRN0J-6-GP
UMA_VS 4 1VSYNC_5_1
SRN0J-6-GP U3B TSAHCT125PW-GP

14
7
4
Dummy when use Discrete RN2
5 6 SYS_VS 50 DIS_CRT_DDC_D 3 2
50 DIS_CRT_DDC_C 4 1
SRN0J-6-GP
TSAHCT125PW-GP 5V_S0
7
1
C2 C1
Dummy when use UMA D28
DUMMY-C2
DUMMY-C2
1 2 5V_CRT_S0
RN5
1
DIS_HS 3 2 RB751V-40-1-GP
DIS_VS 4 1 C653
2
SCD01U25V2KX-3GP
2
SRN0J-6-GP
Dummy when use UMA
3 L18 3
57 CRT_R_1 1 2 BLM11B750S-GP CRT_R CRT1

17
L19 SYS_CRT_DDC_D5
57 CRT_G_1 1 2 BLM11B750S-GP CRT_G 6
CRT_R 1 11
L20 SYS_HS
57 CRT_B_1 1 2 BLM11B750S-GP CRT_B 7
CRT_G 2 12 SYS_CRT_DDC_D5
1
SYS_VS 8
1
C663 C664 C665 C659 C660 C661 CRT_B 3 13 SYS_HS
SC47P50V2JN-3GP
SC47P50V2JN-3GP
SC47P50V2JN-3GP
SC8D2P50V2CC 5V_CRT_S0
SC8D2P50V2CC
SC8D2P50V2CC
9
2
1
150R2F-1-GPR381
R381
150R2F-1-GPR382
150R2F-1-GPR382
150R2F-1-GPR383
150R2F-1-GPR383
SYS_CRT_DDC_C5 4 14 SYS_VS
2
2
10
150R2F-1-GP
C655 5 15 SYS_CRT_DDC_C5
1
C651 C652
C654 16
2
SC10P50V2JN-1
SC100P50V2JN-U
SC100P50V2JN-U
2
SC10P50V2JN-1
3
3
DY DY DY D27 D26 D25 20.20378.015
VIDEO-15-42-GP
ME : 20.20378.015
2
5V_S0
BAV99PT-GP-U BAV99PT-GP-U BAV99PT-GP-U
2 2
DY DY DY
1 2 C283 D37
SC47P50V2JN-3GP 2 3D3V_S0
L9
57 TV_LUMA 1 2 TV_LUMA_CON
IND-1D2UH-5-GP
3 DY
TV CONN
1
1
C285 C284
SC100P50V2JN-U SC270P50V2JN-2GP BAV99PT-GP-U
2
1 2 C271 D34
SC47P50V2JN-3GP 2 TV1 CHROMA LUMA
L8 3D3V_S0
8
1 2 TV_COMP_CON 3 DY 1
57 TV_COMP IND-1D2UH-5-GP
1
1 TV_LUMA_CON 4 6 5 4
C272 C266 2
SC100P50V2JN-U SC270P50V2JN-2GP BAV99PT-GP-U 5
2
TV_COMP_CON 7 3 7 2 1
TV_CRMA_CON 6
1 2 C260 D32 3
SC47P50V2JN-3GP 2 9
L6 3D3V_S0
1 2 TV_CRMA_CON 3 DY MINDIN7-11-U-GP COMPOSIT
57 TV_CRMA IND-1D2UH-5-GP
1 <Variant Name> 1
1
1 22.10021.D81
150R2F-1-GP R148
150R2F-1-GP R138
150R2F-1-GP R132
C261 C255
2
SC270P50V2JN-2GP
SC100P50V2JN-U
BAV99PT-GP-U ME : 22.10021.D81 Wistron Corporation

2

1
Title
-1 0302 CRT/TV
A3 SA
Bolsena-E
A B C D E
A B C D E
LEDs D5 LED-G-106-GP
5V_S0
NUM_LED# 1 R19 2 K A on KB Cover

100R2F-L1-GP-U
D4 LED-G-106-GP
CAP_LED# 1 R26 2 K A on KB Cover
100R2F-L1-GP-U
D3 LED-G-106-GP
MAIL_LED# 1 R10 2 K A on KB Cover
100R2F-L1-GP-U
4 D6 LED-G-106-GP 4
MEDIA_LED# 1 R20 2 K A on KB Cover
100R2F-L1-GP-U
D48 LED-Y-22
WLAN_LED# 1 R580 2 1 2 on Front Panel
22R2J-2-GP
D2 LED-G-106-GP
1 R4 2 K A on KB Cover
100R2F-L1-GP-U
Dummy when use IDE D9 LED-G-106-GP
1 R24 2 K A
100R2F-L1-GP-U
D46 LED-G-106-GP
1 R11 2 FRONT_PWRLED# 1 R378 2 K A on Front Panel
18 SATA_LED# 0R2J-GP 100R2F-L1-GP-U
D7
1 R21 2 2 5V_S5
24 HDD_LED#_5 0R2J-GP MEDIA_LED# LED-G-106-GP
3 D44
Dummy when use SATA DC_BATFULL# 1 R376 2
100R2F-L1-GP-U
K A on Front Panel
24 CDROM_LED#_5 1
BAW56PT-U
R579 5V_S0
470R2J-2-GP D47
BLT_LED# 1 2 2 1 on Front Panel
34 NUM_LED#
34 CAP_LED#
LED-B-27-U-GP
34 MAIL_LED# 5V_S5
34 BLT_LED# D45 LED-Y-22
29 WLAN_LED# STDBY_LED#
3
34 STDBY_LED# 1 R377 2 1 2 on Front Panel 3
100R2F-L1-GP-U
34 CHARGE_LED# D43 LED-Y-22
34 DC_BATFULL# CHARGE_LED# 1 R375 2 1 2 on Front Panel
100R2F-L1-GP-U
34 FRONT_PWRLED#
DY on KB cover
RC2 SRC100P50V-2-GP -2 0408
NUM_LED# 1 8 LED V V V V V
CAP_LED# 2 7
MAIL_LED# 3 6 Button V V V V V
MEDIA_LED# 4 5
POWER1 E-MAIL INTERNET e-BTN PROGRAM CAPS NUM HDD
DY
RC11 SRC100P50V-2-GP
WLAN_LED# 1 8
Front panel
STDBY_LED# 2 7
BLT_LED# 3 6
CHARGE_LED# 4 5 LED V V V V Charger: Power2:
DY C646 SC100P50V2JN-U Button V V Green : DC only with Battery full with DC Green : S0
DC_BATFULL# 1 2 Orange : Charging Orange : S3
BlutTooth Wireless Charger Power2 Orange Blink : Battery low Orange Blinking : Enter S4
DY C512 SC100P50V2JN-U
FRONT_PWRLED# 1 2
(Please See M.E. drawing LED position)
2 2
LCD CONN LCDPOWER_S0
LCD POWER
SC10U10V5ZY-1GP
SCD1U25V3ZY-3GP
LCD1
1
42 C44 C22 C31

2 1
SCD1U25V3ZY-3GP
Layout 40 mil
2
4 3 LCDPOWER_S0 3D3V_S0
6 5
8 7 DY DY
10 9 LCD_TXBCLK+ 13,57
3D3V_S0 12 11 U7
LCD_TXBCLK- 13,57
14 13 LCD_TXBOUT2+ 13,57
13,50 EDID_CLK 16 15 LCD_TXBOUT2- 13,57 1 OUT IN 6
13,50 EDID_DAT 18 17 LCD_TXBOUT1+ 13,57 EVEN CHANNEL 2 GND GND 5
20 19 LCD_TXBOUT1- 13,57 1 R48 2 LCDVDD_ON_1 3 4
13,57 LCD_VDD_ON 1KR2J-1-GP ON/OFF# IN
22 21 LCD_TXBOUT0+ 13,57
1
24 23 LCD_TXBOUT0- 13,57
34 BRIGHTNESS 26 25 LCD_TXACLK+ 13,57 C23 C69 C70
SC1U10V3KX-3GP
28 27 SCD1U25V3ZY-3GP AAT4280IGU-3-T1GP SC1U10V3KX-3GP
LCD_TXACLK- 13,57
2
34 FPBACK DCBATOUT 30 29 LCD_TXAOUT2+ 13,57
32 31 LCD_TXAOUT2- 13,57
34 33 LCD_TXAOUT1+ 13,57 ODD CHANNEL
2
C667 C668 C658 C662 36 35 LCD_TXAOUT1- 13,57

1
1
SCD1U25V3ZY-3GP
SC100P50V2JN-U
SC100P50V2JN-U
SC10U35V0ZY-1GP
38 37 LCD_TXAOUT0+ 13,57
40 39 LCD_TXAOUT0- 13,57
1
41
2
2
SB 0202
1 <Variant Name> 1
ACES-CONN40A-GP
20.F0737.040 Wistron Corporation

1ST 20.D0198.108 - 2ND 20.F0687.040
Title
LCD / LEDs
A3 SA
Bolsena-E
A B C D E
A B C D E
5V_S5
1
R83
32K suspend clock output
U33A
14
8K2R2J-3-GP 20,34,38,39,45,56 PM_SLP_S3#
DY 21 RTC_CLK
1
?3.9p need app PN U55A 1 OF 4 3 1 R280 2 CLK32_G791 22
2
RN102 SRN22J-2-GP 2 10R2J-2-GP
A_RST# AH8 L4 1 8 CLK33_CBUS
CHANGE TO - 3.9P -> 78.3R974.1F1 A_RST# PCICLK0 PCI_CLK1_R CLK33_LAN TSLCX08MTCX-GP
L3 2 7
7
PCICLK1 PCI_CLK2_R CLK33_MINI
1 2 C742 3 SBSRC_CLK L27 PCIE_RCLKP PCICLK2 L2 3 6
PCI CLKS
SC12P50V2JN-LGP M27 L1 PCI_CLK3_R 4 5 CLK33_KBC
3 SBSRC_CLK# PCIE_RCLKN PCICLK3 PCI_CLK4_R CLK33_SIO
PCICLK4 M4 4 5
C736 1 2 SCD01U16V2KX-3GP TX0P M30 M3 PCI_CLK5_R 3 6 PCLK_R5C832
12 PCIE_RX0P_SB PCIE_TX0P PCICLK5
3
1
4 R488 R479 C733 1 2 SCD01U16V2KX-3GP TX0N N30 M2 PCI_CLK6_R 2 7 CLK33_LPCROM PCLK_R5C832 PCLK_R5C832 21,27 4
X7 20MR3-GP 12 PCIE_RX0N_SB C740 SCD01U16V2KX-3GP TX1P PCIE_TX0N PCICLK6 PCLK_R5C833_R CLK33_CBUS
12 PCIE_RX1P_SB 1 2 K30 PCIE_TX1P PCICLK7 M1 1 8 CLK33_CBUS 25
C737 1 2 SCD01U16V2KX-3GP TX1N L30 N4 RN98 SRN22J-2-GP CLK33_LAN
12 PCIE_RX1N_SB PCIE_TX1N PCICLK8 PCI_CLK8 21 CLK33_LAN 21,30
H30 N3 PCI_CLK9_R 1 R459 2 CLK33_MINI CLK33_MINI 21,29
X-32D768KHZ-38GPU 20MR3-GP PCIE_TX2P PCICLK9 PCI_CLK9_FB 22R2J-2-GP CLK33_KBC
J30 N2 1 2 CLK33_KBC 21,34
2
2
PCIE_TX2N PCICLK_FB SC100P50V2JN-U C724 CLK33_SIO
F30 CLK33_SIO 21,37
2
32K_X1 PCIE_TX3P PCIRST# CLK33_LPCROM

G30 PCIE_TX3N PCIRST# AJ7 PCI_AD[31..0] 21,25,27,29,30 CLK33_LPCROM 21
W3 PCI_AD0
32K_X2 AD0/ROMA18 PCI_AD1 3D3V_S0
1 2 C760 12 PCIE_TX0P_SB M29 PCIE_RX0P AD1/ROMA17 Y2 DY
SC12P50V2JN-LGP N29 W4 PCI_AD2 PCB-Ver
CHANGE TO - 3.9P -> 78.3R974.1F1 12 PCIE_TX0N_SB PCIE_RX0N AD2/ROMA16 PCI_AD3
12 PCIE_TX1P_SB M28 PCIE_RX1P AD3/ROMA15 Y3
SB N28 V1 PCI_AD4
12 PCIE_TX1N_SB PCIE_RX1N AD4/ROMA14
1
J29 Y4 PCI_AD5 3D3V_S0
PCIE_RX2P AD5/ROMA13 PCI_AD6 R92 R430
MAIN SOURCE: 82.30001.031 EPSON K29
J28
PCIE_RX2N AD6/ROMA12 V2
W2 PCI_AD7 DUMMY-R2 DUMMY-R2
PCIE_RX3P AD7/ROMA11
PCIE_PVDD
2ND SOURCE: 82.30001.341 KDS K28 PCIE_RX3N AD8/ROMA9 AA4 PCI_AD8
PCI_AD9
AD9/ROMA8 V4
1D8V_S0 1 R482 2 150R2F-1-GP PCIE_CALRP G27 AA3 PCI_AD10
2
L23 150R2F-1-GP PCIE_CALRN PCIE_CALRP AD10/ROMA7 PCI_AD11 PCI_GNT#5
PCIE_VDDR 1 R473 2 H27 PCIE_CALRN AD11/ROMA6 U1
1 2 AA2 PCI_AD12 PCI_GNT#6
PCI EXPRESS INTERFACE

4K12R2F-GP PCIE_CALI AD12/ROMA5 PCI_AD13
1 R483 2 G28 PCIE_CALI AD13/ROMA4 U2
1
1
MLB-201209-21-GP PCI_AD14
10
AD14/ROMA3 AA1
9
8
7
6
C728 C727 C725 A11, A12 4K53 1% PCIE_PVDD R30 U3 PCI_AD15 R93 R429
PCIE_PVDD AD15/ROMA2
SC1U10V3KX-3GP
DUMMY-R2 DUMMY-R2
SC10U10V5ZY-1GP
A21, A22 5K5 1%

SCD1U16V2ZY-2GP
T4 PCI_AD16 RN15
2
AD16/ROMD0
R451
A23 4K12 1% F26 AC1 PCI_AD17 SRN10KJ-L1-GP-U
PA_IXP400AC10.PDF PCIE_VDDR AD17/ROMD1 PCI_AD18
R29 PCIE_VDDR AD18/ROMD2 R2
1
G26 AD4 PCI_AD19
PCI INTERFACE
2
PCIE_VDDR AD19/ROMD3 PCI_AD20
P26 PCIE_VDDR AD20/ROMD4 R3
K26 AD3 PCI_AD21
3 1D8V_S0 PCIE_VDDR PCIE_VDDR AD21/ROMD5 PCI_AD22 3D3V_S0 3
L26 PCIE_VDDR AD22/ROMD6 R4
P28 AD2 PCI_AD23 RN13
1
2
3
4
5
2
PCIE_VDDR AD23/ROMD7
8K2R2J-3-GP
N26 P2 PCI_AD24 SRN10KJ-L1-GP-U
PCIE_VDDR AD24 PCI_AD25
1 L24 2 P27 PCIE_VDDR AD25 AE3
3D3V_S0
0R0603-PAD P3 PCI_AD26 1 10
AD26
1
1
H28 AE2 PCI_AD27 2 9
C735 C184 C179 C233 C183 C734 PCIE_VSS AD27 PCI_AD28
F29 PCIE_VSS AD28 P4 3 8
SC22U6D3V5MX-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
DY PCI_AD29
SCD1U16V2ZY-2GP
H29 AF2 4 7
2
2
PCIE_VSS AD29 PCI_AD30
H26 PCIE_VSS AD30 N1 5 6
DY DY F27 AF1 PCI_AD31
PCIE_VSS AD31
G29 PCIE_VSS CBE0#/ROMA10 V3 PCI_CBE#0 25,27,29,30
L29 PCIE_VSS CBE1#/ROMA1 AB4 PCI_CBE#1 25,27,29,30
J26 PCIE_VSS CBE2#/ROMWE# AC2 PCI_CBE#2 25,27,29,30
L28 PCIE_VSS CBE3# AE4 PCI_CBE#3 25,27,29,30
J27 PCIE_VSS FRAME# T3 PCI_FRAME# 25,27,29,30
N27 PCIE_VSS DEVSEL#/ROMA0 AC4 PCI_DEVSEL# 25,27,29,30
RP1 3D3V_S0 M26 AC3 PCI_IRDY# 25,27,29,30
INT_PIRQG# PCIE_VSS IRDY#
1 10 K27 PCIE_VSS TRDY#/ROMOE# T2 PCI_TRDY# 25,27,29,30
INT_PIRQE# 2 9 INT_PIRQD# P29 U4
PCIE_VSS PAR/ROMA19 PCI_PAR 25,27,29,30
INT_PIRQF# 3 8 INT_PIRQC# P30 T1
PCIE_VSS STOP# PCI_STOP# 25,27,29,30
INT_PIRQH# 4 7 INT_PIRQB# AB2
PERR# PCI_PERR# 25,27,29,30
5 6 INT_PIRQA# TP86 SB_CPUSTP# AJ8 AB3
3D3V_S0 CPU_STP#/DPSLP_3V# SERR# PCI_SERR# 25,27,29,30
TP85 SB_PCISTP# AK7 AF4 PCI_REQ#0 29
INT_PIRQA# DPSLP_OD#/GPIO37 REQ0#
SRN10KJ-L3-GP AG5 AF3 PCI_REQ#1 25
INT_PIRQB# INTA# REQ1#
AH5 INTB# REQ2# AG2 PCI_REQ#2 30
INT_PIRQC# AJ5 AG3 PCI_REQ#3 PCI_REQ#3 27
INT_PIRQD# INTC# REQ3#/PDMA_REQ0# PCI_REQ#4
AH6 INTD# REQ4#/PLL_BP33/PDMA_REQ1# AH1
5V_S0 INT_PIRQE# AJ6 AH2 PCI_REQ#5
25,27 INT_PIRQE# INTE#/GPIO33 REQ5#/GPIO13
INT_PIRQF# AK6 AH3 PCI_REQ#6
2 25,29 INT_PIRQF# INTF#/GPIO34 REQ6#/GPIO31 2
INT_PIRQG# AG7 AJ2 PCI_GNT#0 29
27 INT_PIRQG# INTG#/GPIO35 GNT0#
INT_PIRQH# AH7 AK2 PCI_GNT#1 25
30 INT_PIRQH# INTH#/GPIO36 GNT1#
U3D
14
13
GNT2# AJ3 PCI_GNT#2 30

AK3 PCI_GNT#3 PCI_GNT#3 27
GNT3#/PLL_BP66/PDMA_GNT0# PCI_GNT#4
GNT4#/PLL_BP50/PDMA_GNT1# AG4 PM_CLKRUN# 25,27,29,30,34,37
A_RST# 12 11 RSTDRV#_R 1 R8 2 RSTDRV#_5 24 32K_X1 B2 AH4 PCI_GNT#5 TP10
33R2J-2-GP X1 GNT5#/GPIO14 PCI_GNT#6
AJ4
XTAL
TSAHCT125PW-GP 32K_X2 GNT6#/GPIO32

B1 X2 CLKRUN# AG1
PCIRST# 3V to 5V level shift for HDD & CDROM AB1 PCI_LOCK#
7
LOCK#
SB400 asserts PLTRST# to reset LPC_LAD[0..3] 34,37
devices on the platform. AG25 LPC_LAD0
TP92 SB_C29 LAD0 LPC_LAD1
C29 CPU_PG LAD1 AH25
TP107 SB_A28 A28 AJ25 LPC_LAD2
3D3V_S5 R307 2 TP18 H_NMI INTR/LINT0 LAD2 LPC_LAD3
1 C28 NMI/LINT1 LAD3 AH24
TP93 FWH_INIT# B29 INIT# LPC LFRAME# AG24 LPC_LFRAME# 21,34,37
0R2J-GP TP91 SB_D29 D29 AH26 LPC_LDRQ0# LPC_LDRQ0# 37
SMI# LDRQ0#
CPU
U39A LPC_LDRQ1# 3D3V_AUX_S5

14
6,13
LDT_STP# TP94 E4 SLP#/LDT_STP# LDRQ1# AG26
SB_B30 B30 IGNNE# RN12
1 R298 TP11 H_A20M# F28 AK27
A20M# SERIRQ P_SERIRQ 27,34,37
3 PLT_RST#_R 1 2 LPC_RST# 13,34,37,49 TP12 H_FERR# E28 Close to chip 3D3V_S0 1 10
A_RST# FERR# LPC_LAD0 2 LPC_LDRQ1#
2 13 ALLOW_LDTSTOP E29 STPCLK#/ALLOW_LDTSTP RTCCLK C2 RTC_CLK 21 9
2
33R2J-2-GP D25 F3 AUTO_ON# 21 LPC_LAD3 3 8 LPC_LDRQ0#
6 SB_CPUPWRGD LDT_PG/SSMUXSEL/GPIO0 RTC_IRQ#/ACPWR_STRAP
RTC
DY TSLCX08MTCX-GP TP14 H_DPRSLP# E27 LPC_LAD2 4 7 P_SERIRQ

7
DPRSLPVR VBAT LPC_LAD1 5

13 BMREQ# D27 BMREQ# VBAT A2 3 6 3D3V_S0
6 LDT_RST# D28 LDT_RST# RTC_GND A1
U58
SRN10KJ-L1-GP-U
1
3D3V_S5 BAT54C-1-GP
R510
1
1
1
1
R297 C761 C762 1
8K2R2J-3-GP 2 1 RTC_AUX_S5_1
RTC_AUX_S5
SC1U10V3KX-3GP
SCD1U16V2ZY-2GP
DY U39B
14
2
Wistron Corporation
2
1KR2J-1-GP
1
4 EC71
6 PCI_RST# 1 R296 2 SC470P50V2KX RTC_AUX_S5 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
PCIRST_BUF# 25,27,29,30
PCIRST# 5 10R2J-2-GP Taipei Hsien 221, Taiwan, R.O.C.
2
4
1
2
3
5
TSLCX08MTCX-GP Title
7
DY RTC1
Secondary PCI Bus reset signal. ATI-SB450 (1 of 5) PCI, PCIE
1 R295 2 MLX-CON3-9-GP Size Document Number Rev
20.D0198.103 A3
0R2J-GP Bolsena-E SA
A B C D E
A B C D E
4 U55B 2 OF 4 4
1 2 C704 SCD01U50V3KX-4GP SATA_TP0 AK22 AD30 PIDE_IORDY 24

24 SATA_TXP0 SATA_TX0+ PIDE_IORDY R361
1 2 C703 SCD01U50V3KX-4GP SATA_TN0 AJ22 AE28 PIDE_IRQ14 24 0R0402-PAD
24 SATA_TXN0 SATA_TX0- PIDE_IRQ
PIDE_A0 AD27 PIDE_A0 24 2 1 PIDE_DACK# 24
1 2 C630 SCD01U50V3KX-4GP SATA_RN0 AK21 AC27 PIDE_A1 24
24 SATA_RXN0 SCD01U50V3KX-4GP SATA_RP0 AJ21 SATA_RX0- PIDE_A1
24 SATA_RXP0 1 2 C629 SATA_RX0+ PIDE_A2 AD28 PIDE_A2 24
PRIMARY ATA 66/100

PIDE_DACK# AD29 PDACK# 21
AK19 SATA_TX1+ PIDE_DRQ AE27 PIDE_DREQ 24
Close to SouthBridge AJ19 SATA_TX1- PIDE_IOR# AE30 PIDE_IOR# 24 also strap function
PIDE_IOW# AE29 PIDE_IOW# 24
AK18 SATA_RX1- PIDE_CS1# AC28 PIDE_CS#0 24
AJ18 SATA_RX1+ PIDE_CS3# AC29 PIDE_CS#1 24
SERIAL ATA
AK14 AF29 PIDE_D0
SATA_TX2+ PIDE_D0 PIDE_D1
AJ14 SATA_TX2- PIDE_D1 AF27
AG29 PIDE_D2
PIDE_D2 PIDE_D3
AK13 SATA_RX2- PIDE_D3 AH30
AJ13 AH28 PIDE_D4
SATA_RX2+ PIDE_D4 PIDE_D5
PIDE_D5 AK29
PIDE_D6
Close to SouthBridge AK11
AJ11
SATA_TX3+ PIDE_D6 AK28
AH27 PIDE_D7
PIDE_D[15..0] 24
SATA_TX3- PIDE_D7 PIDE_D8
PIDE_D8 AG27
AK10 AJ28 PIDE_D9
R431 2 SATA_RX3- PIDE_D9 PIDE_D10
1 AJ10 SATA_RX3+ PIDE_D10 AJ29
1KR2F-3-GP AH29 PIDE_D11
PIDE_D11 PIDE_D12
1 2 C700 AJ15 SATA_CAL PIDE_D12 AG28
SCD01U50V3KX-4GP AG30 PIDE_D13
SATA_X1 PIDE_D13 PIDE_D14
DY AJ16 SATA_X1 PIDE_D14 AF30
3 SATA_X2 AK16 AF28 PIDE_D15 3
SATA_X2 PIDE_D15
16 SATA_LED#
AK8 SATA_ACT# SIDE_IORDY V29 SIDE_IORDY 24
1D8V_SP_S0 T27
1D8V_SX_S0 SIDE_IRQ SIDE_IRQ15 24
AH15 PLLVDD_SATA SIDE_A0 T28 SIDE_A0 24
AH16 XTLVDD_SATA SIDE_A1 U29 SIDE_A1 24
1D8V_SATA_S0 T29
SIDE_A2 SIDE_A2 24
AG10 V30
SECONDARY ATA 66/100

AVDD_SATA SIDE_DACK# SIDE_DACK# 24
SATA_X2 1 2 C701 AG14 U28 SIDE_DREQ 24
SC27P50V2JN-2-GP AVDD_SATA SIDE_DRQ
AH12 AVDD_SATA SIDE_IOR# W29 SIDE_IOR# 24
1
X6 AG12 W30 SIDE_IOW# 24

R432 AVDD_SATA SIDE_IOW#
AG18 AVDD_SATA SIDE_CS1# R27 SIDE_CS#0 24
10MR2J-L-GP AG21 R28 SIDE_CS#1 24
XTAL-25MHZ-70GP AVDD_SATA SIDE_CS3#
AH18
1
AVDD_SATA SIDE_D0
AG20 V28
2
SATA_X1 AVDD_SATA SIDE_D0/GPIO15 SIDE_D1

1 2 C702 SIDE_D1/GPIO16 W28
SC27P50V2JN-2-GP AG9 Y30 SIDE_D2
AVSS_SATA SIDE_D2/GPIO17 SIDE_D3
AF10 AA30
SERIAL ATA POWER

AF11 AVSS_SATA SIDE_D4/GPIO19 Y28
AF12 AA28 SIDE_D5
AVSS_SATA SIDE_D5/GPIO20
Dummy when use IDE AF13 AVSS_SATA SIDE_D6/GPIO21 AB28 SIDE_D6
SIDE_D7
AF14 AVSS_SATA SIDE_D7/GPIO22 AB27
AF15 AB29 SIDE_D8 SIDE_D[15..0] 24
AF16 AVSS_SATA SIDE_D9/GPIO24 AA27
AF17 Y27 SIDE_D10
AF18 AVSS_SATA SIDE_D11/GPIO26 AA29
1D8V_SATA_S0 AF19 W27 SIDE_D12
SATA_X1 AVSS_SATA SIDE_D12/GPIO27 SIDE_D13
AF20 AVSS_SATA SIDE_D13/GPIO28 Y29
AF21 V27 SIDE_D14
2 AVSS_SATA SIDE_D14/GPIO29 SIDE_D15 2
AF22 AVSS_SATA SIDE_D15/GPIO30 U27
1
AH9 AVSS_SATA
R433 R102 AG11 AG13
0R2J-GP 0R2J-GP AVSS_SATA AVSS_SATA
AG15 AVSS_SATA AVSS_SATA AH22
AG17 AVSS_SATA AVSS_SATA AK12
AG19 AH11
2
AVSS_SATA AVSS_SATA
AG22 AVSS_SATA AVSS_SATA AJ17
AG23 AVSS_SATA AVSS_SATA AH14
AF9 AVSS_SATA AVSS_SATA AH19
AH17 AVSS_SATA AVSS_SATA AJ20
AH23 AVSS_SATA AVSS_SATA AH21
AH13 AVSS_SATA AVSS_SATA AJ9
AH20 AVSS_SATA AVSS_SATA AG16
AK9 AVSS_SATA AVSS_SATA AH10
AJ12 AVSS_SATA AVSS_SATA AJ23
AK17 AVSS_SATA AVSS_SATA AK15
Dummy when use SATA AK23 AVSS_SATA AVSS_SATA AK20
1D8V_S0 1D8V_SATA_S0 1D8V_S0 1D8V_SP_S0 1D8V_S0 1D8V_SX_S0
1 R105 2 1 L4 2 1 L5 2
1 <Variant Name> 1
0R5J-5-GP 0R3J-3-GP 0R3J-3-GP
1
C127 C155 C160 C128 C129 C157 C159

SC2D2U16V5ZY-GP SC2D2U16V5ZY-GP Wistron Corporation
SC10U10V5ZY-1GP
SCD1U50V3ZY-GP
SCD1U50V3ZY-GP
SCD1U50V3ZY-GP
SCD1U50V3ZY-GP
2

Capacitor PLACE NEAR Capacitor PLACE NEAR Title

THE ACCORDED BALLS THE ACCORDED BALLS ATI-SB400 (2 of 5) IDE
Dummy when use IDE A3
Bolsena-E SA
A B C D E
A B C D E
1D8V_S0
3D3V_SB_S0 U55C 3 OF 4
D30 VDDQ VSS E12

1
1
A30 VDDQ VSS E15
C178 C204 C172 C158 C719 C738 C171 J5 E18
VDDQ VSS
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
K1 E19
2
2
VDDQ VSS
SCD1U16V2ZY-2GP
K5 VDDQ VSS E22
N5 VDDQ VSS K4
4 DY R1 VDDQ VSS J1 4
P5 VDDQ VSS J4
Y1 VDDQ VSS R5
DY DY DY DY U5 VDDQ VSS T5
E24 VDDQ VSS F4
E25 VDDQ VSS P1
V5 VDDQ VSS L5
1
1
U26 VDDQ VSS M5
C165 C181 C780 C203 C182 C156 C170 AA5 W1
VDDQ VSS
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
V26 AK25
2
2
VDDQ VSS
AK4 VDDQ VSS W5
Y26 VDDQ VSS AJ24
AF25 VDDQ VSS R26
AB5 VDDQ VSS E26
AA26 VDDQ VSS Y5
DY DY DY AD5 VDDQ VSS T26
AD26 VDDQ VSS AF5
AE1 VDDQ VSS T30
3D3V_SB_S0 AE5 AC5
3D3V_S0 VDDQ VSS
AF6 VDDQ VSS W26
U30 VDDQ VSS AG8
2 R450 1 AF24 AF8
0R0805-PAD VDDQ VSS
AF7 VDDQ VSS AB26
1
AE26 VDDQ VSS AK5

C721 C722 C143 C154 C202 C169 C177 AC30 AC26
VDDQ VSS
SC10U10V5ZY-1GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
AK1 AD1
2
VDDQ VSS
AK26 VDDQ VSS AF23
1D8V_S0 AK30 AF26
VDDQ VSS
VSS A29
3 M12 AB30 3
VDD VSS
N12 VDD VSS AJ1
DY V12 VDD VSS AJ30
W12 VDD VSS P12
M13 VDD VSS R12
N13 VDD VSS T12
1
1
V13 VDD VSS U12
C161 C726 C144 C705 C766 C145 C743 C699 C698 C173 C232 W13 P13
VDD VSS
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
M18 R13
2
2
VDD VSS
N18 VDD VSS T13
V18 VDD VSS U13
W18 VDD VSS M14
M19 VDD VSS N14
N19 VDD VSS P14
DY DY DY DY V19 VDD VSS R14
3D3V_SB_S5 W19 T14
VDD VSS
VSS U14
3D3V_SB_S5 A3 V14
3D3V_S5 S5_3.3V VSS
A7 S5_3.3V VSS W14
E6 S5_3.3V VSS M15
2 R114 1 E7 N15
0R0805-PAD S5_3.3V VSS
E1 S5_3.3V VSS P15
1
1D8V_S5 F5 R15
C180 C238 C240 C239 C222 C221 S5_3.3V VSS
VSS T15
1D8V_S5
SC10U10V5ZY-1GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
E9 U15
2
1D8V_S5 3D3V_S5 S5_1.8V VSS

E10 S5_1.8V VSS V15
E13 USB_PHY_1.8V VSS W15
DY E14 USB_PHY_1.8V VSS M16
2
DY D33 E16 USB_PHY_1.8V VSS N16
2
1 2 E17 USB_PHY_1.8V VSS P16
DY E20 S5_1.8V VSS R16
RB751V-40-1-GP 1D2V_S0 E21 T16
S5_1.8V VSS
VSS U16
1D8V_S5 1D8V_S5 1 R489 2 CPU_1D2V C30 V16
0R0402-PAD CPU_PWR VSS
VSS W16
V5_VREF AG6 M17
1D8V_S0 V5_VREF VSS
VSS N17
1 L26 2 1D8VAVDDCK_S0 A24 P17
AVDDCK VSS
1
MLB-201209-21-GP B24 R17

C777 C778 C225 C223 C230 C228 C226 C231 AVSSCK VSS
VSS T17
1
1
SC10U10V5ZY-1GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
A4 U17
2
VSS VSS
C750
C779 C773 C765
SCD1U16V2ZY-2GP
A8 VSS VSS V17

SC1U10V3KX-3GP
SC10U10V5ZY-1GP
SCD1U16V2ZY-2GP
B28 W17
2
2
VSS VSS
E30 VSS VSS P18
SCD1U16V2ZY-2GP E23 R18
5V_S0 VSS VSS
C1 VSS VSS T18
DY DY DY E5 VSS VSS U18
G5 VSS VSS P19
1
DY D30 F1 VSS VSS R19

H5 VSS VSS T19
DY E8 VSS VSS U19
RB751V-40-1-GP
V5_VREF E11 VSS
2
MIN 4.5
NORMAL 5.0
Vf = 0.38v (@1mA) MAX 5.5
1v (@40mA)
1 <Variant Name> 1
1 R440 2 V5_VREF
1KR2J-1-GP
1
3D3V_S0
C717 C142 Wistron Corporation
SC1U10V3KX-3GP
SCD1U16V2ZY-2GP
D31 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

2
1 2 Taipei Hsien 221, Taiwan, R.O.C.
RB751V-40-1-GP Title
ATI-SB400 (3 of 5) POWER
A3
Bolsena-E SA
A B C D E
A B C D E
3D3V_S5
8
7
6
5
3D3V_S5
3D3V_S0
RN19
RN107 SRN10KJ-5-GP SRN10KJ-6-GP
DY DY CLK48_USB 3
1
2
3
4
4
3
KBC_SLP_WAKE
1
2
3
4
5
R127 1
1
1
1
GPIO1 U55D 4 OF 4 1 R504 2
R505
R502 10KR2J-2-GP GPIO6 DY 0R2J-GP
22 PM_THRM# C6 TALERT#/TEMP_ALERT#/GPIO10 48M_X1/USBCLK A15
R501 10KR2J-2-GP GPM6#
D5 B15
BLINK/AZ_SDIN3/GPM6# 48M_X2 USB_PCOMP
C4 C15 1 R503 2
2
R87 10KR2J-2-GP2
1
2
2
2
30 PME#_SB PCI_PME#/GEVENT4# USB_RCOMP 11K8R3F-GP
R86 10KR2J-2-GP
4 RI# D3 D16 USB_VREFOUT TP17 4
SRN4K7J-9-GP-U1 RI#/EXTEVNT0# USB_VREFOUT
1
1
ACPI/WAKE UP EVENTS
LUSB2# PM_SLP_S3#_SB B4 C16 USB_TE1 TP16
RN18 SLP_S3# USB_ATEST1 USB_TE0 TP15
34,45 PM_SLP_S5# E3 SLP_S5# USB_ATEST0 D15
S3_STATE B3 B8
10
9
8
7
6
RI# 34 PM_PWRBTN# PWR_BTN# USB_OC0#/GPM0# USB_OC#01 23

39 SB_PWRGD C3 PWR_GOOD USB_OC1#/GPM1# C8
3D3V_S5 PM_SLP_S3#_SB PM_SUS_STAT# D4 B6 USB_OC#4
2
10KR2J-2-GP2
34 PM_SUS_STAT# R480 SUS_STAT# USB_OC4#/GPM4#
10KR2J-2-GP
PME#_SB KA20GATE 1 2 10KR2J-2-GPF2 C7 USB_OC#2
PCIE_WAKE# KBRCIN# TEST1 USB_OC2#/FANOUT1/LLB#/GPM2# USB_OC#3 USB_OC#2 23
1 R481 2 10KR2J-2-GPE2 TEST0 USB_OC3#/GPM3# B7 USB_OC#3 23
GPM6# ECSCI#_KBC 34 KA20GATE AJ26 A6 AZ_RST#_ICH RP2
GA20IN USB_OC5#/AZ_RST#/GPM5# 3D3V_S5
PM_SLP_S5# ECSMI#_KBC AJ27 B5 USB_OC#6 1 R499 2 ECSWI# USB_OC#4 1 10
PM_PWRBTN# 34 KBRCIN# LUSB2# KBRST# USB_OC6#/GEVENT6# LUSB1#
D6 SMBALERT#/THRMTRIP#/GEVENT2# USB_OC7#/GEVENT7# A5 0R0402-PAD TP19 2 9 USB_OC#6
USB INTERFACE
SYS_REST TP13 1 R128 2 0R0402-PAD ECSCI# C5 USB_OC#01 3 8 LUSB1#
PM_THRM# 34 ECSCI#_KBC ECSMI# LPC_PME#/GEVENT3#
34 ECSMI#_KBC 1 R506 2 0R0402-PAD A25 LPC_SMI#/EXTEVNT1# USB_HSDP7+ A11 USB_PP7 TP103 USB_OC#2 4 7USB_OC#3
ECSWI# 1 R500 2 0R2J-GP S3_STATE D8 B11 USB_PN7 TP104 5 6
34 ECSWI# S3_STATE/GEVENT5# USB_HSDM7- 3D3V_S5
DY SYS_REST D7
PCIE_WAKE# SYS_RESET#/GPM7#
D2 WAKE#/GEVENT8# USB_HSDP6+ A10 USB_PP6 TP101 SRN10KJ-L3-GP
USB_HSDM6- B10 USB_PN6 TP102
34,44 RSMRST#_KBC D1 RSMRST#
A14 USB_PP5 TP105
CLK/RST
USB_HSDP5+
3 SB_OSC_CLK A23 14M_X1/OSC USB_HSDM5- B14 USB_PN5 TP106
B23 14M_X2
USB_HSDP4+ A13 USB_PP4 USB_PP4 23
SIO_CLK_SB AK24 B13 USB_PN4 BlueTooth
SIO_CLK USB_HSDM4- USB_PN4 23
TP87
3D3V_S5 GPIO1 B25 A18 USB_PP3
ROM_CS#/GPIO1 USB_HSDP3+ USB_PP3 23
GPIO6 C25 B18 USB_PN3
GHI#/GPIO6 USB_HSDM3- USB_PN3 23
39,41 VRM_PWRGD C23 VGATE/GPIO7
1 R131 2 10KR2J-2-GP AGP_STP# D24 A17
GPIO4 USB_HSDP2+ USB_PP2 23
1 R130 2 10KR2J-2-GP AGP_BUSY# D23 B17
GPIO5 USB_HSDM2- USB_PN2 23
GPIO
3 A27 3
34 KBC_SLP_WAKE FANOUT0/GPIO3
32 SPKR_SB C24 SPKR/GPIO2 USB_HSDP1+ A21 USB_PP1 23
SMBC_SB 1 R507 2 SMBC_SB_1
33R2J-2-GP A26 B21
SCL0/GPOC0# USB_HSDM1- USB_PN1 23
SMBD_SB 1 R508 SMBD_SB_1
2 33R2J-2-GP B26
DDC1_SCL SDA0/GPOC1#
B27 DDC1_SCL/GPIO9 USB_HSDP0+ A20 USB_PP0 23
3D3V_S0 DDC1_SDA C26 B20
DDC1_SDA/GPIO8 USB_HSDM0- USB_PN0 23
DDC2_SCL C27
DDC2_SDA DDC2_SCL/GPIO11
D26 DDC2_SDA/GPIO12
1 R476 2 10KR2J-2-GP
AVDDTX_0 C21 AVDD_USB
8
7
6
5
RN20 R465
1 DY 2 10KR2J-2-GP C18
AVDDTX_1
DY AVDDTX_2 D13
R469 1 2 33R2J-2-GP D10 AVDD_USB
(NTO USED)
32 AZ_BITCLK AVDDTX_3 3D3V_S5
23 ACZ_BITCLK_MDC R466 1 2 22R2J-2-GP
AZ_BITCLK_ICH J2 D20
AZ_BITCLK AVDDRX_0
K3 D17 1 L7 2
1
2
3
4
48M_AZ AVDDRX_1
SRN10KJ-6-GP 32 ACZ_DOUT R477 1 2 47R2J-L2-GP ACZ_DOUT_ICH J3 AZ_SDOUT AVDDRX_2 C14 0R0603-PAD
1
23 ACZ_DOUT_MDC R468 1 2 33R2J-2-GP K2 C11 C241
AZ_SYNC AVDDRX_3 C265 C236 C229
SC10U10V5ZY-1GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
R467 1 2 33R2J-2-GP AZ_SYNC_ICH
SCD1U16V2ZY-2GP
32 ACZ_SYNC A16 3D3V_AVDDC
2
DDC1_SCL R462 1 AVDDC
23 ACZ_SYNC_MDC 2 33R2J-2-GP
DDC1_SDA B16
DDC2_SCL AVSSC
1 R464 2 10KR2J-2-GP
DDC2_SDA DY A9
AVSS_USB
AVSS_USB A12
USB PWR
1 R463 2 10KR2J-2-GP
AVSS_USB A19
DY R472 2 1 4K7R2J-2-GP G1 AC_BITCLK AVSS_USB A22
21 AC97_DOUT G2 AC_SDOUT AVSS_USB B9 DY
32 ACZ_SDATAIN0 H4 ACZ_SDIN0 AVSS_USB B12
AC97
23 ACZ_SDATAIN1 G3 ACZ_SDIN1 AVSS_USB B19
2 4K7R2J-2-GP 2
R115 2 1 G4 ACZ_SDIN2 AVSS_USB B22
1 R457 2 10KR2J-2-GP H1 AC_SYNC AVSS_USB C9
1
DY 3D3V_S5 R116 1 2 10KR2J-2-GP H3 AC_RST# AVSS_USB C10
21 SPDIF_OUT_STRAP H2 C12 C224 C227
SPDIF_OUT AVSS_USB SC10U10V5ZY-1GP
SCD1U16V2ZY-2GP
C13 DY
2
AVSS_USB
AVSS_USB C17
AVSS_USB C19
AVSS_USB C20
32 ACZ_RST# R478 1 2 33R2J-2-GP AZ_RST#_ICH C22
R470 1 AVSS_USB
23 ACZ_RST#_MDC 2 33R2J-2-GP AVSS_USB D9
AVSS_USB D11
D12 3D3V_AVDDC
AVSS_USB
1 R471 2 10KR2J-2-GP
AVSS_USB D14 L25
DY AVSS_USB D18 1 2
D19 MLB-201209-21-GP
AVSS_USB
1
3D3V_S0 D21
AVSS_USB C772 C764 C763
AVSS_USB D22
SC10U10V5ZY-1GP
SC1U10V3KX-3GP
SCD1U16V2ZY-2GP
2
4
3
DY
RN39
SRN2K2J-1-GP
3D3V_S5
1
2
U30B
14
1 <Variant Name> 1
SMBC_SB 4
3,8 SMBC_SB SMBD_SB
3,8 SMBD_SB 6 PM_SLP_S3# 17,34,38,39,45,56
PM_SLP_S3#_SB 5
Wistron Corporation
TSLCX08MTCX-GP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
7
Title
ATI-SB450 (4 of 5) USB GPIO
A3
Bolsena-E SA
A B C D E
A B
3D3V_S5 C D E
3D3V_S0 3D3V_S0 3D3V_S0 3D3V_S0
R85
4
3
4
3
10KR2J-2-GP
4
3
4
3
4
3
1
RN106 RN103
RN100 RN101 RN97 R458
10KR2J-2-GP
SRN10KJ-5-GP
SRN10KJ-5-GP
DY
SRN10KJ-5-GP
SRN10KJ-5-GP
SRN10KJ-5-GP
2
1
2
1
2
2
17,34,37 LPC_LFRAME#
1
2
1
2
1
2
17 AUTO_ON#
20 AC97_DOUT
17 RTC_CLK Place these R close to
20 SPDIF_OUT_STRAP SouthBridge if possible
4 17,30 CLK33_LAN 4
17,29 CLK33_MINI
17,34 CLK33_KBC
17,37 CLK33_SIO
17 CLK33_LPCROM
17,27 PCLK_R5C832
17 PCI_CLK8
1
R84
DY 10KR2J-2-GP
2
REQUIRED SYSTEM STRAPS LFRAME# ACPWRON AC_SDOUT RTC_CLK SPDIF_OUT PCI_CLK2 PCI_CLK3 PCI_CLK4 PCI_CLK5 PCI_CLK6 PCI_CLK7 PCI_CLK8
(CLK33_LAN) (CLK33_MINI) (CLK33_KBC) (CLK33_SIO) (CLK33_LPCROM) (PCLK_R5C832)
USB PHY ROM TYPE
Thermal Trip is not MANUAL SIO 24MHz 48MHZ PWRDOWN USB INT PCIE_CM_SET
enable as default PWR ON USE DEBUG -Crytsal Pad DISABLE PLL48 HIGH CPU I/F=K8 H,H=PCI (X Bus) ROM
3 STRAP
HIGH
STRAPS INTERNAL RTC
DEFAULT H,L=LPC ROM I
3
Optional DEFAULT DEFAULT DEFAULT DEFAULT
48MHZ-
Thermal Trip is AUTO IGNORE EXTENNAL SIO 48MHz Clock USB PHY USB L,H=LPC ROM II
STRAP enable as default PWR DEBUG RTC (NOT Input PWRDOWN EXT. PCIE_CM_SET CPU I/F=P4
LOW ON STRAPS SUPPORTED ENABLE 48MHZ LOW
Buffer L,L=Firmware Hub ROM
Optional DEFAULT W/IT8712) DEFAULT Use External only
DEFAULT
3D3V_S0
3D3V_S0 3D3V_S0
1
4
3
4
3
1
R360 RN95 RN17 R443
10KR2J-2-GP 10KR2J-2-GP
SRN10KJ-5-GP
SRN10KJ-5-GP
2
2
1
2
1
2
18 PDACK#
17,25,27,29,30 PCI_AD31 DY
17,25,27,29,30 PCI_AD30
17,25,27,29,30 PCI_AD29
17,25,27,29,30 PCI_AD28
2 17,25,27,29,30
17,25,27,29,30
PCI_AD27
PCI_AD26
2
17,25,27,29,30 PCI_AD25
17,25,27,29,30 PCI_AD24
17,25,27,29,30 PCI_AD23
4
3
4
3
RN14 RN16
1
SRN10KJ-5-GP
SRN10KJ-5-GP
R362 R444
1
2
1
2
2
DEBUG STRAPS
DY
PDACK# PCI_AD31 PCI_AD30 PCI_AD29 PCI_AD28 PCI_AD27 PCI_AD26 PCI_AD25 PCI_AD24 PCI_AD23
BYPASS BYPASS IDE PLL USE RESERVED
USE LONG PCI PLL BYPASS ACPI BCLK EEPROM
STRAP RESET RESERVED RESERVED RESERVED RESERVED PCIE <Variant Name>
HIGH
1 STRAPS 1
DEFAULT
Wistron Corporation
USE 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
USE SHORT USE PCI USE ACPI USE DEFAULT Taipei Hsien 221, Taiwan, R.O.C.
STRAP RESET PLL BCLK IDE PCIE Title
LOW PLL STRAPS
DEFAULT DEFAULT DEFAULT DEFAULT ATI-SB400 STRAPPING(5 of 5)
A3 SA
Bolsena-E
FAN1_VCC
5V_S0
*Layout* 15 mil
1
D11 DY *Layout* 15 mil
DY C244 C243 C252 R117
SC10U10V5ZY-1GP SC2200P50V2KX-2GP 10KR2J-2-GP
SCD1U25V3ZY-3GP
2
2
S1N4148-U2 FAN1_VCC FAN1
4
2
1
2
FAN1_FB 3
5
1
C185 MLX-CON3-9-GP
SC100P50V2JN-3GP 20.D0198.103
2
ME : 20.D0198.103
2nd:20.F0714.003
*Layout* 30 mil
5V_S0
5V_S0 U11
1 R150 2 5V_G792_S0 6 1
200R3-GP VCC FAN1
20 DVCC FG1 4
1
5V_S0 14
CLK CLK32_G791 17
1
1
C290 C245 C246 C237 16 THERMDP 6
SDA SMBD_G792 34
SCD1U25V3ZY-3GP R146 7 18
2
DXP1 SCL SMBC_G792 34
1
10KR2J-2-GP
SC4D7U10V5ZY-3GP
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
9 19 To CPU
2
2
R122 DXP2 NC C274
11 DXP3
DY 10KR2J-2-GP SC2200P50V2KX-2GP
2
2
DGND 5 THERMDN 6
ALERT# 15 17 THERM_SYS_DP
2
PR_HW_SDN# ALERT# DGND
13 THERM#
3
V_DEGREE 3 8 C308
THERM_SET SGND1
39 RUNPWROK 1 2 G792_RST# 2 RESET# SGND2 10 C275 1 Q27
1
R144 0R2J-GP 12 SC2200P50V2KX-2GP MMBT3904-U1
2
R145 SGND3 THERM_SYS_DN SC470P50V2KX
Setting T8 as
2
1
49K9R2F-L-GP
100 Degree DY R149 G792SFUF-GP 3904 on system
1
10KR2J-2-GP
2
C253 (Thermal Sensor)

SB SC2200P50V2KX-2GP
2
2
DXP1:108 Degree USE 0R2 63.R0034.1D1 WHEN UMA
V_DEGREE DXP2:H/W Setting
2
G7 G8
=(((Degree-72)*0.02)+0.34)*VCC
DXP3:88 Degree
GAP-CLOSE
GAP-CLOSE
HW thermal shut down tempature
ALERT# 1 R121 2
setting 95 degree . Put Near CPU . 0R2J-GP
PM_THRM# 20
1
DY
VGA_LOCAL_DP 50
VGA_LOCAL_DN 50
Dummy when G792 enhanced T8 function

T8_RSET:27K SET TO 80°C
Dummy when use UMA
5V_AUX_S5
T8_RSET:20K SET TO 90°C By Sourcer requset:
T8_RSET:15K SET TO 100°C
1
Main souce 74.00709.07F
R161
150R2F-1-GP Second souce
U12 74.00710.03P
2
T8_SET 1 SET VCC 5 5V_G709_AUX_S5 74.06509.07F
2 GND
3 OUT# HYST 4 74.06510.A7P
1
R160 C322
20KR2F-L-GP G709T1UF-GP SC4D7U10V5ZY-3GP
2
2
Put under CPU Socket
3D3V_AUX_S5 PURE_THRM_SDN#
6 CPU_THERMTRIP#
2
D40
3
D36
1
R513 RSMRST# 34
3
10KR2J-2-GP 3D3V_AUX_S5
BAW56PT-U
U59 DY <Variant Name>
2
BAT54PT-GP 1 5
A VCC
1
BAW56PT-U
2
C785
34 S5_ENABLE B Wistron Corporation
3
SCD1U16V2ZY-2GP 3 4 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

S5PWR_ENABLE 43,45
2
GND Y Taipei Hsien 221, Taiwan, R.O.C.

DY
DY NC7S08M5X-NL-GP
Title
D38
THERMAL G792
2
(dummy, KBC already delay) 1 R516 2

48 LOW3_OFF Size Document Number Rev
0R2J-GP Custom SA
Bolsena-E
100 mil
5V_USB0_S0
5V_USB0_S0 5V_USB1_S0
USB PORT 5V_USB0_S0
USB_0-
5V_S5 U73 20 USB_PN0 USB2
1 R204 6
1
1 8 1 1KR2J-1-GP
2 1
GND OC1# USB_OC#01 20
2
TC23 C838 C836 2 7 TR2
SE150U10VM-2GP IN OUT1
SCD1U25V3ZY-3GP
SC1000P50V2JN-N1
3 6 R200 USB_0- 2
2
2
EN1/EN1# OUT2 1KR2J-1-GP USB_0+
34 USB_PWR_EN# 4 EN2/EN2# OC2# 5 1 2 USB_OC#2 20 3
DY 4
1
5
G546A2P1UF-GP C428 C429
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
100 mil L-63UH-GP68.03216.20B SKT-USB-97-UGP
3
G5258B2 Active Low 1.5A
5V_USB1_S0
20 USB_PP0
USB_0+ 22.10218.H01
5V_S0
1
RN26
TC14 C463 C848 3 2
A
SE100U10VM-4GP
SCD1U25V3ZY-3GP
SC1000P50V2JN-N1
4 1 5V_USB0_S0
2
D1
SSM5817PT-GP-U SRN0J-6-GP
5V_S5 U1 5V_USB2_S0
K
1 8 USB_1- USB3
GND OUT 20 USB_PN1
2 IN OUT 7 6
3 IN OUT 6 1
USB_PWR_EN# 4 5 R1 1 1KR2J-1-GP
2
EN#/EN FLG USB_OC#3 20
2
100 mil TR3 USB_1- 2
USB_1+ 3
1
5V_USB2_S0 G528P1UF-GP 4
C3 DY 5
SCD1U25V3ZY-3GP
G528P1U Active Low
2
SKT-USB-97-UGP
1
L-63UH-GP68.03216.20B
3
TC1 C5 C4
SE100U10VM-4GP
SCD1U25V3ZY-3GP
SC1000P50V2JN-N1
22.10218.H01
2
USB_1+
SB 0127 20 USB_PP1
RN30
3 2
4 1
SRN0J-6-GP 5V_USB1_S0
USB_2-
20 USB_PN2 USB4
6
1
BLUETOOTH MODULE
2
TR4
USB_2- 2
3D3V_S0 USB_2+ 3
3D3V_BT_S0 U4 DY 4
5
3D3V_BT_S0 1 5
OUT IN
2 L-63UH-GP68.03216.20B SKT-USB-97-UGP
3
GND
3 NC#3 ON/OFF# 4
20 USB_PP2
USB_2+ 22.10218.H01
AAT4250IGV-T1-GP
RN49
BLUE1 34 BLUETOOTH_EN 3 2
9 4 1
8 BT_AUX TP2 TPAD30 SRN0J-6-GP
7 BT_GPIO2 1 R27 2 0R2J-GP DY BT_COEX2 29
6 BT_GPIO1 1 R23 2 0R2J-GP DY USB_3-
BT_COEX1 29 20 USB_PN3 5V_USB2_S0
5 BT_LINK_LED
4 USB_PN4 20
3 USB_PP4 20
2
2 TP1 TR1
TPAD30 USB1
1
1 3D3V_BT_S0 DY DY 6
10 EC8 EC5 DY 1
SC1000P50V2JN-N1
SC1000P50V2JN-N1
ME :20.D0198.108
2
MLX-CON8-9-GP USB_3- 2
20.D0198.108 2ND : 20.F0714.008 L-63UH-GP68.03216.20B USB_3+ 3
3
4
5
USB_3+
20 USB_PP3
SKT-USB-97-UGP
MDC 1.5 CONN RN77
3 2 22.10218.H01
4 1
3D3V_LAN_S5
MDC1 SRN0J-6-GP
13 15
1
MH1 14 ME : 22.10218.H01
1 2 C669
SC1U10V3KX-3GP 2ND : 22.10245.H11
2
20 ACZ_DOUT_MDC 3 4
5 6
20 ACZ_SYNC_MDC 7 8
20 ACZ_SDATAIN1 1 R25 2 AC_DIN1A_R 9 10 <Variant Name>
20 ACZ_RST#_MDC 39R2J-L-GP 11 12 ACZ_BITCLK_MDC 20
MH2 17
16 18
Wistron Corporation
1
1
AMP-CONN12A-GP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

C16 C671 R393 Taipei Hsien 221, Taiwan, R.O.C.
SC22P50V2JN-4GP 20.F0582.012 DUMMY-C2 100KR2J-1-GP
2
Title
USB / MDC / BLUETOOTH
2
2nd source: 20.F0604.012 Size Document Number Rev

A3
Bolsena-E SA
A B C D E
HDD
18 PIDE_D[15..0]
HDD1
46
44 43 5V_S0
17 RSTDRV#_5 PIDE_D7 PIDE_D8
42 41
4
PIDE_D6
PIDE_D5
PIDE_D4
40
38
36
39
37
35
PIDE_D9
PIDE_D10
PIDE_D11
CDROM 4
1
PIDE_D3 34 33 PIDE_D12
PIDE_D2 32 31 PIDE_D13 R363
PIDE_D1 30 29 PIDE_D14 4K7R2J-2-GP
PIDE_D0 28 27 PIDE_D15
26 25
2
24 23 PIDE_IORDY
18 PIDE_DREQ
18 PIDE_IOW# 22 21
18 PIDE_IOR# 20 19
18 PIDE_IORDY 18 17
18 PIDE_DACK# 16 15
18 PIDE_IRQ14 14 13
18 PIDE_A1 12 11
18 PIDE_A0 10 9 PIDE_A2 18
8 7 PIDE_CS#1 18 18 SIDE_D[15..0] ODD1
18 PIDE_CS#0
16 HDD_LED#_5 6 5 PWR TRACE 100mil 51
5V_S0 4 3 5V_S0 2 1
2
5V_S0
1
R353 C643 C642 2 1 4 3

4K7R2J-2-GP 45 SIDE_D8 6 5 RSTDRV#_5
1
SIDE_D9 SIDE_D7
SC10U10V5ZY-1GP
SCD1U25V3ZY-3GP
8 7
2
SIDE_D10 10 9 SIDE_D6 R171

1
5V_S0 DY SIDE_D11 SIDE_D5 4K7R2J-2-GP

20.80175.044 SIDE_D12
12 11
SIDE_D4
14 13
CHANGE TO 20.80592.044 SIDE_D13 16 15 SIDE_D3
2
SIDE_D14 18 17 SIDE_D2 SIDE_IORDY
Dummy when use SATA SIDE_D15 20 19 SIDE_D1
SIDE_D0
3
ME : 20.80592.044 18 SIDE_DREQ 22 21
3
24 23
(DIFFERENT FROM ORCAD P/N) 18 SIDE_IOR#
26 25 SIDE_IOW# 18
18 SIDE_DACK# 28 27 SIDE_IORDY 18
TPAD30 TP52 BAY_ID0 30 29 SIDE_IRQ15 18
TPAD30 TP49 BAY_ID1 32 31 SIDE_A1 18
18 SIDE_A2 34 33 SIDE_A0 18
18 SIDE_CS#1 36 35 SIDE_CS#0 18
38 37 CDROM_LED#_5 16
40 39 1 R165 2
42 41 4K7R2J-2-GP
5V_S0 5V_S0
44 43
46 45
48 47 CSEL
1
50 49
C337 C347 C346 52
SC10U10V5ZY-1GP
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
2
2
For HDD & SATA both SPD-CONN50-4R-14GP
20.80338.050 ME : 20.80338.050
SATA Connector 5V_S0

K
D24 TC18 C631

B240LA-13F-GP SCD1U25V3ZY-3GP
ST100U6D3VDM-5
2
3D3V_S0
A
2 2
1
TC17 C626
ST22U6D3VBM SCD1U16V2ZY-2GP
2
SATA1
23
MH1
1
18 SATA_TXP0 2
18 SATA_TXN0 3
4
18 SATA_RXN0 5
18 SATA_RXP0 6
7
8
9
10
11
5V_S0 12
13
14
PWR TRACE 100mil 15
16
1 17 <Variant Name> 1
18
19
20
21 Wistron Corporation
22 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
MH2 Taipei Hsien 221, Taiwan, R.O.C.
24
Title
SPD-CON22-7-GP ME : 20.F0777.022
20.F0777.022
HDD / CDROM / SATA
Dummy when use IDE A3
Bolsena-E SA
A B C D E
A B C D E
3D3V_S0 CBB_D[0..15] 26
CBB_A[0..25] 26
1
3D3V_S0
R569
4K7R2J-2-GP 3D3V_S0
R570 RN117
1
1
CB_MFUNC2 1 8
2
C908 C907 C912 CB1410_GBRST# 1 2 CB1410_GBRST#_1 CB_MFUNC3 2 7
4 SC1000P50V2JN-N1
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP CB_MFUNC4 3 6 4
2
1
C903 CB_MFUNC5 4 5
3D3V_S0 0R2J-GP
SCD1U16V2ZY-2GP SRN10KJ-6-GP
2
3D3V_S0 VCC_ASKT_S0
3D3V_S0
1
1
C915 C904 C899 C900
SC1000P50V2JN-N1
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP SC1000P50V2JN-N1 C906
2
2
SCD1U16V2ZY-2GP
8
7
6
5
RN116
114
130
102
122
138
126
U79
18
30
44
50
22
42
58
78
94
14
66
86
63
90
SRN47KJ-L1-GP
6
17,21,27,29,30 PCI_AD[31..0]
PCI_AD31 3 125 CBB_REG#
PCI_VCC
PCI_VCC
PCI_VCC
PCI_VCC
GND
GND
GND
GND
GND
GND
GND
GND
GRST# CORE_VCC
CORE_VCC
CORE_VCC
CORE_VCC
CORE_VCC
CORE_VCC
AUX_VCC
SOCKET_VCC
SOCKET_VCC
AD31 REG#/CCBE3# CBB_REG# 26
PCI_AD30 4 116 CBB_A25 CBB_A25 26
1
2
3
4
PCI_AD29 AD30 A25/CAD19 CBB_A24 CBB_OE#
5 AD29 A24/CAD17 113 CBB_A24 26
PCI_AD28 7 111 CBB_A23 CBB_A23 26 CBB_CE1#
PCI_AD27 AD28 A23/CFRAME# CBB_A22 CBB_RESET
8 AD27 A22/CTRDY# 109 CBB_A22 26
PCI_AD26 9 107 CBB_A21 CBB_A21 26 CBB_CE2#
PCI_AD25 AD26 A21/CDEVSEL# CBB_A20
10 AD25 A20/CSTOP# 105 CBB_A20 26
PCI_AD24 11 103 CBB_A19 CBB_A19 26
PCI_AD23 AD24 A19/CBLOCK# CBB_A18
15 AD23 A18/RFU 100 CBB_A18 26
PCI_AD22 16 98 CBB_A17 CBB_A17 26
PCI_AD21 AD22 A17/CAD16 A_CCLKXX R568 1
17 AD21 A16/CCLK# 108 2 33R2J-2-GP CBB_A16 26
PCI_AD20 19 110 CBB_A15 CBB_A15 26
3 PCI_AD19 AD20 A15/CIRDY# CBB_A14 3
23 AD19 A14/CPERR# 104 CBB_A14 26
PCI_AD18 24 101 CBB_A13 CBB_A13 26
PCI_AD17 AD18 A13/CPAR CBB_A12
25 AD17 A12/CCBE2# 112 CBB_A12 26
PCI_AD16 26 95 CBB_A11 CBB_A11 26
PCI_AD15 AD16 A11/CAD12 CBB_A10
38 AD15 A10/CAD9 89 CBB_A10 26
PCI_AD14 39 97 CBB_A9 CBB_A9 26
40 AD13 A8/CCBE1# 99 CBB_A8 26
43 AD11 A6/CAD20 118 CBB_A6 26
46 AD9 A4/CAD22 121 CBB_A4 26
49 AD7 A2/CAD24 127 CBB_A2 26
52 AD5 A0/CAD26 129 CBB_A0 26
PCI_AD4 53 87 CBB_D15 CBB_D15 26
PCI_AD3 AD4 D15/CAD8 CBB_D14
54 AD3 D14/RFU 84 CBB_D14 26
PCI_AD1 AD2 D13/CAD6 CBB_D12
56 AD1 D12/CAD4 80 CBB_D12 26
AD0 D11/CAD2 CBB_D10
17,27,29,30 PCI_CBE#[3..0] D10/CAD31 144 CBB_D10 26
PCI_CBE#3 12 142 CBB_D9 CBB_D9 26
PCI_CBE#2 C_BE3# D9/CAD30 CBB_D8
27 C_BE2# D8/CAD28 140 CBB_D8 26
PCI_CBE#1 37 85 CBB_D7 CBB_D7 26
PCI_CBE#0 C_BE1# D7/CAD7 CBB_D6
48 C_BE0# D6/CAD5 83 CBB_D6 26
28 81 CBB_D5 CBB_D5 26
17,27,29,30 PCI_FRAME# FRAME# D5/CAD3
29 79 CBB_D4 CBB_D4 26 VCC_ASKT_S0
17,27,29,30 PCI_IRDY# IRDY# D4/CAD1
31 76 CBB_D3 CBB_D3 26
17,27,29,30 PCI_TRDY# TRDY# D3/CAD0
R576 33 143 CBB_D2 26
17,27,29,30 PCI_STOP# STOP# D2/RFU
1
2 PCI_AD22 CARD_IDESL 13 CBB_D1 2
1 2 IDSEL D1/CAD29 141 CBB_D1 26
100R2F-L1-GP-U 32 139 CBB_D0 CBB_D0 26
17,27,29,30 PCI_DEVSEL# DEVSEL# D0/CAD27
34 92 CBB_OE# CBB_OE# 26 10KR2J-2-GP
17,27,29,30 PCI_PERR# PERR# OE#/CAD11
35 106 CBB_WE# 26 R574
17,27,29,30 PCI_SERR# SERR# WE#/CGNT# CBB_IORD#
17,27,29,30 PCI_PAR 36 93 CBB_IORD# 26
2
PAR IORD#/CAD13 CBB_IOWR#
17 CLK33_CBUS 21 PCI_CLK IOW#/CAD15 96 CBB_IOWR# 26
17,27,29,30 PCIRST_BUF# 20 RST# WP/IOIS16/CCLKRUN# 136 CBB_WP 26
1
59 RI_OUT#/PME# INPACK#/CREQ# 123 CBB_INPACK# 26

R575 TP120
17 PCI_GNT#1 2 132 CBB_RDY 26
GNT# RDY_IREQ#/CINT#
VCCD0#/SMBDATA/SDATA
10R2J-2-GP 1 133
17 PCI_REQ#1 REQ# WAIT#/CSERR# CBB_WAIT# 26
DY
VCCD1#/SMBCLK/SCLK
CD2/CCD2# 137 CBB_CD2#_1 26

75 CBB_CD1#_1 26
CLK33_PCM12
CD1/CCD1# CBB_CE2#
CE2/CAD10 91 CBB_CE2# 26
1
C914 88 CBB_CE1# CBB_CE1# 26

VPPD0/SLATCH
CE1#/CCBE0#
SC22P50V2JN-4GP
RESET/CRST# 119 CBB_RESET 26

SPKR_OUT#
134 CBB_BVD2# 26
2
BVD2/SPKR/LED/AUDIO
SUSPEND
BVD1/STSCHG/RI/CSTSCHG 135 CBB_BVD1# 26

117
O2MF6
O2MF5
O2MF4
O2MF3
O2MF2
O2MF1
O2MF0
VPPD1
VS2/CVS2 CBB_VS2# 26
VS1/CVS1 131 CBB_VS1# 26
1
C913
SC10P50V2JN-1 CB1410B0-1-U INTA# CARBUS 1 (INT_PIRQE#)
2
74
73
72
71
CBUS_SUSPEND70
69
68
67
65
64
61
60
62
DY INTB# (WIFI) (INT_PIRQF#)

CB_SPKR 32
INTC# 1394 (INT_PIRQG#)
RC12 1 2 43KR3-GP INTD# CardReader (INT_PIRQE#) share
26 VCCD1# PCM_INTA# R573 1
26 VCCD0# 2 0R0402-PAD INT_PIRQE# 17,27
1
PCM_INTB# R572 1 2 0R0402-PAD INT_PIRQF# 17,29
26 VPPD1 CB_MFUNC2 R571
1 26 VPPD0 1
1 2 CB_MFUNC3 47KR2J-2-GP
3D3V_S0
R567 10KR2J-2-GP CB_MFUNC4
CB_MFUNC5
Wistron Corporation
2
PM_CLKRUN# 17,27,29,30,34,37
Title
CardBus_ENE CB1410
A3
Bolsena-E SA
A B C D E
A B C D E
PCMCIA Socket Cardbus I/F Power switch

CBB_D[0..15] 25
CBB_A[0..25] 25
CBB_IORD# 25
PCH1 CBB_IOWR# 25
NP1 CBB_OE# 25
1 CBB_WE# 25
35 CBB_REG# 25 3D3V_S0
CBB_D3 2 CBB_RDY 25
2
4 CBB_CD1# 36 4
CBB_D4 CBB_WP 25 R354
3 CBB_RESET 25
CBB_D11 37
CBB_D5 CBB_WAIT# 25 4K7R2J-2-GP
4 U43
CBB_D12 CBB_INPACK# 25
38
1
CBB_D6 5 1 16 2211_SHDN#
CBB_D13 25 VCCD0# VCCD0# SHTDN#
39 CBB_CE1# 25 25 VCCD1# 2 VCCD1# VPPD0 15 VPPD0 25
CBB_D7 6 CBB_CE2# 25 3 14 VPPD1 25
CBB_D14 3.3V VPPD1
40 CBB_BVD1# 25 3D3V_S0 4 3.3V VCCOUT 13 VCC_ASKT_S0
CBB_CE1# 7 5 12
CBB_D15 CBB_BVD2# 25 5V VCCOUT
41 5V_S0 6 5V VCCOUT 11
1
CBB_A10 8 7 10
GND VPPOUT VPP_ASKT_S0
1
CBB_CE2# 42 C624 C623 8 9
VCC_ASKT_S0 CBB_VS1# 25 OC# 12V
CBB_OE# C622 C621
SC1U10V3ZY-6GP
SCD1U16V2ZY-2GP
9 CBB_VS2# 25
2
CBB_VS1#
SC1U10V3ZY-6GP
SCD1U16V2ZY-2GP
43
2
CBB_A11 10 CP2211F-GP
CBB_IORD# 44
CBB_A9 11
CBB_IOWR# 45
CBB_A8 12
1
C577 C576 CBB_A17 46

1
C575 CBB_A13 13
SCD1U25V3ZY-3GPCBB_A18 47
2
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
CBB_A14 14
2
CBB_A19 48 PC1
C574 CBB_WE# 15 1 2
SC1000P50V2JN-N1 CBB_A20 49
2
CBB_RDY 16
CBB_A21 50 3 4
3
R281 3
17
VPP_ASKT_S0 51 CBB_CD1# 1 2 CBB_CD1#_1 25
18 DY CARD-SKT18-U
1
52 0R2J-GP
CBB_A16 19 C543
21.H0056.001
1
CBB_A22 53 SC270P50V2JN-2GP
2
C901 CBB_A15
SCD1U25V3ZY-3GP CBB_A23
20
54 DY
2
CBB_A12 21
CBB_A24 55 ME : 21.H0056.001 R346
CBB_A7 22
CBB_A25 56 CBB_CD2# 1 2 CBB_CD2#_1 25
CBB_A6 23
1
CBB_VS2# 57
CBB_A16 CBB_A5 0R2J-GP C628
24
CBB_RESET 58 SC270P50V2JN-2GP
2
CBB_A4
CBB_WAIT#
25
59 DY
CBB_A3 26
CBB_INPACK# 60
CBB_A2 27
CBB_REG# 61
Place close to pin 19. CBB_A1 28
1
CBB_BVD2# 62
C902 CBB_A0 29
DUMMY-C2 CBB_BVD1# 63
CBB_D0 30
CBB_D8 64
CBB_D1 31
2
2 CBB_D9 2
65
CBB_D2 32
CBB_D10 66
CBB_WP
Clock AC termination CBB_CD2#
33
67
33MHz clock for 32-bit 34
68
Cardbus card I/F VCC_ASKT_S0
NP2
CARDBUS68P-11-GP
1
R320
DUMMY-R2
47K ME : 62.10024.131
2
1
C598
SCD01U16V2KX-3GP
2
1 <Variant Name> 1
Wistron Corporation
Title
PCMCA / 1394 / CARD READER
A3 SA
Bolsena-E
A B C D E
A B C D E
3D3V_S0 SB
Add 0.01U*4 for TQFP
IC1B 3D3V_S0
1
10 VCC_PCI1 VCC_3V 67
C579 C564 C581 C584 C588 C602 20 VCC_PCI2
SC10U6D3V5MX-LGP
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
27
2
3D3V_S0 VCC_PCI3
32 VCC_PCI4
1
4 41 VCC_PCI5 4
128 C578 C587
VCC_PCI6
SCD01U16V2KX-3GP
SC10U6D3V5MX-LGP
2
2
61 VCC_RIN
16 VCC_ROUT1
R5C832_VCCROUT 34 VCC_ROUT2
1
1
64 VCC_ROUT3
C558 C562 C559 C563 114 VCC_ROUT4
1
SC10U6D3V5MX-LGP
SCD1U10V2KX-LGP
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
120
2
2
C613 C565 C585 C561 VCC_ROUT5
SCD47U10V3KX-LGP
SCD01U16V2KX-3GP
SCD47U10V3KX-LGP
SCD01U16V2KX-3GP
86
2
VCC_MD
GND1 4
GND2 13
PCI_AD31 125 22
PCI_AD30 AD31 GND3
126 AD30 GND4 28
PCI_AD29 127 54
PCI_AD28 AD29 GND5
1 AD28 GND6 62
PCI_AD27 2 63
PCI_AD26 AD27 GND7
3 AD26 GND8 68
PCI_AD25 5 118
PCI_AD24 AD25 GND9
6 AD24 GND10 122
PCI_AD23 9
PCI_AD22 AD23
11 AD22
PCI_AD21 12 99
PCI_AD20 AD21 AGND1
14 AD20 AGND2 102
PCI_AD19 15 103
3 PCI_AD18 AD19 AGND3 3D3V_S0 3
17 AD18 AGND4 107
PCI_AD17 18 111
PCI_AD16 AD17 AGND5
19 AD16
1
PCI_AD15 36
PCI_AD14 AD15 R304
37 AD14
PCI_AD13 38 10KR2J-2-GP
PCI_AD12 AD13
17,25,29,30 PCI_CBE#[3..0] 39 AD12 DY DY
PCI_AD11 40 D20
2
AD11
PCI / OTHER
PCI_AD10 42 69 GBUS_GRST#_2 A KGBUS_GRST#_3 1 2
AD10 HWSPND# 0R2J-GP GBUS_GRST# 34
PCI_AD9 43 R289
PCI_AD8 AD9
17,21,25,29,30 PCI_AD[31..0] 44 CH751H-40PT-1GP
PCI_AD7 AD8 3D3V_S0
46 AD7
PCI_AD6 47 58 MSEN 1 2
PCI_AD5 AD6 MSEN R292 10KR2J-2-GP
48 AD5
3D3V_S5 3D3V_S0 PCI_AD4 49 55 XDEN 1 2
PCI_AD3 AD4 XDEN R294 10KR2J-2-GP
50 AD3
PCI_AD2 51
PCI_AD1 AD2 UDIO5
52 AD1 UDIO5 57 1 2
1
DY DY PCI_AD0 53 R293 100KR2J-1-GP

R342 R339 AD0
17,25,29,30 PCI_PAR 33 PAR
10KR2J-2-GP 100KR2J-1-GP PCI_CBE#3 7 65 UDIO3 1 2
PCI_CBE#2 C/BE3# UDIO3 UDIO4 R2901
21 C/BE2# UDIO4 59 2 10KR2J-2-GP
PCI_CBE#1 35 R291 10KR2J-2-GP
2
PCI_CBE#0 C/BE1#
D22 45 56
GBUS_GRST# PCI_AD17 C/BE0# UDIO2
K A 1 2 R5C834_IDSEL 8 IDSEL
R318 10R2J-2-GP 60 PCI_SPKR 32
UDIO1
DY CH751H-40PT-1GP 17 PCI_REQ#3 124 REQ#
17 PCI_GNT#3 123 GNT# UDIO0/SRIRQ# 72 P_SERIRQ 17,34,37
17,25,29,30 PCI_FRAME# 23 FRAME#
2 2
1 2 17,25,29,30 PCI_IRDY# 24 IRDY#
R341 DY 0R2J-GP 25
17,25,29,30 PCI_TRDY# TRDY#
17,25,29,30 PCI_DEVSEL# 26 DEVSEL#
17,25,29,30 PCI_STOP# 29 STOP# INTA# 115 INT_PIRQG# 17
PCIRST_BUF# 1 2
17,25,29,30 PCI_PERR# 30
31
PERR#
116
1394 : INTA#
17,25,29,30 PCI_SERR# SERR# INTB# INT_PIRQE# 17,25
R330 0R2J-GP
GBUS_GRST#_1 71
7in1 : INTB#(INT_PIRQE#)share
GBRST#
SB 17,25,29,30 PCIRST_BUF# 119 PCIRST#
Solve S3 wake up and leakage issue
17,21 PCLK_R5C832 121 PCICLK
SHIELD 3D3V_S0 1 2 CBUS_PME# 70 66 R5C832_TEST
1
PME# TEST
1
GND R309 10KR2J-2-GP TP78 TPAD30

R331 17,25,29,30,34,37 PM_CLKRUN# 1 2PM_CLKRUN#_R5C832117 CLKRUN#
10R2J-2-GP R328 0R2J-GP
1
2
R329 R300
2
DY 1KR2J-L1-GP 100KR2J-1-GP
PCLK_R5C832_PL1
R5C832-1-GP
2
1
1
C614
SC10P50V2JN-4GP
2
1 1
Wistron Corporation
Title
R5C832_1394_7IN1(2/2)
A3
Bolsena-E SA
A B C D E
5 4 3 2 1
IC1A U78 3D3V_S0

3D3V_S0 +3VRUN_PHY +3VRUN_CARD
+3VRUN_PHY 1 5
OUT IN
1 2 2 GND
L17 MLB1608080600A1GP 3 4 MC_PWR_CTRL_0
NC#3 ON/OFF#
98
AVCC_PHY1
20mil
1
AVCC_PHY2 106
1
110 C609 C600 C610 AAT4250IGV-T1-GP
AVCC_PHY3
SC10U6D3V5MX-LGP
SCD1U10V2KX-LGP
SCD01U16V2KX-3GP
C897 C898
112
For SD/MS Card Power
2
AVCC_PHY4
SCD1U10V2KX-LGP
SC1U10V3ZY-6GP
2
2
GUARD GND
1 2 1394_XI 113 TPBIAS0
C591 SC15P50V2JN-2-GP TPBIAS0 Reserve R547,R548,R550,R551 for co-layout
D D
1
SC 94
X4 XI
X-24D576MHZ-39GP check with EMI, can change to 0 ohm CLOSE TO CHIP
1 R523 2
104 TPB0N 0R3J-3-GP
2
TPBN0
DY
1 2 1394_XO 95 105 TPB0P C612 C625 R327 R326
XO TPBP0
1
SCD01U16V2KX-3GP
SCD33U10V3KX-2GP
C593 SC15P50V2JN-2-GP
56R2J-4-GP
56R2J-4-GP
NCMS20C900-GP
4
3
6
2
GUARD_GND 4 TPA0+
IEEE1394/SD
108 TPA0N 3 TPA0- TPBIAS0
2
TPAN0 TPA0P
2
1 2 RICHO_FILO 96 109 TPA0P 1 TPA0N
C599 SCD01U16V2KX-3GP FIL0 TPAP0 TPB0P
5
1 R525 2 TPB0N
SKT1 L27 R337
0R3J-3-GP
1 2RICHO_REXT 101 SKT-1394-4P-14GP DY 1 2 1 2
2
R323 10KR2F-2-GP REXT 22.10218.M01 R324 5K11R2F-L1-GP
56R2J-4-GP 1394_TPB1_R
NCMS20C900-GP
4
3
1 2 1 2
1 2 RICHO_VREF 100 1 R522 2 R32556R2J-4-GP C611 SC270P50V2JN-2GP
C601 SCD01U16V2KX-3GP VREF 0R3J-3-GP
G50
1 2 DY
GUARD_GND
GUARD GND GAP-CLOSE TPB0+
C G51 C
1 2 TPB0- L29
87 XD_DATA7
2
MDIO17
GAP-CLOSE
92 XD_DATA6
MDIO16 GUARD_GND 1 R526 2
89 XD_DATA5 0R3J-3-GP
MDIO15
DY
91 XD_DATA4
MDIO14
90 SD/XD/MS_DATA3_1
MDIO13
93 SD/XD/MS_DATA2_1
MDIO12 +3VRUN_CARD
81 SD/XD/MS_DATA1_1
MDIO11 CARD1
82 SD/XD/MS_DATA0_1
MDIO10
40 XD-VCC SM-CD-COM 2
1
29 S.M-VCC SM-CD-SW 3
75 XD_WP# C896 C905 C894 20 43
MDIO05 SCD1U16V2ZY-2GP MS-VCC SM-WP-SW
SCD1U16V2ZY-2GP
9
2
SD/XD/MS_CMD SD-VCC SD/XD/MS_CMD
SC1U10V3ZY-6GP
MDIO08 88 MS-BS 13
17 MS_INS#
XD_ALE SD/XD/MS_DATA0_1 MS-INS SD/XD/MS_CLK
MDIO19 83 7 SD-DAT0 MS-SCLK 19
SD/XD/MS_DATA1_1 6
XD_CLE SD/XD/MS_DATA2_1 SD-DAT1
MDIO18 85 12 SD-DAT2 RSV#4 4
D19 SD/XD/MS_DATA3_1 11 39 XD_SW#
XD_CE# SD-DAT3 XD-CD
MDIO02 78 1
SD-CD-COM 41
B SD/XD/MS_DATA0_1 SD_CD# B
3 15 MS-DATA0 SD-CD-SW 42
77 SD_WP#(XDR/B#) SD/XD/MS_DATA1_1 14 5 SD_WP#(XDR/B#)
MDIO03 SD/XD/MS_DATA2_1 MS-DATA1 SD-WP-SW SD/XD/MS_CLK
2 16 MS-DATA2 SD-CLK 8
80 SD_CD# SD/XD/MS_DATA3_1 18 10 SD/XD/MS_CMD
MDIO00 MS-DATA3 SD-CMD
BAS16-1-GP
D18 38 XD_CLE
MS_INS# XD_SW# SD/XD/MS_DATA1_1 S.M#/XD-CLE XD_ALE
MDIO01 79 1 33 S.M/XD-D1 S.M#/XD-ALE 37
SD/XD/MS_DATA2_1 32 36 SD/XD/MS_CMD
SD/XD/MS_DATA3_1 S.M/XD-D2 S.M#/XD-WE XD_CE#
3 31 S.M/XD-D3 S.M#/XD-CE 28
84 SD/XD/MS_CLK XD_DATA4 21 27 SD/XD/MS_CLK
MDIO09 XD_DATA5 S.M/XD-D4 S.M#/XD-RE SD_WP#(XDR/B#)
2 22 S.M/XD-D5 S.M#/XD-R/B 26
XD_DATA6 23 35 XD_WP#
MC_PWR_CTRL_0 XD_DATA7 S.M/XD-D6 S.M/XD-WP-IN
76 BAS16-1-GP 24
MDIO04 S.M/XD-D7
74 MS_LED# 46
MDIO06 TP80 GND
25 S.M-LVD GND 45
1
97 RSV 30 S.M-CD# GND 44

73 R566 SD/XD/MS_DATA0_1 34 1
MDIO07 S.M-D0 GND
100KR2J-1-GP
R5C832-1-GP SD
2
SKT-MEMO-12-GP
62.10051.431
A A
Wistron Corporation
Title
R5C832_1394_7IN1(2/2)
A3
Bolsena-E SA
5 4 3 2 1
A B C D E
MINI-PCI
4 4
3D3V_S0
17,21,25,27,30 PCI_AD[31..0]
17,25,27,30 PCI_CBE#[3..0]
1
C806 C834 C802 C835
SC4D7U10V5ZY-3GP SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
2
DY
MINI1
125 5V_S0
TIP 1 2 RING
3D3V_S0 WLAN_LED# 16
3 4
1
5 6 C833
2
SCD1U25V3ZY-3GP
7 8 DY
9 10 C807 R517
2
80211_ACTIVE 11 12 SC4D7U10V5ZY-3GP 100KR2J-1-GP D
2
34 WIRELESS_EN 13 14
3
15 16
1
MINI_P_IRQF# 17 18 DY Q26
19 20 MINI_P_IRQF# 1 R521 2 2N7002PT-U
3D3V_S0 INT_PIRQF# 17,25
21 22 0R0402-PAD 80211_ACTIVE 1
3 23 24 3
G
17,21 CLK33_MINI 25 26 PCIRST_BUF# 17,25,27,30
2
27 28 S
17 PCI_REQ#0 29 30 PCI_GNT#0 17
31 32
PCI_AD31 33 34 PME#_MINI
PCI_AD29 35 36 BT_COEX1 23
37 38 PCI_AD30
PCI_AD27 39 40 TP109
PCI_AD25 41 42 PCI_AD28 TPAD30
43 44 PCI_AD26
23 BT_COEX2
PCI_CBE#3 45 46 PCI_AD24
PCI_AD23 47 48 MINI_IDSEL 1 R534 2 PCI_AD21 D
49 50 100R2F-L1-GP-U
3
3D3V_S0 PCI_AD21 51 52 PCI_AD22
PCI_AD19 53 54 PCI_AD20 Q25
55 56 2N7002PT-U
PCI_PAR 17,25,27,30
PCI_AD17 57 58 PCI_AD18 WIRELESS_EN 1
1
PCI_CBE#2 59 60 PCI_AD16 G
R533 17,25,27,30 PCI_IRDY# 61 62
2
10KR2J-2-GP 63 64 S
PCI_FRAME# 17,25,27,30
17,25,27,30,34,37 PM_CLKRUN# 65 66 PCI_TRDY# 17,25,27,30
17,25,27,30 PCI_SERR# 67 68 PCI_STOP# 17,25,27,30
2
69 70
17,25,27,30 PCI_PERR# 71 72 PCI_DEVSEL# 17,25,27,30
PCI_CBE#1 73 74
PCI_AD14 75 76 PCI_AD15
77 78 PCI_AD13
2 PCI_AD10 2
81 82
83 84 PCI_AD9
PCI_AD8 85 86 PCI_CBE#0
PCI_AD7 87 88
89 90 PCI_AD6
93 94 PCI_AD2
Q24
5V_S0 97 98 (VCC) 3 OUT
PCI_AD1 99 100 2 R1
34 WLAN_TEST_LED
101 102 IN 1 GND
103 104 (M66EN) R2
105 106 DTC124EKA-1-GP
107 108
109 110
111 112
113 114
115 116
117 118
119 120
121 122
123 124
126
PCISLT124-4-GP
62.10032.061
1 <Variant Name> 1
ME : 62.10032.061
2ND : 62.10043.221
62.10032.031 - 2ND
Wistron Corporation
Title
MINI-PCI
A3 SA
Bolsena-E
A B C D E
A B C D E
17,25,27,29 PCI_CBE#[3..0]
TGN0 TGN1 TGN2 TGN3
CLOSE TO 17,21,25,27,29 PCI_AD[31..0]
LAN CHIP
TGP0 TGP1 TGP2 TGP3
4
3
4
3
4
3
4
3
RN91 RN92 RN93 RN94
SRN49D9F-GP SRN49D9F-GP SRN49D9F-GP SRN49D9F-GP => LED1 : LINK
LAN_X2 1 2 C690
RTL_LED1# 1 R47 2 0R0402-PAD SC12P50V2JN-LGP
10M_LED# 31
2
X5
1
2
1
2
1
2
1
2
4 4
XTAL-25MHZ-70GP
1
1
1
LAN_X1 1 2 C691
C672 C673 C674 C675 SC12P50V2JN-LGP
SCD01U50V3KX-4GP SCD01U50V3KX-4GP SCD01U50V3KX-4GP SCD01U50V3KX-4GP
2
2
Dummy when use 10/100 3D3V_LAN_S5
LAVDDH U10
DY LAN_EECS_3 1 8
CS VCC
1
LAN_X1 1 R427 2 10KR2J-2-GP LAN_EESK 2 7
3D3V_LAN_S5 SK DC
1 R426 2 3K6R3-GP LAN_EEDI 3 6 C696
3D3V_LAN_S5 DI ORG SCD1U25V3ZY-3GP
LAN_X2 LAN_EEDO 4 5
2
DO GND
CTRL18 AT93C46-10SU-1GP
ACT_LED# EEPROM LED OPTION USE '01'
ACT_LED# 31
LDVDD_A LDVDD
RTL_LED1# => LED0 : ACT (DEFINED IN SPEC)
Dummy when use Giga TP6 TPAD28
=> LED0 : ACT
TP5 TPAD28 LAN_EESK => LED1 : LINK
1 R43 2 LDVDD (BOTH 10/100 AND GIGA CHIP)
5K6R3F-GP LAN_EEDI 45 Ohm,
LAN_EEDO
3D3V_LAN_S5 3D3V_LAN_S5 600mA LAVDDH
3D3V_LAN_S5
1 R38 2 LAN_EECS_3
2K49R3F-GP
PCI_AD0 1 L21 2
3
Dummy when use 10/100 RSET PCI_AD1 0R0603-PAD 3
1
C86 C676 C683 C80 C96 C88 C56 C678 C670
128
127
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105
104
103
U52
SC10U10V5ZY-1GP
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
2
2
VSS
RSET
AVDD18
CTRL18
VSS
VSS
XTAL2
XTAL1
AVDDH
VSSPST
GND
LED0
VDD18
LED1
LED2
LED3
GND
EESK
VDD18
EEDO
EECS
LANWAKE
EEDI
VDD33
PCIAD0
PCIAD1
Dummy when use Giga
0R2J-GP
CTRL25 1 R69 2
TGP0 1 102 PCI_AD2 3D3V_LAN_S5
31 TGP0 MDI0+ PCIAD2
31 TGN0 TGN0 2 101
LAVDDL MDI0- VSSPST
3 AVDDL GND 100
3
4 99 LDVDD
TGP1 VSS VDD18 PCI_AD3 Q5
31 TGP1 5 MDI1+ PCIAD3 98 1
TGN1 6 97 PCI_AD4 BCP69T1-1-GP
31 TGN1 MDI1- PCIAD4
LAVDDL 7 96 PCI_AD5 CTRL18 1 2 45 Ohm,
2
AVDDL PCIAD5
Dummy when use 10/100 CTRL25 8 CTRL25 PCIAD6 95 PCI_AD6 R70 0R2J-GP
LDVDD 600mA
9 VSS VDD33 94
LAVDDH 1 R29 2
0R2J-GP
LAVDDH 10 AVDDH PCIAD7 93 PCI_AD7
PCI_CBE#0
Dummy when use 10/100 LDVDD_A
11 HSDAC+ CBEB0 92
LDVDD 1 R28 2 LV_12P 12 91 1 L3 2
0R2J-GP HSDAC- VSSPST PCI_AD8 0R0603-PAD
13 VSS PCIAD8 90
Dummy when use Giga TGP2 14 MDI2+ PCIAD9 89 PCI_AD9
1
TGN2 15 88 C43 C42 C57 C74 C694 C89 C87 C73 C68
LAVDDL MDI2- M66EN PCI_AD10 C55
31 TGP2 16 AVDDL PCIAD10 87
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
31 TGN2 17 86 PCI_AD11
2
TGP3 VSS PCIAD11 PCI_AD12
31 TGP3 18 MDI3+ PCIAD12 85
2 3D3V_S0 TGN3 2
31 TGN3 19 MDI3- VDD33 84
1 LAVDDL 20 83 PCI_AD13
R395 2 1KR2J-1-GP AVDDL PCIAD13 PCI_AD14
3 1 21 VSSPST PCIAD14 82
-1 0308 2 D8 BAT54PT-GP 22 81
R394 2 ISOLATE# GND VSSPST
1 23 ISOLATE# GND 80
15KR2F-GP LDVDD 24 79 PCI_AD15
INT_PIRQH# VDD18 PCIAD15 LDVDD
17 INT_PIRQH# 25 INTA# VDD18 78
26 77 PCI_CBE#1
3D3V_LAN_S5 VDD33 CBEB1
17,25,27,29 PCIRST_BUF# 27 76 PCI_PAR
PCIRST# PAR PCI_PAR 17,25,27,29 3D3V_LAN_S5
17,21 CLK33_LAN CLK33_LAN
PCI_GNT#2
28 PCICLK SERR# 75 PCI_SERR#
PCI_SERR# 17,25,27,29 Dummy when use Giga
17 PCI_GNT#2 29 GNT# NC#74 74
17 PCI_REQ#2 PCI_REQ#2 30 73
R396 2 PME#_LAN REQ# GND
20 PME#_SB 1 31 PME# NC#72 72
1
0R0402-PAD LDVDD 32 71
PCI_AD31 VDD18 VDD33 PCI_PERR# CTRL25 Q3 R68
33 PCIAD31 PERR# 70 PCI_PERR# 17,25,27,29 1
PCI_AD30 34 69 PCI_STOP# BCP69T1-1-GP 0R3J-3-GP
PCIAD30 STOP# PCI_DEVSEL# PCI_STOP# 17,25,27,29
35 68 PCI_DEVSEL# 17,25,27,29
2
PCI_AD29 GND DEVSEL# PCI_TRDY# LAVDDL
36 67 PCI_TRDY# 17,25,27,29
2
PCIAD29 TRDY#
PCI_AD28 37 PCIAD28 VSSPST 66
PM_CLKRUN#
Dummy when use 10/100
38 VSSPST CLKRUN# 65 PM_CLKRUN# 17,25,27,29,34,37
PCIAD27
PCIAD26
PCIAD25
PCIAD24
PCIAD23
PCIAD22
PCIAD21
PCIAD20
PCIAD19
PCIAD18
PCIAD17
PCIAD16
FRAME#
VSSPST
C17 C41 C39 C38 C40

CBEB3
CBEB2
VDD33
VDD18
VDD18
VDD33
VDD18
1
IRDY#
IDSEL
(10/100) 71.08100.C0G - (GIGA ver:D) 71.08110.C0G

GND
GND
GND
SC10U10V5ZY-1GP
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
CLK33_LAN
SCD1U25V3ZY-3GP
GIGALAN: RTL8110SBL
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
1
RTL8110SBL
C679
SC10P50V2JN-1
10/100 LAN:RTL8100C
1 <Variant Name> 1
2
PCI_AD27 LDVDD
PCI_AD26 PCI_IRDY#
PCI_IRDY# 17,25,27,29
PCI_FRAME#
3D3V_LAN_S5
PCI_AD25 PCI_CBE#2
PCI_FRAME# 17,25,27,29 Wistron Corporation
PCI_AD24 PCI_AD16 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
PCI_CBE#3 PCI_AD17 Taipei Hsien 221, Taiwan, R.O.C.
LDVDD PCI_AD18
LAN_IDSEL G59 Title
PCI_AD23 3D3V_LAN_S5
PCI_AD23 R413 2 LAN_IDSEL PCI_AD19
1
100R2F-L1-GP-U PCI_AD22 LDVDD
3D3V_S5 1 2 3D3V_LAN_S5 RTL8110SBL/RTL8100C
PCI_AD21 PCI_AD20 GAP-CLOSE-PWR Size Document Number Rev
A3 SA
Bolsena-E
A B C D E
A B C D E
Link: Green - 10Mbps/802.11b Activity: Yellow

Orange - 100Mbps/802.11a
Yellow - 1Gbps
LAN1
9 22.10177.721
TIP RJ11_1
RING RJ11_2 22.10177.711
LINK:GREEN ON LED COLOR CONN_PWR_B2
30 10M_LED# 10M_LED# A1 A1:GREEN CONN_PWR
1
3D3V_LAN_S5 2 R5 1CONN_PWR A2
470R2J-2-GP EC2 EC3
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
4 A3 A3:ORANGE 4
2
TDP_RJ45-1 RJ45_1
TDN_RJ45-2 RJ45_2
RDP_RJ45-3 RJ45_3
RJ45-4 RJ45_4
RJ45-5 RJ45_5
RDN_RJ45-6 RJ45_6 10M_LED#
RJ45-7 RJ45_7
RJ45-8 RJ45_8 ACT_LED#
3D3V_LAN_S5 2 R6 1 CONN_PWR_B2 B1
470R2J-2-GP
1
30 ACT_LED# ACT_LED# B2 B2:YELLOW C9 C8
10
SC1000P50V2JN-N1
SC1000P50V2JN-N1
ACT:YELLOW BLINKING
2
SKT-RJ45+RJ11-2GPU
22.10177.711 - 2ND
22.10177.721
ME : 22.10177.721
2nd : (canceled)
MDCW1
3
MLXCON2
L1
1 TIP_MDC 1 2 BLM18HG601SN-GP TIP
2 RING_MDC 1 2 BLM18HG601SN-GP RING
L2
3 RJ45-8 3
10/100M Lan Transformer
4
21.D0010.102 RJ45-7
RJ45-5
ME : 21.D0010.102 U46 RJ45-4
30 TGP0 7 10 TDP_RJ45-1
TD+ TX+
8
7
6
5
30 TGN0 8 9 TDN_RJ45-2 RN6
TD- TX-
RD+ 1 TGP1 30
6 CT RD- 2 TGN1 30
MCT3 14
MCT4 CT RDP_RJ45-3
11 16
1
2
3
4
V_DAC CT RX+ RDN_RJ45-6 SRN0J-4-GP
3 CT RX- 15
MCT1 MCT2
XFORM-112 LANKOM 68.0H80P.301
68.0H80P.301
Dummy when use Giga
2 2
LANKOM 68.02402.30A
GIGA Lan Transformer netSWAP 68.62401.301 (GIGA ,Thick)
NETSWAP GIGA THICK PN IS 68.62401.301, DON'T USE NETSWAP THIN
U47
30 TGP3 2 23 RJ45-7
TD1+ MX1+ RJ45-8
30 TGN3 3 TD1- MX1- 22 1.route on bottom as differential pairs.
30 TGP2 5 20 RJ45-4 2.Tx+/Tx- are pairs. Rx+/Rx- are pairs.
TD2+ MX2+ RJ45-5
30 TGN2 6 TD2- MX2- 19 3.No vias, No 90 degree bends.
30 TGP1 8 17 RDP_RJ45-3 4.pairs must be equal lengths.
TD3+ MX3+ RDN_RJ45-6
30 TGN1 9 TD3- MX3- 16 5.6mil trace width,12mil separation.
30 TGP0 11 14 TDP_RJ45-1 6.36mil between pairs and any other trace.
TD4+ MX4+ TDN_RJ45-2
30 TGN0 12 TD4- MX4- 13 7.Must not cross ground moat,except
LAVDDL 1 R398 2 V_DAC 1 24 MCT1 RJ-45 moat.
0R2J-GP TCT1 MCT1 MCT2
4 TCT2 MCT2 21
7 18 MCT3
TCT3 MCT3 MCT4
10 TCT4 MCT4 15
1
C18 C19 C21 C20 XFORM-207-GP

8
7
6
5
SCD01U50V3KX-4GP
1 68.62401.30A RN7 1
SCD01U50V3KX-4GP
SCD01U50V3KX-4GP
SCD01U50V3KX-4GP
Dummy when use 10/100

2
Wistron Corporation
1

1
2
3
4
C14 C11 SRN75J-1-GP Taipei Hsien 221, Taiwan, R.O.C.

SCD1U25V3ZY-3GP
2 1 LAN_TC_GND
2
SC1KP2KV8KX-GP Title
LAN CONN
Dummy when use 10/100 1 2 C10 DY
SC1000P50V2JN-N1 Size Document Number Rev
Dummy when use Giga A3
Bolsena-E SA
A B C D E
5 4 3 2 1
5VA_S0
5V_S0
1
1
R334
C615 28K7R2F
SC22P50V2JN-4GP
2
2
U42
D 1 5 5VA_SET D
SHDN# SET
2 5V_AUDIO_S0
GND
1
C604 3 4
IN OUT R335
1
SC1U10V3KX-3GP
G923-330T1UF-GP 10KR2F-2-GP
1
C616
2
SC10U10V5ZY-1GP
2
AUD_AGND
AUD_AGND
3D3V_S0 5VA_S0
25 CB_SPKR C606 1 2 "VAUX" Pull high to enable standby mode
SCD1U10V2KX-LGP
SRN47KJ-L1-GP
SCD1U10V2KX-LGP
SCD1U10V2KX-LGP
1
C620
CB_SPKR_1 4 5 C596
20 SPKR_SB C594 1 2 3 6 AUDIO_BEEP 1 2AUDIP_PC_BEEP C597 C589 C582
KBC_BEEP_12 7 SCD1U10V2KX-LGP
2
SPKR_SB_1 1 8 SC1U10V3KX-3GP
1
RN75 AUD_AGND AUD_AGND
34 KBC_BEEP C595 1 2 R336 C607
1KR2J-1-GP SC100P50V3JN-2GP
2
C C
ACZ_RST# 20
ACZ_SYNC 20
27 PCI_SPKR C605 1 2 PCI_SPKR_1 2 AZ_BITCLK 20
2 1
10KR2J-2-GP
R338
AUD_AGND R316
1 2 MIC_JKIN#_1 33
25
38
12
11
10
33
44
43
34
13
U40 20KR2F-L-GP
1
9
6
DVDD1
DVDD2
AVDD1
AVDD2
PCBEEP
RESET#
SYNC
BIT-CLK
VAUX
LFE-OUT
CEN-OUT
SENSE_B
SENSE_A
23 LINE1-L SDATA-OUT 5 ACZ_DOUT 20
24 8 AC97_DATIN
1 R319 2 ACZ_SDATAIN0 20
LINE1-R SDATA-IN 39R2J-L-GP
14 LINE2-L
15 LINE2-R
SPDIFO 48 SPDIF 33
29 LINE1-VREFO SPDIFI/EAPD 47 G1421_MUTE 33
31 LINE2-VREFO
1
C618
C619 45 R313
33
33
33
AUD_MICIN_L
AUD_MICIN_R
INT_MIC
SC1U10V3ZY-6GP
SC1U10V3ZY-6GP
SC1U10V3ZY-6GP
1
1
1
2
2
2
MIC1_L
MIC1_R
MIC2_L
21
22
16
MIC1-L
MIC1-R
ALC 883 SIDESURR-OUT-L
SIDESURR-OUT-R 46 4K7R2J-2-GP
2
MIC2-L
17 MIC2-R SURR-OUT-L 39
B C617 B
SURR-OUT-R 41
2K2R2J-2-GP 1 R314 2 MIC1V_R 32
2K2R2J-2-GP MIC1V_L MIC1-VREFO-R
1 R322 2 28 MIC1-VREFO-L
1 2 MIC2_0 30 35 AUD_LOL 33
2K2R2J-2-GP R317 MIC2-VREFO FRONT-OUT-L
FRONT-OUT-R 36 AUD_LOR 33
PIN37_VREFO
2
C583 C592 C590

SC4D7U10V5ZY-3GP
SC4D7U10V5ZY-3GP
SC4D7U10V5ZY-3GP
CD-GND
DVSS1
DVSS2
AVSS1
AVSS2
JDREF
1
GPIO0
GPIO1
VREF
CD-R
CD-L
ALC883-1-GP 71.00883.A0G
26
42
4
7
27
40
37
2
3
18
20
19
1
C608
SC10U10V5ZY-1GP
2
AUD_AGND AUD_AGND G49

1 2
GAP-CLOSE
AUD_AGND
A <Variant Name> A
Wistron Corporation
Title
AUDIO (1/2) -- CODEC ALC655
A3 SA
Bolsena-E
5 4 3 2 1
A B C D E
5V_S0 5VA_OP_S0
1
G53
2
ALL AUD_AGND -> AMPGND SB 0203
G55 GAP-CLOSE
Internal Speaker
2 1
GAP-CLOSE-PWR SPK1
1
G56 GAP-CLOSE SPKR_L- 6
C627 1 2 C639 2 1 4
SC4D7U10V5ZY-3GP SPKR_L+ 3
2
SC220P50V2KX-3GP G52 GAP-CLOSE 2
2 1 SPKR_R+
AMPGND C640 1
1 2CSOUTL1 1 R357 2 HP_L 1 R356 2 G54 GAP-CLOSE SPKR_R- 5
10KR2J-2-GP 10KR2J-2-GP 2 1
1
SC2D2U16V5ZY-GP MLX-CON4-19-GP
C916 C917 C919 C918
SC680P50V2KX-2GP
SC680P50V2KX-2GP
SC680P50V2KX-2GP
SC680P50V2KX-2GP
4 AMPGND 20.D0198.104 4
2
1 2 C638 5V_S0
SC220P50V2KX-3GP
1 R347 2 AMPGND
C911 10KR2J-2-GP ME : 20.D0198.104
10
14
1 2CSOUTL2 1 R578 2 L_LINE_IN 1 R577 2 1 R343 2 AMPGND
32 AUD_LOL 15KR2F-GP 18KR2F-GP U3C D23 10KR2J-2-GP 2ND : 20.F0714.004
SC2D2U16V5ZY-GP 8 9 3 4
U44
DY G1421_MUTE 32
5VA_OP_S0 4 3 SPKR_L+ 2 5
7
HP_L LLINEIN LOUT+ SPKR_L- TSAHCT125PW-GP KBC_MUTE 34
5 LHPIN LOUT- 10
L_BYPASS 6 LBYPASS HP_IN SYS_LOUT_IN
7 LVDD SE/BTL# 14 1 6
HP/LINE# 16
8 11 AUD_MUTE RB731U-1GP-U
SHUTDOWN MUTEIN
1
1
2 TJ MUTEOUT 9
C910 C909 C634 HP_IN_1 17 1 R340 R344
HP-IN GND/HS
SC1U10V3KX-3GP
SC10U10V5ZY-1GP
SCD1U25V3ZY-3GP
AMPGND 23 12
2
5VA_OP_S0 VOL GND/HS

13
18
GND/HS
24
LINE IN/MIC IN
2
R_BYPASS RVDD GND/HS
19 RBYPASS
HP_R 20 15 SPKR_R-
RHPIN ROUT-
2
21 22 SPKR_R+ AMPGND AMPGND
GND
R352 RLINEIN ROUT+
AMPGND DY 10KR2J-2-GP
G1421BF3UF-GP LIN1
25
1
32 MIC_JKIN#_1 5
2
PDTA124EU-1-GP
R2 4
E R351
B 10KR2J-2-GP 3
3
34 AMP_SHUTDOWN R1
C AMPGND 1 R370 2 AUD_LINE_R 3
32 AUD_MICIN_R
1
1KR2J-1-GP 6
1
R345 Q20
10KR2J-2-GP AMPGND 1 R368 2 AUD_LINE_L 2
32 AUD_MICIN_L 1KR2J-1-GP
DY DY
1
1
R369
R371
AMPGND C648 1
2
1
C632 C647
SC100P50V2JN-U
CSOUTR1
1 R349 R_LINE_IN R359 2
SC100P50V2JN-U
1 2 2 1 AUDIO-JK60-GP
15KR2F-GP 18KR2F-GP
10KR2J-2-GP
10KR2J-2-GP
AMPGND 22.10088.B41
2
SC2D2U16V5ZY-GP 1 2 C637
2
2
AMPGND
C636 R355 SC220P50V2KX-3GP 22.10271.051 - 2ND
32 AUD_LOR 1 2 CSOUTR2
1 2 HP_R 1 R358 2
AMPGND
SC2D2U16V5ZY-GP 1 2 C641 ME : 22.10088.B41
SC220P50V2KX-3GP
HP_IN_1 2ND : 22.10271.051
5VA_OP_S0
LINE OUT
1
R350
R_BYPASS SYS_LOUT_IN#=LOW after PLUG-IN
L_BYPASS
GAP-CLOSE
1
1
1
C635 C633 R348 R372

2K2R2J-2-GP 10KR2J-2-GP
SC4D7U10V5ZY-3GP
SC4D7U10V5ZY-3GP
2
2
AMPGND 3D3V_S0
2
AMPGND AMPGND LOUT1
SYS_LOUT_IN 9 GND
8 VCC
32 SPDIF 7 VIN
79.10111.40L 16
Q21 6
OUT 3 TC29 SYS_LOUT_IN# 5
R1 2 SYS_LOUT_IN# SE100U10VM-4GP 4
2 GND 1 IN SPKR_L+ 1 2 SPKR_L+1 1 R365 2 SPKR_L_A1 2 2
R2 22R2J-2-GP 3
DTC124EKA-1-GP SPKR_R+ 1 2 SPKR_R+1 1 R364 2 SPKR_R_A1 1
22R2J-2-GP
1
MINDIN9-7-GP
AMPGND TC28 SE100U10VM-4GP
R374 R373 22.10147.111
1
1KR2J-1-GP
1KR2J-1-GP
C650 C649 EC45 EC50
79.10111.40L 22.10251.231 2ND
SC680P50V2KX-2GP
SC680P50V2KX-2GP
SC330P50V2KX-3GP
SC330P50V2KX-3GP
2
2
AMPGND AMPGND
MIC1
3
32 INT_MIC 1 ME : 20.D0173.102
2 2ND :20.F0714.002
2
4
C6
1
DY 1
1
SC1000P50V2JN-N1
MLX-CON2-5-GP
20.D0173.102
<Variant Name>
R3
1 2 Wistron Corporation
0R3J-3-GP Taipei Hsien 221, Taiwan, R.O.C.
Title
AUDIO (2/2)
Custom SA
Bolsena-E
A B C D E
5 4 3 2 1
3D3V_AUX_S5 KCOL[1..16] 35 5V_S0

KROW[8..1] 35 3D3V_AUX_S5
KBC_XO 1 2 C569
3D3V_AUX_S5 SC22P50V2JN-4GP
X3
1
1
L16 3D3V_S0
2
C513 C534 C545 C570 C567 C552 1 2 3D3V_KBC_AUX_S5 X-32D768KHZ-15
3
4
2
1
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
BLM11P600S 3 RN72 RN74
BAT_SDA_5
2
BAT_SCL_5
KBC_SDA2
KBC_SCL2
KCOL10
KCOL11
KCOL12
KCOL13
KCOL14
KCOL15
KCOL16
KROW1
KROW2
KROW3
KROW4
KROW5
KROW6
KROW7
KROW8
KCOL1
KCOL2
KCOL3
KCOL4
KCOL5
KCOL6
KCOL7
KCOL8
KCOL9
1
1
1
C529 KBC_XI 1 2 C568 SRN10KJ-5-GP
C525 SC22P50V2JN-4GP SRN10KJ-5-GP U38 2N7002DW-7F-GP
2
1
3
4
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
123
136
157
166
161
153
154
163
164
169
170
160
158
KBC_SCL2
16
34
45
95
49
50
51
52
53
56
57
58
59
60
61
64
65
66
67
68
71
72
73
74
77
78
79
80
D
22 SMBC_G792 4 3 D
U32 SMBC_G792
KBC_SCL2 5 2 SMBD_G792
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCA
VCCBAT
KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
KSO16
KSO17
KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
SCL1
SDA1
SCL2
SDA2
XCLKO
XCLKI
KBC_SDA2
KBC_SDA2 6 1 SMBD_G792 22
17,37 LPC_LAD[0..3]
LPC_LAD0 15 155
LPC_LAD1 LAD0 GPIO29 MATRIXID2# 36 3D3V_AUX_S5
14 149
LPC_LAD2 13
LAD1
LAD2
KB Matrix GPIO28
GPIO27 148
MATRIXID1# 36
PRE_CHG 47
LPC_LAD3 10 119
LAD3 LPC GPIO26 BLT_BTN# 35
2
GPIO25 118 CHG_ON# 47
9 109 R270
17,21,37 LPC_LFRAME# LFRAME# GPIO24 A20 AD_OFF 48 3D3V_AUX_S5
17,21 CLK33_KBC 18 LCLK GPIO23 108 100KR2J-1-GP
7 107 E51TXD TP71 TPAD28 TP73 TPAD28
17,27,37 P_SERIRQ SERIRQ GPIO22 E51RXD TP72
106
1
GPIO21 E51CS#
GPIO20 105
KBCBIOS_RD# 150 86
36 KBCBIOS_RD# KBCBIOS_WE# RD# GPIO19 STDBY_LED# 16
36 KBCBIOS_WE# 151 WR# GPIO18 85 GBUS_GRST# 27
KBCBIOS_CS# 173 75 INTERNET# 35 RN73
36 KBCBIOS_CS# MEMCS# GPIO17
152 IOCS# GPIO16 70 MAIL# 35 48 BAT_SCL_5 2 3
TP79 69 PM_SLP_S5# 20,45 1 4
36 KBC_D[0..7] GPIO15 48 BAT_SDA_5
KBC_D0 138 63 4S1P_I 47
KBC_D1 D0 GPIO14
139 D1 GPIO13 62 1 R251 2 DY PM_SUS_STAT# 20 SRN8K2J-3-GP
KBC_D2 140 55 0R2J-GP TP66
KBC_D3 D2 GPIO12
141 D3 GPIO11 54 CAP_LED# 16
KBC_D4 144 48 FRONT_PWRLED# 16
KBC_D5 D4 GPIO10 TP75
145 D5 GPIO09 22
KBC_D6 146 21
C KBC_D7 D6 GPIO08 KBC_MUTE 33 C
147 D7 GPIO07 20 KEY5# 35
12 TP76
GPIO06 TP77
124 11
36 A0 A0 X-bus GPIO05
36
36
36
A1
A2
A3
125
126
127
A1
A2
A3 ROM KB3910 GPIO04
GPIO03
GPIO02
8
6
5 2
KBCRST#
1
WIRELESS_BTN# 35
KA20GATE
R287 10KR2J-2-GP 20
2 1 KBRCIN#
R286 10KR2J-2-GP 20 PRE_CHG
2
36 A4 128 A4 GPIO01 4 KEY4# 35
36 A5 131 A5 GPIO00 3 BAT_THERMAL 47,48 R301
36 A6 132 A6 TP68 10KR2J-2-GP
36 A7 133 A7 GPIO0F 41
143 28 1 R271 2 1KR2J-1-GP ECSMI#_KBC 20
36 A8 A8 GPIO0E
1
36 A9 142 A9 GPIO0D 27 WIRELESS_EN 29
36 A10 135 A10 GPIO0C 25 PM_CLKRUN# 17,25,27,29,30,37
36 A11 134 A11 GPIO0B 24 FPBACK 16
36 A12 130 A12 GPIO0A 23 NUM_LED# 16
36 A13 129 A13
121 98 3D3V_S5
36 A14 A14 GPIO1F BLUETOOTH_EN 23
36 A15 120 A15 GPIO1E 97 DC_BATFULL# 16
1
36 A16 113 A16 GPIO1D 94 BLT_LED# 16
112 93 WLAN_TEST_LED 29 R302
36 A17 A17 GPIO1C 100KR2J-1-GP
36 A18 104 A18 GPIO1B 92 MAIL_LED# 16
103 91 C571
A19 GPIO1A CHARGE_LED# 16
2
VCC3VSB
SC1U10V3ZY-6GP
GPIOI2D 168
5V_S0 117 175
35 TDATA_5 PSDAT3 GPIO2F
1
SRN47J-4-GP
35 TCLK_5 116 PSCLK3 GPIO2E 171 AMP_SHUTDOWN 33
4 5 115 165 KBC_PCIRST# 1 R306 2
3 6 114
PSDAT2 PS/2 GPIO2C
162 0R0402-PAD
LPC_RST#
BL_ON
13,17,37,49
13,52
2
PSCLK2 GPIO2B
2 7 111 PSDAT1 GPIO2A 156 CHK_PW# 36
B B
1 8 110 PSCLK1
RN70
5V_S0
BATGND
ECRST#
GPWU0
GPWU1
GPWU2
GPWU3
GPWU4
GPWU5
GPWU6
GPWU7
ECSCI#
PWM7
PWM6
PWM5
PWM4
PWM3
PWM2
PWM1
PWM0
AGND
RN71
GND
GND
GND
GND
GND
GND
DA0
DA1
DA2
DA3
DA4
DA5
DA6
DA7
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
1 4 TDATA_5
2 3 TCLK_5
KB3910SF-2-GP
43
40
39
38
37
36
33
32
2
26
29
30
44
76
172
176
99
100
101
102
1
42
47
174
81
82
83
84
87
88
89
90
19
31
96
159
17
35
46
122
137
167
SRN10KJ-5-GP CHANGE TO 71.03910.B0G
KBC_BB_ENABLE#
3D3V_AUX_S5
3D3V_AUX_S5
RSMRST#_KBC
1
EC_RST# R278
32 KBC_BEEP TP118 TP74 TP119 TP67 TP65
TP64TP63
1
10KR2J-2-GP
R285 R261 2 TP70
TP69 1KR2J-1-GP
AD_IA
20 ECSWI# 1
1 R265 2 ECSCI#_KBC 20
2
DUMMY-R2
1KR2J-1-GP
AD_IA 47
KBC_BB_ENABLE# 36
2
1
A1 3S 47
E
20 PM_PWRBTN# C553
20,44 RSMRST#_KBC 3S2P_I 47
R272
SCD1U16V2ZY-2GP
B 2 1 RSMRST# 22
2
22 S5_ENABLE Q15 10KR2J-2-GP
16 BRIGHTNESS CH3906PT-GP
C
1
R284 17,20,38,39,45,56 PM_SLP_S3#

A
10KR2J-2-GP 35 KBC_PWRBTN# <Variant Name> A
47 AC_IN#
35 KBC_LID#
Wistron Corporation
2
20 KBC_SLP_WAKE
SB 0201 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A1 for the internal pull-up resistors on XIOCS[F:0] pins==>High=enable,Low=Disable Title

A4 for DMRP==>High=Disable,Low=Enable
A5 for EMWB==>High=Enable,Low=Disable 23 USB_PWR_EN# KBC KB3910
GPIO05 for Clock test mode==>High=test Mode,Low=32KHz clock in normal running(Recommended) Size Document Number Rev
GPIO06 for DPLL test mode==>High=Test Mode,Low=Normal operation(Recommended) A3
Bolsena-E SA
5 4 3 2 1
A B C D E
POWER BUTTON 3D3V_AUX_S5

Power Cover Up Switch 3D3V_S5
1
PWRBTN#_1
1
1 PWR1 2 R7 Main : 20.D0173.102
10KR2J-2-GP R22
5 47KR2J-2-GP 2nd:20.F0714.002
2
3 4 PWRBTN#_1 1 R9 2 KBC_PWRBTN# 34 LID1
2
SW-TACT-59-GP-U1 470R2J-2-GP 3
1
34 KBC_LID# 1 R12 2 LID_SW 1
62.40009.431 C12 100R2F-L1-GP-U 2
1
SCD1U25V3ZY-3GP 4
2
4 ME : 62.40009.241 C13 4
SC1000P50V2JN-N1 MLX-CON2-5-GP
2
(ALL 11 PCS) 20.D0173.102
3D3V_S5
Buttons SRN10KJ-6-GP
SRN470J-3-GP
8 1 MAIL#_1 4 5 5V_S0
7
6
2
3
KEY4#_1
KEY5#_1
3
2
6
7
MAIL#
KEY4#
KEY5#
34
34
34
TOUCH PAD
5 4 INTERNET#_1 1 8 5V_S0
INTERNET# 34
RN8
RN9
1
2
RN28 TPAD1
4
3
2
1
1
RC1 C389 C390
Mail Internet P1 P2 SRC100P50V-2-GP SCD1U25V3ZY-3GP SC1U10V3KX-3GP
2
SRN10KJ-5-GP MLX-CON12-10-GP
14
5
6
7
8
4
3
MAIL#_1 INTERNET#_1 KEY4#_1 KEY5#_1 12
1 MAIL1 2 1 NET1 2 1 P1 2 1 P2 2 RN27 11
34 TDATA_5 1 4 TP_DATA 10
5 5 5 5 34 TCLK_5 2 3 TP_CLK 9
TP_SCROLL_UP 8
3 4 3 4 3 4 3 4 1 SCRL1 2 SRN100J-3-GP C385 C374 7
SC47P50V2JN-3GP
SC47P50V2JN-3GP
SW-TACT-59-GP-U1 SW-TACT-59-GP-U1 SW-TACT-59-GP-U1 SW-TACT-59-GP-U1 TP_RIGHT 6
1
5 TP_SCROLL_RIGHT 5
62.40009.431 62.40009.431 62.40009.431 62.40009.431 TP_SCROLL_UP 4
3 4 TP_SCROLL_LEFT 3
2
3 SW-TACT-59-GP-U1 TP_SCROLL_DOWN 2 3
62.40009.431 TP_LEFT 1
13
BlueTooth ON/OFF Wireless ON/OFF TP_SCROLL_LEFT TP_SCROLL_RIGHT
1 SCRL2 2 1 SCRL3 2
BLUE2 WLAN1 ?ESD ?

BLT_BTN#_1 WIRELESS_BTN#_1
5 5 20.K0185.012
1 2 1 2 ME : 22.40082.081
2nd:22.40069.811 3 4 3 4 ME : 20.K0185.012
3 4 3 4 SW-TACT-59-GP-U1 SW-TACT-59-GP-U1
PUSH-SW89 PUSH-SW89 2nd:20.K0174.012
WIRELESS_BTN# 62.40009.431 62.40009.431
BLT_BTN# TP_SCROLL_DOWN TP_LEFT TP_RIGHT
1
1 SCRL4 2 1 LEFT1 2 1 RIGHT1 2

C644 C645
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP 3D3V_S5 5 5 5
2
RN76
SRN10KJ-5-GP 3 4 3 4 3 4
1 R367 2 470R2J-2-GP WIRELESS_BTN#_1 1 4 SW-TACT-59-GP-U1 SW-TACT-59-GP-U1 SW-TACT-59-GP-U1
34 WIRELESS_BTN# 1 R366 2 470R2J-2-GP BLT_BTN#_1 2 3
34 BLT_BTN# 62.40009.431 62.40009.431 62.40009.431
EMI Bypass cap.

Internal KeyBoard CONN KROW[8..1] 34
KCOL[1..16] 34 TP_RIGHT 1
RC10
8
RC7 TP_SCROLL_RIGHT 2 7
2 KROW7 TP_SCROLL_UP 2
Pin1 ==>*R01 1 8 3 6
KCOL11 2 7 TP_SCROLL_LEFT 4 5
KB1 Pin2 ==>*R02 KCOL12 3 6
1 25 26 Pin3 ==>*R03 KROW8 4 5 DY SRC100P50V-2-GP
NC#26 KROW1
C01 1 Pin4 ==> C01
........ 2 KROW2 SRC100P50V-2-GP
C02
3 KROW3 Pin5 ==> C02 RC5
C03 KCOL1 Pin6 ==> C03 KCOL5
4 1 8 RC9
R01 KCOL2 KCOL6 TP_LEFT
R02 5 Pin7 ==>*R04 2 7 1 8
6 KCOL3 KCOL7 3 6 TP_SCROLL_DOWN 2 7
R03 KROW4 Pin8 ==> C04 KCOL8
C04 7 4 5 3 6
R04 8 KCOL4 Pin9 ==> C05 4 5
9 KCOL5 Pin10 ==> C06 SRC100P50V-2-GP
R05 KCOL6
R06 10 RC4 DY SRC100P50V-2-GP
11 KCOL7 Pin11 ==> C07 KCOL2 1 8
R07 KCOL8 KCOL3
R08 12 Pin12 ==> C08 2 7
13 KCOL9 KROW4 3 6
R09 KROW5
Pin13 ==> C09 KCOL4
C05 14 4 5
15 KCOL10 Pin14 ==>*R05
R10 KROW6
16 Pin15 ==> C10 SRC100P50V-2-GP
C06 KROW7
17 RC6
C07
18 KCOL11 Pin16 ==>*R06 KCOL9 1 8
R11 KCOL12 Pin17 ==>*R07 KROW5
R12 19 2 7
20 KROW8 Pin18 ==> C11 KCOL10 3 6
C08 KCOL13 KROW6
21 4 5
R13
22 KCOL14 Pin19 ==> C12
R14 KCOL15 Pin20 ==>*R08
23 SRC100P50V-2-GP
R15 KCOL16
24 Pin21 ==> C13 RC3
R16 KROW1
1 NC#25 25 1 8 <Variant Name> 1
27 Pin22 ==> C14 KROW2 2 7
NC#27 KROW3
Pin23 ==> C15 3 6
MLX-CON25-1-GP KCOL1 4 5
20.K0192.025
Pin24 ==> C16
Pin25 ==> NC
Wistron Corporation
SRC100P50V-2-GP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
RC8 Taipei Hsien 221, Taiwan, R.O.C.
KCOL13 1 8
ME :20.K0192.025 KCOL14 2 7 Title
KCOL15
2nd:20.K0197.025 KCOL16
3
4
6
5
BUTTONs / KB / TOUCHPAD
SRC100P50V-2-GP A3 SA
Bolsena-E
A B C D E
5 4 3 2 1
KBC_D[0..7] 34
34 KBCBIOS_WE#
34 KBCBIOS_RD#
34 KBCBIOS_CS#
A18 34
D A17 34 D
3D3V_AUX_S5 A16 34
1
C895 U77
SCD1U16V2ZY-2GP
32
22
24
31
30
2
2
VDD
CE#
OE#
WE#
A18
A17
A16
34 KBC_D0 13 DQ0 A15 3 A15 34
34 KBC_D1 14 DQ1 A14 29 A14 34
34 KBC_D2 15 DQ2 A13 28 A13 34
34 KBC_D3 17 DQ3 A12 4 A12 34
34 KBC_D4 18 DQ4 A11 25 A11 34
34 KBC_D5 19 DQ5 A10 23 A10 34
34 KBC_D6 20 DQ6 A9 26 A9 34
34 KBC_D7 21 DQ7 A8 27 A8 34
VSS
SST39VF040-70-1
A0
A1
A2
A3
A4
A5
A6
A7
16
12
11
10
9
8
7
6
5
(SOCKET) 62.10002.032 - (IC)72.39040.H03 IN DIP,SMT
C C
34 A0
34 A1
34 A2
34 A3
34
34
A4
A5
ROM SIZE MAX. 512KBYTE
34 A6
34 A7
PLCC32 Socket P/N:

SSKT3262.10002.032
3D3V_S0
3D3V_S0
SSKT32 62.10005.032
8
7
6
5
B RN24 B
SRN10KJ-6-GP
1
2
3
4
SW1
34 KBC_BB_ENABLE# 1 8
34 CHK_PW# 2 7
34 MATRIXID1# 3 6
34 MATRIXID2# 4 5
SW-2184LPSTR-1GP
Keyboard matrix ( from vendor ) <Variant Name>

A A
US Jap Eur Other Wistron Corporation

Low Bit MATRIXID1# 1 1 0 0
Title
High Bit MATRIXID2# 1 0 1 0 BIOS ROM

A3
Bolsena-E SA
5 4 3 2 1
17,21,34 LPC_LFRAME#
17,27,34 P_SERIRQ
13,17,34,49 LPC_RST# 1 2 PCIRST_BUF#_SIO

RB1 33R2J-2-GP
17 LPC_LDRQ0#
2 1
C524 SC10P50V2JN-1
17,34 LPC_LAD[0..3] CLK14_SIO 3
3D3V_S0 1CLK33_SIO_T2
LPC_LAD0
DY
LPC_LAD1
LPC_LAD2
LPC_LAD3
2 1
R282 10R2J-2-GP C544 SC10P50V2JN-1
DY
CLK33_SIO 17,21
1
1
DY
C551 C540 C550 C533
SC4D7U10V5ZY-3GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
2
2 U31
24
35
32
36
38
40
16
27
28
30
42
43
25
8VDD
VDD
VDD
LAD0
LAD1
LAD2
LAD3
LDRQ#/XOR_OUT
LRESET#
SERIRQ
LFRAME#
NC
CLKIN
LCLK
1 CTS1# NC 33
44 DCD1# NC 37
45 DSR1# NC 39
3 RI1# NC 41
46 SIN1 NC 4
17,25,27,29,30,34 PM_CLKRUN# 19 CLKRUN#/GPIO22 NC 18
1 2 VCORF 10 26
C541 SCD1U16V2ZY-2GP VCORF NC
IRRX2_IRSL0/GPIO17
NC 29
BADRR_STRAP 2 31
DTR1#_BOUT1/BADDR NC
47
GPIO21/LPCPD#
RTS1#/TRIS#
1
48 SOUT1/TEST#
R264 20
10KR2J-2-GP RESERVED/GPO24
GPIO00
GPIO01
GPIO02
GPIO03
GPIO04
GPIO20
GPIO23
IRRX1
IRTX
VSS
VSS
VSS
2
11
12
13
14
15
17
21
22
5
7
6
9
23
34
PC87381-VBH-GP
IRTX_3
IRSL0_3
IRRX_3
Infineon FIR Module

IR1
3D3V_S0 40mil
1 VCC2/IRED_ANODE
2 IRED_CATHODE
1
10mil IRTX_3 3
C857 C885 IRRX_3 TXD
10mil 4 RXD
SC1U10V3KX-3GP SC4D7U10V5ZY-3GP 10mil IRSL0_3 5
2
SD
6 VCC1
1 2 IRMODE 7 MODE
DY R559 10KR2J-2-GP 8 GND
Wistron Corporation
FIR-TFDU6102-GP Taipei Hsien 221, Taiwan, R.O.C.
Title
56.15001.051 SUPER IO NC87381
A3 -2
SNIPE
A B C D E
Run Power
4 4
41 12VGATE_S0 SCD1U25V3ZY-3GP
C566 5V_S0 5V_S5
U36
DCBATOUT 1 2 1 8
S D
2 S D 7
Q17 3 S D 6
1 R312 2 PM_RUNCTL 2 1 TP0610T 4 5
K
G D
10KR2J-2-GP
1
R308 AO4422-1-GP
330KR2J-L1-GP D21 C549
1
1 R311 2 PM_RUNCTL_G R303 MMGZ5242BPT-GP SCD1U25V3ZY-3GP
2
330KR2J-L1-GP 47KR2J-2-GP
A
1
SCD22U16V3ZY-GP
DY C580
580
2
2C
R310
1KR2J-1-GP
2
3D3V_S0 3D3V_S5
SCD1U25V3ZY-3GP U26
3
D C505 1 S D 8
1 Q18 1 2 2 S D 7
G 2N7002PT-U 3 S D 6
S DY 4 5
2
G D
1
AO4422-1-GP
17,20,34,39,45,56 PM_SLP_S3# 1 2 1 Q19 C506
R315 1K5R3-GP PDTC144EU-1-GP SCD1U25V3ZY-3GP
2
1
2
C586
SC1U10V3KX-3GP
SB 0201
2
3 3
2D5V_S0 2D5V_S3
SCD1U25V3ZY-3GP
DY C786 U60
1 S D 8
1D8V_S0 2D5V_S0 1 2 2 S D 7
D35 3 S D 6
1 2 4 G D 5
1
RB751V-40-1-GP AO4422-1-GP
C797
SCD1U25V3ZY-3GP
2
1D8V_S0 1D8V_S5
DY C749 SCD1U25V3ZY-3GP U56

1 S D 8
1 2 2 S D 7
3 S D 6
4 5
2 G D 2
1
AO4422-1-GP
C405
SCD1U25V3ZY-3GP
2
1 <Variant Name> 1
Wistron Corporation
Title
PWR CTL LOGIC / PWR PLANE
A3 SA
Bolsena-E
A B C D E
A B C D E
Reduce leakage 5V_S5

3D3V_AUX_S5 3D3V_AUX_S5
(WHEN 3D3V_AUX_S5 ON, 3D3V_S0 OFF) U33B
14
U41A U41B
14
14
17,20,34,38,45,56 PM_SLP_S3# 4
6 1D2V_S0_EN 1D2V_S0_EN 45
R321
1KR2J-1-GP VRM_PWRGD 5
NB_PWRGD 1 2 NB_PWRGD_N 1 R332 2 3 4 1 2
270KR2F-L-GP TSLCX08MTCX-GP
7
TSLCX14MTC-L-U 73.07408.02B
7
7
1
4 TSLCX14MTC-L-U 4
1
R333
DY C603 3D3V_S5
SC1U10V3ZY-6GP
220KR2J-L2-GP
2
U30A
14
2
?U54 CHOOSE CHEAPER 1
SB_PWRGD IS 35MS 3 1 R258 2 SB_PWRGD 20
NB_PWRGD 2 330R2J-3-GP
AFTER NB_PWRGD
1
TSLCX08MTCX-GP C526
7
DUMMY-C3
2
2D5V_S0
5V_S5
2
R279
10KR2J-2-GP
U33C
14
1
VTT_VDDA_PG 13
11 VCORE_EN 41,52
12
1
3 C542 TSLCX08MTCX-GP 3
7
SCD1U25V3ZY-3GP
2
PM_SLP_S3# 73.07408.02B
3D3V_S5
3D3V_S5
U30C
14
U30D
14
PM_SLP_S3# 13
11 VTT_VRM_PG 10
12 8 NB_PWRGD 13,52
9
TSLCX08MTCX-GP
7
TSLCX08MTCX-GP
7
73.07408.02B
20,41 VRM_PWRGD VRM_PWRGD 22 RUNPWROK
2 2
1 <Variant Name> 1
Wistron Corporation
Title
POWERGOOD&ENABLES
Custom SA
Bolsena-E
A B C D E
A B C D E
CPU_CORE 5V_AUX_S5
MAX1544ETL DCBATOUT
INPUT
5V_AUX_S5
VID Setting Output Signal AUX_SD OUT
VID0_PWM SD
VID0(I / 3.3V) MAX1544_VRM
VROK()
VID1_PWM
VID1(I / 3.3V) LP2951ACM
4 VID2_PWM 4
VID2(I / 3.3V) 1D25V_S3
VID3_PWM 2D5V_S3
VID3(I / 3.3V) VIN
Output Power TI TPS5130
VID4_PWM 5V_S5 1D25V_S0
VID4(I / 3.3V) VCC_CORE_S0(Imax=27.3A) VCNTL VOUT
VCC_CORE_PWR(O) 2D5V/1D2V/1D8V
APL5331_1D25V_VREF
VREF
Input Signal Output Signal
APL5331KAC
Input Signal FOR
PM_SLP_S5# FAN5234_VGA_Core
VCORE_EN SS_STBY1(I / 5V) 2.5V
EN (I / 3.3V) Pull High (5V)
1D2V_S0_EN FOR PGOUT(OD / 5V) 1D15V or 1D20V
SS_STBY2(I / 5V) 1.2V
Voltage Sense S5PWR_ENABLE Input Power Output Power
SS_STBY3(I / 5V) FOR
COREFB 1.8V 5V_S0
VSEN(I / Vcore) VCC 1D15V (5.2A)
1D15V (O) or
COREFB# or
RGND(I / Vcore) GND STBY_LDO(I / 5V) DCBATOUT 1D20V (9A)
Output Power VIN 1D20V (O)
3 3
Input Power
DCBATOUT_5130 2D5V (9A)
DCBATOUT STBY_VREF5(I / 28V) 2D5(O)
VCC(I) Input Signal
DCBATOUT_5130 PM_SLP_S3#
5V_S0 STBY_VREF3.3(I / 28V) 1D2V (5A) EN
VCC(I) 1D2V(O)
3D3V_S0 Output Signal

VCC(I) Input Power 1D8V (5A)
1D8V(O) PG
DCBATOUT
VIN (I / 28V)
5V_S5 LDO(O)
REG5V_IN(I / 5V) Adapter
TPS51120 5V_AUX_S5
5V_AUX_S5 Input Signal Output Signal AD_IN
AD_OFF
5V/3D3V (I) (O)
5V_S0
2
For PGOUT 2
Input Signal Output Signal
Input Power Output Power
SHUTDOWN_S5 PGOOD(OD / 5V) MAX1999_PGD Charger_Max8725 AD_JK AD+
ON3 VCC(I) VCC(O)
5V_AUX_S5
SHUTDOWN_S5 Input Signal Output Signal VCC(I)
ON5 CHARGE_OFF AD_IN
CLS (I / 3.3V) LDO (O / 5.4V)
Output Power
DCBATOUT BT_TH
SHDN# THM (I / 3.3V) CHARGE_LED#
XTAL2/PB4 (O/5V)
5V_S5 (6A) BAT+SENSE
PM_SLP_S3# 5V(O) BATT (I / 3.3V)
SKIP# XTAL1/PB3 (O/5V) BL2#
BT_SCL_5
SCL (IO / 5V)
3D3V_S5 (4A)
3D3V(O) BT_SDA_5
Input Power SDA (IO / 5V)
Output Power
FLASH_GPIO1 DCBATOUT
MAX1999_LDO5 (30mA) RESET#/PB5 (I/5V) VCC (O)
DCBATOUT LDO5(O)
V+ FLASH_GPIO2
1 PB0/MOSI/AIN0 BT+ <Variant Name> 1
VCC (O)
LDO3 (O) MAX1999_LDO3 (30mA) AC_IN
PB0/MOSI/AIN0 Wistron Corporation
Input Power
AD+ Title
DCIN (I) POWER BLOCK DIAGRAM
(Power Team) A3 SA
Bolsena-E
A B C D E
A B C D E
5V_S0
CPU_VCORE D39
MAX1544_BSTS
VID=1.20V 3
2
1
Iomax=27.3A (35W) DCBATOUT_MAX1544
R214
1 MAX1544_BSTM
10R2J-2-GP BAW56PT-U
OCP=40A~45A MAX1544_VCC
2
2
1
4 R202 4
1
C431 R186
MAX1544_V+
0R0603-PAD
SC2D2U10V5KX-LGP SC1U10V3KX-3GP
TABLE 1. VOLTAGE IDENTIFICATION CODES 100KR2J-1-GP
VCORE_EN 39,52
2
VID4 VID3 VID2 VID1 VID0 DAC MAX1544_DHS 42
2
0 0 0 0 0 1.550 MAX1544_V+
1544_AGND
MAX1544_SKIP#
0 0 0 0 1 1.525 MAX1544_CMN 42
MAX1544_VCC
MAX1544_CMP 42
1
0 0 0 1 0 1.500
R201 C426 C420 1 R205
0 0 0 1 1 1.475 2 MAX1544_VCC For Dummy Phase 2
1
12K7R2F-GP
0 0 1 0 0 1.450 0R2J-GP
SC1U25V5ZY-4GP
DY MAX1544_CSP 42
DY MAX1544_CSN 42
0 0 1 0 1 1.425
2
0 0 1 1 0 1.400
U18
10
30
36
18
33
38
37
40
39
0 0 1 1 1 1.375
6
0 1 0 0 0 1.350
VCC
VDD
V+
SKIP#
SHDN#
DHS
CMN
CMP
CSP
CSN
0 1 0 0 1 1.325
0 1 0 1 0 1.300 MAX1544_DLM 42
0 1 0 1 1 1.275 MAX1544_TIME1 29 MAX1544_DHM 42
TIME DLM
2 TON DHM 28 MAX1544_LXM 42,58
0 1 1 0 0 1.250 3
MAX1544_REF 1 R208 MAX1544_OFS 7 SUS
0 1 1 0 1 1.225 2 OFS LXM 27 1 2 C404
121KR2F-L-GP 2 R209 1 MAX1544_REF 8 26 SCD22U16V3KX-2-GP MAX1544_BSTM
0 1 1 1 0 1.200 100KR2F-L1-GP MAX1544_CCI 14 REF BSTM R185 2
MAX1544_ILIM
CCI VROK 25 1 3D3V_S0
1
0 1 1 1 1 1.175 100KR2J-1-GP
R206 VID0_PWM 24 VRM_PWRGD 20,39
3 1 0 0 0 0 1.150 60K4R3F-GP VID1_PWM 23
D0 3
VID2_PWM D1 MAX1544_CCV
1 0 0 0 1 1.125 22 D2 CCV 12
MAX1544_VCC VID3_PWM 21 32 MAX1544_DLS 42
1 0 0 1 0 1.100
2
VID4_PWM D3 DLS
20 D4 LXS 34 MAX1544_LXS 42,58
1 0 0 1 1 1.075 1 R183 2 MAX1544_OVP19 9 MAX1544_ILIM
OVP ILIM MAX1544_BSTS
1 2 C423
1 0 1 0 0 1.050 100KR2J-1-GP SCD22U16V3KX-2-GP
OAIN+
GNDS
PGND
OAIN-
1 0 1 0 1 1.025
BSTS
1544_AGND
GND
GND
1544_AGND
FB
S0
S1
1 0 1 1 0 1.000
1 0 1 1 1 0.975
16
17
4
5
15
35
13
31
41
11
MAX1544ETL-1-GP
1 1 0 0 0 0.950
1
1 1 0 0 1 0.925
MAX1544_OAIN-
MAX1544_OAIN+
MAX1544_FB
MAX1544_BSTS
TON: Frequency: R210 C434
1 1 0 1 0 0.900
1
GND 550KHz 1544_AGND 26K7R2F SC270P50V2JN-2GP
2
1
1 1 0 1 1 0.875 R207 MAX1544_GNDS
1
1 1 1 0 0 0.850 REF 300KHz C433 80K6R3F-1-GP
2
1
SC100P50V3JN-2GP C438 C432
2
1 1 1 0 1 0.825 OPEN 200KHz SCD22U16V3KX-2-GP SC1000P50V3JN-GP R203

2
1
100R2F-L1-GP-U
1 1 1 1 0 0.800 VCC 100KHz
1
1 1 1 1 1 Shutdown 1544_AGND
2
1
1
1544_AGND C427 R198 1544_AGND
SC470P50V3JN-2GP
1544_AGND R199 R187 1MR2J-1-GP
2
511R3F-GP 511R3F-GP COREFB# 6
1544_AGND
2
2
2
1
1
R192
1
2 R196 R197 R194 2
1 2
0R0402-PAD 1KR3F-GP
1KR2F-3-GP R193 1KR2F-3-GP MAX1544_CCI For alone test==>short C395 pin1 and pin2
1KR3F-GP
1544_AGND
2
2
MAX1544_CMP
2
COREFB 6
12VGATE_S0 38
MAX1544_CSP
U16
1
2N7002DW-7F-GP MAX1544_FB
R188 VCC_CORE_S0
VID0_PWM 1 6 VID0 0R0402-PAD
MAX1544_CMN
2 5
2
MAX1544_CSN
VID3 3 4 VID3_PWM
U17 VCC_CORE_S0 feedback

2N7002DW-7F-GP
6 VID[4..0]
VID1_PWM 1 6 VID1
2 5
VID2 3 4 VID2_PWM
<Variant Name>
1 1
Wistron Corporation
1

G
VID4 VID4_PWM Title

From KBC 3 2
2N7002PT-U CPU Vcore 1

D
Q8 Size Document Number Rev

A3 SA
Bolsena-E
(Power Team) Date: Thursday, October 13, 2005 Sheet 41 of 58
A B C D E
A B C D E
G71 GAP-CLOSE-PWR
1 2
G73 GAP-CLOSE-PWR
1 2
G74 GAP-CLOSE-PWR
C370
1 2
1 2
G70 GAP-CLOSE-PWR
1 2 SC1U25V5ZY-4GP
G72 GAP-CLOSE-PWR 1 2 C842

4 1 2 SC10U35V0ZY-1GP VCC_CORE_S0 4
G78 GAP-CLOSE-PWR 1 2 C831

1 2 SC10U35V0ZY-1GP
1
G79 GAP-CLOSE-PWR 1 2 C843 TC4 TC22 TC6 TC3 TC5 TC7
SE330U2VDM-L-GP
SE330U2VDM-L-GP
SE330U2VDM-L-GP
SE330U2VDM-L-GP
SE330U2VDM-L-GP
SE330U2VDM-L-GP
1 2 DCBATOUT_MAX1544 SC10U35V0ZY-1GP
DCBATOUT
2
C832 DY
1
C384 1 2 DUMMY-C3
1
SC1U25V5ZY-4GP
TC24 DY
2 SE100U25VM-7GPU
5
6
7
8
D
D
D
D
AO4422-1-GP
U64
G
S
S
S
4
3
2
1
VCC_CORE_S0
41 MAX1544_DHM L28
41,58 MAX1544_LXM 1 2 1 R524 2 D001R7520F-1-GP
3 3
41 MAX1544_DLM IND-D56UH-15-GP
U63
5
6
7
8
1
D
D
D
D
R527
AO4430-1-GP 0R0402-PAD
2
G
S
S
S
4
3
2
1
MAX1544_CMN 41
MAX1544_CMP 41
2 DCBATOUT_MAX1544 2
5
6
7
8
2 C841
D
D
D
D
1
SC10U35V0ZY-1GP
AO4422-1-GP
U65
G
S
S
S
4
3
2
1
VCC_CORE_S0
41 MAX1544_DHS L30
41,58 MAX1544_LXS 1 2 1 R530 2
D001R7520F-1-GP
41 MAX1544_DLS IND-D56UH-15-GP
1
U67 SB 0203
5
6
7
8
R536
D
D
D
D
0R0402-PAD
AO4430-1-GP
2
1 <Variant Name> 1
G
S
S
S
4
3
2
1
MAX1544_CSN 41
MAX1544_CSP 41
Wistron Corporation
Title
CPU Vcore 2
(Power Team) A3 SA
Bolsena-E
A B C D E
5 4 3 2 1
DCBATOUT_51120 G97
1 2
G33
1 2 GAP-OPEN-PWR
DCBATOUT_51120 G98
1
GAP-OPEN-PWR 1 2
5
6
7
8
51120_V5FILT
SC10U35V0ZY-1GP
G34 C572 C573 C557
D
D
D
D
1 2 U37 SCD1U50V3ZY-GP GAP-OPEN-PWR
2
AO4422-1-GP G95
GAP-OPEN-PWR 1 2
R259
D G36 D
1 2 51120_VREG5 1 2 SC10U35V0ZY-1GP GAP-OPEN-PWR
SC1U10V3KX-3GP
G
S
S
S
5D1R3F-GP G94
1
GAP-OPEN-PWR 1 2
4
3
2
1
G35 C527 5V_PWR 5V_PWR 5V_S5
5V Iomax=5A
1 2 51120_DRVH1 GAP-OPEN-PWR
2
51120_GND 51120_LL1 1 2 OCP>10A G96
GAP-OPEN-PWR L36 1 2
C514 DCBATOUT_51120
G37 IND-3D3UH-43-GP
5
6
7
8
1 2 51120_LL21 251120_LL2_1 1 251120_VBST2 GAP-OPEN-PWR
DCBATOUT R252 0R3J-3-GP U34 G92
D
D
D
D
DY
1
SC33P50V3JN-GP
GAP-OPEN-PWR SCD1U50V3ZY-GP AO4702-1-GP
DY 1 2
1
R562
C538
30KR3F-2-GP
C532 C859 TC27 GAP-OPEN-PWR
51120_LL11 251120_LL1_1 1 251120_VBST1 SCD1U50V3ZY-GP ST220U6D3VDM-13GP G93
2
R274 0R3J-3-GP 1 2
G
S
S
S
2
SCD1U50V3ZY-GP 51120_V5FILT
SANYO 220uF ESR=25mohm
4
3
2
1
51120_VREG5 51120_VFB1 GAP-OPEN-PWR
Iripple=2.4A
SC10U10V5KX-2GP
G91
1
SC10U10V5KX-2GP
51120_VREG3 51120_COMP2 1 2 1 2
1
1
R257 0R3J-3-GP 51120_DRVL1 R563
C531 C523 51120_COMP1 7K5R3F-L1-GP GAP-OPEN-PWR
1
R263
2
0R3J-3-GP DY
2
2
3D3V_S0
19
21
28
13
20
22
7
2
G47
51120_GND 51120_GND 51120_GND 1 2
VREG3
VREG5
VBST1
VBST2
V5FILT
VIN
COMP2
COMP1
0R3J-3-GP GAP-OPEN-PWR
1
C R275 R276 G46 C
1 2 51120_EN1 29 15 51120_LL2 1 2
22,45 S5PWR_ENABLE EN1 LL2
51120_EN2 51120_LL1 100KR2J-1-GP
TP61 TPAD30
1 2
R2530R3J-3-GP
12
10
EN2
EN3
LL1 26
DY GAP-OPEN-PWR
TP62 TPAD30 G44
9
DY
2
R260 0R3J-3-GP EN5 51120_PGD1
PGOOD1 30 1 2 3D3V_PWR 1 2 3D3V_S5
1 2 51120_VFB2 6 11 51120_PGD2 R2671 0R2J-GP
2
51120_VFB1 VFB2 PGOOD2 R254 0R2J-GP DCBATOUT_51120 GAP-OPEN-PWR
51120_V5FILT 1 2 3
R262 0R3J-3-GP
5V_PWR
VFB1
DRVL1 25 51120_DRVL1
51120_DRVL2
DY G42
1 VO1 DRVL2 16 1 2
3D3V_PWR 8 VO2 51120_DRVH1 GAP-OPEN-PWR
DRVH1 27
51120_VREF2 4 14 51120_DRVH2 G43
VREF2 DRVH2
1 2
SKIPSEL
1
5
6
7
8
1
TONSEL
PGND1
PGND2
D
D
D
D
SC10U35V0ZY-1GP
C528 U27 C507 C508 GAP-OPEN-PWR
GND
GND
CS1
CS2
SC1000P50V3JN-GP
AO4422-1-GP G45
2
2
U28 1 2
24
17
5
33
23
18
151120_SKIPSEL 32
31
51120_GND TPS51120RHBR-GPU1 GAP-OPEN-PWR
G
S
S
S
SC10U35V0ZY-1GP 3D3V Iomax=5A
4
3
2
1
3D3V_PWR OCP>10A
R268 L35
51120_DRVH2
51120_V5FILT 51120_TONSEL1 251120_VREF2 51120_LL2 1 2
11KR3F-GP 51120_GND
1 2 51120_CS1 IND-2D5UH-6-GP
0R2J-GP
5
6
7
8
R266
SC33P50V3JN-GP
R277 U25
D
D
D
D
B 51120_CS2 B
1 2 0R3J-3-GP AO4702-1-GP
1
DY
1
11KR3F-GP C858 TC16
2
R256 R560 ST220U6D3VDM-13GP

DY
2
30K9R3F-GP
G
S
S
S
51120_GND
4
3
2
1
2
51120_VFB2 SANYO 220uF ESR=25mohm G48
51120_DRVL2 1 2
Iripple=2.4A
1
R561 GAP-CLOSE-PWR
51120_COMP1 51120_COMP2 DY 13KR3F-GP
1
DY
1
R269
DY
2
30KR3F-2-GP R558 51120_GND
GND VREF2 FLOAT V5FILT DY 22KR3F-GP
DY
1
51120_GND
2
C537 C856
51120_COMP1_PL
2
SC390P50V3JN-GP
SC390P50V3JN-GP
AUTOSKIP
51120_COMP2_PL
Vout=1V*(R1+R2)/R2
2
SKIPSEL AUTOSKIP /FAULTS PWM PWM

OFF
DY
1
SC680P50V3JN-GP
CURRENT D-Cap
SC1000P50V3JN-GP
C855
N/A N/A DY
1
COMP MODE MODE

2
C539
2
TONSEL 380k/CH1 290k/CH1 220k/CH1 180k/CH1

590k/CH2 440k/CH2 330k/CH2 280k/CH2 51120_GND For TPS51120,
A <Variant Name> A
51120_GND
5V Vout=5V
VFB1 N/A not use ADJ. 1. If you use a 6.8uH inductor, the minimum ESR is 70m ohm.
Fixed Output
2. If you use a 4.7uH inductor, the minimum ESR is 48m ohm.
Wistron Corporation
3.3V 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
VFB2 N/A not use ADJ. Fixed Output 3. If you use a 3.3uH inductor, the minimum ESR is 34m ohm. Taipei Hsien 221, Taiwan, R.O.C.
Vout=3.3V Title
EN1,EN2 Switcher OFF not use Swithchr ON Switcher ON 1. If you use a 4.7uH inductor, the minimum ESR is 51m ohm. TPS51120 / 3D3V / 5V
2. If you use a 3.3uH inductor, the minimum ESR is 36m ohm. Size Document Number Rev
EN3,EN5 LDO OFF not use LDO ON VREG3 on 3. If you use a 2.5uH inductor, the minimum ESR is 27m ohm. A3
Bolsena-E -1
5 4 3 2 1
A B C D E
5V_S5
1
R273
10KR2J-2-GP
Aux Power
2
4 4
E
20,34 RSMRST#_KBC B CH3906PT-GP 3D3V_AUX_S5
Q16
C
1
R283 5V_S5 3D3V_AUX_S5 3D3V_AUX_S5
10KR2J-2-GP
2
D17
5V_S5_G913
SC22P50V2JN-4GP
1 2 Rx
1
1
CH521S-30-GP-U C560 R288
5V_AUX_2951 16K5R2F-1-GP
2
U35 Output = 3.3
2
D16
1 2 1 5 3D3V_G913_SET output=1.25(
SHDN# SET
2 GND
CH521S-30-GP-U 3 4
IN OUT
1
SC1U10V3ZY-6GP
SC1U10V3ZY-6GP
DY C555 R299
1
C556 C548 G913CF-GP C554 C546 10KR2F-2-GP
DCBATOUT
DUMMY-C3
C530 C547
1 2 SC10U10V5ZY-1GP Ry
2
SC10U10V5ZY-1GP
SC1U10V3ZY-6GP
DY
2
U29 SCD1U16V2ZY-2GP
1
1
3 C535 1 8 3
C536 OUTPUT INPUT
2 SENSE FEEDBACK 7
1
SC1U10V3ZY-6GP
SCD1U16V2ZY-2GP 3 6
2
2
SHUTDOWN VO TAP C522 C521
4 GND 100mA SC1U25V5ZY-4-GP
DUMMY-C5
5
2
ERROR# OUTPUT
LP2951CDR2G-GP
2
2D5V_S3
G88 GAP-CLOSE-PWR
1
5V_S5 1 2
C893 C892
SC10U10V5ZY-1GP SC10U10V5ZY-1GP
1D25V_S3
2
78.10693.41L 78.10693.41L G87 GAP-CLOSE-PWR

1
1 2
2D5V_S3DY C891 Iomax=1.5A
SCD1U25V3ZY-3GP
2
Vo(cal.)=1.250V G89 GAP-CLOSE-PWR

1
1 2
R564 1D25V_LDO 1D25V_S3
2 1KR2F-3-GP U76 2
G90 GAP-CLOSE-PWR
1 4 1 2
2
APL5331_1D25V_VREF VIN VOUT

3 VREF
6 VCNTL NC 8
1
NC 7
1
R565 2 5 TC25 C884

1KR2F-3-GP C890 GND NC SC22U10V6ZY-1-GP
9 DY SE100U10VM-4GP
2
SCD1U25V3ZY-3GP GND
79.10111.40L
2
2
APL5331KAC-TRLGP Trace Length=1cm (500mils)

KEMET Trace Width=8mils
SO-8-P 100uF / 4V / B2 Size / NTD:5.615 Trace Resistance>25mohm
Iripple=1.1A / ESR=70mohm
<Variant Name>
1 1
Wistron Corporation
Title
1D2V_S3 / 3D3V_AUX
A3 SA
(Power Team) Bolsena-E
A B C D E
5 4 3 2 1
For 2.5V
TI TPS5130 for 2.5V, 1.2V, 1.8V
2D5V_PWR DCBATOUT DCBATOUT_5130
SETTING=2.516V R182
C393 Vo=(R1*0.85)/R2+0.85 1D2V_OCP
1 2 1 2 G75
(1D2V=>CH1 , 1D8V=>CH2 , 2D5V =>CH3) R180
DCBATOUT_5130 1 2
1 R542 2 330R2J-3-GP SC5600P50V3KX-GP 1 2
10KR2F-2-GP R543 1D8V_PWR
For 1.8V R548 C844 5130_TRIP1 11K3R2F-2-GP
GAP-CLOSE-PWR
1 2 G85
SETTING=1.8275V
1
1 2 1 2 C386 1 2
R541 19K6R3F-GP 1 2
2KR2F-3-GP 1 R190 2 680R3F-GP SC5600P50V3KX-GP SCD1U25V3ZY-3GP GAP-CLOSE-PWR
D close to IC 10KR2F-2-GP OCP G77 D
SC3900P50V3KX-GP
1 R547 2 5130_5V_LDO
close to IC 1 2
1 2
8.4A=>R226=13K
1
C407 11K5R2F-GP 10A=>R226=22K GAP-CLOSE-PWR
5130_INV3 R195 5130_5V_LDO G84
1D8V_OCP
SC3900P50V3KX-GP
2KR2F-3-GP
close to IC R179 1 2
2
2
5130_FB3 DCBATOUT_5130
D14 1 2 GAP-CLOSE-PWR
1 2
BAT54PT-GP 12K1R2F-L1-GP G83
For 1.2V 5130_TRIP2 1 2
2
1D2V_PWR C412 5130_INV2 C380
SETTING=1.2172V C406
D12 1 2 GAP-CLOSE-PWR
3
1 R184 2 1 2 5130_FB2 BAT54PT-GP SCD1U25V3ZY-3GP G76
R539 680R3F-GP 5130_LH1 OCP 1 2
SC4700P50V3KX-1GP
1 2
10KR2F-2-GP
R544
C391 close to IC 8.4A=>R229=12.65K GAP-CLOSE-PWR
3
Condition Voltage 5130_LL1 10A=>R229=22K G82
1 2 1 2 5130_LL1 46,58 2D5V_OCP
1
SCD1U50V3KX-GP 1 2
R189 4K32R2F-GP
2KR2F-3-GP R181
PWM_SEL H : Auto PWM/SKIP 2.2V(Min)~ 5130_OUT1U 5130_OUT1U 46 DCBATOUT_5130 GAP-CLOSE-PWR
SC3300P50V3KX-1GP
5130_OUT1D G86
close to IC 5130_OUT1D 46 1 2
1 2
1 2
* L : PWM fixed (300KHz) ~0.3V(Max) 5130_TRIP3 18KR2F-GP

5130_TRIP1 C392 GAP-CLOSE-PWR
C410 5130_INV1 DCBATOUT_5130 1 2
5130_TRIP2 SCD1U25V3ZY-3GP
2
5130_FB1 OCP
5130_FLT G80
SB 0201 close to IC 12A=>R225=18K 1 2
1
5130_FLT 5130_OUT2D
C C408
C399 5130_INV1
5130_OUT2D 46 18A=>R225=28K
GAP-CLOSE
C
SCD01U16V2KX-3GP ZZ.CON2C.XX1
2
U15
48
47
46
45
44
43
42
41
40
39
38
37
1 2
T(soft)=1.736ms G81
3D3V_AUX_S5 SC1500P50V3KX-GP C381 1 2
INV1
FLT
LH1
OUT1_U
LL1
OUT1_D
OUTGND1
TRIP1
VIN_SENSE12
TRIP2
OUTGND2
OUT2_D
U69 2N7002DW-7F-GP 5130_LH2 1 2 5130_LL2 5130_LL2 46,58
U41E 5130_3D3V_LDO GAP-CLOSE
14
TSLCX14MTC-L-U 4 3 5130_SS_STBY3 SCD1U50V3KX-GP ZZ.CON2C.XX1

-1 0310 G24
1
PM_SLP_S5 5 1D2V_S0_EN# DCBATOUT_5130
20,34 PM_SLP_S5# 11 10 2
R549 5130_FB1 1 36
close to IC 1 2
5130_SS_STBY1 6 100KR2J-1-GP 5130_SS_STBY1 FB1 LL2 5130_OUT2U

1 2 SS_STBY1 OUT2_U 35 5130_OUT2U 46 1 2 C375 5130_5V_LDO 5130_3D3V_LDO GAP-CLOSE
5130_INV2 3 34 SCD1U50V3KX-GP ZZ.CON2C.XX1
7
INV2 LH2
SC1500P50V3KX-GP
5130_FB2 4 33
2
FB2 VIN
1
R550 5130_SS_STBY2 5 32
SS_STBY2 VREF3.3
1
R545 PM_SLP_S3# 1 2 5130_PWMSEL 6 31

C411 100KR2J-1-GP 5130_CT PWM_SEL VREF5 5130_REGIN
7 30 1 R538 2
DUMMY-R2 8
CT
TPS5130 REG5V_IN
29 0R0805-PAD 5V_S5
2
GND LDO_IN
1
5130_REF 9 28 5130_3D3V_LDO
2
REF LDO_CUR C377 C376

10 STBY_VREF5 LDO_GATE 27
1 R191 2 STBY_REF 11 26 5V_AUX_S5 SC4D7U10V5ZY-3GP SC4D7U10V5ZY-3GP
DCBATOUT_5130
2
100KR2J-1-GP 5130_STBY_LDO 12 STBY_VREF3.3 LDO_OUT
STBY_LDO INV_LDO 25 78.47593.41L 78.47593.41L
1 R537 2
LDO SETTING 0R3J-3-GP
VIN_SENSE3
3D3V_AUX_S5
PG_DELAY
SS_STBY3
OUTGND3
OUT3_U
OUT3_D
PGOUT
B B
TRIP3
INV3
FB3
LH3
LL3
U41D 5130_CT
14
13
14
15
16
17
18
19
20
21
22
23
24
9 8 1D2V_S0_EN# C414 TPS5130PTRG4-GP-U
39 1D2V_S0_EN SC47P50V2JN-3GP
2
5130_SS_STBY3
TSLCX14MTC-L-U 5130_FB3
7
5130_INV3
5130_OUT3D 5130_OUT3D 46
5130_LL3
5130_OUT3U 5130_OUT3U 46
C387
5130_LH3 1 2 5130_LL3 46,58 Condition Voltage
5V_AUX_S5 U70 2N7002DW-7F-GP
5V_S0 SCD1U50V3KX-GP
5130_5V_LDO PWM_SEL H : Auto PWM/SKIP 2.2V(Min)~
1 R546 2 TPS5130_1D8V_EN# 3 4 1
1
100KR2J-1-GP
2 5 R540 3 * L : PWM fixed (300KHz) ~0.3V(Max)
5130_PG_DELAY
S5PWR_ENABLE 22,43 10KR2J-2-GP BAT54PT-GP

1 6 5130_SS_STBY2 DY 2
D13 DCBATOUT_5130
2
1
C413
84.27002.C3F SC4700P50V3KX-1GP 5130_TRIP3
2
SB 0201
A <Variant Name>
A
1
C400
SC2200P50V2KX-2GP
Wistron Corporation
2
1 R551 2 5130_STBY_LDO 5130_REF DY

17,20,34,38,39,56 PM_SLP_S3# 0R2J-GP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
1
DY Taipei Hsien 221, Taiwan, R.O.C.

1
C415
R552 SC1U10V3ZY-6GP Title
2
0R0402-PAD TPS5130 1D2V/1D8V2D5V/ (1/2)

2
A3
(Power Team) Bolsena-E SA
5 4 3 2 1
TI TPS5130 for 2D5V, 1D2V, 1D8V
(1D2V=>CH1 , 1D8V=>CH2 , 2D5V =>CH3)
DCBATOUT_5130
1D2V_PWR 1D2V_S0
1
D C845 C846 1
G15
2
D
5
6
7
8
SCD1U25V3ZY-3GP SC10U35V0ZY-1GP
2
U72 GAP-CLOSE-PWR
D
D
D
D
AO4422-1-GP G17
1 2
Imax=9.3A 1D2V GAP-CLOSE-PWR

G G18
S
S
S
4
3
Rdson=19.6~24mohm Iomax=5A 1 2
2
1
1D2V_PWR
L32
45 5130_OUT1U
5130_OUT1U OCP>10A GAP-CLOSE-PWR
5130_LL1 1 2 G21
45,58 5130_LL1
1 2
IND-3D3UH-57GP
SE220U4VDM-3GP
GAP-CLOSE-PWR
5
6
7
8
G20
1
U71
D
D
D
D
1 2
AO4422-1-GP TC12
GAP-CLOSE-PWR
2
G22
KEMET, NTD:10.5 (Q1) 1 2
G
S
S
S
ESR=25mohm GAP-CLOSE-PWR
4
3
2
1
Iripple=2.2A G23
1 2
5130_OUT1D 7.3*4.3*1.9
45 5130_OUT1D
GAP-CLOSE-PWR
G19
DCBATOUT_5130
C 1 2
C
GAP-CLOSE-PWR
1
1
C839 C840
5
6
7
8
2
2
U66 1D8V_PWR 1D8V_S5
D
D
D
D
AO4422-1-GP G16
1 2
Imax=9.3A GAP-CLOSE-PWR
G13
G
S
S
S
Rdson=19.6~24mohm
1D8V 1 2
4
3
2
1
5130_OUT2U
L31
1D8V_PWR Iomax=5A GAP-CLOSE-PWR
G10
45 5130_OUT2U
45,58 5130_LL2
5130_LL2 1 2 OCP>10A 1 2
GAP-CLOSE-PWR
IND-4D7UH-88-GP
SE220U4VDM-3GP
G14
5
6
7
8
1 2
1
U68
D
D
D
D
AO4422-1-GP TC11 GAP-CLOSE-PWR

G12
2
Imax=9.3A 1 2
Rdson=19.6~24mohm GAP-CLOSE-PWR
G
S
S
S
G9
4
3
2
1
1 2
B B
5130_OUT2D GAP-CLOSE-PWR
45 5130_OUT2D
G11
1 2
GAP-CLOSE-PWR
DCBATOUT_5130
2D5V_PWR 2D5V_S3
1
G31
C849 C847 1 2
5
6
7
8
2
U74 GAP-CLOSE-PWR
D
D
D
D
AO4422-1-GP G29
1 2
Imax=9.3A 2D5V GAP-CLOSE-PWR

G30
G
S
S
S
Rdson=19.6~24mohm Iomax=9A 1 2
4
3
2
1
2D5V_PWR
L33
45 5130_OUT3U
5130_OUT3U OCP>18A GAP-CLOSE-PWR
5130_LL3 1 2 G26
45,58 5130_LL3
1 2
IND-4D7UH-88-GP
SE220U4VDM-3GP
GAP-CLOSE-PWR
5
6
7
8
G28
1
U75
D
D
D
D
1 2
AO4422-1-GP TC13
A GAP-CLOSE-PWR
<Variant Name>
A
2
G27
Imax=9.3A 1 2
Wistron Corporation
G
S
S
S
Rdson=19.6~24mohm GAP-CLOSE-PWR 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

4
3
2
1
G25 Taipei Hsien 221, Taiwan, R.O.C.

1 2
5130_OUT3D Title
45 5130_OUT3D
GAP-CLOSE-PWR
TPS5130 1D2V/1D8V2D5V/ (2/2)
(Power Team) A3 SA
Bolsena-E
AC_IN Threshold 2.089V Max.
AC_IN > 2.089V --> AC DETECT
BT+
ACOK is 17.8V DCBATOUT
AD+ U48 Rx R399 D01R2512F-4-GP

8 D S 1 AD+_TO_SYS 1 2
MAX1909_MODE 7 D S 2
D S
6 3 For EMI
1
5 D G 4
1
SC1U25V5ZY-4GP
R250 R384 C440 R215 DY
1
49K9R2F-L-GP 100KR2F-L1-GP AO4433-GP SCD1U25V3ZY-3GP DUMMY-R3 C449
2
C677 SCD1U25V3ZY-3GP
V (MODE) >=2.8V = 4Cell U22
2
1 S D 8
2
V (MODE) =1.8V = 3Cell
2
G58 G57 2 S D 7
2
Q14 MAX1909_ACIN 3 S D 6
D 2N7002PT-U MAX1909_PDL 4 G D 5
1
MAX1909_ICTL Close to GAP-CLOSE-PWR
GAP-CLOSE-PWR
1
3
R385 AO4433-GP
MAX1909 pin 24
1
13K3R2F-L1-GP
R225
1 330KR2F-L-GP
34 3S
2
G R219 DUMMY-R3
2
D15 1 2 DCBATOUT
S D 1 2 AD+_TO_SYS
AD+
C452 C453
3
MAX1909_CSSN
MAX1909_CSSP
Q9 CH521S-30-GP-U
2N7002PT-U MAX1909_LDO
2
1
34 3S2P_I 1
SCD1U25V3ZY-3GP
G C461 Near MAX1909
Icharge=3.2A SCD1U25V3ZY-3GP C454
2
2
Pin 2
1
SCD1U25V3ZY-3GP
2
S C460 C447 C439
4
3
2
1
SC10U35V0ZY-GP
MAX1909_DHIV
1 2
2
U20
G
S
S
S
MAX1909_LDO U24 SC1U10V3KX-3GP
26
25
AO4411-1-GP
1
84.04411.B37
R220
CSSP
CSSN
33R2J-2-GP
MAX1909_REF
D
D
D
D
1
1
MAX1909_PDS 27 22
5
6
7
8
PDS DHIV
1
3D3V_S5 R232 R238 AD+_TO_SYS 24

10KR2J-L2-GP SRC PDL 28 Near MAX1909
R237 100KR2F-L1-GP MAX1909_DC_IN 1 2 CHG_PWR-3 58
DCIN LDO Pin 21
1
49K9R2F-L-GP BT+
CHG_PWR-2 58
C468 -1 0310
R221
2
2
Icharge=3.5A 21 MAX1909_DLOV SC1U10V3KX-3GP -1 0310 L34
2
2
DLOV
1
MAX1909_VCTL 11 CHG_PWR-2 1 2 CHG_PWR-3 1 2

R224 MAX1909_ICTL 10 VCTL
ICTL
1
100KR2J-1-GP MAX1909_MODE 7 IND-15UH-41-GP D015R2512F-5-GP

MODE
1
R233 23 MAX1909_DHI
DHI
5
6
7
8
R236 37K4R2F-1-GP
2
D
D
D
D
D 73K2R2F-GP 3
2N7002PT-U ACIN
34 CHG_ON# 1
2
Q10 MAX1909_IINP 8 AO4422-1-GP DY C462

G
2
IINP
1
S MAX1909_DLO 84.04422.B37 C455
From KBC 20
2
DLO
SC10U25V0KX-3GP
SC10U25V0KX-3GP
MAX1909_CLS 9 U21 G38 G39 C448
CLS
SC10U25V6KX-1GP
G
S
S
S
2
3
4
3
2
1
2N7002PT-U
1
GAP-CLOSE-PWR
GAP-CLOSE-PWR
34 4S1P_I 1 MAX1909_ACOK 6 19
1
R234 Q12 ACOK PGND
G
2K94R2F-GPCELL is 4 Cell S 29
2
PGND
Icharge=1.4A
18
3 2
PKPRES# CSIP
Pre charge=0.3A 5 PKPRES
D
2N7002PT-U
34 PRE_CHG 1 SB 0127
Q11 MAX1909_CSIP
G From Battery Connector
S MAX1909_CCV 13 17 MAX1909_CSIN
2
MAX1909_CCI CCV CSIN

12 CCI BATT 16 BAT+SENSE 48
SB 0202 MAX1909_CCS 14 15
CCS GND
1
From Battery Connector
REF
R239 G40 GAP-CLOSE
10KR2J-2-GP 1 2
1
G41 4
1
34 AD_IA 1 2 C480 MAX8725ETI-GP-U MAX1909_LDO

2
C478 SCD01U50V3KX-4GP V_REF :4.2235V (<500uA) G32 GAP-CLOSE

2
GAP-CLOSE-PWR SCD01U50V3KX-4GP 1 2
2
1
1
1
C479 R231
MAX1909_REF
I Source = 4.5A ---> V (IINP) = 2.7V

1
R235 SCD1U16V3KX-3GP 68KR2F-GP

2
I Source = 3.42A ---> V (IINP) = 2.05V C477 R228

20KR2F-L-GP SCD1U16V3KX-3GP 49K9R2F-L-GP
R230
2
2
2
2 1 PKPRES#
2
MAX1909_CLS 34,48 BAT_THERMAL
1
SC1U10V3KX-3GP
0R0402-PAD
1
MAX1909_LDO R227
1
C467 100KR2J-1-GP
R226
2
3D3V_AUX_S5 63K4R3F-GP
Rx 90W ADAPTER
2
64.63425.55L
1
R557
U41F 100KR2J-1-GP
14
34 AC_IN# 12 13 MAX1909_ACOK
1
SC1U10V3KX-3GP
ISOURCE_MAX = (0.075/Rx)*(VCLS/VREF)
1
TSLCX14MTC-L-U R555
<Variant Name>
7
D C854 150KR2J-GP TOTAL_POWER :

Adapter=90W,Total_Power=79.7W
2
3
Wistron Corporation
2

1 MAX1909_IINP Taipei Hsien 221, Taiwan, R.O.C.
G
Q13 Title
2
2N7002PT-U -1 0302
S CHARGER MAX8725
Custom
Bolsena-E SA
(Power Team) Date: Thursday, October 13, 2005 Sheet 47 of 58
A B C D E
Adaptor in to generate DCBATOUT
D29
K A
DY AD+
AD_JK MMPZ5252BPT-GP
4 DC1 4
4 U45
1 S D 8
1
2 S D 7
1 3 S D 6 C666
1
AD+_2 4 G D 5 SCD1U25V3ZY-3GP
2
1
C656
2 C657 SCD1U50V3ZY-GP AO4433-GP
1
SCD1U50V3ZY-GP
2
R379 ID = -10A/70deg
1
3 200KR2J-L1-GP
Rds(ON) = 24mohm
IN
GND
C7
5 SCD1U50V3ZY-GP SO-8
2
1
2
6
MH1
Q2
R2
DC-JACK75-U1-GP
1
CHDTA124EUPT-GP
OUT
R380
R1
22.10037.701 100KR2J-1-GP
3
ME : 22.10037.701
3 OUT
R1
2
2nd:22.10037.B02
R2
CHDTC124EU-1GP
Q1
2GND
IN
3 3
34 AD_OFF
1
R2
1KR2J-1-GP
2
5V_AUX_S5
BATTERY CONNECTOR
2
D42 BAV99PT-GP-U
D41
BAV99PT-GP-U
DY BAT1
1
3
DY
2
1 R553 2 BTSMCLK 3
34 BAT_SCL_5 R556 2 27R3F-GP BTSMDATA
34 BAT_SDA_5 1 4
BT+ 34,47 27R3F-GP 5
BAT_THERMAL
47 BAT+SENSE 1 R554 2 6
0R0402-PAD 7
SCD1U50V3ZY-GP
SCD1U50V3ZY-GP
SC1KP50V2JN-2GP
SC1KP50V2JN-2GP
AMP-CON7-S-GP
1
2 EC68 EC66 2
SC10P50V2JN-1
SC10P50V2JN-1
C851 C852 20.80604.007
C853 C850
2
Put close to battery connector
2
DY ME :20.80604.007
2nd:20.80269.007
MAX1999_LDO5
DCBATOUT
Low3 Circuit : DY 12.78V (High)

1
C435
R213 SCD1U10V2KX-LGP Turn On
1MR2J-1-GP
2
DY
U19 11.25V (Low)
2
HTH 1 5 Turn Off

HTH VCC
L3# at 11.25V 2 GND
3 LTH RESET#/RESET 4 LOW3_OFF 22
1
DY
R212 G680LT1F-GP
1 <Core Design> 1
15KR2F-GP Output type: DY
Open-Drain RESET#
Wistron Corporation
2
HTH
DY Taipei Hsien 221, Taiwan, R.O.C.
1
R211 Title
110KR2F-GP
AD/BATT CONN
2
A3 SA
Bolsena-E
A B C D E
5 4 3 2 1
U54A
STRAPS PIN DESCRIPTION OF RECOMMENDED SETTING RECOMMENDED
PART 1 OF 7
PEG_RXP0 AJ31 AK27 C219 1 2 SCD1U16V2ZY-2GP PEG_TXP0
PEG_RXN0 PCIE_RX0P PCIE_TX0P C220 1 PEG_TXN0
AH31 PCIE_RX0N PCIE_TX0N AJ27 2 SCD1U16V2ZY-2GP STRAP_B_PTX_PWRS_ENB GPIO0 TRANSMITTER POWER SAVINGS ENABLE INSTALL
- FULL TX OUTPUT SWING 10K RESISTOR
PCIE TEST PADS
PEG_RXP1 AH30 P AJ25 C200 1 2 SCD1U16V2ZY-2GP PEG_TXP1 TRANSMITTER DE-EMPHASIS ENABLE
PCIE TEST POINTS MUST BE WITHIN 250 MILS AG30 AH25 2 SCD1U16V2ZY-2GP STRAP_B_PTX_DEEMPH_EN GPIO1 DEPENDS ON PCIE CHIPSET BEING USED TBD
PCIE_RX1N C PCIE_TX1N
FOR M26X,M5X
OF THE ASIC BALL WITH POSITIVE AND NEGATIVE
SIGNALS THE SAME DISTANCE
I INSTALL WITH ATI RS480,RS400,RX480,
PEG_RXP2 AG32 AH28 C217 1 2 SCD1U16V2ZY-2GP PEG_TXP2 RC410,RS482 CHIPSETS
PEG_RXN2 AF32
PCIE_RX2P - PCIE_TX2P
AG28 C218 1 2 SCD1U16V2ZY-2GP PEG_TXN2 FOR M26X ONLY
PCIE_RX2N PCIE_TX2N
D E DO NOT INSTALL WITH INTEL 915PM CHIPSET D
PEG_RXP3
X C198 1 PEG_TXP3
AF31 PCIE_RX3P PCIE_TX3P AG27 2 SCD1U16V2ZY-2GP
PEG_RXN3 AE31 PCIE_RX3N
P PCIE_TX3N AF27 C199 1 2 SCD1U16V2ZY-2GP PEG_TXN3 DO NOT INSTALL
RSVD GPIO(3:2) NO ATI FEATURE ENABLED
R 10K RESISTORS
PEG_RXP4 AE30 PCIE_RX4P
E PCIE_TX4P AF25 C215 1 2 SCD1U16V2ZY-2GP PEG_TXP4 REVERSE LANES NOT REVERSED LANE (M26X)
PEG_RXN4 AD30 S AE25 C216 1 2 SCD1U16V2ZY-2GP PEG_TXN4 GPIO4 DO NOT INSTALL
PCIE_RX4N PCIE_TX4N
DEBUG ACCESS NO DEBUG ACCESS (M52P,M54P,M56P) 10K RESISTOR
S
PEG_RXP5 AD32 AE28 C196 1 2 SCD1U16V2ZY-2GP PEG_TXP5 STRAP_FORCE_COMPLIANCE DO NOT FORCE COMPLIANCE STATE QUICKLY (M26X)
AC32 PCIE_RX5N PCIE_TX5N AD28 2 SCD1U16V2ZY-2GP sets the desired PCIE PLL GPIO5 INSTALL
I bandwidth for M5x parts. NO ATI FEATURE ENABLED (M52P,M54P,M56P) 10K RESISTORS
N
PEG_RXP6 AC31 AD27 C213 1 2 SCD1U16V2ZY-2GP PEG_TXP6 COMMON MODE RANGE NORMAL RANGE (M26X)
PEG_RXN6 PCIE_RX6P T PCIE_TX6P C214 1 PEG_TXN6 DO NOT INSTALL
AB31 PCIE_RX6N PCIE_TX6N AC27 2 SCD1U16V2ZY-2GP GPIO6
E NO ATI FEATURE ENABLED (M52P,M54P,M56P) 10K RESISTORS
RSVD
TPAD28 TP108 1 PEG_RXP7 AB30
R AC25 C194 1 2 SCD1U16V2ZY-2GP PEG_TXP7 DEBUG ACCESS NO DEBUG ACCESS (M26X)
TPAD28 TP90 PEG_RXN7 PCIE_RX7P PCIE_TX7P C195 1 PEG_TXN7
1 AA30 PCIE_RX7N F PCIE_TX7N AB25 2 SCD1U16V2ZY-2GP GPIO8 DO NOT INSTALL
FORCE_COMPLIANCE DON'T FORCE COMPLIANCE STATE(M52P,M54P,M56P) 10K RESISTORS
A
PEG_RXP8 AA32 PCIE_RX8P
C PCIE_TX8P AB28 C211 1 2 SCD1U16V2ZY-2GP PEG_TXP8
PEG_RXN8 Y32 AA28 C212 1 2 SCD1U16V2ZY-2GP PEG_TXN8 ROMIDCFG(3:0) GPIO[9,13:11] SERIAL FLASH ROM TYPE (M26X,M52P,M54P,M56P) 1011
PCIE_RX8N E PCIE_TX8N - SERIAL M25P10 ROM
PEG_RXP9 Y31 AA27 C192 1 2 SCD1U16V2ZY-2GP PEG_TXP9 IF NO ROM

W31 PCIE_RX9N PCIE_TX9N Y27 2 SCD1U16V2ZY-2GP MEMORY APERTURE SIZE GPIO[13:11] GPIO11(M26X) AND GPIO12,13(M52,M54,M56)
SET MEMORY APERTURE SIZE TBD
C SEE M26X,M54X,M56X DATA BOOK FOR C
PEG_RXP10 W30 Y25 C209 1 2 SCD1U16V2ZY-2GP PEG_TXP10 MEMORY,FRAME BUFFER APERATURE SETTINGS
V30 PCIE_RX10N PCIE_TX10N W25 2 SCD1U16V2ZY-2GP
MEM_TYPE MEMID MEMORY TYPE AND SPEED SELECT TBD

PEG_RXP11 V32 W28 C190 1 2 SCD1U16V2ZY-2GP PEG_TXP11 (3:0)
U32 PCIE_RX11N PCIE_TX11N V28 2 SCD1U16V2ZY-2GP
PEG_RXP[15..0]
12 PEG_RXP[15..0]
RSVD H2SYNC ATI FEATURE NOT ENABLED (M52P,M54P,M56P) DO NOT INSTALL
PEG_RXN[15..0] PEG_RXP12 U31 V27 C207 1 2 SCD1U16V2ZY-2GP PEG_TXP12 V2SYNC 10K RESISTORS
12 PEG_RXN[15..0] PCIE_RX12P PCIE_TX12P
PEG_RXN12 T31 U27 C208 1 2 SCD1U16V2ZY-2GP PEG_TXN12 NO STRAP FUNCTION GENERICC NO STRAP (M26X)
PEG_TXP[15..0] PCIE_RX12N PCIE_TX12N
12 PEG_TXP[15..0]
PEG_TXN[15..0] PEG_RXP13 T30 U25 C188 1 2 SCD1U16V2ZY-2GP PEG_TXP13
12 PEG_TXN[15..0] PEG_RXN13 PCIE_RX13P PCIE_TX13P C189 1 PEG_TXN13
R30 PCIE_RX13N PCIE_TX13N T25 2 SCD1U16V2ZY-2GP RSVD PCIE_TEST ATI FEATURE NOT ENABLED (M52P,M54P,M56P)
NO STRAP FUNCTION NO STRAP (M26X)

REFER TO PCI EXPRESS DESIGN GUIDE PEG_RXP14 R32 T28 C205 1 2 SCD1U16V2ZY-2GP PEG_TXP14
FOR RECOMMENDED AC COUPLING CAPS P32 PCIE_RX14N PCIE_TX14N R28 2 SCD1U16V2ZY-2GP
PLACEMENT ALONG THE TX INTERCONNECT
PEG_RXP15 P31 R27 C186 1 2 SCD1U16V2ZY-2GP PEG_TXP15 3D3V_S0
N31 PCIE_RX15N PCIE_TX15N P27 2 SCD1U16V2ZY-2GP
R62 1 2 10KR2J-2-GP
Clock Calibration 50 VGA_GPIO0 R412 10KR2J-2-GP
50 VGA_GPIO1 1 2
AL28 DY R409 1 2 10KR2J-2-GP
3 GFX_CLK PCIE_REFCLKP 50 VGA_GPIO2 R411 10KR2J-2-GP
3 GFX_CLK# AK28 PCIE_REFCLKN PCIE_CALRN_VGA R110 1 50 VGA_GPIO3 DY 1 2
PCIE_CALRN AE24 2 2KR2F-3-GP 1D2V_S0 50 VGA_GPIO4 DY R402 1 2 10KR2J-2-GP
B PCIE_CALRP_VGA R111 1 B
R107 PCIE_CALRP AD24 2 562R3F-GP 50 VGA_GPIO5
R403 1 2 10KR2J-2-GP
DY R408 1 2 10KR2J-2-GP
AG_RST#_1 PCIE_CALI_VGA R108 1 50 VGA_GPIO6
13,17,34,37 LPC_RST# 1 2 AG24 PERSTB PCIE_CALI AB24 2 1K47R3F-GP 50 VGA_GPIO8 DY R58 1 2 10KR2J-2-GP
0R2J-GP FOR M26X DY R67 1 2 10KR2J-2-GP
PCIE SIGNALS CONNECT TO ROOT COMPLEX PCIE_TEST AA24 PCIE_TEST PCIE_CALRN = 100R
PCIE CALRP = 150R 23 22 21 20 R397 1 10KR2J-2-GP
R103
PCIE CALI = 10K 50 VGA_GPIO11 DY R59 1
2
10KR2J-2-GP
50 VGA_GPIO12 2
2PERSTB_MASK Tie To VSS
1 AF24 PERSTB_MASK FOR M52P,M54P,M56P MEM_ID0 MEM_ID2 50 VGA_GPIO13 DY R56 1 2 10KR2J-2-GP
PCIE_CALRN = 2K MEM_ID1 MEM_ID3 MEM SIZE VENDOR CHIPs 50 VGA_GPIO9 DY R60
GPIO[9,13:11]=0010
1
for 256M
2 10KR2J-2-GP
10KR2F-2-GP PCIE CALRP = 562R 1 0 1 0 Infineon R65 1 10KR2J-2-GP
64M 16M*16 x2 50 MEM_ID3 DY 2
71.0M52P.00U PCIE CALI = 1.47K 1 1 1 0 64M 16M*16 Hynix x2 DY R64 1 2 10KR2J-2-GP
0 1 1 0 Samsung 50 MEM_ID2 R63 1 10KR2J-2-GP
128M 16M*16 x4 50 MEM_ID1 DY 2
0 0 1 0 256M 32M*16 Samsung x4 R66 1 10KR2J-2-GP
M52P:71.0M52P.A0U 0 1 0 0 Infineon 50 MEM_ID0 128V R88 1
2
10KR2J-2-GP
128M 16M*16 x4 50 DAC2_HSY DY 2
1 1 0 0 256M 32M*16 Infineon x4 R89 1 10KR2J-2-GP
1 0 0 0 Hynix 50 DAC2_VSY DY R100 1
2
10KR2J-2-GP
128M 16M*16 x4 50 GENERICC DY 2
0 0 0 0 256M 32M*16 Hynix x4 PCIE_TEST R113 1 10KR2J-2-GP
DY 2
When no ROM is attached, GPIO[9] is set to 0.

GPIO[13:12] is used to select the frame buffer aperture size.
GPIO[13:12] = 00: 128M frame buffer, same as ROM strap 00
GPIO[13:12] = 11: reserved, same as ROM strap 11
A <Variant Name> A
Wistron Corporation
Title
ATI M5X-P PCIE 1/4
A3 SA
AG1
5 4 3 2 1
5 4 3 2 1
U54B PART 2 OF 7
[USE ICS MK1726-08] Integrated TXCM

AL9
AM9
3D3V_S0 TMDS TXCP
TX0M AK10
AG8 GPIO_34 TX0P AL10
AH7 GPIO_33
1
C71 TC2 AG9 AL11
GPIO_32 TX1M
SC22U6D3V5MX-2GP
MK1726_XI
SCD1U25V3ZY-3GP
AH8 GPIO_31 V TX1P AM11
U5 AJ8
2
1 GPIO_30 I
2
X1 AH9 AL12
2
GPIO_29 TX2M
1
C36 R39 XTAL-27MHZ-31-GP 1 8 AG10 D AM12

X1/CLK X2 GPIO_28 TX2P
SC27P50V2JN-2-GP
2 7 AF10
D 1MR2J-1-GP 3
GND VDD
6 SS_PD AH6
GPIO_27 E AK9 DUAL LINK IS D
2
Expand GPIO
SO PD# GPIO_26 TX3M
MK1726_XO 4 5 MK1726_REF AF8 O AJ9 Placed close to ASIC end. ONLY SUPPORTED ON M56P
12
SSCLK REFCLK GPIO_25 TX3P

AF7 GPIO_24 DO NOT CONNECT TXM,P[3:5]
2
C64 3D3V_S0 AE9 AK11
GPIO_23 TX4M WITH M52P,M54P,M26X
SC27P50V2JN-2-GP MK1726-08SLF-GPU R50 AE10 & AJ11
2
GPIO_22 TX4P
2
180R2F-1-GP R51 AG7
0R2J-GP GPIO_21
AF9 GPIO_20 TX5M AK12
R30 DY AF13 M AJ12
1
0R2J-GP VGA_GPIO16 XTALIN_M24 GPIO_19 TX5P R428
AE13 GPIO_18 U
DY AM8 VGA_TPVDD 1 2 2D5V_S0
2 1
TPVDD
1
SS_SEL L C697 FOR M26X TPVDD
1
R44 SC1U6D3V2KX-GP 0R3J-3-GP
adjust SWING 105R3F-2-GP
T TPVSS AL8 CONNECT TO +1.8V
I FOR M52P,M54P,M56P
R31 at 1.2v AJ6
2
0R2J-GP TXVDDR_1 CONNECT TO +2.5V
AK4 M AK6
2
NC_DVOVMODE_0 TXVDDR_2
DY AL4 AL6
1
NC_DVOVMODE_1 E TXVDDR_3 VGA_TXVDDR

TXVDDR_4 AM6 FOR M26X TXVDDR
AF2 D C695 C104 C103
DVPCNTL_0 CONNECT TO +1.8V
1
SCD1U10V2KX-LGP
AF1 SC1U6D3V2KX-GP SCD1U10V2KX-LGP R425
1 2 AF3
DVPCNTL_1 I AJ7 1 2
FOR M52P,M54P,M56P
DVPCNTL_2 TXVSSR_1 2D5V_S0
AG1 A AK7 CONNECT TO +2.5V
2
DVPCLK TXVSSR_2 0R3J-3-GP
AG2 DVPDATA_0 TXVSSR_3 AL7
DVPCNTL,DVPDATA[23..0] R423 1KR2J-1-GP AG3 AM7
DVPDATA_1 TXVSSR_4
ARE CONFIGURED FOR Modulation Rate AH2 DVPDATA_2 TXVSSR_5 AK8
AH3
+3.3V SIGNALING MODE DVPDATA_3
Center AJ2 DVPDATA_4
ON THIS DESIGN SEL1 SEL0 AJ1 AK24 DIS_R 57
Spread AK2
DVPDATA_5 DAC / CRT R
AM24 DIS_G 57
DVPDATA_6 G
L L +-0.5% AK1 AL24 DIS_B 57
VIP Host/External TMDS

3D3V_S0 DVPDATA_7 B
C FOR M26X AK3 DVPDATA_8
C
1
R4521
R4451
R446
CONNECT TO +1.8V OR VSS L H +-1.0% AL2 DVPDATA_9 HSYNC AJ23 DIS_HS 15
AL3 AJ22 DIS_VS 15
TO DEFINE DVO SIGNAL LEVEL DVPDATA_10 VSYNC
H L +-1.5% AM3 DVPDATA_11 GENERICA AK22
4
3
FOR M52P,M54P,M56P AE6
RN11 DVPDATA_12 VGA_GENERICB R104 1
NOT CONNECTED H H No Spread AF4 AF23 2 1KR2F-3-GP
2
150R2F-1-GP 2
150R2F-1-GP 2
DVPDATA_13 GENERICB
SRN4K7J-8-GP AF5 DVPDATA_14
150R2F-1-GP
AG4 AL22 VGA_CRT_RSET R441 1 2 499R2F-1-GP
TPAD30 TP84 DVPDATA_15 RSET
AJ3 DVPDATA_16
ANY UNUSED GPIO CAN OPTIONALLY BE 1 TPAD30 TP83 AH4 AL25 VGA_AVDD C720 R455 1 2 0R3J-3-GP
2
DVPDATA_17 AVDD_1 2D5V_S0
1
EDID_DAT AJ4 AM25 SC1U6D3V2KX-GP FOR M26X AVDD
PANEL TYPE CONFIG STRAPS 13,16 EDID_DAT
EDID_CLK DVPDATA_18 AVDD_2
13,16 EDID_CLK AG5 DVPDATA_19 CONNECT TO +1.8V
AH5 AK23
2
49 MEM_ID3
AF6
DVPDATA_20 AVSSQ
AK25
FOR M52P,M54P,M56P
49 MEM_ID2 DVPDATA_21 AVSSN_1 CONNECT TO +2.5V
ANY UNUSED GPIO CAN OPTIONALLY BE49 MEM_ID1 AE7 DVPDATA_22 AVSSN_2 AJ24
MEMORY TYPE CONFIG STRAPS 49 MEM_ID0 AG6 DVPDATA_23
SC4D7U6D3V3KX-GP
AM23 VGA_VDD1DI C713 1 2 0R3J-3-GP
VDD1DI 2D5V_S0
1
SCD1U10V2KX-LGP
AD4 C714 C718 R447 FOR M26X VDD1DI
49 VGA_GPIO0 GPIO_0 General SC1U6D3V2KX-GP
49 VGA_GPIO1 AD2 GPIO_1 VSS1DI AL23 CONNECT TO +1.8V
AD1 Purpose
2
49 VGA_GPIO2
AD3
GPIO_2 I/O
AK15
FOR M52P,M54P,M56P
3D3V_S0 3D3V_S0 49 VGA_GPIO3 GPIO_3 R2
DAC2 (TV/CRT2) CONNECT TO +2.5V
49 VGA_GPIO4 AC1 GPIO_4 G2 AM15
49 VGA_GPIO5 AC2 GPIO_5 B2 AL15
49 VGA_GPIO6 AC3 GPIO_6
2
1 AB2 GPIO_7_BLON H2SYNC AF15 DAC2_HSY 49 DAC2 CAN BE TV SIGNALS OR SECONDARY CRT
R57 R77 TPAD28 TP82 AC6 AG15
49
499R2F-1-GP VGA_GPIO8 GPIO_8 V2SYNC DAC2_VSY 49 SIGNALS AS CONTROLLED BY AN INTERNAL MUX
10KR2J-2-GP 49 VGA_GPIO9 AC5 GPIO_9
TPAD30 TP7 AC4 AJ15
GPIO_10 Y DIS_LUMA 57
AB3 AJ13
1
B 49 VGA_GPIO11 GPIO_11 C DIS_CRMA 57 B

49 VGA_GPIO12 AB4 GPIO_12 COMP AH15 DIS_COMP 57
R94
R91
R90
49 VGA_GPIO13 AB5 GPIO_13
VGA_ALERT# SCD1U10V2KX-LGP VGA 0R2J-GP AD5 AK14 VGA_TV_RSET R438 1 2 715R2F-GP
GPIO_14 R2SET
1
C107 56 GPIO_PWRCNTL 1 R82 2 POW_SW AB8 R439

GPIO_15
1
1
1
R78 VGA_GPIO16 AA8 AM16 VGA_A2VDD C711 C710 1 2 0R3J-3-GP
GPIO_16 A2VDD_1 2D5V_S0
1
SCD1U10V2KX-LGP
150R2F-1-GP
150R2F-1-GP
150R2F-1-GP
499R2F-1-GP VGA_ALERT# AB7 AL16 SC1U6D3V2KX-GP
2
GPIO_17 A2VDD_2
AB6 NC_AB6
PLACE VREF DIVIDER AND CAP CLOSE TO ASIC AM17 FOR M26X A2VDDQ
2
2
VGA_VREF A2VSSN_1
AC8 AL17 CONNECT TO +1.8V
2
2
2
VREFG A2VSSN_2
FOR M26X PVDD AG12 AL14 VGA_A2VDDQ 1 TPAD28 TP88 FOR M52P,M54P,M56P
22 VGA_LOCAL_DP DPLUS NC_A2VDDQ
CONNECT TO +1.8V Thermal IT IS NO CONNECT
AH12 Diode AK13
FOR M52P,M54P,M56P 22 VGA_LOCAL_DN DMINUS A2VSSQ
VGA_PVDD
1
CONNECT TO +2.5V AJ14 AJ16 VGA_VDD2DI SC4D7U6D3V3KX-GP 1 2 2D5V_S0

PVDD VDD2DI
1
R437 C708 C126 PLL & C125 C716 R449 0R3J-3-GP FOR M26X VDD2DI
1 2 SC10U10V5KX-2GP SC1U6D3V2KX-GP AH14 XTAL AJ17
2D5V_S0 CONNECT TO +1.8V
2
0R3J-3-GP PVSS VSS2DI
2
R79 VGA_MPVDD A6 SC1U6D3V2KX-GP C715 FOR M52P,M54P,M56P
C101 C102 MPVDD SCD1U10V2KX-LGP CONNECT TO +2.5V
VGA_CORE_S0 1 2 A5 MPVSS
1
0R3J-3-GP SC1U6D3V2KX-GP Monitor AF11 1 TP9 TPAD28

SCD1U10V2KX-LGP XTALIN_M24 Interface HPD1 R80 2
FOR M26X MPVDD AL26 XTALIN 1 100KR2J-1-GP
TPAD28 TP89 1AM26
CONNECT TO +1.8V
2
XTALOUT
AH22 DIS_CRT_DDC_D 15
FOR M52P,M54P,M56P DDC1DATA
R99 AG14 PLLTEST DDC1CLK AH23 DIS_CRT_DDC_C 15 For CRT
CONNECT TO VDDC
1 2 VGA_TESTEN AG22 AH13
1KR2J-1-GP TESTEN Test DDC2DATA
DDC2CLK AG13 For DVI
A <Variant Name> A
VOLTAGE DIVIDER 3.3V MEM SS 3D3V_S0 1 R61 2 AC7 ROMCSb DDC3DATA AE12
10KR2J-2-GP ROM AF12 For THERMAL SENSOR
MODOUT TO 1.2V XTALIN/OUT DDC3CLK
DY Wistron Corporation
adjust SWING at 1.2v External GENERICC AE23 GENERICC 49 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
AK17 SSC Taipei Hsien 221, Taiwan, R.O.C.
LVSSR_1
AJ19 LVSSR_2 LVDS PLL LPVSS AE18
AF18 FOR M26X GENERICC Title
LVSSR_3 and I/O
AH17
AG17
LVSSR_4 GND
AF22
NO CONNECT OR ATI M5X-P IO 2/4
AG19
LVSSR_5 LVDS PLL LVSSR_10
AF17
EXT SPREAD SPECTRUM INPUT Size Document Number Rev
LVSSR_6 and I/O LVSSR_9 FOR M52P,M54P,M56P A3
AH19 AF21 SA
LVSSR_7 GND LVSSR_8
IT IS GPIO Bolsena-E
5 4 3 2 1
5 4 3 2 1
U54C Ch-A U54D Ch-B

Part 3 of 7
FOR M52P,M54P,M26X Part 4 of 7
FOR M52P,M54P,M26X
PIN B25 IS MA12 (BA0) PIN H2 IS MAB12 (BA0)
M31 D26 PIN C25 IS MA13 (BA1) MDB0 B12 G4 MAB0 PIN H3 IS MAB13 (BA1)
DQA_0 MAA_0 MDB1 DQB_0 MAB_0 MAB1
M30 DQA_1 MAA_1 F28 PIN E29 IS MA15 (BA2) C12 DQB_1 MAB_1 E6 PIN D5 IS MAB15 (BA2)
D L31 D28 MDB2 B11 E4 MAB2 D
DQA_2 MAA_2 PIN E27 IS MA14 MDB3 DQB_2 MAB_2 MAB3
PIN F5 IS MAB14
L30 DQA_3 MAA_3 D25 C11 DQB_3 MAB_3 H4
H30 E24 FOR M56P MDB4 C8 J5 MAB4 FOR M56P
DQA_4 MAA_4 PIN B25 IS MA14 (BA0) MDB5 DQB_4 MAB_4 MAB5 PIN H2 IS MA14 (BA0)
G31 E26 B7 G5
MEMORY INTERFACE A
G30 DQA_6 MAA_6 D27 PIN C25 IS MA15 (BA1) C7 DQB_6 MAB_6 F4 PIN H3 IS MA15 (BA1)
MEMORY INTERFACE B
F31 F25 MDB7 B6 H6 MAB7
DQA_7 MAA_7 PIN E29 IS MA13 (BA2) MDB8 DQB_7 MAB_7 MAB8 PIN D5 IS MA13 (BA2)
M27 DQA_8 MAA_8 C26 F12 DQB_8 MAB_8 G3
M29 B26 PIN E27 IS MA12 MDB9 D12 G2 MAB9 PIN F5 IS MAB12
L28 DQA_10 MAA_10 D29 E11 DQB_10 MAB_10 D4
L27 B27 MDB11 F11 F2 MAB11
DQA_11 MAA_11 MDB12 DQB_11 MAB_11
J27 DQA_12 MAA_12 E27 F9 DQB_12 MAB_12 F5 MAB12_14 54,55
H29 E29 MDB13 D8 D5 1 TP8 TPAD28
G29 DQA_14 MAA_14 B25 D7 DQB_14 MAB_14 H2 B_BA0 54,55
G27 C25 MDB15 F7 H3 B_BA1 54,55
M26 DQA_16 G12 DQB_16
L26 MDB17 G11
DQA_17 MDB18 DQB_17 DQMB#0
M25 DQA_18 DQMAb_0 H31 H12 DQB_18 DQMBb_0 B8
L25 J29 MDB19 H11 D9 DQMB#1 RASB0#
DQA_19 DQMAb_1 MDB20 DQB_19 DQMBb_1 DQMB#2 54 RASB0# RASB1#
J25 DQA_20 DQMAb_2 J26 H9 DQB_20 DQMBb_2 G9 54,55 RASB1#
G28 G23 MDB21 E7 K7 DQMB#3
DQA_21 DQMAb_3 MDB22 DQB_21 DQMBb_3 DQMB#4 CASB0#
H27 DQA_22 DQMAb_4 E21 F8 DQB_22 DQMBb_4 M5 54 CASB0#
H26 B15 MDB23 G8 V2 DQMB#5 CASB1#
DQA_23 DQMAb_5 MDB24 DQB_23 DQMBb_5 DQMB#6 54,55 CASB1#
F26 DQA_24 DQMAb_6 D14 G6 DQB_24 DQMBb_6 W4
G26 J17 MDB25 G7 T9 DQMB#7 WEB0#
DQA_25 DQMAb_7 MDB26 DQB_25 DQMBb_7 54 WEB0# WEB1#
H25 DQA_26 H8 DQB_26 54,55 WEB1#
H24 MDB27 J8
DQA_27 MDB28 DQB_27 CSB0_0#
H23 DQA_28 K8 DQB_28 54 CSB0_0#
H22 J31 MDB29 L8 B9 RDQSB0
DQA_29 QSA_0 MDB30 DQB_29 QSB_0 RDQSB1 CSB1_0#
J23 DQA_30 QSA_1 K29 K9 DQB_30 QSB_1 D10 54,55 CSB1_0#
C J22 K25 MDB31 L9 H10 RDQSB2 C
DQA_31 QSA_2 MDB32 DQB_31 QSB_2 RDQSB3
E23 DQA_32 QSA_3 F23 K5 DQB_32 QSB_3 K6
MDB33 RDQSB4 CKEB0
read strobe
D22 DQA_33 QSA_4 D20 L4 DQB_33 QSB_4 N4 54 CKEB0
read strobe
D23 B16 MDB34 K4 U2 RDQSB5 CKEB1
DQA_34 QSA_5 MDB35 DQB_34 QSB_5 RDQSB6 54,55 CKEB1
E22 DQA_35 QSA_6 D16 L5 DQB_35 QSB_6 U4
E20 H15 MDB36 N5 V8 RDQSB7
DQA_36 QSA_7 MDB37 DQB_36 QSB_7
F20 DQA_37 N6 DQB_37
D19 MDB38 P4
DQA_38 MDB39 DQB_38 WDQSB0 CLKB0
D18 DQA_39 QSA_0B K31 R4 DQB_39 QSB_0B B10 54 CLKB0
MDB40 WDQSB1 CLKB0#
B19
B18
DQA_40 QSA_1B K28
K26 MDB41
P2
R2
DQB_40 QSB_1B E10
G10 WDQSB2
For GDDR2 54 CLKB0#
DQA_41 QSA_2B DQB_41 QSB_2B
write strobe
write strobe
C17 G24 MDB42 T3 J7 WDQSB3 CLKB1
DQA_42 QSA_3B MDB43 DQB_42 QSB_3B WDQSB4 55 CLKB1 CLKB1#
B17 DQA_43 QSA_4B D21 T2 DQB_43 QSB_4B M4 55 CLKB1#
C14 C16 MDB44 W3 U3 WDQSB5
DQA_44 QSA_5B MDB45 DQB_44 QSB_5B WDQSB6
B14 DQA_45 QSA_6B D15 W2 DQB_45 QSB_6B V4
C13 J15 MDB46 Y3 V9 WDQSB7
DQA_46 QSA_7B MDB47 DQB_46 QSB_7B RDQSB[7..0]
B13 DQA_47 Y2 DQB_47 54,55 RDQSB[7..0]
D17 F29 MDB48 T4 D6 ODTB0 ODTB0 54
DQA_48 ODTA MDB49 DQB_48 ODTB ODTB1 DQMB#[7..0]
E18 DQA_49 ODTA1 D24 R5 DQB_49 ODTB1 J4 ODTB1 54,55 54,55 DQMB#[7..0]
E17 MDB50 T5
DQA_50 MDB51 DQB_50 MDB[63..0]
F17 DQA_51 T6 DQB_51 54,55 MDB[63..0]
E15 D31 MDB52 V5 B4 CLKB0
DQA_52 CLKA0 MDB53 DQB_52 CLKB0 CLKB0# MAB[11..0]
E14 DQA_53 CLKA0b E31 W5 DQB_53 CLKB0b B5 54,55 MAB[11..0]
F14 MDB54 W6
DQA_54 MDB55 DQB_54 CKEB0 WDQSB[7..0]
D13 DQA_55 CKEA0 B30 Y4 DQB_55 CKEB0 C2 54,55 WDQSB[7..0]
H18 MDB56 R8
DQA_56 MDB57 DQB_56 RASB0#
H17 DQA_57 RASA0b B28 T8 DQB_57 RASB0b E2
G18 MDB58 R7
DQA_58 1D8V_S0 MDB59 DQB_58 CASB0#
G17 DQA_59 CASA0b C29 T7 DQB_59 CASB0b D3
B MDB60 B
G15 DQA_60 V7 DQB_60
G14 B31 MDB61 W7 B2 WEB0#
DQA_61 WEA0b MDB62 DQB_61 WEB0b
H14 DQA_62 W8 DQB_62
1
J14 B29 MDB63 W9 D2 CSB0_0#

DQA_63 CSA0b_0 R71 DQB_63 CSB0b_0 CSB0_1# TP81 TPAD28
CSA0b_1 C28 CSB0b_1 E3 1
C31 100R2F-L1-GP-U
MVREFD_0 CLKB1
C30 B20 N2
2
MVREFS_0 CLKA1 MVREFD1 CLKB1 CLKB1#

CLKA1b C19 B3 MVREFD_1 CLKB1b P3
C90 MVREFS1 C3 MVREFS_1
1
1
SCD1U10V2KX-LGP
C22 L3 CKEB1
CKEA1 R72 CKEB1
B24 MEM_RST AA3 J2 RASB1#
2
RASA1b 100R2F-L1-GP-U DRAM_RST RASB1b

B22 AA5 L2 CASB1#
2
CASA1b TEST_MCLK CASB1b

B21 AA2 M2 WEB1#
WEA1b 1D8V_S0 TEST_YCLK WEB1b
B23 AA7 K2 CSB1_0#
CSA1b_0 MEMTEST CSB1b_0 CSB1_1# TP4 TPAD28
CSA1b_1 C23 CSB1b_1 K3 1
1
8
7
6
5
R49 RN10
SRN4K7J-6-GP
100R2F-L1-GP-U
2
1
2
3
4
C75
1
1
SCD1U10V2KX-LGP
A PLACE MVREF DIVIDERS R55

<Variant Name> A
AND CAPS CLOSE TO ASIC

2
100R2F-L1-GP-U
PLACE MVREF DIVIDERS Wistron Corporation
2

AND CAPS CLOSE TO ASIC Taipei Hsien 221, Taiwan, R.O.C.
Title
ATI M5X-P MEM 3/4
A3 SA
Bolsena-E
5 4 3 2 1
5 4 3 2 1
R106 0R5J-5-GP
U54E
U54F VGA_PCIE_PVDD12 1 2 1D2V_S0
1D8V_S0 PART 5 OF 7 SC4D7U6D3V3KX-GP C147
Part 6 of 7
1
C162 SCD1U10V2KX-LGP FOR M26X PCIE_VDDR12
C1 VDDR1_1 PCIE_PVDD_12_1 V23 CONNECT TO +1.8V
SC10U10V5KX-2GP
AH27 AD16 J1 N23 C150
2
PCIE_VSS_1 VSS_38 VDDR1_2 PCIE_PVDD_12_2
1
FOR M52P,M54P,M56P
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
AC23 AA6 C729 C109 C105 C78 M1 P23 SC1KP16V2KX-GP
PCIE_VSS_2 VSS_39 VDDR1_3 PCIE_PVDD_12_3
AL27 PCIE_VSS_3 VSS_40 P7 R1 VDDR1_4 PCIE_PVDD_12_4 U23 CONNECT TO +1.2V
R23 P5 V1
2
PCIE_VSS_4 VSS_41 VDDR1_5
SC4D7U6D3V3KX-GPSC4D7U6D3V3KX-GP
P25 M3 AA1 N29 VGA_PCIE_VDDR12_1 1 2
PCIE_VSS_5 VSS_42 VDDR1_6 PCIE_VDDR_12_10
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
R25 M9 A3 N28 C167 R112
1
SC1KP16V2KX-GP
T26 L7 P9 N27 C175 C164 C166
PCIE_VSS_7 VSS_44 VDDR1_8 PCIE_VDDR_12_12 0R5J-5-GP
U26 PCIE_VSS_8 VSS_45 M7 J10 VDDR1_9 PCIE_VDDR_12_13 N26
SCD01U25V2KX-3GP SCD01U25V2KX-3GP
SCD01U25V2KX-3GP
SCD01U25V2KX-3GP
SCD01U25V2KX-3GP
W26 AD17 N9 N25
2
Y26 PCIE_VSS_10 VSS_47 AH11 P10 VDDR1_11
1
D D
AB26 A8 C135 C709 C116 C163 C117 C112 A9 AL31
PCIE_VSS_11 VSS_48 VDDR1_12 PCIE_VDDR_12_1 R460
AC26 U7 Y10 AM31
PCI-Express
PCIE_VSS_12 VSS_49 VDDR1_13 PCIE_VDDR_12_2 VGA_PCIE_VDDR12_2
AD25 C10 P8 AM30 1 2
2
PCIE_VSS_13 VSS_50 VDDR1_14 PCIE_VDDR_12_3 0R5J-5-GP
AE26 PCIE_VSS_14 VSS_51 E9 R9 VDDR1_15 PCIE_VDDR_12_4 AL32
1
AF26 F3 Y9 AL30 C730 C731 C176 C168
1 SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
AD26 J9 J11 AM28 C732
AG25 N7 A21 AL29
2
AH26 PCIE_VSS_18 VSS_55 N3 M10 VDDR1_20 PCIE_VDDR_12_8 AM29
Memory I/O
AC28 PCIE_VSS_19 VSS_56 Y5 N10 VDDR1_21 PCIE_VDDR_12_9 AM27
1
Y28 AM13 C77 C739 C76 Y8
PCIE_VSS_20 VSS_57 TC21 VDDR1_22
U28 PCIE_VSS_21 VSS_58 AC10 J18 VDDR1_23
P28 Y6 ST100U6D3VDM-5 J19 AC11 VGA_CORE_S0
2
PCIE_VSS_22 VSS_59 VDDR1_24 VDDC_1
AH29 PCIE_VSS_23 VSS_60 U6 K21 VDDR1_25 VDDC_2 AC12
AF28 E5 A12 P14 C115 C152 C138 C120 C148 C118
1
SCD1U10V2KX-LGP
SCD1U10V2KX-LGP
SCD1U10V2KX-LGP
SCD1U10V2KX-LGP
SCD1U10V2KX-LGP
SCD1U10V2KX-LGP
V29 PCIE_VSS_25 VSS_62 AL13 H13 VDDR1_27 VDDC_4 U15
AC29 PCIE_VSS_26 VSS_63 A11 A15 VDDR1_28 VDDC_5 W14
W27 U8 J20 W15
2
AB27 PCIE_VSS_28 VSS_65 U9 J13 VDDR1_30 VDDC_7 R17
PCI-Express GND
V26 PCIE_VSS_29 VSS_66 U10 K11 VDDR1_31 VDDC_8 R15

AJ26 PCIE_VSS_30 VSS_67 R6 K19 VDDR1_32 VDDC_9 V15
AJ32 PCIE_VSS_31 VSS_68 AD6 A18 VDDR1_33 VDDC_10 V16
AK29 V6 L23 T16 C111 C137 C136 C122 C121 C114 C151
1
SCD1U10V2KX-LGP
SCD1U10V2KX-LGP
SCD1U10V2KX-LGP
SCD1U10V2KX-LGP
SCD1U10V2KX-LGP
SCD1U10V2KX-LGP
SCD1U10V2KX-LGP
P26 PCIE_VSS_33 VSS_70 AD14 K20 VDDR1_35 VDDC_12 U16
P29 PCIE_VSS_34 VSS_71 AD13 K24 VDDR1_36 P VDDC_13 T17
Core
R29 D11 L24 U17 FOR M26X VDD25
2
T29 PCIE_VSS_36 VSS_73 J12 H19 VDDR1_38 O VDDC_15 V14 CONNECT TO +1.5V
U29 PCIE_VSS_37 VSS_74 K12 A24 VDDR1_39 VDDC_16 R18
W29 A13 K13 W T18 FOR M52P,M54P,M56P
Y29 F13 J32 V18 CONNECT TO +2.5V
AA29
PCIE_VSS_39
PCIE_VSS_40
VSS_76
VSS_77 E13 A30
VDDR1_41
VDDR1_42
E VDDC_18
VDDC_19 P18 R75
VGA_VDD25 C93 C123 1
SC1U6D3V2ZY-GP
AB29 F15 C32 P19 2 2D5V_S0
PCIE_VSS_41 VSS_78 VDDR1_43 R VDDC_20
1
SCD1U10V2KX-LGP
SCD1U10V2KX-LGP
AD29 K16 F32 R19 C130 0R3J-3-GP
AE29 PCIE_VSS_43 VSS_80 J21 L32 VDDR1_46 VDDC_22 W19
AF29 H16 AD11
2
PCIE_VSS_44 VSS_81 VDDC_23
AG29 PCIE_VSS_45 VSS_82 T15
AJ29 PCIE_VSS_46 VSS_83 V17 FOR M26X VDDPLL
AK26 PCIE_VSS_47 VSS_84 C15 VDD25_1 AC13 CONNECT TO VDDC
C AK30 PCIE_VSS_48 VSS_85 C4 VDD25_2 AC16 C
AG26 U14 AC18 FOR M52P,M54P,M56P
PCIE_VSS_49 VSS_86 VDD25_3
N30 PCIE_VSS_50 VSS_87 P15 R442 CONNECT TO +1.2V
VGA_VDDPLL C124
I/O Internal
R31 PCIE_VSS_51 VSS_88 A16 AB9 VDDR3_1 VDDPLL AC15 1 2 1D2V_S0
1
AF30 E16 AB10 C712 SCD1U10V2KX-LGP 0R3J-3-GP
PCIE_VSS_52 VSS_89 VGA_VDDR3 C106 VDDR3_2 SC4D7U6D3V3KX-GP
AC30 PCIE_VSS_53 VSS_90 G13 AA9 VDDR3_3 VDDCI_1 W10
1
SCD1U10V2KX-LGP
V31 G16 C140 C139 AC19 T14
2
PCIE_VSS_54 VSS_91 VDDR3_4 VDDCI_2
P30 PCIE_VSS_55 VSS_92 P17 AD18 VDDR3_5 VDDCI_3 W17 R97
AA31 R16 SC1U6D3V2KX-GP
SC1U6D3V2KX-GP AC20 P16
2
PCIE_VSS_56 VSS_93 VDDR3_6 VDDCI_4 VGA_VDDCI SCD1U10V2KX-LGP
U30 PCIE_VSS_57 VSS_94 R14 AD19 VDDR3_7 VDDCI_5 T23 1 2 VGA_CORE_S0
1
SCD1U10V2KX-LGP
SCD1U10V2KX-LGP
AD31 W16 AD20 K14 C110 C119 C131 C149
PCIE_VSS_58 VSS_95 VDDR3_8 VDDCI_6 SCD1U10V2KX-LGP 0R5J-5-GP
AK32 PCIE_VSS_59 VSS_96 C18 VDDCI_7 U19
I/0
AJ28 F16
2
PCIE_VSS_60 VSS_97 R424 R101
Y30 PCIE_VSS_61 VSS_98 W18 FOR M26X LPVDD
VGA_VDDR4 VGA_LPVDD C132
SC1U6D3V2ZY-GP
AJ30 PCIE_VSS_62 VSS_99 U18 1 2 1 AJ5 VDDR4_1 1 2 2D5V_S0 CONNECT TO +1.8V
1
SCD1U10V2KX-LGP
AK31 AE16 0R3J-3-GP C92 C693 AM5 0R3J-3-GP
PCIE_VSS_63 VSS_100 SC1U6D3V2KX-GP VDDR4_2 FOR M52P,M54P,M56P
AA23 PCIE_VSS_64 VSS_101 AE17 AL5 VDDR4_3 LPVDD/VDDL0 AE19
AG31 A19 AK5 CONNECT TO +2.5V
2
2
N24 PCIE_VSS_66 VSS_103 H32 LVDDR/VDDL0_1 AF20 R98
AB23 F19 R76 AE2 AE20
PCIE_VSS_67 VSS_104 VGA_VDDR5 VDDR5_1 LVDDR/VDDL0_2 VGA_LVDDRL0
P24 PCIE_VSS_68 VSS_105 G19 1 2 AE3 VDDR5_2 LVDDR/VDDL0_3 AF19 1 2 2D5V_S0 FOR M26X LVDDR PINS
1
1
0R3J-3-GP C85 C91 C133 C141
SC1U6D3V2ZY-GP
R24 N8 AE4 AE20,AF20,AF19
LVDS PLL, I/O

SCD1U10V2KX-LGP
T24 Y7 AE5 C134 0R5J-5-GP
PCIE_VSS_70 VSS_107 VDDR5_4 CONNECT TO +1.8V
SCD1U10V2KX-LGP
U24 T19 SC1U6D3V2KX-GP AC21
2
2
PCIE_VSS_71 VSS_108 LVDDR/VDDL1_1
V24 V19 SC1U6D3V2ZY-GP AC22 FOR M52P,M54P,M56P
2
PCIE_VSS_72 VSS_109 LVDDR/VDDL1_2
W24 PCIE_VSS_73 VSS_110 G21 A27 VDDRH0 LVDDR/VDDL1_3 AD22 CONNECT TO +2.5V
Clock
I/O
Memory
Y24 PCIE_VSS_74 VSS_111 C21 F1 VDDRH1 LVDDR/VDDL2_1 AE21 R109
AC24 PCIE_VSS_75 VSS_112 F21 VDDR4 AND VDDR5 LVDDR/VDDL2_2 AD21
AH24 AE14 AE22 VGA_LVDDRL1 1 2 FOR M26X LVDDR PINS
PCIE_VSS_76 VSS_113 IN M26X CAN BE 1.8V OR 3.3V LVDDR/VDDL2_3 C153
2D5V_S0
V25 PCIE_VSS_77 VSS_114 AK16 A28 VSSRH0 AC21,AC22,AD21,AD22,AE21,AE22
1
DEPENDING ON M26X DVOMODE
SCD1U10V2KX-LGP
C174 0R5J-5-GP
SC1U6D3V2ZY-GP
AA25 PCIE_VSS_78 VSS_115 U5 E1 VSSRH1
R26 F22 OR M52P,M54P,M56P REGISTER CONNECT TO +2.8V
PCIE_VSS_79 VSS_116
AA26 F18 CONFIGURATION FOR M52P,M54P,M56P
2
PCIE_VSS_80 VSS_117 R454
T27 PCIE_VSS_81 VSS_118 K30 CONNECT TO +2.5V
AE27 C24 1 2 VGA_VDDRH0
PCIE_VSS_82 VSS_119 1D8V_S0
1
F24 0R3J-3-GP C723

VSS_120
W23 PCIE_PVSS VSS_121 M24
A25 SC1U6D3V2KX-GP
2
B VSS_122 B
B1 VSS_1 VSS_123 D30
H1 E25 R422
VSS_2 VSS_124 VGA_VDDRH1
L1 VSS_3 VSS_125 G25 1 2
1
P1 G20 0R3J-3-GP C689

VSS_4 VSS_126
U1 VSS_5 VSS_127 G22
Y1 F27 SC1U6D3V2KX-GP
CORE GND
2
VSS_6 VSS_128
AD7 VSS_7 VSS_129 E28
AE8 VSS_8 VSS_130 H21 DY
AL1 VSS_9 VSS_131 C27 2 R453 1
A2 E32 0R3J-3-GP BLON CAN ALSO BE A PWM OUTPUT
VSS_10 VSS_132 U54G
AM2 VSS_11 VSS_133 H28 FOR BRIGHTNESS CONTROL
AD10 VSS_12 VSS_134 J30 Q22 PART 7 OF 7
E8 K17 SI2301BDS-T1-GP
VSS_13 VSS_135 Forward Control and External SSC
H5 VSS_14 VSS_136 K27 VARY_BL AD12 BL_ON 13,34
K10 VSS_15 VSS_137 M32 D S 3D3V_S0 Compatibility DIGON AE11 ATI_LCDVDD_ON 57
M8 VSS_16 VSS_138 A22 GENERICD AD23
T10 VSS_17 VSS_139 C20
2
1
E12 E19 M56P FOR M26X GENERICD
G
VSS_18 VSS_140 R448 R96 R81

AC9 VSS_19 VSS_141 H20 TXCLK_UP AJ21 ATI_TXBCLK+ 57 NO CONNECT OR
AF14 J24 100KR2J-1-GP 1 2 VGA_BBN Y23 AK21 ATI_TXBCLK- 57 10KR2J-2-GP
VSS_20 VSS_142 BBN_4 TXCLK_UN EXT SPREAD SPECTRUM OUTPUT
AD8 VSS_21 VSS_143 M28 K15 BBN_3
Only used in TXOUT_U3P AH21
C5 J28 0R2J-GP R10 dual-channel AG21 FOR M52P,M54P
1
2
VSS_22 VSS_144 R95 BBN_2 TXOUT_U3N
F10 VSS_23 VSS_145 J16 AC17 BBN_1 LVDS mode. TXOUT_U2P AG20 ATI_TXBOUT2+ 57 IT IS A GPIO
J3 F30 PWROK# VGA_CORE_S0 1 2 VGA_BBP AC14 AH20 ATI_TXBOUT2- 57
VSS_24 VSS_146 BBP_4 TXOUT_U2N FOR M56P
L6 VSS_25 VSS_147 L29 M56P 0R2J-GP
M23 BBP_3 TXOUT_U1P AK20 ATI_TXBOUT1+ 57
IT IS A BACK BIAS REGULATOR CONTROL
M6 VSS_26 VSS_148 A31 V10 BBP_2 TXOUT_U1N AJ20 ATI_TXBOUT1- 57
P6 B32 D K18 LVDS channel AG18
VSS_27 VSS_149 BBP_1 TXOUT_U0P ATI_TXBOUT0+ 57
AA4 VSS_28 VSS_150 E30 BACK BIASING APPLIES TO M56P ONLY TXOUT_U0N AH18 ATI_TXBOUT0- 57
3
AG11 VSS_29 VSS_151 AE15 IF BACK BIAS NOT USED ON M56,CONNECT

V3 AG23 Q23 AK19 ATI_TXAOUT0- 57
VSS_30 VSS_152 BBN PINS TO VSS AND BBP PINS TO VDDC TXOUT_L0N
AG16 VSS_31 VSS_153 AD9 2N7002PT-U TXOUT_L0P AL19 ATI_TXAOUT0+ 57
R3 VSS_32 VSS_154 AF16 1 BBN,BBP PINS ARE NO CONNECT FOR L10 VDD25_4 TXOUT_L1N AL20 ATI_TXAOUT1- 57
C6 VSS_33 VSS_155 AH10 G M26X,M54P,M52P K22 VDD25_5
This channel is TXOUT_L1P AM20 ATI_TXAOUT1+ 57
C9 AJ10 AA10 used as the AL21 ATI_TXAOUT2- 57
2
VSS_34 VSS_156 VDD25_6 TXOUT_L2N

F6 VSS_35 VSS_157 AD15 transmitting TXOUT_L2P AM21 ATI_TXAOUT2+ 57
H7 AH16 S AK18
VSS_36 VSS_158 channel in single TXOUT_L3N
J6 VSS_37 TXOUT_L3P AJ18
A
VSS_159 K23 channel LVDS mode. TXCLK_LN AL18 ATI_TXACLK- 57 A
TXCLK_LP AM18 ATI_TXACLK+ 57

R461
1 2 NB_PWRGD 13,39 <Variant Name>
0R2J-GP
1 R456 2 VCORE_EN 39,41 2D5V_S0
0R2J-GP DY C108 C146 CONNECT THESE VDD25 PINS TO 2.5V FOR M52P,M54P,M56P
SC1U6D3V2ZY-GP
Wistron Corporation
1
1
SCD1U10V2KX-LGP
SCD1U10V2KX-LGP
C113
THESE VDD25 PINS ARE NO CONNECT FOR M26X 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
2
Title
ATI M5X-P Power 4/4
C SA
Bolsena-E
5 4 3 2 1
5 4 3 2 1
Ideal Power Up Sequence Real Power Up Sequence

D D
VBBN VBBN
VBBP VBBP
VDDC VDDC
MVDDC MVDDC
1mS
PCIE_VDDR_12 PCIE_VDDR_12
PCIE_PVDD_12 PCIE_PVDD_12
C C
VDD25 VDD25
VDDR1 VDDR1
<5mS
VDDR3 VDDR3
RESISTOR General Guidelines:

‧ BBN and BBP must ramp up before or at the same time as VDDC but not after.
Symbol name Value Tolerance Rating Size
B ‧ VDDC and MVDDC must be ramped up first, followed by PCIE_VDDR_12, PCIE_PVDD12, VDD25, VDDR1 and B
0402=> 1/16W, 25V 2=>0402, 3=>0603, 5=>0805, VDDR3 (and other I/O powers).
(J: 5%, F: 1%, D: 0.5%, B: 0.1 %) 0603 => 1/16W, 75V 6=>1206, 0=>1210 ‧ All powers must be ramped up within 5ms of each other (from the ramp of VDDC to 90% of VDDR3).
0805 => 1/10W, 100V ‧ VDD25 can be ramped with VDDC or VDDR1 but it cannot be ramped later than VDDR1.
‧ The power down is the opposite of the power on sequence: VDDR3/VDDR1 -> VDD25
10KR3 10K Ohm If no letter, it means J: 5% 1/16W, 75V 0603 ->VDDC/MVDDC/BBN/BBP.
Due to the level shifter design in the memory I/Os, in order to avoid over-stressing the thin oxide transistors when
VDDR1 is powered on but VDDC is not, VDDC must ramp up before VDDR1. Similarly, VDDC must ramp up before
33D3R5 33.3 Ohm If no letter, it means J: 5% 1/10W, 100V 0805 VDDR3. The level shifter design is a function of the transistor types used in 90nm technology and of the voltage level support.
The drawback of ramping up VDDC before the I/O voltages (such as VDDR1 and VDDR3) is that parasitic P/N junctions
1KR3F 1K Ohm F: 1% 1/16W, 75V 0603 are forward biased, thus creating a conduction path. These conduction paths will pump up VDDR1 (from the memory
IOs) and VDDR3 (from the GPIOs).
The real power up sequence will appear as follows:
The naming rule is value + R + size + tolerance
Figure 2-2. Real Power Up Sequence
For the value, it can be read by the number before R. (R means resistor) As long as MVDDC ramps up with VDDC, the pump voltage on VDDR1 should be all right since the DRAM spec will
For the tolerance, it can be read from the last letter. not be violated.
For the rating, we don't show on the symbol name.
For the size, R2=>0402, R3=>0603, R5=>0805,....
CAPACITOR
Symbol name Value Tolerance Rating Size The naming rule is
Capacitor type + value + rating + size + tolerance + material <Variant Name>
A (J: +/-5, K: +/-10, ( X5R / X7R < 80%, 2=>0402, 3=>0603, 5=>0805, SCD1U10V2MX-1
A
M: +/-20, Z: +80/-20) Y5V/Y5U/Z5U < 1/3 ) 6=>1206, 0=>1210
SC=> SMT Ceremic, TC=> POS cap or SP cap
D1U => 0.1uF Wistron Corporation
SCD1U10V2MX-1 0.1uF M/X5R 10V 0402 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
10V => the voltage rating is 10V Taipei Hsien 221, Taiwan, R.O.C.
2=> 0402, 3=>0603, 5=>0805
SC10U6D3V5MX 10uF M/X5R 6.3V 0805 M=>tolerance J, K, M, Z Title
X=> X7R/X5R, Y=> Y5V
-1 => symbol version, nonsense to EE characteristic
ATI M5X-P POWER SEQUENCE
SC2D2U16V5ZY 2.2uF Z/Y5V 16V 0805 Size Document Number Rev
A3
Bolsena-E SA
5 4 3 2 1
CHAN B DDR2 84BGA 32MX16 MEMORY
D D
1D8V_S0
1
C100 C84 C83 C82 C81 C99 C98 C46
SCD1U10V2KX-LGP
SC1U6D3V2KX-GP
SCD1U10V2KX-LGP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SCD1U10V2KX-LGP
SCD1U10V2KX-LGP
SC1U6D3V2KX-GP
2
2
DDR_VREF_S0
M56P
1D8V_S0 RN88
MAB6 1 8
1
C97 C45 C59 C58 C47 C32 C24 C25 MAB2 2 7
SCD1U10V2KX-LGP
SC1U6D3V2KX-GP
SCD1U10V2KX-LGP
SCD1U10V2KX-LGP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SCD1U10V2KX-LGP
SC1U6D3V2KX-GP
MAB1 3 6
MAB10 4 5
2
SRN56J-2-GP RN89
MAB8 1 8
MAB0 2 7
MAB11 3 6
MAB5 4 5
SRN56J-2-GP RN90
MAB4 1 8
MAB3 2 7
MAB7 3 6
MAB9 4 5
U53 U49 SRN56J-2-GP
C L2 B9 MDB7 B_BA0 L2 B9 MDB27 B_BA0 R388 1 2 56R2J-4-GP C
51,55 B_BA0 BA0 DQ15 MDB0 B_BA1 BA0 DQ15 MDB28 B_BA1 R387 1 56R2J-4-GP
51,55 B_BA1 L3 BA1 DQ14 B1 L3 BA1 DQ14 B1 2
D9 MDB5 D9 MDB24 MAB12_14 R386 1 2 56R2J-4-GP
DQ13 MDB2 MAB12_14 DQ13 MDB31
51,55 MAB12_14 R2 A12 DQ12 D1 R2 A12 DQ12 D1
MAB11 P7 D3 MDB3 MAB11 P7 D3 MDB30 ODTB0 R418 1 2 56R2J-4-GP
MAB10 A11 DQ11 MDB4 MAB10 A11 DQ11 MDB25 51 ODTB0 ODTB1 R18 1 56R2J-4-GP
M2 A10/AP DQ10 D7 M2 A10/AP DQ10 D7 51,55 ODTB1 2
MAB9 P3 C2 MDB1 MAB9 P3 C2 MDB29
MAB8 A9 DQ9 MDB6 MAB8 A9 DQ9 MDB26 RASB0# R416 1 56R2J-4-GP
P8 A8 DQ8 C8 P8 A8 DQ8 C8 51 RASB0# 2
MAB7 P2 F9 MDB23 MAB7 P2 F9 MDB15 RASB1# R14 1 2 56R2J-4-GP
MAB6 A7 DQ7 MDB18 MAB6 A7 DQ7 MDB9 51,55 RASB1#
N7 A6 DQ6 F1 N7 A6 DQ6 F1
MAB5 N3 H9 MDB20 MAB5 N3 H9 MDB12 CASB0# R414 1 2 56R2J-4-GP
MAB4 A5 DQ5 MDB16 MAB4 A5 DQ5 MDB8 51 CASB0# CASB1# R16 1 56R2J-4-GP
N8 A4 DQ4 H1 N8 A4 DQ4 H1 51,55 CASB1# 2
MAB3 N2 H3 MDB17 MAB3 N2 H3 MDB11
MAB2 A3 DQ3 MDB21 MAB2 A3 DQ3 MDB13 WEB0# R419 1 56R2J-4-GP
M7 A2 DQ2 H7 M7 A2 DQ2 H7 51 WEB0# 2
MAB1 M3 G2 MDB19 MAB1 M3 G2 MDB10 WEB1# R17 1 2 56R2J-4-GP
MAB0 A1 DQ1 MDB22 MAB0 A1 DQ1 MDB14 51,55 WEB1#
M8 A0 DQ0 G8 M8 A0 DQ0 G8
CSB0_0# R415 1 2 56R2J-4-GP
51 CSB0_0# CSB1_0# R15 1 56R2J-4-GP
51,55 CSB1_0# 2
CLKB0# K8 A9 CLKB0# K8 A9
CLKB0 CK VDDQ1 51 CLKB0# CLKB0 CK VDDQ1 CKEB0 R417 1 56R2J-4-GP
J8 CK VDDQ2 C1 51 CLKB0 J8 CK VDDQ2 C1 51 CKEB0 2
C3 C3 CKEB1 R13 1 2 56R2J-4-GP
CKEB0 VDDQ3 CKEB0 VDDQ3 51,55 CKEB1
K2 CKE VDDQ4 C7 K2 CKE VDDQ4 C7
VDDQ5 C9 VDDQ5 C9
1
1
VDDQ6 E9 VDDQ6 E9
G1 1D8V_S0 R420 R421 G1 1D8V_S0
CSB0_0# VDDQ7 56R2J-4-GP 56R2J-4-GP CSB0_0# VDDQ7
L8 CS VDDQ8 G3 L8 CS VDDQ8 G3 FOR M56P AT DDR2 MEMORY SPEEDS ABOVE 350MHZ
VDDQ9 G7 VDDQ9 G7 MEMORY CONTROL SIGNALS WE,CAS,RAS,CS,CKE,ODT
WEB0# WEB0#
CLOSE TO MEM !!
K3 G9 K3 G9
2
2
WE VDDQ10 WE VDDQ10 AND MEMORY ADDRESS SIGNALS REQUIRE 55 OHM PULLUP

B RASB0# RASB0# TO A VTT RAIL (50% OF VDDQ) B
K7 RAS VDD1 A1 K7 RAS VDD1 A1
VDD2 E1 VDD2 E1
CASB0# CASB0#
BC857_1
L7 CAS VDD3 J9 L7 CAS VDD3 J9

VDD4 M9 VDD4 M9
DQMB#2 F3 R1 1 R436 2 C688 DQMB#1 F3 R1 1 R404 2
LDM VDD5 LDM VDD5
1
DQMB#0 B3 DQMB#3 B3
UDM UDM
SC470P50V2KX-3GP
J1 VRAM_VDDL 0R2J-GP J1 VRAM_VDDL 0R2J-GP

VDDL VDDL
J7 J7
2
VSSDL VSSDL
1
1
ODTB0 K9 ODTB0 K9 CLKB0
ODT C707 ODT C684 51 CLKB0 CLKB0#
51 CLKB0#
2
2
RDQSB2 F7 SCD1U10V2KX-LGP RDQSB1 F7 SCD1U10V2KX-LGP
1D8V_S0 WDQSB2 LDQS 1D8V_S0 WDQSB1 LDQS RDQSB[7..0]
E8 LDQS VSSQ1 A7 E8 LDQS VSSQ1 A7 51,55 RDQSB[7..0]
VSSQ2 B2 VSSQ2 B2
B8 B8 DQMB#[7..0]
VSSQ3 VSSQ3 51,55 DQMB#[7..0]
1
VSSQ4 D2 VSSQ4 D2
R434 RDQSB0 B7 D8 R389 RDQSB3 B7 D8 MDB[63..0]
1KR2F-3-GP WDQSB0 UDQS VSSQ5 1KR2F-3-GP WDQSB3 UDQS VSSQ5 51,55 MDB[63..0]
A8 UDQS VSSQ6 E7 A8 UDQS VSSQ6 E7
F2 F2 MAB[11..0]
VSSQ7 VSSQ7 51,55 MAB[11..0]
F8 F8
2
VRAM_VREF1 VSSQ8 VRAM_VREF2 VSSQ8 WDQSB[7..0]

J2 VREF VSSQ9 H2 J2 VREF VSSQ9 H2 51,55 WDQSB[7..0]
VSSQ10 H8 VSSQ10 H8
1
(SSTL-1.8) VREF = .5*VDDQ A2 (SSTL-1.8) VREF = .5*VDDQ A2

NC#A2 NC#A2
1
R435 E2 A3 R390 E2 A3
1KR2F-3-GP C706 NC#E2 VSS1 1KR2F-3-GP C680 NC#E2 VSS1
L1 NC#L1 VSS2 E3 L1 NC#L1 VSS2 E3
R3 J3 R3 J3
2
SCD1U10V2KX-LGP NC#R3 VSS3 SCD1U10V2KX-LGP NC#R3 VSS3

R7 N1 R7 N1
2
NC#R7 VSS4 NC#R7 VSS4

R8 NC#R8 VSS5 P9 R8 NC#R8 VSS5 P9
A <Variant Name> A
HY5PS561621A-25GP HY5PS561621A-25GP
72.55616.C0U 72.55616.C0U
Wistron Corporation
72.55616.C0U IC VRAM HY5PS561621AFP-25 FBGA(16M*16, 400Mhz) Taipei Hsien 221, Taiwan, R.O.C.
72.51216.D0U IC VRAM HY5PS121621BFP-25 FBGA(32M*16, 400Mhz) Title
VRAM 1/2
A3 SA
Bolsena-E
5 4 3 2 1
5 4 3 2 1
D D
1D8V_S0
1
C26 C49 C60 C15 C50 C51 C52 C61
SC1KP16V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SCD1U10V2KX-LGP
SC1U6D3V2KX-GP
SCD1U10V2KX-LGP
SCD1U10V2KX-LGP
SC10U10V5ZY-1GP
2
2
1D8V_S0
1
C48 C33 C27 C62 C53 C28 C35 C63
SC1KP16V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SCD1U10V2KX-LGP
SC1U6D3V2KX-GP
SCD1U10V2KX-LGP
SCD1U10V2KX-LGP
SC10U10V5ZY-1GP
2
2
C C
U50
B_BA0 L2 B9 MDB39 U51
51,54 B_BA0 B_BA1 BA0 DQ15 MDB32 B_BA0 MDB59
51,54 B_BA1 L3 BA1 DQ14 B1 L2 BA0 DQ15 B9
D9 MDB38 B_BA1 L3 B1 MDB60
MAB12_14 DQ13 MDB34 BA1 DQ14 MDB58
51,54 MAB12_14 R2 A12 DQ12 D1 DQ13 D9
MAB11 P7 D3 MDB33 MAB12_14 R2 D1 MDB62
MAB10 A11 DQ11 MDB37 MAB11 A12 DQ12 MDB63
M2 A10/AP DQ10 D7 P7 A11 DQ11 D3
MAB9 P3 C2 MDB35 MAB10 M2 D7 MDB56
MAB8 A9 DQ9 MDB36 MAB9 A10/AP DQ10 MDB61 RASB1#
P8 A8 DQ8 C8 P3 A9 DQ9 C2 51,54 RASB1#
MAB7 P2 F9 MDB44 MAB8 P8 C8 MDB57
N7 A6 DQ6 F1 P2 A7 DQ7 F9
MAB5 N3 H9 MDB47 MAB6 N7 F1 MDB53 CASB1#
MAB4 A5 DQ5 MDB40 MAB5 A6 DQ6 MDB48 51,54 CASB1#
N8 A4 DQ4 H1 N3 A5 DQ5 H9
MAB3 N2 H3 MDB41 MAB4 N8 H1 MDB55
MAB2 A3 DQ3 MDB46 MAB3 A4 DQ4 MDB52 WEB1#
M7 A2 DQ2 H7 N2 A3 DQ3 H3 51,54 WEB1#
MAB1 M3 G2 MDB42 MAB2 M7 H7 MDB49
M8 A0 DQ0 G8 M3 A1 DQ1 G2
MAB0 M8 G8 MDB50 CSB1_0#
A0 DQ0 51,54 CSB1_0#
CLKB1# K8 A9 CKEB1
CLKB1 CK VDDQ1 CLKB1# 51,54 CKEB1
J8 CK VDDQ2 C1 51 CLKB1# K8 CK VDDQ1 A9
C3 CLKB1 J8 C1 ODTB1
CKEB1 VDDQ3 51 CLKB1 CK VDDQ2 51,54 ODTB1
K2 CKE VDDQ4 C7 VDDQ3 C3
C9 CKEB1 K2 C7
VDDQ5 CKE VDDQ4 CLKB1
VDDQ6 E9 1 VDDQ5 C9 51 CLKB1
VDDQ7 G1 1D8V_S0 1 VDDQ6 E9 51 CLKB1#
CLKB1#
CSB1_0# L8 G3 R407 R406 G1 1D8V_S0
CS VDDQ8 56R2J-4-GP 56R2J-4-GP CSB1_0# VDDQ7
VDDQ9 G7 L8 CS VDDQ8 G3
B WEB1# B
K3 WE VDDQ10 G9 VDDQ9 G7
WEB1# K3 G9 RDQSB[7..0]
2
2
RASB1# WE VDDQ10 51,54 RDQSB[7..0]

CLOSE TO MEM !!
K7 RAS VDD1 A1
E1 RASB1# K7 A1 DQMB#[7..0]
CASB1# VDD2 RAS VDD1 51,54 DQMB#[7..0]
L7 CAS VDD3 J9 VDD2 E1
CASB1# MDB[63..0]
BC856_1
VDD4 M9 L7 CAS VDD3 J9 51,54 MDB[63..0]

DQMB#5 F3 R1 M9
DQMB#4 LDM VDD5 DQMB#6 VDD4 MAB[11..0]
B3 UDM 1 R410 2 C687 F3 LDM VDD5 R1 1 R401 2 51,54 MAB[11..0]
1
J1 DQMB#7 B3
VDDL UDM
SC470P50V2KX-3GP
J7 0R2J-GP J1 0R2J-GP WDQSB[7..0]

VSSDL VDDL 51,54 WDQSB[7..0]
1
ODTB1 K9 J7
2
ODT VSSDL
1
C686 ODTB1 K9 ODT C682 C34
2
RDQSB5 F7 SCD1U10V2KX-LGP SC1U10V3KX-3GP
2
1D8V_S0 WDQSB5 LDQS RDQSB6 SCD1U10V2KX-LGP
E8 LDQS VSSQ1 A7 F7 LDQS
B2 1D8V_S0 WDQSB6 E8 A7
VSSQ2 LDQS VSSQ1
VSSQ3 B8 VSSQ2 B2
1
VSSQ4 D2 VSSQ3 B8
1
R400 RDQSB4 B7 D8 D2
1KR2F-3-GP WDQSB4 UDQS VSSQ5 R391 RDQSB7 VSSQ4
A8 UDQS VSSQ6 E7 B7 UDQS VSSQ5 D8
F2 1KR2F-3-GP WDQSB7 A8 E7
VSSQ7 UDQS VSSQ6
F8 F2
2
VRAM_VREF3 VSSQ8 VSSQ7

J2 H2 F8
2
VREF VSSQ9 VRAM_VREF4 VSSQ8

VSSQ10 H8 J2 VREF VSSQ9 H2
1
(SSTL-1.8) VREF = .5*VDDQ A2 H8

NC#A2 VSSQ10
1
R405 E2 A3 (SSTL-1.8) VREF = .5*VDDQ A2

NC#E2 VSS1 NC#A2
1
1KR2F-3-GP C685 L1 E3 R392 E2 A3

SCD1U10V2KX-LGP NC#L1 VSS2 1KR2F-3-GP C681 NC#E2 VSS1
R3 J3 L1 E3
2
NC#R3 VSS3 NC#L1 VSS2

A R7 N1 R3 J3 <Variant Name> A
2
NC#R7 VSS4 SCD1U10V2KX-LGP NC#R3 VSS3

R8 P9 R7 N1
2
NC#R8 VSS5 NC#R7 VSS4

R8 NC#R8 VSS5 P9
HY5PS561621A-25GP Wistron Corporation

72.55616.C0U HY5PS561621A-25GP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
72.55616.C0U Taipei Hsien 221, Taiwan, R.O.C.
Title
VRAM 2/2
A3 SA
Bolsena-E
5 4 3 2 1
A B C D E
FAN5234 FOR VGA_Core DCBATOUT DCBATOUT_5234

VGA_CORE_PWR VGA_CORE_S0
G60 GAP-CLOSE-PWR
G2 GAP-CLOSE-PWR 1 2
1 2
G67 GAP-CLOSE-PWR
Dummy when use 'UMA' (whole page) G3 GAP-CLOSE-PWR 1 2
1 2
G64 GAP-CLOSE-PWR
1 2
4 G63 GAP-CLOSE-PWR 4
1 2
G69 GAP-CLOSE-PWR
1 2
G66 GAP-CLOSE-PWR
1 2
G65 GAP-CLOSE-PWR
1 2
G61 GAP-CLOSE-PWR
DCBATOUT_5234 1 2
GAP-CLOSE-PWR G68
1 2
SC10U25V6KX-1GP
SC10U25V6KX-1GP
5V_S5
1
C94 G62 GAP-CLOSE-PWR
1
C95 1 2
C79
SCD1U25V3ZY-1GP
2
2
1
5
6
7
8
C67 C66
D
D
D
D
SC10U10V5KX-2GP SCD1U16V2ZY-2GP U8
2
AO4422-1-GP
C37
G
S
S
S
3 D10 3
5V_S0 1 2 5234_BOOT 1 2
4
3
2
1
SSM5818SLPT-GP
M52/M54:1.1V
17,20,34,38,39,45 PM_SLP_S3# SCD1U25V3KX-GP
1
R32 U6
M56: 1.08V
Vout Setting:
DUMMY-R2 Iomax=17A
16 FPWM PGND 9 0.9V/Rlow=(Vout-0.9V)/Rhigh
15 BOOT AGND 8 OCP>28A
5234_SS 7 R42
2
5234_ILIM SS 1K2R3F-GP VGA_CORE_PWR

1 R36 2 5234_EN
4
3
ILIM
12 5234_ISEN 1 2
L22 Vosetting=1.0809V
EN ISNS 5234_SW
SW 13 1 2
10KR2J-2-GP DCBATOUT_5234
6 14 5234_HDRV IND-1UH-42-GP
VSEN HDRV 5234_LDRV 5V_S0
5 VOUT LDRV 10
1
SCD01U16V2KX-3GP
1 R33 2 5234_VIN 1 VIN
5
6
7
8
1
0R0603-PAD 11 2 C54 R41 R40
VCC PGOOD
1
D
D
D
D
U9 300KHz 402R3F-GP C692 TC19 TC20
1
SE330U2VDM-L-GP
SE330U2VDM-L-GP
AO4430-1-GP R37 442R2F-GP SCD1U25V3ZY-1GP
2
C29 R35 FAN5234MTCX-1GP 74.05234.A7G TP3 10KR2J-2-GP M56P
2
1
SCD22U16V3ZY-GP 44K2R3F-2-GP TPAD30

2
C30 DY
2
1
SCD1U25V3KX-GP
G
S
S
S
M54P
2
C65 DY
4
3
2
1
SC2200P50V2KX-2GP
1
2
R34
PWM Mode: DUMMY-R3
2 FPWM (High)=>Fixed PWM Mode. Panasonic V Size 330uF 2V
2
1
FPWM (Low)=>Hysteretic Mode. ESR=9mohm, Iripple=3.0A
2
R46
2KR2F-3-GP USD:0.250 (Q3/05)
5234_VSEN
2
3D3V_S0
POWERPLAY:
Rilim=(11.2/Iilim)*((100+Rsense)/Rdson) high (3.3V) = set lower core voltage (e.g. VDDC = 1.0V)
1
low (0V) = set higher core voltage (e.g. VDDC = 1.08V) R52
Q4 10KR2J-2-GP
1
R54 2N7002PT-U
High :R800 + R59 set Vout to 1V.
3
1K62R2F-GP
R45 D
2
Low : R800 set Vout to 1.08V. 2KR2F-3-GP M56P 1 1 R53 2
M54P G 20KR2J-L2-GP
C
1
S C72
2
Q6 B GPIO_PWRCNTL 50
SC4D7U10V5ZY-3GP CHT2222APT-GP
1 E
1
R74 R73
2
1 <Variant Name> 1
Wistron Corporation
Title
VGA CORE 1D1V
A3 SA
(Power Team)
Bolsena-E
A B C D E
5 4 3 2 1
TV SWITCH Function
A to B0
S
L
A to B1 H
RN96
D 1 8 TV_COMP D
50 DIS_COMP TV_LUMA TV_COMP 15
50 DIS_LUMA 2 7 TV_LUMA 15
3 6 TV_CRMA
50 DIS_CRMA TV_CRMA 15
4 5
SRN0J-4-GP
Dummy when use UMA
RN99
1 8
2 7 TV_CRMA
13 UMA_CRMA TV_LUMA
13 UMA_LUMA 3 6
4 5 TV_COMP
13 UMA_COMP
SRN0J-4-GP

-1 0308
C C
SRN0J-4-GP
52 ATI_TXBCLK+ 4 5 LCD_TXBCLK+ 13,16

52 ATI_TXBCLK- 3 6 LCD_TXBCLK- 13,16
52 ATI_TXBOUT2+ 2 7 LCD_TXBOUT2+ 13,16
52 ATI_TXBOUT2- 1 8 LCD_TXBOUT2- 13,16
RN83
RN87
1 8
CRT_B_1 SRN0J-4-GP
50 DIS_B 2 7 CRT_B_1 15
3 6 CRT_G_1 CRT_G_1 15 4 5 LCD_TXBOUT1+ 13,16
50 DIS_G CRT_R_1 52 ATI_TXBOUT1+
50 DIS_R 4 5 CRT_R_1 15 52 ATI_TXBOUT1- 3 6 LCD_TXBOUT1- 13,16
52 ATI_TXBOUT0+ 2 7 LCD_TXBOUT0+ 13,16
SRN0J-4-GP 1 8 LCD_TXBOUT0- 13,16
52 ATI_TXBOUT0-
Dummy when use UMA RN85
SRN0J-4-GP
52 ATI_TXACLK+ 4 5 LCD_TXACLK+ 13,16

B B
52 ATI_TXACLK- 3 6 LCD_TXACLK- 13,16
RN82 2 7 LCD_TXAOUT2+ 13,16
CRT_R_1 52 ATI_TXAOUT2+
13 UMA_R 1 8 52 ATI_TXAOUT2- 1 8 LCD_TXAOUT2- 13,16
2 7 CRT_G_1
13 UMA_G CRT_B_1 RN81
13 UMA_B 3 6
SRN0J-4-GP
4 5
52 ATI_TXAOUT1+ 4 5 LCD_TXAOUT1+ 13,16
SRN0J-4-GP 3 6 LCD_TXAOUT1- 13,16
52 ATI_TXAOUT1-
Dummy when use Discrete 52 ATI_TXAOUT0+ 2 7 LCD_TXAOUT0+ 13,16
52 ATI_TXAOUT0- 1 8 LCD_TXAOUT0- 13,16
RN79
52 ATI_LCDVDD_ON 1 R135 2 LCD_VDD_ON 13,16

0R2J-GP
<Variant Name>
A A
Wistron Corporation
Title
VGA SELECTOR
A3 SA
Bolsena-E
5 4 3 2 1
5 4 HOLE2 HOLE25 HOLE4
3 HOLE7 HOLE12
HOLE8 HOLE10 HOLE11 2HOLE6 HOLE9 HOLE1 HOLE13 HOLE3 HOLE22 1HOLE20 HOLE5 HOLE24
HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE
HOLE HOLE HOLE HOLE HOLE
VGA_CORE_PWR 1D8V_S0 1D2V_S0 3D3V_S5
1
1
1
1
1
DY DY CHG_PWR-2 47
EC11 EC9 EC20 EC49 5V_AUX_S5 3D3V_LAN_S5 AD+
5130_LL1 45,46
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
2 5130_LL2 45,46 5130_LL3 45,46
2
CHG_PWR-3 47
1
D EC30 EC29 EC61 EC26 EC22 EC58 EC63 EC31 D
SC1500P50V3KX-GP
SC1000P50V2JN-N1
SC1500P50V3KX-GP
SC1000P50V2JN-N1
SC1500P50V3KX-GP
SC1000P50V2JN-N1
SC1500P50V3KX-GP
SC1000P50V2JN-N1
EC65 EC32 EC4 EC12 EC17 EC35 EC36
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
2D5V_S3 2D5V_S0
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
2
2
DY DY DY DY DY DY DY DY
1
1
DY SCD1U16V2ZY-2GP
EC72 EC27 EC39 EC75 MAX1544_LXM 41,42
SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP MAX1544_LXS 41,42
2
1
EC18 EC19 EC60 EC59
SC1500P50V3KX-GP
SC1000P50V2JN-N1
SC1500P50V3KX-GP
SC1000P50V2JN-N1
1D8V_PWR 2D5V_PWR 1D2V_PWR
2
DY DY DY DY
1
3D3V_S0
EC21 EC28
SCD1U16V2ZY-2GP EC33 SCD1U16V2ZY-2GP
2
SCD1U16V2ZY-2GP
1
EC37
EC44 EC55 EC6 EC53 EC7 EC42 EC43 EC1 EC54
DCBATOUT
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
2
2
2D5V_S0 3D3V_BT_S0 3D3V_LAN_S5 DCBATOUT DCBATOUT
1
2D5V_S0 3D3V_S5 5VA_OP_S0
1
1
DY DY EC69
EC74 EC51 EC52 EC25 EC41 SCD1U25V3ZY-3GP
C C
2
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
2
1
EC70 EC23 EC16 EC15 EC40 EC56 EC46 EC47
HOLE P/N: 34.42E05.001
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
2
2
FOR VGA CHIP
FOR MDC
HOLE16
DCBATOUT
HOLE15
1
FAN1_VCC
EC73 EC57 EC13 EC10 EC48 EC34 EC62 EC24 EC64 EC38
1
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
HOLE17
2
1
EC14 HOLE14
1
SCD1U16V2ZY-2GP
SCD1U => VOLTAGE 25V ZZ.0HOLE.XXX
IMPORTANT:
2
HOLE18
SCD1U => VOLTAGE 25V ZZ.0HOLE.XXX
1
SCD1U16V => VOLTAGE 16V BT+
1
ZZ.0HOLE.XXX
1
1
EC67 ZZ.0HOLE.XXX
SCD1U25V3ZY-3GP
2
B ZZ.0HOLE.XXX B
GREEN COLOR FOR INSTALL
DY DY
ZZ.NDPAD.XXX
ZZ.NDPAD.XXX
GND15 GND21 GND22 GND17 GND9 FOR NORTH BRIDGE

GND16
GND13 GND14 SPRING-29-GP HOLE19
SPRING-23-GP SPRING-23-GP SPRING-23-GP SPRING-1-GP
GNDPAD
GNDPAD
SPRING-23-GP
34.39S07.001
34.39S07.001
34.39S07.001
34.39S07.001
34.40V16.001
34.42T14.001
1
DY
1
HOLE21
1
ZZ.0HOLE.XXX
HOLE23
DY DY
1
GND7 GND20 GND18 GND19 GND8
SPRING-24-GP SPRING-1-GP SPRING-1-GP ZZ.0HOLE.XXX

34.45T31.001
34.40V16.001
34.40V16.001
34.49U24.001
34.49U24.001
1
1
<Variant Name> ZZ.0HOLE.XXX

A DY DY A
GND2 GND1 GND5 GND3 GND4 GND10 GND12 GND11 GND6
Wistron Corporation
SPRING-1-GP SPRING-24-GP SPRING-24-GP SPRING-1-GP SPRING-1-GP SPRING-1-GP SPRING-1-GP SPRING-1-GP SPRING-1-GP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
34.45T31.001
34.45T31.001
34.40V16.001
34.40V16.001
34.40V16.001
34.40V16.001
34.40V16.001
34.40V16.001
34.40V16.001
DY DY DY DY DY Title
EMI
1

A3 SA
Bolsena-E

Wistron Bolsena-E - Rev Ab2

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Wistron Bolsena-E - Rev Ab2

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Available Formats

5 4 3 2 1

See 'TEXT' in 0MEMO or 1MEMO property in component

Dummy when use '10/100'

ATA 133 17,18,19,20,21

PC87381 KBC XBUS

Dummy when use UMA

HTT for CPU sideA HTT for CPU sideB

1D2V_S0 U62A 1D2V_HT0B_S0

NB0CADOUT15 T25 N26 CPUCADOUT15 CPUCADOUT[15..0] 11

DDRVTT_SENSE AE13 D17

VREF_DDR_MEM MEMZP VTT_B

C474 C473 M_DATA63 A16

M_DATA58 MEMDATA59 MEMCLK_L6 M_CLK5

M_DATA36 L1 H5 M_ARAS# M_ARAS# 8,9

M_DATA33 MEMDATA34 MEMWEA_L

M_DATA31 MEMDATA32 MEMBANKA1 M_ABS#0

M_DATA29 AC1 E13 RSVD_M_AA15

R162 M_DATA26 MEMDATA27 MEMADDA13 M_AA12

M_DATA22 MEMDATA23 MEMADDA9 M_AA8

M_DQS6 A8 N1 CB6 TP58 TPAD30

1 R159 2 NC_C18 C18

SRN680J-GP DY DY NC_AF22 NC_AF23 2D5V_S0

Validation Test Points

199 186 199 186 Title

SCD1U25V3ZY-3GP GND GND GND GND Size Document Number Rev

SERIES DAMPING PARALLEL TERMINATION

LAYOUT:Place close to Power Pin of DDR socket.

LAYOUT:Place at end of the DIMMs 2D5V_S3 2D5V_S3

CLAW HAMMER TO NB NB TO CLAW HAMMER

HYPER TRANSPORT CPU I/F

CPUCADOUTJ0 AC28 C29 NB0CADOUTJ0

4 CPUHTTCLKOUT1 CPUHTTCLKOUTJ1 HT_RXCLK1P HT_TXCLK1P NB0HTTCLKOUTJ1

PCIE I/F TO VIDEO

AG25 NC#AG25 DVO_D10 AK13

1D8V_S0 1 R178 2 MPVDD_PLL AJ15 AH5

3D3V_S0 AVDD TXACLK+ 5 4

150R5F C793 C788 C787 H18 R484

39,52 NB_PWRGD B15 F19

3 CLK14_NB A13 OSCIN GFX_CLKN A8 NBSRC_CLK# 3

C280 NB_OSC_OUT B13

4K7R2J-2-GP HTTSTCLK 10KR2J-2-GP

NB_SUS_STAT# R497 2 SB_CLKP

V7 VSSA61 VSS59 W13

C2 VSSA56 VSS54 T16

2 1 2 1 H8 VSSA55 VSS53 U17

K7 VSSA51 VSS49 N15

R6 VSSA41 VSS41 E16

C7 VSSA39 VSS39 H16

P7 VSSA36 VSS36 AD25

SCD1U16V2ZY-2GP VSSA35 VSS35

J6 VSSA25 VSS25 R19

AB3 VSSA23 VSS23 Y23

AA3 VSSA21 VSS21 AA28

K8 VSSA18 VSS18 AB25

V5 VSSA3 VSS3 AD29

VSSA2 PAR 6 OF 6 VSS2

ATI-RS482M (4 of 4) PWR, GND

SRN0J-6-GP U3B TSAHCT125PW-GP

57 CRT_R_1 1 2 BLM11B750S-GP CRT_R CRT1

BAV99PT-GP-U ME : 22.10021.D81 Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

NUM_LED# 1 R19 2 K A on KB Cover

LCD CONN LCDPOWER_S0