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    BH scincedrec % Transport Delay Related terme: Mobi Manageneat, ioe Sling Made Conti, Management ‘Soncesion. Netant later, cane Pace Sigal Asigament Logic and circuit simulation Jiang Huang, SphenF.Cauky in Etonie Dag Aaa, 2009 8.2.21 Transport delay “The transport dala refers the ime duration tke forte eet of gat inst changes to appea a gle opus, Several anspor ely adel characterises phenomenon fom diferent specs. ‘he nomial deby mal species the sare ly vale othe output rng and fang anstions Consider th AND gute Gin Figure 4a n eample Here B's aed ths, the output oF Gio afeted by A Asuring bat Chas rina dele fy =2 05 ad Ai ube oor 1, the caespording ‘imulnton rest how in Figure ts Unde he rominal ely made the ‘outpt wafer at simpy 3 version ofA deteyed by 2s Cvorintcety — * fet i Finns ssttsony 4 Ferre ts el re : eis Fin ef 2, 4_eskie (6 Macy + See F [ ba is FIGURE 84. Tranepor dey models Fer cases which he ising ad fing tines ae diferente, the pulp and pull-down vanstors ofthe gate have dle driving strange), one may ot ‘heel day macel In Figure Bb, the set ithe rae a that in Fe ‘es eacept that erie lyme uees inten the nea fl aye ae {4=20s an de 1S 5, respectively. Because ofthe diference between the wo els, te duration ofthe output pulse shrinks or 11005 Fe pte tarp delay ann be uriguay deberined eg, baa of procs ‘aration one may ure the min-max ely mosel In she miners dey mol, ‘he minimum and maximum eels yn dtd 2 specie epee ‘he ambiguus time inten which he utpt change may ecu In Figure 8, the minimum and esr ely ae 1a 2, respecte andre pls ‘sapped an rerpone tthe ely uncertainty te abiguos itera ie ‘hae regions oresponding tthe sing an fling rations, esbees 3 ‘utptF Within the wo ambiguous interval the exact output values known ‘ea ulcer RL pmsl HOSEL Basic Modeling Constructs Peter. Athens, in The Onsiger Guide to VDL (Thi Eton, 2008, 5.25 Transport and Inertial Delay Mechanisms ‘Sofirin ur dictation of signal tsignments, wean nphcly sured that ‘here were ra pending transaction ehedoled fr x sgrl wen 3g {signrent statement wa necited In many dele, prc 3h gher vel ofabsvacton, hs wil be the ase the thes hand, there ae pending ‘easatos, the new ansactins ae merged with ther ina way at depends on the dlp euch in th sgl signet ssement. Ths isan opbonl rartofthe sgn azegnment ants shwn on page 13. The yt forthe deky mecansis reject tine expression snertiat ‘Asigrl assignment wth the dey mechanism pat omitedsequalen ts ‘peisng inertial Welook x the tana dely mechani A snc i pe and ten return tothe el dely mechan, We ue the anspor delay mechariem wnen we are modeling a ie device with infite equeney erpnes,n which any np ple, no mater how hot froduees an outgut pulse. An example of sucha deve isan deal vansmsion Tne, whieh vars alinpt changes dled by ome amour A rons te models raraisson ne wth delay 50 ps ‘transmission tine © process (Linein) is bein Line_out <= transport Tine in after 5e@ ps; fend process transnission tine; Inthis model the ouput allows any changesin the input, bt dyed by 00 pf ‘he input changes wie or more thins peri shore than 50 phe shes ‘eannactions re simply queved bythe driver unt ne simulition te when they ae tobe ape as shown n Figures. linn v ne ot : Ce 30 eB 87000 Figure 52. Transactions queued ya der using anspor delay me 2009 ‘the npt changes, and a trasucion is schedules fr 70s tne 09s, te input anges apni, and acter tansacion scheduled for 1000 ps. Ths | queued the deer bein the carer tansacion. When multi ire reaches 700g, he rt ranean ape nd the econ wenactonrenaiequeved Final, simulation ie resces 100 ps, andthe ral ansacton i zpped, levingthe drier que empy nth eample cach et arson tha i geneted bya signal signeent xem ohedle ors smultion ime hate er tha he pening ‘rannactions queued oy the driver. The ston gets ile more omplox when ‘arable das ae used since we can schedule a wansacton fra eat tie than pending transaction The seats ofthe ranapor deli enchanire spec tat there are pending wanton on diver at ar scheduled fr 2 ‘me liter han oreqalto a new anssion thre er transactions ae dled Example 5.10 An asymmetric delay element using transport delay “he foloming isa proces describes the bob ofan sojmmete dely ement ith dierent ea nes fring nd ling rontione The dey ‘or rsing varsons 800s nd for ling Wastons, 00, ssym_delay + process (8) 48 ‘constant Td 61 + tine = 880 pss bein Af 2 then 2c transport 2 after Tpé_et; 2 transport 9 after Tpa 30s lend process asym delays ewe pply a input ple of only 200p uration, we would eget the tpt rato change, sic the dyed fling anton shoul “overtake” he dyed "sing arson. we wee sil to a each Warton othe deve queue when a sigrlassgomen statements exeted, we woul ot gt this Setevio: However he semantic ofthe anspor delay mechan produce the desres bebo a¢ Pure 53 shows i 0 4 2 ° 200 100 6) BW) 1000 ps me] fei core Fig 5.3. Tantons in die sing ares tant dy A ie 200 pte input earges an tramaton ceded fr 100 pe ime “00g, the np changes agin, 3 another ansacton ie seneled or 90095, ince this ealr tan the ending Vasacton at 1009s, the pending transaction deleted, When slaon tine reaches 900 phe fersring tasatton pale, but snothe ale 9°0% no wet our shesgnal Most rel electronics drt have init fresueray responses its at {appropriate to model them using Yanspr ele In eal deve, changing the Values of neal nodes and outputs inolves moving eleven charge teu in the presence of eapectane, inductance and estan. This the eis somne ine tends ty the sare sate ures we free by aphing ipa fr 3 ‘urBcert log drston Th why VD neade the esl ay mechan, to low vst rodel eves that eet npt pulses too shor to overcome thelr inet etal delays the mechanism used by dei asignalasigrment ‘we can spect eo ty by including the word Aner, Tope ow neil delay works lets it cnsiderrmodein wich a he sig migrents ara gh sgal ete same ey al, 3r nthe folowing nvener ode inv + process (2) 3s ein y G Inertial not 2 after 3 ns) lend process nv; Sc ang a input events actu ore than 3 apa this model doesnot preset any probes Cah ie signal ssignmert is executed there ar no pening (tonetons sa now tranantionsachelaled andthe eutchnges we $t Iter Hower, fa inp cnanges less than 3 neater ne preva change hi represen pulse ls than the xapagation delay ofthe dev, ot shoud be teeted. Ths behavior i shown at the tp of Figure 4 na simple model suc as ‘we an integrin delay by saying if spel sizer produces ‘ut puke shorter han the propagation del, texte outplpule oes nat 4 0 4 0 24 6 8 DN Wm a 2 os Figure 54, Ress of gal eignents sing the inet dey mechan ‘he top waveform, an inertldly oF 3 sped THe input ange at Une {ns efleted i the output ine ns The ple from to Biles nan he propagation del sot doar fi the output nthe btm waveform, 20 Ireildlnyof9 ne and pe jection Ut of near rpece The input ‘changes a 1, 6,9 and 1.5 areal eee ithe output, since ey eat ayeate than Pr apart Home, the subsequent input pubes aeless than of ‘eualtothe puke jection lt in gt, and oo ot fe te outped Nex et us exten this mode by sein a pus ejection Ker she word reject inthe signa ssigrment nw + process (a) Ss bein y & reject 2 ns inertial not 2 after 3s; fend process. invs We can interpret this by saying fa sal asignmert produces an ouput pe Shorter han (or equal) the puke rection i the output pu aes nt Iapp.n these reel ong as input cong car rea 2 1370 they prduce opt change ner, a shown esto of Figure 5.4, Note that the ple ree it spced must be Between Of ad che ek species in the sgn assignmert Orting 2 pe ejection Limits the sare as specting init equal tthe db, ad speiing alin of D6 isthe seve as spectfing varspr aly Nowe sok he fil tory of net dey allowing for varying the ea tne ard pabe ejection lin difeert signal signents palit the same sg Daweh transport dey the station becres more carplex niet S| deserve t inte of deleting aneacans rom the dover. Those who re aly to beverting motel that el wn brmng ath level etal my wih to move conto the ne seton, ‘A nel delayed signal azrgnmentirvles examining the pending transactions on 3 srver when ang 3 new ranean. Spot gral ‘sigment schedules anew transaction ie fe wth a pulse rection it oF teu Ft, any pending Warsactions scheduled for atime beta or ual to tert dete, jt they when trap deny wed. Then the new ‘erection rade te sive. Secon, any pening ansctone seheled in ‘he eval hy 0 hq ae cranes. there ra ran of eoneeive anes immedatey preceding the new vansacion wih the same alu 5 the rew ‘easton, they re kepin the driver Al eter wansaciors inthe inna te eke, ‘an example wil mak this carer Supposea der for signals contin ending ‘eseacons shown athe top of pure 55, ana the proces comaining he ver vets the following sgl ssgnrent semen tine 10 ins) [Beas] [Was] [150s] [i6as) [Wes] [Boas) [as ae Pa ped be] rd re] bee eed reuined| eked pre ejection eal (1 ast 18 m9) Wes) [12ns) [ies] [I7as) [18ne|*—new uansacton 7 br) or) br] a Figure. Tanactons befor top) and afer (bottom) anneal delay sgl ‘eignrent The anectone 79 3nd 5 neste dled bees hey are ‘held fr ter than the new trasacion Those at and 12 ns retained because hey fl before the pub jion teal. The wansactons at 16 and 17 nfl within thereto inten, bat hey for 2 run leading up tthe new tune, The ther transaction nthe jection inte deletes 5 <> reject 5 ns dnertisl "0" after 8 n5; “he pending tanto afr ths igeent are how the btn f Fp 5s. ‘Marthe otto noe about specifing the dey mechanism asigal ‘ssigmentatement aati umber of ware elements re code th {pected mechanism on sppert theft lees lone subrequet elmer Scheele transactions sing transport del, Since te delays for mute waveform lemets muse a scencing oer this means that alo the vansacion fer the Frat rus added ote diner tansachon queen the order writen Example $.11 An and gote with detailed timing 'deted modelo wo-nput nd gatels show Below. The process gate Implements the loge uncon ofthe en, and he proses delay implements is dtd ming darters using nelly aed signal -aignrent Adel of 15 nai sed orig tastions and 12 a for {aking tations When a change on ther fhe input sig resus in ‘hang cheuled forthe ouput, the delay pres determines the ropagstion delay to be used. On sing ouput tristan spits flee than 200 pear rejects, ad on fing or urknou anion, spe of than 300 pare rect, brary ieee; use ieee. sté logic 1164.81; entity and2 Is port (a,b: dn stdulogic; y+ aut std ulogse ); fend entity and2s arcnitecture detaiies delay of ane2 4s signal result + ste_vlogic: beta gate + process (2, b) 4s bein result

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