Nama : Eriyansyah

Nim : 13200057

Kelas : 13.3A.01

Tugas Mikrokontroller 1
ATMEGA 32

Features:

 High performance
 Advanced RISC architecture
 131 powerful instruction
 32X8 general purpose working registers
 Fully static operation
 Up to 16 MIPS throughput at 16 MHz
 2 cycle multiplier
 High endurance non volatile memory segments
 32 kbytes of in system self programmble flah program memory
 1024bytes EEPROM
 2kbyte internal SRAM
 Programming lock for software security
 JTAG interface
 Boundary scan capabilities according to the JPAG standart
 Extensive on chip debug support
 Programming of flash,EEPROM,fuses
 Peripheral features
 Two 8bit timer counters with separate prescalers and compare modes
 One 6bit timercounter with separate prescaler, compare mode, and capture
mode
 Real time counter with separate ascilator
 Four PWM channels
 8channel, and 10 bit ADC
 Byte oriented two wire serial interface
 Programmble serial USART
 Master SPI serial interface
 On chip analog comparator
 Special microcontroller features
 Power on reset and programmble brown out detection
 Internal calibrated RS osciliator
 External and internal interrupt sources
 Six sleep modes
 I/O and packages
 32 programmble I/O lines
 40 pin PDIP, 44lead TQFP and 44 pad QFN/MLF
 Operating voltages
 2.7V for ATmega32L
 4.5V for ATmega32
 Speed grades
  0-8MHz ATmega32L
 0-16MHz ATmega32
 Power consumplation at 1,Hz, 3V, 25-c
 Active 1.1mA
 Idle mode 0.35mA

PIN descriptions

VCC : digital supply voltage

GND : ground

Port A(PA7..PA0) :port A serves as the analog inputs to the A/D converter

PORT B (PB7.. PB0) : 8 bit bidirectional I/O port with internal pull up resistors. Output buffers have
symmetrical drive charachteristics with both high sink and source capability. The port B pin are tri
started when a reset conditions a becomes active,even if the clock is not running

PORT C (PC7..PB0) : 8bit bidirectional I/o with internal pull up resistors. Output buffers have
symmetrical drive characteristic with both high. If the JTAG interface anabled PC5 (TDI), PC3(TMS),
PC2(TCK) will be activated even if reset occurs

PORT D (PD7..PD0) : 8bit bidirectional I/O port with internal pull up resistors. Are tri stated when a
reset condition becomes active,even if the clock is not running

RESET : reset input. A low level on this pin for longer than the minimum pulse length will generate a
reset.

XTAL1 : input to the inverting oscillator amplifier and input the internal clock operating circuit

XTAL2 : output the inverting oscillator amplifier

AVCC : supply voltage pin for port A and the A/D converter

AREF : analog reference pin for the A/D converter