Solar Energy 166 (2018) 90–97

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Solar Energy
journal homepage: www.elsevier.com/locate/solener

Development and prospects of surface passivation schemes for high- T

efficiency c-Si solar cells
Atteq ur Rehmana,b, Muhammad Zahir Iqbalc, Muhammad Fahad Bhopalb,
⁎
Muhammad Farooq Khand, Farhan Hussaine, Javed Iqbala, Mahmood Khana, Soo Hong Leeb,
a
Department of Electrical Engineering, Sarhad University of Science and Information Technology, Peshawar, Pakistan
b
Green Strategic Energy Research Institute, Department of Electronic Engineering, Sejong University, 98 Gunja-dong, Gwangjin-gu, Seoul 143-747, Republic of Korea
c
GIK Institute of Engineering Sciences & Technology, Topi 23640, Khyber, Pakhtunkhwa, Pakistan
d
Department of Physics and Graphene Research Institute, Sejong University, 98 Gunja-dong, Gwangjin-gu, Seoul 143-747, Republic of Korea
e
College of Electrical and Mechanical Engineering, National University of Science and Information Technology, Islamabad, Pakistan

A R T I C LE I N FO A B S T R A C T

Keywords: Photovoltaic (PV) electric power generation has the potential to account for a major portion of power generation
Crystalline silicon in the global power market. Currently, the PV market is dominated by crystalline silicon (c-Si) solar cells which
Surface recombination accounts for more than 80% of the share. Lower cost, optimized process parameters and improved PV cell
Passivation efficiencies are required to reduce the overall cost per watt peak (W). In this regard, PV cell manufacturers are
Dielectric layers
currently adopting thinner wafers, which tends to increase the surface recombination velocity (SRV). Excellent
Efficiency
surface passivation at the front and rear of the PV cell becomes imperative for realizing superior efficienciy on c-
Si substrates. In this article, our focus is to discuss the role of the surface passivation process for improving the
PV cell efficiency. The fundamentals and strategies to improve the surface passivation for c-Si solar cells are
discussed. Surface passivation schemes and materials with the ability to offer field effect passivation with di-
electric charges (positive/negative) present in the passivation films were reviewed. Moreover, we discuss the use
of a thin-dielectric passivation layer with a properly selected work function and band offsets for tunneling
contacts, facilitating a higher efficiency potential. Finaly, the front/rear surface passivation schemes required for
thinner wafers to maintain higher bulk lifetime and higher efficiencies for c-Si solar cells are presented.

1. Introduction The surface passivation of crystalline silicon (c-Si) has remarkable

The photovoltaic (PV) market has been rapidly increasing globally
in recent years. The cost per watt peak (W) of solar cell modules is the
most important parameter for manufacturers, as competition in the PV
market is on the rise. Therefore, most manufacturers are currently fo-
cusing on optimizing the solar cell processes, which may help in
achieving higher efficiencies without increasing the processing cost
significantly. Processes such as improving the surface structuring and
texturization considerably enhance the light trapping ability of the
devices (Quiebras, 2013). In addition, the emitter profile distribution
with selective doping enhances the solar cell efficiency (Rahman,
2012). The formation of thinner contacts with lower shading loss and
excellent electrical properties is an important parameter for the
achievement of higher efficiency (Rehman and Lee, 2014). Moreover,
the passivation layers on the front and rear surface help to reduce the
recombination losses and enhances the solar cell performance sig-
nificantly (Balaji et al., 2015).
significance for PV applications. Eventually, high-efficiency c-Si solar
cells require an excellent level of surface passivation. In recent times,
the surface passivation has become more important owing to the cost-
driven reduction of the thickness for conventional c-Si solar cells.
Silicon-dioxide (SiO) grown by oxidation process at higher tempera-
tures (≥900 °C) were used to suppress surface recombination effec-
tively with superior efficiencies for c-Si solar cells on the laboratory
scale (Green et al., 1990; A, 1990; Zhao et al., 2001). By using a
combination of thermally grown SiO with evaporated Al and additional
annealing treatment at about 400 °C (anneal process), the surface re-
combination velocities (SRVs) were reduced to values below 20 cm/s on
p-type substrates (Kerr and Cuevas, 2001). This SiO/Al layers stacked
on the rear side also enables an opportunity to improve the light
trapping properties of the cell by acting as an excellent for near band-
gap photons and hence provides the short-circuit current of the cell.
Despite the fact that SiO offers excellent surface passivation quality, its
implementation on an industrial scale is limited as the high temperature

⁎
Corresponding author.
E-mail address: shl@sejong.ac.kr (S.H. Lee).

https://doi.org/10.1016/j.solener.2018.03.025
Received 25 October 2017; Received in revised form 7 March 2018; Accepted 10 March 2018
Available online 22 March 2018
0038-092X/ © 2018 Elsevier Ltd. All rights reserved.
A. ur Rehman et al.
processes are detrimental to silicon bulk lifetime. In particular, high
thermal processes (above 900 °C), usually significantly degrades the
bulk lifetimes, specifically for multi-crystalline silicon wafers (Stocks
et al., 1997). Low temperature alternates offering surface passivation
properties that are comparable to that of annealed SiO are required for
future industrial based high-efficiency crystalline silicon solar cells. The
use of silicon nitride (SiN) grown by plasma-enhanced chemical vapor
deposition (PECVD) at ∼400 °C has been reported as an alternative
with comparably low SRVs as alnealed SiO on p-type substrates
(Lauinger et al., 1996; Schmidt et al., 2008). However, the SiN de-
position on the rear side of the passivated emitter and rear cell (PERC)
type solar cells resulted in significantly reduced short-current density
compared to silicon dioxide counterparts (Dauwe et al., 2003). This is
because silicon nitride has a large density of positive charges inside the
silicon nitride layer; this tends to induce an inversion layer in Si below
the silicon nitride later, which has a detrimental effect that is known as
“parasitic shunting” when coupled with base contact and causes sig-
nificant loss in short-circuit current density (Dauwe et al., 2002). Apart
from that, other materials such as amorphous silicon (a-Si), stacks of a-
Si/SiO, and aluminium oxide (AlO) have been used to passivate the rear
surface of the cell effectively (Rahman and Khan, 2012). Among them,
low temperature growth of AlO by atomic layer deposition (ALD),
provides an excellent level of surface passivation, which is confirmed
from carrier lifetime measurements on n- and p-type silicon substrates
(Rahman and Khan, 2012; Hoex et al., 2006; Schmidt et al., 2008).
Surface passivation on both the front- and rear-sides of the PV cells
is the basic requirement to achieve higher efficiencies. In this regard,
electrical surface passivation tends to play a vital role in describing the
conversion efficiency as well as the fabrication cost of crystalline based
silicon PV cells. Highly stable PV modules (life span of more than
20 years) require the passivation techniques with lower thermal budget
(≤400 °C) to be developed on industrial scale. In this article, our focus
is to discuss the details of the development as well as the potential of
surface passivation schemes for high-efficiency c-Si solar cells.
2. Fundamentals of surface passivation
The silicon surface represents the largest possible discontinuity of
the symmetry of the crystal lattice. This discontinuity is owing to the
presence of a large number of partially bonded silicon atoms (limited
electron pairing of the atoms at the surface). These unpaired electrons
tend to create a large density of defects (surface states) within the
bandgap existing at the semiconductor surface. These defect levels tend
to enhance the recombination rates at the surface.
The Schockley-Read-Hall (SRH) theory describes the recombination
by defect states in semiconductors. The SRH theory extracts the rate of
surface recombination Usurface for a single defect located at an energy Et
(trap energy level) Rein (2006).
ns ps −ni2
Us =
τp0 (ns + n1) + τn0 (ps + p1 ) (1)
Here, ns and ps are electrons and holes concentrations at the surface,
respectively. τn0 and τp0 represent the capture time constants of elec-
trons and holes. These capture time constants are related to defect
concentrations (Nt), capture cross-sections (σn ) and (σp ), and thermal
velocity (vth) of the specific defect center. n and p are statistical para-
meters expressed as a function of the intrinsic Fermi level (Ei).
τp0 = [Nt σp vth]−1,τn0 = [Nt σn vth]−1
E −E E −E
⎛ t i⎞ ⎛ t i⎞
n1 ≡ niexp⎝ kT ⎠ ,p
1 ≡ niexp⎝ kT ⎠ ,n1 p
1 = ni2
This surface recombination can also be represented in terms of
surface recombination velocity (SRV) parameters for electrons (Sn) and
holes (Sp).
91
Solar Energy 166 (2018) 90–97
ns ps −ni2
Us = p +p
ns + n1
+ sS 1
Sp0 n0 (2)
In fact, the defect states do not occupy a single energy level but are
distributed across the Si bandgap, and as a result, the defect parameters
are not constant. These parameters depend on the energetic location of
the defects in the band gap. Thus, extended SRH formalism is required
to express the rate of surface recombination (Usarface). In Eq. (1), the
SRH rate of recombination for single defect can be integrated over the
entire bandgap, with interface trap density (Dit) as the weighting
function. This helps in extracting the overall surface recombination rate
(Us) or the effective surface recombination velocity (Seff).
Ec
vth Dit (Et ) dEt
Us = (ns ps −ni2) × ∫ [ns + n1 (Et )] σp1 (Et ) + [ps + p1 (Et )] σn1 (Et )
Ev (3)
The surface recombination rate (Us) and excess carrier density (Δ) at
the surface give the value of the SRV.
Us
S≡
Δns (4)
Usually, the Girisch algorithm (Girisch and De Keersmaecker, 1988)
is required to calculate the doping and injection dependence of the SRV,
and the analytical expression can only be found in the case of the flat
band condition. The surface concentrations can be represented by (Δns ),
as under flat band conditions the excess carrier densities of electrons
(Δns ) and holes (Δps ) are equal under illumination (Aberle, 1999). The
flat band condition SRV can be calculated by:
n 0 + p0 + Δns
S (Δns ) = p + p + Δns
n 0 + n1 + Δns
+ 0 S1
Sp0 n0 (5)
This SRV is usually used to quantify the surface recombination pro-
cesses. Here, n 0 represents electrons and p0 represents holes of the
equilibrium concentration. In general, surface passivation is achieved
by reducing the number of interface defect states and by the shielding
of electrons (ns) and holes (ps) at the c-Si surface by means of a built-in
electric field (field-effect passivation). Equation (1) demonstrates this
phenomenon, and the term (ns ps −ni2) in the equation is responsible for
the deviation of the system from thermal equilibrium. The strategies
were employed improve the surface passivation are explained in the
next section.
3. Strategies for improving the surface passivation
Two types of strategies are useful to reduce the surface re-
combination rate or effective SRV (Seff) at semiconductor surface. First,
as can be seen from Eq. (1), the density of interface states (Dit) at the
semiconductor surface directly impacts the SRV. Hence, the reduction
in Dit (from Eq. (3).) is the most obvious and upfront method for
achieving good surface passivation.
Scientifically, the use of appropriate surface passivating materials
has the tendency to reduce the concentration of Dit at the semi-
conductor surface. The dangling bonds at the c-Si surface can be cured
effectively by hydrogen present in passivating materials. The use of
annealing gas containing hydrogen (e.g. foaming gas with 4% hydrogen
and 96% argon/N) also passivates these dangling bonds. The use of
polar liquids for Si immersion with/without illumination can be used as
an alternate method for surface passivation (Yablonovitch et al., 1986;
Grant, 2012; Jin et al., 2007). Amorphous silicon, silicon oxides, alu-
minum oxides and silicon nitrides are the most popular applicants for
silicon surface passivation. For example, thermal SiO film with post-
annealing process in foaming gas (containing hydrogen), resulted in
reduction of Dit,midgap to as low as 109 eV−1 cm−2 for an undiffused c-Si
wafer. The reduction in Dit and the rate of surface recombination de-
pend largely on the process conditions and post-deposition annealing.
A. ur Rehman et al. Solar Energy 166 (2018) 90–97

The second strategy for surface passivation is to significantly reduce
the surface concentration of electrons (ns) and holes (ps) at semi-
conductor interface by means of a built-in electric field (field-effect
passivation). The SRH recombination involves electrons and holes, and
the recombination rates are mainly caused by the capture cross section
of defects. The peak recombination rate is observed while the product
of concentration of holes and capture cross section equals the corre-
sponding product for electrons (Aberle et al., 1992).
ns σn ≈ ps σp
It is very clear that the recombination rate can be reduced sig-
nificantly with a reduction in the concentration of the charge carrier
density (either holes or electrons). The introduction of an internal
electric field below the semiconductor surface can help in reducing the
concentration of the electrons and holes considerably. Technically, an
internal built-in electric field can be induced by either employing a
doping profile underneath the surface or using an electrostatic field
provided by means of stable electric charges in an overlying insulator.
This can be done using thin dielectric layer with fixed charges on top of
the silicon surface.
In PVs for surface passivation, silicon oxides and silicon nitrides are
extensively used as positively charged dielectrics (Aberle, 1999), while
aluminum oxides are often used as negatively charged dielectrics (Hoex
et al., 2006; Wang et al., 2009, 2012). The fixed charges present in
dielectric films significantly impact the passivation on moderately and
heavily doped silicon. This impact depends mainly on the polarity and
the magnitude of the fixed charges of the dielectric films. The fix charge
(Qf) induces an electric field that impacts the carrier densities at the
silicon surface, creating accumulation, depletion or inversion. High
efficiency is usually achieved by improving the open circuit voltage (V)
of the solar cell, which mainly depends on the effective surface passi-
vation of heavily doped c-Si. The role of effective surface passivation to
reduce Seff and the emitter saturation current density (J0e) has been an
important topic in various research groups. The best reported Seff. and Je
values for c-Si considering positively and negatively charged films are
summarized in Table 1.
4. Surface passivation schemes and materials
4.1. Front surface passivation
An effective surface passivation is required to cure the discontinuity
in the symmetry of the crystalline lattice at the silicon surface.
Fundamentally, c-Si has two different type of surfaces, which can be
characterized as either metallized or non-metallized surfaces for solar
(6) cell fabrication. The metal-silicon interface needs to be carefully de-
signed as it has a very high recombination velocity, and excessively
large recombination losses should be avoided. In the same way, the
illuminated non-metallized regions needs to be doped lightly (to avoid
formation of dead layer with minimal Auger recombination) and pas-
sivated well to ensure a good blue response of the cell. The surface
passivation of both the front- and rear-sides of the cell are important in
cell fabrication with higher efficiencies. The first cell having an effi-
ciency > 20% has, front and rear passivation that was reported the
1980s (Girisch and De Keersmaecker, 1988; Blakers and Green, 1986).
The front surface passivation is very important in the production of
crystalline based silicon solar cells. The growth of positively charged
SiO and SiN has mainly been used as front surface for crystalline based
silicon solar cells. The thermal growth of SiO is the most effective way
to passivate the front surface as lower interface-state density (1 × 1010/
cm2eV) can be achieved (White and Cricchi, 1972; Declerck et al.,
1973). However, SiO growth involves high temperature process which
eventually degrades the bulk lifetime, and hence, it is not suitable for
industrial applications (Aberle, 2000). In contrast, the SiN growth by
PECVD at lower temperature (≤400 °C) is considered as the most fea-
sible method for cell fabrication on industrial scale (Rahman and Khan,
2012).
4.2. Rear surface passivation
In recent times, the trend of crystalline silicon solar cell has shifted
towards a cost-driven reduction of the wafer thickness (< 200 µm) for

Table 1
Electronic properties of commonly used surface passivation materials (either positive and negative fixed insulator charge) for homojunction c-Si solar cells.

Films Surface passivation results Electronic interface properties

n-type n+-type p-type p+-type Interface trap density Fix charge (Qf)
(Dit,midgap)
S J S J

[cm/s] [fA/cm ]2
[cm/s] [fA/cm2] [×1011 eVcm−2] [×1011cm−2]

Positively Thermal SiO Static 2.4 ∼10 11.8 20 0.1–1 −1

charged (Kerr et al., 2001; (Kerr et al., (Kerr and Cuevas, (Kerr, 2002) (Aberle, 1999; Jin et al., (Aberle, 1999)
films Ortega et al., 2008) 2001; Ortega 2001) 2007; Aberle et al., 1992;
et al., 2008) Eades and Swanson,
1985)
PECVD SiOx3 Static 2 210 11 NA −1 5–10
(Chen et al., 1993; (Chen et al., (Dingemans et al., (Fountain et al., 1988; (Chen et al., 1993)
Mueller et al., 2008) 1994) 2011) Chen et al., 1993)
PECVD SiN Static 3.4 20 6.7 23 ∼3–50 ∼1–70
(Chen, 2008) (Kerr et al., (Wan et al., 2012) (Chen, 2008; (Aberle, 1999) (Aberle, 1999; De Wolf
2001) Chen et al., et al., 2005; Lelièvre et al.,
2006) 2009)
Dynamic 30 60 11.8 NA NA NA
(Winderbaum et al., (Tan et al., (Winderbaum
2005) 2005a, b) et al., 2004)

Negatively ALD AlO Static 0.33 60 2.35 10 1 −(40–100)

charged (Liao et al., 2013) (Hoex et al., (Liao et al., 2013) (Hoex et al., (Hoex et al., 2008) (Hoex et al., 2008;
films 2012) 2007) Dingemans et al., 2010;
Terlinden et al., 2010)
PECVD AlOx3 Dynamic NA NA 10 8 −10 −(10–40)
(Saint-Cast et al., (Saint-Cast (Saint-Cast et al., 2011) Saint-Cast et al., 2011
2009) et al., 2012)

NA stands for ‘Not Available’.

92
A. ur Rehman et al.
production on an industrial scale. However, the use of thinner wafers is
associated with an increased amount of recombination losses (Aberle,
2000), and consequently, a well-passivated rear surface is required to
keep the rear losses at an acceptable minimum. Moreover, a higher
internal reflection is required for good optical quality; therefore all of
the designs for high efficiency silicon solar cells use a passivation layer
at the rear surface. Alongside the rear surface passivation, the use of
back surface field (BSF) is vital for high efficiency as it helps in the
suppression of the minority carrier concentrations across the bulk. The
concept of BSF was introduced by Mandelkorn and Lamneck (1972),
whereby a homojunction was used at the full back surface (Mandelkorn
and Lamneck, 1972). The rear surface passivation along with BSF is
used as for high efficiency potential, and several techniques have been
introduced over the years. Among them, Al2O3 deposition by ALD, wet
oxidation, and AlO/SiN rear passivation are the most prominent tech-
niques used for crystalline silicon solar cells.
4.2.1. Rear passivation materials
4.2.1.1. AlO. High thermal processes above 900 °C degrades the bulk
lifetime, especially for multicrystalline silicon (mc-Si) wafers Stocks
et al., 1997. AlO deposition has evolved as an alternative to passivate
rear surfaces with low temperature deposition by ALD, which offers
properties that are comparable to that of annealed SiO (Schmidt et al.,
2008; Hoex et al., 2007, 2008; Benick et al., 2008; Agostinelli et al.,
2006).
Al2O3 has a very high density of negative charges (up to 1013 cm−2)
which make it a unique material for passivating p+ regions (Hoex et al.,
2008). For AlO passivation the deposition method describes the density
of fixed negative charges. Another aspect of Al2O3 passivation is that it
provides hydrogen to Si interface during thermal treatments and hence
helps in reducing the density of Dit at silicon surface (Dingemans et al.,
2010). However, the presence of fixed negative charges at AlO/Si in-
terface shields the electrons from the surface by means of field-effect
passivation of silicon surfaces (Saint-Cast et al., 2009; Werner et al.,
2011; Dingemans et al., 2010).
Even though, Al2O3 rear passivation offers the benefits in terms of
higher efficiency, the metallization etch back damages the surface of
Al2O3 extensively (Lauermann et al., 2010). However, the use of SiN
capping layer on top of Al2O3 reduces the surface damage and effec-
tively enhances the life-time (multiple of 2.5-fold), which helps to boost
the efficiency with a gain of 0.7%. Moreover, for an n-type c-Si sub-
strate passivated with AlO and AlO/SiN:H (hydrogenated silicon-nitride
multilayers). This multilayer combination resulted in an ultra-low SRV
of (Seff < 3 cm/s) with an effective stability, even when processed at
higher firing temperature (> 800 °C) Dingemans et al., 2009.
4.2.1.2. a-Si:H/SiO stacks. Amorphous silicon-rich oxynitride and
silicon-dioxide double layer stacks have also been used for rear
surface passivation. The layers act as a good passivation layer on the
rear surface when the rapid thermal process (RTP) and light soaking is
done in subsequent steps. This results in an optimized effective lifetime
that can be realized with both p and n-type crystalline silicon
substrates. This kind of double layer offers, good quality surface
passivation with positive field effect and can withstand harsh
treatment (Seiffe et al., 2011). These double layered stacks resulted in
very low SRVs < 6 and < 11 cm/s which were obtained by depositing
them on low resistivity n and p-type crystalline silicon, respectively.
This process also performs the hydrogenation process and remains
stable for temperatures above 800 °C (Dingemans et al., 2011). The best
conversion efficiency of about 21.7% for crystalline silicon solar cells
were achieved by Hofmann et al. using such passivation stacks
(Hofmann et al., 2008).
4.2.1.3. Wet oxidation. Thermal oxidation offers excellent rear side
passivation and reported higher efficiencies for crystalline silicon solar
cells (Zhao et al., 1999). Therefore, thermal oxidation process for
93
Solar Energy 166 (2018) 90–97
industrial application has been investigated by various authors (Mack
et al., 2009; Wolf et al., 2009; Biro et al., 2009). However, the high
operating temperatures (∼ 1000 °C) are not preferable especially for
multicrystalline silicon substrates, which requires low temperatures to
maintain higher lifetimes (Schultz et al., 2004).
Wet oxidation can be used as a replacement for dry oxidation when
the process temperature is decreased from ∼1000 °C to below 900 °C.
The use of wet oxidation for rear side passivation is usually realized
with pyrogenic steam from high purity gases (H, O), at relatively lower
temperature (< 900 °C) Benick et al., 2011. This introduction of ul-
trapure water vapor into the oxidation tube by the pyrolytic purifica-
tion of steam is an easier and more cost effective way of oxidizing the Si
surface. At Fraunhofer ISE, the use of such oxidation process has been
successfully applied to study the suitability of rear side passivation of
crystalline silicon solar cells (Stocks and Cuevas, 1998; Schultz et al.,
2008). For incident photons with long wave-lengths, an absolute gain of
6% in both Voc and Jsc relative to Al-BSF solar cells was recorded
(Catchpole and Blakers, 2000).
Moreover, wet oxidation has an oxide growth rate that is about one
order of magnitude higher than the traditional high temperature
(1050 °C) dry oxidation process and can be useful for industrial appli-
cation competing high temperature dry oxidation process (Schultz
et al., 2004).
4.3. Passivation for tunneling contacts
The contact area at the Si surface offers large amount of re-
combination losses (up to > 50% for high efficiency cells), owing to the
high density of the electronic states introduced by metals near the in-
terface within the Si band gap (Benick et al., 2008). To minimize the
recombination at the contact area, two different approaches have pre-
viously been adopted.
(i) Local contact formation with small contact area and local doping
(PERL structure).
(ii) A separating thin-dielectric layer in between the metal contact and
Si that tends to passivate the Si while still serving as a conductive
connection to the solar cell.
The thin passivated-dielectric layer is used as a buffer/tunneling
layer at Si contact area and avoids the direct metal contact which cir-
cumvents interface states within the Si gap. Another important feature
is that these passivated contacts do not require any dopant diffusions
and hence minimizes surface and Auger recombinations. These passi-
vating contacting schemes do not require any complicated patterning
process.
Fig. 1 shows several materials highlighted with blue shading that
can be used for the transport layer for contact between n-type BSF and
an n-type Si wafer. All these materials have almost similar conduction
band minima (CBM) and work functions compared to that of the Si.
Their energy gaps are also closer to or wider than those of. In contrast,
it is difficult to contact the p-type BSF to the limited choices for the
contact (green circles). This is because most of the metal oxide have
energetically very deep valance band maxima (VBM) and cannot be
used as p-type materials. The only alternate is to use p-type transparent
conductive oxide (TCO) with a gap that enclose that of Si or a p-type
TCO with larger work function (MoO). TCOs have been successfully
used as a front contact of the cell, resulting in a large open circuit
voltage (Voc) by forming MoO/a-Si:H contact structure for n-type Si
(Battaglia et al., 2014). Various research and development (R & D)
groups have adopted the process of contact passivation, and have re-
ported higher efficiencies (Table 2).
5. Surface passivation for high-efficiency c-Si solar cells
The higher efficiencies of c-Si mainly depend upon the higher bulk
A. ur Rehman et al. Solar Energy 166 (2018) 90–97

Fig. 1. Materials that can be used as a potential candidates for passivated contacts to Si summarized in Ref. (Stradins et al., 2014). The list contains the dielectric and semiconductor
materials with the valance band maxima (VBM) and conduction band minima (CBM) energies shown in the chart. The VBM of Si is also shown for comparison.

lifetimes, increased rear internal reflection (R) and front/rear re-
combination losses. In the PV industry, silicon wafers account for larger
shares (17% of total cost) in the manufacturing cost of the modules
composed of c-Si solar cells (ITRPV, 2015). The trend for using thinner
silicon wafers has emerged to reduce the $/W cost and to maintain solar
cell efficiency. In this regard, the appropriate use of surface passivation
(specifically the rear surface passivation) is essential in sustaining the
efficiency of PV cell. Fig. 2(a) clearly shows that for thinner silicon
wafers, there is a need to reduce the rear surface losses in order to
maintain higher efficiency (Duttagupta, 2014). The shaded area in the
figure represents the present range of the wafer thicknesses (ranges
180–220 µm), currently used for industrial application. The effective
rear surface losses of about 500–1000 cm/s with aluminium back sur-
face (Al-BSF) are currently manufactured in the PV industry. Solar cells
with rear surface losses lower than 100 cm/s have been reported as
important components to improve the solar cell efficiency (Schmidt
et al., 2008; Dullweber et al., 2012; Gatz et al., 2011). Furthermore,
rear surface losses can be reduced effectively by incorporating surface
passivating dielectric at the rear side of the solar cell. The higher bulk
lifetime of c-Si substrates have an important impact on solar cell effi-
ciency. Fig. 2(b) shows that lower rear surface losses have higher im-
pact on solar cell efficiencies when the bulk lifetimes are higher (lower
recombination losses in bulk).
Good quality surface passivation for c-Si on either side (front/rear)
have significantly impacts the solar cell efficiency. Fig. 3 shows the
impact of front surface passivation on efficiency with reduction in
Seff.front especially when the rear surface is passivated well (Duttagupta,
2014). Currently trend of front SRV (Seff.front) is generally in the order of
104–106 cm/s for homogeneous emitter with sheet resistance of
70–100 ohms/sq, which depends on diffusion process and quality of
surface passivation (Kerr et al., 2001). The surface passivation at rear
surface significantly reduces the rear SRV (Seff.rear) for higher efficiency
structures; however, the front SRV (Seff.front) also plays a vital role in
achieving higher conversion efficiency. Fig. 2 shows that for a low
Seff.rear, an absolute efficiency improvement of more than 1% can be
realized to reduce Seff.front to 103 cm/s which is lower than the current
state-of-the art (104–106 cm/s). This reduction in front/rear SRV can be
realized by highly optimized front emitter profile and high-quality di-
electric passivation for front and rear surface.
6. Conclusion and outlook
In summary, because the possible discontinuity in the symmetry of
the crystalline lattice at the Si surface, the importance and funda-
mentals of the surface passivation process for c-Si solar cells were stu-
died. The rate of the surface recombination can be minimized by re-
ducing the density of interface trap (Dit) and/or an imbalance in the
surface concentration of either holes or electrons. The reduction in the
surface concentration of electrons/holes can be achieved by im-
plementing a doping profile below the Si surface or by field-effect
passivation due to electrical charges present in the passivating films.
The presence of fixed charges (positive/negative) in passivating films is
useful when performing field-effect passivation. The recent trend of
using thinner wafers (< 200 µm) for cost reduction of c-Si solar cells
poses an issue of an increased number of recombination losses and
consequently a high quality surface passivation at the rear side is es-
sential. Thus, an effective rear surface passivation method is a short-
term challenge for the successful implementation of PV cell fabrication
on an industrial scale. As discussed in this paper, there are several
surface passivation schemes that are well suited for this task. Moreover,

Table 2
High efficiency solar cells fabricated with passivated tunneling contacts at various research and development (R & D) centres.

R & D Centre Type Passivated & transport Electrode V (mV) Jsc (mA/ FF (%) Eff. (%) Ref.
layer cm2)

Panasonic HIT i-a-Si/doped a-Si TCO & Metal 750 39.5 83.2 24.7 (Taguchi et al., 2014)
(double side junction) (IBC-HIT) 740 41.8 82.7 25.6 (Masuko et al., 2014)

Sunpower IBC (passivated contacts) SiOx/doped poly-Si Metal 734 40.4 81.5 24.1 (Smith et al., 2013)
Silevo Tunnel oxide SiOx/doped poly-Si TCO & Metal 739 38.9 80.5 23.1 (Heng et al., 2015)
ECN Passivated emitter and rear poly-Si SiOx/doped poly-Si Metal 675 38.8 79.1 20.7 (Stodolny et al., 2016)
(PERPOLY)
GIT Poly-Si/SiO/p-Si SiO/Poly-Si Metal 683.4 39.66 78.1 21.2 (Tao et al., 2016)

ANU TiO or SiO/TiO TiO or SiO/TiO Al/Ag 676 39.2 80.7 21.6 (Yang et al., 2016)
a-Si/MgF a-Si/MgF Al 687 37.8 77.3 20.1 (Wan et al., 2016)

EPFL Hetero-structure w/MoO a-Si/MoOx (p) – a-Si/LiF TCO & Metal 725 38.6 80.4 22.5 (Geissbühler et al., 2015)
(n)
B-doped SiCx (p) SiOx/i-Si/SiCx TCO/Ag 694.7 37.2 79.1 20.44 (Nogay et al., 2016)

94
A. ur Rehman et al.
Fig. 2. Solar cell efficiency as a function of: (a) Si wafer thickness and (b) bulk lifetime, for a simulated one-Sun n+p c-Si wafer solar cell. Multiple effective rear surface recombination
velocities (Seff.rear) were used to study the effect for silicon wafer thickness and bulk lifetime by Duttagupta (2014).
Fig. 3. One-Sun simulated efficiency of an n+p c-Si PV cell as a function of Seff,front.
Simulation was performed for several values of Seff,rear. The range of Seff,front (104–106) is
represented in the shaded portion (Duttagupta, 2014).
for high and ultra-high efficiency, the use of thin-passivating layer
below the contact area becomes increasingly important to minimize the
carrier recombination at cell contacts. Generally, a well passivated
surface on either side (front/rear) for c-Si has substantial impact on PV
cell efficiency (front surface passivation has higher impact on effi-
ciency, particularly when the rear of the PV cell is passivated well).
Acknowledgements
This work was supported by the Korea Institute of Energy
Technology Evaluation and Planning (KETEP) and the Ministry of
Trade, Industry & Energy (MOTIE) of the Republic of Korea (No.
20173010012940) and by the Ministry of Trade, Industry and Energy,
Korea Evaluation Institute of Industrial Technology (KEIT) (No.
10043793). This work is also funded by the Higher Education
Commission (HEC) of Pakistan under the National Research Program
for Universities (NRPU) with project no. MS5544.
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