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COMSATS University Islamabad (CUI)

Department of Electrical and Computer Engineering


Digital Logic Design (EEE-244)
Class: BSE-2A

Assignment # 02

Date of submission: 10-Dec-2020

Q1. Write a verilog code for BCD adder with its test bench (using monitor command).

Q2. Design a BCD adder–Subtractor circuit and write its Verilog code and test bench for
verification. Hint (Use the BCD adder of Q1 and the 9’s complement circuit).

Q3. Write a verilog code for magnitutute comparator with its test bench.

Q4.Design a code converter that converts a decimal digit from


(a) The 8, 4, –2, –1 code to BCD
(b) The 8, 4, –2, –1 code to Gray code

Q5.Write the verilog code for Q4.

Q6.Simplify the following Boolean function F, together with the don’t-care conditions d

F=∑ (4,12,7,10),d =∑ ( 0,6,8)

Note: Simulation results should consist of verilog code with test bench using monitor command

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