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Assignment # 02
Q1. Write a verilog code for BCD adder with its test bench (using monitor command).
Q2. Design a BCD adder–Subtractor circuit and write its Verilog code and test bench for
verification. Hint (Use the BCD adder of Q1 and the 9’s complement circuit).
Q3. Write a verilog code for magnitutute comparator with its test bench.
Q6.Simplify the following Boolean function F, together with the don’t-care conditions d
Note: Simulation results should consist of verilog code with test bench using monitor command