Name: Souradeep Seth

Designation: Lecturer in Electrical Engineering

Name of Polytechnic: Rajganj Government Polytechnic

Name of Subject: Power Electronics & Drives

Unit No.: 2

Topic Heading: Switching & Timer Circuits

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 5th Semester
Power Electronics and Drives
Unit 2: Switching & Timer Circuits
2.1: Simple transistor timer using R-C as timing element.

Fig. A: A transistor timer circuit using R-C as timing element.

In electronics timer, the output of timing element is used as a trigger pulse for BJT, FET and UJT. Timer
circuit can also be used as a control switch for load which will energize and de-energize an
electromechanical relay which can further turn ON and turn OFF a load respectively.

In Fig. A, resistors R1, R2, Capacitor C, Emitter of transistor Q1 work as a timing element, Transistor Q1
work as a triggering element, electromechanical relay work as a load switching element which controls
the output.

When switch S1 is closed, relay coil starts energizing through transistor Q1 and capacitor C also starts
charging through R1 and R2. As relay coil get energized, it will pull the switch of load lamp circuit to get
closed and will turn the load lamp on as load lamp get connected to 220V, 50Hz power supply. Now as
capacitor C keeps on charging, voltage builds up in capacitor C with its left plate positively charged and
right plate negatively charged and base current of transistor Q 1 decreases and transistor Q1 will be
turned off. As transistor Q1 turns off, it will de-energize the relay coil and it will cause switch of load
lamp to get open and the load lamp will be turned off as load lamp get disconnected from 220V, 50Hz
power supply. Capacitor C and resistors R1, R2 form the main element of the timing circuit and its time
constant will control the time for which load lamp will remain on.

Now, when reset push switch S2 is pressed, the capacitor C discharges through resistor R3 and after
discharging, right plate of capacitor C is positively charged and left plate becomes negatively charged
and it will further forward bias the base terminal of transistor Q1 and it is turned on which will further
turn on the load lamp.

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In this way the cycle of charging and discharging of capacitor C continues. The time duration for which
the load lamp remains on and off can be changed by changing the values of resistors and capacitor.

2.2: Classification of multi-vibrators.

Multi-vibrator circuits refer to the special type of electronic circuits used for generating pulse signals.
These pulse signals can be rectangular or square wave signals. They generally produce output in two
states: high or low. A specific characteristic of multi-vibrators is the use of passive elements like resistor
and capacitor to determine the output state. These circuits are basically closed loop feedback circuits.

There are two possible states of a Multivibrator. These two states are interchanged for certain time
periods depending upon the circuit conditions. Depending upon the manner in which these two states
are interchanged, the Multivibrators are classified into three types. They are: (i) Astable Multivibrator,
(ii) Monostable Multivibrator, (iii) Bistable Multivibrator

Astable Multivibrator:

An Astable Multivibrator is such a circuit that it automatically switches between the two states
continuously without the application of any external pulse for its operation. As this produces a
continuous square wave output, it is called as a Free-running Multivibrator. The time period of these
states depends upon the time constants of the components used in the circuit. As the Multivibrator
keeps on switching, these states are known as quasi-stable or half-stable states. Hence there are two
quasi-stable states for an Astable Multivibrator. In Fig. 1, the time period for which astable multivibrator
output remains high, represents one quasi-stable state and the low output state represents another
quasi-stable state.

Monostable Multivibrator:

A Monostable Multivibrator has a stable state and a quasi-stable state. This needs a trigger input. So,
one transistor changes its state automatically, while the other one needs a trigger input to change its
state.

As this Multivibrator produces a single pulse as output for each trigger pulse, this is known as One-shot
Multivibrator. This Multivibrator cannot stay in quasi-stable state for a longer period while it stays in
stable state until the trigger pulse is received. Once it receives an input trigger it goes to quasi-stable
state from stable state. After some time it automatically returns back to stable state. The time period for
which it stays in quasi stable state depends on the time constants of the components used in the circuit.
In Fig. 1, the time period for which monostable multivibrator output remains high, represents the quasi-
stable state and the low output state represents stable state.

Bistable Multivibrator:

A Bistable Multivibrator has both the two states stable. It requires two trigger pulses to be applied to
change from one stable state to another stable state. Until the trigger input is given, this Multivibrator
cannot change from one stable state to another. It’s also known as flip-flop multivibrator.

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As the trigger pulse sets or resets the output, and as some data, i.e., either high or low is stored until it is
disturbed, this Multivibrator can be called as a Flip-flop. In Fig. 1, the time period for which bistable
multivibrator output remains high, represents one stable state and the low output state represents
another stable state.

Fig. 1: Different multivibrators with type of input trigger and output.

In Fig. 1, T1 and T2 are the time instants at which input triggers are applied to multivibrators.

2.3: Study of Astable, Monostable & Bistable multivibrator circuits using OPAMP

Astable multivibrator using OPAMP

The Operational Amplifier or OPAMP for short, is a very versatile device that can be used in a variety of
different electronic circuits and applications, from voltage amplifiers, to filters, to signal conditioners.
But one very simple and extremely useful application of op-amp is the Astable Multivibrator.

Multivibrator circuits can be constructed using transistors, logic gates or from dedicated chips such as
the IC 555 timer. The astable multivibrator switches continuously between its two quasi-stable states
without the need for any external triggering. It produces its own input signal with the aid of a feedback
network.

But the problem with using these components to produce an astable multivibrator circuit is that for
transistor based astables, many additional components are required, digital astables can generally only
be used in digital circuits, and the use of a 555 timer may not always give us a symmetrical output
without additional biasing components. The OPAMP based Multivibrator circuit however, can provide us
with a good rectangular wave signal with the use of just four components, three resistors and a timing
capacitor.

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Fig. 2: An astable multivibrator using OPAMP.

The Op-amp based Astable Multivibrator is an astable oscillator circuit that generates a rectangular
output waveform using an RC timing network connected to the inverting input of the operational
amplifier and a voltage divider network connected to the other non-inverting input.

Unlike the monostable or bistable, the astable multivibrator has two states, neither of which are stable
as it is constantly switching between these two states with the time spent in each state controlled by
the charging or discharging of the capacitor C through a resistor R.

In the op-amp multivibrator circuit the op-amp works as an analogue comparator. An op-amp
comparator compares the voltages on its two inputs and gives a positive or negative output depending
on whether the input is greater or less than some reference value, VREF. If inverting terminal input of
OPAMP is higher than non-inverting terminal input of OPAMP, then output of OPAMP will be low. If
inverting terminal input of OPAMP is lesser than non-inverting terminal input of OPAMP, then output of
OPAMP will be high.

However, because the open-loop op-amp comparator is very sensitive to the voltage changes on its
inputs, the output can switch uncontrollably between its positive, +VSAT or High and negative, -VSAT or
Low supply rails whenever the input voltage being measured is near to the reference voltage, VREF.

To eliminate any erratic or uncontrolled switching operations, the op-amp used in the multivibrator
circuit is configured as a closed-loop Schmitt Trigger circuit. Consider the circuit in Fig. 3.

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Fig. 3: A Schmitt Trigger circuit.

The op-amp comparator circuit in Fig. 3 is configured as a Schmitt trigger that uses positive feedback
provided by resistors R1 and R2 to generate hysteresis loop shape graph between VOUT and VIN. As this
resistive network is connected between the amplifiers output and non-inverting (+) input, when VOUT is
saturated at the positive supply rail, a positive voltage is applied to the op-amps non-inverting input.
Likewise, when VOUT is saturated to the negative supply rail, a negative voltage is applied to the op-amps
non-inverting input.

As the two resistors are configured across the op-amps output as a voltage divider network, the
reference voltage, VREF will therefore be dependant upon the fraction of output voltage fed back to the
non-inverting input. This feedback fraction, β is given as:

𝑅2
β=
𝑅1 + 𝑅2

Let, VOUT = + VSAT

𝑉𝑂𝑈𝑇 . 𝑅2
VREF = = βVSAT
𝑅1 + 𝑅2

When, VOUT = - VSAT

𝑉𝑂𝑈𝑇 . 𝑅2
VREF = 𝑅1 + 𝑅2
= - βVSAT

Where +VSAT is the positive op-amp DC saturation voltage and -VSAT is the negative op-amp DC saturation
voltage.

Then we can see that the positive or upper reference voltage, + VREF (i.e. the maximum positive value for
the voltage at the non-inverting input) is given as: + VREF = + VSAT β while the negative or lower reference
voltage (i.e. the maximum negative value for the voltage at the non-inverting input) is given as: -VREF = -
VSAT β.

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So if input voltage VIN exceeds +VREF, the op-amp switches state and the output voltage drops to its
negative DC saturation voltage, i.e., -VSAT. Likewise when the input voltage falls below - VREF, the op-amp
switches state once again and the output voltage will switch from the negative saturation voltage (-VSAT)
back to the positive DC saturation voltage (+VSAT). The amount of built-in hysteresis given by the Schmitt
comparator as its output switches between the two saturation voltages is defined by the difference
between the two trigger reference voltages as: VHYSTERESIS = +VREF – (-VREF).

Sinusoidal to Rectangular Conversion:

One of the many uses of a Schmitt trigger comparator, other than as an op-amp multivibrator, is that we
can use it to convert any periodic sinusoidal waveform into a rectangular waveform providing the
maximum value of the sinusoid is greater than the voltage reference point.

In fact the Schmitt comparator will always produce a rectangular output waveform independent of the
input signal waveform. In other words, the voltage input does not have to be a sinusoid, it could be any
wave shape or complex waveform. Consider the circuit in Fig. 4.

Fig. 4: Sinusoidal wave to rectangular wave conversion using Schmitt Trigger.

As the input waveform will be periodical and have an amplitude sufficiently greater than its reference
voltage, VREF, the output rectangular waveform will always have the same time period, T and therefore
frequency of output wave is same as the input waveform.

By replacing either resistor R1 or R2 with a variable resistor we could adjust the feedback fraction β and
therefore the reference voltage value at the non-inverting input to cause the op-amp to change state
anywhere from 0° to 90o of each half cycle of sinusoidal wave so long as the reference voltage, VREF
remained below the maximum amplitude of the input signal.

OPAMP based Astable Multivibrator

We can take this idea of converting a periodic waveform into a rectangular output one step further by
replacing the sinusoidal input with an RC timing circuit connected across the OPAMP output. This time,

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instead of a sinusoidal waveform being used to trigger the op-amp, we can use the capacitors charging
voltage, VC to change the output state of the OPAMP.

OPAMP based Astable Multivibrator Circuit

With reference to Fig. 2, firstly lets assume that the capacitor is fully discharged and the output of the
op-amp is saturated at the positive supply rail, i.e., +VSAT. The capacitor, C starts to charge up from the
output voltage, VOUT through resistor, R at a rate determined by their RC time constant.

The capacitor wants to charge up fully to the value of VOUT (which is +VSAT). However, as soon as the
capacitors charging voltage at the op-amps inverting (-) terminal is equal to or greater than the voltage
at the non-inverting terminal (the opamps output voltage fraction across resistor R2), the output will
change state and be driven to the opposing negative supply rail.

But the capacitor, which was charging towards the positive supply rail (+VSAT), now sees a negative
voltage, -VSAT at the output. This sudden reversal of the output voltage causes the capacitor to discharge
toward the new value of VOUT at a rate dictated again by their RC time constant.

OPAMP based Astable Multivibrator Voltages

Fig. 5: Capacitor voltage and Output Voltage waveform.

Once the opamps inverting terminal reaches the new negative reference voltage, -VREF at the non-
inverting terminal, the opamp once again changes state and the output is driven to the opposing supply
rail voltage, +VSAT. The capacitor now see’s a positive voltage at output terminal of opamp and the
charging cycle begins again. Thus, the capacitor is constantly charging and discharging creating an
astable multivibrator output.

The period of the output waveform is determined by the RC time constant value and the feedback ratio
established by the R1, R2 voltage divider network which sets the reference voltage level. If the positive
and negative values of the amplifiers saturation voltage have the same magnitude, then time periods for
high output and low output become equal.

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We know, Voltage of capacitor, VC = Final voltage of capacitor + (Initial voltage of capacitor - Final
−𝑡
voltage of capacitor). 𝑒 𝑅𝐶

Let, VC = -βVSAT

Then, Final voltage of capacitor = -VSAT [This is the voltage upto which capacitor tries to discharge]

Initial voltage of capacitor = 𝛽VSAT [This is the voltage from which capacitor starts discharging]

−𝑡
 -βVSAT = -VSAT + (𝛽VSAT – (-VSAT)). 𝑒 𝑅𝐶
−𝑡
 VSAT(1- β) = VSAT(1+β). 𝑒 𝑅𝐶
−𝑡
 (1- β) = (1+β). 𝑒 𝑅𝐶……………….(1)

Taking loge on both sides of equation (1), we get:

−𝑡
 loge (1- β) = loge (1+β). 𝑒 𝑅𝐶
−𝑡
 loge (1- β) - loge (1+β) = loge𝑒 𝑅𝐶
−𝑡
 loge (1- β) - loge (1+β) = 𝑅𝐶
𝑡
 loge (1+ β) - loge (1-β) =
𝑅𝐶
(1+𝛽) 𝑡
 loge(1−𝛽) = 𝑅𝐶
(1+𝛽)
 t = RC loge(1−𝛽)………………….(2)

Equation (2) gives the time period when the VOUT is low. As time periods for high output and low output
are equal.

(1+𝛽)
So, T = 2t = 2RC loge
(1−𝛽)

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Frequency, f = 𝑇

R is Resistance, C is Capacitance, T is periodic time in seconds, and ƒ is oscillation Frequency in Hz.

Then we can see from the above equation that the frequency of oscillation for an Opamp based Astable
Multivibrator circuit not only depends upon the RC time constant but also upon the feedback fraction.
However, if we used resistor values that gave a feedback fraction of 0.462, (β = 0.462), then the
(1+𝛽)
frequency of oscillation of the circuit would be equal to just 1/2RC as shown because the loge(1−𝛽) term
becomes equal to one.

By changing the value of resistors R1 or R2, we can change the Time Period and frequency of output
wave.

Application of astable multivibrator

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  The astable or free running multivibrator is used as a square wave frequency generator
 As a timing oscillator or clock of a computer system.
 It is also used for flashing lights, switching and power supply circuits.

Monostable multivibrator using OPAMP

In this multivibrator one state is stable state while the other state is quasi stable state. The stable state
is either High or Low. Assume the stable state is High. By applying a negative triggering impulse at
feedback point of non-inverting terminal of opamp, we can change output state to Low. But this Low
state is a temporary state. So it will remain in Low state for some time and after some time without
applying any triggering pulse output goes back to permanent stable state i.e. High. Thus only one
triggering pulse is required to go from stable state to quasi stable state and back to stable state. So
frequency of output is equal to frequency of input triggering pulse. Thus called as single shot or mono-
shot multivibrator. The circuit diagram in Fig. 6 shows monostable multivibrator using opamp.

Fig. 6: A monostable multivibrator using opamp.

The negative triggering impulses are obtained by differentiating a square wave using a RC differentiator
circuit at input of diode D2. The impulse has large amplitude and very small width. The width of negative
impulse signal is kept very small as otherwise -βVsat will be superimposed by the negative voltage of
impulse signal and we will not get the desired width of output pulse. In this circuit we need only
negative impulse voltage signal at feedback back point of non-inverting input of OPAMP and positive
impulse voltage signal should be avoided. Positive impulse voltage signal is avoided by using a diode D 2
at feedback point and the diode D2 is forward biased only when negative impulse signal is applied to it
and for positive impulse signal it acts as an open circuit. Thus diode D2 is used to avoid malfunctioning if
any positive noise spikes are present in triggering line.

The diode D1 connected across the capacitor is called clamping diode. It clamps the capacitor voltage to
0.7V (Cutin voltage of silicon diode when it is forward biased) when the output is at +V sat and capacitor

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voltage cannot change from 0.7V when the output is at +Vsat. The diode D1 remains forward biased when
output is +Vsat.

Let us assume, for above circuit the stable state is +Vsat. So diode D1 is forward biased and voltage across
diode D1 is 0.7V. Thus voltage across capacitor (i.e. voltage at inverting terminal) is 0.7V.
Select values of R1 and R2 such that voltage at non-inverting terminal is greater than 0.7V so output
remains +Vsat. Voltage across capacitor is always 0.7V because of diode. In forward biased condition
resistance of diode is very small so capacitor is almost short circuited by diode D1 and no charging of
capacitor takes place. If output want to be –Vsat, then voltage at inverting terminal should be greater
than non-inverting terminal. So apply a negative triggering impulse at non-inverting terminal to change
the output state.

A negative triggering impulse is applied at t = 0. Initially voltage across capacitor C is 0.7V and output is
+Vsat. When negative triggering impulse is applied at t = 0, output state changes to -Vsat as voltage at non
inverting terminal is the negative impulse voltage which is less than voltage 0.7V at inverting terminal of
OPAMP. The diode D1 is reversed biased so capacitor starts charging through resistance R towards -Vsat.
When output becomes –Vsat, the negative impulse voltage at triggering point or feedback point voltage
is replaced by -βVsat voltage, so when capacitor charges upto -βVsat voltage and then tries to go below -
βVsat to charge upto voltage -Vsat,, inverting terminal voltage becomes less than non inverting terminal
voltage and output changes state to +Vsat. The capacitor then discharges through diode forward
resistance. The diode is almost shorted so discharging time constant is very small. The triggering pulses
are applied only when output is in permanent state or the triggering pulse can be applied at that time
when the output is just come back to original permanent state. The time constant RC determines the
pulse width (T) of the output pulse, which is a rectangular shape. So monostable multivibrator is also
called as rectangular pulse generator.

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Fig. 7: Triggering voltage, Capacitor voltage and Output voltage waveform of monostable multivibrator.

Expression of pulse width T:

We know, Voltage of capacitor, VC = Final voltage of capacitor + (Initial voltage of capacitor - Final
−𝑡
voltage of capacitor). 𝑒 𝑅𝐶

Let, VC = -ΒvSat , Time t = T

Then, Final voltage of capacitor = -Vsat

Initial voltage of capacitor = VD1 = 0.7V

−𝑇
 -βVsat = -VSAT + (0.7 – (-Vsat)). 𝑒 𝑅𝐶
−𝑇
0.7
 Vsat(1- β) = Vsat(1+ ). 𝑒 𝑅𝐶
𝑉𝑠𝑎𝑡
−𝑇
0.7
 (1- β) = (1+ 𝑉 ). 𝑒 𝑅𝐶 ……………….(3)
𝑠𝑎𝑡

Taking loge on both sides of equation (3), we get:

−𝑇
0.7
 loge (1- β) = loge (1+ 𝑉 ). 𝑒 𝑅𝐶
𝑠𝑎𝑡

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 −𝑇
0.7
 loge (1- β) - loge (1+ 𝑉 ) = loge𝑒 𝑅𝐶
𝑠𝑎𝑡
0.7 −𝑇
 loge (1- β) - loge (1+ 𝑉 ) = 𝑅𝐶
𝑠𝑎𝑡
0.7 𝑇
 loge (1+ 𝑉 ) - loge (1-β) = 𝑅𝐶
𝑠𝑎𝑡
0.7
(1+ ) 𝑇
𝑉𝑠𝑎𝑡
 loge (1−𝛽)
= 𝑅𝐶

0.7 𝑅2
Vsat >> 0.7 V, so 𝑉𝑠𝑎𝑡
≈ 0 and if R1 = R2, then β = 𝑅 = 0.5
1 + 𝑅2

1 𝑇
 loge(1−0.5) = 𝑅𝐶
𝑇
 loge2 = 𝑅𝐶
 T = 0.693RC…………………..(4)

Equation (4) gives the pulse width of output waveform of monostable multivibrator.

It can be seen from the output waveform in Fig. 7 that the capacitor voltage VC does not reach its
quiescent value VD1 until time T’ > T. Hence it is necessary that a recovery time (T’ - T) be allowed to
elapse before the next triggering signal is applied.

Applications of monostable multivibrator:

 The monostable multivibrator is used as delay and timing circuits.

 It is also used for temporary memories.
 It is often used to trigger another pulse generator.

Bistable multivibrator using OPAMP

A bistable multivibrator is an electronic circuit also referred to as a flip-flop. It is a circuit that has two
stable states and can be used to store state information.

A flip-flop is a bistable multivibrator and it can be made to change state by signals applied to an input
terminal and will have two output states. The two output states are stable states, hence the name
bistable. It can be flipped from one state to another by incoming pulses.

Flip-flops and latches are a fundamental building block of digital electronics systems. One of their chief
applications is in storing data and as such they are widely used in computers and processor systems of
all sorts.

In this circuit, both the states at the output (+Vsat and -Vsat) are stable states. i.e. the circuit remains in
the same state till the external input is applied. If we want to change the output state a triggering pulse
is applied. Now the state obtained after the pulse is applied is a permanent stable state. If we want to
change the state again, we have to apply another triggering pulse. Thus by only application of trigger
pulse, output changes its state. Thus to get the original state back, two triggering pulses need to be
applied. The Fig. 8 shows the bistable multivibrator circuit using opamp.

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Fig. 8: A bistable multivibrator using an opamp.

Let us assume that the output is in positive saturation i.e. +Vsat. Thus the feedback voltage at non-
𝑅
inverting terminal is also positive and is given as +Vsat.𝑅 +2𝑅 = +βVsat. Initially no input signal is applied at
1 2
inverting terminal of opamp. Thus the voltage at inverting terminal is 0 Volt. In order to change the state
of the output from +Vsat to –Vsat, a positive pulse whose value is higher than +βVsat is applied at inverting
terminal of opamp through a RC High Pass filter circuit. As now inverting input terminal voltage is
greater than non inverting terminal voltage, output changes to –Vsat. At instant 't1' a trigger pulse is
applied as shown in the waveform in Fig. 9.

Now in the stable state -Vsat, the threshold voltage at non-inverting terminal is also negative and is given
𝑅
as -Vsat. 2 = -βVsat. Again in order to change the state from –Vsat to +Vsat, a negative pulse is applied at
𝑅1 + 𝑅2
inverting terminal of op-amp. To change the state of the output, the magnitude of the trigger pulse, i.e.
voltage at inverting terminal, should be lesser than the negative feedback voltage at non inverting
terminal of opamp. At instant 't2' a trigger pulse is applied as shown in the waveform in Fig. 9.

Fig. 9: Input and output waveform of bistable multivibrator.

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The period for which an output stable state is maintained depends on when we provide a suitable input
pulse at inverting terminal of opamp. When the suitable input pulse will arrive the input, then only
output state will change. The high pass filter RC circuit at the inverting terminal of opamp allows high
frequency triggering input pulse signal to pass.

Applications of bistable multivibrator:

 The bistable multivibrator or Flip Flop is of great importance in digital operation in computers,
digital communications.

2.4: Internal block diagram, Pin diagram and operating of IC 555.

IC 555 timer is called so because the timer got its name from the three 5 kilo-ohm resistors in series
employed in the internal circuit of the IC. IC 555 timer is a one of the most widely used IC in electronics
and is used in various electronic circuits for its robust and stable properties. It works as square-wave
form generator. The 555 timer comes as 8 pin device.

Pin diagram of IC 555:

Fig. 10: Pin diagram of IC 555.

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Internal block diagram of IC 555:

Fig. 11: Internal block diagram of IC 555.

Operating of IC 555:

Basics Concepts we need to know before understanding the operation of IC 555:

Comparator: The Comparator are the basic electronic component which compares the two input
voltages i.e. between the inverting (-) and the non-inverting (+) input terminals of opamp and if the non-
inverting input of opamp is more than the inverting input then the output of the comparator is high.
Also the input resistance of an ideal comparator is infinite.

Voltage Divider: As we know that the input resistance of the comparators using opamps is infinite hence
the input voltage is divided equally between the three 5kΩ resistors. The voltage across each resistor is
𝑉𝐶𝐶
3
.

Flip-Flop: Flip-Flop is a memory element of Digital-electronics. The output (Q) of the flip/flop is ‘high’ if
the input at ‘S’ terminal is ‘high’ and ‘R’ is at ‘Low’ and the output (Q) is ‘low’ when the input at ‘S’ is
‘low’ and at ‘R’ is high.

Function of different Pins:

1. Ground: This pin is used to provide a zero voltage rail to the Integrated circuit to divide the supply
potential between the three resistors shown in Fig. 11.

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2. Trigger: As we can see that the voltage at the non-inverting end of the lower comparator using
opamp is VCC/3, so if the trigger input is used to set the output of the flip-flop to ‘high’ state by applying
a voltage less than VCC/3 or any negative pulse, as the voltage at the non-inverting end of the
comparator is positive, i.e., VCC/3.

3. Output: It is the output pin of the IC, connected to the Q’ (Q -bar) of the Flip Flop with an inverter
as show in Fig. 11.

4. Reset: This pin is used to reset the output Q of the Flip Flop regardless of the initial inputs of the
Flip Flop and also it is an active low Pin so it connected to ‘high’ state, i.e., +VCC to avoid any noise
interference, unless a reset operation is required. So most of the time it is connected to the Supply
voltage as shown in Fig. 11. When we need to reset Q then we detach Reset pin from +V CC and give a
‘low’ state input to that pin. It is also used to modify the width of the output signal irrespective of the RC
timing network by making Q’ high when Q is reset to 0. High Q’ will turn on the transistor connected to
discharge pin 7 and will immediately discharge the capacitor (capacitor is present in the external circuit
and not present in IC 555 and it is used to make the IC behave as a square wave generator).

5. Control Voltage: As we can see that the pin 5 is connected to the inverting input of upper
comparator using opamp having a voltage level of (2/3) VCC. It acts as a reference voltage of upper
comparator and controls width of the output signal irrespective of the RC timing network.

6. Threshold: The pin is connected to the non-inverting input of the upper comparator. The output of
the upper comparator will be high when the threshold voltage will be more than (2/3) VCC thus resetting
the output (Q) of the Flip Flop from ‘high’ to ‘low’.

7. Discharge: This pin is used to discharge the timing capacitor (capacitor is present in the external
circuit and not present in IC 555 and it is used to make the IC behave as a square wave generator) to
ground when the output of Pin 3 is switched to ‘low’.

8. Supply: This pin is used to provide the IC with the supply voltage +VCC for the functioning and
carrying of the different operations to be fulfilled with the IC 555 timer.

Working of IC 555:

As shown in Fig. 11, IC 555 includes two comparators (upper and lower comparator), one RS flip-flop and
other few discrete components like one transistor, three numbers of 5kΩ resistors, one NOT gate. The
biasing or supply voltage (+Vcc) is divided in three equal parts by voltage divider rule using same value of
5kΩ resistors. Each equal part from +Vcc is + Vcc /3 and is applied across each 5kΩ resistor. From these
1/3 VCC is given to non inverting terminal of trigger comparator (Lower comparator) and 2/3 Vcc is given
to inverting terminal of threshold comparator (Upper comparator). The outputs of both comparators are
given to R and S inputs of flip-flop. The Q output is actual output of IC and Q’ output drives discharging
transistor to turn on and the transistor provides discharging path to an external capacitor (While
designing multivibrator circuit with IC 555 we use a capacitor externally with IC 555 ) whenever Q’ is
high.

When trigger to inverting terminal of lower comparator <1/3 Vcc is applied at trigger input pin 2, the
trigger comparator (lower comparator) gives high output that sets the flip flop output Q to high and Flip-

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Flop output Q’ goes low. When trigger to non-inverting terminal of upper comparator >2/3 VCC is applied
at threshold input pin 6, the threshold comparator (upper comparator) gives high output that resets the
flip-flop output Q to 0 and the Q’ output will become high. At this time discharging transistor that
provides discharging path to external capacitor is drived to on state by high Q’ and completely
discharges the capacitor. The high input to active low reset pin 4 keeps flip-flop enable. If input to pin 4
is low, flip-flop disables and output Q will be low. Threshold and trigger comparator outputs will not
affect the output Q of flip-flop when input to pin 4 is low.

Uses:

The IC 555 timer is used in many circuits, for example One-shot pulse generator, i.e., in Monostable
mode, as an Oscillator in Astable Mode or in Bistable mode to produce a flip-flop type action.

2.5: Study of Astable, Monostable & Bistable multivibrator circuits using IC 555 timer.

Astable multivibrator using IC 555 timer:

Fig. 12: An astable multivibrator using IC 555 timer.

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Connections:

Resistance R1 is connected between VCC pin no. 8 and discharge pin no. 7. Another resistance R2 is
connected between threshold pin no. 6 and discharge pin no. 7. Trigger pin no. 2 is shorted with
threshold pin no. 6. Capacitor C is connected between threshold pin no. 6 and ground pin no. 1. Control
voltage input pin no. 5 is connected to ground through 0.01µF capacitor so that the external noise from
the terminal is filtered out. The output is taken from pin no. 3. Reset input pin no. 4 is connected to VCC
to enable internal flip-flop operation. Pin no. 8 is connected to VCC for positive bias and pin no. 1 is
connected to ground for negative bias.

Fig. 13: Block diagram of astable multivibrator using IC 555 timer showing connection of external circuit.

Operation:

As we know already, Astable mode is self triggering and changes its state automatically from high to low
and low and high. This is achieved by shorting threshold and trigger pin. Initially output is high and the
capacitor C charges towards VCC through R1 and R2. When voltage across capacitor reaches 2/3 VCC and
tries to go above 2/3 V CC, the threshold (upper) comparator gives high output. This will reset the flip-flop
output Q to 0. The discharging transistor becomes ON because of Q’= 1. So capacitor finds discharging
path through R2 to discharge pin. As capacitor discharges to 1/3 VCC and tries to go below 1/3 V CC, the
trigger comparator gives high output. This will set the flip-flop output Q to 1. Discharging transistor is
OFF because of Q’= 0. So capacitor will again start charging. Thus capacitor will charge and discharge
between 2/3 Vcc and 1/3 Vcc limits. This cycle continuous and we get high-low-high-low output
continuously at a rate of charging and discharging of capacitor.

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Fig. 14: Capacitor C and Output Voltage waveform of astable multivibrator using IC 555 timer.

Design Equations:

We know, Voltage of capacitor, VC = Final voltage of capacitor + (Initial voltage of capacitor - Final
−𝑡
voltage of capacitor). 𝑒 𝑅𝐶

During Charging of capacitor C towards VCC :

2𝑉𝐶𝐶
Let, VC =
3

Then, Final voltage of capacitor = VCC [This is the voltage upto which capacitor tries to charge]

𝑉𝐶𝐶
Initial voltage of capacitor = 3
[This is the voltage from which capacitor starts charging]

−𝑇𝑂𝑁
2𝑉𝐶𝐶 𝑉𝐶𝐶
 3
= VCC + ( 3
– VCC). 𝑒 (𝑅1 + 𝑅2)𝐶
−𝑇𝑂𝑁
−𝑉𝐶𝐶 −2𝑉𝐶𝐶
 3
= 3
. 𝑒 (𝑅1 + 𝑅2)𝐶
−𝑇𝑂𝑁
1
 2
=𝑒 (𝑅1 + 𝑅2 )𝐶 ……………….(5)

Taking loge on both sides of equation (5), we get:

−𝑇𝑂𝑁
1
 loge = loge 𝑒 (𝑅1 + 𝑅2)𝐶
2
𝑇𝑂𝑁
 0.693 = (𝑅 + 𝑅2)𝐶
1

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  𝑇𝑂𝑁 = 0.693 (R1 + R2).C………………….(6)

During Discharging of capacitor C towards 0:

𝑉𝐶𝐶
Let, VC = 3

Then, Final voltage of capacitor = 0 [This is the voltage upto which capacitor tries to discharge]

2𝑉𝐶𝐶
Initial voltage of capacitor = 3
[This is the voltage from which capacitor starts discharging]

−𝑇𝑂𝐹𝐹
𝑉𝐶𝐶 2𝑉𝐶𝐶
 3
= 0+ ( 3
– 0). 𝑒 𝑅2 𝐶

−𝑇𝑂𝐹𝐹
𝑉𝐶𝐶 2𝑉𝐶𝐶
 3
= 3
.𝑒 𝑅2 𝐶

−𝑇𝑂𝐹𝐹
1
 2
=𝑒 𝑅2 𝐶 ……………….(7)

Taking loge on both sides of equation (7), we get:

−𝑇𝑂𝐹𝐹
1
 loge 2 = loge 𝑒 𝑅2 𝐶

−𝑇𝑂𝐹𝐹
 0.693 =
𝑅2 𝐶
 𝑇𝑂𝐹𝐹 = 0.693.R2.C………………….(8)

Time period of output wave T = TON + TOFF = 0.693 (R1 + 2.R2).C

1 1
Frequency, f = =
𝑇 0.693 (R1 + 2.R2).C

𝑇𝑂𝑁 0.693 (R1 + R2).C (R1 + R2)

Duty Cycle = = = ……………….(9)
𝑇 0.693 (R1 + 2.R2).C (R1 + 2.R2)

Astable multivibrator for 50% (or less) duty cycle:

One problem in connecting astable multivibrator as shown in Fig. 13, we will get duty cycle more than
(R1 + R2)
50%. It is not possible to design it for less than 50% because Duty cycle = (R1 + 2.R2). In equation (9) if
you exclude R1 (by assuming R1=0) then you will get Duty cycle = R2 / 2×R2 = 50%. But we can not make
R1 = 0 in Fig. 13. That’s why an exact 50% duty cycle or less than that is not possible with circuit as
shown in Fig. 13.

To get exact 50% (or less) duty cycle we can use one diode D across resistance R2.

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Fig. 15: Block diagram of astable multivibrator using IC 555 timer showing connection of external circuit
for 50% (or less) duty cycle.

As shown in Fig. 15, one diode D is connected in forward direction of charging across resistance R2. In
the circuit now instead of using two different value resistors, only one value (R) is used as R1 and R2,
i.e., R1 = R2 = R. Initially output is high and capacitor charges to 2/3 VCC through upper resistor R1 and
diode D. When capacitor voltage tries to go above 2/3 VCC, Flip-Flop output becomes low. Then capacitor
discharges to 1/3 VCC through lower resistor R2. Because both resistance values are same, so we shall
get same charging time and discharging time, that means exact 50% duty cycle.

The capacitor charging time for which output is high is given by TON = R1×C × ln 2 = 0.693×R×C

Simillarly the capacitor discharging time for which output is low TOFF = R2×C × ln 2 = 0.693×R×C

Now total time period of output wave = T = TON + TOFF = 2×0.693×R×C = 1.386×R×C

And frequency is given by f = 1/ T = 1 / (1.386×R×C) = 0.72 / RC

Now to decrease the duty cycle further (less than 50%) one has to reduce the value of upper resistance
(R1) than lower resistance (R2). This will decrease charging time less than discharging time. So the ON
time (time when output is High) is decreased and duty cycle also decreases.

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Astable multivibrator using IC 555 timer:

Fig. 16: Block diagram of monostable multivibrator using IC 555 timer showing connection of external
circuit.

Connections:

Instead of connecting one resistor in between threshold and discharge pin, they are shorted here as
shown in Fig. 16. One resister R is connected between VCC pin and discharge pin. The capacitor C is
connected as shown in Fig. 16 between threshold pin and ground. External trigger is applied at trigger
input pin no. 2. Control voltage input pin no. 5 is connected to ground through 0.01µF capacitor. The
output is taken from pin no. 3. Reset input pin no. 4 is connected to V CC to enable internal flip-flop
operation. Pin no. 8 is connected to V CC for positive bias and pin no. 1 is connected to ground for
negative bias.

Operation:

In this mode the state of output will only change from low to high and then back to low if external
negative trigger pulse or pulse having value less than VCC /3 is applied. The trigger input and the output
pulse is shown in Fig. 17.

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Fig. 17: Trigger pulse, Capacitor voltage and output voltage waveforms.

Before trigger is applied, the capacitor tries to charge to Vcc through R. When it reaches to 2/3 VCC and
capacitor voltage tries to go above 2/3 V CC the threshold comparator gives high output. That will reset
flip-flop output to low and discharge transistor is ON by high Q’ and capacitor discharges. When trigger
pulse of less than VCC /3 is applied, the trigger comparator gives high output Q. This will set the flip-flop
output to 1. So output becomes high and discharging transistor becomes off. So again capacitor starts
charging towards VCC. When it reaches 2/3 Vcc, flip flop output Q resets. So the output becomes high
only when trigger is applied and remain high till capacitor charges to 2/3 V CC.

Design Equations:

During Charging of capacitor C towards VCC :

2𝑉𝐶𝐶
Let, VC =
3

Then, Final voltage of capacitor = VCC [This is the voltage upto which capacitor tries to charge]

Initial voltage of capacitor = 0 [This is the voltage from which capacitor starts charging]

−𝑇𝐻
2𝑉𝐶𝐶
 = VCC + (0 – VCC). 𝑒 𝑅𝐶
3
−𝑇𝐻
2𝑉𝐶𝐶
 3
=2VCC. 𝑒 𝑅𝐶

−𝑇𝐻
1
 3
=𝑒 𝑅𝐶 ……………….(10)

Taking loge on both sides of equation (10), we get:

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 −𝑇𝐻
1
 loge 3 = loge 𝑒 𝑅𝐶

𝑇
 1.1 = 𝐻
𝑅𝐶
 𝑇𝐻 = 1.1 R.C………………….(11)

While discharging, the capacitor directly discharges to 0 volts through discharge pin 7 and there is no
resistance in discharging path. So, discharging of capacitor C takes place immediately and time period
for discharging of capacitor C is 0.

When the capacitor charges to 2/3 Vcc value, the threshold comparator will reset the flip-flop and
output Q immediately becomes low. So this time delay equation actually determines the output pulse
width that means till this time the output remains high. So equation (11) is the design equation for
monostable multivibrator. Using this equation, one can find out the values of R and C for required
output pulse width.

Bistable multivibrator using IC 555 timer:

When an astable multivibrator has no stable states, a monostable multivibrator has a single stable state,
a device with two absolute stable states is possible. A Bistable multivibrator is a type of circuit which has
two stable states (high and low). It stays in the same state until and unless an external trigger input is
applied. Generally, a bistable multivibrator stays low until a trigger signal is applied and it stays high until
a reset signal is applied. Bistable multi vibrators are also called as flip-flops or latches. The term flip-flop
is used because it ‘flips’ to one state and stays there until a trigger is applied and once the trigger is
applied it ‘flops’ back to the original state.

Fig. 18: Block diagram of bistable multivibrator using IC 555 timer showing connection of external circuit.

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A bistable multivibrator doesn’t require a capacitor as the RC charging unit is not responsible for the
generation of the output. The generation of high and low outputs is not dependent on the charging and
discharging of the capacitor in the RC unit but rather it is controlled by the external trigger and reset
signals.

The trigger and reset pins (pins 2 and 4 respectively) are connected to the supply through two resistors
R1 and R2 so that they are always high. In all the previous cases, the reset pin is not used and in order to
avoid any accidental reset, it is simply connected to V CC.

Two switches S1 and S2 are connected between pins 2 and 4 respectively and ground in order to make
them go low momentarily. The switch at the trigger input will act as S (SET) input for the internal flip-
flop. The switch at the reset input will act as reset for the internal flip-flop.

When the switch S1 is pressed, the voltage from VCC will bypass the trigger terminal pin 2 and is shorted
to ground through the resistor R1. Hence, the trigger pulse will momentarily go low and the output of
the 555 timer at pin 3 will become high. The output stays HIGH because there is no input from the
threshold pin (pin 6 is left open or better if connected to ground) and the output of the upper
comparator will not go high.

When the switch S2 is pressed, the voltage from VCC will bypass the reset terminal and is shorted to
ground through the resistor R2. This pin is internally connected to the RESET terminal of the flip-flop.
When this signal goes low for a moment, the flip-flop receives the reset signal and RESETs the flip-flop
output Q to low.

Hence, the output will become low and stays there until the trigger is applied. The waveforms of the
bistable mode of operation of the 555 timer are shown in Fig. 19.

Fig. 19: Trigger input, Reset input and Output waveform of bistable multivibrator using IC 555 timer.

A bistable multivibrator using IC 555 timer can be used as a memory cell. Memory is an important unit in
digital electronics. Flip-flops are the basic 1 – bit storage elements. A 555 timer, when used as a flip-flop,

26
can act as a memory cell to store 1 – bit data. The circuit of a memory cell using 555 timer is shown in
Fig. 20.

Fig. 20: A bistable multivibrator using IC 555 timer used as a memory cell.

When the set switch is pressed, the voltage at pin 2 goes low. This will SET the flip-flop and the output
becomes HIGH which drives the LED connected to it. When the reset switch is pressed, the voltage at pin
4 goes low. This will RESET the flip-flop and the output becomes LOW which turns off the LED.

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