Scheme of Teaching and Evaluation

Bachelor of Technology in Computer Science and Engineering

4BCS504: MICROPROCESSORS
Course Frame Work:
Credits: L–T–P: 3–0–0 Total Credits: 3
Contact Hours/Week: 3 Direct Teaching Hours: 45 Total Contact Hours: 45
Course Learning Objectives:
This course aims students to understand basic architecture of microprocessors, interfacing
of microprocessor with memory and peripheral chips involving system design. To understand
RISC and CISC based microprocessors and the concept of multi core processors.

Course Outcomes (COs):

On successful completion of the course, students will be able to:
CO1 Explain architecture and addressing modes of 8086 L2
CO2 Analyze the instruction set of 8086 L2
CO3 Write assembly language programs for 8086 L4
CO4 Explain Stacks and Interrupts in 8086 L2

CO5 Analyze bus configuration and interfacing of 8086 L2

SYLLABUS Hours
Module–I: Introduction 09

Introduction to microprocessors and computer: microprocessor, computer, assembly

language, number systems

Module–II: 8086 Processor 09

Historical background, 8086 CPU architecture addressing modes, machine language

instruction formats
Module–III: Instruction Set of 8086 09

Data transfer and arithmetic instructions, control/branch instructions, logical Instructions,

string manipulation instructions, flag manipulation and processor control instructions,
illustration of these instructions with example programs, assembler directives and operators,
assembly language programming and example programs

© CMR University, Bengaluru (2020) -121

 Scheme of Teaching and Evaluation
Bachelor of Technology in Computer Science and Engineering

Module–IV: Stack and Interrupts 09

Introduction to stack, stack structure of 8086, programming for stack, interrupts and
interrupt service routines, interrupt cycle of 8086, NMI, INTR, interrupt programming,
passing parameters to procedures, macros, timing and delays

Module–V: 8086 Bus Configuration and Timings 09

Physical memory organization, general bus operation cycle, I/O addressing capability, special
processor activities, minimum mode 8086 system and timing diagrams, maximum mode
8086 system and timing diagrams, static RAM interfacing with 8086, interfacing I/O ports

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 Scheme of Teaching and Evaluation
Bachelor of Technology in Computer Science and Engineering

EVALUATION SCHEME

A. Continuous Internal Evaluation (CIE):

Components Internal Assignment Total

Assessment Test
Max. Marks 30 20 50
Note: A student shall obtain a minimum of 50% in CIE to be eligible to appear for SEE.
B. Semester End Evaluation (SEE): 100 Marks
Question paper pattern:

1. The question paper shall have FIVE main questions corresponding to the FIVE modules.
Internal choices shall be given only in the main questions.

2. Each main question will have TWO full questions carrying TWENTY marks each.

3. A full question may have a maximum of FOUR sub questions, covering the topics under
the module.

4. The students will have to answer all FIVE main questions, selecting ONE full question
from each module.

Weightage for Final Evaluation

CIE SEE
1.00 0.5

BOOKS and REFERENCES

TEXT BOOKS:
[1] Barry B. Brey, The Intel Microprocessors : Architecture, Programming and Interfacing,
Pearson Education/PHI, 8th Edition, 2003, ISBN-13: 9780130487209
[2] Y C Liu And G A Gibson, Microcomputer Systems The 8086 8088 Family, 2nd Edition,
PHI, 2003, ISBN-13: 9780135809440, ISBN-13: 978013580499

REFERENCES:
[1] Douglas V. Hall, Microprocessors and Interfacing: Programming and Hardware,
TMH, 2nd Edition, 2006, ISBN-13: 9780070255265

© CMR University, Bengaluru (2020) -123