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    Karishma Manoj Vaidya_ Roll no-07_STLD practical

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    17 views38 pages

    Karishma Manoj Vaidya - Roll No-07 - STLD Practical

    Uploaded by

    karishma vaidya

    Copyright:

    © All Rights Reserved
    Download as PDF or read online from Scribd
    Flag for inappropriate content
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    ” D Name _JLKwushm a mano} valova SC ean) Semester )| 5th sem) Subiect _(_Swhtching thearag & lopte Desidh IN DE Class Roll No. x ard gag in Ct Sr. No, , Experiment Description Experiment Date Pgs vo ‘Submission Date | Remarks / Signature -—t}Implementatton and | 1 =o te Simuldton of Gastc gates Us Implemenpatton and s!muation of Avo and woe gates 9] OmplementaHon 6-4 and simula oh OF XoR XIWOR gates 4), Smplementatlon | and Simulaton oF Halt ___| nd ful addex - 5] | tmplomentutlon and simutat on of 4 Stl MUX - 6)) Tyyplomentatton and | 16 -1+ _ simul Hon of /'8 DEMUX- 3 Dmplomentaton and simulartton of BLU KN DE x ‘Sr. No. Experiment Description oan Submission Date | Remarks / Signature |_| Smplementation 21-99. an d_dmulat on of 2'4 Necoder gh} ample m wiLitLH on 23 and omulat on D—filp ~ For © 1of| erp lomentatton 24-95 ad simutat on of eblt Countess - os 4 Experiment fvo- 1 —_—Alm'- Smplomentaton and_elmulaten of Basic Galt Program !~ Avo. HATE ~~Imporet std lotic freon the LEEE {ibraxy Ubre teens Vv use {e Ob ct legle = N6G-aNy ae deol ntoamn Ht hs I port (A.B taetd logte $ | : td. Joho’) eee gue een PPE —-PuyctipNAL Description | The AND ote WOKS AM chi tect func Hon OF and care ts in eg ed and 8} ond func + Experiment ype BIO! SmPleMentetion and simulalton of Paste. 4 ates. OR_ GATE ! i 7 x brary» [use teBo std logic 16. aul: | ie ie | pmare te Port (A,B 1 In Std lod § & ! OWb etd lode): ena ote Oulre, _-funcHona Ddecombp ton: how the OR bore wORKS amchitectuse tuneHon OF ormete ts bog ih OLE Op RS | end funcs Vo T are fet Std — @ De fe 1 Qs uc ted rn llc L6G .adls ent Derlataan inume, [npurs, Outputs port Cn part » in std. Loatc, ; ‘es _ —-O" -o a Se end Nok OTe) classmate Dato Popo: ~~ fubeHohal besatipt on ~- ho wy he Paver rere ae auchitectwwe Functon | OF nORMare te begth ourPOht c= NOkimpopt: Nd fun ¢ Hee gute Paten ee 10 (ubTe OR TE Exporeiment MO+2. pI). Omplomentuion an 4 cimuaton of VAD and wor ques . Preogst My)» - MAND Gere QA TE impart std log c feom the tebe beat twas eos use t ss fd —loqte W6GsatLy wn 4 Nand dates s poet (hb! Ingtd loqte) ond nandwates —pontHon ol DescatpHons how the ed ed =Angid b4 “end func’s Caperime nr yor 2 Ari Implementation and simuwaton Of weary tad WOR gates - classmate Date a WOR GATE | == | @ fpr =-OnHty DeclandHon: Name ,iInpube, outputs T pores ee aro ts port (A,B * tn sid cc) ® < out std loge.) And NorMates / -funchon al percriptHon - func Of NowGate ts b tk =A Noe B 3 — end Fung conclustoh! In thls Way , wo ¢ompure. tho. oO MVAtVD and MOR Cates. CLASSMATE | rae (eee) 1 wo Gn — == impart tid logt co. freon dhe fo mee tt vente arr logic. Mé@= all, — Ea > ‘ont Thopdiate bs port (h,k * in sid -t c3) Td Oa 8 \ = =o 7 Pxpe plment MO-3 t . olmuaH' on 0 and AvoR garae | preogxan $= L rt XOR GATE —~ Import Std - vate from ne Peet I brawy Lb too es q use lee td atc Wb aut’, | peclav aon: name, Inputs, Out UE { onH Hy, Nor (ua Is poet (8! in etd logt Cs prour Sid by) 0, [ond XopGa te} — $$$ __puncHona bescripHon: & OR Cote uso Ss duohite Cut © unc Of Koradiore ts boat Sioa Kor Bs end func s Experiment ne-2 At & Lypleme maton and aftulaton oF XOR and KIVOR gates. CIASSMATEC | [rae I Xuok GATE ~cimport Std_iogic from Me ECE llbrasy Ube ce e\ uso teed - std —loare \6 G. oll" potty Declax ation Nam erinpurs, Outpelks “ent xpora date. 1s Sopret th B : tN s4q.logno' owt std. logos, ond xnorware| puncHon al pesrripHon' hous ne AMOR quate works -wichirortuee ~ func pf XnorHare begin az=h XnowR} end func 5 —concluston $|~ fn thts Ww we complete the omplementitn and s mulaton Of XOR afd AMOR gate’. classmate Oxperimelh UO 4 Alm). Ompemanta#on and simulation oF eat re Is Po ae * in std toate ; ~ pur std ounce) end males ae Tc tach pan C0 BMA ASE b h ach and By end UN Cy Hope wo dvttne ye Kor gare that — ise. “iho Half Add or ay lb: ee Eapersiment (vo: & ANS OmplementatioN and a and (ote. port map (B.B cout)’ ¥. ped 4 an 4st rd dee ; ClASSMATE| Paes [Peoes TT] ond Malt Oddeh 3 Cull _padera _ Ho Halt es tt a ogi LL, pr (BiB: ha wH'c, e. Ours th loge cy ond andres | {while ctu fang DE and ate f= \ ooglN ofr U4 BS end func; BEE eee eee eee classmate | Poe [ =-wow we deHne +he | “the full add en eee Libeayy eve’, use ee enti cetera |e Poek (p,B! fo? fs Dusty toate) s ond oe Mate, mechitectuxe func oF orm G@ate js bean ‘pi=f of Bs and funcs we aque fin soady to bwid tne Full ndde ie { g us @ Weoe. std logic 1164 au 7 entity fujaddors | poet Cp, B,C ins In std lyah cs — Sum (owt % pea ngtc)', pod fulladdex , acne Baan ati bs opt Hal Con fiien net na ET classmate Date Page: [2 a pont (OB tn std _pogie, Elo 8 ‘ j UbStd— log po’) end Compon@fhrs S\anal haftohadf haPTo om 1 hulftoore? std loge, Peat GL Haye Bddere Pot Nop Lp, BihalP -t0 hole hats on!) Got - 8 oe 2); an i half To oe 2 cout) ond fulliddors. conelushon § on this way , We complete the Tmplonenrdire and simul atin Nye Half addoa ancl Pull addiere Oxperal NO: Aird. Omplementation and simdlaHon of ©: muuiplexen — Pree qa em! : ~~ VHDL @o0E! EEE3 ive 70 otic = 6d BLL Vs z 1 ae Tete. Sia cere ALL} ne Yt In STD: oop down to0) gel! in th [ue vector co. downto 0)’ C ‘end mul plexere; qeehbte tue Behaviors ol Of muitielentye—— 1s ence (AS Expertmenr Wars Piro: OmplamentaHon and simwot on OF BI route Plena yy classmate | Date: SE whon “ooo"= by d = Alo) 3 nen "ool! = eu 2= X01) 5 ughon Wolo’ = eYyd = x/)’, when “col! = ty =X(9) 3 when ‘lo0"= »¥d = X45 when lpi’ = +yL =XxX/8), when _* ro eyl = AG) | whon “Hp"=-yed= A wohen o+herS-» nut’ end Case; end frocess, end Pehaviouxa conclus)on’. Tn we Compre “omplemenat' on and slim Hon of 82) pOTTOTT clASSMAte. _ Dat ~_bxpetalment No.6 alm Dmplementaton and simuladln of OF on 08 EB — po~ mult plerep. oguan = EE — De ecole us EST IAS ALLS endty demux 42 i< Port ~ bs Pecan ae Output OIF alba ; ad \W “auteur iF aa Out st __ ouput bit ours | Our std out 6: our sel + 4n std : (g.down bitin + in std_logc _- input alt Exper imonk wo. 6 An mplementahion and Simusaton oh tte DC- Muttiplex ey. | cinsomave| a 3 igh | PROCess Ublip. sel) bedth : case_sol Is when “ooo optoZ=bitth 3 buelé=0"" but QZ="%6" 5 put B2= O's ou rg C=O’; ub 8 2=" 0! out bL ='0' ould ¢ =10's when. “0 gl" =e Ont LZ AIP In’ es out 22="0' + out 2Z= 0" out Lato Cursc="0', gure o9', cut + Le%o! | When * 101" = gut 6 caplttn 5 ourO Z='0': out, d="0'," ouf LLev’, cubase o'you 4 =O! ; outs Z= O': Ze'olt who) orhips =! aurte = th 1s ourd. L= ‘05 cut d= — Za bIHNs ott others = a 7 ae ee ty put 1 = "0" oured= 0") Our Qe= rol: Out 4 C= ‘0’; out sc=W end Pence 8, end Beno view’: Forgan A OS —_Asgip)are poneti oh. _ = 5 __ Pxpera{me nt (v0: t Alm{- Smelementaton and suntan fain Peng tn ee _ Ubtaay SEE 3 use. TD LObIC = IG. LL: us : . 5 oe elmple aly bs pore Ccik!|h std logics _ lockagnat a, G:1N slaned (4d Serer sign? 5 OF era 1H op) 10 40 perform, & put sraned (A down to 6) _Outpub Ca BLY ve end Simple. aly’ imel is aap a ts od [Haunt i 2, \_ Shan UW. Ol ete ' g = (vo Experiment no ¥ AIM Tmplementat'on and siMWatHon of ALU. bodin isa c=Ay_ i: ee a Repac=6; ; Do. pv =Req 8} See ee —_ preoc es? (Clk) — —______— eee Seams eg) ing uae Tee eee eat Ye (icing edge (clk) ) then ——Daothe ate a Hon the eos ttve edge of Clock eyle : [| case op ls when 090’ =r I pugs caked | p04 2+, ~-addltton wih @n a fity 7 Rpedgd Sred [Red 2. su btteacHon when 70,0 = eva Z=noh Reg l= not gate ___—— phe ; 7 7 tr ol"

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