JSPM’s

Rajarshi Shahu College of Engineering

Department of Electrical Engineering

PLC and SCADA

Lab Manual
Academic Year: 2021-22
 Experiment No. 01
Aim: To verify all the logic gate operation using PLC logic.
(Link for Vlab: https://ied-
nitk.vlabs.ac.in/INTRODUCTION%20TO%20LADDER%20LOGIC/index.html# )
Title: Interfacing of lamp and button with PLC for ON and OFF operation. Verify all logic
gates.

Theory:
A hardwired control circuit can be represented by conventional hardwired relay ladder
diagram. In any hardwired circuit, there should be electrical continuity in order for the load
to energize.

(Fig. a) (Fig. b)
The above figure a represents the AND gate equivalent switch diagram is shown and the fig.
b represents the PLC representation of the rung.
In the same way, we can draw for all the remaining logic gates.
The simulation model for OR gate is shown in the figure below.
The simulation model can be seen on the link: https://youtu.be/OSi_lF6kCkc

Questions:
1. Write a PLC ladder logic rung diagram for 3 input AND logic function?
2. Write a PLC ladder logic rung diagram for 3 input OR logic function?
3. Write a PLC ladder logic rung diagram for 3 input NAND logic function?
4. Write a PLC ladder logic rung diagram for 3 input NOR logic function?

Conclusion: