EEE305-EEE3305 ELECTRONICS 2 MIDTERM EXAMINATION

29.11.2020
1) Design a BJT collector feedback amplifier network pointing out input and output
terminals with β=200, Zi=1 kΩ. When an input signal Vi=10 mV AC and Ii=1 mA AC is
applied to the network, an output AC signal Vo=2V AC with output current Io=60 mA AC is
obtained.
a) Draw the BJT amplifier network you prefer to design and explain why you choose
this network (5p.)
b) Explain the aims and reasons in using of all the peripheral components handled on your
network (5p.).
c) Draw AC equivalent re model of the network (5p.)
d) Calculate Vcc, RF, RC, Zo, and Av (25p.).
e) Find the output signal Vo , if Vi = 50 mV DC is applied to the input instead of 1 mV AC. (10p.)

2) Design a JFET amplifier network with Idss=8 mA, Vp=-4 V, R1=110 MΩ, R2=10 MΩ. When an
input AC signal Vi=10 mV is applied to the network, an output signal Vo=2V AC is obtained.
(suppose that rd ≥ 10RD)
a) Draw the JFET amplifier network you prefer to design, and explain why you choose this
network (5p.)
b) Explain the aims and reasons in using of all the peripheral components handled on your
network (5p.).
c) Draw AC equivalent re model of the network (5p.)
d) Draw transfer characteristic curve and derive IdQ and VGSQ values from the characteristic
curve (15p.).
e) Calculate Av, gm, VDD, RD, RS, Zi and Zo (20p.).

Note: Don’t forget using resistors and capacitors as peripheral elements whatever required for
your complete design in each question (i.e. input, output terminals etc.)