University of Tripoli

Computer Engineering Department

Project Proposal Form

Student Surname: Amani Najeeb Ben Yousaif

Email address: A.Yousuf@uot.edu.ly

Student Surname: Dania Khalid Alamen

Email address: D.Alamen@uot.edu.ly

Proposed Project Title:

Pipelined 16_bit RISC Processor on FPGA.

Supervisor:
Dr. Mohamed Eljhani

Project Outline:
1- Design, Simulate and Synthesis the function of RISC processor modules.
2- Analyzing the techniques of the pipeline Stages to improve the performance of
the proposed RISC processer.

Rationale for Choice of Project:

The aim of this project is to apply the concepts of several subjects that we studied at
our department, and to use it for our future professional activates as computer
engineers. Also there are many projects related to hardware and computer architecture
are based on microcontrollers and other platforms, we choose to use FPGA (Field
Programmable Gate Arrays) to design our RISC as SoC (System on Programmable
Chip) because this technology recently has dramatically expanded for embedded
systems design in both academia and industry sectors.

Student Signature: --------------------------------------

Date: -------------------------------------------------------

Signature: -------------------------------------------------