PS 431
Time-Overcurrent Protection
Device
Numerical Time-Overcurrent Protection with
Definite -Time and Inverse -Time Characteristics
PS 431 time-overcurrent
protection devices are used
for selective short-circuit
protection in high-voltage
networks.
The networks can be opera-
ted with impedance neutral
grounding, with resonant
grounding or with an isolated
neutral.
The PS 431 time-overcurrent
protection device has the
following features:
❑ Four-pole measurement
(A, B, C, N)
❑ Phase-selective phase
current timer stage with
DTOC and IDMT characte-
ristics (IDMT can be set to
normally inverse, very
inverse, extremely inverse,
long time ground fault or RI
inverse)
❑ Time-lag high set phase
1 PS 431 in case for wall surface or panel flush mounting current timer stage
❑ Residual current timer
stage with DTOC and IDMT
characteristics (IDMT can
be set to normally inverse,
very inverse, extremely
inverse, long time ground
fault or RI inverse)
❑ Time-lag high set residual
current timer stage
❑ Tripping matrix
❑ Optional latching of the
individual tripping criteria
❑ Possibility of reverse inter-
locking
❑ Circuit-breaker failure
protection
The protection functions
listed above are complemen-
ted by comprehensive self-
monitoring and fault diagno-
sis. In addition, the PS 431 is
equipped with the following
supplementary functions:
❑ Measuring circuit monito-
ring
❑ Operating data measure-
ment
❑ Event counting
❑ Fault data acquisition
❑ Fault logging
T&D
The PS 431 is constructed
with a multifunctional case
design that is equally well
suited to wall surface moun-
ting or panel flush mounting
due to the reversible terminal
blocks and reversible moun-
ting brackets.
The auxiliary voltage for the
power supply can be separa-
tely switched internally from
110-250 V DC to 24-60 V DC.
The binary signal inputs may
be operated with control
voltages of 24-250 V DC.
Current measurement inputs
having a frequency range of
45-65 Hz, input transducers
with 1 A and 5 A taps, and
the surface-mounting design
provide for optimum use and
versatility without variance.
The PS 431 has the following
inputs and outputs:
❑ 4 current measurement
inputs
❑ 2 binary signal inputs
(optical couplers) with
freely configurable function
assignment
❑ 4 output relays with freely
configurable function
assignment
Control and display:
❑ Local control panel
❑ 8 LED indicators, including
6 with freely configurable
function assignment
❑ PC interface
Parameters may be set either
from the local control panel or
through the PC interface, as
desired.
PS 431 Time-Overcurrent Protection Device
Functions

Definite or IDMT Mode Tripping Matrix and Latch Reverse Interlocking

Inverse Time-Delay
Short-Circuit Protection
The PS 431 time-overcurrent
protection device is generally
equipped with four current
measurement inputs A, B, C
and N.
DTOC Mode
In DTOC mode (Definite Time
Overcurrent), PS 431 has the
following overcurrent timer
stages:
❑ Phase-selective phase
current timer stage I>/tI>
❑ Residual current timer
stage IN>/tIN>
❑ High set phase current
timer stage I>>/tI>>
❑ High set residual current
timer stage IN>>/tIN>>
The effect of the timer stages
measuring in the ground path
on the general starting signal
and therefore on the start of a
fault record can be suppres-
sed, if desired. Formation of
the general trip command by
the residual current timer
stages is then automatically
disabled.
In the IDMT (inverse definite
minimum time) mode the
phase current timer stage tI>
and/or the residual current
timer stage tIN> are delayed
by an inverse time lag. The
other stages and functions
correspond to the DTOC
mode.
For inverse-time delay the
following tripping time cha-
racteristics can be selected:
❑ Normally inverse
❑ Very inverse
❑ Extremely inverse
❑ Long time ground fault
❑ RI inverse
The mode, base current,
characteristic type and cha-
racteristic factor can be set
independently for the phase
current timer stage and the
residual current timer stage.
The tripping matrix is used to
decide which of the individu-
al overcurrent timer stages
shall participate in forming
the general trip command.
The phase-selective phase
current timer stage is perma-
nently assigned to the gene-
ral trip command; this cannot
be changed. Another matrix
is used to determine which of
the individual tripping criteria
shall result in latching of the
general trip command.
The function of circuit brea-
ker failure protection is also
considered in the tripping
matrix and in the matrix for
setting the latching function.
The individual overcurrent
timer stages can be blocked
externally by way of two
independent signals. In this
connection it is possible by
using the selection matrix to
determine which of the timer
stages shall be included in
the blocking. This makes it
possible to add on a feature
such as reverse interlocking,
for example (”busbar protec-
tion with starting the corre-
sponding scan”).

All threshold operate values

and lag times can be set
independently.

2 Inverse-time characteristics

Normally inverse
0.14
t = characteristic · ––––––––––– s
factor (I /Iref)0.02 – 1

Very inverse
13.5
t = characteristic · ––––––––––– s
factor (I /I ref) – 1

Extremely inverse
80
t = characteristic · ––––––––––– s
factor (I /Iref)2 – 1

Long time ground fault

120
t = characteristic · ––––––––––– s
factor (I /I ref) – 1

RI inverse
1
t = characteristic · ––––––––––– s
factor 0.236
0.339 – –––––
(I /Iref)

2
PS 431 Time-Overcurrent Protection Device
Functions
(continued)
Cir cuit Br
Circuit eaker Failur
Breaker Failuree
Pr otection
Protection
When the trip command is
issued a timer stage for
monitoring the circuit breaker
is also started. When this
timer stage has elapsed due
to a sustained general star-
ting condition, then the circuit
breaker failure signal is
issued.
The input of a circuit breaker
failure signal through an
appropriately configured
binary input brings about a
non-delayed trip command if
the general starting signal is
present.
Measuring Cir cuit
Circuit
Monitoring
Measuring circuit monitoring
of the phase currents is
based on the principle of
maximum allowable magnitu-
de unbalance. In this case
the arithmetic difference
between the maximum and
minimum phase currents as
referred to the maximum
phase current is compared
with the set threshold operate
value. With the appropriate
settings it is also possible to
monitor the phase currents
even with an economy-type
CT connection (CTs in only
two phases).
Operating Data
Measur ement
Measurement
The PS 431 time-overcurrent
protection device acquires
the following measured
operating data and updates
them at approximately 1 s
intervals, as long as a fault is
not being processed at the
time:
❑ Maximum value of the
three phase currents
❑ Phase currents
❑ Residual current
The measured data are
displayed as r.m.s. values
and are normalized to the
corresponding nominal value
of the protection device.
Event Counting
The following events are
counted by the PS 431 time-
overcurrent protection de-
vice:
❑ Tripping on faults
❑ Faults
❑ Warning entries
Fault Data Acquisition
After the end of a general
starting condition, the follo-
wing measured fault data are
acquired:
❑ Running time
❑ Short-circuit current
Fault Logging
Protection signals at the time
of a fault are stored in chro-
nological order. A total of five
faults with a maximum of 64
start/end signals each, can
be held in a circular memory
- the signal memory. If more
than five faults occur and no
faults have been erased in
the interim, the oldest fault
record will be overwritten. A
four-digit resettable counter
identifies the individual faults
by serial number.
The fault records can be read
from the local control panel.
Self-Monitoring
Extensive monitoring routines
in the PS 431 ensure that
internal hardware or software
faults will not lead to mal-
functioning of the protective
relaying system. When the
auxiliary voltage VA is turned
on, a function test is carried
out. Cyclic self-monitoring
tests are run during operati-
on. If test results deviate
from the default value, a fault
signal is issued. The result of
fault diagnosis determines
whether a protective blocking
will occur or whether only a
warning will be issued. The
faults diagnosed in con-
junction with self-monitoring
are stored in a memory
(monitoring signal memory).
The contents of the monito-
ring signal memory can be
read from the local control
panel.
3
PS 431 Time-Overcurrent Protection Device
Design
Mechanical Design
The PS 431 consists of an
aluminum case with reversi-
ble connector blocks and
adjustable side brackets.
The case can be used for
wall surface mounting or for
panel flush mounting, as
desired. In either case the
unit is connected by
threaded terminal ends.
The processor module car-
rying the local control panel
is mounted directly on the
rear of the removable front
panel. It is connected to the
combined I/O (input/output)
module by a flat connecting
cable. The I/O module con-
tains the voltage supply, the
input transformers, the output
relays, and the optical coup-
lers for the binary inputs.
In the front panel are win-
dows for the display and
label strips located behind
them. The keyboard for the
integrated local control panel
is also located in the front
panel.
Figure 4 on Page 10 shows
the case and mounting
dimensions.
4
Local Contr ol Panel
Control
The integrated local control
panel comprises two 4-digit,
7-segment LCD displays and
six function keys. The set-
tings, signals and measured
variables are numerically
coded. This code is called
the address and is displayed
in the lower 4-digit 7-segment
display. Access barriers
safeguard against accidental
or unauthorized changing of
settings.
Eight LED indicators are
provided for visual signaling.
The first two have permanent
signal assignments, while the
other six can be configured
as desired (see Page 9).
The control panel has two
label strips. The strip on the
left is used to label the LED
indicators, and the strip on
the right provides a visual
record of frequently
performed control steps.
Both strips can be replaced
and labeled by the user as
desired.
3 Local control panel
PS 431 Time-Overcurrent Protection Device
Technical Data
Notices
Manufacturer’s Conformity Statement
The product designated as ”PS 431
Time-Overcurrent Protection Device”
has been developed and manufac-
tured in conformity with the interna-
tional standard series EN 60255-6
and in accordance with the provisions
of the Low Voltage Directive issued
by the European Community.
Membership in ALPHA
AEG and the company that manufac-
tures our measurement and protective
relays, Hartmann & Braun, are
members of the low-voltage equip-
ment testing and certification associa-
tion called ALPHA (Frankfurt am
Main, Germany). ALPHA promotes
independent responsibility on the part
of the manufacturer and the assur-
ance of high product quality through
basic process specifications for
equipment inspection and testing in
compliance with applicable stand-
ards. When certain conditions are
met, ALPHA also issues officially
recognized product certificates if
required. Furthermore, ALPHA is
working toward international recogni-
tion of conformity declarations and
certificates.
DQS Certificate
The internationally recognized,
independent and impartial associa-
tion for the certification of quality
assurance systems, DQS (Deutsche
Gesellschaft zur Zertifizierung von
Qualitätssicherungssystemen), has
awarded AEG the DQS certificate,
thereby certifying that AEG has
introduced and uses a state-of-the-art
quality assurance system that
complies with all requirements stated
in EN ISO 9001 that apply to its
products and services.
General Data
Design
Case suitable for wall surface
mounting or panel flush mounting.
Installation Position
Vertical ± 30°
Degree of Protection
IP 51 according to DIN VDE 0470
and EN 60259 or IEC 529
Weight
3.4 kg
Dimensions
See Page 10
Terminal Connection Diagram
See Page 10
PC Interface
DIN 41652 connector, type
Submin-D, 9-pin.
A special connecting cable is
required for electrical isolation.
Terminals
Threaded terminal ends M4,
self-centering with wire protection for
conductor cross-sections of 0.5 to
6 mm2 or 2 x 2.5 mm2
Creepage Distances and Clearances
Per IEC 255-5, series C
Type Tests Type Tests (continued)
All tests according to EN 60255-6 Insulation
and DIN 57435 Teil 303
Voltage test
According to IEC 255-5
Electromagnetic Compatibility
2 kV AC, 60 s
(EMC)
For the voltage test of the power
Interference suppression supply inputs, direct voltage
According to EN 55022 and (2.8 kV DC) must be used.
DIN VDE 0878 Part 3, class B The PC interface must not be subject-
ed to the voltage test.
1 MHz burst disturbance test
According to IEC 255 Part 22-1, Impulse voltage withstand test
class III According to IEC 255-5
Common mode test voltage: 2.5 kV Front time: 1.2 µs
Differential test voltage: 1.0 kV Time to half-value: 50 µs
Test duration: > 2 s Peak value: 5 kV
Source impedance: 200 Ω Source impedance: 500 Ω
Immunity to electrostatic discharge
Mechanical Robustness
According to EN 60801 Part 2,
severity level 3 Vibration test
Contact discharge, According to IEC 255-21-1,
Single discharges: > 10 test severity class 1
Holding time: > 5 s Frequency range, in operation:
Test voltage: 6 kV 10 to 60 Hz, 0.035 mm,
Test generator: 60 to 150 Hz, 0.5 g
50 to 100 MW, 150 pF/330 Ω Frequency range, during transport:
10 to 150 Hz, 1 g
Immunity to radiated electromagnetic
energy Shock response and withstand test,
According to ENV 50140, level 3 bump test
Antenna distance to tested device: According to IEC 255-21-2,
> 1 m on all sides test severity class 1
Test field strength, frequ. band Acceleration: 5 g/15 g
80 to 1000 MHz: 10 V/m Pulse duration: 11 ms
Test using AM: 1 kHz / 80 %
Seismic test
Single test at 900 MHz:
According to EN 60255-21-3, test
AM 200 Hz /100 %
procedure A, class 1
Electrical fast transient / burst 5 to 8 Hz, 3.5/1.5 mm,
requirements 8 to 35 Hz, 10/5 m/s2
According to IEC 801-4, test severity 3 × 1 cycle
level 3
Rise time of one pulse: 5 ns
Impulse duration (50% value): 50 ns Routine Tests
Amplitude: 2 kV / 1 kV
Burst duration: 15 ms
All tests according to EN 60255-6
Burst period: 300 ms
and DIN 57 435 Part 303
Source impedance: 50 Ω
Surge immunity test Additional thermal test
According to IEC 1000-4-5, 100 % controlled thermal endurance
test level 3 test, inputs loaded
Testing of power supply circuits,
unsymmetrically / symmetrically
operated lines
Open-circuit voltage front time / time Environmental
to half-value: 1.2 / 50 ms Conditions
Short-circuit current front time / time
to half-value: 8 / 20 ms
Allowable ambient temperatures
Amplitude: 1 / 2 kV
Operating temp.: – 5 °C to + 55 °C
Pulse frequency: > 5 / min
Storage temp.: – 25 °C to + 55 °C
Source impedance: 12 / 42 Ω
Shipping temp.: – 25 °C to + 70 °C
Immunity to conducted disturbances
Ambient humidity range
induced by radio frequency fields
Relative humidity to preclude any
According to IEC 65A/
condensation;
77B (Sec) 145/110, test level 2
45 to 75 % (annual mean)
Disturbing test voltage: 3 V
Power frequency magnetic field
immunity
According to EN 61000-4-8, level 4
Frequency: 50 Hz
Test field strength: 30 A/m
Alternating component (ripple) in d.c.
auxiliary energizing quantity of
measuring relays
According to IEC 255-11
12%
5
PS 431 Time-Overcurrent Protection Device
Technical Data
(continued)

Inputs and Outputs Information Output Settings

Measurement Inputs Operating Data Measurement Global Function Parameters Definite-Time Overcurrent
Protection (DTOC)
Current Max. phase current Increments General Starting
Nominal current I nom: I P,max: 0.00-18.00 I nom 0.01 without I N> or IN>> Phase Current
1 and 5 A (terminal choice) with IN> or IN>>
Phase currents Threshold operate value I>: Increments:
Nominal consumption per phase: I A: 0.00-18.00 Inom 0.01 Trip Command 1/2 0.4-4.0 Inom 0.1
< 0.3 VA at Inom I B: 0.00-18.00 Inom 0.01 tI>
Delay time tI>: Increments:
I C: 0.00-18.00 I nom 0.01 tI> CBF
Load rating: 0.00-9.99 s 0.01
tI> tIN>
continuous: 4 Inom Residual current 10.0-99.9/∞ s 0.1
tI> tIN> CBF
for 10 s: 30 Inom I N: 0.00-3.50 Inom 0.01
tI> tI>> Threshold operate value I>>: Increments:
for 1 s: 100 Inom
tI> tI>> CBF 0.4-40.0/∞ Inom 0.1
Event Counting
Frequency tI> tI>> tIN>
Delay time tI>>: Increments:
Nominal frequency f nom: Number of trip commands: tI> tI>> tIN> CBF
0.00-9.99 s 0.01
50 or 60 Hz 0 to 9999
Latching 1/2
Number of faults: 0 to 9999 Residual Current
Operating range: without latching
45 to 65 Hz
– CBF Threshold operate value IN>: Increments:
Fault Data Acquisition
tIN> 0.05-2.00/∞ Inom 0.05
Increments
Binary Signal Inputs tIN> CBF
Running time: Delay time tI N>: Increments:
tI>>
Equipment: 0.00-99.99 s 0.01 0.00-9.99 s 0.01
tI>> CBF
2 optical coupler inputs (freely Short-circuit current: 10.0-99.9/∞ s 0.1
tI>> tIN>
configurable) 0.00-36.00 I nom 0.01
tI>> tIN> CBF Threshold operate value IN>>:Increments:
Function assignment: tI> 0.10-8.00/∞ Inom 0.05
Fault Logging
see Page 9 tI> CBF
Delay time tI N>>: Increments:
Up to 5 faults are stored, then the tI> tIN>
Nominal V In,nom : 0.00-9.99 s 0.01
oldest fault is erased. tI> tIN> CBF
24-250 V DC 10.0-99.9/∞ s 0.1
tI> tI>>
Operating range: Up to 64 signals per fault can be tI> tI>> CBF
Inverse Definite Minimum Time
0.8-1.1 VIn,nom with a residual ripple of stored, subsequent signals trigger the tI> tI>> tIN>
Overcurrent Protection (IDMT)
up to 12% of V In,nom overflow indication. tI> tI>> tIN> CBF
Phase Current
Power consumption per input: Trip Command 2/2
35 mA ± 30% at V In, nom = 24 V DC without tIN>> Base current IB : Increments:
15 mA ± 30% at V In,nom = 48 V DC with tIN>> 0.40-4.00 Inom 0.01
4 mA ± 30% at VIn,nom = 60-250 V DC
Latching 2/2 Characteristic factor: Increments:
without latching at tIN>> 0.10-1.00 Inom 0.05
Output Relays
with latching at tIN>>
Characteristic type:
Equipment:
Blocking E1 Normally inverse
4 output relays (freely configurable)
without block Very inverse
Function assignment: tIN>> Extremely inverse
see Page 9 tIN> Long time ground fault
tIN> tIN>> RI inverse
Contact rating
tI>>
Threshold operate value I>>: Increments:
Rated voltage: tI>> tIN>>
0.4-40.0/∞ Inom 0.1
300 V DC, 250 V AC tI>> tIN>
tI>> tIN> tIN>> Delay time tI>>: Increments:
Continuous current: 5 A
tI> 0.00-9.99 s 0.01
Short-time current: tI> tIN>>
Residual Current
30 A for 0.5 s tI> tIN>
tI> tIN> tIN>> Base current I NB or
Making capacity:
tI> tI>> Threshold operate value I>: Increments:
1000 W (VA) at L/R = 40 ms
tI> tI>> tIN>> 0.04-0.40/∞ Inom 0.01
Breaking capacity: tI> tI>> tIN> 0.08-0.80/∞ Inom 0.01
0.2 A at 220 V DC and tI> tI>> tIN> tIN>>
Characteristic factor: Increments:
L/R = 40 ms
Blocking E2 0.10-1.00 Inom 0.05
4 A at 230 V AC and cos ϕ = 0.4
See selection for blocking E1
Characteristic type:
Local Control Panel Mode for Current Timer Stages Normally inverse
Definite-time-lag (DTOC) Very inverse
Input or output of protection data:
Inverse-time-lag (IDMT) Extremely inverse
via six keys and two 4-digit displays
Long time ground fault
State and fault signals: RI inverse
8 LED indicators
Delay time tI N>: Increments:
(2 permanently assigned,
0.00-9.99 s 0.01
6 freely configurable)
10.0-99.9/∞ s 0.1
Function assignment:
Threshold operate value IN>>: Increments:
see Page 9
0.10-8.00/∞ Inom 0.05
PC Interface Delay time tI N>>: Increments:
0.00-9.99 s 0.01
Transmission speed:
10.0-99.9/∞ s 0.1
4800 baud
A special PC connecting cable is
required for connecting to a PC
(see Page 12).

6
PS 431 Time-Overcurrent Protection Device
Technical Data
(continued)

Settings (continued) Typical Characteristic Deviations Power Supply

Circuit Breaker Failure
Protection
tCBF: 0.00-9.99/∞ s; increments: 0.01
Measuring-Circuit Monitoring
Mode:
without
IA , IB
IA , IB , I C
Imcm >: 0.25-0.50 IPmax; increments: 0.05
tmcm: 0.00-9.99s; increments: 0.01
0.0-99.9/∞ s; increments: 0.1
Data
Time-Overcurrent Protection 1) Nominal auxiliary voltage VA,nom:
Reset time 24-60 V DC and (internally switcha-
Threshold Operate Values, Phase-
from 2-fold threshold operating value ble) 110-250 V DC / 100-230 V AC 3)
Current Stages
to 0: Deviation when I < 0.2 Inom: ± 15% Operating range for direct voltage:
≤ 25 ms Deviation when I ≥ 0.2 I nom: ± 5% 0.8 to 1.1 Vnom
Resetting ratio: Variation at 20°C ± 20 K: ± 2.5% with a residual ripple of
≥ 0.95 Variation at V A,nom ± 20%: ± 1% up to 12% of V A,nom
Variation at f nom ± 5%: ± 5%
Minimum output pulse for trip com- For alternating voltage:
mand: Threshold Operate Values, Residual 0.9-1.1 V A,nom
100 ms Current Stages
Nominal consumption:
Deviation: ± 5%
approx. 5 W at VA = 220 V DC
Variation at 20°C ± 20 K: ± 2.5%
Variation at V A,nom ± 20%: ± 1%
Variation at f nom ± 5%: ± 5%
Delay Time of Definite-Time-Delayed
Stages
Deviation: ± 1% or ± 30 ms
Variation at 20°C ± 20 K: ± 1%
Delay Time of Inverse-Time-Delayed
Stages
Deviation: ± 7.5%
Variation at 20°C ± 20 K: ± 2.5%
Variation at V A,nom ± 20%: ± 1%
Variation at f nom ± 5%: ± 5%

Operating Data Measurement2)

Currents IA , I B, I C, IN each > 0.4 I nom
Deviation: ± 5%
Variation at 20°C ± 20 K: ± 2.5%
Variation at V A,nom ± 20%: ± 1%
Variation at f nom ± 5%: ± 5%

Fault Data Acquisition2)

Short-circuit current > 0.4 Inom :
Deviation: ± 5%
Variation at 20°C ± 20 K: ± 2.5%
Variation at V A,nom ± 20%: ± 1%
Variation at f nom ± 5%: ± 5%

1)
Deviations referred to the set value
with sinusoidal measured variables,
total harmonic distortion ≤ 2%,
ambient temperature 20°C, and
nominal auxiliary voltage V A,nom
2)
Deviations referred to the
respective nominal value with
3)
sinusoidal measured variables, V A,nom = 230 V AC only for units with
total harmonic distortion ≤ 2%, a corresponding indication on the
ambient temperature 20°C, and type identification label (beginning
nominal auxiliary voltage V A,nom with hardware version 302)

7
PS 431 Time-Overcurrent Protection Device
Signal List
Signal Inputs
The signal inputs allow inter-
vention in the Protection
sequence. Each input can be
set for one of the signals
given in Table 1. However, a
given signal may be as-
signed to only one input. The
signal names refer to the
”active” state of the input
signal. Each input can be set
as follows:
active = low signal or
active = high signal.
8
LED Indicators
Two LED indicators on the
local control panel have
permanently assigned sig-
nals (Table 2a). The other six
LED indicators are freely
configurable and can be
assigned any of the signals
listed in Table 2b.
Output Relays Abbreviations for
Function Groups
The output relays are freely CBF: Circuit breaker
configurable and can be failure protection
assigned any of the signals
listed in Table 3. Any signal DTOC: Definite-time
can also be assigned to more overcurrent
than one free output relay for protection
contact multiplication purpo- IDMT: Inverse definite
ses. minimum time
overcurrent
All relays are operated in an protection
energize-on-signal arrange-
ment (‘open-circuit function’, MAIN: Main function
the make contact is closed MON: Self-monitoring
when the signal is present)
except for the case where an
output relay is configured for
the signal ”MAIN: Blocked/
faulty.” In this case the relay
operates in an normally-
energized arrangement
(‘closed-circuit function’) and
the break contact is closed
for the blocked/faulty conditi-
on.
PS 431 Time-Overcurrent Protection Device
Signal List
(continued)

Table 1: Table 2a: Table 2b: Table 3:

Freely Configurable Signal Permanently Configured LED Freely Configurable LED Freely Configurable Output
Inputs Indicators Indicators Relays
Input Func- Signal Indi- Func- Signal Indi- Func- Signal Re- Func- Signal
tion cator tion cator tion lays tion
Group Group Group Group
U1 Without function H1 MON: Warning H3 Without function K1 Without function
U2 MAIN: Block outp. rel. EXT H2 MAIN: Blocked/faulty H4 MAIN: Trip command K2 MAIN: Trip command
E1 block. EXT H5 E1 block. EXT K3 Blocked/faulty
E2 block. EXT E2 block. EXT IDMT/
H6 K4
Reset latch. + indic. IDMT/ DTOC: Starting I> or Iref>
Reset latch. EXT H7 DTOC: Starting I> or Iref> Starting I>>
Reset indicat. EXT H8 Starting I>> Starting GF
CBF: Input EXT Starting A Gen. starting
Starting B tI>> elapsed
Starting C tI> or tI>>
Starting GF tIN> elapsed
Gen. starting tIN>> elapsed
tI>> elapsed tIN> or tIN>>
tI> or tI>> tIref elapsed inv.
tIN> elapsed tINref elapsed inv.
tIN>> elapsed
tIN> or tIN>> CBF: tCBF elapsed
tIref elapsed inv.
tINref elapsed inv. MON: tmcm
Warning
CBF: Input EXT
tCBF elapsed DTOC: tI> elapsed def.
MON: tmcm
DTOC: tI> elapsed def.

9
PS 431 Time-Overcurrent Protection Device
Dimensional Drawing and Terminal Connection Diagram

4 Dimensional drawing and panel cutout

20.6
20.6
Æ 6.4
19 X3 X3 36

F PS 431

x y
294.2

254

294.2
299

256 +1
281 +1
E R

279
289
309

300
X6
!

1 X1 X1 18

48.6 65.6 +
6.4 9 125 - 0.5

11800.DS4
+ 0.5
125 93 162.5 -
175.6 172
Surface-mounting Surface-mounting Flush-mounting Panel cut-out and mounting frame outline

5 Terminal connection diagram

Power Supply LED

Indicators
X1
L+ 13 H1 MON: Warning
Aux. voltage VA 2)
L– 14 U100 H2 MAIN: Blocked/Faulty

H3 IDMT/DTOC: Starting A 1)

H4 IDMT/DTOC: Starting B 1)
Meas. Inputs H5 IDMT/DTOC: Starting C 1)
X1 H6 IDMT/DTOC: Starting GF 1)
A1 1 (1 A)
A2 2 (5 A) T1 H7 IDMT/DTOC: tI> V tI>> 1)
A3 3
B1 4 (1 A) H8 IDMT/DTO C: tIN> V tIN>> 1)
B2 5 (5 A) T2
B3 6
C1 7 (1 A)
C2 8 (5 A) T3
C3 9
N1 10 (1 A)
N2 11 (5 A) T4
N3 12

Signal Inputs Output Relays

X3
X1 36
MAIN: Reset latch.+indic. 1) L+ 15 35 MAIN: Trip command 1)
L– 16 U1 K1 33
MAIN: Block. outp. rel. EXT 1) L+ 17 32
L– 18 U2 34
31
30 IDMT/DTOC: Gen. starting 1)
PC Interface K2 28
27
29
1) Freely configurable (see signal list on X6 26
page 9); signals as per factory setting D1 2 25 1)

are entered in the diagram

1)
D2 3 K3 23
E2 5 22
24
2) L+ und L- circuit may be tested only 20
K4 19 Main: Blocked/Faulty 1)
11801.DS4

with 2.8 kV DC to ground

PS 431 21
3) Internal interface, voltage test is
prohibited

10
PS 431 Time-Overcurrent Protection Device
Connection Example

6 PS 431 connection example

A
B
C Power Supply LED
Indicators
X1
L+ 13 H1
Aux. voltage VA 2)
L– 14 U100 H2

H3

H4
Meas. Inputs H5
X1 H6
A1 1 (1 A)
A2 2 (5 A) T1 H7
A3 3
B1 4 (1 A) H8
B2 5 (5 A) T2
B3 6
C1 7 (1 A)
C2 8 (5 A) T3
C3 9
N1 10 (1 A)
N2 11 (5 A) T4
N3 12

Signal Inputs Output Relays

X3
X1 36
L+ 15 35
L– 16 U1 K1 33
L+ 17 32
L– 18 U2 34
31
30
PC Interface K2 28
27
29
X6 26
D1 2 25
1) D2 3 K3 23
E2 5 22
24
20
K4 19
11801.DS4

11802.ds4

PS 431 21

11
PS 431 Time-Overcurrent Protection Device
Ordering Information
Numerical time-overcurrent protection
device with inverse-time and definite-
time characteristics
Case for panel surface or flush
mounting
4-pole measurement (A, B, C, N)
User-selection of IDMT or DTOC mode
Phase-selective overcurrent timer
stage and starting signals
Time-lag high set phase current and
high set residual current stages
Tripping matrix
Optional latching of individual
tripping criteria
Circuit breaker failure protection
Option of reverse interlocking
Measuring circuit monitoring
Operating data measurement
Event counting
Fault data acquisition
Fault logging
Comprehensive self-monitoring
2 signal inputs (freely configurable)
4 output relays (freely configurable)
Integrated local control panel
8 LED indicators (6 freely configurable)
PC interface
AEG Energietechnik GmbH AEG Starkstromanlagen Dresden GmbH
Bereich Schutz- und Schaltanlagenleittechnik Bereich Schutz- und Schaltanlagenleittechnik
System Protection and Control System Protection and Control
Lyoner Straße 44-48 Königsbrücker Straße 124
D-60528 Frankfurt D - 01099 Dresden
P.O. Box 71 01 07 P.O. Box 10 03 60
D-60491 Frankfurt D-01073 Dresden
Phone +49 69 6632 1521 Phone +49 351 820 3360
Fax +49 69 6632 2548 Fax +49 351 820 3366
Designs Order No. Extension No.
(append to order no.)
PS 431
Wall-mounting case with 36 terminals
for wall surface mounting 89431-0- 1 1 2 3 3 1 0
for panel flush mounting with cover frame 89431-0- 2 1 2 3 3 1 0
Nominal current Inom : Phase current inputs 1 A, residual current input 5 A
Nominal frequency fnom : 50 Hz and 60 Hz
Nominal auxiliary voltage for power supply V A,nom:
24-60 V DC and 110-250 V DC or 100-230 V AC 1)
Nominal auxiliary voltage for signal inputs V In,nom:
24-250 V DC
Additional Options
Labeling and documentation in English -598
Accessories
PC connecting cable (2.5 m) 255 002 096
FPCC parameter setting program 251 254 271
1) Range selection via plug-in jumper, factory setting underlined.
Subject to modifications · Printed in Germany
SLTS.06.04185PDF/0597EN · Ti