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August 2004
FDS7088SN3
30V N-Channel PowerTrench SyncFET™
General Description Features
The FDS7088SN3 is designed to replace a single SO-8 • 21 A, 30 V RDS(ON) = 4.0 mΩ @ VGS = 10 V
FLMP MOSFET and Schottky diode in synchronous
DC:DC power supplies. This 30V MOSFET is designed RDS(ON) = 4.9 mΩ @ VGS = 4.5 V
to maximize power conversion efficiency, providing a
low RDS(ON) and low gate charge. The FDS7088SN3 • High performance trench technology for extremely
includes an integrated Schottky diode using Fairchild’s low RDS(ON)
monolithic SyncFET technology. The performance of
the FDS7088SN3 as the low-side switch in a • High power and current handling capability
synchronous rectifier is close to the performance of the
FDS7088N3 in parallel with a Schottky diode.
• Fast switching
Applications • FLMP SO-8 package: Enhanced thermal
• DC/DC converter performance in industry-standard package size
• Motor drives
Bottom-side
Drain Contact
5 4
6 3
7 2
8 1
Thermal Characteristics
RθJA Thermal Resistance, Junction-to-Ambient (Note 1a) 40 °C/W
RθJC Thermal Resistance, Junction-to-Case (Note 1) 0.5 °C/W
Off Characteristics
Drain–Source Breakdown
BVDSS VGS = 0 V, ID = 1 mA 30 V
Voltage
∆BVDSS Breakdown Voltage Temperature
ID = 15 mA, Referenced to 25°C 28 mV/°C
∆TJ Coefficient
IDSS Zero Gate Voltage Drain Current VDS = 24 V, VGS = 0 V 500 µA
IGSS Gate–Body Leakage VGS = ±20 V, VDS = 0 V ±100 nA
On Characteristics (Note 2)
VGS(th) Gate Threshold Voltage VDS = VGS, ID = 1 mA 1 1.5 3 V
∆VGS(th) Gate Threshold Voltage ID = 15 mA, Referenced to 25°C
–3 mV/°C
∆TJ Temperature Coefficient
RDS(on) Static Drain–Source VGS = 10 V, ID = 21 A 3.4 4.0 mΩ
On–Resistance VGS = 4.5 V, ID = 19 A 4.0 4.9
VGS = 10 V, ID = 21 A, TJ = 125°C 5
gFS Forward Transconductance VDS = 10 V, ID = 21 A 85 S
Dynamic Characteristics
Ciss Input Capacitance VDS = 15 V, V GS = 0 V, 3230 pF
Coss Output Capacitance f = 1.0 MHz 890 pF
Crss Reverse Transfer Capacitance 300 pF
RG Gate Resistance VGS = 15 mV, f = 1.0 MHz 1.6 Ω
Notes:
1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design.
DRAIN-SOURCE ON-RESISTANCE
6.0V 1.8
ID, DRAIN CURRENT (A)
4.5V
RDS(ON), NORMALIZED
40 1.6
3.5V
1.4
4.0V
20 1.2 4.5V
2.5V 5.0V
6.0V
1 10V
0 0.8
0 0.25 0.5 0.75 1 0 10 20 30 40 50 60
VDS, DRAIN-SOURCE VOLTAGE (V) ID, DRAIN CURRENT (A)
1.6 0.012
ID = 21A
VGS = 10V ID = 10.5A
DRAIN-SOURCE ON-RESISTANCE
1.2 0.008
o
TA = 125 C
1 0.006
0.8 0.004
o
TA = 25 C
0.6 0.002
-50 -25 0 25 50 75 100 125 2 4 6 8 10
o
TJ, JUNCTION TEMPERATURE ( C) VGS, GATE TO SOURCE VOLTAGE (V)
60 100
VDS = 5V
IS, REVERSE DRAIN CURRENT (A)
50 10
ID, DRAIN CURRENT (A)
o
TA = 125 C
40 1
o
25 C
30 0.1 o
o -55 C
TA =125 C o
-55 C
20 0.01
10 0.001
25oC
0 0.0001
1.5 1.75 2 2.25 2.5 2.75 3 0 0.2 0.4 0.6 0.8 1
VGS, GATE TO SOURCE VOLTAGE (V) VSD, BODY DIODE FORWARD VOLTAGE (V)
8 4000
VDS = 10V
CAPACITANCE (pF)
20V
6 3000
Ciss
15V
4 2000
Coss
2 1000
Crss
0 0
0 10 20 30 40 50 60 0 5 10 15 20
Qg, GATE CHARGE (nC) VDS, DRAIN TO SOURCE VOLTAGE (V)
1000 50
RDS(ON) LIMIT SINGLE PULSE
1ms
10ms
10 100ms 30
1s
10s
DC
1 20
VGS = 10V
SINGLE PULSE
0.1 RθJA = 85oC/W 10
o
TA = 25 C
0.01
0
0.01 0.1 1 10 100 0.01 0.1 1 10 100 1000
VDS, DRAIN-SOURCE VOLTAGE (V) t1, TIME (sec)
Figure 9. Maximum Safe Operating Area. Figure 10. Single Pulse Maximum
Power Dissipation.
1.00
r(t), NORMALIZED EFFECTIVE TRANSIENT
D = 0.5
0.10 0.1
0.05
P(pk)
0.02
t1
0.01 t2
0.01
TJ - TA = P * RθJA(t)
Duty Cycle, D = t1 / t2
SINGLE PULSE
0.00
0.0001 0.001 0.01 0.1 1 10 100 1000
t1, TIME (sec)
TA = 100oC
0.001
0.08A/div
0.0001
TA = 25oC
0.00001
0 5 10 15 20 25 30
VDS, REVERSE VOLTAGE (V)
12.5 nS/div
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY
PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY
ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT
CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.
No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Rev. I11