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Compal Confidential
2 2

NAV50/60 Schematics Document


Intel Pineview Processor with Tigerpoint + DDRII

3
2010-05-11 3

REV: 3.0

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2006/08/18 2007/8/18 Title
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATICS, MB A5651
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401793 D
Date: Friday, May 21, 2010 Sheet 1 of 32
A B C D E
A B C D E

Clock Generator
Compal Confidential CK505 page 8

Model Name : NAV50/60


File Name : LA-5651P CRT Conn
page 10
1 ZZZ 1

RGB
Memory BUS(DDRII) DDRII-SO-DIMM
PCB
Pineview page 7

DA60000E420 FCBGA 559 1.8V DDRII 667


LCD Conn. LVDS
page 9 22x22mm
Thermal Sensor page 4,5,6
EMC1402
page 5
DMI
X2 mode
GEN1

USB USB Port X2


2 2
PCI-Express Tigerpoint HDA page 20

PCBGA360 BlueTooth
page 15
17x17mm
17m
7m SATA
page 11,12,13,14
CMOS CAM
To I/O Board page 9
MINI Card x1 To I/O Board
10/100 Ethernet HDD
3G WLAN AR8132L page 16 3G
page 15 page 20 page 20
page 15

LPC BUS
fe
Transfermer USB Port x1
To I/O Board Conn.
3 3
page 20
Conn. to I/O Board
Aralia Codec
ALC272 page 20
To I/O board
Power ON/OFF RJ45
4
DC/DC Interface Card Reader
page 25
I/O Board ENE6252
page 18
3VALW/5VALW ENE KBC SPI page 20
page 26
DC IN
page 23
KB926page 17
0.89VP/1.5VP
AMP & INT INT MIC HeadPhone & SD/MMC/MS
BATT IN 0.9VSP/2.5VSP MIC Jack
page 24 page 28 Speaker CONN
Int.KBD SPI ROM
page 19 page 17
CHARGER 1.8V/VCCP Touch Pad I/O Board
page 25
4
page 27 page19 4

CPU_CORE
page 29
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2006/08/18 2007/8/18 Title
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATICS, MB A5651
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401793 D
Date: Friday, May 21, 2010 Sheet 2 of 32
WWW.AliSaler.Com A B C D E
A B C D E

1 1

Voltage Rails External PCI Devices


Power Plane Description S1 S3 S5 DEVICE IDSEL # REQ/GNT # PIRQ
VIN Adapter power supply (19V) N/A N/A N/A
B+ AC or battery power rail for power circuit. N/A N/A N/A No PCI Device
+CPU_CORE Core voltage for CPU ON OFF OFF
+0.9VS 0.9V switched power rail for DDR terminator ON OFF OFF
+VCCP VCCP switched power rail ON OFF OFF
+1.5VS 1.5V switched power rail ON OFF OFF
+1.8V 1.8V power rail for DDR ON ON OFF
+0.89V Graphic core power rail ON OFF OFF
+3VALW 3.3V always on power rail ON ON ON*
+3VS 3.3V switched power rail ON OFF OFF
+5VALW 5V always on power rail ON ON ON*

2
+5VS 5V switched power rail ON OFF OFF 2

+VSB VSB always on power rail ON ON ON*


+RTCVCC RTC power ON ON ON EC SM Bus1 address EC SM Bus2 address
Device
vi
vi Address Device Address
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF. Smart
rt Battery 0001 011X b EMC1402 100_1100

SIGNAL
STATE SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock

Full ON HIGH HIGH HIGH ON ON ON ON

S1(Power On Suspend) HIGH HIGH HIGH ON ON ON LOW

S3 (Suspend to RAM) LOW HIGH HIGH ON ON OFF OFF

S4 (Suspend to Disk) LOW LOW HIGH ON OFF OFF OFF

S5 (Soft OFF) LOW LOW LOW ON OFF OFF OFF

3 ICH7M SM Bus address 3

BOARD ID Table(Page 17) Device Address

Clock Generator 1101 001Xb


VCC 3.3V (SLG8SP556VTR)

Ra 100K DDR DIMMA 1010 000Xb

ID BRD ID Rb Vab-Min Vab-Typ Vab-Max


-Ma
Ma
0 R01 (EVT) 0 0V 0V 0V
1 R02 (DVT) 8.2K 0.216V 0.250V 0.289V
0
NAV50
2 R03 (PVT) 18K 0.436V 0.503V 0.538V
0
3 R10A (MP) 33K 0.712V 0.819V 0 .8
0.875V
4 R01 (EVT) 56K 1.036V 1.185V 1.264V
264
64
5 R02 (DVT) 100K 1.453V 1.650V 1.759V9V
9V
NAV60
6 R03 (PVT) 200K 1.935V 2.200V 2.341V
7 R10A (MP) NC 2.500V 3.3V 3.3V

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2006/08/18 2007/8/18 Title
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATICS, MB A5651
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401793 D
Date: Friday, May 21, 2010 Sheet 3 of 32
A B C D E
5 4 3 2 1

(7) DDR_A_DQS#[0..7]
PINEVIEW_M
PINEVIEW_M (7) DDR_A_D[0..63]
U71A U71B
REV = 1.1
(7) DDR_A_DM[0..7]
REV = 1.1 DDR_A_MA0 DDR_A_DQS0
AH19 DDR_A_MA_0 DDR_A_DQS_0 AD3
DMI_RX0_R (7) DDR_A_DQS[0..7] DDR_A_MA1 DDR_A_DQS#0
F3 DMI_RXP_0 DMI_TXP_0 G2 DMI_TX0 (13) AJ18 DDR_A_MA_1 DDR_A_DQS#_0 AD2
DMI_RX#0_R F2 G1 DMI_TX#0 (13) DDR_A_MA2 AK18 AD4 DDR_A_DM0
DMI_RX1_R DMI_RXN_0 DMI_TXN_0 (7) DDR_A_MA[0..14] DDR_A_MA3 DDR_A_MA_2 DDR_A_DM_0
H4 DMI_RXP_1 DMI_TXP_1 H3 DMI_TX1 (13) AK16 DDR_A_MA_3
DMI_RX#1_R G3 J2 DMI_TX#1 (13) DDR_A_MA4 AJ14 AC4 DDR_A_D0
DMI_RXN_1 DMI_TXN_1 DDR_A_MA5 DDR_A_MA_4 DDR_A_DQ_0 DDR_A_D1
AH14 DDR_A_MA_5 DDR_A_DQ_1 AC1
DDR_A_MA6 DDR_A_D2

DMI
AK14 DDR_A_MA_6 DDR_A_DQ_2 AF4
DDR_A_MA7 AJ12 AG2 DDR_A_D3
DDR_A_MA8 DDR_A_MA_7 DDR_A_DQ_3 DDR_A_D4
AH13 DDR_A_MA_8 DDR_A_DQ_4 AB2
D DDR_A_MA9 DDR_A_D5 D
AK12 DDR_A_MA_9 DDR_A_DQ_5 AB3
(8) CLK_CPU_EXP# N7 L10 DDR_A_MA10 AK20 AE2 DDR_A_D6
EXP_CLKINN EXP_RCOMPO R162 DDR_A_MA11 DDR_A_MA_10 DDR_A_DQ_6 DDR_A_D7
(8) CLK_CPU_EXP N6 EXP_CLKINP EXP_ICOMPI L9 AH12 DDR_A_MA_11 DDR_A_DQ_7 AE3
L8 R203 49.9_0402_1% DDR_A_MA12 AJ11
EXP_RBIAS 750_0402_1% DDR_A_MA13 DDR_A_MA_12 DDR_A_DQS1
R10 EXP_TCLKINN AJ24 DDR_A_MA_13 DDR_A_DQS_1 AB8
R9 N11 DDR_A_MA14 AJ10 AD7 DDR_A_DQS#1
EXP_TCLKINP RSVD_TP T38 DDR_A_MA_14 DDR_A_DQS#_1
N10 P11 AA9 DDR_A_DM1
RSVD RSVD_TP T39 Must be placed within 500 mils from Pineview-M pins DDR_A_DM_1
N9 RSVD DDR_A_WE# AK22 AB6 DDR_A_D8
(7) DDR_A_WE# DDR_A_WE# DDR_A_DQ_8
DDR_A_CAS# AJ22 AB7 DDR_A_D9
(7) DDR_A_CAS# DDR_A_CAS# DDR_A_DQ_9
DDR_A_RAS# A
AK21 AE5 DDR_A_D10
(7) DDR_A_RAS# DDR_A_RAS# DDR_A_DQ_10
K2 K3 AG5 DDR_A_D11
RSVD RSVD DDR_A_BS0 DDR_A_DQ_11 DDR_A_D12
J1 RSVD RSVD L2 (7) DDR_A_BS0 AJ2
AJ
AJ220
2
AJ200 DDR_A_BS_0 DDR_A_DQ_12 AA5
M4 M2 DDR_A_BS1 AH20
H220
20 AB5 DDR_A_D13
RSVD RSVD (7) DDR_A_BS1 DDR_A_BS_1
D DDR_A_DQ_13
L3 N2 DDR_A_BS2
R_A
_ AK11 AB9 DDR_A_D14
RSVD RSVD (7) DDR_A_BS2 DDR_A_BS_2
D
DD
D DDR_A_DQ_14
AD6 DDR_A_D15
DDR_A_DQ_15
1 OF 6 DDR_A_DQS2
PINEVIEW-M_FCBGA8559 DDR_A_DQS_2 AD8
DDR_CS#0
#0
#0 AH22
A
AH AD10 DDR_A_DQS#2
(7) DDR_CS#0 DDR_A_CS#_0
_A
_A DDR_A_DQS#_2
DDR_CS#1
1 AK2
AK2
K25
25
2
AK25 5 AE8 DDR_A_DM2
(7) DDR_CS#1 DDR_A_CS#_1
D
DD
D
DRR DDR_A_DM_2
JP16 21
AJ21
XDP_PREQ# CONN@ DDR_A_CS#_2
D
DD
DR DDR_A_D16
(5) XDP_PREQ# 1 1 AJ25 DDR_A_CS#_3
D DDR_A_DQ_16 AG8
(5) XDP_PRDY# XDP_PRDY# 2 AG7 DDR_A_D17
2 DD
DDR_CKE0
DD DDR_A_DQ_17 DDR_A_D18
3 3 (7) DDR_CKE0
CKKE0 AH10 DDR_A_CKE_0 DDR_A_DQ_18 AF10
(5) XDP_BPM#3 XDP_BPM#3 4 DDR_CKE1
DD
DR
DR AH9 AG11 DDR_A_D19
4 (7) DDR_CKE1
_C
CK
CK DDR_A_CKE_1 DDR_A_DQ_19
(5) XDP_BPM#2 XDP_BPM#2 5 AK10 AF7 DDR_A_D20
5 DDR_A_CKE_2 DDR_A_DQ_20 DDR_A_D21
6 6 AJ8 DDR_A_CKE_3 DDR_A_DQ_21 AF8
C435 DMI_RX0_R XDP_BPM#1 DDR_A_D22
(13) DMI_RX0 1 2 (5) XDP_BPM#1 7 7 DDR_A_DQ_22 AD11
0.1U_0402_10V7K (5) XDP_BPM#0 XDP_BPM#0 8 M_ODT0 AK24 AE10 DDR_A_D23
8 (7)
(7
7 M_
M_ODT0
M_ DDR_A_ODT_0 DDR_A_DQ_23
9 M_ODT1 AH26
C436 9 (7)
(7 M
(7 M_ODT1
_OO DDR_A_ODT_1
1 2 DMI_RX#0_R (5,13) H_PWRGD R354 1 @ 2 1K_0402_5% 10 AH24 AK5 DDR_A_DQS3
(13) DMI_RX#0 10 DDR_A_ODT_2 DDR_A_DQS_3
0.1U_0402_10V7K R347 1 @ 2 1K_0402_5% 11 AK27 AK3 DDR_A_DQS#3
C (13) SLPIOVR# 11 DDR_A_ODT_3 DDR_A_DQS#_3 C
(8) CPU_ITP 12 AJ3 DDR_A_DM3
C437 12 DDR_A_DM_3
(13) DMI_RX1 1 2 DMI_RX1_R (8) CPU_ITP# 13 13 DDR_A_D24
0.1U_0402_10V7K +VCCP 14 14 DDR_A_DQ_24 AH1
PLTRST# 1 R348 2 1K_0402_1% 15 M_CLK_DDR0
M AG15 AJ2 DDR_A_D25
C438 DMI_RX#1_R (5,13,15,17,20) PLTRST# 15 (7)
(7
7)
7) M_CLK_DDR0
M_ DD
DD DDR_A_CK_0 DDR_A_DQ_25
(13) DMI_RX#1 1 2 @ 16 M_CLK_DDR#0 AF15 AK6 DDR_A_D26
16 (7)
(7
7)
7) M_CLK_DDR#0
M
M_C
_CCLK_
CLK
CL K_DD
DDR
DR# DDR_A_CK_0# DDR_A_DQ_26
0.1U_0402_10V7K 17 M_CLK_DDR1 AD13 AJ7 DDR_A_D27
17 (7) M_CLK_DDR1
CLK DDR
CL DDRR1
R1 DDR_A_CK_1 DDR_A_DQ_27
(5) XDP_TDO XDP_TDO 18 M_CLK_DDR#1 AC13 AF3 DDR_A_D28
18 (7) M_CLK_DDR#1R#
#11 DDR_A_CK_1# DDR_A_DQ_28
(5) XDP_TRST# XDP_TRST# 19 AH2 DDR_A_D29
XDP_TDI 19 DDR_A_DQ_29 DDR_A_D30
Close to CPU (5) XDP_TDI 20 20 DDR_A_DQ_30 AL5
(5) XDP_TMS XDP_TMS 21 AC15 AJ6 DDR_A_D31
21 DDR_A_CK_3 DDR_A_DQ_31
22 22 AD15 DDR_A_CK_3#
23 AF13 AG22 DDR_A_DQS4
XDP_TCK 23 DDR_A_CK_4 DDR_A_DQS_4 DDR_A_DQS#4
(5) XDP_TCK 24 24 AG13 DDR_A_CK_4# DDR_A_DQS#_4 AG21
25 AD19 DDR_A_DM4
G1 DDR_A_DM_4
26 G2
AE19 DDR_A_D32
ACES_87151-24051 DDR_A_DQ_32 DDR_A_D33
+1.8V AD17 RSVD DDR_A_DQ_33 AG19
AC17 AF22 DDR_A_D34
RSVD DDR_A_DQ_34 DDR_A_D35
AB15 RSVD DDR_A_DQ_35 AD22
AB17 AG17 DDR_A_D36
RSVD DDR_A_DQ_36 DDR_A_D37
R369 DDR_A_DQ_37 AF19
+VCCP
+V
V AE21 DDR_A_D38
XDP Reservee 10K_0402_5% DDR_A_DQ_38
AD21 DDR_A_D39
DDR_A_DQ_39
XDP_TDI R341
1 1 2 51
51 +-1%
+ 0402 +1.8V +1.8V AE26 DDR_A_DQS5
DDR_A_DQS_5 DDR_A_DQS#5
AB4 RSVD DDR_A_DQS#_5 AG27
XDP_TMS R342
R
R34
R3
34 1 2 51 +-1%
+-1
+-1
1% 0402 AK8 AJ27 DDR_A_DM5
RSVD DDR_A_DM_5
1

R370
XDP_TDO R343
43
3 1 2 51 +-1% 0402
040
040
40
022 AE24 DDR_A_D40
R50 10K_0402_5% DDR_A_DQ_40 DDR_A_D41
DDR_A_DQ_41 AG25
XDP_PREQ#
EQ
EQ#
Q# R344 1 2 51 +-1% 0402
040
04
0400 @ T40 AB11 AD25 DDR_A_D42
1K_0402_1% RSVD_TP DDR_A_DQ_42 DDR_A_D43
T41 AB13 RSVD_TP DDR_A_DQ_43 AD24
B B
2

AC22 DDR_A_D44
DDR_A_DQ_44 DDR_A_D45
AL28 DDR_VREF DDR_A_DQ_45 AG24
1

R243 AK28 AD27 DDR_A_D46


XDP_TRST#
X
XDP
XD
DP TRST
ST#
ST#
T# R
R345 1 51 +-1% 0402 R242 80.6_0402_1% DDR_RPD DDR_A_DQ_46 DDR_A_D47
2 R142 AJ26 DDR_RPU DDR_A_DQ_47 AE27
+5VS 80.6_0402_1%
FAN1 Conn XDP_TCK
TCK R346
R3
346
346
6 1 2 51 +-1% 0402 AK29 AE30 DDR_A_DQS6
1K_0402_1% RSVD DDR_A_DQS_6 DDR_A_DQS#6
DDR_A_DQS#_6 AF29
2

Modify follow KAV60 schematic 06/12 AF30 DDR_A_DM6


DDR_A_DM_6
DDR_A AG31 DDR_A_D48
DDR_A_DQ_48 DDR_A_D49
DDR_A_DQ_49 AG30
AD30 DDR_A_D50
DDR_A_DQ_50 DDR_A_D51
+5VS Modify
di D38 D39 D40 Pin define 08/13 DDR_A_DQ_51 AD29
AJ30 DDR_A_D52

3
2
C312 2.2U_0603_10V6K DDR_A_DQ_52
XDP_TMS AJ29 DDR_A_D53
1 2 D19@ XDP_TCK DDR_A_DQ_53 DDR_A_D54
DDR_A_DQ_54 AE29
N21
21
2 1
DAN217_SC59 AD28 DDR_A_D55
3
2

XDP_PREQ# DDR_A_DQ_55
U12
XDP_TDO D38 AB27 DDR_A_DQS7
1 8 DDR_A_DQS_7 DDR_A_DQS#7
EN GND AA27

1
3
2

2 7 DDR_A_DQS#_7 DDR_A_DM7
+VCC_FAN1 VIN GND 1 2 C314 AB26
3 6 D39 DDR_A_DM_7
VOUT GND
(17) EN_FAN1 1 2 4 VSET GND 5 4.7U_0603_6.3V6K
6 3V
3V
V6K
6K
K DDR_A_D56
R47 330_0402_5% DDR_A_DQ_56 AA24
AB25 DDR_A_D57
APL5607KI-TRG_SO8 DDR_A_DQ_57
C313 1 2 XDP_TRST# W24 DDR_A_D58
XDP_TDI DDR_A_DQ_58 DDR_A_D59
W22
1

1 DDR_A_DQ_59
4.7U_0603_6.3V6K AB24 DDR_A_D60
3
2

C1151 DDR_A_DQ_60 DDR_A_D61


DDR_A_DQ_61 AB23
+3VS
0.01U_0402_16V7K C1150 D40 AA23 DDR_A_D62
1

2 1000P_0402_50V7K DDR_A_DQ_62 DDR_A_D63


DDR_A_DQ_63 W27
PJDLC05C_SOT23-3

PJDLC05C_SOT23-3

1 2

1
A R256 A
2 OF 6
10K_0402_5% PINEVIEW-M_FCBGA8559
40mil JP12 Add 2009-6-17

2
1

+VCC_FAN1 1 1
(17) FAN_SPEED1 2 2 G1 4
PJDLC05C_SOT23-3

3 3 G2 5
1 Security Classification Compal Secret Data
ACES_85204-03001 Compal Electronics, Inc.
C311 CONN@ 2006/08/18 2007/8/18 Title
Issued Date Deciphered Date
100P_0402_50V8J
2 SCHEMATICS, MB A5651
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401793 D
Date: Friday, May 21, 2010 Sheet 4 of 32
WWW.AliSaler.Com 5 4 3 2 1
5 4 3 2 1

Add 470PF on H_SMI# for known issue 07/08

PINEVIEW_M
U71C
C1171

T2 D12 XDP_RSVD_00 REV = 1.1 1 2


T12 A7 XDP_RSVD_01 CRT_HSYNC M30 GMCH_CRT_HSYNC (10)
T3 D6 M29 U71D PINEVIEW_M
XDP_RSVD_02 CRT_VSYNC GMCH_CRT_VSYNC (10) 470P_0402_50V7K
T4 C5 XDP_RSVD_03
T13 C7 XDP_RSVD_04 GMCH_CRT_R REV = 1.1
D T5 C6 N31 GMCH_CRT_R (10) H_SMI# D
XDP_RSVD_05 CRT_RED GMCH_CRT_G (9) LVDS_ACLK# U25 E7 H_SMI# (12)
T6 D8 P30 GMCH_CRT_G (10) LA_CLKN SMI# H_A20M#
R1378 XDP_RSVD_06 CRT_GREEN GMCH_CRT_B (9) LVDS_ACLK U26 H7 H_A20M# (12)
T7 B7 P29 GMCH_CRT_B (10) LA_CLKP A20M# H_FERR#
XDP_RSVD_07 CRT_BLUE (9) LVDS_A0# R23 H6 H_FERR# (12)
T14 A9 N30 LA_DATAN_0 FERR# H_INTR
XDP_RSVD_08 CRT_IRTN (9) LVDS_A0 R24 F10 H_INTR (12)
1 2 D9 LA_DATAP_0 LINT0 H_NMI
XDP_RSVD_09 N26 F11

VGA
C8 (9) LVDS_A1# LA_DATAN_1 LINT1 H_NMI (12)
T8 XDP_RSVD_10 N27 E5 H_IGNNE#
1K_0402_5% T15 B8 (9) LVDS_A1 LA_DATAP_1 IGNNE# H_IGNNE# (12)
XDP_RSVD_11 (9) LVDS_A2# R26 F8 H_STPCLK#
T9 C10 L31 LA_DATAN_2 STPCLK# H_STPCLK# (12)
XDP_RSVD_12 CRT_DDC_DATA GMCH_CRT_DATA (10) (9) LVDS_A2 R27

ICH
T16 D10 L30 GMCH_CRT_CLK (10) LA_DATAP_2
XDP_RSVD_13 CRT_DDC_CLK
T10 B11 XDP_RSVD_14 H_DPRSTP#
R201 665_0402_1% DPRSTP# G6 H_DPRSTP# (13)
T17 B10 XDP_RSVD_15 DAC_IREF P28 R151 H_DPSLP#
R22 LIBG DPSLP# G10 H_DPSLP# (13)
T11 B12 XDP_RSVD_16 2.37K_0402_1% H_INIT#
CPU_DREFCLK J28 LVBG INIT# G8 H_INIT# (12)
T28 C11 XDP_RSVD_17 REFCLKINP Y30 CPU_DREFCLK (8) XDP_PRDY#
CPU_DREFCLK# N22 LVREFH PRDY# E11 XDP_PRDY# (4)
REFCLKINN Y29 CPU_DREFCLK# (8) XDP_PREQ#
CPU_SSCDREFCLK N23 LVREFL PREQ# F15 XDP_PREQ# (4)
REFSSCLKINP AA30 CPU_SSCDREFCLK (8) GMCH_ENBKL
CPU_SSCDREFCLK# (17) GMCH_ENBKL L27 LBKLT_EN
REFSSCLKINN AA31 CPU_SSCDREFCLK# (8) (9,17) INVT_PWM L26 LBKLT_CTL

LVDS
0_0402_5% L23 E13 H_THERMTRIP#
T37 L11 R213 LCTLA_CLK THERMTRIP# H_THERMTRIP# (12)
RSVD @ K25
Add INVT_PWM 05/11 LCTLB_DATA
(9) LVDS_SCL K23 LDDC_CLK
0_0402_5% (9) LVDS_SDA K24
R200 LDDC_DATA
PM_EXTTS#1 (9) GMCH_ENVDD H26 LVDD_EN
PM_EXTTS#_1/DPRSLPVR K29 PM_DPRSLPVR (13) H_PROCHOT#
PM_EXTTS#0 PROCHOT# C18
PM_EXTTS#_0 J30 PM_EXTTS#0 (7) H_PWRGD
H_PWROK CPUPWRGOOD W1 H_PWRGD (4,13)
PWROK L5
AA3 PLTRST#
RSTIN# PLTRST# (4,13,15,17,20)

A13 H_GTLREF
W8 CLK_CPU_HPLCLK# GTLREF
HPL_CLKINN CLK_CPU_HPLCLK# (8) H27
W9 CLK_CPU_HPLCLK VSS
HPL_CLKINP CLK_CPU_HPLCLK (8) Del R323 05/11
C C

T18 AA7 RSVD_TP Modify 08/04


AA6

MISC
T19 RSVD_TP L6
T20 R5 RSVD
RSVD_TP E17
T21 R6 RSVD
RSVD_TP (4) XDP_BPM#0 G11 BPM_1_0# CLK_CPU_BCLK#
@ (4) XDP_BPM#1 E15 BPM_1_1# BCLKN H10 CLK_CPU_BCLK# (8)
T22 AA21 RSVD_TP R305 CLK_CPU_BCLK
H_PWROK (4) XDP_BPM#2 G13 BPM_1_2# BCLKP J10 CLK_CPU_BCLK (8)
T23 W21 RSVD_TP 1 2 VGATE (8,13,17,29)
(4) XDP_BPM#3 F13 BPM_1_3#
T24 T21 RSVD_TP 0_0402_5% CPU_BSEL0
BSEL_0 K5 CPU_BSEL0 (8)
T25 V21 RSVD_TP R306 CPU_BSEL1
T48 B18 BPM_2_0#/RSVD BSEL_1 H5 CPU_BSEL1 (8)
1 2 PCH_POK (13,17) CPU_BSEL2
T49 B20 BPM_2_1#/RSVD BSEL_2 K6 CPU_BSEL2 (8)
0_0402_5% T50 C20 BPM_2_2#/RSVD
CPU

T51 B21 H30 CPU_VID0


BPM_2_3#/RSVD VID_0 CPU_VID0 (29)
H29 CPU_VID1
VID_1 CPU_VID1 (29)
H28 CPU_VID2
VID_2 CPU_VID2 (29)
G30 CPU_VID3
VID_3 CPU_VID3 (29)
T55 G5 G29 CPU_VID4
RSVD VID_4 CPU_VID4 (29)
XDP_TDI D14 F29 CPU_VID5
(4) XDP_TDI TDI VID_5 CPU_VID5 (29)
XDP_TDO D13 E29 CPU_VID6
(4) XDP_TDO TDO VID_6 CPU_VID6 (29)
XDP_TCK B14
(4) XDP_TCK TCK
XDP_TMS C14 L7
(4) XDP_TMS TMS RSVD
XDP_TRST# C16 D20
(4) XDP_TRST# TRST# RSVD
RSVD H13
RSVD D18
H_THERMDA D30
H_THERMDC THRMDA_1
E30 THRMDC_1 RSVD_TP K9 T26
RSVD_TP D19 T27
K7 H_EXTBGREF
EXTBGREF
B XDP_TCK B
Place closed to chipset T58

T59 XDP_TDI
3 OF 6 R307
GMCH_CRT_R 1 2
PINEVIEW-M_FCBGA8559 150_0402_1% T60 XDP_TDO
GMCH_CRT_G C30 THRMDA_2/RSVD
1 R308 2
150_0402_1% XDP_TMS D31 THRMDC_2/RSVD
T61
GMCH_CRT_B 1 R309 2
150_0402_1% XDP_TRST# 4 OF 6
T62 PINEVIEW-M_FCBGA8559
GMCH_ENBKL R34
100K_0402_5% T63 H_PWRGD
+VCCP
+VCCP
H_THERMDA, H_THERMDC routing together.
Trace width / Spacing = 10 / 10 mil
R244
R144
+VCCP 976_0402_1%
1K_0402_1%
+3VS
+3VS H_EXTBGREF
H_GTLREF
1

CPU THERMAL SENSOR R202


R143 68_0402_5% 1 1 R156
1 10K_0402_5% R155
3.3K_0402_1%
2K_0402_1%
C80 H_PROCHOT#
2

2 2
@ C939
@ C940

U2 PM_EXTTS#0
2
1U_0603_10V6K
1U_0603_10V6K

A Close to Processor Close to Processor A


1 8 EC_SMB_CK2 EC_SMB_CK2 (17) placed within 0.5"
VDD SMCLK

0.1U_0402_16V4Z
pin pin placed within 0.5"
H_THERMDA 2 DP SMDATA 7 EC_SMB_DA2
EC_SMB_DA2 (17)
of processor pin.
C79 of processor pin.
1 2 H_THERMDC 3 6 2 R58 1 +3VS
2200P_0402_50V7K DN ALERT# 10K_0402_5%
Security Classification Compal Secret Data Compal Electronics, Inc.
4 THERM# GND 5
Issued Date 2006/08/18 2007/8/18 Title
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATICS, MB A5651
EMC1402-1-ACZL-TR MSOP 8P SENSOR AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Address:100_1100 DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401793 D
Date: Friday, May 21, 2010 Sheet 5 of 32
5 4 3 2 1
5 4 3 2 1

U71F PINEVIEW_M

U71E +CPU_CORE REV = 1.1


A11 VSS VSS F24
GFX supply current: 1.38A +CPU_CORE A16 F28
PINEVIEW_M 1U_0402_6.3V6K VSS VSS
1U_0402_6.3V6K 22UF 6.3V M X5R 0805
Sustained GFX supply current: 1.05A VCC A23 2 x 330uF(9mohm/2) A19 VSS VSS F4
VCC A25 A29 RSVD_NCTF VSS G15
+0.89V REV = 1.1
VCC A27 1 1 1 1 1 1 1 1 1 A3 RSVD_NCTF VSS G17
B23 C428 C429 C430 C431 C1154 C1152 C1153 A30 G22
D VCC + + C278 RSVD_NCTF VSS D
T13 VCCGFX VCC B24 A4 RSVD_NCTF VSS G27
T14 B25 22UF 6.3V M X5R 0805 C275 AA13 G31
VCCGFX VCC 2 2 2 2 2 2 2 330U 2.5V Y 330U 2.5V Y VSS VSS
T16 VCCGFX VCC B26 AA14 VSS VSS H11
2 2
T18 VCCGFX VCC B27 AA16 VSS VSS H15
T19 C24 1U_0402_6.3V6K 1U_0402_6.3V6K 22UF 6.3V M X5R 0805 AA18 H2
VCCGFX VCC VSS VSS
V13 VCCGFX VCC C26 AA2 VSS VSS H21
V19 VCCGFX VCC D23 AA22 VSS VSS H25
W14 VCCGFX VCC D24 PLACE IN CAVITY AA25 VSS VSS H8
W16 VCCGFX VCC D26 AA26 VSS VSS J11
W18 VCCGFX VCC D28 AA29 VSS VSS J13
W19 VCCGFX VCC E22 AA8 VSS VSS J15
VCC E24 AB19 VSS VSS J4

GFX/MCH
VCC E27 AB21 VSS VSS K11

CPU
VCC F21 AB28 VSS VSS K13
VCC F22 AB29 VSS VSS K19
VCC F25 AB30 VSS VSS K26
VCC G19 +VCCP AC10 VSS VSS K27
VCC G21 AC11 VSS VSS K28
VCC G24 AC19 VSS VSS K30
VCC H17 AC2 VSS VSS K4
DDR supply current 2.27A H19 AC21 K8
GND

VCC VSS VSS


VCC H22 1 1 AC28 VSS VSS L1
+1.8V H24 C1160 C1161 AC30 L13
VCC VSS VSS
2.2U_0603_10V6K2.2U_0603_10V6K VCC J17 AD26 VSS VSS L18
AK13 J19 0.1U_0402_10V6K 0.1U_0402_10V6K AD5 L22
VCCSM VCC 2 2 VSS VSS
AK19 VCCSM VCC J21 AE1 VSS VSS L24
2 2 2 2 AK9 VCCSM VCC J22 AE11 VSS VSS L25
AL11 K15 Close U71.D4 AE13 L29
C188 C187 C186 C85 VCCSM VCC VSS VSS
AL16 VCCSM VCC K17 R20 AE15 VSS VSS M28
AL21 K21 1 2 +RING_EAST AE17 M3
1 1 1 1 VCCSM VCC VSS VSS
2.2U_0603_10V6K 2.2U_0603_10V6K AL25 VCCSM VCC L14 0_0603_5% 1 AE22 VSS VSS N1
+1.8V L16 AE31 N13
C VCC C242 VSS VSS C
VCC L19 AF11 VSS VSS N18
L21 1U_0603_10V6K AF17 N24
VCC 2 VSS VSS
VCC N14 AF21 VSS VSS N25
VCC N16 AF24 VSS VSS N28
AK7 VCCCK_DDR VCC N19 R21 AF28 VSS VSS N4
1 AL7 VCCCK_DDR VCC N21 AG10 VSS VSS N5
+VCCP 1 2 +RING_WEST AG3 N8
DDR analog supply current: 1.32A VSS VSS
0_0603_5% 1 1 AH18 VSS VSS P13
U10 AH23 P14

C267
2 VCCA_DDR C64 C241 VSS VSS
U5 VCCA_DDR AH28 VSS VSS P16

DDR
1 1 1 U6 1U_0603_10V6K 1U_0603_10V6K AH4 P18
VCCA_DDR 2 2 VSS VSS
U7 VCCA_DDR AH6 VSS VSS P19
C55 C243 C236 U8 AH8 P21
VCCA_DDR VSS VSS

22UF 6.3V M X5R 0805


U9 VCCA_DDR AJ1 RSVD_NCTF VSS P3
2 2 2

POWER
V2 VCCA_DDR R28 AJ16 VSS VSS P4
V3 1 2 +VCC_DMI AJ31 R25
VCCA_DDR 0_0805_5% RSVD_NCTF VSS
V4 VCCA_DDR 1 1 AK1 RSVD_NCTF VSS R7
W10 1U_0603_10V6K AK2 R8
VCCA_DDR C68 C237 RSVD_NCTF VSS
W11 VCCA_DDR AK23 VSS VSS T11
C29 VCCSENSE 1U_0603_10V6K AK30 U22
VCCSENSE VCCSENSE (29) 2 2 RSVD_NCTF VSS

1U_0603_10V6K
AA10 B29 VSSSENSE AK31 U23
VCCACK_DDR VSSSENSE VSSSENSE (29) RSVD_NCTF VSS

4.7U_0603_6.3V6K
AA11 VCCACK_DDR VCCA Y2 +1.5VS AL13 VSS VSS U24
+VCCPProcessor 1
Core analog supply current: 0.08A AL19 VSS VSS U27

22UF 6.3V M X5R 0805


AL2 RSVD_NCTF VSS V14
C391 AL23 VSS VSS V16
VCCP D4 AL29 RSVD_NCTF VSS V18
2 0.01U_0402_16V7K
AL3 RSVD_NCTF VSS V28
VCCP B4 AL30 RSVD_NCTF VSS V29
VCCP B3 AL9 VSS VSS W13
Display PLL SFR and CRT DAC supply B13 W2
VSS VSS
current: 0.154A AA19 VCCD_AB_DPL B16 VSS VSS W23
B19 VSS VSS W25
B B
B22 VSS VSS W26
B30 RSVD_NCTF VSS W28
+1.8VS V11 B31 W30
VCCD_HMPLL RSVD_NCTF VSS
R321 B5 VSS VSS W4
B9 VSS VSS W5
2 1 AC31 +1.8VS C1 W6
VCCSFR_AB_DPL +VCC_ALVD RSVD_NCTF VSS
1 1 VCCALVDS V30 C12 VSS VSS W7
0_0603_5% W31 +VCC_DLVD C21 Y28
VCCDLVDS R25 VSS VSS
LVDS supply current: 0.06A C22 VSS VSS Y3
1 2 +VCC_CRT_DAC C25 Y4

C192
C189
2 2 VSS VSS

1U_0603_10V6K
1U_0603_10V6K
+VCC_CRT_DAC T30 MBK1608601YZF_2P 1 C31

LVDS
VCCACRTDAC RSVD_NCTF
D22 VSS
+3VS C239 E1
1U_0603_10V6K RSVD_NCTF
E10 VSS
GIO supply current: 0.006A T31 +VCC_DMI 2
T1 E19

EXP\CRT\PLL
+RING_EAST VCC_GIO VCCA_DMI VSS
J31 VCCRING_EAST VCCA_DMI T2 DMI analog supply current: 0.48A +DMI_HMPLL E21 VSS
+RING_WEST 1 R18 2
C3 VCCRING_WEST VCCA_DMI T3 E25 VSS VSS T29
0_0603_5% 1

DMI
B2 VCCRING_WEST E8 VSS
C2 VCCRING_WEST RSVD P2 T56 C69 F17 VSS
+VCCP A21 AA1 +DMI_HMPLL F19
VCC_LGI VCCSFR_DMIHMPLL 1U_0603_10V6K VSS
SFR & DMIHMPLL supply current: 0.104A 2
E2 +VCCP R26 6 OF 6
DAC, GIO, LVDS, & LGIO, DPLL, HMPLL VCCP +VCC_ALVD
1 1 2 PINEVIEW-M_FCBGA8559
supply current: 0.33A C1162 100NH +-5% LL1608-FSLR10J 1 1

5 OF 6 0.1U_0402_10V6K C56 C1155


2 1U_0603_10V6K
PINEVIEW-M_FCBGA8559
+0.89V 22UF 6.3V M X5R 0805
2 H1.25 2
Follow Intel check list change to 22uF 06/06
R27
1 2 +VCC_DLVD
0_0603_5% 1
A A

+CPU_CORE C235
2 1 1 1 1 1 1 1 1U_0603_10V6K

C74
C81
C70
C76
C75
C78
C77

C71
2
R32
VCCSENSE 1 2
1 2 2 2 2 2 2 2 100_0402_1%

1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
R31

2.2U_0603_10V6K
VSSSENSE 1 2 Security Classification Compal Secret Data Compal Electronics, Inc.
100_0402_1%
Modify to 2.2U 05/11
Close Chipset pin Issued Date 2006/08/18 Deciphered Date 2007/8/18 Title
SCHEMATICS, MB A5651
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401793 D
Date: Friday, May 21, 2010 Sheet 6 of 32
WWW.AliSaler.Com 5 4 3 2 1
5 4 3 2 1

+1.8V +1.8V
09/03 CONN@
JDIM1
Change to SP07F001720 04/30
20mils
(4) DDR_A_DQS#[0..7] +DIMM_VREF 1 VREF VSS 2
3 4 DDR_A_D4
+1.8V DDR_A_D0 VSS DQ4 DDR_A_D5
(4) DDR_A_D[0..63] 1 1 5 DQ0 DQ5 6
C111 C112 DDR_A_D1 7 8
DQ1 VSS DDR_A_DM0
9 10

1
(4) DDR_A_DM[0..7] 0.1U_0402_16V4Z 2.2U 6.3V M X5R 0402 VSS DM0
DDR_A_DQS#0 11 12
R61 2 2 DDR_A_DQS0 DQS0# VSS DDR_A_D6
(4) DDR_A_DQS[0..7] Layout Note: 13 DQS0 DQ6 14
15 16 DDR_A_D7
Place near JDIM1 1K_0402_1% DDR_A_D2 VSS DQ7
(4) DDR_A_MA[0..14] 17 DQ2 VSS 18
DDR_A_D3 19 20 DDR_A_D12

2
DQ3 DQ12 DDR_A_D13
+DIMM_VREF 21 VSS DQ13 22
DDR_A_D8 23 24

1
D DDR_A_D9 DQ8 VSS DDR_A_DM1 D
25 DQ9 DM1 26
R62 Share +DIMM_VREF for 27 28
DDR_A_DQS#1 VSS VSS M_CLK_DDR0
29 DQS1# CK0 30 M_CLK_DDR0 (4)
1K_0402_1% 1.DDRII VREF DDR_A_DQS1 31 32 M_CLK_DDR#0
DQS1 CK0# M_CLK_DDR#0 (4)
+1.8V 33 34

2
2.GMCH SM_VREF_0 VSS VSS
DDR_A_D10 35 36 DDR_A_D14
SM_VREF_1 DDR_A_D11 DQ10 DQ14 DDR_A_D15
37 DQ11 DQ15 38
39 VSS VSS 40

2 2 2 2 2
41 VSS VSS 42
DDR_A_D16 43 44 DDR_A_D20
DDR_A_D17 DQ16 DQ20 DDR_A_D21
45 46

C128
C129
C110
C109
C130
1 1 1 1 1 DQ17 DQ21
47 VSS VSS 48
DDR_A_DQS#2 49 50 R64 1 2
DQS2# NC PM_EXTTS#0 (5)
DDR_A_DQS2 51 52 DDR_A_DM2 0_0402_5%
DQS2 DM2

2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
53 VSS VSS 54
DDR_A_D18 55 56 DDR_A_D22
DDR_A_D19 DQ18 DQ22 DDR_A_D23
57 DQ19 DQ23 58
59 VSS VSS 60
1 DDR_A_D24 61 62 DDR_A_D28
DDR_A_D25 DQ24 DQ28 DDR_A_D29
1 1 1 1 63 DQ25 DQ29 64
+ 65 66
@ DDR_A_DM3 VSS VSS DDR_A_DQS#3
67 DM3 DQS3# 68

C94
69 70 DDR_A_DQS3

C106
C105
C108
C107
2 2 2 2 2 NC DQS3
71 VSS VSS 72
DDR_A_D26 73 74 DDR_A_D30
DQ26 DQ30

0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
DDR_A_D27 75 76 DDR_A_D31
DQ27 DQ31

220U_B2_2.5VM_R35
77 VSS VSS 78
(4) DDR_CKE0 DDR_CKE0 79 80 DDR_CKE1 DDR_CKE1 (4)
CKE0 NC/CKE1
81 VDD VDD 82
83 NC NC/A15 84
C DDR_A_BS2 DDR_A_MA14 C
(4) DDR_A_BS2 85 BA2 NC/A14 86
87 VDD VDD 88
DDR_A_MA12 89 90 DDR_A_MA11
DDR_A_MA9 A12 A11 DDR_A_MA7
91 A9 A7 92
DDR_A_MA8 93 94 DDR_A_MA6
A8 A6
95 VDD VDD 96
DDR_A_MA5 97 98 DDR_A_MA4
DDR_A_MA3 A5 A4 DDR_A_MA2
Layout Note: 99 A3 A2 100
DDR_A_MA1 101 102 DDR_A_MA0
Place one cap close to every 2 pullup A1 A0
103 VDD VDD 104
resistors terminated to +0.9VS DDR_A_MA10 105 106 DDR_A_BS1 DDR_A_BS1 (4)
DDR_A_BS0 A10/AP BA1 DDR_A_RAS#
(4) DDR_A_BS0 107 BA0 RAS# 108 DDR_A_RAS# (4)
(4) DDR_A_WE# DDR_A_WE# 109 110 DDR_CS#0 DDR_CS#0 (4)
WE# S0#
111 VDD VDD 112
(4) DDR_A_CAS# DDR_A_CAS# 113 114 M_ODT0 M_ODT0 (4)
DDR_CS#1 CAS# ODT0 DDR_A_MA13
(4) DDR_CS#1 115 NC/S1# NC/A13 116
117 VDD VDD 118
(4) M_ODT1 M_ODT1 119 120
NC/ODT1 NC
121 VSS VSS 122
+0.9VS DDR_A_D32 123 124 DDR_A_D36
DDR_A_D33 DQ32 DQ36 DDR_A_D37
125 DQ33 DQ37 126
127 VSS VSS 128
DDR_A_DQS#4 129 130 DDR_A_DM4
DDR_A_DQS4 DQS4# DM4
131 DQS4 VSS 132
133 134 DDR_A_D38
DDR_A_D34 VSS DQ38 DDR_A_D39
135 DQ34 DQ39 136
DDR_A_D35 137 138
1 1 1 1 1 1 1 1 DQ35 VSS DDR_A_D44
1 1 1 1 1 1 1 1 1 1 1 1 1 139 VSS DQ44 140
DDR_A_D40 141 142 DDR_A_D45
DDR_A_D41 DQ40 DQ45
143 144

C445
C446
DQ41 VSS

C86
C87
C88
C91
C90
C89
C439
C440
C441
C442
C443
C444
2 2 145 146 DDR_A_DQS#5

C119
C117
C121
C122
C115
C120
C118
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 VSS DQS5#
DDR_A_DM5 147 148 DDR_A_DQS5
B DM5 DQS5 B

0.1U_0402_16V4Z

0.1U_0402_16V4Z
149 150

0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
VSS VSS

0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
DDR_A_D42 151 152 DDR_A_D46
DDR_A_D43 DQ42 DQ46 DDR_A_D47
153 DQ43 DQ47 154
155 VSS VSS 156
DDR_A_D48 157 158 DDR_A_D52
DDR_A_D49 DQ48 DQ52 DDR_A_D53
159 DQ49 DQ53 160
161 VSS VSS 162
163 164 M_CLK_DDR1 M_CLK_DDR1 (4)
NC,TEST CK1 M_CLK_DDR#1
165 VSS CK1# 166 M_CLK_DDR#1 (4)
DDR_A_DQS#6 167 168
DDR_A_DQS6 DQS6# VSS DDR_A_DM6
169 DQS6 DM6 170
171 VSS VSS 172
+0.9VS DDR_A_D50 173 174 DDR_A_D54
RP6 RP5 DDR_A_D51 DQ50 DQ54 DDR_A_D55
175 DQ51 DQ55 176
DDR_A_MA13 1 8 8 1 DDR_A_BS1 177 178
M_ODT0 DDR_A_MA0 DDR_A_D56 VSS VSS DDR_A_D60
2 7 7 2 179 180
DDR_CS#0 DDR_A_MA2 DDR_A_D57 DQ56 DQ60 DDR_A_D61
3 6 6 3 181 182
DDR_A_RAS# DDR_A_MA4 DQ57 DQ61
4 5 5 4 183 184
Layout Note: DDR_A_DM7 VSS VSS DDR_A_DQS#7
185 DM7 DQS7# 186
47_0804_8P4R_5% 47_0804_8P4R_5% Place these resistor 187 188 DDR_A_DQS7
RP2 RP4 DDR_A_D58 VSS DQS7
closely DIMMA,all 189 DQ58 VSS 190
DDR_A_BS0 1 8 8 1 DDR_A_MA6 DDR_A_D59 191 192 DDR_A_D62
DDR_A_MA10 2 DDR_A_MA7 trace length<750 mil DQ59 DQ62 DDR_A_D63
7 7 2 193 194
DDR_A_MA1 3 DDR_A_MA11 CLK_SMBDATA VSS DQ63
6 6 3 (8,15) CLK_SMBDATA 195 196
DDR_A_MA3 4 DDR_A_MA14 CLK_SMBCLK SDA VSS R66
5 5 4 (8,15) CLK_SMBCLK 197 198 1 2 10K_0402_5%
SCL SA0 R65
+3VS 199 VDDSPD SA1 200 1 2 10K_0402_5%
47_0804_8P4R_5% 47_0804_8P4R_5%
RP3 RP1 1 201 202
1 G1 G2
M_ODT1 1 8 8 1 DDR_A_MA5 C116 C141
DDR_CS#1 2 7 7 2 DDR_A_MA8 Follow Intel Layout checklist, add C141 05/12
DDR_A_CAS# 3 6 6 3 DDR_A_MA9 FOX_AS0A426-N4RN-7F
DDR_A_WE# 4 2 2
5 5 4 DDR_A_MA12
A A
0.1U_0402_16V4Z

DIMMA
0.1U_0402_16V4Z

47_0804_8P4R_5% 47_0804_8P4R_5%

DDR_CKE1 1 R163 2
47_0402_5% Layout Note:
DDR_A_BS2
Security Classification Compal Secret Data Compal Electronics, Inc.
1 R60 2 Place these resistor
47_0402_5% Issued Date 2006/08/18 2007/8/18 Title
DDR_CKE0
closely DIMMA,all Deciphered Date
1 R59 2
47_0402_5% trace length SCHEMATICS, MB A5651
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Max=1.3" AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401793 D
Date: Friday, May 21, 2010 Sheet 7 of 32
5 4 3 2 1
5 4 3 2 1
Change C174 C175 to 10U_0603 05/14
+3VM_CK505
FSC FSB FSA CPU SRC PCI REF DOT_96 USB +3VS

CLKSEL2 CLKSEL1 CLKSEL0 MHz MHz MHz MHz MHz MHz +3VS 1 2
R1370_0603_5% 1 1 1 1 1
C174 C172 C138 C148 R72 R91
0 0 0 266 100 33.3 14.318 96.0 48.0 C1145
47P_0402_50V8J
10U_0603_6.3V6M 0.1U_0402_16V4Z 0.1U_0402_16V4Z 2.2K_0402_5% 2.2K_0402_5%
2 2 2 2 0.1U_0402_16V4Z 2 2N7002DW-T/R7_SOT363-6
0 0 1 133 100 33.3 14.318 96.0 48.0 Q10A
+1.05VM_CK505 CLK_SMBDATA
(13) ICH_SMBDATA 6 1
0 1 0 200 100 33.3 14.318 96.0 48.0 R138
+VCCP 1 2
0_0603_5%
2
1 1 1 1 1 1
0 1 1 166 100 33.3 14.318 96.0 48.0 1 C139 C167 C137 C146 C165 +3VS
D C1146 C175 D
5

47P_0402_50V8J 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z


2 10U_0603_6.3V6M 2 2 2 2 2
1 0 0 333 100 33.3 14.318 96.0 48.0 2
(13) ICH_SMBCLK 3 4 CLK_SMBCLK

1 0 1 100 100 33.3 14.318 96.0 48.0 Q10B


2N7002DW-T/R7_SOT363-6
1 1 0 400 100 33.3 14.318 96.0 48.0

1 1 1 Reserved SA000020N00 (Realtek : RTM875N-397-GRT )


Change co-lay Low power clock GEN
SA000020H10 (ICS : ICS9LPRS387BKLFT)
+3VS
+3VS 1 2
R1348 0_0603_5%
NORPW@ +3VM_CK505 U4

2
9 CLK_SMBDATA
R435 +1.5VM_CK505 SDA CLK_SMBDATA (7,15)
+1.5VS 1 2 55 VDD_SRC
R1349 0_0603_5% 10 CLK_SMBCLK SRC PORT LIST
10K_0402_5% LOWPW@ 0.1U_0402_16V4Z SCL CLK_SMBCLK (7,15)
6 VDD_REF

1
1 1 1 1 1
CLK_EN 47P_0402_50V8J C1119 C140 C160 C169 12 71 CLK_CPU_BCLK
VDD_PCI CPU_0 CLK_CPU_BCLK (5)
C1147

1
10U_0603_6.3V6M 0.1U_0402_16V4Z 0.1U_0402_16V4Z 72 70 CLK_CPU_BCLK#
PORT DEVICE
2 2 2 2 2 VDD_CPU CPU_0# CLK_CPU_BCLK# (5)
Q31
19 68 CLK_CPU_HPLCLK
VDD_48 CPU_1 CLK_CPU_HPLCLK (5) SRC1 CPU_SSCDREFCLK
(29) CLK_ENABLE# 2 27 67 CLK_CPU_HPLCLK#
VDD_PLL3 CPU_1# CLK_CPU_HPLCLK# (5) SRC2
DTC115EUA_SC70-3 R1350 0_0402_5% +1.05VM_CK505 66 24 CLK_CPU_DREFCLK
CPU_DREFCLK (5)
SRC3
C VDD_CPU_IO SRC_0/DOT_96 C
1 2

3
Rename 06/06 +VCCP SRC4 PCIE_WLAN
NORPW@ 31 25 CLK_CPU_DREFCLK#
VDD_PLL3_IO SRC_0#/DOT_96# CPU_DREFCLK# (5)
R1351 0_0402_5% PCIE_SATA
+1.5VS 1 2 62
SRC6
LOWPW@ VDD_SRC_IO CPU_SSCDREFCLK
1 LCDCLK/27M 28 CPU_SSCDREFCLK (5) PCIE_PCH
+VCCP C173 52
SRC7
VDD_SRC_IO CPU_SSCDREFCLK#
LCDCLK#/27M_SS 29 CPU_SSCDREFCLK# (5) CPU_ITP
@ 0.1U_0402_16V4Z 23
SRC8

1
2 VDD_IO
C386 10P_0402_50V8J
R68 @ 1 2 38 32
SRC9 CLK_CPU_EXP
VDD_SRC_IO SRC_2
R76 470_0402_5%
09/03 Modify T64
CLK_48M_CR 1 R74 2 33
SRC10 PCIE_LAN
2.2K_0402_5% 22_0402_5% SRC_2#

2
FSA 2 1 1 R75 2 FSA 20
SRC11 PCIE_WWAN
(13) CLK_PCH_48M 22_0402_5% USB_0/FS_A
SRC_3 35
1 2 FSB 2
(5) CPU_BSEL0 FS_B/TEST_MODE
R69 36
0_0402_5% FSC SRC_3#
1 R104 2 7

1
(13) CLK_PCH_14M 33_0402_5% REF_0/FS_C/TEST_
1 2
R73 C390 10P_0402_50V8J 8 39 CLK_PCIE_WLAN
REF_1 SRC_4 CLK_PCIE_WLAN (20)
3G@ CLK_EN
1K_0402_5% 40 CLK_PCIE_WLAN#
SRC_4# CLK_PCIE_WLAN# (20)
@ 1 2 1

2
(5,13,17,29) VGATE R371 CKPWRGD/PD#
0_0402_5% 11 57 CLK_PCIE_SATA
NC SRC_6 CLK_PCIE_SATA (12)
R1387 @
10K_0402_5% @ 56 CLK_PCIE_SATA#
+VCCP SRC_6# CLK_PCIE_SATA# (12)
2 1 1 R1381 2 +3VS
@ 5.1 +-5% 0402 53
U77 C1157 (13) H_STP_CPU# CPU_STOP# CLK_PCIE_PCH
61

1
SRC_7 CLK_PCIE_PCH (13)
@ FSA 1 8 SS_VDD 1 2@ 54
Add 1K follow R113 XIN/CLKIN VCC 0.1U_0402_16V7K (13) H_STP_PCI# PCI_STOP# CLK_PCIE_PCH#
SRC_7# 60 CLK_PCIE_PCH# (13)
Intel check list 05/11 2 7 1 2
470_0402_5% XOUT SSEXTR R1382 @ 1M +-5% 0402 CLK_XTAL_IN 5 XTAL_IN
B 3 6 64 B

2
R52 1K_0402_1% FS MR T57 SRC_8/CPU_ITP CPU_ITP (4)
FSB CLK_XTAL_OUT 4
1 2 CLK_PCH_48M XTAL_OUT
4 GND MODOUT 5 1 2 SRC_8#/CPU_ITP# 63 CPU_ITP# (4)
1 2 R1384 22_0402_5% +3VS
(5) CPU_BSEL1
R119 PCS3P73Z21BWG-08-CR TDFN 8P @
0_0402_5% 13 44 CLK_CPU_EXP

1
PCI_1 SRC_9 CLK_CPU_EXP (4)
@ Add R107 05/04
R110 For EMI PCI2_TME 14 45 CLK_CPU_EXP#
PCI_2 SRC_9# CLK_CPU_EXP# (4)
@ WLAN_CLKREQ# R121 2 1 10K_0402_5%
0_0402_5% 15 PCI_3 CLK_PCIE_LAN
50

2
R86 SRC_10 CLK_PCIE_LAN (20)
1 2 PCI4_SEL 16
(17) CLK_PCI_LPC PCI_4/SEL_LCDCL CLK_PCIE_LAN#
33_0402_5% 51 WWAN_CLKREQ# R107 2 1 10K_0402_5%
R80 SRC_10# CLK_PCIE_LAN# (20)
1 2 ITP_EN 17
+VCCP (11) CLK_PCI_PCH PCIF_5/ITP_EN
33_0402_5%
1 1 48 CLK_PCIE_WWAN
C389 SRC_11 CLK_PCIE_WWAN (15)
C388 REQ PORT LIST

1
For ITP_EN, 0 =SRC8/SRC8#; 1 = ITP/ITP#
18 47 CLK_PCIE_WWAN#
VSS_PCI SRC_11# CLK_PCIE_WWAN# (15)
R92 @ For PCI4_SEL, 0 = Pin24/25 : DOT96 / DOT96# 60-3G@2 60-3G@
2
3 VSS_REF
R98 470_0402_5% Pin28/29 : LCDCLK / LCDCLK# PORT DEVICE
10K_0402_5% 22 37

2
1 = Pin24/25 : SRC_0 / SRC_0# VSS_48 CLKREQ_3#

15P 50V J NPO 0402


Add WWAN_CLKREQ# 05/04

15P 50V J NPO 0402


FSC 2 1 REQ_3#
Pin28/29 : 27M/27M_SS 26 41 WLAN_CLKREQ#
VSS_IO CLKREQ_4# WLAN_CLKREQ# (20)
(5) CPU_BSEL2 1 2 REQ_4# PCIE_WLAN
R84 For PCI2_TME:0=Overclocking of CPU and SRC allowed 69 58
0_0402_5% VSS_CPU CLKREQ_6#

1
(ICS only) 1=Overclocking of CPU and SRC NOT allowed 30 65
REQ_6#
R87 VSS_PLL3 CLKREQ_7#
@ 34 43
REQ_7#
0_0402_5% VSS_SRC CLKREQ_9#
+3VS +3VS +3VS 59 49
REQ_9#

2
VSS_SRC SLKREQ_10#
42 46 WWAN_CLKREQ# REQ_10#

2
2
2

VSS_SRC CLKREQ_11# WWAN_CLKREQ# (15)


A REQ_11# PCIE_WWAN A
R85 R95 R71 73 21
VSS USB_1/CLKREQ_A#
Follow Intel check list change to 27P 06/05 REQ_A#
10K_0402_5% 10K_0402_5% 10K_0402_5%
Follow Vendor check change to 22P 10/16 @ @ ICS9LPRS387BKLFT_QFN72_10X10

1
1
1

CLK_XTAL_IN ITP_EN PCI4_SEL PCI2_TME


C161 22P 50V J NPO 0402

1
Y1

2
2
2

@
14.318MHZ_16PF_7A14300083 R89 R90 R77 Security Classification Compal Secret Data Compal Electronics, Inc.
Title

2
Issued Date 2007/10/15 Deciphered Date 2008/10/15
CLK_XTAL_OUT 10K_0402_5% 10K_0402_5% 10K_0402_5%
C164 22P 50V J NPO 0402 SCHEMATICS, MB A5651
1
1
1

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Routing the trace at least 10mil DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 401793 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, May 21, 2010 Sheet 8 of 32
WWW.AliSaler.Com 5 4 3 2 1
5 4 3 2 1

LCD POWER CIRCUIT


J1

+3VS 1 2 +CAM_VCC
+LCDVDD +LCDVDD +3VS 1 2
Q3
JUMP_43X39

1
W=20mils W=20mils @

D
S
1 3
R577 +3VS
D D

@
470_0402_5%

G
2
1

2
C1105 1 C1106 1 1
0.1U_0402_16V4Z C1107 C1113

2
4.7U_0603_6.3V6K 0.1U_0402_16V4Z
2
R578 1 2 2 2

NTR4101PT1G 1P SOT-23-3
C1108
100K_0402_5%
0.047U_0402_16V4Z

1
Q4 2

1+LCDVDD_R
D
2 2 1
G

4.7U_0603_6.3V6K
2N7002W-T/R7_SOT323-3 PJUSB208_SOT23-6
S R579 4.7K_0402_5%

3
USB20_N3_1 6 3
CH3 CH2

+CAM_VCC 5 Vp Vn 2

4 1 USB20_P3_1

1
CH4 CH1
Q5 D6
DTC115EUA_SC70-3
@
(5) GMCH_ENVDD 2
Add D6 05/14

2
R174

3
C 100K_0402_5% C

1
2 1
0_0402_5% R1182

@ L3
USB20_N3_1 2 1 USB20_N3 USB20_N3 (13)
2 1

USB20_P3_1 3 4 USB20_P3 USB20_P3 (13)


3 4
1 1 WCM2012F2S-900T04_0805

C1167 C1168
2 1
2 2
@
@

CMOS & LCD/PANEL BD. Conn. 0_0402_5% R1183


+3VS

Modify JLVDS1 08/04


10P_0402_50V8J
10P_0402_50V8J

2
2
Add for RF 07/02

R1180
R1181
JLVDS1

2.2K_0402_5%
1
1
2.2K_0402_5%
1 USB20_P3_1
2 USB20_N3_1
camera LVDS_SCL
B 3 LVDS_SCL (5) B
4 +CAM_VCC
LVDS_SDA LVDS_SDA (5)
5
6
7 LVDS_ACLK
8 LVDS_ACLK (5)
LVDS_ACLK#
9 LVDS_ACLK# (5)
10 LVDS_A2
11 LVDS_A2 (5)
LVDS_A2# LVDS_A2# (5)
12 INVT_PWM
13 LVDS_A1
14 LVDS_A1 (5)
LVDS_A1# LVDS_A1# (5)
15 BKOFF#
16 LVDS_A0
17 LVDS_A0 (5)
LVDS_A0# LVDS_A0# (5)
18

1
1

19 LVDS_SDA C1156 C1109


20 LVDS_SCL
21 BKOFF# 220P_0402_50V7K 1000P 50V K X7R 0402
2
2

22 BKOFF# (17)
INVT_PWM
23 INVT_PWM (5,17)
24 +3VS For RF
+LCDVDD_L 1 2 +LCDVDD
25 L2
26 FBMA-L11-201209-221LMA30T_0805
27 (20 MIL)
+LEDVDD L1 2 1 B+
28
29 FBMA-L11-201209-221LMA30T_0805
30 2 1
ACES_88341-3000B001 C1111 C1112
330P_0402_50V7K 100P_0402_50V8J
CONN@ 1 2

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2006/08/18 2007/8/18 Title
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATICS, MB A5651
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401793 B
Date: Friday, May 21, 2010 Sheet 9 of 32
5 4 3 2 1
A B C D E

Close to CRT CONN for ESD.

3
2
3
2
D18
D17

1 1

Modify C31- C308 C303 C307 C306 C304 BOM Structure 0615

1
1

PJDLC05C_SOT23-3
L15
BK1608LL121-T_2P

PJDLC05C_SOT23-3
1 2 RED
(5) GMCH_CRT_R
L14
BK1608LL121-T_2P
1 2 GREEN
(5) GMCH_CRT_G
L12
BK1608LL121-T_2P
1 2 BLUE
(5) GMCH_CRT_B

1
1
1
1 1 1
R255 R253 R250 C310 1 1 1
C308 C303
C307 C306 C304
2 2 2

150_0402_1%
150_0402_1%
150_0402_1%
10P_0402_50V8J 10P_0402_50V8J 10P_0402_50V8J

2
2
2
2 2 2

10P_0402_50V8J
+5VS JVGA_HS

10P_0402_50V8J
10P_0402_50V8J
1 2
C301 0.1U_0402_16V4Z JVGA_VS

5
1
2 U11 2
R249

P
1 2 2 4 CRT_HSYNC_1

OE#
(5) GMCH_CRT_HSYNC A Y

G
10_0402_5% SN74AHCT1G125DCKR_SC70-5

3
+5VS
Change CRT_DET# From Page 13 to Page 10 06/12
Place closed to chipset
1 2
C298 0.1U_0402_16V4Z

5
1
U10 +3VS
R247

P
1 2 2 4 CRT_VSYNC_1

OE#
2

(5) GMCH_CRT_VSYNC A Y

G
R149
10_0402_5% SN74AHCT1G125DCKR_SC70-5

3
10K_0402_5%
High: CRT Plugged
1

CRT_DET
(13) CRT_DET
1

D
Add R1283 R1284 CRT_DET# 2 Q11
Change R247 R249 to 10 ohm G 2N7002W-T/R7_SOT323-3
S
3

Add @ on U10 U11 C301 C298 06/08


+3VS CRT PORT
+CRT_VCC
+CRT_VCC

1
1
+5VS 0.1U_0402_16V4Z
3 R248 2.2K_0402_5% 3
+3VS C142
D3 W=40mils
2.2K_0402_5% R245 2 1 1 2 Change JCRT1 P/N to SP010906182 06/22

1
1

2
2
R246 R251 RB491D_SC59-3 JCRT1 CONN@
6
2.2K_0402_5% 2.2K_0402_5% 11
RED 1

2
2

5
7
VGA_DDC_DAT 12
4 3 VGA_DDC_DAT GREEN 2
(5) GMCH_CRT_DATA
8
JVGA_HS 13

2
Q24B BLUE 3
2N7002DW-T/R7_SOT363-6 9
1 6 VGA_DDC_CLK JVGA_VS 14 16
(5) GMCH_CRT_CLK
4 17
Q24A 10
VGA_DDC_CLK 15
2N7002DW-T/R7_SOT363-6 5

SUYIN_070546FR015M21RZR

CRT_DET#
2

R1103
100K_0402_5%
4 4
1

+CRT_VCC

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2006/08/18 2007/8/18 Title
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATICS, MB A5651
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401793 D
Date: Friday, May 21, 2010 Sheet 10 of 32
WWW.AliSaler.Com A B C D E
5 4 3 2 1

D D

+3VS U72A TGP

A5 PAR AD0 B22


8.2K_0402_5% R233 PCI_DEVSEL# B15 D18
CLK_PCI_PCH DEVSEL# AD1
(8) CLK_PCI_PCH J12 PCICLK AD2 C17
CLK_PCI_PCH A23 PCIRST# AD3 C18

1
PCI_IRDY# B7 B17
8.2K_0402_5% R235 IRDY# AD4
R336 C22 PME# AD5 C19
@ PCI_SERR# B11 B18
33_0402_5% SERR# AD6
8.2K_0402_5% R236 PCI_STOP# F14 B19
8.2K_0402_5% R229 PCI_PLOCK# STOP# AD7
A8 PLOCK# AD8 D16

2
1 8.2K_0402_5% R207 PCI_TRDY# A10 D15
8.2K_0402_5% R231 PCI_PERR# TRDY# AD9
C432 D10 PERR# AD10 A13
@ 22P_0402_50V8J 8.2K_0402_5% R230 PCI_FRAME# A16 E14
8.2K_0402_5% R237 FRAME# AD11
2 AD12 H14
C L14 C
For EMI, close to TigerPoint AD13
AD14 J14
A18 GNT1# AD15 E10
E16 GNT2# AD16 C11
AD17 E12
G16 REQ1# AD18 B9
8.2K_0402_5% R232 A20
PCI B13
8.2K_0402_5% R209 REQ2# AD19
AD20 L12
AD21 B8
G14 GPIO48/STRAP1# AD22 A3
A2 GPIO17/STRAP2# AD23 B5
C15 GPIO22 AD24 A6
10K_0402_5% R291 C9 G12
10K_0402_5% R292 GPIO1 AD25
AD26 H12
R362 R363 C8
10K_0402_5% 10K_0402_5% AD27
AD28 D9
@ @ PCI_PIRQA# B2 C7
8.2K_0402_5% R238 PCI_PIRQB# PIRQA# AD29
D7 PIRQB# AD30 C1
8.2K_0402_5% R205 PCI_PIRQC# B3 B1
8.2K_0402_5% R206 PCI_PIRQD# PIRQC# AD31
H10 PIRQD#
8.2K_0402_5% R208 PCI_PIRQE# E8
8.2K_0402_5% R210 PCI_PIRQF# PIRQE#/GPIO2
D6 PIRQF#/GPIO3
8.2K_0402_5% R211 PCI_PIRQG# H8 H16
8.2K_0402_5% R212 PCI_PIRQH# PIRQG#/GPIO4 C/BE0#
F8 PIRQH#/GPIO5 C/BE1# M15
8.2K_0402_5% R204 C13
C/BE2#
D11 STRAP0# C/BE3# L16
K9 RSVD01
8.2K_0402_5% R364 M13
8.2K_0402_5% R365 RSVD02
B 1 B
R366
10K_0402_5% TIGERPOINT_ES1_BGA360
@

STRAP2# STRAP1# Boot BIOS


GPIO17 GPIO48

0 1 SPI

1 0 PCI

A A
1 1 LPC

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2006/08/18 2007/8/18 Title
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATICS, MB A5651
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401793
Date: Friday, May 21, 2010 Sheet 11 of 32
5 4 3 2 1
5 4 3 2 1

D D

U72C TGP

R12 RSVD03 SATA0RXN AE6 SATA_DTX_C_IRX_N0 (16)


AE20 RSVD04 SATA0RXP AD6 SATA_DTX_C_IRX_P0 (16)
AD17 AC7 SATA_ITX_C_DRX_N0_R 0.01U_0402_16V7K C32
RSVD05 SATA0TXN SATA_ITX_C_DRX_P0_R SATA_ITX_C_DRX_N0 (16)
AC15 AD7 0.01U_0402_16V7K C31
C RSVD06 SATA0TXP SATA_ITX_C_DRX_P0 (16) C
AD18 RSVD07 SATA1RXN AE8
Y12 RSVD08 SATA1RXP AD8
AA10 RSVD09 SATA1TXN AD9
AA12 RSVD10 SATA1TXP AC9 Del SATA1 04/30
Y10 RSVD11
AD15 RSVD12
W10 RSVD13
V12 RSVD14
AE21 RSVD15
AE18

SATA
RSVD16
AD19 RSVD17
U12 RSVD18
SATA_CLKN AD4 CLK_PCIE_SATA# (8) Placed within 500 mils of Tiger point chipset pin.
AC17 RSVD19 SATA_CLKP AC4 CLK_PCIE_SATA (8) +3VS
AB13 RSVD20
AC13 RSVD21 SATARBIAS# AD11 R45
AB15 AC11 SATARBIAS R154 24.9_0402_1%
RSVD22 SATARBIAS SATA_LED# SATA_LED#
Y14 RSVD23 SATALED# AD25 SATA_LED# (16)
10K_0402_5%
AB16 RSVD24
AE24 R293
RSVD25 GATEA20
AE23 RSVD26 10K_0402_5%
R312
AA14 U16 GATEA20 GATEA20 (17) SERIRQ
RSVD27 A20GATE H_A20M#
V14 RSVD28 A20M# Y20 H_A20M# (5) 10K_0402_5%
CPUSLP# Y21
Y18 H_IGNNE#
IGNNE# H_IGNNE# (5) +VCCP
AD16 RSVD29 INIT3_3V# AD21
AB11 AC25 H_INIT#
RSVD30 INIT# H_INIT# (5)
AB10 AB24 H_INTR
1

+3VS RSVD31 INTR H_INTR (5) 56 ohm±5% pull-up resistor has


Y22 H_FERR#
B FERR# H_FERR# (5) B
R294 8.2K_0402_5% AD23 T17 H_NMI R164 to be within 1" from the Tiger
GPIO36 NMI H_NMI (5)
AC21 KB_RST# KB_RST# (17)
RCIN#
AA16 SERIRQ 56_0402_5% Point chipset.

HOST
SERIRQ SERIRQ (17)
AA21 H_SMI#
2

SMI# H_SMI# (5)


V18 H_STPCLK#
STPCLK# H_STPCLK# (5)
THRMTRIP# AA20 H_THERMTRIP# (5)

3
ESD request
TIGERPOINT_ES1_BGA360

H_A20M# C450 @
1 2 100P_0402_50V8J

H_IGNNE# C451 @
1 2 100P_0402_50V8J

H_INIT# C452 @
1 2 100P_0402_50V8J
+VCCP
H_INTR C453 @
1 2 100P_0402_50V8J

H_FERR# C454 @
1 2 100P_0402_50V8J
R198
56_0402_5% H_NMI C455 @
1 2 100P_0402_50V8J

H_SMI# C456 @
1 2 100P_0402_50V8J
H_FERR#
H_STPCLK# C457 @
1 2 100P_0402_50V8J
Close to TigerPoint
A
pin A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2006/08/18 2007/8/18 Title
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATICS, MB A5651
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401793
Date: Friday, May 21, 2010 Sheet 12 of 32
5
WWW.AliSaler.Com 4 3 2 1
5 4 3 2 1

USB Port List


0 USB Left1
PCIE Port List 1 USB Left2
2 USB Right2
1 LAN
3 CMOS
2 WLAN 4 CardReader
3 WWAN 5 WWAN
D D
6 BT
4 WIMAX
7

U72B TGP
U72D TGP

R23 H7 USB20_N0
+3VS (4) DMI_TX#0 DMI0RXN USBP0N USB20_N0 (20)
AA5 T15 GPIO0 R24 H6 USB20_P0
LDRQ1#/GPIO23 BMBUSY#/GPIO0 (4) DMI_TX0 DMI0RXP USBP0P USB20_P0 (20)
V6 W16 CRT_DET P21 H3 USB20_N1
(17) LPC_AD0 LAD0/FWH0 GPIO6 CRT_DET (10) (4) DMI_RX#0 DMI0TXN USBP1N USB20_N1 (20)
AA6 W14 GPIO7 P20 H2 USB20_P1
(17) LPC_AD1 LAD1/FWH1 GPIO7 SLPIOVR# (4) (4) DMI_RX0 DMI0TXP USBP1P USB20_P1 (20)
Y5 K18 EC_SMI# T21 J2 USB20_N2
(17) LPC_AD2 LAD2/FWH2 GPIO8 EC_SMI# (17) (4) DMI_TX#1 DMI1RXN USBP2N USB20_N2 (20)
EC_SCI# USB20_P2

LPC
W8 H19 T20 J3

1
(17) LPC_AD3 LAD3/FWH3 GPIO9 EC_SCI# (17) @ (4) DMI_TX1 DMI1RXP USBP2P USB20_P2 (20)
Y8 M17 ACIN_C T24 K6 USB20_N3
LDRQ0# GPIO10 (4) DMI_RX#1 DMI1TXN USBP3N USB20_N3 (9)
Y4 A24 GPIO12 T25 K5 USB20_P3
(17) LPC_FRAME# LFRAME#/FWH4 GPIO12 R1390 (4) DMI_RX1 DMI1TXP USBP3P USB20_P3 (9)
C23 EC_LID_OUT# T19 K1 USB20_N4
R160 GPIO13 EC_LID_OUT# (17) DMI2RXN USBP4N USB20_N4 (20)
33_0402_5% 1 2 P6 P5 GPIO14 T18 K2 USB20_P4
(20) HDA_BITCLK_AUDIO R158 HDA_BIT_CLK GPIO14 10K_0402_5% DMI2RXP USBP4P USB20_P4 (20)

DMI
33_0402_5% 1 2 U2 E24 GPIO15 U23 L2 USB20_N5

2
(20) HDA_RST_AUDIO# HDA_RST# GPIO15 DMI2TXN USBP5N USB20_N5 (15)
W2 AB20 2 R17 1 0_0402_5% U24 L3 USB20_P5
(20) HDA_SDIN0 HDA_SDIN0 DPRSLPVR PM_DPRSLPVR (5) DMI2TXP USBP5P USB20_P5 (15)
V2 Y16 1 2 V21 M6 USB20_N6
HDA_SDIN1 STP_PCI# H_STP_PCI# (8) DMI3RXN USBP6N USB20_N6 (15)
P8 AB19 R1391 V20 M5 USB20_P6
33_0402_5% HDA_SDIN2 STP_CPU# H_STP_CPU# (8) DMI3RXP USBP6P USB20_P6 (15)
1 R159 2 AA1 R3 0_0402_5% V24 N1 USB20_N7
(20) HDA_SDOUT_AUDIO HDA_SDOUT GPIO24 DMI3TXN USBP7N USB20_N7 (20)
33_0402_5% USB20_P7

AUDIO
(20) HDA_SYNC_AUDIO 1 R157 2 Y1 HDA_SYNC GPIO25 C24 1 R367 2 V23 DMI3TXP USBP7P N2 USB20_P7 (20)
AA3 D19 1K_0402_5%
(8) CLK_PCH_14M CLK14 GPIO26

1
GPIO27 D20
U3 F22 D4 USB_OC#0_1
R337 EE_CS GPIO28 OC0# USB_OC#0_1 (20)
AE2 AC19 PM_CLKRUN# K21 C5 USB_OC#0_1
@ 33_0402_5% EE_DIN CLKRUN# (20) PCIE_DTX_C_IRX_N1 PERN1 OC1#
T6 U14 K22 D3 USB_OC#2
EE_DOUT EPROM GPIO33 (20) PCIE_DTX_C_IRX_P1 PERP1 OC2# USB_OC#2 (20)
V3 AC1 C565 0.1U_0402_10V7K PCIE_ITX_C_DRX_N1_RJ23 D2 USB_OC#3
USB

EE_SHCLK GPIO34 (20) PCIE_ITX_C_DRX_N1 PETN1 OC3#

2
C GPIO38 USB_OC#4 C
1 GPIO38 AC23 (20) PCIE_ITX_C_DRX_P1
C566 0.1U_0402_10V7K PCIE_ITX_C_DRX_P1_R J24
PETP1 OC4# E5
T4 AC24 GPIO39 M18 E6 USB_OC#5
LAN_CLK GPIO39 (20) PCIE_DTX_C_IRX_N2 PERN2 OC5#/GPIO29
@ C433 P7 M19 C2 USB_OC#6
22P_0402_50V8J LANR_RSTSYNC (20) PCIE_DTX_C_IRX_P2 PERP2 OC6#/GPIO30
B23 AB22 H_PWRGD C53 0.1U_0402_10V7KPCIE_ITX_C_DRX_N2_RK24 C3 USB_OC#7
2 LAN_RST# CPUPWRGD/GPIO49 H_PWRGD (4,5) (20) PCIE_ITX_C_DRX_N2 PETN2 OC7#/GPIO31
AA2 LAN_RXD0 (20) PCIE_ITX_C_DRX_P2
C49 0.1U_0402_10V7K PCIE_ITX_C_DRX_P2_RK25
PETP2
For EMI, Close to TigerPoint AD1 AB17 EC_THERM# L23
LAN_RXD1 THRM# EC_THERM# (17) (15) PCIE_DTX_C_IRX_N3 PERN3
AC2 V16 VGATE L24
LAN_RXD2 VRMPWRGD (15) PCIE_DTX_C_IRX_P3 PERP3

LAN
W3 AC18 MCH_SYNC# C52 0.1U_0402_10V7K PCIE_ITX_C_DRX_N3_RL22 G2
(15) PCIE_ITX_C_DRX_N3

MISC
LAN_TXD0 MCH_SYNC# PBTN_OUT# C54 PETN3 USBRBIAS USBRBIAS R152
T7 LAN_TXD1 PWRBTN# E21 PBTN_OUT# (17) (15) PCIE_ITX_C_DRX_P3
0.1U_0402_10V7K PCIE_ITX_C_DRX_P3_RM21
PETP3 USBRBIAS# G3
U4 H23 ICH_RI# P17 20 +-1% 0402
PCI-E

LAN_TXD2 RI# PERN4


SUS_STAT#/LPCPD# G22 P18 PERP4
RTCX1 W4 D22 N25
RTCX2 RTCX1 SUSCLK SYS_RST# PETN4
V5 RTCX2 SYS_RESET# G18 N24 PETP4
RTCRST# T5 G23 PLTRST# PLTRST# F4 CLK_PCH_48M
1

RTCRST# PLTRST# PLTRST# (4,5,15,17,20) CLK48 CLK_PCH_48M (8)

RTC
C25 ICH_PCIE_WAKE#
WAKE# ICH_PCIE_WAKE# (15,20) R338
SMBALERT# E20 T8 INTRUDER#

1
ICH_SMBCLK SMBALERT#/GPIO11 INTRUDER# T_PWROK C1158 33_0402_5%
(8) ICH_SMBCLK H18 SMBCLK PWROK U10
(8) ICH_SMBDATA ICH_SMBDATA E23 AC3 EC_RSMRST#R @
LINKALERT# SMBDATA RSMRST# INTVRMEN 220P_0402_50V7K
H21 AD3

2
2

LINKALERT# INTVRMEN 1
SMLINK0 F25 J16 SB_SPKR
SB_SPKR (20)

SMB
SMLINK1 SMLINK0 SPKR +1.5VS R434
F24 SMLINK1 R153 24.9_0402_1% @ 22P_0402_50V8J
SLP_S3# H20 PM_SLP_S3# (17) 2
R2 SPI_MISO SLP_S4# E25 PM_SLP_S4# (17) 1 2 H24 DMI_ZCOMP
T1 F21 J22 For EMI, Close to TigerPoint
SPI_MOSI SLP_S5# PM_SLP_S5# (17) DMI_IRCOMP
M8 SPI_CS#
P9 B25 PM_BATT_LOW# W23
SPI_CLK BATLOW# (8) CLK_PCIE_PCH# DMI_CLKN

SPI
R4 AB23 H_DPRSTP# W24
SPI_ARB DPRSTP# H_DPRSTP# (5) (8) CLK_PCIE_PCH DMI_CLKP
AA18 H_DPSLP#
DPSLP# H_DPSLP# (5) 0_0402_5% 2
+3VALW RSVD31 F20
T_PWROK 1 R310 2 VGATE TIGERPOINT_ES1_BGA360
VGATE (5,8,17,29)
@

B
2.2K_0402_5% 1 R147 2 ICH_SMBCLK R311 +3VALW B
TIGERPOINT_ES1_BGA360 1 2 PCH_POK (5,17)
2.2K_0402_5% 1 R148 2 ICH_SMBDATA 0_0402_5%
10K_0402_5% 2 R40 1 LINKALERT# +3VS USB_OC#0_1 R46 10K_0402_5%
10K_0402_5% 2 R44 1 SMLINK0 D25 RB751V_SOD323 USB_OC#2 R49 10K_0402_5%
10K_0402_5% 2 R37 1 T_PWROK ACIN_C 2 1 ACIN USB_OC#3 R48 10K_0402_5%

2
10K_0402_5% 2 R43 1 SMLINK1 ACIN (17,23)
10K_0402_5% 2 R38 1 EC_RSMRST#R USB_OC#4
8.2K_0402_5% R239 PM_BATT_LOW# R1376 2 R223 1 2 1 USB_OC#5
+3VALW
1K_0402_5% 1 R145 10K_0402_5% @ R222 USB_OC#6 modify 05/14
2ICH_PCIE_WAKE# USB_OC#7
50@ 100K_0402_5% 0_0402_5%
10K_0402_5% 2 R39 1 SYS_RST#

1
8.2K_0402_5% GPIO38
R240 ICH_RI#

2
10K_0402_5% 2 R36 1 EC_LID_OUT# +3VS +RTCBATT
R1377
8.2K_0402_5% R314 GPIO12 RSMRST circuit
10K_0402_5%
2

8.2K_0402_5% R315 GPIO14 10K_0402_5% 2 R42 MCH_SYNC#


1 60@
R295 R1370 R372
8.2K_0402_5%

1
8.2K_0402_5% R316 GPIO15 GPIO7 0_0402_5%
8.2K_0402_5% R300 GPIO39 1K_0402_5%
8.2K_0402_5% R301 SMBALERT# 1 2
8.2K_0402_5% R368 EC_THERM#
Q30
R302
1 1
C

+RTCVCC 8.2K_0402_5% GPIO0 3 1 EC_RSMRST#R


D37 (17) EC_RSMRST#
E

1M_0402_5%
R146 BAV99DW-7_SOT363 @ MMBT3906_SOT23-3
1 2 INTRUDER# 8.2K_0402_5%
B

R241 PM_CLKRUN# 1 2 +3VALW


R373 @ 4.7K_0402_5%
2
5
4
2
1 2

1 R197 2 INTVRMEN +RTCVCC


332K_0402_1%
3
2

R374 D28B
@ 2.2K_0402_5% @
BAS40-04_SOT23-3 @ D28A
+RTCVCC 1 R196 2 RTCRST#
+CHGRTC BAV99DW-7_SOT363
1

20K_0402_5% 1
A C368 A
3
6

C1148 R375
1 2
12P 50V J NPO 0402 Routing the trace at least 10mil 0.1U_0402_16V4Z
2 R1184 @1 0_0402_5% RTCX1
2 1 2 @ 2.2K_0402_5%

Y3

1
32.768K_1TJS125BJ4A421P
C230
1U_0603_10V4Z~D 2 NC IN 1
Security Classification

R288
1 2
Compal Secret Data Compal Electronics, Inc.
3 NC OUT 4 Title
10M_0402_5%
Issued Date 2006/08/18 Deciphered Date 2007/8/18
2

C371 SCHEMATICS, MB A5651


12P 50V J NPO 0402 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
2 1 RTCX2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401793
Date: Friday, May 21, 2010 Sheet 13 of 32
5 4 3 2 1
5 4 3 2 1

TGP
U72E
D D
F12 +V5REF_RUN 6mA
VCC5REF

U72F TGP
F5 +V5REF_SUS 10mA
+5VS +3VS VCC5REF_SUS
VSS01 A1
Y6 +SATAPLL 50mA A25
VCCSATAPLL VSS02
B6

1
2
VSS03
VCCRTC AE3 +RTCVCC VSS04 B10
R33 D12 B16
+DMIPLL VSS05
RB751V-40_SOD323-2 VCCDMIPLL Y25 VSS06 B20
100_0402_5% 1 1 B24
VSS07

C42
C47
F6 10mA +VCCP E18

2
1
VCCUSBPLL VSS08
VSS09 F16
+V5REF_RUN G4
2 2 VSS10
VSS11 G8

0.1U_0402_16V4Z
W18 14mA H1

0.01U_0402_16V7K
1 V_CPU_IO 1 VSS12
C59 H4
C41 0.1U_0402_16V4Z VSS13
VSS14 H5
1U_0603_10V6K K4
2 2 VSS15
VCC1_5_1 AA8 1.3A VSS16 K8
VCC1_5_2 M9 +1.5VS VSS17 K11
VCC1_5_3 M20 VSS18 K19
VCC1_5_4 N22 1 1 1 1 1 VSS19 K20

C48
C45
C61
C62
L4

C459
VSS20
VSS21 M7
+5VALW +3VALW M11

10U_0805_10V4Z
VSS22

0.1U_0402_16V4Z
0.1U_0402_16V4Z
2 2 2 2 2

1U_0603_10V6K
1U_0603_10V6K
N3

2
VSS23

POWER
N12

1
C D10 VSS24 C
VCC1_05_1 J10 0.98A +VCCP VSS25 N13
R35 RB751V-40_SOD323-2 K17 N14
VCC1_05_2 VSS26
VCC1_05_3 P15 1 1 1 1 VSS27 N23

C46
C60
C63
10_0402_5% V10 P11

1
C460
VCC1_05_4 VSS28
P13

2
+V5REF_SUS VSS29
VSS30 P19
2 2 2 2
VSS31 R14

0.1U_0402_16V4Z
1U_0603_10V6K
1U_0603_10V6K
10U_0805_10V4Z
VSS32 R22
1 VCC3_3_1 H25 0.29A +3VS VSS33 T2
C40 AD13 T22
0.1U_0402_16V4Z VCC3_3_2 VSS34
VCC3_3_3 F10 1 1 1 1 1 VSS35 V1

C43
C37
C38
G10 V7

C461
C462
2 VCC3_3_4 VSS36
VCC3_3_5 R10 VSS37 V8
VCC3_3_6 T9 VSS38 V19
2 2 2 2 2
VSS39 V22

1U_0603_10V6K
1U_0603_10V6K
1U_0603_10V6K
VSS40 V25

0.1U_0402_16V4Z
0.1U_0402_16V4Z
VCCSUS3_3_1 F18 0.13A VSS41 W12
VCCSUS3_3_2 N4 VSS42 W22
VCCSUS3_3_3 K7 VSS43 Y2
VCCSUS3_3_4 F1 +3VALW VSS44 Y24
VSS45 AB4
VSS46 AB6
1 1 1 VSS47 AB7

C39
C44
AB8

C463
VSS48
VSS49 AC8
VSS50 AD2
2 2 2

1U_0603_10V6K
1U_0603_10V6K
5 VSS51 AD10

0.1U_0402_16V4Z
VSS52 AD20
TIGERPOINT_ES1_BGA360 VSS53 AD24
VSS54 AE1
B AE10 B
VSS55
VSS56 AE25

Place closely pin Y25 within 100mlis.


VSS57 G24
+1.5VS R30
VSS58 AE13
0.01U_0402_16V7K +DMIPLL F2
0_0805_5% VSS59
1 1 1
C58 C28 C464 AE16
10U_0805_10V4Z RSVD32
2 2 2

4.7U_0603_6.3V6K
TIGERPOINT_ES1_BGA360

Place closely pin Y6 within 100mlis.

+1.5VS
R29
+SATAPLL
0_0805_5%
1 1
C57 C27
10U_0805_10V4Z 0.1U_0402_16V4Z
A A
2 2

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2009/04/15 2010/04/15 Title
Deciphered Date
SCHEMATICS, MB A5651
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401793 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, May 21, 2010 Sheet 14 of 32
WWW.AliSaler.Com 5 4 3 2 1
A B C D E

Add C1163 C1164 C1165 C1166 06/23


+1.5VS

1
C1163 1 1 1
C1164 C1165
C1166
2 +3VS
2 2 2

4.7U_0603_6.3V6K

0.01U_0402_25V7K
47P_0402_50V8J

0.1U_0402_16V4Z
1 Add C850 06/12 1
1

+3VS_WWAN
C411 BT@
0.1U_0402_16V4Z 0.1U_0402_16V4Z
2
1 1 1 1
C505 C507 1 R501
C508
Mini-Express Card for WWAN C506 C850
0.1U_0402_16V4Z 47P_0402_50V8J (17) BT_ON# 2 1
2 2 2 0.01U_0402_25V7K 2
BT MODULE CONN
2 10K_0402_5%
10U_0805_10V4Z

R4020_0402_5% BT@
EC_TX_P80_DATA 1 2 EC_TX_P80_DATA_R +3VS BT@ +3VS_BT
(17) EC_TX_P80_DATA
EC_RX_P80_CLK 1 2 EC_TX_P80_CLK_R Q35
(17) EC_RX_P80_CLK
R403 0_0402_5% AO3413_SOT23-3 BT@
+3VS_WWAN C502
S
D

+3VS +3VS_WWAN +3VALW 3 1 2 1


1
@ 0.1U_0402_16V4Z
+
G

Change JMINI1 to FOX_AS0B246-S50U-7F_52P-T 06/29 1 2 1 2 @ C403


2

R405 0_1206_5% R504 0_1206_5%


150U_B_6.3VM_R40M
2
Close to WWAN CONN
JMINI1
ICH_PCIE_WAKE#
+3VS_BT

(13,20) ICH_PCIE_WAKE# 1 1 2 2
3 3 4 4 JBT1
5 5 6 6 +1.5VS
(8) WWAN_CLKREQ# WWAN_CLKREQ# 7 8 +UIM_PWR 1
7 8 UIM_DATA 1
9 9 10 10 2 2
11 12 UIM_CLK (13) USB20_P6 USB20_P6 3 5
(8) CLK_PCIE_WWAN# 11 12 3 GND
13 14 UIM_RST (13) USB20_N6 USB20_N6 4 6
2 (8) CLK_PCIE_WWAN 13 14 4 GND 2
15 16 UIM_VPP
15 16
ACES 88266-04001
17 18 CONN@
17 18 WXMIT_OFF#
19 19 20 20 WXMIT_OFF# (17)
21 21 22 22 R506 1 2 0_0402_5% PLTRST# (4,5,13,17,20)
(13) PCIE_DTX_C_IRX_N3 23 23 24 24
(13) PCIE_DTX_C_IRX_P3 25 25 26 26
27 28 R507 0_0402_5%
Change to PCIE_P3 05/13 27 28
29 29 30 30 1 2 NON3G@ CLK_SMBCLK (7,8)
(13) PCIE_ITX_C_DRX_N3 31 31 32 32 1 2 NON3G@ CLK_SMBDATA (7,8)
33 34 R508 0_0402_5%
(13) PCIE_ITX_C_DRX_P3 33 34
35 35 36 36 USB20_N5 (13)
37 37 38 38 USB20_P5 (13)
+3VS_WWAN 10U_0805_10V4Z 39 40
39 40
1 2 41 41 42 42 WWAN_LED# (16,20) (9~16mA)
C504 43 44 1 2 WLAN_LED# (16,20)
D15 WWAN_WAKEUP_R# 43 44 R511 0_0402_5%
45 45 46 46
@ CM1293-04SO_SOT23-6 47 48 NON3G@
UIM_VPP UIM_DATA EC_TX_P80_DATA_R 47 48
1 CH1 CH4 4 49 49 50 50
EC_TX_P80_CLK_R 51 52
51 52
53 GND1 GND2 54
2 Vn Vp 5 +UIM_PWR 55 NC NC 56
+3VALW

BELLW_80052-1021
UIM_RST UIM_CLK CONN@
1

3 CH2 CH3 6
R509
JP3 10K_0402_5%
4 1 +UIM_PWR
3 GND VCC 3
2

UIM_VPP 5 2 UIM_RST
UIM_DATA VPP RST UIM_CLK @
6 I/O CLK 3
(17) WWAN_WAKEUP# 1 2 WWAN_WAKEUP_R#
7 DET
1 R510 0_0402_5%
1
1 1 1 1 1 1

1
1

C1116
1 C512
8

C509
2 GND

R12
@ 2

C510
9

C511
C513
GND 2 2 2 2 2 2

C1115
@ @ @ 2

C1117
2

3G@ C1118
22P_0402_50V8J
2
C1114

0.1U_0402_16V4Z

10K_0402_5%
22P_0402_50V8J
22P_0402_50V8J

56P_0402_50V8
56P_0402_50V8
56P_0402_50V8
+UIM_PWR

3G@
3G@
56P_0402_50V8
TAITW_PMPAT6-06GLBS7N14N0 CONN@

3G@
3G@
3G@
3G@

56P_0402_50V8
1U_0402_6.3V6K
Reserve for SIM card does not meet rise time
and pull-up is needed.

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2006/08/05 Deciphered Date 2007/8/18 Title
SCHEMATICS, MB A5651
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401793
Date: Friday, May 21, 2010 Sheet 15 of 32
A B C D E
A B C D E F G H

ADD LED PCB CONN 06/12


Change JP18 to NEW P/N 06/23
LED PCB CONN 09/03 Change +5VALW , +5VS to +3VALW +3VS
JP18

1 1
+3VALW 1 1
(17) PWR_LED# 2 2
(17) PWR_SUSP_LED# 3 3
(17) BATT_GRN_LED# 4 4
(17) BATT_AMB_LED# 5 5
MEDIA_LED# 6
NUM_LED# 6
(17) NUM_LED# 7 7
(17) CAPS_LED# CAPS_LED# 8
BT_LED# 8
(17,20) BT_LED# 9 9
+3VS 10 10
11 11 GND 17
(15,20) WWAN_LED# 12 12 GND 18
(15,20) WLAN_LED# 13 13
14 14
15 15
16 16
ACES_85201-1605N

CONN@

+3VS

5
U29

P
(20) CARD_LED# 2 B
2 4 MEDIA_LED# 2
SATA_LED# Y
(12) SATA_LED# 1

G
A
NC7SZ08P5X_NL_SC70-5

3
Add U29 5/14

3 3

SATA HDD Conn.


JHDD1
1 GND
(12) SATA_ITX_C_DRX_P0 SATA_ITX_C_DRX_P0 2
SATA_ITX_C_DRX_N0 A+
(12) SATA_ITX_C_DRX_N0 3 A-
4 GND
SATA_DTX_C_IRX_N0 1 2 C380 SATA_DTX_IRX_N0 5
(12) SATA_DTX_C_IRX_N0 0.01U_0402_16V7K B-
6 B+
SATA_DTX_C_IRX_P0 1 2 SATA_DTX_IRX_P0 7
(12) SATA_DTX_C_IRX_P0 GND
C383
0.01U_0402_16V7K 8
+3VS V33
9 V33
10 V33
11 GND
+5VS 12 GND
13 GND
+5VS 14 V5
0.1U_0402_16V4Z
15 V5
16 V5
1 1 1 1 17
C423 C426 GND
18 Reserved
C422 C419
10U_0603_6.3V6M 19 GND
1U_0402_6.3V6K 20
2 2 2 2 V12
21 V12
22 V12
1000P_0402_50V7K
4 4
SUYIN_127043FR022G263ZR_NR

CONN@

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2006/08/18 2007/8/18 Title
Deciphered Date
SCHEMATICS, MB A5651
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401793 D
Date: Friday, May 21, 2010 Sheet 16 of 32
A
WWW.AliSaler.Com B C D E F G H
+3VALW
+EC_AVCC Change R1292 to 0 ohm for BRD ID R01 (EVT) 06/24
L16
1 1 1 1 1 1
+3VALW 1 2 +EC_AVCC
MBK1608121YZF_0603

C514
C515
C516
C517
C521
C519
2 1
C518 R1292 +3VALW
C520 2 2 2 2 2 2
@
0.1U_0402_16V4Z 1000P_0402_50V7K U6 Ra

9
22
33
96
111
125
67
2
1 ECAGND 2
2 1
R1288 R1291

0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0_0402_5% 100K_0402_5%

1000P_0402_50V7K
1000P_0402_50V7K
VCC
VCC
VCC
VCC
VCC
VCC
AVCC
10K_0402_5%
Change to R_0402 05/14 2 R41 1 60@

1
+3VS
1 21 PWR_PWM_LED#
(12) GATEA20 GA20/GPIO00 INVT_PWM/PWM1/GPIO0F PWR_PWM_LED# (18)
2 23 BEEP# BRD_ID
(12) KB_RST# KBRST#/GPIO01 BEEP#/PWM2/GPIO10 BEEP# (20)
3 26

2
(12) SERIRQ SERIRQ# FANPWM1/GPIO12
4 27 ACOFF
(13) LPC_FRAME# LFRAME# ACOFF/FANPWM2/GPIO13 ACOFF (25)
LPC_AD3 5 R1292
(13) LPC_AD3 LAD3
LPC_AD2 7 PWM Output 50@ 33K +-5% 0402
(13) LPC_AD2 LAD2
LPC_AD1 8 63 BATT_TEMP
(13) LPC_AD1 LAD1 BATT_TEMP/AD0/GPIO38 BATT_TEMP (24)
C522 LPC_AD0 10 64 BATT_OVP

1
(13) LPC_AD0 LAD0 LPC & MISC BATT_OVP/AD1/GPIO39 BATT_OVP (25) Rb
2 1 2 1 ADP_I/AD2/GPIO3A 65 ADP_I (25)
R1289 @ 10_0402_5% 12 AD Input 66 BRD_ID
(8) CLK_PCI_LPC PCICLK AD3/GPIO3B
@ 22P_0402_50V8J 13 75 1 2 BOARD ID Table
(4,5,13,15,20) PLTRST# PCIRST#/GPIO05 AD4/GPIO42 +0.89V_PG (28)
1 2 EC_RST# 37 76 0_0402_5% R1389
+3VALW ECRST# SELIO2#/AD5/GPIO43
R1290 47K_0402_5% EC_SCI# 20
(13) EC_SCI# SCI#/GPIO0E
2 38 CLKRUN#/GPIO1D VCC 3.3V
C523 68
DAC_BRIG/DA0/GPIO3C EN_FAN1
EN_DFAN1/DA1/GPIO3D 70 EN_FAN1 (4) Ra 100K
0.1U_0402_16V4Z DA Output 71 IREF
1 IREF/DA2/GPIO3E IREF (25)
PLTRST# KSI0 55 72
KSI0/GPIO30 DA3/GPIO3F CALIBRATE# (25) ID BRD ID
KSI1 56 Rb Vab-Min Vab-Typ Vab-Max
KSI2 KSI1/GPIO31
57

1
C1159 KSI3 KSI2/GPIO32
58 KSI3/GPIO33 PSCLK1/GPIO4A 83 EC_MUTE# (20) 0 R01 (EVT) 0 0V 0V 0V
KSI4 59 84 USB_ON#
KSI4/GPIO34 PSDAT1/GPIO4B USB_ON# (20)
220P_0402_50V7K KSI5 60 85 @ 1 2

2
KSI6 KSI5/GPIO35 PSCLK2/GPIO4C C1177 470P_0402_50V7K
1 R02 (DVT) 8.2K 0.216V 0.250V 0.289V
61 KSI6/GPIO36 PS2 Interface PSDAT2/GPIO4D 86 BT_LED# (16,20) NAV50
KSO[0..15] KSI7 62 87 TP_CLK 2 R03 (PVT)
(19) KSO[0..15] KSI7/GPIO37 TP_CLK/PSCLK3/GPIO4E TP_CLK (19) 18K 0.436V 0.503V 0.538V
KSO0 39 88 TP_DATA
KSI[0..7] KSO0/GPIO20 TP_DATA/PSDAT3/GPIO4F TP_DATA (19)
For ESD KSO1 40 3 R10A (MP)
(19) KSI[0..7] KSO2 41
KSO1/GPIO21 33K 0.712V 0.819V 0.875V
KSO3 KSO2/GPIO22
42 KSO3/GPIO23 SDICS#/GPXOA00 97 4 R01 (EVT) 56K 1.036V 1.185V 1.264V
KSO4 43 98
KSO5 KSO4/GPIO24 SDICLK/GPXOA01
44 KSO5/GPIO25 Int. K/B SDIDO/GPXOA02 99 5 R02 (DVT) 100K 1.453V 1.650V 1.759V
KSO6 45 109 LID_SW# NAV60
KSO6/GPIO26 Matrix SDIDI/GPXID0 LID_SW# (18)
KSO1 KSI1 KSI5 GPIO15 KSO7 46 SPI Device Interface 2 1 +3VALW 6 R03 (PVT)
KSO8 47
KSO7/GPIO27 47K_0402_5% R1293
200K 1.935V 2.200V 2.341V
KSO9 KSO8/GPIO28 FRD#SPI_SO
48 KSO9/GPIO29 SPIDI/RD# 119 7 R10A (MP) NC 2.500V 3.3V 3.3V
WLAN_OFF# v v High KSO10 49 120 FWR#SPI_SI
KSO11 KSO10/GPIO2A SPIDO/WR# SPI_CLK
50 KSO11/GPIO2B SPI Flash ROM SPICLK/GPIO58 126
KSO12 51 128 FSEL#SPICS#
KSO13 KSO12/GPIO2C SPICS#
WXMIT_OFF# v v High 52 KSO13/GPIO2D
KSO14 53
KSO15 KSO14/GPIO2E
WXMIT_OFF# 54 KSO15/GPIO2F CIR_RX/GPIO40 73 WWAN_WAKEUP# (15)
v v Low 81 KSO16/GPIO48 CIR_RLC_TX/GPIO41 74
Swap to WLAN 82 KSO17/GPIO49 FSTCHG/SELIO#/GPIO50 89 FSTCHG (25)
90 BATT_GRN_LED#
BATT_CHGI_LED#/GPIO52 BATT_GRN_LED# (16)
91 CAPS_LED#
CAPS_LED#/GPIO53 CAPS_LED# (16)
EC_SMB_CK1 77 GPIO 92 BATT_AMB_LED#
(24) EC_SMB_CK1 SCL1/GPIO44 BATT_LOW_LED#/GPIO54 BATT_AMB_LED# (16)
EC_SMB_DA1 78 93 PWR_LED#
(24) EC_SMB_DA1 SDA1/GPIO45 SUSP_LED#/GPIO55 PWR_LED# (16)
KSO1 EC_SMB_CK2 79 SM Bus 95 SYSON
(5) EC_SMB_CK2 SCL2/GPIO46 SYSON/GPIO56 SYSON (22,27)
EC_SMB_DA2 80 121
(5) EC_SMB_DA2 SDA2/GPIO47 VR_ON/XCLK32K/GPIO57 VR_ON (29)
KSI1 WL_BTN# AC_IN/GPIO59 127 ACIN (13,23)

KSI5 3G_BTN# 0_0402_5% R1309 Add 0 ohm R1309 06/08


PM_SLP_S3# 6 100 1 2
(13) PM_SLP_S3# PM_SLP_S3#/GPIO04 EC_RSMRST#/GPXO03 EC_RSMRST# (13)
PM_SLP_S5# 14 101 EC_LID_OUT#
(13) PM_SLP_S5# PM_SLP_S5#/GPIO07 EC_LID_OUT#/GPXO04 EC_LID_OUT# (13) Del R1294 06/08
EC_SMI# 15 102 EC_ON RB751V-40TE17_SOD323-2
(13) EC_SMI# EC_SMI#/GPIO08 EC_ON/GPXO05 EC_ON (18)
16 103 D29 @
LID_SW#/GPIO0A EC_SWI#/GPXO06 ICH_POK_EC
17 SUSP#/GPIO0B ICH_PWROK/GPXO06 104 1 2 PCH_POK PCH_POK (5,13)
Change INVT_PWM from Pin21 to Pin25 06/24 18 PBTN_OUT#/GPIO0C GPO BKOFF#/GPXO08 105 BKOFF# (9) R1295
0_0402_5% R67 19 GPIO 106 1 2 1 2
EC_PME#/GPIO0D WL_OFF#/GPXO09 WL_OFF# (20) +3VS
INVT_PWM2 1 25 107 R1296 10K_0402_5% @
(5,9) INVT_PWM EC_THERM#/GPIO11 GPXO10 WXMIT_OFF# (15) 0_0402_5%
FAN_SPEED1 28 108 @
(4) FAN_SPEED1 FAN_SPEED1/FANFB1/GPIO14 GPXO11 BT_ON# (15)
29 D30
EC_TX_P80_DATA FANFB2/GPIO15 PCH_POK
(15) EC_TX_P80_DATA 30 EC_TX/GPIO16 Change BT_ON# from Pin98 to Pin108 06/24 2 1 VGATE (5,8,13,29)
EC_RX_P80_CLK 31 110 PM_SLP_S4# (13)
(15) EC_RX_P80_CLK EC_RX/GPIO17 PM_SLP_S4#/GPXID1
32 112 RB751V-40TE17_SOD323-2
(18) ON/OFF# ON_OFF/GPIO18 ENBKL/GPXID2 GMCH_ENBKL (5)
(16) PWR_SUSP_LED# PWR_SUSP_LED# 34 114
PWR_LED#/GPIO19 GPXID3 EAPD (20)
NUM_LED# 36 GPI 115 EC_THERM#
(16) NUM_LED# NUMLED#/GPIO1A GPXID4 EC_THERM# (13)
116 SUSP#
GPXID5 SUSP# (22,25,27,28)
117 PBTN_OUT#
GPXID6 PBTN_OUT# (13) +3VALW
GPXID7 118 LAN_WAKE# (20)
XCLKI 122 U75
XCLKO XCLK1 SPI_CS#
123 XCLK0 V18R 124 1 R320 2 +3VALW 1 CS# VCC 8
20mil 1 1 +3VALW 3 6 SPI_CLK_R
+3VALW C1178 100K_0402_5% WP# SCLK SPI_SI
7 HOLD# SI 5
C524 4 2 SPI_SO

GND
GND
GND
GND
GND
AGND
EC_SMB_CK1 @ GND SO
1 2
R1297 2.2K_0402_5% KB926QFD3_LQFP128_14X14 2 2 MX25L512AMC-12G_SO8

11
24
35
94
69
1 2 EC_SMB_DA1 @

113
R1298 2.2K_0402_5%
1 2 KSO1
R1299 47K_0402_5%
1 2 KSO2 +3VALW

ECAGND
470P_0402_50V7K

R1300 47K_0402_5%
4.7U_0603_6.3V6K

8M SPI ROM
1
C525 C526 20mils U76
C527 8 4

1
4
22P 50V J NPO 0402 0.1U_0402_16V4Z VCC VSS
22P 50V J NPO 0402 X1 EC DEBUG PORT 2
3

IN
W

OUT
+5VS
7 HOLD
JP25
TP_CLK 1 2 +3VALW 1 FSEL#SPICS# 2 1 SPI_CS# 1

NC
NC
R1301 4.7K_0402_5% EC_TX_P80_DATA 1 R1302 22_0402_5% S
2 2
TP_DATA 1 2 EC_RX_P80_CLK 3 SPI_CLK 2 1 SPI_CLK_R 6

2
3
R1303 4.7K_0402_5% 3 R1304 22_0402_5% C
4 4
32.768K_1TJS125BJ4A421P FWR#SPI_SI 2 1 SPI_SI 5 2 SPI_SO 2 1 FRD#SPI_SO
ACES_85205-0400 R1305 22_0402_5% D Q R1306 22_0402_5%
CONN@ EN25F80-75HCP SOIC 8P
+3VS
C528
1 2 EC_SMB_CK2 BATT_OVP C529 1 2
R1307 2.2K_0402_5% 100P_0402_50V8J 2 1 SPI_CLK_R
1 2 EC_SMB_DA2 BATT_TEMP C530 1 2 10P_0402_50V8J
R1308 2.2K_0402_5% 100P_0402_50V8J
ACIN C531 1 2
100P_0402_50V8J Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2006/08/04 2007/8/18 Title
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATICS, MB A5651
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401793
Date: Friday, May 21, 2010 Sheet 17 of 32
Add For NAV50 07/06
09/03 Change +5VS to +3VS
ON/OFF Button
+3VS 50@
SW1
3 4
(BLUE) ON/OFFBTN#

1
51 +-5% 0402 1 2
50@
R1388 EVQPLMA15 SPST PANASONIC H1.5

2
2
TOP Side
LED1 +3VALW
@
HT-191NB5-DT BLUE 0603 R186 2
FOR EMI 1
50@ 0_0805_5%

1
PWR_PWM_LED# C1169 1 @ R1347
2 @ 100P_0402_50V8J R194 2
PWR_PWM_LED# 1
ON/OFFBTN# C1170 1 0_0805_5% 100K_0402_5%
2 @ 100P_0402_50V8J

1
10mil D14
Bottom Side ON/OFF#
2 ON/OFF# (17)
ON/OFFBTN# 1
3 51ON#
51ON# (23)

PWR_PWM_LED# DAN202U_SC70

ON/OFFBTN# 2 1
C4 D1 @

1000P_0402_50V7K RLZ20A_LL34

3
2
1
2

D42

PJSOT24C_3P_C/A_SOT-23
50@

1
D

1
EC_ON 2 Q1
(17) EC_ON
G 2N7002W-T/R7_SOT323-3

2
S <BOM Structure>
3

R3

10K_0402_5%

PWR/B Conn LID Switch

+3VALW
+3VS
2 VDD

JP23
1 1 1 OUTPUT 3 LID_SW# (17)
ON/OFFBTN# 2 C155
PWR_PWM_LED# 2 0.1U_0402_16V4Z
(17) PWR_PWM_LED# 3 3 1
4
GND

4 2 C150
5 G1
6 U5
1

G2 2
ACES_85201-0405N
APX9132ATI-TRL SOT-23 3P
10P_0402_50V8J

CONN@

Update PW/B Conn 0623

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2006/08/18 2007/8/18 Title
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATICS, MB A5651
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401793 D
Date: Friday, May 21, 2010 Sheet 18 of 32
WWW.AliSaler.Com
5 4 3 2 1

To TP/B Conn.
D D

KSI[0..7] JP11
KSI[0..7] (17) INT_KBD Conn.
+5VS 1 1
KSO[0..15] 2
KSO[0..15] (17) 2
JKB1 TP_CLK 3
(17) TP_CLK 3
26 TP_DATA 4
G2 (17) TP_DATA 4
25 5 8

2
3
KSI0 G1 5 GND
24 24 6 6 GND 7
KSI1 23
KSI0 C136 1 100P_0402_50V8J KSO4 100P_0402_50V8J KSI2 23
2 C104 1 2 22 22
KSO0 21 ACES_85201-0605N
KSI1 C135 1 100P_0402_50V8J KSO5 100P_0402_50V8J KSO1 21 D22
2 C103 1 2 20 20
KSO2 19 CONN@
KSI2 C134 1 100P_0402_50V8J KSO6 100P_0402_50V8J KSI3 19
2 C102 1 2 18 18
KSO3 17
KSI3 C133 1 100P_0402_50V8J KSO7 100P_0402_50V8J KSO4 17
2 C101 1 2 16
1
KSO5 16 PJDLC05C_SOT23-3
15 15
KSI4 C132 1 2 100P_0402_50V8J KSO8 C100 1 2 100P_0402_50V8J KSO6 14
KSO7 14
13 13
KSI5 C131 1 2 100P_0402_50V8J KSO9 C99 1 2 100P_0402_50V8J KSO8 12
KSI4 12
11 11
KSI6 C127 1 2 100P_0402_50V8J KSO10 C98 1 2 100P_0402_50V8J KSO9 10
KSI5 10
9 9
KSI7 C126 1 2 100P_0402_50V8J KSO11 C97 1 2 100P_0402_50V8J KSI6 8
KSO10 8
7 7
Chage JP11 Pin define & Add D22 05/14
KSO0 C125 1 2 100P_0402_50V8J KSO12 C96 1 2 100P_0402_50V8J KSO11 6
KSI7 6
5 5
C KSO1 C124 1 2 100P_0402_50V8J KSO13 C95 1 2 100P_0402_50V8J KSO12 4 C
KSO13 3
4 Update TP/B Conn 05/04
KSO2 C114 1 100P_0402_50V8J KSO14 C93 100P_0402_50V8J KSO14 3
2 1 2 2 2
KSO15 1
KSO3 C113 1 100P_0402_50V8J KSO15 C92 100P_0402_50V8J 1
2 1 2
ACES_85202-24051
CONN@

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2006/08/18 2007/8/18 Title
Deciphered Date
SCHEMATICS, MB A5651
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401793 D
Date: Friday, May 21, 2010 Sheet 19 of 32
5 4 3 2 1
A B C D E

1 1

09/03 Change Pin 18, 23 to +1.5VS change Pin7 , 9 to USB20_P7 N7

I/O Board Conn.


C1021 1 R1326 MONO_IN_R
(17) BEEP# 2 1 2
1U_0402_6.3V4Z
560_0402_5%
JP2
2 2 1 1 +5VS
R1327 4 4 3 3
C1022 1 2 1 2 +5VALW 6 5
(13) SB_SPKR 1U_0402_6.3V4Z 6 5 USB20_P7
8 7

1
1
560_0402_5% 8 7 USB20_N7 USB20_P7 (13)
10 10 9 9 USB20_N7 (13)
D36 @ 12 11 +3VALW
R1328 12 11
RB751V-40TE17_SOD323-2 (8) CLK_PCIE_WLAN 14 14 13 13
10K_0402_5% 16 15 USB_ON# (17)
(8) CLK_PCIE_WLAN# 16 15
18 17

2
2
+1.5VS 18 17 USB_OC#2 (13)
(17) EC_MUTE# 20 20 19 19 PLTRST# (4,5,13,15,17)
(17) EAPD 22 22 21 21 WWAN_LED# (15,16)
(16,17) BT_LED# 24 24 23 23 +1.5VS
MONO_IN_R 26 25
26 25 CARD_LED# (16)
(17) LAN_WAKE# 28 28 27 27 PCIE_DTX_C_IRX_P2 (13)
(17) WL_OFF# 30 30 29 29 PCIE_DTX_C_IRX_N2 (13)
(13,15) ICH_PCIE_WAKE# 32 32 31 31
(8) WLAN_CLKREQ# 34 34 33 33 PCIE_ITX_C_DRX_N2 (13)
2 2
(15,16) WLAN_LED# 36 36 35 35 PCIE_ITX_C_DRX_P2 (13)
38 38 37 37
(13) HDA_BITCLK_AUDIO 40 40 39 39 PCIE_DTX_C_IRX_N1 (13)
(13) HDA_SDOUT_AUDIO 42 42 41 41 PCIE_DTX_C_IRX_P1 (13)
(13) HDA_SDIN0 44 44 43 43
(13) HDA_RST_AUDIO# 46 46 45 45 PCIE_ITX_C_DRX_N1 (13)
(13) HDA_SYNC_AUDIO 48 48 47 47 PCIE_ITX_C_DRX_P1 (13)
50 50 49 49
52 51 USB20_N4
(8) CLK_PCIE_LAN 52 51 USB20_N4 (13)
(8) CLK_PCIE_LAN# 54 53 USB20_P4
54 53 USB20_P4 (13)
56 56 55 55
58 57 USB20_P2
+3VS 58 57 USB20_N2 USB20_P2 (13)
60 60 59 59 USB20_N2 (13)
+5VALW 62 61
GND GND
LOTES_YEA-BTB-006-260K12

+USB_VCCC
U13
C244 1 8
0.1U_0402_16V4Z GND VOUT
2 VIN VOUT 7
2 1 3 VIN VOUT 6
4 5

2
EN FLG USB_OC#0_1 (13)
R224 APL3510BKI-TRG SOP 8P PWR SWITCH
100K_0402_5%
1
C245

1
(17) USB_ON# USB_ON# @ 1000P_0402_50V7K
2

3 3

Change JUSB1 JUSB2 to NEW P/N SP010906181 06/23 USB CONN.2


USB CONN.1
+USB_VCCC +USB_VCCC

+USB_VCCC
W=40mils +USB_VCCC
W=40mils

1 1 1 1
C316 C318
C315 + C317 +
470P_0402_50V7K 470P_0402_50V7K
150U 6.3V M B LESR45M T520 H1.9 2 150U 6.3V M B LESR45M T520 H1.9 2
2 2
JUSB1 JUSB2
1 VCC 1 VCC
(13) USB20_N0 2 D- (13) USB20_N1 2 D-
(13) USB20_P0 3 D+ (13) USB20_P1 3 D+
4 4
3
2

GND GND
3
2

5 GND1 5 GND1
6 GND2 6 GND2
7 GND3 7 GND3
8 D23 8
D21 GND4 GND4
SUYIN_020133GB004M25MZL SUYIN_020133GB004M25MZL

PJDLC05C_SOT23-3
1

CONN@ CONN@
PJDLC05C_SOT23-3
1

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2006/08/18 2007/8/18 Title
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATICS, MB A5651
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401793 D
Date: Friday, May 21, 2010 Sheet 20 of 32
WWW.AliSaler.Com A B C D E
Modify Hole location by (ME Drawing 06/12) 0615

H8 H20
H H
H_3P2X3P7N
@ @

1
1
H16 H9 H1
H H H
H_2P6
@ @ @

1
1
1
H7 H17
H H

@ @

1
1
09/03 Del H12

H18 H19 H21


H H H FM2 FM4 FM3 FM1

H_3P2 @ @ @ @ @ @ @ FIDUCIAL_C40M80

1
1
1
1
1
1
1

H3
H
H_3P2
@

1
H11
H
H_3P2N
@

1
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2006/08/18 2007/8/18 Title
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATICS, MB A5651
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401793 D
Date: Friday, May 21, 2010 Sheet 21 of 32
A B C D E

Change R51 R57 R70 R63 R317 R114 R190 to 0402 SIZE 04/30
Change C221 C218 C223 C 191 C201 C170 C392 C393 C394 to 0603 SIZE 04/30

+5VALW TO +5VS +3VALW TO +3VS


1 1
+5VALW +5VS +3VALW +3VS

SI4800BDY-T1-E3_SO8 Q19 SI4800BDY-T1-E3_SO8 Q15


8 1 8 1
7 2 7 2

2
2
6 3 1 1 6 3 1 1
5 C223 C219 470_0402_5% 5 C170 C176 470_0402_5%
1 1 1 1
C221 C218 C191 C201
10U_0603_6.3V6M R190 10U_0603_6.3V6M 1U_0603_10V4Z R114

4
4
10U_0603_6.3V6M 2 2
1U_0603_10V4Z 10U_0603_6.3V6M 10U_0603_6.3V6M 2 2

1
2 2 2 2

3 1
10U_0603_6.3V6M

3
Q12B
+VSB 1 2 5VS_GATE Q17B R139 2N7002DW-T/R7_SOT363-6 5 SUSP
R187 2N7002DW-T/R7_SOT363-6 5 SUSP +VSB 1 2
22K +-5% 0402

4
1 33K +-5% 0402

6
C208

4
1

6
C179
Q17A 0.1U 25V K X5R 0402
SUSP 2 Q12A 0.1U 25V K X5R 0402
2
2N7002DW-T/R7_SOT363-6 SUSP 2
2
2N7002DW-T/R7_SOT363-6

1
1
+5VALW
2

R141
100K_0402_5%

2 2
1

+1.8V to +1.8VS
+1.8V +1.8VS
SYSON#
SI4800BDY-T1-E3_SO8 Q27
8 1
7 2 1 1

2
6 3 C394 C395
6

5 470_0402_5%
1 1
C392 C393 10U_0603_6.3V6M ADD +5VS +VCCP +0.89V Cap for EMI
2 2 R317 Q14A

4
SYSON 2

1
2 2 (17,27) SYSON
2N7002DW-T/R7_SOT363-6
1

1U_0603_10V4Z
+VCCP +0.89V +1.8V
+5VS +1.8V
Q28B

10U_0603_6.3V6M
10U_0603_6.3V6M
2N7002DW-T/R7_SOT363-6 5 SUSP 1 1 1
+VSB 1.8VS_GATE 1 @ C1173 @ C1174 @ C1175 1
R318 @ C1172 @ C1176

4
200K +-1% 0402 1
C396 2 2 2

6
2 2
0.1U 25V K X5R 0402
Q28A 2
SUSP 2
2N7002DW-T/R7_SOT363-6 +0.9VS

0.01U_0402_25V7K
0.01U_0402_25V7K
0.01U_0402_25V7K

1
0.01U_0402_25V7K
0.01U_0402_25V7K

3 3

RTCVREF
VL
2
2

R172 R173
100K_0402_5% 100K_0402_5%
@
1
1

+1.5VS +VCCP +0.9VS +1.8V SUSP


(28) SUSP

2
2
2
2
3

470_0402_5% 470_0402_5% 470_0402_5% 470_0402_5%

R51 R57 R70 R63 Q14B


(17,25,27,28) SUSP# 5

1
1
1
1

2N7002DW-T/R7_SOT363-6
4

3
6
3
6

Q6B Q6A Q8B Q8A


2N7002DW-T/R7_SOT363-6 5 SUSP 2 SUSP 5 SUSP 2 SYSON#
@ @
@ @ 2N7002DW-T/R7_SOT363-6 2N7002DW-T/R7_SOT363-6 2N7002DW-T/R7_SOT363-6

4
1
4
1

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2006/08/18 2007/8/18 Title
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATICS, MB A5651
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401793 D
Date: Friday, May 21, 2010 Sheet 22 of 32
WWW.AliSaler.Com A B C D E
A B C D

PR1
1M_0402_1%
1 2
VIN VIN
VS
1 1

1
1
@PR2
@ PR2 PR3
VIN 10K_0402_5% 84.5K_0402_1%
PR6

8
PL1 PR4 PR5 22K_0402_5%

2
2
HCB2012KF-121T50_0805 0_0402_5% 10K_0402_5% PU1A

P
+ 3 1 2
DC_IN_S1 1 2 1 2 PACIN 2
1
1 1 0
(13,17) ACIN 2
1

G
- PC1

1
1
1
SP02000GC00 LM358DT_SO8 PR7 1000P_0402_50V7K

4
PJP1 PD1 PC2 20K_0402_1%
2

1
1
1
1
6 4 PR8 RLZ4.3B_LL34 .1U_0402_16V7K
2
2

GND 4 PC3 PC4 PC5 PC6 10K_0402_5%


5 GND 3 3
2 1000P_0402_50V7K 100P_0402_50V8J 100P_0402_50V8J 1000P_0402_50V7K

2
2
2
2
2
2
2
1 1

ACES 88266-04001 PR9


CONN@ 10K_0402_5%
1 2
RTCVREF
(27) PACIN

2 2

Vin Dectector
Min. Typ Max.
- PBJ1 + H-->L 16.976V 17.525V 17.728V
+RTCBATT
2 1 +RTCBATT L-->H 17.430V 17.901V 18.384V

ML1220T13RE
45@

PJ1 PJ2
VIN +3VALWP 2 2 1 1 +3VALW +5VALWP 2 2 1 1 +5VALW
JUMP_43X118 JUMP_43X118
1
1

2
PD2
2
2

PC194
PC193

RLS4148_LL34-2
PD3
RLS4148_LL34-2

1
.1U_0402_16V7K
.1U_0402_16V7K

3 2 1 3

1
1
BATT+
PR10 PR11
68_1206_5% 68_1206_5% PJ4
PJ3 +VCCPP 2 1
PR12 PQ1 2 1 +VCCP
2 1

2
2
+1.8VP 2 1 +1.8V
200_0603_5% JUMP_43X118
1

CHGRTCP 1 2 N1 3 1 JUMP_43X118
1

VS
2

1
PC196

1
1
PC195

PR13 PC13
100K_0402_1% 0.22U_0603_25V7K PC14
.1U_0402_16V7K

<BOM Structure> 0.1U_0402_25V6

2
2
.1U_0402_16V7K

PR14 TP0610K-T1-E3_SOT23-3

2
2
22K_0402_1%
1 2
(18) 51ON# PJ5

+0.89VP 2 2 1 1 +0.89V
JUMP_43X79
1

RTCVREF

1
PR15
2

PC197

200_0603_5%
PR16 PR17 PU2
560_0603_5% 560_0603_5% 3.3V

2
.1U_0402_16V7K

1 2 1 2 3 2 N2
OUT IN
+CHGRTC

1
1
GND PC19
4 4
PC18 G920AT24U_SOT89-3 1U_0603_25V6K
10U_0603_6.3V6M 1

2
2
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2007/09/20 2008/09/20 Title
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATICS, MB A5651
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401793 D
Date: Friday, May 21, 2010 Sheet 23 of 32
A B C D
A B C D

VMB
PH1 under CPU botten side :
1
PJP2 PL2 1

1 HCB2012KF-121T50_0805
CPU thermal protection at 90 degree C
1 BATT_S1
2 2 1 2 BATT+ Recovery at 70 degree C
3 B/I
3 TS
4

1
1
4 EC_SMCA
5 5
6 EC_SMDA PC21 PC22 VS VL
6 1000P_0402_50V7K 0.01U_0402_25V7K VL
7

2
2
7
8 8
GND 9
10

2
GND

1
1
SUYIN_200275MR008G15QZR PC129 PR157 PR154
0.1U_0402_25V6 442K_0402_1% 150K_0402_1%

2
2
PR155 1 2

2
9.76K_0402_1%

1
PR21 PR22

2
100_0402_1% 100_0402_1% PR152

8
82.5K_0402_1%

1
1
P
1 2 3

1
PR25 + MAINPWON (28)
O 1
PR220 6.49K_0402_1% TM_REF1 2

G
1K_0402_5% - PU3A
2 1 +3VALWP
LM393DR_SO8

2
1
1
PR27

1
1
1K_0402_1% PC131 PR153
1000P_0402_50V7K 150K_0402_1%

PH1
PC130
2 1

2
2
2
VL

2
2 2

BATT_TEMP (17)

1U_0402_6.3V6K
1

PR156

100K_0402_1%_NCP15WF104F03RC
150K_0402_1%
EC_SMB_CK1 (17)
2

EC_SMB_DA1 (17)

PQ3

3 1 +VSB
B+ VS

1
1
8

PR30
100K_0402_1% PC200
P

5 +
TP0610K-T1-E3_SOT23-3 0.1U_0402_25V6 7

2
2
2
O
6
G

- PU3B
LM393DR_SO8
4

VL

2
PR32
3 22K_0402_1% 3

2
PR34

1
100K_0402_1%

1
D

1
2 PQ4
(28) SPOK G 2N7002W-T/R7_SOT323-3
S

3
4 4

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2007/09/20 2008/09/20 Title
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATICS, MB A5651
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401793 D
Date: Friday, May 21, 2010 Sheet 24 of 32
WWW.AliSaler.Com A B C D
A B C D

B+

P2 SI7121DN-T1-GE3_POWERPAK8-5 P3 B+ CHG_B+ SI7121DN-T1-GE3_POWERPAK8-5


PD9 PQ10 PR57 0.05_1206_1% PJ8 PQ11
VIN 2 1 1 1 4 2 2 1 1 1
2 2
B340A_SMA2 3 5 2 3 JUMP_43X118 CSIN 3 5

1 1

CSIP PR58

4
4
47K_0402_1%

3
1
2
1
1
1
1
PQ12 PQ13 TP0610K-T1-E3_SOT23-3 1 2

1
1
PC165
DTA144EUA_SC70-3 PR221 VIN
PR60 3 1 2 1 DCIN PD10

1
2
2
2
2

PC52
PC50
PC53
PC54
2
PR59 2 200K_0402_1% 1SS355TE-17_SOD323-2

2
P3

PC51
1
0.1U_0603_25V7K
47K_0402_1% 10_0603_5% PR62 1 2 ACOFF

2
4.7U_1206_25V6K
4.7U_1206_25V6K
PQ14 10K_0402_1%

2
5600P_0402_25V7K
1
2200P_0402_25V7K
DTC115EUA_SC70-3

0.1U_0603_25V7K
PR64

PR61
PD11 200K_0402_1%

1
2
1 1
PR63 2 FSTCHG 1

1
100K_0402_1%
FSTCHG (17) 2 VIN
PD12 2 1 2 1
1SS355TE-17_SOD323-2 3 SUSP# PD13
1 2 6251VDD 100K_0402_1% SUSP# (17,24,29,30) PQ16 1SS355TE-17_SOD323-2
BAS40CW_SOT-323 DTC115EUA_SC70-3 2 1 2
2 PR65

1
PQ15 10K_0402_5%

PC55
DTC115EUA_SC70-3 2 1 PU5 PC57
(17) FSTCHG 0.1U_0603_25V7K

2
3

1
1

D DCIN PQ18D
1 2 1 24 2 1

3
1
1
1

PC56 VDD DCIN


2 2 PACIN
G .1U_0402_16V7K G
2N7002W-T/R7_SOT323-3

2.2U_0603_6.3V6K
PC58

S PQ17 PR66 2 23 S

3
2
3

2N7002W-T/R7_SOT323-3 150K_0402_1% ACSET ACPRN PR68

PR67
20_0402_5%

2
2
0.1U_0603_25V7K

6251_EN 3 22 1 2 CSON

2
5

100K_0402_1%
EN CSON PC59
0.047U_0603_16V7K PQ19
4 21 1 2 CSOP

1
CELLS CSOP PR69
2 2
PC60 6800P_0402_25V7K 20_0402_5% SIS412DN-T1-GE3_POWERPAK8-5
1 2 5 20 2 1 4

1
2
PQ20 D ICOMP CSIN PR70
2 PC61 PR71 6.81K_0402_1% PC62 20_0402_5%
G 2N7002W-T/R7_SOT323-3 1 2 1 2 6 19 0.1U_0603_25V7K
1 2

1
PR73 VCOMP CSIP PR72 PL5
S <BOM Structure>

3
3
2
1

0.01U_0402_25V7K 1 2 100_0402_1% 2_0402_5% 8.2UH_FDV0630-8R2M=P3_3.7A_20% PR74 0.05_1206_1% BATT+


PC63 1 2 7 18 LX_CHG 1 2 CHG 1 4
PR75 @ 100P_0402_50V8J ICM PHASE
5
1

22K_0402_5% (17) ADP_I 2 3


PACIN 1 2 PC64 6251VREF 8 17 DH_CHG
(25) PACIN VREF UGATE
PR77 1 2 PR78 PC65
PR76

62K_0402_1% 0_0603_5% 0.1U_0603_25V7K PQ21


4.7_1206_5%

2 1 .1U_0402_16V7K 9 16 BST_CHG 1 2 BST_CHGA 2 1


2

1
1
PQ22 (17) IREF PR79 CHLIM BOOT SIS412DN-T1-GE3_POWERPAK8-5
4
1
1

DTC115EUA_SC70-3 38.3K_0402_1% PD14


1

6251VREF 1 2 6251aclim 10 15 6251VDDP RB751V-40TE17_SOD323-2

1
PC67
PC68

ACLIM VDDP
<BOM Structure>
2
2

1
1
ACOFF 2 PR80 1 26251VDD

2
3
2
1
2
PC66

(17) ACOFF
10U_1206_25V6M
10U_1206_25V6M

100K_0402_1% PR81 11 14 DL_CHG

PC69
2
20K_0402_1% VADJ LGATE PR82

2
4.7_0603_5%

2
12 13 PC70

3
0.01U_0402_25V7K
2
1
GND PGND
680P_0402_50V7K

4.7U_0805_6.3V6K

ISL6251AHAZ-T_QSOP24

3 3

Iada=0~1.58A(30W) VMB
CP = 85%*Iada ; CP = 1.343A
PR83
15.4K_0402_1%
1

CP mode 1 2
Vaclim=2.39*(20K/(20K+38.3K))=0.8199V (17) CALIBRATE#

2
VS PR84
Iinput=(1/0.05)((0.05*Vaclm)/2.39+0.05) PR85 LI-3S :13.5V----BATT-OVP=1.5012V 340K_0402_1%
31.6K_0402_1%
2

where Vaclm=0.8199V, Iinput=1.343A


BATT-OVP=0.1112*VMB

1
Per cell=3.5V
1
1

PC71

PR86
2

CC=0.3~1.76A 499K_0402_1%
0.01U_0402_25V7K

IREF=1.62*Icharge
2

PR87 PU1B
IREF=0.486V~2.85V 10K_0402_1% LM358DT_SO8
P

+ 5
1 2 7 0
3.24V==>2A (17) BATT_OVP 6
G

-
1

4
1

PR88
VADJ-->VREF-->4.41V 105K_0402_1%
Charging Voltage
2
PC72

BATT Type CV mode VADJ--->Ground--->3.99V


2

(0x15)
Vcell=(0.175*VADJ+3.99)
4 4
0.01U_0402_25V7K

Normal 3S LI-ON Cells


12600mV 12.60V

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2007/09/20 2008/09/20 Title
Deciphered Date
- SCHEMATICS, MB A5651
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401793 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, May 21, 2010 Sheet 25 of 32
A B C D
5 4 3 2 1

ISL6237_B+
ISL6237_B+
PL11 PR36
HCB2012KF-121T50_0805 0_0805_5%
1 2 1 2
B+

1
1
1
1
5
VL
D D

1
1
1
1

PC163
PC29
PC30
PC32
PC33
PC34
PQ5 PC164

2
2
2
2

PC31
SIS412DN-T1-GE3_POWERPAK8-5

2
2
2
2

0.1U_0603_25V7K
PC35

4.7U_0805_25V6-K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
4

2200P_0402_50V7K
2
2200P_0402_50V7K
0.1U_0603_25V7K

4 0.1U_0402_25V6

1
PQ6

1
1

PC36
SIS412DN-T1-GE3_POWERPAK8-5 +5VALWP

2
3
2
1

PC37

1
2
3
PL4

1U_0402_6.3V6K
PL3 4.7UH_FDVE0630-H-4R7M=P3_5.5A_20%

6
3
7
8.2UH_FDV0630-8R2M=P3_3.7A_20% PU4 PC38

4.7U_0603_6.3V6M
2 1
1 2 1U_0402_6.3V6K

3
+3VALWP

VIN
33 19 1 2

3
1

LDO

VCC
TP PVCC

1
PQ7 DH3 26 15 DH5
PR37 PR39 0_0603_5% UGATE2 UGATE1 PR40 0_0603_5%
4.7_1206_5% 2 1 BST3A 24 17 BST5A 2 1

1
PR38

BOOT2 BOOT1
2
2

2
2
4.7_1206_5%

PR41 2 PC41

2
+ 0_0402_5% PC40 0.1U_0603_25V7K
1
2

0.1U_0603_25V7K

1
1

PC39
1
PR42

1
LX3 25 16 LX5

2
1

2 PC42 IRFH3707TRPBF_PQFN8-3 PHASE2 PHASE1 +

1
2
PC43

680P_0402_50V7K

2
PC44

@ 61.9K_0402_1%

DL3 23 18 DL5
1

LGATE2 LGATE1 2

150U_B2_6.3VM_R45M
PQ8
IRFH3707TRPBF_PQFN8-3

2
680P_0402_50V7K

C 22 C
2

FB3 PGND
30 OUT2
150U_B2_6.3VM_R45M

@ PR43
10K_0402_1% 10
PR44

OUT1
0_0402_5%

32

1
VL REFIN2
1

11 FB5
2VREF_ISL6237 FB1

1 2 1 REF
PC45 0.22U_0402_6.3V6K
BYP 9
8 LDOREFIN @ PR45 0_0402_5%
SKIP 29 2 1 VL
PR46 0_0402_5%
1 2
20 NC POK2 28
PD6 PR47
GLZ5.1B_LL34-2 100K_0402_1%
1 2 1 2 4 13 SPOK (26)
VS EN_LDO POK1 PR49

2
309K_0402_1%

2
14 12 ILM1 2 1
PC46 EN1 ILIM1

PR48
0.22U_0402_6.3V6K

1
27 31 ILIM2 2 1

1
B EN2 ILIM2 B

200K_0402_1%
NC
TON
GND

PR50
PD7 VL SN0806081RHBR QFN 32P 249K_0402_1%
5
21

1SS355TE-17_SOD323-2

2
PR53
2

806K_0603_1%
PC47

PR55

1
1

2VREF_ISL6237 +5VALWP Ipeak=7.0A Imax=4.9A Iocp=8.4A


0_0402_5%
1U_0402_6.3V6K

Rds(on)=17.9m ohm(max) ; Rds(on)=14.5m ohm(typical)


2VREF_ISL6237 2

2 1
Vlimit=(5E-06 * 309K)/10=154.5mV
(26) MAINPWON
Ilimit=154.5mV/17.9m ~154.5mV/14.5m x 1.2

1
=8.631A ~ 8.879A

PC48
Iocp=Ilimit+Delta I/2

2
=9.611A ~ 9.859A
Delta I=1.960A (Freq=400KHz)

3
0.047U_0402_16V7K

2 PQ9
TP0610K-T1-E3_SOT23-3
+3.3VALWP Ipeak=5.731A Imax=4.012A Iocp=6.877A
Rds(on)=17.9m ohm(max) ; Rds(on)=14.5m ohm(typical)
A A
1
Vlimit=(5E-06 * 249K)/10=124.5mV
Ilimit=124.5mV/17.9m ~124.5mV/14.5m x 1.2
=6.955A ~ 7.155A Security Classification Compal Secret Data Compal Electronics, Inc.
Iocp=Ilimit+Delta I/2 2007/09/20 2008/09/20 Title
Issued Date Deciphered Date
=7.922A ~ 8.122A SCHEMATICS, MB A5651
Delta I=1.934A (Freq=300KHz) THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401793 D
Date: Friday, May 21, 2010 Sheet 26 of 32

WWW.AliSaler.Com5 4 3 2 1
A B C D

PL12
HCB2012KF-121T50_0805
1.8V_B+ 1 2 B+

1
1
1
1

PC166

5
PC74
PC75

2
2
2
2

PC73
0.1U_0603_25V7K

4.7U_0805_25V6-K
4.7U_0805_25V6-K

2200P_0402_50V7K
PR89
300K_0402_5% 4
1 1 2 1

PR90 PR91 PQ23


1K_0402_1% 0_0603_5%
1 2 BST_1.8V 1 2 SIS412DN-T1-GE3_POWERPAK8-5

3
2
1
(17,24) SYSON

1
1
PR92 PL6

1
15
14
30K_0402_5% PC77 PU6 PC76 2.2U_FDV0630-2R2M-P3_7.2A_20%
1U_0402_6.3V6K BST_1.8V-1 1 2 1 2

2
+1.8VP

NC

2
DH_1.8V 0.1U_0603_25V7K

BOOT
2 13

1
TON UGATE

EN/DEM
PR94 3 12 LX_1.8V

3
100_0603_1% VOUT PHASE
1
1 2 4 11 1 2 +5VALW

PR93
+5VALW VDD CS +
PR95

PQ24
4.7_1206_5%
5 10 8.66K_0402_1%

PC78
FB VDDP

1
1
DL_1.8V 2
6 PGOOD LGATE 9 2
PC79

220U_B2_2.5VM
4.7U_0603_6.3V6K

2
2

1
PC80

GND
PGND
RT8209BGQW_WQFN14_3P5X3P5 PC82

7
8
1
IRFH3707TRPBF_PQFN8-3
4.7U_0805_10V6K

2
680P_0603_50V7K
<Vo=1.8V> VFB=0.75V
PR96
Vo=VFB*(1+PR96/PR97)=0.75*(1+28.7K/20.5K)=1.8V 28.7K_0402_1%
Fsw=328KHz 1 2

1
Cout ESR=15m ohm Rdson(max)=17.9m Rdson(typical)=14.5m
2 Ipeak=4.97A, Imax=3.479A, Iocp=5.964A 2
PR97
Delta I=((19-1.8)*(1.8/19))/(2.2u*328K)=2.259A 20.5K_0402_1% PL13
HCB2012KF-121T50_0805

2
=>1/2DeltaI=1.129A +VCCP_B+ 1 2 B+
Vtrip=Rtrip*10uA=8.66K*10uA=0.0866V
Iocpmin=Vtrip/(Rdsonmax)+1.129
=0.0866/(0.0179)+1.129=5.967A

1
1
1
1

Iocpmax=(0.0866/(0.0145*1.2))+1.129A=6.106A
PC167

5
PC84
PC85

Iocp=5.967A~6.106A

2
2
2
2

PC83
0.1U_0603_25V7K

4.7U_0805_25V6-K
4.7U_0805_25V6-K

PR98 2200P_0402_50V7K
300K_0402_5% 4
1 2
PR99 PR100 PQ25
2K_0402_1% 0_0603_5%
1 2 BST_1.05V1 2 SIS412DN-T1-GE3_POWERPAK8-5

3
2
1
(17,24,27,30) SUSP#

1
1
PR101 PC87 PL7

1
15
14
30K_0402_5% PC86 PU7 0.1U_0603_25V7K 1UH_FDV0630-1R0M-P3_10.3A_20%
1U_0402_6.3V6K BST_1.05V-1 1 2 1 2

2
+VCCPP

NC

2
DH_1.05V

BOOT
2 13
1

TON UGATE

EN/DEM
PR103 3 12 LX_1.05V 1
3

100_0603_1% VOUT PHASE


+
PR102

+5VALW 1 2 4 11 1 2 +5VALW
VDD CS
4.7_1206_5%

3
PR104 3
2
PC88

5 10 14K_0402_1%
FB VDDP 2

1
1

6 9 DL_1.05V 2
PC89 PGOOD LGATE
PQ26

4.7U_0603_6.3V6K

2
2

1
PC90

GND
PGND
330U_B2_2.5VM_R15M

RT8209BGQW_WQFN14_3P5X3P5 PC92

7
8
1

4.7U_0805_10V6K
2
IRFH3707TRPBF_PQFN8-3
680P_0603_50V7K

PR105
8.2K_0402_1%
1 2

1
PR106
20.5K_0402_1%

2
<Vo=1.05V> VFB=0.75V
Vo=VFB*(1+PR105/PR106)=0.75*(1+8.2K/20.5K)=1.05V
Fsw=280KHz

Cout ESR=15m ohm Rdson(max)=17.9m Rdson(typical)=14.5m


Ipeak=3.124A, Imax=2.187A, Iocp=3.749A
Delta I=((19-1.05)*(1.05/19))/(1.5u*280K)=3.549A
=>1/2DeltaI=1.774A
4
Vtrip=Rtrip*10uA=14K*10uA=0.14V 4

Iocpmin=Vtrip/(Rdsonmax)+1.774
=0.14/(0.0179)+1.774=9.596A
Iocpmax=(0.14/(0.0145*1.2))+1.774A=9.820A
Iocp=9.596A~9.820A Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2007/09/20 2008/09/20 Title
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATICS, MB A5651
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401793 D
Date: Friday, May 21, 2010 Sheet 27 of 32

A B C D
5 4 3 2 1

PL14
HCB2012KF-121T50_0805
0.89V_B+ 1 2 B+

1
1
1
1

PC168

5
PC93
PC94
PC95

2
2
2
2
PQ27

0.1U_0603_25V7K

4.7U_0805_25V6-K
4.7U_0805_25V6-K

2200P_0402_50V7K
PR107
D
300K_0402_5% 4 D
(17,24,27,29) 1 2 <Vo=0.89V> VFB=0.75V
PR108 PR109
SUSP# 2K_0402_1% 0_0603_5% Vo=VFB*(1+PR114/PR115)=0.75*(1+28.7K/20.5K)=0.89V
1 2 BST_0.89V1 2 SIS412DN-T1-GE3_POWERPAK8-5 Fsw=263KHz

3
2
1

1
1
PR110 PL8 Cout ESR=15m ohm Rdson(max)=17.9m Rdson(typical)=14.5m

1
15
14
30K_0402_5% PC96 PU8 PC97 2.2U_FDV0630-2R2M-P3_7.2A_20%
1U_0402_6.3V6K BST_0.89V-1 1 2 1 2
Ipeak=1.38A, Imax=0.966A, Iocp=1.656A

2
+0.89VP

NC

2
Delta I=((19-1.8)*(1.8/19))/(2.2u*263K)=1.467A
DH_0.89V 0.1U_0603_25V7K

BOOT
2 13

1
TON UGATE =>1/2DeltaI=0.7335A

EN/DEM
PR112 3 12 LX_0.89V Vtrip=Rtrip*10uA=8.66K*10uA=0.0866V

3
100_0603_1% VOUT PHASE
1 Iocpmin=Vtrip/(Rdsonmax)+0.7335
+5VALW 1 2 4 11 1 2 +5VALW
VDD CS +

PR111
PR113 =0.0866/(0.0179)+0.7335=5.572A

PQ28
4.7_1206_5%
5 10 8.66K_0402_1%

PC98
FB VDDP Iocpmax=(0.0866/(0.0145*1.2))+0.7335A=5.711A

1
1
DL_0.89V 2 Iocp=5.572A~5.711A
(17) +0.89V_PG 6 PGOOD LGATE 9 2

220U_B2_2.5VM
PC99

1
4.7U_0603_6.3V6K

2
2

GND
PGND
PC100
RT8209BGQW_WQFN14_3P5X3P5 PC102

7
8
1
IRFH3707TRPBF_PQFN8-3

PR215
4.7U_0805_10V6K

2
680P_0603_50V7K

10K_0402_5%
PR114
3.74K_0402_1%
1 2 +3VALW

1
C C
PR115
20.5K_0402_1%

2
Ipeak=1.48A, Imax=1.036A
+1.8V
+5VALW

1
PC105
1U_0402_6.3V6K

1
PC106 PU10
4.7U_0805_6.3V6K 6 VPP
5 3

2
PR117 VIN VO
9 4 +1.5VS

1
10K_0402_5% TP VO

1
1 2 8 PR118 PC107

1
1
VEN 0.01U_0402_25V7K
(17,24,27,29) SUSP# 7 POK ADJ 2
1.54K_0402_1%

2
1
GND
PC108
PC198
<BOM Structure>

2
2
2
B PR119 PC109 G9731F11U_SO8 B

1
@ 47K_0402_5% .1U_0402_16V7K
+1.8V

2
.1U_0402_16V7K

22U_0805_6.3V6M

1
PR120
1.74K_0402_1%
PU11

2
1 VIN VCNTL 6
+3VALW
2 5
2
1

GND NC PC111
1

PC110 3 7 1U_0603_6.3V6M
4.7U_0805_6.3V6K PR121 VREF NC
1
2

1K_0402_1% 4 8
VOUT NC
9
2

TP
APL5336KAI-TRL SOP

PR122
1
1
1

0_0402_5% PQ29 D +0.9VS


1 2 2 PR123
1
1

(24) SUSP G 1K_0402_1%


2

Ipeak=1A, Imax=0.7A
1
PC112

S
3
PC199

PC113 2N7002W-T/R7_SOT323-3
2
2
2

PC114

.1U_0402_16V7K
2
.1U_0402_16V7K
.1U_0402_16V7K

10U_0805_6.3V6M

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2007/09/20 2008/09/20 Title
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATICS, MB A5651
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401793
WWW.AliSaler.Com Date: Friday, May 21, 2010 Sheet 28 of 32
5 4 3 2 1
A B C D E F G H

1 1

(5)
(5)
(5)
(5)
(5)
(5)
(5)

VR_ON (17)
CPU_VID0
CPU_VID1
CPU_VID2
CPU_VID3
CPU_VID4
CPU_VID5
CPU_VID6
+3VS

1
PR194
4.7K_0402_1% +5VS

+CPU_B+ PL9

2
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
HCB2012KF-121T50_0805

2
2
2
2
2
2
2
2
2
PR195
0_0402_5% 1 2 B+
2 13211_PWRGD PR200
(5,8,13,17) VGATE

PR196
PR197
PR198
PR199
PR201
PR202
PR203
PR204
10_0603_1%

1
1
1
1
1
1
1
1
1
1
1
1
1

PC121
PC116
PC147
PC148

2
2
2
2

VID0
VID1
VID2
VID3
VID4
VID5
VID6
2 2

3211_EN
4.7U_0805_25V6-K
4.7U_0805_25V6-K
0.1U_0402_25V6

5
2200P_0402_50V7K
+3VS PU12 PC182
1U_0805_25V6K

32
31
30
29
28
27
26
25
3211_VCC
PQ30

1
EN
VID0
VID1
VID2
VID3
VID4
VID5
VID6
24 PR206 PC183 4
PR205 VCC 0_0603_5% 0.22U_0603_25V7K SIS412DN-T1-GE3_POWERPAK8-5
1 PWRGD
10K_0402_1% 23 CPU_BOOST 1 2CPU_BOOST-1
1 2

1
BST
2

2
PC184 IMON 3211_DRVH PL10
22

3
2
1
1000P_0402_50V7K DRVH 2.2U_FDV0630-2R2M-P3_7.2A_20%
3

2
(8) CLK_ENABLE# CLKEN#
21 3211_SW 1 2 +CPU_COREP
SW +CPU_CORE
4

1
FBRTN ADP3211AMNR2G_QFN32_5X5 20

5
PVCC +5VS
1 2 3211_FB 5 FB 3211_DRVL PR124
19 2 1

1
PC185 PC187 3211_COMP 6 DRVL 4.7_1206_5%
390P_0402_50V7K 47P_0402_50V8J COMP PC186
18

2
PGND LL=5.9m ohm
7 2.2U_0603_10V6K

2
GPU OCP=7.85A
1 2 1 23211_COMP-1
1 2 17 4

1
3211_ILIM 8 AGND
ILIM
VID:0.75V~1.1V
PR208 PC188 PR207 33 PQ31 PC115
1K_0402_1% 470P_0402_50V8J 28K_0402_1% AGND AON7702L_DFN8-5 680P_0603_50V7K Io(max)=6.04A

3
2
1

IREF
RPM
RT
RAMP
LLINE
CSREF
CSFB
CSCOMP

2
10
11
12
13
14
15
16
PR209
2.37K_0402_1%

PH4
100K_0402_1%_NCP15WF104F03RC

3211_RT

3211_IREF
3211_RAMP
3211_CSFB
1 2

2
2 3211_RPM
2
3211_CSCOMP
3211_CSCOMP
3 Avoid high dV/dt 3
Place RTH1 close to inductor

3211_CSCOMP 1
PR210
PR213
on the same layer

PR211
PR212
35.7K_0402_1%

80.6K_0402_1%
2 1

1
1
1

2
2
200K_0402_1%
274K_0402_1%
1
PR150 PR158

1
1

PR214
0_0402_5% 0_0402_5% PC190
220P_0402_50V7K PR217

2
PC189 75K_0402_1%

1
1
2
2

499K_0402_1%
1000P_0402_50V7K

2
PR219 2 1
1K_0402_1%
+CPU_B+ 2 1 3211_RAMP-1 PR218
309K_0402_1%

Connect to input caps

1
1
PC191 PC192
1000P_0402_50V7K 1000P_0402_50V7K

2
2

(6) VSSSENSE
(6)VCCSENSE
Shortest the
net trace

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2007/09/20 2008/09/20 Title
Deciphered Date
SCHEMATICS, MB A5651
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401793 D
Date: Friday, May 21, 2010 Sheet 29 of 32
A B C D E F G H
5 4 3 2 1

Version change list (P.I.R. List) Page 1 of 1 for PWR

Item Fixed Issue Reason for change Rev. PG# Modify List Date Phase

D D
add PC200 For design change 0.1 24 2009.5.15 EVT
1
add PC193,PC194 For design change 0.1 26 2009.5.15 EVT
2
add PC195,PC196 For design change 0.1 27 2009.5.15 EVT
3
4 add PC197,PC198,PC199 For design change 0.1 28 2009.5.15 EVT

change PL3,PL4 For design change 0.1 26 change PL3,PL4 to 4.7uH 2009.5.15 EVT
5
change PQ10,PQ11 For design change 0.1 25 change PQ10,PQ11 to P-Chanel 2009.6.5 EVT
6
add PC165 Solution for 3G noise reduce 0.1 25 2009.6.5 EVT
7

C
add PC163,PC164 Solution for 3G noise reduce 0.1 26 2009.6.5 EVT C
8
add PC166,PC167 Solution for 3G noise reduce 0.1 27 2009.6.5 EVT
9
add PC168 Solution for 3G noise reduce 0.1 28 2009.6.5 EVT
10
delete PC103,PC1120 For design change 0.1 29 2009.6.5
11
change PR94,PR102 For design change 0.1 27 change PR94,PR102 to 100ohm 2009.6.5
12
change PC79,PC89 For design change 0.1 27 change PC79,PC89 to 4.7uF 2009.6.5
13
change PR112 For design change 0.1 28 change PR112 to 100ohm 2009.6.5
14
change PC99 For design change 0.1 28 change PC99 to 4.7uF 2009.6.5
15
B B

change +5VALW/+3VALW OCP For design change 0.1 26 change PR49 to 309ohm & PR50 to 249ohm 2009.6.5
16
add PJ1,PJ2,PJ3,PJ4,PJ5,PJ6,PJ7 For design change 0.1 25 2009.6.15
17
add PJ9,PJ10 For design change 0.1 28 2009.6.15
18
Change net name For design change 0.1 25 Change net name +1.05V to +VCCP 2009.6.15
19
Change PJP2 For design change 0.1 24 Change PJP2 to DC040903020 2009.6.15
20
Change PBJ1 For design change 0.1 23 Change PBJ1 to SP020008Y00 2009.6.15
21
delete PJ6,PJ7,PJ9,PJ10 For design change 0.1 28 2009.6.18
22
A A
Change net name For design change 0.1 29 Change net name GND_SIGNAL to GND 2009.6.18
23

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2007/09/20 2008/09/20 Title
Deciphered Date
SCHEMATICS, MB A5651
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401793 D
Date: Friday, May 21, 2010 Sheet 30 of 32
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Version change list (P.I.R. List) Page 1 of 1 for PWR

Item Fixed Issue Reason for change Rev. PG# Modify List Date Phase

D D
Change PR194 For design change 0.1 29 change PR194 to 4.7K ohm 2009.6.30 EVT
1
add PR221 For design change 0.1 25 2009.6.30 EVT
2
Change PR4 For design change 0.1 23 change PR4 to 0 ohm 2009.7.2 EVT
3
4 Change PJP3 to PBJ1 For design change 0.1 23 change SP020008Y00 to SP093MX000 2009.8.4 EVT

Change PH1 & PH4 For design change 0.1 24 change SL210031F00 to SL200000V00 2009.8.12 EVT
5
Change PL10 For design change 0.1 29 change SH000006I80 to SH000000700 2009.8.12 EVT
6
Change PR99 & PR108 Modify power sequence 0.1 27 change SD028000080(0 ohm) to SD034200280(20K ohm) 2009.8.12 EVT
7

C
Change PR90 Modify power sequence 0.1 27 change SD028000080(0 ohm) to SD034100280(10K ohm) 2009.8.12 EVT C
8
Change PR83 Modify ISL6251 Charger KV 0.1 25 change SD034182280(18.2 ohm) to SD034154280(15.4K ohm) 2009.8.24 EVT
9
Change PR117 Modify power sequence 0.1 28 change SD028000080(0 ohm) to SD034100280(10K ohm) 2009.8.24 EVT
10
Change PR99 & PR108 Modify power sequence 0.1 27 change SD034200280(20K ohm) to SD034200180(2K ohm) 2009.8.24 EVT
11
Change PR90 Modify power sequence 0.1 27 change SD034100280(10K ohm) to SD034100180 (1K ohm) 2009.8.24 EVT
12
Change PC77 & PC86 & PC96 to pop
Change PC77 & PC86 & PC96 Modify power sequence 0.1 27 2009.8.24 EVT
13 change SE076104KM8(0.1uf) to SE000000K80 (1uf)

Change PC109 Change part number 0.1 27 change SE076104KM8(0.1uf) to SE076104K80(0.1uf) 2009.8.24 EVT
14
Change PL3.PL4 To slove high frequency noise 0.1 26 change SH00000BU00(4.7uH) to SH00000BS00(8.2uH) 2009.8.27 EVT
15
B B

Change PL9 For design change 0.1 29 change SM01000BY00 to SM01000C000 2009.9.4 DVT
16
Change PL4 To improve +5VALWP efficiency 0.1 26 change SH00000BS00(8.2uH) to SH00000F900(4.7uH) 2009.9.10 DVT
17
Change PR209 Modify CPU CORE OCP 0.1 29 change SD028180180(1.8K ohm) to SD034237180 (2.37K ohm) 2009.9.30 PVT
18

19

20

21

22
A A

23

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2007/09/20 2008/09/20 Title
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATICS, MB A5651
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401793 D
Date: Friday, May 21, 2010 Sheet 31 of 32
5 4 3 2 1
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<2009/4/28>
Update new power schematic, <2009/06/10> <2009/07/03>
release first version NAV50 schematic . Page 7- Add C116 @ . Page18 Add D41.2 to PWR_PWM_LED#
. Page 22- Modify USB_OC#1_2 to USB_OC#2 . Page8 Change co-lay net name to +1.5VM_CK505
<2009/04/29> . Page 17- Modify PLTRST# to PCI_RST# . Page20 Change JP2 Pin42 to +5VS
. Add R1182 R1183 L3 on page 9 . Page 17- Add @ on R1311
. Change J3 to R1184 on page 13 <2009/07/06>
<2009/04/30> . Page18 Add pwr switch for NAV50
. Change JDIM1 to SP07F001720 on page 7 <2009/06/12>
. Del SATA1 Port on page 12 . Page4 Add C314 C313 C1150 D19 on +VCC_FAN1
. Change R51 R57 R70 R63 R317 R314 R190 to 0402 Size on page 21 . Page8 Add C1145 C1146 C1147 <2009/07/08>
D
. Page10 Move CRT_DET# from Page13 to Page10 . Page5 Add 470pf on H_SMI# for known issue. D
<2009/05/04> . Page13 Add +RTCVCC circuit
. Add WWAN_CLKREQ# and R107 pull-high to +3VS on page 8
. Add CRT_DET# on page 10 <2009/06/15>
. Add CRT_DET# circuit on page 13 . Update New Power schematic (change PBJ1 to PJP3) <DVT START>
. Add 3 LEDS on page 16 . Page 10 modify C310 C308 C303 C307 C306 C304 Bom Structure <2009/08/04>
. Add BT/BTN Board CONN. on page 16 . Page 22 Modify Hole location by (ME drawing 06/12) . Page5 CLK_CPU_HPLCLK CLK_CPU_HPLCLK# exchange
. Update TP/B CONN. to SP01000LB00 on page 19 . Page9 Change JLVDS1 to P/N ACES 88341-3001 30P
<2009/06/16> . Page17 del PM_1.8V(U6.82) ,Del R1310 R1311
<2009/05/11> . Page7 Modify DDR Command Control Pin pull-high Resister location . Page18 Del D41
. Add INVT_PWM on Page 5 . Page9 Change R577 to 0402 type
. Del R323 on page 5
. C74 change to 2.2U_0603 on page 6
. C267 change to 22U on page 6
. C391 change to 0.1U on page 6 <2009/06/17>
. Del C67 C35 C33 C36 on page 6 . Update New Power schematic 06/17 <2009/09/03>
. Del +LGI_VID and U71.A21 direct connect to +VCCP on page 6 . Page9 modify LVDS Conn. Pin define . Page7 Change C112 to 0402 type
. Follow Intel checklist, add R52 on FSB on page 8 . Page9 Del C1110 . Page8 Add T6 on CLK_48M_CR
. Add D5 D7 D8 on page 4 . Page4 Add EMI solution D38 D39 D40 . Page16 Modify JP18 Pin define change +5VALW +5VS to +3VALW +3VS
. Add R174 on page 9 . Page20 Change Pin 18, 23 to +1.5VS change Pin7 , 9 to USB20_P7 N7
. Add PCI_RST# on page 11 <2009/06/18>
. Update New Power schematic 06/18 . Page21 Del H12
. Add C1115 C1114 C1116 C1117 C1118 on page 15
. Page8 modify U4 Pin define and Q31
. Page13 Add R1376, R1377 <2009/09/08>
C
<2009/05/12> . Page15 Modify C403 Update Power schematic 0904 C

. Follow Intel Layout Checklist, Add C141 on VDDSPD on page 7 . Page23 Modify H11 . Page18 Change R1388 to 100 ohm 0402
. Modify SRC CLK PORT LIST on page 8 . Page18 Change LED1 to SC591NB5A00
. Del CLKREQ_LAN# on page 8 <2009/06/19>
. Change PCIE Port list on page 13 . Page4 Add new signal CPU_ITP , CPU_ITP# <2009/09/10>
. Change USB Port list on page 13 . Page5 ADD R1378 Update Power schematic 0910
. Add W/L 3G SW on page 16 . Page6 ADD C1152,C1153,C1154 C1160,C1161,C1162 . Page22 unmount Q6 Q8
. Del R103 on page 18 . Page7 DDR_A_D8與DDR_A_D9互換
. Page8 ADD R1379,R1380,U77,R1381,C1157,R1382,R1383,R1384,C1157
<2009/05/13> , Page8 DEL C390
. Change JMINI1 to PCIE Port 3 on page 15 . Page9 ADD C1156
. Page11 DEL R1322, R1154
<2009/05/14> . Page13 DEL U77, ADD C1158 <2009/10/07>
. Page8 Change C174 C175 to 10U_0603 . Page17 ADD C1159 . Page4 U71 Change to SA00003M800
. Page6 R26 Change to SHI00009C00
<2009/05/14> . Page13 R152 Change to SD034200A80
. Update New Power schematic <2009/06/22> . Page18 R1388 Change to SD028510A80
. Del R376 R377 on page 8 . Page22 change IO Conn. pin34 from 48M to USB_ON#
. Del D5 D7 D8 on page 4 . Page10 change JCRT1 P/N to SP010906182
. Change JLVDS1 to SP010006810 on page 9 <2010/04/29>
. Add D6 for EMI on page 9 <2009/06/23> update new bom
. Change C1106 to C_0603 type on page 9 . Page15 Add C1163 C1164 C1165 C1166
. Change USB_OC# on page 13 . Page18 change PWR/B Conn. P/N to SP01000H300
B . Add USB Port2 on page 20 . Page22 change JUSB1 JUSB2 P/N B
. Change JP11 Pin define & Add D22 on page 19
. Change C512 to 1u_0402 on page 15 <2009/06/24>
. Add U29 (MEDIA_LED#)) on page 16 . Page8 Change C1350 C1351 to 0402 type
. Page10 Add R1385 R1386 on JVGA_HS JVGA_VS
<2009/05/19>
.Update new clock GEN co-lay schematic on page 8
<2009/06/25>
<2009/06/05> . Page22 move some parts to I/O Board , Add the MONO_IN_R on M/B
.Update new clock GEN co-lay schematic on page 8 .
.Follow Intel check list change C161 C165 to 27P on page 8
.Follow Intel check list change C56 to 22uF on page 6
<2009/06/29>
<2009/06/08> . Page16 Change JP24 to ACES_88266_05001
.Update New Power schematic 06/06 version . Page15 Change JMINI1 to FOX_AS0B246-S50U-7F_52P-T
Page 13- a.Del R203 (pull-up GPIO6 Resister)
b.Change R1184 NU <2009/06/30>
Page 17- a. Add VGATE . Page18 Change PWR_LED# to PWR_PWM_LED#
b. Del R1294 . Page17 Add PWR LED DETECT PIN on Pin97
c. Change D30 NU
d. Change R1295 to 0 ohm <2009/07/02>
e. Add R1309 0 ohm on EC_RSMRST# . Update New Power schematic 07/02
f. Pull-up LAN_WAKE# +3VALW . Page9 Add C1167 C1168 for RF request.
A A
g. ICH_POK change to PCH_POK . Page13 Change R223 to 100K
h. Pull-up KB_RST# to +3VS . Page16 change JP24 to ACES_85201-0505N
Page 10- a. Add R1283 R1284 ,Change R247 R249 to 10 ohm . Page17 Del R1387 R1388 on EC Pin97
b. Add @ on U10 U11 C301 C298 . Page17 Add New Board ID to separate NAV50 NAV60
c. Del C302 C300 R1281 R1287 . Page17 Change 展頻IC to SA00003J400 (New)
. Page18 Add D41 for ESD Compal,Electronics,lnc
Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL,INC. AND CONTAINS CONFIDENTIAL AND TRADE SCHEMATICS, MB A5651
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF COMPETENT DIVISION OF R&D DEPARTMENT Size Document Number Rev
EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR Custom
DISCLOSED TO ANY THIRD PARTY WITHOUTPRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401793 D
Date: Friday, May 21, 2010 Sheet 32 of 32
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