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Infineon IRFS3607 DataSheet v01 01 en
Infineon IRFS3607 DataSheet v01 01 en
IRFB3607PbF
IRFS3607PbF
Applications
l High Efficiency Synchronous Rectification in
IRFSL3607PbF
SMPS HEXFET® Power MOSFET
l Uninterruptible Power Supply
l High Speed Power Switching
D
VDSS 75V
l Hard Switched and High Frequency Circuits
RDS(on) typ. 7.34m :
G max. 9.0m :
Benefits S ID 80A
l Improved Gate, Avalanche and Dynamic
dv/dt Ruggedness
l Fully Characterized Capacitance and D D
D
Avalanche SOA
l Enhanced body diode dV/dt and dI/dt
Capability S
S S D
D G G
G
TO-220AB D2Pak TO-262
IRFB3607PbF IRFS3607PbF IRFSL3607PbF
G D S
Gate Drain Source
Thermal Resistance
Symbol Parameter Typ. Max. Units
R JC Junction-to-Case k ––– 1.045
R CS Case-to-Sink, Flat Greased Surface, TO-220 0.50 ––– °C/W
R JA Junction-to-Ambient, TO-220 j ––– 62
R JA Junction-to-Ambient (PCB Mount) , D Pak
2
jk ––– 40
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01/20/12
IRFB/S/SL3607PbF
VSD Diode Forward Voltage ––– ––– 1.3 V TJ = 25°C, IS = 46A, VGS = 0V g
dv/dt Peak Diode Recovery ––– 27 ––– V/ns TJ = 175°C, IS = 46A, VDS = 75V f
trr Reverse Recovery Time ––– 33 50 ns TJ = 25°C VR = 64V,
––– 39 59 TJ = 125°C IF = 46A
Qrr Reverse Recovery Charge ––– 32 48 nC TJ = 25°C di/dt = 100A/μs g
––– 47 71 TJ = 125°C
IRRM Reverse Recovery Current ––– 1.9 ––– A TJ = 25°C
ton Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
Calculated continuous current based on maximum allowable junction ISD 46A, di/dt 1920A/μs, VDD V(BR)DSS, TJ 175°C.
Pulse width 400μs; duty cycle 2%.
temperature. Note that current limitations arising from heating of the
Coss eff. (TR) is a fixed capacitance that gives the same charging time
device leads may occur with some lead mounting arrangements.
as Coss while VDS is rising from 0 to 80% VDSS .
Repetitive rating; pulse width limited by max. junction
temperature. Coss eff. (ER) is a fixed capacitance that gives the same energy as
Limited by TJmax, starting TJ = 25°C, L = 0.12mH Coss while VDS is rising from 0 to 80% VDSS.
RG = 25, IAS = 46A, VGS =10V. Part not recommended for use When mounted on 1" square PCB (FR-4 or G-10 Material). For recom-
mended footprint and soldering techniques refer to application note #AN-994.
above this value.
Ris measured at TJ approximately 90°C.
2 www.irf.com
IRFB/S/SL3607PbF
1000 1000
VGS VGS
TOP 15V TOP 15V
10V 10V
8.0V 8.0V
6.0V 6.0V
5.5V 5.5V
5.0V 5.0V
100 4.8V 4.8V
BOTTOM 4.5V BOTTOM 4.5V
100
4.5V
10
4.5V
2.5
100
2.0
(Normalized)
T J = 175°C
10 T J = 25°C
1.5
1
1.0
VDS = 25V
60μs PULSE WIDTH
0.1 0.5
2 3 4 5 6 7 8 -60 -40 -20 0 20 40 60 80 100120140160180
T J , Junction Temperature (°C)
VGS , Gate-to-Source Voltage (V)
100000 12.0
VGS = 0V, f = 1 MHZ
ID= 46A
Ciss = Cgs + Cgd, C ds SHORTED
Crss = Cgd 10.0
VGS , Gate-to-Source Voltage (V)
VDS= 24V
Coss = Cds + Cgd
VDS= 15V
C, Capacitance (pF)
10000 8.0
Ciss 6.0
Coss
1000 4.0
Crss
2.0
100 0.0
1 10 100 0 10 20 30 40 50 60
VDS, Drain-to-Source Voltage (V) Q G , Total Gate Charge (nC)
Fig 5. Typical Capacitance vs. Drain-to-Source Voltage Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage
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IRFB/S/SL3607PbF
1000 1000
OPERATION IN THIS AREA
LIMITED BY R DS(on)
100
100μsec
T J = 175°C 100
1msec
10
T J = 25°C
10msec
10
1
Tc = 25°C
Tj = 175°C
VGS = 0V Single Pulse DC
0.1 1
0.0 0.5 1.0 1.5 2.0 1 10 100
VSD, Source-to-Drain Voltage (V) VDS, Drain-to-Source Voltage (V)
Fig 7. Typical Source-Drain Diode Forward Voltage Fig 8. Maximum Safe Operating Area
90
50
40 85
30
80
20
75
10
0 70
25 50 75 100 125 150 175 -60 -40 -20 0 20 40 60 80 100120140160180
T C , Case Temperature (°C) T J , Temperature ( °C )
Fig 9. Maximum Drain Current vs. Case Temperature Fig 10. Drain-to-Source Breakdown Voltage
1.20 500
ID
EAS , Single Pulse Avalanche Energy (mJ)
450
1.00 TOP 5.6A
400 11A
BOTTOM 46A
350
0.80
300
Energy (μJ)
0.60 250
200
0.40
150
100
0.20
50
0.00 0
-10 0 10 20 30 40 50 60 70 80 25 50 75 100 125 150 175
Fig 11. Typical COSS Stored Energy Fig 12. Maximum Avalanche Energy vs. DrainCurrent
4 www.irf.com
IRFB/S/SL3607PbF
10.00
1.00
D = 0.50
0.20
0.10 0.10 R1
R1
R2
R2
R3
R3
R4
R4
Ri (°C/W) i (sec)
0.05 J C 0.01109 0.000003
J
1 0.26925 0.000130
0.02 1
2 3 4
2 3 4
0.01 0.49731 0.001301
0.01 Ci= iRi
Ci iRi
0.26766 0.008693
Notes:
SINGLE PULSE
1. Duty Factor D = t1/t2
( THERMAL RESPONSE )
2. Peak Tj = P dm x Zthjc + Tc
0.00
1E-006 1E-005 0.0001 0.001 0.01 0.1
t1 , Rectangular Pulse Duration (sec)
10 0.05
0.10
1
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming j = 25°C and
Tstart = 150°C.
0.1
1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01
tav (sec)
Fig 14. Typical Avalanche Current vs.Pulsewidth
0
PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC
25 50 75 100 125 150 175
Iav = 2DT/ [1.3·BV·Zth]
Starting T J , Junction Temperature (°C) EAS (AR) = PD (ave)·tav
4.0 V R = 64V
15 TJ = 25°C
3.5
TJ = 125°C
3.0
IRR (A)
10
2.5 ID = 100μA
ID = 250μA
2.0 ID = 1.0mA
5
ID = 1.0A
1.5
1.0 0
-75 -50 -25 0 25 50 75 100 125 150 175 200 0 200 400 600 800 1000
T J , Temperature ( °C ) diF /dt (A/μs)
Fig 16. Threshold Voltage vs. Temperature Fig. 17 - Typical Recovery Current vs. dif/dt
20 560
IF = 46A IF = 31A
V R = 64V 480 V R = 64V
15 TJ = 25°C TJ = 25°C
400
TJ = 125°C TJ = 125°C
320
Q RR (A)
IRR (A)
10
240
160
5
80
0 0
0 200 400 600 800 1000 0 200 400 600 800 1000
diF /dt (A/μs) diF /dt (A/μs)
Fig. 18 - Typical Recovery Current vs. dif/dt Fig. 19 - Typical Stored Charge vs. dif/dt
560
IF = 46A
480 V R = 64V
TJ = 25°C
400
TJ = 125°C
320
Q RR (A)
240
160
80
0
0 200 400 600 800 1000
diF /dt (A/μs)
VGS=10V*
Circuit Layout Considerations
Low Stray Inductance
Ground Plane
- Low Leakage Inductance D.U.T. ISD Waveform
Current Transformer
+
Reverse
Recovery Body Diode Forward
-
+ Current Current
- di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
VDD
Ripple 5% ISD
V(BR)DSS
15V
tp
L DRIVER
VDS
RG D.U.T +
V
- DD
IAS A
VGS
20V
tp 0.01
I AS
Fig 21a. Unclamped Inductive Test Circuit Fig 21b. Unclamped Inductive Waveforms
LD
VDS VDS
90%
+
VDD -
D.U.T 10%
VGS VGS
Pulse Width < 1μs
Duty Factor < 0.1% td(on) tr td(off) tf
Fig 22a. Switching Time Test Circuit Fig 22b. Switching Time Waveforms
Id
Vds
Vgs
L
VCC
DUT Vgs(th)
0
1K
Fig 23a. Gate Charge Test Circuit Fig 23b. Gate Charge Waveform
www.irf.com 7
IRFB/S/SL3607PbF
TO-220AB Package Outline (Dimensions are shown in millimeters (inches))
8 www.irf.com
IRFB/S/SL3607PbF
D2Pak (TO-263AB) Package Outline
Dimensions are shown in millimeters (inches)
25
3$57180%(5
,17(51$7,21$/
5(&7,),(5 )6
/2*2 '$7(&2'(
3 '(6,*1$7(6/($')5((
352'8&7237,21$/
$66(0%/< <($5
/27&2'( :((.
$ $66(0%/<6,7(&2'(
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
www.irf.com 9
IRFB/S/SL3607PbF
TO-262 Package Outline
Dimensions are shown in millimeters (inches)
25
3$57180%(5
,17(51$7,21$/
5(&7,),(5
/2*2
'$7(&2'(
3 '(6,*1$7(6/($')5((
$66(0%/<
/27&2'( 352'8&7237,21$/
<($5
:((.
$ $66(0%/<6,7(&2'(
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
10 www.irf.com
IRFB/S/SL3607PbF
TRR
1.60 (.063)
1.50 (.059)
1.60 (.063)
4.10 (.161) 1.50 (.059)
3.90 (.153) 0.368 (.0145)
0.342 (.0135)
FEED DIRECTION
30.40 (1.197)
NOTES : MAX.
1. COMFORMS TO EIA-418. 26.40 (1.039) 4
2. CONTROLLING DIMENSION: MILLIMETER. 24.40 (.961)
3. DIMENSION MEASURED @ HUB.
3
4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 01/12
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