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Data Communication Methods in LabVIEW

LabVIEW contains many data communication methods, each suited for a certain use case. To ensure you implement the Table of Contents (/reference/en-
correct data communication method for your application, refer to the overview presented in this topic. For detailed XX/help/371361R-01)
information about a particular data communication method, click the title of the data communication method you want to
learn more about. LabVIEW 2018 Help
Data
Dataflow Edition Date: March 2018
Communication Buffer Interfaces Variable Interfaces
Elements Part Number: 371361R-01
Type: View Product Info
Use Case: Sending data Sending data between Storing a readily-accessible value in memory where (http://www.ni.com/en-
between most locations when it is important the latest value is of primary interest. Use carefully to us/shop/select/labview)

block diagram to avoid overwriting or losing avoid race conditions (../using_local_and_global/).


objects. any value. DOWNLOAD (Windows Only)

Examples: Passing data Acquiring a waveform; sending Monitoring the current temperature; monitoring the
from a VI output a message or command; system state.
LabVIEW 2016 Help
to a VI input. streaming an image. (http://www.ni.com/pdf/manuals/371361n.zip)
Categories: LabVIEW 2017 Help
(http://www.ni.com/pdf/manuals/371361p.zip)
— Wire Intra-Target or PC Intra-Target or PC LabVIEW 2018 Help
— Queue — Local variable (http://www.ni.com/pdf/manuals/371361r.zip)
— Shift register
LabVIEW 2019 Help
— Feedback — RT FIFO — Global variable (http://www.ni.com/pdf/manuals/371361t.zip)
Node LabVIEW 2020 Help
— User events — Functional global variable (FGV)
(http://www.ni.com/pdf/manuals/371361u.zip)
— Channel Wire
— Asynchronous Message — Single-process shared variable
Communication (AMC)
Reference Library
— Data value reference

— Current Value Table (CVT)

Networked
— Network streams
Networked
— TCP — Network-published shared variable

— Simple TCP Messaging — Programmatic Shared Variable API


(STM) Reference Library

— Web services

— UDP

Intra-FPGA
— Target-scoped FIFO

Intra-FPGA
— VI-defined FIFO
— Global variable
— DRAM

— Memory item

— Register item

FPGA to/from Host


— DMA FIFO

FPGA to/from Host


— Read/Write Control
FPGA to FPGA
— NI Scan Engine and Variables
— Peer-to-Peer (P2P) FIFO
— User-defined I/O variable
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Dataflow Elements
To take advantage of the dataflow programming environment (../block_diagram_data_flow/) in LabVIEW, you should use
wires, shift registers, feedback nodes, and channel wires as the primary data communication methods in your application.

Method Attributes
Wire (../using_wires/) Primary data transfer between block diagram objects

Shift register (../shift_registers_concepts/) Primary data transfer between loop iterations

Feedback Node Primary data transfer between iterations of code (does not require a
(../feedback_node_concepts/) loop)

Channel Wire (../channel_wires_intro/) Primary data transfer for asynchronous communication between parallel
sections of code

Buffer Interfaces
Use buffer interfaces when you must send data from one location to another and you do not want to overwrite or lose any
value. A buffer interface is often represented as a FIFO (first-in, first-out) single or multi-element buffer where one or more
writers add data onto one end of the buffer and a reader retrieves data from the other end.
Intra-Target or PC

Method Attributes
Queue (../../glang/queue_vis/) Flexible sizing and access options
Non-deterministic

RT FIFO (/reference/en-XX/help/370715P- Deterministic


01/lvrtvihelp/rtfifovipal/) (Real-Time Polling mode (default) handles read/write wait times deterministically,
Module) but creates high CPU overhead
Blocking mode optimizes CPU utilization during read/write wait times,
but does not handle the operations deterministically
Less flexible than queues because of fixed size and limited access
options

User events Event-driven communication (../event_driven_programming/) between


(../../lvhowto/creating_user_events/) different parts of an application
Respond to programmatic changes on objects

Asynchronous Messaging Communication Message communication within a process and between processes
(AMC) Library Greater ease of use compared to queues when designing a messaging
(Available at ni.com) framework
Includes the Queued Message Handler (QMH) template

Note: This is community content subject to the Sample Code License


Terms available at ni.com/samplecodelicense

Networked

Method Attributes
Network streams (../networkstreams/) 1:1 communication
Simpler to implement than TCP
Automatically handle disconnections and reconnections
Unidirectional
Available only for Windows and Real-Time systems

TCP Broad functionality for applications that require network


(../using_labview_with_tcp_ip_and_udp/) communication to devices without network streams support
Low-level protocol introduces implementation complexity

Simple TCP Messaging (STM) Reference Message wrapper around low-level TCP functions
Library
Used to implement 1:N, single server to multiple client
(Available at ni.com) communication

Note: This is community content subject to the Sample Code


License Terms available at ni.com/samplecodelicense

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Method Attributes
Target-scoped FIFO (/reference/en- Implementation options specify the type of storage the FIFO uses: Flip-
XX/help/371599P- flops, Look-Up Table, or Block Memory (/reference/en-
01/lvfpgahelp/fpga_creating_fifos/) (FPGA XX/help/371599P-01/lvfpgadialog/fifo_general_page/)
Module)
VI-defined FIFO (/reference/en- Implementation options specify the type of storage the FIFO uses: Flip-
XX/help/371599P- flops, Look-Up Table, or Block Memory (/reference/en-
01/lvfpgahelp/fpga_creating_fifos/) (FPGA XX/help/371599P-01/lvfpgadialog/fifo_general_page/)
Module)
Avoids resource conflicts in reentrant subVIs by replicating the
resource for each instance
Facilitates reusing code for VIs in multiple projects
Not viewable or customizable from the Project Explorer window

DRAM (/reference/en-XX/help/371599P- Interface with dynamic random access memory (DRAM) using a
01/lvfpgaconcepts/fpga_dram_intro/) memory item or CLIP interface
(FPGA Module) Provides a large amount of buffered memory space compared to
Target-scoped and VI-defined FIFOs
Nondeterministic access latency
Not available on all targets

FPGA to/from Host

Method Attributes
DMA FIFO (/reference/en- Transfers large amounts of data (/reference/en-XX/help/371599P-
XX/help/371599P- 01/lvfpgaconcepts/fpga_dma_communication/) to/from host using Direct
01/lvfpgahelp/fpga_creating_fifos/) Memory Access (DMA)
(FPGA Module)

FPGA to FPGA

Method Attributes
Peer-to-Peer (P2P) FIFO (/reference/en- 1:1 communication between targets (/reference/en-XX/help/371599P-
XX/help/371599P- 01/lvfpgahelp/fpga_p2p_intro/)
01/lvfpgahelp/fpga_creating_fifos/) (FPGA
Module)

Variable Interfaces
Use variable interfaces when you must store a value in memory that readers and writers can access with minimal or no
flow control. Note that you should use variables in cases where the latest value is of primary interest and it is acceptable to
overwrite previous values. Use carefully to avoid race conditions (../using_local_and_global/).
Intra-Target or PC

Method Attributes
Local variable (../../lvhowto/creating_local_variables/) Stores data accessible from a single VI

Global variable (../../lvhowto/creating_global_variables/) Stores data accessible from multiple VIs in the same
LabVIEW application instance

Functional global variable (FGV) VI that uses uninitialized shift registers to store global data
(../suggestions_for_exec/#Functional_Global_Variables) Capable of implementing simple global variables, as well
as more complex data structures, such as stacks or queue
buffers
Helps prevent race conditions by defining specific
operations that calling code can perform on the variable

Single-process shared variable Deterministic option available (/reference/en-


(../sv_publishing_latest_values/) XX/help/370715P-01/lvrthowto/rt_createprojvariable/)
Scalable to network-published use case

Data value reference (../external_data_val_ref/) Stores large data sets


Helps manage memory and avoid data copies

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Current Value Table (CVT) Common data repository for variables in applications with
(Available at ni.com) separate components
Uses less computing resources than shared variables by
centralizing I/O operations

Note: This is community content subject to the Sample


Code License Terms available at
ni.com/samplecodelicense

Networked

Method Attributes
Network-published shared variable Deterministic option available (/reference/en-XX/help/370715P-
(../sv_publishing_latest_values/) 01/lvrthowto/rt_createprojvariable/)
Ideal for monitoring values
Stores values in a network data server (Shared Variable Engine)
Built-in connection manager for 1:N and N:1 network configurations

Programmatic Shared Variable API Improves design scalability by providing dynamic access to variables
(../sv_usingdynvarapi/) instead of static node-based binding
Access multiple variables with a single variable API function
Access network-published I/O variables

Web services (../webservices/) Network data communication using standard HTTP protocols
Stream standard MIME data types, such as text, images, and videos
Build and deploy web services using LabVIEW VIs

UDP Supports single-cast (1:1) and multicast (1:N) for low-level


(../using_labview_with_tcp_ip_and_udp/) communication among processes on devices
Higher performance than TCP in applications that do not require
lossless data transfer
Low-level protocol introduces implementation complexity
Does not guarantee clients receive data

Intra-FPGA

Method Attributes
Global variable (../../glang/global_variable/) Stores data accessible from multiple VIs in the same LabVIEW
application instance

Memory item (/reference/en- Capable of storing values as multiple data points


XX/help/371599P-
Implementation options specify the type of storage the memory item
01/lvfpgaconcepts/fpga_storing_data/)
uses: Block Memory, Look-Up Table, or DRAM (/reference/en-
(FPGA Module)
XX/help/371599P-01/lvfpgaconcepts/fpga_memory_items/)
Target-scoped (configured in the project) and VI-defined (configured
in a VI for reentrant use) options

Register item (/reference/en- Capable of posting a status every clock cycle


XX/help/371599P-
Target-scoped (configured in the project) and VI-defined (configured
01/lvfpgaconcepts/fpga_storing_reentrant/) in a VI for reentrant use) options
(FPGA Module)
Consume fewer FPGA resources than FIFOs

FPGA to/from Host

Method Attributes
Read/Write Control (/reference/en-XX/help/371599P- Reads or writes to a control or indicator in the top-level
01/lvfpgahost/readwrite_control/) (FPGA Module) FPGA VI on the FPGA target.

NI Scan Engine and Variables (/reference/en- Simple, periodic communication of FPGA I/O data to/from an
XX/help/371599P- RT host
01/lvfpgaconcepts/fpga_data_transfer_scan_engine/) Reduces code required to transfer I/O data between an
(FPGA Module + NI Scan Engine support on your FPGA target and RT host
target)

User-defined I/O variable Send user-defined data when using the Scan Engine in
(../../lvioscanhelp/io_vars/#user_IOV) (FPGA Module) Hybrid mode
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