Studies on Contact dependence in

Organic Field Effect Transistors

Report
submitted by
Souvik Das
19PH62R13

Under the Guidance of

Dr. Achintya Dhar

Department of Physics
Indian Institute of Technology
Kharagpur

1|Page
 DECLARATION

I declare that this written submission represents my ideas in my own words and where other
ideas or words have been included, I have adequately cited and referenced the original
sources. I also declare that I have adhered to all principles of academic honesty and integrity
and have not misrepresented or falsified any ideas/data/facts/sources in my submission. I
understand that any violation of the above will be cause for disciplinary action by the institute
and can also invoke penal action from the sources which have not been properly cited or from
whom proper permission has not been taken when needed.

Date: 25th April 2021 Souvik Das

2|Page
 CERTIFICATE

This is to certify that the dissertation entitled “Studies on Contact Engineering in

Organic Field Effect Transistors” submitted to the Department of Physics, Indian
Institute of Technology Kharagpur, India for the partial fulfilment of the Masters of
Technology Degree in Physics, embodies bona fide work done by Souvik Das under
my supervision at Indian Institute of Technology, Kharagpur.

Date: 25th April 2021 (Project Supervisor)

3|Page
 ACKNOWLEDGMENT

I owe a deep sense of gratitude to Dr. Achintya Dhar, my supervisor who has introduced me to
the organic field effect transistor and its applications. Learning about various new aspects of
Organic FET has been a motivating and pleasurable experience, not only because of his
considerable knowledge of the subject which aided things but also patient and detailed doubt-
clearing sessions and open to ideas and suggestions which fosters further inquisitiveness in the
student about the subject.

4|Page
 Index

Page

1. Introduction… ........................................................................ 6
2. Theory .................................................................................... 6-7
3. Experimental Details .............................................................. 8
4. Simulation
4.1 Transfer Characteristics .................................... 9-10
4.2 Output Characteristics ...................................... 10-11
4.3 Contact Resistance…………………………….12-15

5. Results ................................................................................... 16
6. Conclusions…………………………………………………..17
7. Future Work…………………………………………………..18
8. References…………………………………………………….19

5|Page
 Abstract:
This project presents the modeling and simulation of a pentacene based organic field effect
transistor (OFET). The aim of this work is to analyze the input characteristics, output
characteristics and contact resistance of an organic field effect transistor with different source
and drain electrodes made up of different metals. Charge injection from different source or
drain electrodes such as Ag, Au, Ag/TDP and the contact current-voltage characteristics were
analyzed. It is revealed that the insertion of TPD[N,N’-Bis(3-methylphenyl)-N,N’-
diphenylbenzidine] interlayer reduces the contact resistance significantly.

1. Introduction:

Organic field-effect transistors (OFETs) were first described in 1987 [1]. The principle of the
field-effect transistor (FET) was first proposed by Lilienfeld in 1930 [2]. Basically, a FET
operates as a capacitor where one plate is a conducting channel between two ohmic contacts,
the source and drain electrodes. The density of charge carriers in the channel is modulated by
the voltage applied to the second plate of the capacitor, the gate electrode. Research on OFET
has been rapidly growing in recent years. Various advantages like lightweight, low cost, and
low fabrication temperature, OFETs have a wide range of applications in making mechanical
sensors, advanced displays, smart cards etc.

2. Theory:

Field effect transistors are special type of transistors which are controlled by the voltage applied
across the input ‘Gate’ terminal. Thus, as they are dependent on the ‘field’ applied across their
input, they are called field effect transistors (FET). Usually an OFET consists of three main
components: an active semiconductor layer, a dielectric (or insulator) and three terminals (i.e.,
source, drain and gate electrodes) [Fig. 1]. Conduction of current through the FET is dependent
on the charge carriers at the organic semiconductor and dielectric interface. When a small
negative gate to source voltage is applied,
some holes start to accumulate in the
organic semiconductor. As this voltage
gets more negative, more of these holes
are formed and as a result the conductivity
of the organic semiconductor increases.
Depending upon material used, there are
two types of FET, n channel FET and p
channel FET. To form a channel in
Figure 1: Schematic diagram of the OFET [3]
substrate region in between gate and drain,
it requires a minimum voltage that depends upon material by which it is fabricated.
6|Page
The performance of an OFET depends on mobility. Higher the mobility, the conduction of
current will be more giving better device performance.

The Current-Voltage (I-V) characteristics of typical OFETs are calculated in linear region or
saturation region, depending on the relative applied voltages on the electrodes.

In the linear region, the drain current increases linearly with the gate voltage according to the
equation:

…………………………………….. (i)
and in the saturation region, the drain current is given by,

…………….….…………………………….. (ii)

Where W is the channel width, L is the channel length, µ is the mobility, C is the capacitance
of the dielectric, Vgs is the gate source voltage, Vt is the threshold voltage and Vds is the drain
source voltage.
The local variation of parameters such as sheet resistance, channel dopant concentration,
mobility, and gate oxide thick- ness have an area dependency

where the subscript ‘p’ represents the process parameter of interest. Process parameters are
those physically independent parameters that control the electrical behavior of a device.
Channel width (W), channel length (L), mobility (µ), gate oxide thickness etc. are the examples
of process parameters. On the other hand, those parameters that are of interest to the designer
are called design parameters. Drain current (Id), Input voltage (Vgs) are the examples of design
parameters.

Contact Resistance: Contact resistance is defined as the total resistance of a system which can
be attributed to the contacting interfaces of electrical leads and connections as opposed to the
intrinsic resistance. Basically, it is the resistance to current flow, due to surface conditions. This
effect arises as the result of the limited areas of true contact at an interface and the presence of
resistive surface films or oxide layers. Contact resistances of the transistors can be calculated as
Rc=(S1)-1S2Vd where S1 is the slop of (Y vs Vg) which is calculated from the strong accumulation
region of Y function method and S2 is the slope of (1/√gm, Vg) which can be determined from the
linear region. Vd is the value of drain voltage which is constant.

7|Page
 2. Experimental Details:

The motivation of this work is taken from ‘Contact engineering for efficient charge injection in
organic transistors with low-cost metal electrodes’ paper [4]. Here is a short description how the
Organic field effect transistor device was made. At
first, the substrates were cleaned by sonication
process in sequential baths of acetone, propanol,
and DI water for 20 min each. Then it was dried by
pure nitrogen gas. Nearly 80 nm thick layer of
aluminum was vacuum deposited on the clean glass
substrates to form the gate electrodes. After that,
spin coating technique was used to deposit a bilayer
dielectric system of polyvinyl alcohol (PVA) and
polymethyl methacrylate (PMMA). Then 50 nm
thick pentacene film was deposited under high
vacuum conditions [Fig 2]. Next, TPD [N, N’-
Bis(3-methylphenyl)-N,N’-diphenylbenzidine] and
Ag were deposited using thermal evaporation
Figure 2: Schematic diagram of the
method to complete the device fabrication. The
OFET device structure [4]
channel length (L) and the width (W) of the
fabricated OFET device were 50 µm and 2 mm respectively.

8|Page
 3. Simulation:

The simulations were employed using the standard transistor equation for the linear and for the
saturation regions using the equations (i) and (ii) mentioned below:

For linear region,

……………………..….. (i)

For saturation region,

……………………………………. (ii)

Where W is the channel width, L is the channel length, µ is the mobility, C is the capacitance
of the dielectric, Vgs is the gate source voltage, Vt is the threshold voltage and Vds is the drain
source voltage.
Table 1
Performance parameters of the transistors with various electrodes

Electrodes VT (V) Ion/Ioff µsat IDS (µA)

(cm2 V—1 s—1) (Vg = Vd =
-20V)

Ag -7.7 ± 0.6 ~10^3 0.026 ±0.006 0.6

Au 2.8 ± 0.5 ~10^3 0.05 ±0.005 1.9

Ag/MoO3 -5.1 ± 0.6 ~10^3 0.065 ±0.005 1.7

Ag/V2O5 -2.4 ± 0.4 ~10^3 0.066 ±0.002 2.5

Ag/TPD -1.8 ± 0.8 ~10^4 0.09 ±0.01 3.8

We have simulated the transfer and output characteristics of the field effect transistor for the
various electrodes using the parameter values collected from the experimental data for an initial
simulation. The initial values of mobility, threshold voltage, gate voltage, and drain voltage
were taken from Table 1. We did the simulation using MATLAB. The MATLAB codes for
these transfer characteristics and output characteristics are given in Annexure.

4.1. Output Characteristics: For the Simulation of output characteristics graphs, we have
fixed the values of some parameters like channel width (W), channel length (L), channel
capacitance (C). Now for different electrodes like Ag, Au, Ag/MoO3, Ag/V2O5 and
Ag/TPD, we have obtained multiple drain current (Id) versus drain voltage (Vd) curves with
varied gate voltage (Vg). The theoretical plots for output characteristics are shown below:

9|Page
Fig 4.1.(a) Fig 4.1.(b)

Fig 4.1.(c) Fig 4.1.(d)

Figure 4.1.(a), 4.1.(b), 4.1.(c),

4.1.(d) and 4.1.(e) shows the output
characteristics i.e. drain current (Id)
vs drain voltage (Vd) curves with
varied gate voltage (Vg) of the
organic field effect transistor with
various electrodes Ag, Au,
Ag/MoO3, Ag/V2O5 and Ag/TPD
respectively.

Fig 4.1.(e)

10 | P a g e
4.2. Transfer Characteristics: For the Simulation of transfer characteristics graphs, we have
fixed the values of some parameters like channel width (W), channel length (L), capacitance of
the gate dielectric per unit area (C) and drain voltage (Vd). Now for different electrodes like
Ag, Au, Ag/MoO3, Ag/V2O5 and Ag/TDP we have obtained the drain current (Id) for different
values of gate voltage (Vg). The theoretical plots for output characteristics are shown below:

Fig 4.2.(a) Fig 4.2.(b)

Fig 4.2.(c) Fig 4.2.(d)

Figure 4.2.(a), 4.2.(b), 4.2.(c),

4.2.(d) and 4.2.(e) show the
transfer characteristics of the
organic field effect transistor with
various electrodes Ag, Au,
Ag/MoO3, Ag/V2O5 and Ag/TPD
respectively for different values of
gate voltage.

Fig 4.2.(e)

11 | P a g e
4.3. Evaluation of contact resistance in OFETs: We need to find the value of Contact
Resistance in OFET devices with and without contact modification. To calculate the contact
resistance value of transistors we have used 2 methods:
(i) The Y function method.
(ii) The Transfer Line Method (TLM)
- both of which measure the transfer characteristics (the drain current (Id) against the gate voltage
(Vg)).

4.3.(i) The Y function method: The Y function is defined as Y= (𝐼d)√gm where gm is the
transconductance defined as gm = 𝑑(𝐼d)/𝑑(𝑉g). Y-function method requires only one transfer scan
(Id–Vg) of an individual device in linear regime with applying a small source drain voltage
(Vd<<Vg). First, Y functions were plotted with respect to Vg as shown in Fig. 4.3.(i).a and the
slope (Y, Vg) S1 was calculated in the strong accumulation region where a linear behavior was
observed. Similarly, 1/√gm was plotted against Vg as shown in Fig. 4.3.(i).b and the value of
slope (1/√gm, Vg) S2 was determined in the linear region. This is one of the most common
methods typically chosen to extract the field-effect mobility is from the maximum or peak
transconductance ( gm =  μFECoxVdW/L, where μFE is the field-effect mobility extracted from gm)
in the linear region.

Fig.4.3.(i).a: Variation of Y function with the variation of Vg for the transistors with various electrodes:
Ag, Au, Ag/MoO3, Ag/V2O5 and Ag/TPD from where S 1 was calculated.

12 | P a g e
 Fig.4.3.(i).b: Variation of 1/√gm with the variation of Vg .
The linear region of this plot gives mobility.

Finally contact resistances of the transistors were calculated as Rc=(S1)-1S2Vd. The contact
resistance value was found to reduce to 0.05 MΩ-cm while it was 0.8 MΩ-cm in the devices
without contact modification.

4.3.(ii) The Transfer Line Method (TLM): The Transfer Line method is used to measure the
contact resistance with arbitrary values of gate voltage (Vg). Similarly like the Y function
method, here contact resistance values were calculated before and after the insertion of the TPD
interlayer. Here, total resistance (RT) of the channel was measured as a function of channel length
(L). Channel lengths of the device were varied at 50µm, 100µm and 150µm. Then keeping the
drain source voltage (Vds) constant at (-1)V we have measured the e RTW-L characteristics (where
W is the width of the channel, 2mm) for different gate voltages (Vg) before and after the insertion of
the TPD interlayer.

13 | P a g e
Fig.4.3.(ii).a: Variation of total resistance as a function of channel length for the devices
without TPD interlayer.

Fig 4.3.(ii). b: Variation of total resistance as a function of channel length for the devices
with TPD interlayer.

14 | P a g e
 Table 2
Variation of total resistance as a function of channel length

Channel Length Vg Contact Resistance Contact Resistance

(in m) of Ag of Ag/TPD
(in Volt) (in cm) (in cm)
-12 7.2 3.7
50 -16 4 2.7
-20 2.4 2
-12 11.6 6.2
100 -16 6 4.3
-20 3.5 3.2
-12 16 8.3
150 -16 8 5.7
-20 4.5 4

The contact resistance values of the transistors have been estimated by linear curve fitting method
for the measured RT–L characteristics and extrapolating the fitted line up to L = 0 (R T at L=0 is
the contact resistance at that particular gate voltage). We have observed similar amount of
reduction in contact resistance values in the TPD modified devices as obtained by Y function
method. It was found that at Vg = -12V, the value of contact resistance was reduced to 0.18 MΩ-
cm while it was 2.85 MΩ-cm in the devices without contact modification.

15 | P a g e
 4. Results: In this section we have compared the experimental graphs of output
characteristics, transfer characteristics and the contact resistance graphs with the
simulated ones that we have obtained to check the results.

1) Output Characteristics:

2) Transfer Characteristics:

16 | P a g e
3) Contact Resistance:

6. Conclusions:

The plots derived from the MATLAB code resembles the results of experimental plot. However,
the exact same plot could not be simulated because there are some experimental error values
associated with the collected data. The transfer characteristics and output characteristics graphs
show significant improvements in the pristine Ag device performance parameters after its
interface modification through the TPD interlayer. After the insertion of the TPD layer, the output
current increased significantly to 3.8µA from 0.6µA which is more than 6 times higher than that
of the devices without the TPD layer. Also, it shows a better performance than Au (1.9µA). Not
only that, the value the value of contact resistance was also significantly reduced to 0.16 MΩ-cm
while it was 2.8 MΩ-cm (at Vg= -12V) in the devices without contact modification.

17 | P a g e
 7. Future Work:

In future, the aim would be to propose a modeling framework to quantitatively characterize the
bending effects of an OFET device by considering the trap states to describe the carrier
transports in the channel. Then to model that proposed device using both finite element type
simulation and MATLAB simulation. Also, the potential profile above a surface of an OFET
can be mapped using scanning Kelvin probe microscopy. The surface potentiometry together
with theoretical modeling can provide new insights into the mechanisms limiting the
operational stability of any OFET device.

18 | P a g e
 1. References:
[1]
Organic Field-Effect Transistors by Gilles Horowitz. Adv. Mater. 1998, 10, No. 5.
[2]
J. E. Lilienfeld, US Patent 1 745 175, 1930.
[3]
Image Source: https://sites.unica.it/dealab/organic-field-effect-transistors-ofets/
[4]
Contact engineering for efficient charge injection in organic transistors with low-cost metal electrodes by D.
Panigrahi, S. Kumar, and A. Dhar.

For basic ideas on OFET:

1. Organic Field-Effect Transistors by Gilles Horowitz: Origin of OFET explained.
2. Organic field-effect transistor sensors: a tutorial review by Luisa Torsi.
3. Organic transistors on paper: a brief review by Ute Zschieschang and Hagen Klauk.

For experimental details:

1. Y. Gao, Y. Shao, L. Yan, H. Li, Y. Su, H. Meng, and X. Wang, Adv. Funct. Mater. 26, 4456 (2016).
2. Z. Chiguvare and V. Dyakonov, Phys. Rev. B 70, 235207 (2004).
3. T. P. Nguyen, P. Girault, C. Renaud, F. Reisdorffer, P. Le Rendu, and L. Wang, J. Appl. Phys. 115, 012013
(2014).
4. Fukuda and N. Asakawa, J. Phys. D: Appl. Phys. 50, 055102 (2017).
5. W. Wang, J. Han, J. Ying, and W. Xie, IEEE Trans. Electron Devices 61, 3507 (2014).

19 | P a g e